swr-mstr-ctrl.h 4.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2015-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #ifndef _SWR_WCD_CTRL_H
  6. #define _SWR_WCD_CTRL_H
  7. #include <linux/module.h>
  8. #include <soc/swr-wcd.h>
  9. #include <linux/pm_qos.h>
  10. #include <soc/qcom/pm.h>
  11. #include <soc/swr-common.h>
  12. #ifdef CONFIG_DEBUG_FS
  13. #include <linux/debugfs.h>
  14. #include <linux/uaccess.h>
  15. #define SWR_MSTR_MAX_REG_ADDR 0x1740
  16. #define SWR_MSTR_START_REG_ADDR 0x00
  17. #define SWR_MSTR_MAX_BUF_LEN 32
  18. #define BYTES_PER_LINE 12
  19. #define SWR_MSTR_RD_BUF_LEN 8
  20. #define SWR_MSTR_WR_BUF_LEN 32
  21. #endif
  22. #define SWR_ROW_48 0
  23. #define SWR_ROW_50 1
  24. #define SWR_ROW_64 3
  25. #define SWR_COL_04 1 /* Cols = 4 */
  26. #define SWR_MAX_COL 7 /* Cols = 16 */
  27. #define SWR_MIN_COL 0 /* Cols = 2 */
  28. #define SWR_WCD_NAME "swr-wcd"
  29. #define SWR_MSTR_PORT_LEN 8 /* Number of master ports */
  30. #define SWRM_VERSION_1_0 0x01010000
  31. #define SWRM_VERSION_1_2 0x01030000
  32. #define SWRM_VERSION_1_3 0x01040000
  33. #define SWRM_VERSION_1_5 0x01050000
  34. #define SWRM_VERSION_1_5_1 0x01050001
  35. #define SWRM_VERSION_1_6 0x01060000
  36. #define SWR_MAX_CH_PER_PORT 8
  37. #define SWRM_NUM_AUTO_ENUM_SLAVES 6
  38. enum {
  39. SWR_MSTR_PAUSE,
  40. SWR_MSTR_RESUME,
  41. SWR_MSTR_UP,
  42. SWR_MSTR_DOWN,
  43. SWR_MSTR_SSR,
  44. };
  45. enum swrm_pm_state {
  46. SWRM_PM_SLEEPABLE,
  47. SWRM_PM_AWAKE,
  48. SWRM_PM_ASLEEP,
  49. };
  50. enum {
  51. SWR_IRQ_FREE,
  52. SWR_IRQ_REGISTER,
  53. };
  54. enum {
  55. SWR_DAC_PORT,
  56. SWR_COMP_PORT,
  57. SWR_BOOST_PORT,
  58. SWR_VISENSE_PORT,
  59. };
  60. enum {
  61. SWR_PDM = 0,
  62. SWR_PCM,
  63. };
  64. struct usecase {
  65. u8 num_port;
  66. u8 num_ch;
  67. u32 chrate;
  68. };
  69. struct swrm_mports {
  70. struct list_head port_req_list;
  71. bool port_en;
  72. u8 ch_en;
  73. u8 req_ch;
  74. u8 offset1;
  75. u8 offset2;
  76. u8 sinterval;
  77. u8 hstart;
  78. u8 hstop;
  79. u8 blk_grp_count;
  80. u8 blk_pack_mode;
  81. u8 word_length;
  82. u8 lane_ctrl;
  83. u8 dir;
  84. u8 stream_type;
  85. u32 ch_rate;
  86. };
  87. struct swrm_port_type {
  88. u8 port_type;
  89. u8 ch_mask;
  90. };
  91. struct swr_ctrl_platform_data {
  92. void *handle; /* holds priv data */
  93. int (*read)(void *handle, int reg);
  94. int (*write)(void *handle, int reg, int val);
  95. int (*bulk_write)(void *handle, u32 *reg, u32 *val, size_t len);
  96. int (*clk)(void *handle, bool enable);
  97. int (*core_vote)(void *handle, bool enable);
  98. int (*reg_irq)(void *handle, irqreturn_t(*irq_handler)(int irq,
  99. void *data), void *swr_handle, int type);
  100. };
  101. struct swr_mstr_ctrl {
  102. struct swr_master master;
  103. struct device *dev;
  104. struct resource *supplies;
  105. struct clk *mclk;
  106. int clk_ref_count;
  107. struct completion clk_off_complete;
  108. struct completion reset;
  109. struct completion broadcast;
  110. struct mutex clklock;
  111. struct mutex iolock;
  112. struct mutex devlock;
  113. struct mutex mlock;
  114. struct mutex reslock;
  115. struct mutex pm_lock;
  116. struct mutex irq_lock;
  117. u32 swrm_base_reg;
  118. char __iomem *swrm_dig_base;
  119. char __iomem *swrm_hctl_reg;
  120. u8 rcmd_id;
  121. u8 wcmd_id;
  122. u32 master_id;
  123. u32 dynamic_port_map_supported;
  124. void *handle; /* SWR Master handle from client for read and writes */
  125. int (*read)(void *handle, int reg);
  126. int (*write)(void *handle, int reg, int val);
  127. int (*bulk_write)(void *handle, u32 *reg, u32 *val, size_t len);
  128. int (*clk)(void *handle, bool enable);
  129. int (*core_vote)(void *handle, bool enable);
  130. int (*reg_irq)(void *handle, irqreturn_t(*irq_handler)(int irq,
  131. void *data), void *swr_handle, int type);
  132. int irq;
  133. int wake_irq;
  134. int version;
  135. int mclk_freq;
  136. int bus_clk;
  137. u32 num_dev;
  138. int slave_status;
  139. struct swrm_mports mport_cfg[SWR_MAX_MSTR_PORT_NUM];
  140. struct list_head port_req_list;
  141. unsigned long port_req_pending;
  142. int state;
  143. struct platform_device *pdev;
  144. int num_rx_chs;
  145. u8 num_cfg_devs;
  146. struct mutex force_down_lock;
  147. int force_down_state;
  148. struct notifier_block event_notifier;
  149. struct work_struct dc_presence_work;
  150. u8 num_ports;
  151. struct swrm_port_type
  152. port_mapping[SWR_MSTR_PORT_LEN][SWR_MAX_CH_PER_PORT];
  153. int swr_irq;
  154. u32 clk_stop_mode0_supp;
  155. struct work_struct wakeup_work;
  156. u32 ipc_wakeup;
  157. bool dev_up;
  158. bool ipc_wakeup_triggered;
  159. struct pm_qos_request pm_qos_req;
  160. enum swrm_pm_state pm_state;
  161. wait_queue_head_t pm_wq;
  162. int wlock_holders;
  163. u32 intr_mask;
  164. struct port_params **port_param;
  165. struct clk *lpass_core_hw_vote;
  166. struct clk *lpass_core_audio;
  167. u8 num_usecase;
  168. u32 swr_irq_wakeup_capable;
  169. int hw_core_clk_en;
  170. int aud_core_clk_en;
  171. #ifdef CONFIG_DEBUG_FS
  172. struct dentry *debugfs_swrm_dent;
  173. struct dentry *debugfs_peek;
  174. struct dentry *debugfs_poke;
  175. struct dentry *debugfs_reg_dump;
  176. unsigned int read_data;
  177. #endif
  178. };
  179. #endif /* _SWR_WCD_CTRL_H */