cvp_hfi.c 119 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <asm/memory.h>
  6. #include <linux/coresight-stm.h>
  7. #include <linux/delay.h>
  8. #include <linux/devfreq.h>
  9. #include <linux/hash.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/io.h>
  12. #include <linux/iommu.h>
  13. #include <linux/iopoll.h>
  14. #include <linux/of.h>
  15. #include <linux/pm_qos.h>
  16. #include <linux/regulator/consumer.h>
  17. #include <linux/slab.h>
  18. #include <linux/workqueue.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/soc/qcom/llcc-qcom.h>
  21. #include <linux/qcom_scm.h>
  22. #include <linux/soc/qcom/smem.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/reset.h>
  25. #include "hfi_packetization.h"
  26. #include "msm_cvp_debug.h"
  27. #include "cvp_core_hfi.h"
  28. #include "cvp_hfi_helper.h"
  29. #include "cvp_hfi_io.h"
  30. #include "msm_cvp_dsp.h"
  31. #include "msm_cvp_clocks.h"
  32. #define FIRMWARE_SIZE 0X00A00000
  33. #define REG_ADDR_OFFSET_BITMASK 0x000FFFFF
  34. #define QDSS_IOVA_START 0x80001000
  35. #define MIN_PAYLOAD_SIZE 3
  36. const struct msm_cvp_hfi_defs cvp_hfi_defs[] = {
  37. {
  38. .size = HFI_DFS_CONFIG_CMD_SIZE,
  39. .type = HFI_CMD_SESSION_CVP_DFS_CONFIG,
  40. .buf_offset = 0,
  41. .buf_num = 0,
  42. .resp = HAL_SESSION_DFS_CONFIG_CMD_DONE,
  43. },
  44. {
  45. .size = HFI_DFS_FRAME_CMD_SIZE,
  46. .type = HFI_CMD_SESSION_CVP_DFS_FRAME,
  47. .buf_offset = HFI_DFS_FRAME_BUFFERS_OFFSET,
  48. .buf_num = HFI_DFS_BUF_NUM,
  49. .resp = HAL_NO_RESP,
  50. },
  51. {
  52. .size = 0xFFFFFFFF,
  53. .type = HFI_CMD_SESSION_CVP_SGM_OF_CONFIG,
  54. .buf_offset = 0,
  55. .buf_num = 0,
  56. .resp = HAL_SESSION_SGM_OF_CONFIG_CMD_DONE,
  57. },
  58. {
  59. .size = 0xFFFFFFFF,
  60. .type = HFI_CMD_SESSION_CVP_SGM_OF_FRAME,
  61. .buf_offset = 0,
  62. .buf_num = 0,
  63. .resp = HAL_NO_RESP,
  64. },
  65. {
  66. .size = 0xFFFFFFFF,
  67. .type = HFI_CMD_SESSION_CVP_WARP_NCC_CONFIG,
  68. .buf_offset = 0,
  69. .buf_num = 0,
  70. .resp = HAL_SESSION_WARP_NCC_CONFIG_CMD_DONE,
  71. },
  72. {
  73. .size = 0xFFFFFFFF,
  74. .type = HFI_CMD_SESSION_CVP_WARP_NCC_FRAME,
  75. .buf_offset = 0,
  76. .buf_num = 0,
  77. .resp = HAL_NO_RESP,
  78. },
  79. {
  80. .size = 0xFFFFFFFF,
  81. .type = HFI_CMD_SESSION_CVP_WARP_CONFIG,
  82. .buf_offset = 0,
  83. .buf_num = 0,
  84. .resp = HAL_SESSION_WARP_CONFIG_CMD_DONE,
  85. },
  86. {
  87. .size = 0xFFFFFFFF,
  88. .type = HFI_CMD_SESSION_CVP_WARP_DS_PARAMS,
  89. .buf_offset = 0,
  90. .buf_num = 0,
  91. .resp = HAL_SESSION_WARP_DS_PARAMS_CMD_DONE,
  92. },
  93. {
  94. .size = 0xFFFFFFFF,
  95. .type = HFI_CMD_SESSION_CVP_WARP_FRAME,
  96. .buf_offset = 0,
  97. .buf_num = 0,
  98. .resp = HAL_NO_RESP,
  99. },
  100. {
  101. .size = HFI_DMM_CONFIG_CMD_SIZE,
  102. .type = HFI_CMD_SESSION_CVP_DMM_CONFIG,
  103. .buf_offset = 0,
  104. .buf_num = 0,
  105. .resp = HAL_SESSION_DMM_CONFIG_CMD_DONE,
  106. },
  107. {
  108. .size = 0xFFFFFFFF,
  109. .type = HFI_CMD_SESSION_CVP_DMM_PARAMS,
  110. .buf_offset = 0,
  111. .buf_num = 0,
  112. .resp = HAL_SESSION_DMM_PARAMS_CMD_DONE,
  113. },
  114. {
  115. .size = HFI_DMM_FRAME_CMD_SIZE,
  116. .type = HFI_CMD_SESSION_CVP_DMM_FRAME,
  117. .buf_offset = HFI_DMM_FRAME_BUFFERS_OFFSET,
  118. .buf_num = HFI_DMM_BUF_NUM,
  119. .resp = HAL_NO_RESP,
  120. },
  121. {
  122. .size = HFI_PERSIST_CMD_SIZE,
  123. .type = HFI_CMD_SESSION_CVP_SET_PERSIST_BUFFERS,
  124. .buf_offset = HFI_PERSIST_BUFFERS_OFFSET,
  125. .buf_num = HFI_PERSIST_BUF_NUM,
  126. .resp = HAL_SESSION_PERSIST_SET_DONE,
  127. },
  128. {
  129. .size = 0xffffffff,
  130. .type = HFI_CMD_SESSION_CVP_RELEASE_PERSIST_BUFFERS,
  131. .buf_offset = 0,
  132. .buf_num = 0,
  133. .resp = HAL_SESSION_PERSIST_REL_DONE,
  134. },
  135. {
  136. .size = HFI_DS_CMD_SIZE,
  137. .type = HFI_CMD_SESSION_CVP_DS,
  138. .buf_offset = HFI_DS_BUFFERS_OFFSET,
  139. .buf_num = HFI_DS_BUF_NUM,
  140. .resp = HAL_NO_RESP,
  141. },
  142. {
  143. .size = HFI_OF_CONFIG_CMD_SIZE,
  144. .type = HFI_CMD_SESSION_CVP_CV_TME_CONFIG,
  145. .buf_offset = 0,
  146. .buf_num = 0,
  147. .resp = HAL_SESSION_TME_CONFIG_CMD_DONE,
  148. },
  149. {
  150. .size = HFI_OF_FRAME_CMD_SIZE,
  151. .type = HFI_CMD_SESSION_CVP_CV_TME_FRAME,
  152. .buf_offset = HFI_OF_BUFFERS_OFFSET,
  153. .buf_num = HFI_OF_BUF_NUM,
  154. .resp = HAL_NO_RESP,
  155. },
  156. {
  157. .size = HFI_ODT_CONFIG_CMD_SIZE,
  158. .type = HFI_CMD_SESSION_CVP_CV_ODT_CONFIG,
  159. .buf_offset = 0,
  160. .buf_num = 0,
  161. .resp = HAL_SESSION_ODT_CONFIG_CMD_DONE,
  162. },
  163. {
  164. .size = HFI_ODT_FRAME_CMD_SIZE,
  165. .type = HFI_CMD_SESSION_CVP_CV_ODT_FRAME,
  166. .buf_offset = HFI_ODT_BUFFERS_OFFSET,
  167. .buf_num = HFI_ODT_BUF_NUM,
  168. .resp = HAL_NO_RESP,
  169. },
  170. {
  171. .size = HFI_OD_CONFIG_CMD_SIZE,
  172. .type = HFI_CMD_SESSION_CVP_CV_OD_CONFIG,
  173. .buf_offset = 0,
  174. .buf_num = 0,
  175. .resp = HAL_SESSION_OD_CONFIG_CMD_DONE,
  176. },
  177. {
  178. .size = HFI_OD_FRAME_CMD_SIZE,
  179. .type = HFI_CMD_SESSION_CVP_CV_OD_FRAME,
  180. .buf_offset = HFI_OD_BUFFERS_OFFSET,
  181. .buf_num = HFI_OD_BUF_NUM,
  182. .resp = HAL_NO_RESP,
  183. },
  184. {
  185. .size = HFI_NCC_CONFIG_CMD_SIZE,
  186. .type = HFI_CMD_SESSION_CVP_NCC_CONFIG,
  187. .buf_offset = 0,
  188. .buf_num = 0,
  189. .resp = HAL_SESSION_NCC_CONFIG_CMD_DONE,
  190. },
  191. {
  192. .size = HFI_NCC_FRAME_CMD_SIZE,
  193. .type = HFI_CMD_SESSION_CVP_NCC_FRAME,
  194. .buf_offset = HFI_NCC_BUFFERS_OFFSET,
  195. .buf_num = HFI_NCC_BUF_NUM,
  196. .resp = HAL_NO_RESP,
  197. },
  198. {
  199. .size = HFI_ICA_CONFIG_CMD_SIZE,
  200. .type = HFI_CMD_SESSION_CVP_ICA_CONFIG,
  201. .buf_offset = 0,
  202. .buf_num = 0,
  203. .resp = HAL_SESSION_ICA_CONFIG_CMD_DONE,
  204. },
  205. {
  206. .size = HFI_ICA_FRAME_CMD_SIZE,
  207. .type = HFI_CMD_SESSION_CVP_ICA_FRAME,
  208. .buf_offset = HFI_ICA_BUFFERS_OFFSET,
  209. .buf_num = HFI_ICA_BUF_NUM,
  210. .resp = HAL_NO_RESP,
  211. },
  212. {
  213. .size = HFI_HCD_CONFIG_CMD_SIZE,
  214. .type = HFI_CMD_SESSION_CVP_HCD_CONFIG,
  215. .buf_offset = 0,
  216. .buf_num = 0,
  217. .resp = HAL_SESSION_HCD_CONFIG_CMD_DONE,
  218. },
  219. {
  220. .size = HFI_HCD_FRAME_CMD_SIZE,
  221. .type = HFI_CMD_SESSION_CVP_HCD_FRAME,
  222. .buf_offset = HFI_HCD_BUFFERS_OFFSET,
  223. .buf_num = HFI_HCD_BUF_NUM,
  224. .resp = HAL_NO_RESP,
  225. },
  226. {
  227. .size = HFI_DCM_CONFIG_CMD_SIZE,
  228. .type = HFI_CMD_SESSION_CVP_DC_CONFIG,
  229. .buf_offset = 0,
  230. .buf_num = 0,
  231. .resp = HAL_SESSION_DC_CONFIG_CMD_DONE,
  232. },
  233. {
  234. .size = HFI_DCM_FRAME_CMD_SIZE,
  235. .type = HFI_CMD_SESSION_CVP_DC_FRAME,
  236. .buf_offset = HFI_DCM_BUFFERS_OFFSET,
  237. .buf_num = HFI_DCM_BUF_NUM,
  238. .resp = HAL_NO_RESP,
  239. },
  240. {
  241. .size = HFI_DCM_CONFIG_CMD_SIZE,
  242. .type = HFI_CMD_SESSION_CVP_DCM_CONFIG,
  243. .buf_offset = 0,
  244. .buf_num = 0,
  245. .resp = HAL_SESSION_DCM_CONFIG_CMD_DONE,
  246. },
  247. {
  248. .size = HFI_DCM_FRAME_CMD_SIZE,
  249. .type = HFI_CMD_SESSION_CVP_DCM_FRAME,
  250. .buf_offset = HFI_DCM_BUFFERS_OFFSET,
  251. .buf_num = HFI_DCM_BUF_NUM,
  252. .resp = HAL_NO_RESP,
  253. },
  254. {
  255. .size = HFI_PYS_HCD_CONFIG_CMD_SIZE,
  256. .type = HFI_CMD_SESSION_CVP_PYS_HCD_CONFIG,
  257. .buf_offset = 0,
  258. .buf_num = 0,
  259. .resp = HAL_SESSION_PYS_HCD_CONFIG_CMD_DONE,
  260. },
  261. {
  262. .size = HFI_PYS_HCD_FRAME_CMD_SIZE,
  263. .type = HFI_CMD_SESSION_CVP_PYS_HCD_FRAME,
  264. .buf_offset = HFI_PYS_HCD_BUFFERS_OFFSET,
  265. .buf_num = HFI_PYS_HCD_BUF_NUM,
  266. .resp = HAL_NO_RESP,
  267. },
  268. {
  269. .size = 0xFFFFFFFF,
  270. .type = HFI_CMD_SESSION_CVP_SET_MODEL_BUFFERS,
  271. .buf_offset = 0,
  272. .buf_num = 0,
  273. .resp = HAL_SESSION_MODEL_BUF_CMD_DONE,
  274. },
  275. {
  276. .size = 0xFFFFFFFF,
  277. .type = HFI_CMD_SESSION_CVP_FD_CONFIG,
  278. .buf_offset = 0,
  279. .buf_num = 0,
  280. .resp = HAL_SESSION_FD_CONFIG_CMD_DONE,
  281. },
  282. {
  283. .size = 0xFFFFFFFF,
  284. .type = HFI_CMD_SESSION_CVP_FD_FRAME,
  285. .buf_offset = 0,
  286. .buf_num = 0,
  287. .resp = HAL_NO_RESP,
  288. },
  289. };
  290. struct cvp_tzbsp_memprot {
  291. u32 cp_start;
  292. u32 cp_size;
  293. u32 cp_nonpixel_start;
  294. u32 cp_nonpixel_size;
  295. };
  296. #define TZBSP_PIL_SET_STATE 0xA
  297. #define TZBSP_CVP_PAS_ID 26
  298. /* Poll interval in uS */
  299. #define POLL_INTERVAL_US 50
  300. enum tzbsp_subsys_state {
  301. TZ_SUBSYS_STATE_SUSPEND = 0,
  302. TZ_SUBSYS_STATE_RESUME = 1,
  303. TZ_SUBSYS_STATE_RESTORE_THRESHOLD = 2,
  304. };
  305. const struct msm_cvp_gov_data CVP_DEFAULT_BUS_VOTE = {
  306. .data = NULL,
  307. .data_count = 0,
  308. };
  309. const int cvp_max_packets = 32;
  310. static void iris_hfi_pm_handler(struct work_struct *work);
  311. static DECLARE_DELAYED_WORK(iris_hfi_pm_work, iris_hfi_pm_handler);
  312. static inline int __resume(struct iris_hfi_device *device);
  313. static inline int __suspend(struct iris_hfi_device *device);
  314. static int __disable_regulators(struct iris_hfi_device *device);
  315. static int __enable_regulators(struct iris_hfi_device *device);
  316. static inline int __prepare_enable_clks(struct iris_hfi_device *device);
  317. static inline void __disable_unprepare_clks(struct iris_hfi_device *device);
  318. static void __flush_debug_queue(struct iris_hfi_device *device, u8 *packet);
  319. static int __initialize_packetization(struct iris_hfi_device *device);
  320. static struct cvp_hal_session *__get_session(struct iris_hfi_device *device,
  321. u32 session_id);
  322. static bool __is_session_valid(struct iris_hfi_device *device,
  323. struct cvp_hal_session *session, const char *func);
  324. static int __set_clocks(struct iris_hfi_device *device, u32 freq);
  325. static int __iface_cmdq_write(struct iris_hfi_device *device,
  326. void *pkt);
  327. static int __load_fw(struct iris_hfi_device *device);
  328. static void __unload_fw(struct iris_hfi_device *device);
  329. static int __tzbsp_set_cvp_state(enum tzbsp_subsys_state state);
  330. static int __enable_subcaches(struct iris_hfi_device *device);
  331. static int __set_subcaches(struct iris_hfi_device *device);
  332. static int __release_subcaches(struct iris_hfi_device *device);
  333. static int __disable_subcaches(struct iris_hfi_device *device);
  334. static int __power_collapse(struct iris_hfi_device *device, bool force);
  335. static int iris_hfi_noc_error_info(void *dev);
  336. static void interrupt_init_iris2(struct iris_hfi_device *device);
  337. static void setup_dsp_uc_memmap_vpu5(struct iris_hfi_device *device);
  338. static void clock_config_on_enable_vpu5(struct iris_hfi_device *device);
  339. static int reset_ahb2axi_bridge(struct iris_hfi_device *device);
  340. static void power_off_iris2(struct iris_hfi_device *device);
  341. static int __set_ubwc_config(struct iris_hfi_device *device);
  342. static void __noc_error_info_iris2(struct iris_hfi_device *device);
  343. static int __enable_hw_power_collapse(struct iris_hfi_device *device);
  344. static struct iris_hfi_vpu_ops iris2_ops = {
  345. .interrupt_init = interrupt_init_iris2,
  346. .setup_dsp_uc_memmap = setup_dsp_uc_memmap_vpu5,
  347. .clock_config_on_enable = clock_config_on_enable_vpu5,
  348. .reset_ahb2axi_bridge = reset_ahb2axi_bridge,
  349. .power_off = power_off_iris2,
  350. .noc_error_info = __noc_error_info_iris2,
  351. };
  352. /**
  353. * Utility function to enforce some of our assumptions. Spam calls to this
  354. * in hotspots in code to double check some of the assumptions that we hold.
  355. */
  356. static inline void __strict_check(struct iris_hfi_device *device)
  357. {
  358. msm_cvp_res_handle_fatal_hw_error(device->res,
  359. !mutex_is_locked(&device->lock));
  360. }
  361. static inline void __set_state(struct iris_hfi_device *device,
  362. enum iris_hfi_state state)
  363. {
  364. device->state = state;
  365. }
  366. static inline bool __core_in_valid_state(struct iris_hfi_device *device)
  367. {
  368. return device->state != IRIS_STATE_DEINIT;
  369. }
  370. static inline bool is_sys_cache_present(struct iris_hfi_device *device)
  371. {
  372. return device->res->sys_cache_present;
  373. }
  374. #define ROW_SIZE 32
  375. int get_pkt_index(struct cvp_hal_session_cmd_pkt *hdr)
  376. {
  377. int i, pkt_num = ARRAY_SIZE(cvp_hfi_defs);
  378. for (i = 0; i < pkt_num; i++)
  379. if (cvp_hfi_defs[i].type == hdr->packet_type)
  380. return i;
  381. return -EINVAL;
  382. }
  383. int get_hfi_version(void)
  384. {
  385. struct msm_cvp_core *core;
  386. struct iris_hfi_device *hfi;
  387. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  388. hfi = (struct iris_hfi_device *)core->device->hfi_device_data;
  389. return hfi->version;
  390. }
  391. unsigned int get_msg_size(struct cvp_hfi_msg_session_hdr *hdr)
  392. {
  393. struct msm_cvp_core *core;
  394. struct iris_hfi_device *device;
  395. u32 minor_ver;
  396. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  397. if (core)
  398. device = core->device->hfi_device_data;
  399. else
  400. return 0;
  401. if (!device) {
  402. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  403. return 0;
  404. }
  405. minor_ver = (device->version & HFI_VERSION_MINOR_MASK) >>
  406. HFI_VERSION_MINOR_SHIFT;
  407. if (minor_ver < 2)
  408. return sizeof(struct cvp_hfi_msg_session_hdr);
  409. if (hdr->packet_type == HFI_MSG_SESSION_CVP_FD)
  410. return sizeof(struct cvp_hfi_msg_session_hdr_ext);
  411. else
  412. return sizeof(struct cvp_hfi_msg_session_hdr);
  413. }
  414. unsigned int get_msg_session_id(void *msg)
  415. {
  416. struct cvp_hfi_msg_session_hdr *hdr =
  417. (struct cvp_hfi_msg_session_hdr *)msg;
  418. return hdr->session_id;
  419. }
  420. unsigned int get_msg_errorcode(void *msg)
  421. {
  422. struct cvp_hfi_msg_session_hdr *hdr =
  423. (struct cvp_hfi_msg_session_hdr *)msg;
  424. return hdr->error_type;
  425. }
  426. int get_msg_opconfigs(void *msg, unsigned int *session_id,
  427. unsigned int *error_type, unsigned int *config_id)
  428. {
  429. struct cvp_hfi_msg_session_op_cfg_packet *cfg =
  430. (struct cvp_hfi_msg_session_op_cfg_packet *)msg;
  431. *session_id = cfg->session_id;
  432. *error_type = cfg->error_type;
  433. *config_id = cfg->op_conf_id;
  434. return 0;
  435. }
  436. int get_signal_from_pkt_type(unsigned int type)
  437. {
  438. int i, pkt_num = ARRAY_SIZE(cvp_hfi_defs);
  439. for (i = 0; i < pkt_num; i++)
  440. if (cvp_hfi_defs[i].type == type)
  441. return cvp_hfi_defs[i].resp;
  442. return -EINVAL;
  443. }
  444. static void __dump_packet(u8 *packet, enum cvp_msg_prio log_level)
  445. {
  446. u32 c = 0, packet_size = *(u32 *)packet;
  447. /*
  448. * row must contain enough for 0xdeadbaad * 8 to be converted into
  449. * "de ad ba ab " * 8 + '\0'
  450. */
  451. char row[3 * ROW_SIZE];
  452. for (c = 0; c * ROW_SIZE < packet_size; ++c) {
  453. int bytes_to_read = ((c + 1) * ROW_SIZE > packet_size) ?
  454. packet_size % ROW_SIZE : ROW_SIZE;
  455. hex_dump_to_buffer(packet + c * ROW_SIZE, bytes_to_read,
  456. ROW_SIZE, 4, row, sizeof(row), false);
  457. dprintk(log_level, "%s\n", row);
  458. }
  459. }
  460. static int __dsp_suspend(struct iris_hfi_device *device, bool force, u32 flags)
  461. {
  462. int rc;
  463. struct cvp_hal_session *temp;
  464. if (msm_cvp_dsp_disable)
  465. return 0;
  466. list_for_each_entry(temp, &device->sess_head, list) {
  467. /* if forceful suspend, don't check session pause info */
  468. if (force)
  469. continue;
  470. /* don't suspend if cvp session is not paused */
  471. if (!(temp->flags & SESSION_PAUSE)) {
  472. dprintk(CVP_DSP,
  473. "%s: cvp session %x not paused\n",
  474. __func__, hash32_ptr(temp));
  475. return -EBUSY;
  476. }
  477. }
  478. dprintk(CVP_DSP, "%s: suspend dsp\n", __func__);
  479. rc = cvp_dsp_suspend(flags);
  480. if (rc) {
  481. dprintk(CVP_ERR, "%s: dsp suspend failed with error %d\n",
  482. __func__, rc);
  483. return -EINVAL;
  484. }
  485. dprintk(CVP_DSP, "%s: dsp suspended\n", __func__);
  486. return 0;
  487. }
  488. static int __dsp_resume(struct iris_hfi_device *device, u32 flags)
  489. {
  490. int rc;
  491. if (msm_cvp_dsp_disable)
  492. return 0;
  493. dprintk(CVP_DSP, "%s: resume dsp\n", __func__);
  494. rc = cvp_dsp_resume(flags);
  495. if (rc) {
  496. dprintk(CVP_ERR,
  497. "%s: dsp resume failed with error %d\n",
  498. __func__, rc);
  499. return rc;
  500. }
  501. dprintk(CVP_DSP, "%s: dsp resumed\n", __func__);
  502. return rc;
  503. }
  504. static int __dsp_shutdown(struct iris_hfi_device *device, u32 flags)
  505. {
  506. int rc;
  507. if (msm_cvp_dsp_disable)
  508. return 0;
  509. dprintk(CVP_DSP, "%s: shutdown dsp\n", __func__);
  510. rc = cvp_dsp_shutdown(flags);
  511. if (rc) {
  512. dprintk(CVP_ERR,
  513. "%s: dsp shutdown failed with error %d\n",
  514. __func__, rc);
  515. WARN_ON(1);
  516. }
  517. dprintk(CVP_DSP, "%s: dsp shutdown successful\n", __func__);
  518. return rc;
  519. }
  520. static int __acquire_regulator(struct regulator_info *rinfo,
  521. struct iris_hfi_device *device)
  522. {
  523. int rc = 0;
  524. if (rinfo->has_hw_power_collapse) {
  525. rc = regulator_set_mode(rinfo->regulator,
  526. REGULATOR_MODE_NORMAL);
  527. if (rc) {
  528. /*
  529. * This is somewhat fatal, but nothing we can do
  530. * about it. We can't disable the regulator w/o
  531. * getting it back under s/w control
  532. */
  533. dprintk(CVP_WARN,
  534. "Failed to acquire regulator control: %s\n",
  535. rinfo->name);
  536. } else {
  537. dprintk(CVP_PWR,
  538. "Acquire regulator control from HW: %s\n",
  539. rinfo->name);
  540. }
  541. }
  542. if (!regulator_is_enabled(rinfo->regulator)) {
  543. dprintk(CVP_WARN, "Regulator is not enabled %s\n",
  544. rinfo->name);
  545. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  546. }
  547. return rc;
  548. }
  549. static int __hand_off_regulator(struct regulator_info *rinfo)
  550. {
  551. int rc = 0;
  552. if (rinfo->has_hw_power_collapse) {
  553. rc = regulator_set_mode(rinfo->regulator,
  554. REGULATOR_MODE_FAST);
  555. if (rc) {
  556. dprintk(CVP_WARN,
  557. "Failed to hand off regulator control: %s\n",
  558. rinfo->name);
  559. } else {
  560. dprintk(CVP_PWR,
  561. "Hand off regulator control to HW: %s\n",
  562. rinfo->name);
  563. }
  564. }
  565. return rc;
  566. }
  567. static int __hand_off_regulators(struct iris_hfi_device *device)
  568. {
  569. struct regulator_info *rinfo;
  570. int rc = 0, c = 0;
  571. iris_hfi_for_each_regulator(device, rinfo) {
  572. rc = __hand_off_regulator(rinfo);
  573. /*
  574. * If one regulator hand off failed, driver should take
  575. * the control for other regulators back.
  576. */
  577. if (rc)
  578. goto err_reg_handoff_failed;
  579. c++;
  580. }
  581. return rc;
  582. err_reg_handoff_failed:
  583. iris_hfi_for_each_regulator_reverse_continue(device, rinfo, c)
  584. __acquire_regulator(rinfo, device);
  585. return rc;
  586. }
  587. static int __write_queue(struct cvp_iface_q_info *qinfo, u8 *packet,
  588. bool *rx_req_is_set)
  589. {
  590. struct cvp_hfi_queue_header *queue;
  591. u32 packet_size_in_words, new_write_idx;
  592. u32 empty_space, read_idx, write_idx;
  593. u32 *write_ptr;
  594. if (!qinfo || !packet) {
  595. dprintk(CVP_ERR, "Invalid Params\n");
  596. return -EINVAL;
  597. } else if (!qinfo->q_array.align_virtual_addr) {
  598. dprintk(CVP_WARN, "Queues have already been freed\n");
  599. return -EINVAL;
  600. }
  601. queue = (struct cvp_hfi_queue_header *) qinfo->q_hdr;
  602. if (!queue) {
  603. dprintk(CVP_ERR, "queue not present\n");
  604. return -ENOENT;
  605. }
  606. if (msm_cvp_debug & CVP_PKT) {
  607. dprintk(CVP_PKT, "%s: %pK\n", __func__, qinfo);
  608. __dump_packet(packet, CVP_PKT);
  609. }
  610. packet_size_in_words = (*(u32 *)packet) >> 2;
  611. if (!packet_size_in_words || packet_size_in_words >
  612. qinfo->q_array.mem_size>>2) {
  613. dprintk(CVP_ERR, "Invalid packet size\n");
  614. return -ENODATA;
  615. }
  616. spin_lock(&qinfo->hfi_lock);
  617. read_idx = queue->qhdr_read_idx;
  618. write_idx = queue->qhdr_write_idx;
  619. empty_space = (write_idx >= read_idx) ?
  620. ((qinfo->q_array.mem_size>>2) - (write_idx - read_idx)) :
  621. (read_idx - write_idx);
  622. if (empty_space <= packet_size_in_words) {
  623. queue->qhdr_tx_req = 1;
  624. spin_unlock(&qinfo->hfi_lock);
  625. dprintk(CVP_ERR, "Insufficient size (%d) to write (%d)\n",
  626. empty_space, packet_size_in_words);
  627. return -ENOTEMPTY;
  628. }
  629. queue->qhdr_tx_req = 0;
  630. new_write_idx = write_idx + packet_size_in_words;
  631. write_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) +
  632. (write_idx << 2));
  633. if (write_ptr < (u32 *)qinfo->q_array.align_virtual_addr ||
  634. write_ptr > (u32 *)(qinfo->q_array.align_virtual_addr +
  635. qinfo->q_array.mem_size)) {
  636. spin_unlock(&qinfo->hfi_lock);
  637. dprintk(CVP_ERR, "Invalid write index\n");
  638. return -ENODATA;
  639. }
  640. if (new_write_idx < (qinfo->q_array.mem_size >> 2)) {
  641. memcpy(write_ptr, packet, packet_size_in_words << 2);
  642. } else {
  643. new_write_idx -= qinfo->q_array.mem_size >> 2;
  644. memcpy(write_ptr, packet, (packet_size_in_words -
  645. new_write_idx) << 2);
  646. memcpy((void *)qinfo->q_array.align_virtual_addr,
  647. packet + ((packet_size_in_words - new_write_idx) << 2),
  648. new_write_idx << 2);
  649. }
  650. /*
  651. * Memory barrier to make sure packet is written before updating the
  652. * write index
  653. */
  654. mb();
  655. queue->qhdr_write_idx = new_write_idx;
  656. if (rx_req_is_set)
  657. *rx_req_is_set = queue->qhdr_rx_req == 1;
  658. /*
  659. * Memory barrier to make sure write index is updated before an
  660. * interrupt is raised.
  661. */
  662. mb();
  663. spin_unlock(&qinfo->hfi_lock);
  664. return 0;
  665. }
  666. static int __read_queue(struct cvp_iface_q_info *qinfo, u8 *packet,
  667. u32 *pb_tx_req_is_set)
  668. {
  669. struct cvp_hfi_queue_header *queue;
  670. u32 packet_size_in_words, new_read_idx;
  671. u32 *read_ptr;
  672. u32 receive_request = 0;
  673. u32 read_idx, write_idx;
  674. int rc = 0;
  675. if (!qinfo || !packet || !pb_tx_req_is_set) {
  676. dprintk(CVP_ERR, "Invalid Params\n");
  677. return -EINVAL;
  678. } else if (!qinfo->q_array.align_virtual_addr) {
  679. dprintk(CVP_WARN, "Queues have already been freed\n");
  680. return -EINVAL;
  681. }
  682. /*
  683. * Memory barrier to make sure data is valid before
  684. *reading it
  685. */
  686. mb();
  687. queue = (struct cvp_hfi_queue_header *) qinfo->q_hdr;
  688. if (!queue) {
  689. dprintk(CVP_ERR, "Queue memory is not allocated\n");
  690. return -ENOMEM;
  691. }
  692. /*
  693. * Do not set receive request for debug queue, if set,
  694. * Iris generates interrupt for debug messages even
  695. * when there is no response message available.
  696. * In general debug queue will not become full as it
  697. * is being emptied out for every interrupt from Iris.
  698. * Iris will anyway generates interrupt if it is full.
  699. */
  700. spin_lock(&qinfo->hfi_lock);
  701. if (queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_MSG_Q)
  702. receive_request = 1;
  703. read_idx = queue->qhdr_read_idx;
  704. write_idx = queue->qhdr_write_idx;
  705. if (read_idx == write_idx) {
  706. queue->qhdr_rx_req = receive_request;
  707. /*
  708. * mb() to ensure qhdr is updated in main memory
  709. * so that iris reads the updated header values
  710. */
  711. mb();
  712. *pb_tx_req_is_set = 0;
  713. if (write_idx != queue->qhdr_write_idx) {
  714. queue->qhdr_rx_req = 0;
  715. } else {
  716. spin_unlock(&qinfo->hfi_lock);
  717. dprintk(CVP_HFI,
  718. "%s queue is empty, rx_req = %u, tx_req = %u, read_idx = %u\n",
  719. receive_request ? "message" : "debug",
  720. queue->qhdr_rx_req, queue->qhdr_tx_req,
  721. queue->qhdr_read_idx);
  722. return -ENODATA;
  723. }
  724. }
  725. read_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) +
  726. (read_idx << 2));
  727. if (read_ptr < (u32 *)qinfo->q_array.align_virtual_addr ||
  728. read_ptr > (u32 *)(qinfo->q_array.align_virtual_addr +
  729. qinfo->q_array.mem_size - sizeof(*read_ptr))) {
  730. spin_unlock(&qinfo->hfi_lock);
  731. dprintk(CVP_ERR, "Invalid read index\n");
  732. return -ENODATA;
  733. }
  734. packet_size_in_words = (*read_ptr) >> 2;
  735. if (!packet_size_in_words) {
  736. spin_unlock(&qinfo->hfi_lock);
  737. dprintk(CVP_ERR, "Zero packet size\n");
  738. return -ENODATA;
  739. }
  740. new_read_idx = read_idx + packet_size_in_words;
  741. if (((packet_size_in_words << 2) <= CVP_IFACEQ_VAR_HUGE_PKT_SIZE)
  742. && read_idx <= (qinfo->q_array.mem_size >> 2)) {
  743. if (new_read_idx < (qinfo->q_array.mem_size >> 2)) {
  744. memcpy(packet, read_ptr,
  745. packet_size_in_words << 2);
  746. } else {
  747. new_read_idx -= (qinfo->q_array.mem_size >> 2);
  748. memcpy(packet, read_ptr,
  749. (packet_size_in_words - new_read_idx) << 2);
  750. memcpy(packet + ((packet_size_in_words -
  751. new_read_idx) << 2),
  752. (u8 *)qinfo->q_array.align_virtual_addr,
  753. new_read_idx << 2);
  754. }
  755. } else {
  756. dprintk(CVP_WARN,
  757. "BAD packet received, read_idx: %#x, pkt_size: %d\n",
  758. read_idx, packet_size_in_words << 2);
  759. dprintk(CVP_WARN, "Dropping this packet\n");
  760. new_read_idx = write_idx;
  761. rc = -ENODATA;
  762. }
  763. if (new_read_idx != queue->qhdr_write_idx)
  764. queue->qhdr_rx_req = 0;
  765. else
  766. queue->qhdr_rx_req = receive_request;
  767. queue->qhdr_read_idx = new_read_idx;
  768. /*
  769. * mb() to ensure qhdr is updated in main memory
  770. * so that iris reads the updated header values
  771. */
  772. mb();
  773. *pb_tx_req_is_set = (queue->qhdr_tx_req == 1) ? 1 : 0;
  774. spin_unlock(&qinfo->hfi_lock);
  775. if ((msm_cvp_debug & CVP_PKT) &&
  776. !(queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q)) {
  777. dprintk(CVP_PKT, "%s: %pK\n", __func__, qinfo);
  778. __dump_packet(packet, CVP_PKT);
  779. }
  780. return rc;
  781. }
  782. static int __smem_alloc(struct iris_hfi_device *dev, struct cvp_mem_addr *mem,
  783. u32 size, u32 align, u32 flags)
  784. {
  785. struct msm_cvp_smem *alloc = &mem->mem_data;
  786. int rc = 0;
  787. if (!dev || !mem || !size) {
  788. dprintk(CVP_ERR, "Invalid Params\n");
  789. return -EINVAL;
  790. }
  791. dprintk(CVP_INFO, "start to alloc size: %d, flags: %d\n", size, flags);
  792. alloc->flags = flags;
  793. rc = msm_cvp_smem_alloc(size, align, 1, (void *)dev->res, alloc);
  794. if (rc) {
  795. dprintk(CVP_ERR, "Alloc failed\n");
  796. rc = -ENOMEM;
  797. goto fail_smem_alloc;
  798. }
  799. dprintk(CVP_MEM, "%s: ptr = %pK, size = %d\n", __func__,
  800. alloc->kvaddr, size);
  801. mem->mem_size = alloc->size;
  802. mem->align_virtual_addr = alloc->kvaddr;
  803. mem->align_device_addr = alloc->device_addr;
  804. return rc;
  805. fail_smem_alloc:
  806. return rc;
  807. }
  808. static void __smem_free(struct iris_hfi_device *dev, struct msm_cvp_smem *mem)
  809. {
  810. if (!dev || !mem) {
  811. dprintk(CVP_ERR, "invalid param %pK %pK\n", dev, mem);
  812. return;
  813. }
  814. msm_cvp_smem_free(mem);
  815. }
  816. static void __write_register(struct iris_hfi_device *device,
  817. u32 reg, u32 value)
  818. {
  819. u32 hwiosymaddr = reg;
  820. u8 *base_addr;
  821. if (!device) {
  822. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  823. return;
  824. }
  825. __strict_check(device);
  826. if (!device->power_enabled) {
  827. dprintk(CVP_WARN,
  828. "HFI Write register failed : Power is OFF\n");
  829. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  830. return;
  831. }
  832. base_addr = device->cvp_hal_data->register_base;
  833. dprintk(CVP_REG, "Base addr: %pK, written to: %#x, Value: %#x...\n",
  834. base_addr, hwiosymaddr, value);
  835. base_addr += hwiosymaddr;
  836. writel_relaxed(value, base_addr);
  837. /*
  838. * Memory barrier to make sure value is written into the register.
  839. */
  840. wmb();
  841. }
  842. static int __read_register(struct iris_hfi_device *device, u32 reg)
  843. {
  844. int rc = 0;
  845. u8 *base_addr;
  846. if (!device) {
  847. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  848. return -EINVAL;
  849. }
  850. __strict_check(device);
  851. if (!device->power_enabled) {
  852. dprintk(CVP_WARN,
  853. "HFI Read register failed : Power is OFF\n");
  854. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  855. return -EINVAL;
  856. }
  857. base_addr = device->cvp_hal_data->register_base;
  858. rc = readl_relaxed(base_addr + reg);
  859. /*
  860. * Memory barrier to make sure value is read correctly from the
  861. * register.
  862. */
  863. rmb();
  864. dprintk(CVP_REG, "Base addr: %pK, read from: %#x, value: %#x...\n",
  865. base_addr, reg, rc);
  866. return rc;
  867. }
  868. static void __set_registers(struct iris_hfi_device *device)
  869. {
  870. struct reg_set *reg_set;
  871. int i;
  872. if (!device->res) {
  873. dprintk(CVP_ERR,
  874. "device resources null, cannot set registers\n");
  875. return;
  876. }
  877. reg_set = &device->res->reg_set;
  878. for (i = 0; i < reg_set->count; i++) {
  879. __write_register(device, reg_set->reg_tbl[i].reg,
  880. reg_set->reg_tbl[i].value);
  881. dprintk(CVP_REG, "write_reg offset=%x, val=%x\n",
  882. reg_set->reg_tbl[i].reg,
  883. reg_set->reg_tbl[i].value);
  884. }
  885. }
  886. /*
  887. * The existence of this function is a hack for 8996 (or certain Iris versions)
  888. * to overcome a hardware bug. Whenever the GDSCs momentarily power collapse
  889. * (after calling __hand_off_regulators()), the values of the threshold
  890. * registers (typically programmed by TZ) are incorrectly reset. As a result
  891. * reprogram these registers at certain agreed upon points.
  892. */
  893. static void __set_threshold_registers(struct iris_hfi_device *device)
  894. {
  895. u32 version = __read_register(device, CVP_WRAPPER_HW_VERSION);
  896. version &= ~GENMASK(15, 0);
  897. if (version != (0x3 << 28 | 0x43 << 16))
  898. return;
  899. if (__tzbsp_set_cvp_state(TZ_SUBSYS_STATE_RESTORE_THRESHOLD))
  900. dprintk(CVP_ERR, "Failed to restore threshold values\n");
  901. }
  902. static int __unvote_buses(struct iris_hfi_device *device)
  903. {
  904. int rc = 0;
  905. struct bus_info *bus = NULL;
  906. kfree(device->bus_vote.data);
  907. device->bus_vote.data = NULL;
  908. device->bus_vote.data_count = 0;
  909. iris_hfi_for_each_bus(device, bus) {
  910. rc = icc_set_bw(bus->client, 0, 0);
  911. if (rc) {
  912. dprintk(CVP_ERR,
  913. "%s: Failed unvoting bus\n", __func__);
  914. goto err_unknown_device;
  915. }
  916. }
  917. err_unknown_device:
  918. return rc;
  919. }
  920. static int __vote_buses(struct iris_hfi_device *device,
  921. struct cvp_bus_vote_data *data, int num_data)
  922. {
  923. int rc = 0;
  924. struct bus_info *bus = NULL;
  925. struct cvp_bus_vote_data *new_data = NULL;
  926. if (!num_data) {
  927. dprintk(CVP_PWR, "No vote data available\n");
  928. goto no_data_count;
  929. } else if (!data) {
  930. dprintk(CVP_ERR, "Invalid voting data\n");
  931. return -EINVAL;
  932. }
  933. new_data = kmemdup(data, num_data * sizeof(*new_data), GFP_KERNEL);
  934. if (!new_data) {
  935. dprintk(CVP_ERR, "Can't alloc memory to cache bus votes\n");
  936. rc = -ENOMEM;
  937. goto err_no_mem;
  938. }
  939. no_data_count:
  940. kfree(device->bus_vote.data);
  941. device->bus_vote.data = new_data;
  942. device->bus_vote.data_count = num_data;
  943. iris_hfi_for_each_bus(device, bus) {
  944. if (bus) {
  945. rc = icc_set_bw(bus->client, bus->range[1], 0);
  946. if (rc)
  947. dprintk(CVP_ERR,
  948. "Failed voting bus %s to ab %u\n",
  949. bus->name, bus->range[1]*1000);
  950. }
  951. }
  952. err_no_mem:
  953. return rc;
  954. }
  955. static int iris_hfi_vote_buses(void *dev, struct cvp_bus_vote_data *d, int n)
  956. {
  957. int rc = 0;
  958. struct iris_hfi_device *device = dev;
  959. if (!device)
  960. return -EINVAL;
  961. mutex_lock(&device->lock);
  962. rc = __vote_buses(device, d, n);
  963. mutex_unlock(&device->lock);
  964. return rc;
  965. }
  966. static int __core_set_resource(struct iris_hfi_device *device,
  967. struct cvp_resource_hdr *resource_hdr, void *resource_value)
  968. {
  969. struct cvp_hfi_cmd_sys_set_resource_packet *pkt;
  970. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  971. int rc = 0;
  972. if (!device || !resource_hdr || !resource_value) {
  973. dprintk(CVP_ERR, "set_res: Invalid Params\n");
  974. return -EINVAL;
  975. }
  976. pkt = (struct cvp_hfi_cmd_sys_set_resource_packet *) packet;
  977. rc = call_hfi_pkt_op(device, sys_set_resource,
  978. pkt, resource_hdr, resource_value);
  979. if (rc) {
  980. dprintk(CVP_ERR, "set_res: failed to create packet\n");
  981. goto err_create_pkt;
  982. }
  983. rc = __iface_cmdq_write(device, pkt);
  984. if (rc)
  985. rc = -ENOTEMPTY;
  986. err_create_pkt:
  987. return rc;
  988. }
  989. static int __core_release_resource(struct iris_hfi_device *device,
  990. struct cvp_resource_hdr *resource_hdr)
  991. {
  992. struct cvp_hfi_cmd_sys_release_resource_packet *pkt;
  993. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  994. int rc = 0;
  995. if (!device || !resource_hdr) {
  996. dprintk(CVP_ERR, "release_res: Invalid Params\n");
  997. return -EINVAL;
  998. }
  999. pkt = (struct cvp_hfi_cmd_sys_release_resource_packet *) packet;
  1000. rc = call_hfi_pkt_op(device, sys_release_resource,
  1001. pkt, resource_hdr);
  1002. if (rc) {
  1003. dprintk(CVP_ERR, "release_res: failed to create packet\n");
  1004. goto err_create_pkt;
  1005. }
  1006. rc = __iface_cmdq_write(device, pkt);
  1007. if (rc)
  1008. rc = -ENOTEMPTY;
  1009. err_create_pkt:
  1010. return rc;
  1011. }
  1012. static int __tzbsp_set_cvp_state(enum tzbsp_subsys_state state)
  1013. {
  1014. int rc = 0;
  1015. rc = qcom_scm_set_remote_state(state, TZBSP_CVP_PAS_ID);
  1016. dprintk(CVP_CORE, "Set state %d, resp %d\n", state, rc);
  1017. if (rc) {
  1018. dprintk(CVP_ERR, "Failed qcom_scm_set_remote_state %d\n", rc);
  1019. return rc;
  1020. }
  1021. return 0;
  1022. }
  1023. static inline int __boot_firmware(struct iris_hfi_device *device)
  1024. {
  1025. int rc = 0, loop = 10;
  1026. u32 ctrl_init_val = 0, ctrl_status = 0, count = 0, max_tries = 1000;
  1027. u32 reg_gdsc;
  1028. /*
  1029. * Hand off control of regulators to h/w _after_ enabling clocks.
  1030. * Note that the GDSC will turn off when switching from normal
  1031. * (s/w triggered) to fast (HW triggered) unless the h/w vote is
  1032. * present. Since Iris isn't up yet, the GDSC will be off briefly.
  1033. */
  1034. if (__enable_hw_power_collapse(device))
  1035. dprintk(CVP_ERR, "Failed to enabled inter-frame PC\n");
  1036. while (loop) {
  1037. reg_gdsc = __read_register(device, CVP_CC_MVS1_GDSCR);
  1038. if (reg_gdsc & 0x80000000) {
  1039. usleep_range(100, 200);
  1040. loop--;
  1041. } else {
  1042. break;
  1043. }
  1044. }
  1045. if (!loop)
  1046. dprintk(CVP_ERR, "fail to power off CORE during resume\n");
  1047. ctrl_init_val = BIT(0);
  1048. __write_register(device, CVP_CTRL_INIT, ctrl_init_val);
  1049. while (!ctrl_status && count < max_tries) {
  1050. ctrl_status = __read_register(device, CVP_CTRL_STATUS);
  1051. if ((ctrl_status & CVP_CTRL_ERROR_STATUS__M) == 0x4) {
  1052. dprintk(CVP_ERR, "invalid setting for UC_REGION\n");
  1053. rc = -ENODATA;
  1054. break;
  1055. }
  1056. /* Reduce to 1/100th and x100 of max_tries */
  1057. usleep_range(500, 1000);
  1058. count++;
  1059. }
  1060. if (!(ctrl_status & CVP_CTRL_INIT_STATUS__M)) {
  1061. dprintk(CVP_ERR, "Failed to boot FW status: %x\n",
  1062. ctrl_status);
  1063. rc = -ENODEV;
  1064. }
  1065. /* Enable interrupt before sending commands to tensilica */
  1066. __write_register(device, CVP_CPU_CS_H2XSOFTINTEN, 0x1);
  1067. __write_register(device, CVP_CPU_CS_X2RPMh, 0x0);
  1068. return rc;
  1069. }
  1070. static int iris_hfi_resume(void *dev)
  1071. {
  1072. int rc = 0;
  1073. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  1074. if (!device) {
  1075. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  1076. return -EINVAL;
  1077. }
  1078. dprintk(CVP_CORE, "Resuming Iris\n");
  1079. mutex_lock(&device->lock);
  1080. rc = __resume(device);
  1081. mutex_unlock(&device->lock);
  1082. return rc;
  1083. }
  1084. static int iris_hfi_suspend(void *dev)
  1085. {
  1086. int rc = 0;
  1087. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  1088. if (!device) {
  1089. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  1090. return -EINVAL;
  1091. } else if (!device->res->sw_power_collapsible) {
  1092. return -ENOTSUPP;
  1093. }
  1094. dprintk(CVP_CORE, "Suspending Iris\n");
  1095. mutex_lock(&device->lock);
  1096. rc = __power_collapse(device, true);
  1097. if (rc) {
  1098. dprintk(CVP_WARN, "%s: Iris is busy\n", __func__);
  1099. rc = -EBUSY;
  1100. }
  1101. mutex_unlock(&device->lock);
  1102. /* Cancel pending delayed works if any */
  1103. if (!rc)
  1104. cancel_delayed_work(&iris_hfi_pm_work);
  1105. return rc;
  1106. }
  1107. static void cvp_dump_csr(struct iris_hfi_device *dev)
  1108. {
  1109. u32 reg;
  1110. if (!dev)
  1111. return;
  1112. if (!dev->power_enabled || dev->reg_dumped)
  1113. return;
  1114. reg = __read_register(dev, CVP_WRAPPER_CPU_STATUS);
  1115. dprintk(CVP_ERR, "CVP_WRAPPER_CPU_STATUS: %x\n", reg);
  1116. reg = __read_register(dev, CVP_CPU_CS_SCIACMDARG0);
  1117. dprintk(CVP_ERR, "CVP_CPU_CS_SCIACMDARG0: %x\n", reg);
  1118. reg = __read_register(dev, CVP_WRAPPER_CPU_CLOCK_CONFIG);
  1119. dprintk(CVP_ERR, "CVP_WRAPPER_CPU_CLOCK_CONFIG: %x\n", reg);
  1120. reg = __read_register(dev, CVP_WRAPPER_CORE_CLOCK_CONFIG);
  1121. dprintk(CVP_ERR, "CVP_WRAPPER_CORE_CLOCK_CONFIG: %x\n", reg);
  1122. reg = __read_register(dev, CVP_WRAPPER_INTR_STATUS);
  1123. dprintk(CVP_ERR, "CVP_WRAPPER_INTR_STATUS: %x\n", reg);
  1124. reg = __read_register(dev, CVP_CPU_CS_H2ASOFTINT);
  1125. dprintk(CVP_ERR, "CVP_CPU_CS_H2ASOFTINT: %x\n", reg);
  1126. reg = __read_register(dev, CVP_CPU_CS_A2HSOFTINT);
  1127. dprintk(CVP_ERR, "CVP_CPU_CS_A2HSOFTINT: %x\n", reg);
  1128. reg = __read_register(dev, CVP_CC_MVS1C_GDSCR);
  1129. dprintk(CVP_ERR, "CVP_CC_MVS1C_GDSCR: %x\n", reg);
  1130. reg = __read_register(dev, CVP_CC_MVS1C_CBCR);
  1131. dprintk(CVP_ERR, "CVP_CC_MVS1C_CBCR: %x\n", reg);
  1132. dev->reg_dumped = true;
  1133. }
  1134. static int iris_hfi_flush_debug_queue(void *dev)
  1135. {
  1136. int rc = 0;
  1137. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  1138. if (!device) {
  1139. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  1140. return -EINVAL;
  1141. }
  1142. cvp_dump_csr(device);
  1143. mutex_lock(&device->lock);
  1144. if (!device->power_enabled) {
  1145. dprintk(CVP_WARN, "%s: iris power off\n", __func__);
  1146. rc = -EINVAL;
  1147. goto exit;
  1148. }
  1149. __flush_debug_queue(device, NULL);
  1150. exit:
  1151. mutex_unlock(&device->lock);
  1152. return rc;
  1153. }
  1154. static int __set_clocks(struct iris_hfi_device *device, u32 freq)
  1155. {
  1156. struct clock_info *cl;
  1157. int rc = 0;
  1158. int factorsrc2clk = 3; // ratio factor for clock source : clk
  1159. dprintk(CVP_PWR, "%s: entering with freq : %ld\n", __func__, freq);
  1160. iris_hfi_for_each_clock(device, cl) {
  1161. if (cl->has_scaling) {/* has_scaling */
  1162. device->clk_freq = freq;
  1163. if (msm_cvp_clock_voting)
  1164. freq = msm_cvp_clock_voting;
  1165. freq = freq * factorsrc2clk;
  1166. dprintk(CVP_PWR, "%s: clock source rate set to: %ld\n", __func__, freq);
  1167. if (device->mmrm_cvp != NULL) {
  1168. /* set min freq as the value stored as 1st element in the table */
  1169. rc = msm_cvp_mmrm_set_value_in_range(device,
  1170. device->res->allowed_clks_tbl[0].clock_rate * factorsrc2clk,
  1171. freq);
  1172. if (rc) {
  1173. dprintk(CVP_ERR,
  1174. "%s: Failed to set clock rate for %s: %d\n",
  1175. __func__, cl->name, rc);
  1176. return rc;
  1177. }
  1178. } else {
  1179. dprintk(CVP_PWR, "%s: set clock rate with clk_set_rate\n",
  1180. __func__);
  1181. rc = clk_set_rate(cl->clk, freq);
  1182. if (rc) {
  1183. dprintk(CVP_ERR,
  1184. "Failed to set clock rate %u %s: %d %s\n",
  1185. freq, cl->name, rc, __func__);
  1186. return rc;
  1187. }
  1188. dprintk(CVP_PWR, "Scaling clock %s to %u\n",
  1189. cl->name, freq);
  1190. }
  1191. }
  1192. }
  1193. return 0;
  1194. }
  1195. static int iris_hfi_scale_clocks(void *dev, u32 freq)
  1196. {
  1197. int rc = 0;
  1198. struct iris_hfi_device *device = dev;
  1199. if (!device) {
  1200. dprintk(CVP_ERR, "Invalid args: %pK\n", device);
  1201. return -EINVAL;
  1202. }
  1203. mutex_lock(&device->lock);
  1204. if (__resume(device)) {
  1205. dprintk(CVP_ERR, "Resume from power collapse failed\n");
  1206. rc = -ENODEV;
  1207. goto exit;
  1208. }
  1209. rc = __set_clocks(device, freq);
  1210. exit:
  1211. mutex_unlock(&device->lock);
  1212. return rc;
  1213. }
  1214. static int __scale_clocks(struct iris_hfi_device *device)
  1215. {
  1216. int rc = 0;
  1217. struct allowed_clock_rates_table *allowed_clks_tbl = NULL;
  1218. u32 rate = 0;
  1219. allowed_clks_tbl = device->res->allowed_clks_tbl;
  1220. rate = device->clk_freq ? device->clk_freq :
  1221. allowed_clks_tbl[0].clock_rate;
  1222. dprintk(CVP_PWR, "%s: scale clock rate %d\n", __func__, rate);
  1223. rc = __set_clocks(device, rate);
  1224. return rc;
  1225. }
  1226. /* Writes into cmdq without raising an interrupt */
  1227. static int __iface_cmdq_write_relaxed(struct iris_hfi_device *device,
  1228. void *pkt, bool *requires_interrupt)
  1229. {
  1230. struct cvp_iface_q_info *q_info;
  1231. struct cvp_hal_cmd_pkt_hdr *cmd_packet;
  1232. int result = -E2BIG;
  1233. if (!device || !pkt) {
  1234. dprintk(CVP_ERR, "Invalid Params\n");
  1235. return -EINVAL;
  1236. }
  1237. __strict_check(device);
  1238. if (!__core_in_valid_state(device)) {
  1239. dprintk(CVP_ERR, "%s - fw not in init state\n", __func__);
  1240. result = -EINVAL;
  1241. goto err_q_null;
  1242. }
  1243. cmd_packet = (struct cvp_hal_cmd_pkt_hdr *)pkt;
  1244. device->last_packet_type = cmd_packet->packet_type;
  1245. q_info = &device->iface_queues[CVP_IFACEQ_CMDQ_IDX];
  1246. if (!q_info) {
  1247. dprintk(CVP_ERR, "cannot write to shared Q's\n");
  1248. goto err_q_null;
  1249. }
  1250. if (!q_info->q_array.align_virtual_addr) {
  1251. dprintk(CVP_ERR, "cannot write to shared CMD Q's\n");
  1252. result = -ENODATA;
  1253. goto err_q_null;
  1254. }
  1255. if (__resume(device)) {
  1256. dprintk(CVP_ERR, "%s: Power on failed\n", __func__);
  1257. goto err_q_write;
  1258. }
  1259. if (!__write_queue(q_info, (u8 *)pkt, requires_interrupt)) {
  1260. if (device->res->sw_power_collapsible) {
  1261. cancel_delayed_work(&iris_hfi_pm_work);
  1262. if (!queue_delayed_work(device->iris_pm_workq,
  1263. &iris_hfi_pm_work,
  1264. msecs_to_jiffies(
  1265. device->res->msm_cvp_pwr_collapse_delay))) {
  1266. dprintk(CVP_PWR,
  1267. "PM work already scheduled\n");
  1268. }
  1269. }
  1270. result = 0;
  1271. } else {
  1272. dprintk(CVP_ERR, "__iface_cmdq_write: queue full\n");
  1273. }
  1274. err_q_write:
  1275. err_q_null:
  1276. return result;
  1277. }
  1278. static int __iface_cmdq_write(struct iris_hfi_device *device, void *pkt)
  1279. {
  1280. bool needs_interrupt = false;
  1281. int rc = __iface_cmdq_write_relaxed(device, pkt, &needs_interrupt);
  1282. if (!rc && needs_interrupt) {
  1283. /* Consumer of cmdq prefers that we raise an interrupt */
  1284. rc = 0;
  1285. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1286. }
  1287. return rc;
  1288. }
  1289. static int __iface_msgq_read(struct iris_hfi_device *device, void *pkt)
  1290. {
  1291. u32 tx_req_is_set = 0;
  1292. int rc = 0;
  1293. struct cvp_iface_q_info *q_info;
  1294. if (!pkt) {
  1295. dprintk(CVP_ERR, "Invalid Params\n");
  1296. return -EINVAL;
  1297. }
  1298. __strict_check(device);
  1299. if (!__core_in_valid_state(device)) {
  1300. dprintk(CVP_WARN, "%s - fw not in init state\n", __func__);
  1301. rc = -EINVAL;
  1302. goto read_error_null;
  1303. }
  1304. q_info = &device->iface_queues[CVP_IFACEQ_MSGQ_IDX];
  1305. if (q_info->q_array.align_virtual_addr == NULL) {
  1306. dprintk(CVP_ERR, "cannot read from shared MSG Q's\n");
  1307. rc = -ENODATA;
  1308. goto read_error_null;
  1309. }
  1310. if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) {
  1311. if (tx_req_is_set)
  1312. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1313. rc = 0;
  1314. } else
  1315. rc = -ENODATA;
  1316. read_error_null:
  1317. return rc;
  1318. }
  1319. static int __iface_dbgq_read(struct iris_hfi_device *device, void *pkt)
  1320. {
  1321. u32 tx_req_is_set = 0;
  1322. int rc = 0;
  1323. struct cvp_iface_q_info *q_info;
  1324. if (!pkt) {
  1325. dprintk(CVP_ERR, "Invalid Params\n");
  1326. return -EINVAL;
  1327. }
  1328. __strict_check(device);
  1329. q_info = &device->iface_queues[CVP_IFACEQ_DBGQ_IDX];
  1330. if (q_info->q_array.align_virtual_addr == NULL) {
  1331. dprintk(CVP_ERR, "cannot read from shared DBG Q's\n");
  1332. rc = -ENODATA;
  1333. goto dbg_error_null;
  1334. }
  1335. if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) {
  1336. if (tx_req_is_set)
  1337. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1338. rc = 0;
  1339. } else
  1340. rc = -ENODATA;
  1341. dbg_error_null:
  1342. return rc;
  1343. }
  1344. static void __set_queue_hdr_defaults(struct cvp_hfi_queue_header *q_hdr)
  1345. {
  1346. q_hdr->qhdr_status = 0x1;
  1347. q_hdr->qhdr_type = CVP_IFACEQ_DFLT_QHDR;
  1348. q_hdr->qhdr_q_size = CVP_IFACEQ_QUEUE_SIZE / 4;
  1349. q_hdr->qhdr_pkt_size = 0;
  1350. q_hdr->qhdr_rx_wm = 0x1;
  1351. q_hdr->qhdr_tx_wm = 0x1;
  1352. q_hdr->qhdr_rx_req = 0x1;
  1353. q_hdr->qhdr_tx_req = 0x0;
  1354. q_hdr->qhdr_rx_irq_status = 0x0;
  1355. q_hdr->qhdr_tx_irq_status = 0x0;
  1356. q_hdr->qhdr_read_idx = 0x0;
  1357. q_hdr->qhdr_write_idx = 0x0;
  1358. }
  1359. static void __interface_dsp_queues_release(struct iris_hfi_device *device)
  1360. {
  1361. int i;
  1362. struct msm_cvp_smem *mem_data = &device->dsp_iface_q_table.mem_data;
  1363. struct context_bank_info *cb = mem_data->mapping_info.cb_info;
  1364. if (!device->dsp_iface_q_table.align_virtual_addr) {
  1365. dprintk(CVP_ERR, "%s: already released\n", __func__);
  1366. return;
  1367. }
  1368. dma_unmap_single_attrs(cb->dev, mem_data->device_addr,
  1369. mem_data->size, DMA_BIDIRECTIONAL, 0);
  1370. dma_free_coherent(device->res->mem_cdsp.dev, mem_data->size,
  1371. mem_data->kvaddr, mem_data->dma_handle);
  1372. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1373. device->dsp_iface_queues[i].q_hdr = NULL;
  1374. device->dsp_iface_queues[i].q_array.align_virtual_addr = NULL;
  1375. device->dsp_iface_queues[i].q_array.align_device_addr = 0;
  1376. }
  1377. device->dsp_iface_q_table.align_virtual_addr = NULL;
  1378. device->dsp_iface_q_table.align_device_addr = 0;
  1379. }
  1380. static int __interface_dsp_queues_init(struct iris_hfi_device *dev)
  1381. {
  1382. int rc = 0;
  1383. u32 i;
  1384. struct cvp_iface_q_info *iface_q;
  1385. int offset = 0;
  1386. phys_addr_t fw_bias = 0;
  1387. size_t q_size;
  1388. struct msm_cvp_smem *mem_data;
  1389. void *kvaddr;
  1390. dma_addr_t dma_handle;
  1391. dma_addr_t iova;
  1392. struct context_bank_info *cb;
  1393. q_size = ALIGN(QUEUE_SIZE, SZ_1M);
  1394. mem_data = &dev->dsp_iface_q_table.mem_data;
  1395. /* Allocate dsp queues from CDSP device memory */
  1396. kvaddr = dma_alloc_coherent(dev->res->mem_cdsp.dev, q_size,
  1397. &dma_handle, GFP_KERNEL);
  1398. if (IS_ERR_OR_NULL(kvaddr)) {
  1399. dprintk(CVP_ERR, "%s: failed dma allocation\n", __func__);
  1400. goto fail_dma_alloc;
  1401. }
  1402. cb = msm_cvp_smem_get_context_bank(dev->res, 0);
  1403. if (!cb) {
  1404. dprintk(CVP_ERR,
  1405. "%s: failed to get context bank\n", __func__);
  1406. goto fail_dma_map;
  1407. }
  1408. iova = dma_map_single_attrs(cb->dev, phys_to_virt(dma_handle),
  1409. q_size, DMA_BIDIRECTIONAL, 0);
  1410. if (dma_mapping_error(cb->dev, iova)) {
  1411. dprintk(CVP_ERR, "%s: failed dma mapping\n", __func__);
  1412. goto fail_dma_map;
  1413. }
  1414. dprintk(CVP_DSP,
  1415. "%s: kvaddr %pK dma_handle %#llx iova %#llx size %zd\n",
  1416. __func__, kvaddr, dma_handle, iova, q_size);
  1417. memset(mem_data, 0, sizeof(struct msm_cvp_smem));
  1418. mem_data->kvaddr = kvaddr;
  1419. mem_data->device_addr = iova;
  1420. mem_data->dma_handle = dma_handle;
  1421. mem_data->size = q_size;
  1422. mem_data->mapping_info.cb_info = cb;
  1423. if (!is_iommu_present(dev->res))
  1424. fw_bias = dev->cvp_hal_data->firmware_base;
  1425. dev->dsp_iface_q_table.align_virtual_addr = kvaddr;
  1426. dev->dsp_iface_q_table.align_device_addr = iova - fw_bias;
  1427. dev->dsp_iface_q_table.mem_size = CVP_IFACEQ_TABLE_SIZE;
  1428. offset = dev->dsp_iface_q_table.mem_size;
  1429. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1430. iface_q = &dev->dsp_iface_queues[i];
  1431. iface_q->q_array.align_device_addr = iova + offset - fw_bias;
  1432. iface_q->q_array.align_virtual_addr = kvaddr + offset;
  1433. iface_q->q_array.mem_size = CVP_IFACEQ_QUEUE_SIZE;
  1434. offset += iface_q->q_array.mem_size;
  1435. spin_lock_init(&iface_q->hfi_lock);
  1436. }
  1437. cvp_dsp_init_hfi_queue_hdr(dev);
  1438. return rc;
  1439. fail_dma_map:
  1440. dma_free_coherent(dev->res->mem_cdsp.dev, q_size, kvaddr, dma_handle);
  1441. fail_dma_alloc:
  1442. return -ENOMEM;
  1443. }
  1444. static void __interface_queues_release(struct iris_hfi_device *device)
  1445. {
  1446. int i;
  1447. struct cvp_hfi_mem_map_table *qdss;
  1448. struct cvp_hfi_mem_map *mem_map;
  1449. int num_entries = device->res->qdss_addr_set.count;
  1450. unsigned long mem_map_table_base_addr;
  1451. struct context_bank_info *cb;
  1452. if (device->qdss.align_virtual_addr) {
  1453. qdss = (struct cvp_hfi_mem_map_table *)
  1454. device->qdss.align_virtual_addr;
  1455. qdss->mem_map_num_entries = num_entries;
  1456. mem_map_table_base_addr =
  1457. device->qdss.align_device_addr +
  1458. sizeof(struct cvp_hfi_mem_map_table);
  1459. qdss->mem_map_table_base_addr =
  1460. (u32)mem_map_table_base_addr;
  1461. if ((unsigned long)qdss->mem_map_table_base_addr !=
  1462. mem_map_table_base_addr) {
  1463. dprintk(CVP_ERR,
  1464. "Invalid mem_map_table_base_addr %#lx",
  1465. mem_map_table_base_addr);
  1466. }
  1467. mem_map = (struct cvp_hfi_mem_map *)(qdss + 1);
  1468. cb = msm_cvp_smem_get_context_bank(device->res, 0);
  1469. for (i = 0; cb && i < num_entries; i++) {
  1470. iommu_unmap(cb->domain,
  1471. mem_map[i].virtual_addr,
  1472. mem_map[i].size);
  1473. }
  1474. __smem_free(device, &device->qdss.mem_data);
  1475. }
  1476. __smem_free(device, &device->iface_q_table.mem_data);
  1477. __smem_free(device, &device->sfr.mem_data);
  1478. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1479. device->iface_queues[i].q_hdr = NULL;
  1480. device->iface_queues[i].q_array.align_virtual_addr = NULL;
  1481. device->iface_queues[i].q_array.align_device_addr = 0;
  1482. }
  1483. device->iface_q_table.align_virtual_addr = NULL;
  1484. device->iface_q_table.align_device_addr = 0;
  1485. device->qdss.align_virtual_addr = NULL;
  1486. device->qdss.align_device_addr = 0;
  1487. device->sfr.align_virtual_addr = NULL;
  1488. device->sfr.align_device_addr = 0;
  1489. device->mem_addr.align_virtual_addr = NULL;
  1490. device->mem_addr.align_device_addr = 0;
  1491. __interface_dsp_queues_release(device);
  1492. }
  1493. static int __get_qdss_iommu_virtual_addr(struct iris_hfi_device *dev,
  1494. struct cvp_hfi_mem_map *mem_map,
  1495. struct iommu_domain *domain)
  1496. {
  1497. int i;
  1498. int rc = 0;
  1499. dma_addr_t iova = QDSS_IOVA_START;
  1500. int num_entries = dev->res->qdss_addr_set.count;
  1501. struct addr_range *qdss_addr_tbl = dev->res->qdss_addr_set.addr_tbl;
  1502. if (!num_entries)
  1503. return -ENODATA;
  1504. for (i = 0; i < num_entries; i++) {
  1505. if (domain) {
  1506. rc = iommu_map(domain, iova,
  1507. qdss_addr_tbl[i].start,
  1508. qdss_addr_tbl[i].size,
  1509. IOMMU_READ | IOMMU_WRITE);
  1510. if (rc) {
  1511. dprintk(CVP_ERR,
  1512. "IOMMU QDSS mapping failed for addr %#x\n",
  1513. qdss_addr_tbl[i].start);
  1514. rc = -ENOMEM;
  1515. break;
  1516. }
  1517. } else {
  1518. iova = qdss_addr_tbl[i].start;
  1519. }
  1520. mem_map[i].virtual_addr = (u32)iova;
  1521. mem_map[i].physical_addr = qdss_addr_tbl[i].start;
  1522. mem_map[i].size = qdss_addr_tbl[i].size;
  1523. mem_map[i].attr = 0x0;
  1524. iova += mem_map[i].size;
  1525. }
  1526. if (i < num_entries) {
  1527. dprintk(CVP_ERR,
  1528. "QDSS mapping failed, Freeing other entries %d\n", i);
  1529. for (--i; domain && i >= 0; i--) {
  1530. iommu_unmap(domain,
  1531. mem_map[i].virtual_addr,
  1532. mem_map[i].size);
  1533. }
  1534. }
  1535. return rc;
  1536. }
  1537. static void __setup_ucregion_memory_map(struct iris_hfi_device *device)
  1538. {
  1539. __write_register(device, CVP_UC_REGION_ADDR,
  1540. (u32)device->iface_q_table.align_device_addr);
  1541. __write_register(device, CVP_UC_REGION_SIZE, SHARED_QSIZE);
  1542. __write_register(device, CVP_QTBL_ADDR,
  1543. (u32)device->iface_q_table.align_device_addr);
  1544. __write_register(device, CVP_QTBL_INFO, 0x01);
  1545. if (device->sfr.align_device_addr)
  1546. __write_register(device, CVP_SFR_ADDR,
  1547. (u32)device->sfr.align_device_addr);
  1548. if (device->qdss.align_device_addr)
  1549. __write_register(device, CVP_MMAP_ADDR,
  1550. (u32)device->qdss.align_device_addr);
  1551. call_iris_op(device, setup_dsp_uc_memmap, device);
  1552. }
  1553. static int __interface_queues_init(struct iris_hfi_device *dev)
  1554. {
  1555. struct cvp_hfi_queue_table_header *q_tbl_hdr;
  1556. struct cvp_hfi_queue_header *q_hdr;
  1557. u32 i;
  1558. int rc = 0;
  1559. struct cvp_hfi_mem_map_table *qdss;
  1560. struct cvp_hfi_mem_map *mem_map;
  1561. struct cvp_iface_q_info *iface_q;
  1562. struct cvp_hfi_sfr_struct *vsfr;
  1563. struct cvp_mem_addr *mem_addr;
  1564. int offset = 0;
  1565. int num_entries = dev->res->qdss_addr_set.count;
  1566. phys_addr_t fw_bias = 0;
  1567. size_t q_size;
  1568. unsigned long mem_map_table_base_addr;
  1569. struct context_bank_info *cb;
  1570. q_size = SHARED_QSIZE - ALIGNED_SFR_SIZE - ALIGNED_QDSS_SIZE;
  1571. mem_addr = &dev->mem_addr;
  1572. if (!is_iommu_present(dev->res))
  1573. fw_bias = dev->cvp_hal_data->firmware_base;
  1574. rc = __smem_alloc(dev, mem_addr, q_size, 1, SMEM_UNCACHED);
  1575. if (rc) {
  1576. dprintk(CVP_ERR, "iface_q_table_alloc_fail\n");
  1577. goto fail_alloc_queue;
  1578. }
  1579. dev->iface_q_table.align_virtual_addr = mem_addr->align_virtual_addr;
  1580. dev->iface_q_table.align_device_addr = mem_addr->align_device_addr -
  1581. fw_bias;
  1582. dev->iface_q_table.mem_size = CVP_IFACEQ_TABLE_SIZE;
  1583. dev->iface_q_table.mem_data = mem_addr->mem_data;
  1584. offset += dev->iface_q_table.mem_size;
  1585. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1586. iface_q = &dev->iface_queues[i];
  1587. iface_q->q_array.align_device_addr = mem_addr->align_device_addr
  1588. + offset - fw_bias;
  1589. iface_q->q_array.align_virtual_addr =
  1590. mem_addr->align_virtual_addr + offset;
  1591. iface_q->q_array.mem_size = CVP_IFACEQ_QUEUE_SIZE;
  1592. offset += iface_q->q_array.mem_size;
  1593. iface_q->q_hdr = CVP_IFACEQ_GET_QHDR_START_ADDR(
  1594. dev->iface_q_table.align_virtual_addr, i);
  1595. __set_queue_hdr_defaults(iface_q->q_hdr);
  1596. spin_lock_init(&iface_q->hfi_lock);
  1597. }
  1598. if ((msm_cvp_fw_debug_mode & HFI_DEBUG_MODE_QDSS) && num_entries) {
  1599. rc = __smem_alloc(dev, mem_addr, ALIGNED_QDSS_SIZE, 1,
  1600. SMEM_UNCACHED);
  1601. if (rc) {
  1602. dprintk(CVP_WARN,
  1603. "qdss_alloc_fail: QDSS messages logging will not work\n");
  1604. dev->qdss.align_device_addr = 0;
  1605. } else {
  1606. dev->qdss.align_device_addr =
  1607. mem_addr->align_device_addr - fw_bias;
  1608. dev->qdss.align_virtual_addr =
  1609. mem_addr->align_virtual_addr;
  1610. dev->qdss.mem_size = ALIGNED_QDSS_SIZE;
  1611. dev->qdss.mem_data = mem_addr->mem_data;
  1612. }
  1613. }
  1614. rc = __smem_alloc(dev, mem_addr, ALIGNED_SFR_SIZE, 1, SMEM_UNCACHED);
  1615. if (rc) {
  1616. dprintk(CVP_WARN, "sfr_alloc_fail: SFR not will work\n");
  1617. dev->sfr.align_device_addr = 0;
  1618. } else {
  1619. dev->sfr.align_device_addr = mem_addr->align_device_addr -
  1620. fw_bias;
  1621. dev->sfr.align_virtual_addr = mem_addr->align_virtual_addr;
  1622. dev->sfr.mem_size = ALIGNED_SFR_SIZE;
  1623. dev->sfr.mem_data = mem_addr->mem_data;
  1624. }
  1625. q_tbl_hdr = (struct cvp_hfi_queue_table_header *)
  1626. dev->iface_q_table.align_virtual_addr;
  1627. q_tbl_hdr->qtbl_version = 0;
  1628. q_tbl_hdr->device_addr = (void *)dev;
  1629. strlcpy(q_tbl_hdr->name, "msm_cvp", sizeof(q_tbl_hdr->name));
  1630. q_tbl_hdr->qtbl_size = CVP_IFACEQ_TABLE_SIZE;
  1631. q_tbl_hdr->qtbl_qhdr0_offset =
  1632. sizeof(struct cvp_hfi_queue_table_header);
  1633. q_tbl_hdr->qtbl_qhdr_size = sizeof(struct cvp_hfi_queue_header);
  1634. q_tbl_hdr->qtbl_num_q = CVP_IFACEQ_NUMQ;
  1635. q_tbl_hdr->qtbl_num_active_q = CVP_IFACEQ_NUMQ;
  1636. iface_q = &dev->iface_queues[CVP_IFACEQ_CMDQ_IDX];
  1637. q_hdr = iface_q->q_hdr;
  1638. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1639. q_hdr->qhdr_type |= HFI_Q_ID_HOST_TO_CTRL_CMD_Q;
  1640. iface_q = &dev->iface_queues[CVP_IFACEQ_MSGQ_IDX];
  1641. q_hdr = iface_q->q_hdr;
  1642. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1643. q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_MSG_Q;
  1644. iface_q = &dev->iface_queues[CVP_IFACEQ_DBGQ_IDX];
  1645. q_hdr = iface_q->q_hdr;
  1646. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1647. q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q;
  1648. /*
  1649. * Set receive request to zero on debug queue as there is no
  1650. * need of interrupt from cvp hardware for debug messages
  1651. */
  1652. q_hdr->qhdr_rx_req = 0;
  1653. if (dev->qdss.align_virtual_addr) {
  1654. qdss =
  1655. (struct cvp_hfi_mem_map_table *)dev->qdss.align_virtual_addr;
  1656. qdss->mem_map_num_entries = num_entries;
  1657. mem_map_table_base_addr = dev->qdss.align_device_addr +
  1658. sizeof(struct cvp_hfi_mem_map_table);
  1659. qdss->mem_map_table_base_addr = mem_map_table_base_addr;
  1660. mem_map = (struct cvp_hfi_mem_map *)(qdss + 1);
  1661. cb = msm_cvp_smem_get_context_bank(dev->res, 0);
  1662. if (!cb) {
  1663. dprintk(CVP_ERR,
  1664. "%s: failed to get context bank\n", __func__);
  1665. return -EINVAL;
  1666. }
  1667. rc = __get_qdss_iommu_virtual_addr(dev, mem_map, cb->domain);
  1668. if (rc) {
  1669. dprintk(CVP_ERR,
  1670. "IOMMU mapping failed, Freeing qdss memdata\n");
  1671. __smem_free(dev, &dev->qdss.mem_data);
  1672. dev->qdss.align_virtual_addr = NULL;
  1673. dev->qdss.align_device_addr = 0;
  1674. }
  1675. }
  1676. vsfr = (struct cvp_hfi_sfr_struct *) dev->sfr.align_virtual_addr;
  1677. if (vsfr)
  1678. vsfr->bufSize = ALIGNED_SFR_SIZE;
  1679. rc = __interface_dsp_queues_init(dev);
  1680. if (rc) {
  1681. dprintk(CVP_ERR, "dsp_queues_init failed\n");
  1682. goto fail_alloc_queue;
  1683. }
  1684. __setup_ucregion_memory_map(dev);
  1685. return 0;
  1686. fail_alloc_queue:
  1687. return -ENOMEM;
  1688. }
  1689. static int __sys_set_debug(struct iris_hfi_device *device, u32 debug)
  1690. {
  1691. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1692. int rc = 0;
  1693. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1694. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1695. rc = call_hfi_pkt_op(device, sys_debug_config, pkt, debug);
  1696. if (rc) {
  1697. dprintk(CVP_WARN,
  1698. "Debug mode setting to FW failed\n");
  1699. return -ENOTEMPTY;
  1700. }
  1701. if (__iface_cmdq_write(device, pkt))
  1702. return -ENOTEMPTY;
  1703. return 0;
  1704. }
  1705. static int __sys_set_idle_indicator(struct iris_hfi_device *device,
  1706. bool enable)
  1707. {
  1708. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1709. int rc = 0;
  1710. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1711. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1712. rc = call_hfi_pkt_op(device, sys_set_idle_indicator, pkt, enable);
  1713. if (__iface_cmdq_write(device, pkt))
  1714. return -ENOTEMPTY;
  1715. return 0;
  1716. }
  1717. static int __sys_set_coverage(struct iris_hfi_device *device, u32 mode)
  1718. {
  1719. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1720. int rc = 0;
  1721. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1722. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1723. rc = call_hfi_pkt_op(device, sys_coverage_config,
  1724. pkt, mode);
  1725. if (rc) {
  1726. dprintk(CVP_WARN,
  1727. "Coverage mode setting to FW failed\n");
  1728. return -ENOTEMPTY;
  1729. }
  1730. if (__iface_cmdq_write(device, pkt)) {
  1731. dprintk(CVP_WARN, "Failed to send coverage pkt to f/w\n");
  1732. return -ENOTEMPTY;
  1733. }
  1734. return 0;
  1735. }
  1736. static int __sys_set_power_control(struct iris_hfi_device *device,
  1737. bool enable)
  1738. {
  1739. struct regulator_info *rinfo;
  1740. bool supported = false;
  1741. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1742. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1743. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1744. iris_hfi_for_each_regulator(device, rinfo) {
  1745. if (rinfo->has_hw_power_collapse) {
  1746. supported = true;
  1747. break;
  1748. }
  1749. }
  1750. if (!supported)
  1751. return 0;
  1752. call_hfi_pkt_op(device, sys_power_control, pkt, enable);
  1753. if (__iface_cmdq_write(device, pkt))
  1754. return -ENOTEMPTY;
  1755. return 0;
  1756. }
  1757. static int iris_hfi_core_init(void *device)
  1758. {
  1759. int rc = 0;
  1760. u32 ipcc_iova;
  1761. struct cvp_hfi_cmd_sys_init_packet pkt;
  1762. struct cvp_hfi_cmd_sys_get_property_packet version_pkt;
  1763. struct iris_hfi_device *dev;
  1764. if (!device) {
  1765. dprintk(CVP_ERR, "Invalid device\n");
  1766. return -ENODEV;
  1767. }
  1768. dev = device;
  1769. dprintk(CVP_CORE, "Core initializing\n");
  1770. mutex_lock(&dev->lock);
  1771. dev->bus_vote.data =
  1772. kzalloc(sizeof(struct cvp_bus_vote_data), GFP_KERNEL);
  1773. if (!dev->bus_vote.data) {
  1774. dprintk(CVP_ERR, "Bus vote data memory is not allocated\n");
  1775. rc = -ENOMEM;
  1776. goto err_no_mem;
  1777. }
  1778. dev->bus_vote.data_count = 1;
  1779. dev->bus_vote.data->power_mode = CVP_POWER_TURBO;
  1780. rc = __load_fw(dev);
  1781. if (rc) {
  1782. dprintk(CVP_ERR, "Failed to load Iris FW\n");
  1783. goto err_load_fw;
  1784. }
  1785. __set_state(dev, IRIS_STATE_INIT);
  1786. dev->reg_dumped = false;
  1787. dprintk(CVP_CORE, "Dev_Virt: %pa, Reg_Virt: %pK\n",
  1788. &dev->cvp_hal_data->firmware_base,
  1789. dev->cvp_hal_data->register_base);
  1790. rc = __interface_queues_init(dev);
  1791. if (rc) {
  1792. dprintk(CVP_ERR, "failed to init queues\n");
  1793. rc = -ENOMEM;
  1794. goto err_core_init;
  1795. }
  1796. rc = msm_cvp_map_ipcc_regs(&ipcc_iova);
  1797. if (!rc) {
  1798. dprintk(CVP_CORE, "IPCC iova 0x%x\n", ipcc_iova);
  1799. __write_register(dev, CVP_MMAP_ADDR, ipcc_iova);
  1800. }
  1801. rc = __boot_firmware(dev);
  1802. if (rc) {
  1803. dprintk(CVP_ERR, "Failed to start core\n");
  1804. rc = -ENODEV;
  1805. goto err_core_init;
  1806. }
  1807. dev->version = __read_register(dev, CVP_VERSION_INFO);
  1808. rc = call_hfi_pkt_op(dev, sys_init, &pkt, 0);
  1809. if (rc) {
  1810. dprintk(CVP_ERR, "Failed to create sys init pkt\n");
  1811. goto err_core_init;
  1812. }
  1813. if (__iface_cmdq_write(dev, &pkt)) {
  1814. rc = -ENOTEMPTY;
  1815. goto err_core_init;
  1816. }
  1817. rc = call_hfi_pkt_op(dev, sys_image_version, &version_pkt);
  1818. if (rc || __iface_cmdq_write(dev, &version_pkt))
  1819. dprintk(CVP_WARN, "Failed to send image version pkt to f/w\n");
  1820. __sys_set_debug(device, msm_cvp_fw_debug);
  1821. __enable_subcaches(device);
  1822. __set_subcaches(device);
  1823. __set_ubwc_config(device);
  1824. __sys_set_idle_indicator(device, true);
  1825. if (dev->res->pm_qos_latency_us)
  1826. cpu_latency_qos_add_request(&dev->qos,
  1827. dev->res->pm_qos_latency_us);
  1828. /* mmrm registration */
  1829. if (msm_cvp_mmrm_enabled) {
  1830. rc = msm_cvp_mmrm_register(device);
  1831. if (rc) {
  1832. dprintk(CVP_ERR, "Failed to register mmrm client\n");
  1833. goto err_core_init;
  1834. }
  1835. }
  1836. mutex_unlock(&dev->lock);
  1837. cvp_dsp_send_hfi_queue();
  1838. dprintk(CVP_CORE, "Core inited successfully\n");
  1839. return 0;
  1840. err_core_init:
  1841. __set_state(dev, IRIS_STATE_DEINIT);
  1842. __unload_fw(dev);
  1843. err_load_fw:
  1844. err_no_mem:
  1845. dprintk(CVP_ERR, "Core init failed\n");
  1846. mutex_unlock(&dev->lock);
  1847. return rc;
  1848. }
  1849. static int iris_hfi_core_release(void *dev)
  1850. {
  1851. int rc = 0;
  1852. struct iris_hfi_device *device = dev;
  1853. struct cvp_hal_session *session, *next;
  1854. if (!device) {
  1855. dprintk(CVP_ERR, "invalid device\n");
  1856. return -ENODEV;
  1857. }
  1858. mutex_lock(&device->lock);
  1859. dprintk(CVP_WARN, "Core releasing\n");
  1860. if (device->res->pm_qos_latency_us &&
  1861. cpu_latency_qos_request_active(&device->qos))
  1862. cpu_latency_qos_remove_request(&device->qos);
  1863. __resume(device);
  1864. __set_state(device, IRIS_STATE_DEINIT);
  1865. __dsp_shutdown(device, 0);
  1866. if (msm_cvp_mmrm_enabled) {
  1867. rc = mmrm_client_deregister(device->mmrm_cvp);
  1868. if (rc) {
  1869. dprintk(CVP_ERR,
  1870. "%s: Failed mmrm_client_deregister with rc: %d\n",
  1871. __func__, rc);
  1872. } else {
  1873. dprintk(CVP_PWR,
  1874. "%s: Succeed mmrm_client_deregister for mmrm_cvp:%p, type:%d, uid:%ld\n",
  1875. __func__, device->mmrm_cvp, device->mmrm_cvp->client_type,
  1876. device->mmrm_cvp->client_uid);
  1877. device->mmrm_cvp = NULL;
  1878. }
  1879. }
  1880. __unload_fw(device);
  1881. /* unlink all sessions from device */
  1882. list_for_each_entry_safe(session, next, &device->sess_head, list) {
  1883. list_del(&session->list);
  1884. session->device = NULL;
  1885. }
  1886. dprintk(CVP_CORE, "Core released successfully\n");
  1887. mutex_unlock(&device->lock);
  1888. return rc;
  1889. }
  1890. static void __core_clear_interrupt(struct iris_hfi_device *device)
  1891. {
  1892. u32 intr_status = 0, mask = 0;
  1893. if (!device) {
  1894. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  1895. return;
  1896. }
  1897. intr_status = __read_register(device, CVP_WRAPPER_INTR_STATUS);
  1898. mask = (CVP_WRAPPER_INTR_MASK_A2HCPU_BMSK | CVP_FATAL_INTR_BMSK);
  1899. if (intr_status & mask) {
  1900. device->intr_status |= intr_status;
  1901. device->reg_count++;
  1902. dprintk(CVP_CORE,
  1903. "INTERRUPT for device: %pK: times: %d status: %d\n",
  1904. device, device->reg_count, intr_status);
  1905. } else {
  1906. device->spur_count++;
  1907. }
  1908. __write_register(device, CVP_CPU_CS_A2HSOFTINTCLR, 1);
  1909. }
  1910. static int iris_hfi_core_trigger_ssr(void *device,
  1911. enum hal_ssr_trigger_type type)
  1912. {
  1913. struct cvp_hfi_cmd_sys_test_ssr_packet pkt;
  1914. int rc = 0;
  1915. struct iris_hfi_device *dev;
  1916. if (!device) {
  1917. dprintk(CVP_ERR, "invalid device\n");
  1918. return -ENODEV;
  1919. }
  1920. dev = device;
  1921. if (mutex_trylock(&dev->lock)) {
  1922. rc = call_hfi_pkt_op(dev, ssr_cmd, type, &pkt);
  1923. if (rc) {
  1924. dprintk(CVP_ERR, "%s: failed to create packet\n",
  1925. __func__);
  1926. goto err_create_pkt;
  1927. }
  1928. if (__iface_cmdq_write(dev, &pkt))
  1929. rc = -ENOTEMPTY;
  1930. } else {
  1931. return -EAGAIN;
  1932. }
  1933. err_create_pkt:
  1934. mutex_unlock(&dev->lock);
  1935. return rc;
  1936. }
  1937. static void __set_default_sys_properties(struct iris_hfi_device *device)
  1938. {
  1939. if (__sys_set_debug(device, msm_cvp_fw_debug))
  1940. dprintk(CVP_WARN, "Setting fw_debug msg ON failed\n");
  1941. if (__sys_set_power_control(device, msm_cvp_fw_low_power_mode))
  1942. dprintk(CVP_WARN, "Setting h/w power collapse ON failed\n");
  1943. }
  1944. static void __session_clean(struct cvp_hal_session *session)
  1945. {
  1946. struct cvp_hal_session *temp, *next;
  1947. struct iris_hfi_device *device;
  1948. if (!session || !session->device) {
  1949. dprintk(CVP_WARN, "%s: invalid params\n", __func__);
  1950. return;
  1951. }
  1952. device = session->device;
  1953. dprintk(CVP_SESS, "deleted the session: %pK\n", session);
  1954. /*
  1955. * session might have been removed from the device list in
  1956. * core_release, so check and remove if it is in the list
  1957. */
  1958. list_for_each_entry_safe(temp, next, &device->sess_head, list) {
  1959. if (session == temp) {
  1960. list_del(&session->list);
  1961. break;
  1962. }
  1963. }
  1964. /* Poison the session handle with zeros */
  1965. *session = (struct cvp_hal_session){ {0} };
  1966. kfree(session);
  1967. }
  1968. static int iris_hfi_session_clean(void *session)
  1969. {
  1970. struct cvp_hal_session *sess_close;
  1971. struct iris_hfi_device *device;
  1972. if (!session) {
  1973. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  1974. return -EINVAL;
  1975. }
  1976. sess_close = session;
  1977. device = sess_close->device;
  1978. if (!device) {
  1979. dprintk(CVP_ERR, "Invalid device handle %s\n", __func__);
  1980. return -EINVAL;
  1981. }
  1982. mutex_lock(&device->lock);
  1983. __session_clean(sess_close);
  1984. mutex_unlock(&device->lock);
  1985. return 0;
  1986. }
  1987. static int iris_hfi_session_init(void *device, void *session_id,
  1988. void **new_session)
  1989. {
  1990. struct cvp_hfi_cmd_sys_session_init_packet pkt;
  1991. struct iris_hfi_device *dev;
  1992. struct cvp_hal_session *s;
  1993. if (!device || !new_session) {
  1994. dprintk(CVP_ERR, "%s - invalid input\n", __func__);
  1995. return -EINVAL;
  1996. }
  1997. dev = device;
  1998. mutex_lock(&dev->lock);
  1999. s = kzalloc(sizeof(*s), GFP_KERNEL);
  2000. if (!s) {
  2001. dprintk(CVP_ERR, "new session fail: Out of memory\n");
  2002. goto err_session_init_fail;
  2003. }
  2004. s->session_id = session_id;
  2005. s->device = dev;
  2006. dprintk(CVP_SESS,
  2007. "%s: inst %pK, session %pK\n", __func__, session_id, s);
  2008. list_add_tail(&s->list, &dev->sess_head);
  2009. __set_default_sys_properties(device);
  2010. if (call_hfi_pkt_op(dev, session_init, &pkt, s)) {
  2011. dprintk(CVP_ERR, "session_init: failed to create packet\n");
  2012. goto err_session_init_fail;
  2013. }
  2014. *new_session = s;
  2015. if (__iface_cmdq_write(dev, &pkt))
  2016. goto err_session_init_fail;
  2017. mutex_unlock(&dev->lock);
  2018. return 0;
  2019. err_session_init_fail:
  2020. if (s)
  2021. __session_clean(s);
  2022. *new_session = NULL;
  2023. mutex_unlock(&dev->lock);
  2024. return -EINVAL;
  2025. }
  2026. static int __send_session_cmd(struct cvp_hal_session *session, int pkt_type)
  2027. {
  2028. struct cvp_hal_session_cmd_pkt pkt;
  2029. int rc = 0;
  2030. struct iris_hfi_device *device = session->device;
  2031. if (!__is_session_valid(device, session, __func__))
  2032. return -ECONNRESET;
  2033. rc = call_hfi_pkt_op(device, session_cmd,
  2034. &pkt, pkt_type, session);
  2035. if (rc == -EPERM)
  2036. return 0;
  2037. if (rc) {
  2038. dprintk(CVP_ERR, "send session cmd: create pkt failed\n");
  2039. goto err_create_pkt;
  2040. }
  2041. if (__iface_cmdq_write(session->device, &pkt))
  2042. rc = -ENOTEMPTY;
  2043. err_create_pkt:
  2044. return rc;
  2045. }
  2046. static int iris_hfi_session_end(void *session)
  2047. {
  2048. struct cvp_hal_session *sess;
  2049. struct iris_hfi_device *device;
  2050. int rc = 0;
  2051. if (!session) {
  2052. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  2053. return -EINVAL;
  2054. }
  2055. sess = session;
  2056. device = sess->device;
  2057. if (!device) {
  2058. dprintk(CVP_ERR, "Invalid session %s\n", __func__);
  2059. return -EINVAL;
  2060. }
  2061. mutex_lock(&device->lock);
  2062. if (msm_cvp_fw_coverage) {
  2063. if (__sys_set_coverage(sess->device, msm_cvp_fw_coverage))
  2064. dprintk(CVP_WARN, "Fw_coverage msg ON failed\n");
  2065. }
  2066. rc = __send_session_cmd(session, HFI_CMD_SYS_SESSION_END);
  2067. mutex_unlock(&device->lock);
  2068. return rc;
  2069. }
  2070. static int iris_hfi_session_abort(void *sess)
  2071. {
  2072. struct cvp_hal_session *session = sess;
  2073. struct iris_hfi_device *device;
  2074. int rc = 0;
  2075. if (!session || !session->device) {
  2076. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  2077. return -EINVAL;
  2078. }
  2079. device = session->device;
  2080. mutex_lock(&device->lock);
  2081. rc = __send_session_cmd(session, HFI_CMD_SYS_SESSION_ABORT);
  2082. mutex_unlock(&device->lock);
  2083. return rc;
  2084. }
  2085. static int iris_hfi_session_set_buffers(void *sess, u32 iova, u32 size)
  2086. {
  2087. struct cvp_hfi_cmd_session_set_buffers_packet pkt;
  2088. int rc = 0;
  2089. struct cvp_hal_session *session = sess;
  2090. struct iris_hfi_device *device;
  2091. if (!session || !session->device || !iova || !size) {
  2092. dprintk(CVP_ERR, "Invalid Params\n");
  2093. return -EINVAL;
  2094. }
  2095. device = session->device;
  2096. mutex_lock(&device->lock);
  2097. if (!__is_session_valid(device, session, __func__)) {
  2098. rc = -ECONNRESET;
  2099. goto err_create_pkt;
  2100. }
  2101. rc = call_hfi_pkt_op(device, session_set_buffers,
  2102. &pkt, session, iova, size);
  2103. if (rc) {
  2104. dprintk(CVP_ERR, "set buffers: failed to create packet\n");
  2105. goto err_create_pkt;
  2106. }
  2107. if (__iface_cmdq_write(session->device, &pkt))
  2108. rc = -ENOTEMPTY;
  2109. err_create_pkt:
  2110. mutex_unlock(&device->lock);
  2111. return rc;
  2112. }
  2113. static int iris_hfi_session_release_buffers(void *sess)
  2114. {
  2115. struct cvp_session_release_buffers_packet pkt;
  2116. int rc = 0;
  2117. struct cvp_hal_session *session = sess;
  2118. struct iris_hfi_device *device;
  2119. if (!session || !session->device) {
  2120. dprintk(CVP_ERR, "Invalid Params\n");
  2121. return -EINVAL;
  2122. }
  2123. device = session->device;
  2124. mutex_lock(&device->lock);
  2125. if (!__is_session_valid(device, session, __func__)) {
  2126. rc = -ECONNRESET;
  2127. goto err_create_pkt;
  2128. }
  2129. rc = call_hfi_pkt_op(device, session_release_buffers, &pkt, session);
  2130. if (rc) {
  2131. dprintk(CVP_ERR, "release buffers: failed to create packet\n");
  2132. goto err_create_pkt;
  2133. }
  2134. if (__iface_cmdq_write(session->device, &pkt))
  2135. rc = -ENOTEMPTY;
  2136. err_create_pkt:
  2137. mutex_unlock(&device->lock);
  2138. return rc;
  2139. }
  2140. static int iris_hfi_session_send(void *sess,
  2141. struct eva_kmd_hfi_packet *in_pkt)
  2142. {
  2143. int rc = 0;
  2144. struct eva_kmd_hfi_packet pkt;
  2145. struct cvp_hal_session *session = sess;
  2146. struct iris_hfi_device *device;
  2147. if (!session || !session->device) {
  2148. dprintk(CVP_ERR, "invalid session");
  2149. return -ENODEV;
  2150. }
  2151. device = session->device;
  2152. mutex_lock(&device->lock);
  2153. if (!__is_session_valid(device, session, __func__)) {
  2154. rc = -ECONNRESET;
  2155. goto err_send_pkt;
  2156. }
  2157. rc = call_hfi_pkt_op(device, session_send,
  2158. &pkt, session, in_pkt);
  2159. if (rc) {
  2160. dprintk(CVP_ERR,
  2161. "failed to create pkt\n");
  2162. goto err_send_pkt;
  2163. }
  2164. if (__iface_cmdq_write(session->device, &pkt))
  2165. rc = -ENOTEMPTY;
  2166. err_send_pkt:
  2167. mutex_unlock(&device->lock);
  2168. return rc;
  2169. return rc;
  2170. }
  2171. static int iris_hfi_session_flush(void *sess)
  2172. {
  2173. struct cvp_hal_session *session = sess;
  2174. struct iris_hfi_device *device;
  2175. int rc = 0;
  2176. if (!session || !session->device) {
  2177. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  2178. return -EINVAL;
  2179. }
  2180. device = session->device;
  2181. mutex_lock(&device->lock);
  2182. rc = __send_session_cmd(session, HFI_CMD_SESSION_CVP_FLUSH);
  2183. mutex_unlock(&device->lock);
  2184. return rc;
  2185. }
  2186. static int __check_core_registered(struct iris_hfi_device *device,
  2187. phys_addr_t fw_addr, u8 *reg_addr, u32 reg_size,
  2188. phys_addr_t irq)
  2189. {
  2190. struct cvp_hal_data *cvp_hal_data;
  2191. if (!device) {
  2192. dprintk(CVP_INFO, "no device Registered\n");
  2193. return -EINVAL;
  2194. }
  2195. cvp_hal_data = device->cvp_hal_data;
  2196. if (!cvp_hal_data)
  2197. return -EINVAL;
  2198. if (cvp_hal_data->irq == irq &&
  2199. (CONTAINS(cvp_hal_data->firmware_base,
  2200. FIRMWARE_SIZE, fw_addr) ||
  2201. CONTAINS(fw_addr, FIRMWARE_SIZE,
  2202. cvp_hal_data->firmware_base) ||
  2203. CONTAINS(cvp_hal_data->register_base,
  2204. reg_size, reg_addr) ||
  2205. CONTAINS(reg_addr, reg_size,
  2206. cvp_hal_data->register_base) ||
  2207. OVERLAPS(cvp_hal_data->register_base,
  2208. reg_size, reg_addr, reg_size) ||
  2209. OVERLAPS(reg_addr, reg_size,
  2210. cvp_hal_data->register_base,
  2211. reg_size) ||
  2212. OVERLAPS(cvp_hal_data->firmware_base,
  2213. FIRMWARE_SIZE, fw_addr,
  2214. FIRMWARE_SIZE) ||
  2215. OVERLAPS(fw_addr, FIRMWARE_SIZE,
  2216. cvp_hal_data->firmware_base,
  2217. FIRMWARE_SIZE))) {
  2218. return 0;
  2219. }
  2220. dprintk(CVP_INFO, "Device not registered\n");
  2221. return -EINVAL;
  2222. }
  2223. static void __process_fatal_error(
  2224. struct iris_hfi_device *device)
  2225. {
  2226. struct msm_cvp_cb_cmd_done cmd_done = {0};
  2227. cmd_done.device_id = device->device_id;
  2228. device->callback(HAL_SYS_ERROR, &cmd_done);
  2229. }
  2230. static int __prepare_pc(struct iris_hfi_device *device)
  2231. {
  2232. int rc = 0;
  2233. struct cvp_hfi_cmd_sys_pc_prep_packet pkt;
  2234. rc = call_hfi_pkt_op(device, sys_pc_prep, &pkt);
  2235. if (rc) {
  2236. dprintk(CVP_ERR, "Failed to create sys pc prep pkt\n");
  2237. goto err_pc_prep;
  2238. }
  2239. if (__iface_cmdq_write(device, &pkt))
  2240. rc = -ENOTEMPTY;
  2241. if (rc)
  2242. dprintk(CVP_ERR, "Failed to prepare iris for power off");
  2243. err_pc_prep:
  2244. return rc;
  2245. }
  2246. static void iris_hfi_pm_handler(struct work_struct *work)
  2247. {
  2248. int rc = 0;
  2249. struct msm_cvp_core *core;
  2250. struct iris_hfi_device *device;
  2251. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  2252. if (core)
  2253. device = core->device->hfi_device_data;
  2254. else
  2255. return;
  2256. if (!device) {
  2257. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  2258. return;
  2259. }
  2260. dprintk(CVP_PWR,
  2261. "Entering %s\n", __func__);
  2262. /*
  2263. * It is ok to check this variable outside the lock since
  2264. * it is being updated in this context only
  2265. */
  2266. if (device->skip_pc_count >= CVP_MAX_PC_SKIP_COUNT) {
  2267. dprintk(CVP_WARN, "Failed to PC for %d times\n",
  2268. device->skip_pc_count);
  2269. device->skip_pc_count = 0;
  2270. __process_fatal_error(device);
  2271. return;
  2272. }
  2273. mutex_lock(&device->lock);
  2274. if (gfa_cv.state == DSP_SUSPEND)
  2275. rc = __power_collapse(device, true);
  2276. else
  2277. rc = __power_collapse(device, false);
  2278. mutex_unlock(&device->lock);
  2279. switch (rc) {
  2280. case 0:
  2281. device->skip_pc_count = 0;
  2282. /* Cancel pending delayed works if any */
  2283. cancel_delayed_work(&iris_hfi_pm_work);
  2284. dprintk(CVP_PWR, "%s: power collapse successful!\n",
  2285. __func__);
  2286. break;
  2287. case -EBUSY:
  2288. device->skip_pc_count = 0;
  2289. dprintk(CVP_PWR, "%s: retry PC as cvp is busy\n", __func__);
  2290. queue_delayed_work(device->iris_pm_workq,
  2291. &iris_hfi_pm_work, msecs_to_jiffies(
  2292. device->res->msm_cvp_pwr_collapse_delay));
  2293. break;
  2294. case -EAGAIN:
  2295. device->skip_pc_count++;
  2296. dprintk(CVP_WARN, "%s: retry power collapse (count %d)\n",
  2297. __func__, device->skip_pc_count);
  2298. queue_delayed_work(device->iris_pm_workq,
  2299. &iris_hfi_pm_work, msecs_to_jiffies(
  2300. device->res->msm_cvp_pwr_collapse_delay));
  2301. break;
  2302. default:
  2303. dprintk(CVP_ERR, "%s: power collapse failed\n", __func__);
  2304. break;
  2305. }
  2306. }
  2307. static int __power_collapse(struct iris_hfi_device *device, bool force)
  2308. {
  2309. int rc = 0;
  2310. u32 wfi_status = 0, idle_status = 0, pc_ready = 0;
  2311. u32 flags = 0;
  2312. int count = 0;
  2313. const int max_tries = 150;
  2314. if (!device) {
  2315. dprintk(CVP_ERR, "%s: invalid params\n", __func__);
  2316. return -EINVAL;
  2317. }
  2318. if (!device->power_enabled) {
  2319. dprintk(CVP_PWR, "%s: Power already disabled\n",
  2320. __func__);
  2321. goto exit;
  2322. }
  2323. rc = __core_in_valid_state(device);
  2324. if (!rc) {
  2325. dprintk(CVP_WARN,
  2326. "Core is in bad state, Skipping power collapse\n");
  2327. return -EINVAL;
  2328. }
  2329. rc = __dsp_suspend(device, force, flags);
  2330. if (rc == -EBUSY)
  2331. goto exit;
  2332. else if (rc)
  2333. goto skip_power_off;
  2334. pc_ready = __read_register(device, CVP_CTRL_STATUS) &
  2335. CVP_CTRL_STATUS_PC_READY;
  2336. if (!pc_ready) {
  2337. wfi_status = __read_register(device,
  2338. CVP_WRAPPER_CPU_STATUS);
  2339. idle_status = __read_register(device,
  2340. CVP_CTRL_STATUS);
  2341. if (!(wfi_status & BIT(0))) {
  2342. dprintk(CVP_WARN,
  2343. "Skipping PC as wfi_status (%#x) bit not set\n",
  2344. wfi_status);
  2345. goto skip_power_off;
  2346. }
  2347. if (!(idle_status & BIT(30))) {
  2348. dprintk(CVP_WARN,
  2349. "Skipping PC as idle_status (%#x) bit not set\n",
  2350. idle_status);
  2351. goto skip_power_off;
  2352. }
  2353. rc = __prepare_pc(device);
  2354. if (rc) {
  2355. dprintk(CVP_WARN, "Failed PC %d\n", rc);
  2356. goto skip_power_off;
  2357. }
  2358. while (count < max_tries) {
  2359. wfi_status = __read_register(device,
  2360. CVP_WRAPPER_CPU_STATUS);
  2361. pc_ready = __read_register(device,
  2362. CVP_CTRL_STATUS);
  2363. if ((wfi_status & BIT(0)) && (pc_ready &
  2364. CVP_CTRL_STATUS_PC_READY))
  2365. break;
  2366. usleep_range(150, 250);
  2367. count++;
  2368. }
  2369. if (count == max_tries) {
  2370. dprintk(CVP_ERR,
  2371. "Skip PC. Core is not in right state (%#x, %#x)\n",
  2372. wfi_status, pc_ready);
  2373. goto skip_power_off;
  2374. }
  2375. }
  2376. __flush_debug_queue(device, device->raw_packet);
  2377. rc = __suspend(device);
  2378. if (rc)
  2379. dprintk(CVP_ERR, "Failed __suspend\n");
  2380. exit:
  2381. return rc;
  2382. skip_power_off:
  2383. dprintk(CVP_PWR, "Skip PC(%#x, %#x, %#x)\n",
  2384. wfi_status, idle_status, pc_ready);
  2385. __flush_debug_queue(device, device->raw_packet);
  2386. return -EAGAIN;
  2387. }
  2388. static void __process_sys_error(struct iris_hfi_device *device)
  2389. {
  2390. struct cvp_hfi_sfr_struct *vsfr = NULL;
  2391. vsfr = (struct cvp_hfi_sfr_struct *)device->sfr.align_virtual_addr;
  2392. if (vsfr) {
  2393. void *p = memchr(vsfr->rg_data, '\0', vsfr->bufSize);
  2394. /*
  2395. * SFR isn't guaranteed to be NULL terminated
  2396. * since SYS_ERROR indicates that Iris is in the
  2397. * process of crashing.
  2398. */
  2399. if (p == NULL)
  2400. vsfr->rg_data[vsfr->bufSize - 1] = '\0';
  2401. dprintk(CVP_ERR, "SFR Message from FW: %s\n",
  2402. vsfr->rg_data);
  2403. }
  2404. }
  2405. static void __flush_debug_queue(struct iris_hfi_device *device, u8 *packet)
  2406. {
  2407. bool local_packet = false;
  2408. enum cvp_msg_prio log_level = CVP_FW;
  2409. if (!device) {
  2410. dprintk(CVP_ERR, "%s: Invalid params\n", __func__);
  2411. return;
  2412. }
  2413. if (!packet) {
  2414. packet = kzalloc(CVP_IFACEQ_VAR_HUGE_PKT_SIZE, GFP_KERNEL);
  2415. if (!packet) {
  2416. dprintk(CVP_ERR, "In %s() Fail to allocate mem\n",
  2417. __func__);
  2418. return;
  2419. }
  2420. local_packet = true;
  2421. /*
  2422. * Local packek is used when something FATAL occurred.
  2423. * It is good to print these logs by default.
  2424. */
  2425. log_level = CVP_ERR;
  2426. }
  2427. #define SKIP_INVALID_PKT(pkt_size, payload_size, pkt_hdr_size) ({ \
  2428. if (pkt_size < pkt_hdr_size || \
  2429. payload_size < MIN_PAYLOAD_SIZE || \
  2430. payload_size > \
  2431. (pkt_size - pkt_hdr_size + sizeof(u8))) { \
  2432. dprintk(CVP_ERR, \
  2433. "%s: invalid msg size - %d\n", \
  2434. __func__, pkt->msg_size); \
  2435. continue; \
  2436. } \
  2437. })
  2438. while (!__iface_dbgq_read(device, packet)) {
  2439. struct cvp_hfi_packet_header *pkt =
  2440. (struct cvp_hfi_packet_header *) packet;
  2441. if (pkt->size < sizeof(struct cvp_hfi_packet_header)) {
  2442. dprintk(CVP_ERR, "Invalid pkt size - %s\n",
  2443. __func__);
  2444. continue;
  2445. }
  2446. if (pkt->packet_type == HFI_MSG_SYS_DEBUG) {
  2447. struct cvp_hfi_msg_sys_debug_packet *pkt =
  2448. (struct cvp_hfi_msg_sys_debug_packet *) packet;
  2449. SKIP_INVALID_PKT(pkt->size,
  2450. pkt->msg_size, sizeof(*pkt));
  2451. /*
  2452. * All fw messages starts with new line character. This
  2453. * causes dprintk to print this message in two lines
  2454. * in the kernel log. Ignoring the first character
  2455. * from the message fixes this to print it in a single
  2456. * line.
  2457. */
  2458. pkt->rg_msg_data[pkt->msg_size-1] = '\0';
  2459. dprintk(log_level, "%s", &pkt->rg_msg_data[1]);
  2460. }
  2461. }
  2462. #undef SKIP_INVALID_PKT
  2463. if (local_packet)
  2464. kfree(packet);
  2465. }
  2466. static bool __is_session_valid(struct iris_hfi_device *device,
  2467. struct cvp_hal_session *session, const char *func)
  2468. {
  2469. struct cvp_hal_session *temp = NULL;
  2470. if (!device || !session)
  2471. goto invalid;
  2472. list_for_each_entry(temp, &device->sess_head, list)
  2473. if (session == temp)
  2474. return true;
  2475. invalid:
  2476. dprintk(CVP_WARN, "%s: device %pK, invalid session %pK\n",
  2477. func, device, session);
  2478. return false;
  2479. }
  2480. static struct cvp_hal_session *__get_session(struct iris_hfi_device *device,
  2481. u32 session_id)
  2482. {
  2483. struct cvp_hal_session *temp = NULL;
  2484. list_for_each_entry(temp, &device->sess_head, list) {
  2485. if (session_id == hash32_ptr(temp))
  2486. return temp;
  2487. }
  2488. return NULL;
  2489. }
  2490. #define _INVALID_MSG_ "Unrecognized MSG (%#x) session (%pK), discarding\n"
  2491. #define _INVALID_STATE_ "Ignore responses from %d to %d invalid state\n"
  2492. #define _DEVFREQ_FAIL_ "Failed to add devfreq device bus %s governor %s: %d\n"
  2493. static void process_system_msg(struct msm_cvp_cb_info *info,
  2494. struct iris_hfi_device *device,
  2495. void *raw_packet)
  2496. {
  2497. struct cvp_hal_sys_init_done sys_init_done = {0};
  2498. switch (info->response_type) {
  2499. case HAL_SYS_ERROR:
  2500. __process_sys_error(device);
  2501. break;
  2502. case HAL_SYS_RELEASE_RESOURCE_DONE:
  2503. dprintk(CVP_CORE, "Received SYS_RELEASE_RESOURCE\n");
  2504. break;
  2505. case HAL_SYS_INIT_DONE:
  2506. dprintk(CVP_CORE, "Received SYS_INIT_DONE\n");
  2507. sys_init_done.capabilities =
  2508. device->sys_init_capabilities;
  2509. cvp_hfi_process_sys_init_done_prop_read(
  2510. (struct cvp_hfi_msg_sys_init_done_packet *)
  2511. raw_packet, &sys_init_done);
  2512. info->response.cmd.data.sys_init_done = sys_init_done;
  2513. break;
  2514. default:
  2515. break;
  2516. }
  2517. }
  2518. static void **get_session_id(struct msm_cvp_cb_info *info)
  2519. {
  2520. void **session_id = NULL;
  2521. /* For session-related packets, validate session */
  2522. switch (info->response_type) {
  2523. case HAL_SESSION_INIT_DONE:
  2524. case HAL_SESSION_END_DONE:
  2525. case HAL_SESSION_ABORT_DONE:
  2526. case HAL_SESSION_STOP_DONE:
  2527. case HAL_SESSION_FLUSH_DONE:
  2528. case HAL_SESSION_SET_BUFFER_DONE:
  2529. case HAL_SESSION_SUSPEND_DONE:
  2530. case HAL_SESSION_RESUME_DONE:
  2531. case HAL_SESSION_SET_PROP_DONE:
  2532. case HAL_SESSION_GET_PROP_DONE:
  2533. case HAL_SESSION_RELEASE_BUFFER_DONE:
  2534. case HAL_SESSION_REGISTER_BUFFER_DONE:
  2535. case HAL_SESSION_UNREGISTER_BUFFER_DONE:
  2536. case HAL_SESSION_DFS_CONFIG_CMD_DONE:
  2537. case HAL_SESSION_DMM_CONFIG_CMD_DONE:
  2538. case HAL_SESSION_WARP_CONFIG_CMD_DONE:
  2539. case HAL_SESSION_WARP_NCC_CONFIG_CMD_DONE:
  2540. case HAL_SESSION_SGM_OF_CONFIG_CMD_DONE:
  2541. case HAL_SESSION_TME_CONFIG_CMD_DONE:
  2542. case HAL_SESSION_ODT_CONFIG_CMD_DONE:
  2543. case HAL_SESSION_OD_CONFIG_CMD_DONE:
  2544. case HAL_SESSION_NCC_CONFIG_CMD_DONE:
  2545. case HAL_SESSION_ICA_CONFIG_CMD_DONE:
  2546. case HAL_SESSION_HCD_CONFIG_CMD_DONE:
  2547. case HAL_SESSION_DCM_CONFIG_CMD_DONE:
  2548. case HAL_SESSION_DC_CONFIG_CMD_DONE:
  2549. case HAL_SESSION_PYS_HCD_CONFIG_CMD_DONE:
  2550. case HAL_SESSION_DMM_PARAMS_CMD_DONE:
  2551. case HAL_SESSION_WARP_DS_PARAMS_CMD_DONE:
  2552. case HAL_SESSION_PERSIST_SET_DONE:
  2553. case HAL_SESSION_PERSIST_REL_DONE:
  2554. case HAL_SESSION_FD_CONFIG_CMD_DONE:
  2555. case HAL_SESSION_MODEL_BUF_CMD_DONE:
  2556. case HAL_SESSION_PROPERTY_INFO:
  2557. case HAL_SESSION_EVENT_CHANGE:
  2558. session_id = &info->response.cmd.session_id;
  2559. break;
  2560. case HAL_SESSION_ERROR:
  2561. session_id = &info->response.data.session_id;
  2562. break;
  2563. case HAL_RESPONSE_UNUSED:
  2564. default:
  2565. session_id = NULL;
  2566. break;
  2567. }
  2568. return session_id;
  2569. }
  2570. static void print_msg_hdr(void *hdr)
  2571. {
  2572. struct cvp_hfi_msg_session_hdr *new_hdr =
  2573. (struct cvp_hfi_msg_session_hdr *)hdr;
  2574. dprintk(CVP_HFI, "HFI MSG received: %x %x %x %x %x %x %x\n",
  2575. new_hdr->size, new_hdr->packet_type,
  2576. new_hdr->session_id,
  2577. new_hdr->client_data.transaction_id,
  2578. new_hdr->client_data.data1,
  2579. new_hdr->client_data.data2,
  2580. new_hdr->error_type);
  2581. }
  2582. static int __response_handler(struct iris_hfi_device *device)
  2583. {
  2584. struct msm_cvp_cb_info *packets;
  2585. int packet_count = 0;
  2586. u8 *raw_packet = NULL;
  2587. bool requeue_pm_work = true;
  2588. if (!device || device->state != IRIS_STATE_INIT)
  2589. return 0;
  2590. packets = device->response_pkt;
  2591. raw_packet = device->raw_packet;
  2592. if (!raw_packet || !packets) {
  2593. dprintk(CVP_ERR,
  2594. "%s: Invalid args : Res packet = %p, Raw packet = %p\n",
  2595. __func__, packets, raw_packet);
  2596. return 0;
  2597. }
  2598. if (device->intr_status & CVP_FATAL_INTR_BMSK) {
  2599. struct cvp_hfi_sfr_struct *vsfr = (struct cvp_hfi_sfr_struct *)
  2600. device->sfr.align_virtual_addr;
  2601. struct msm_cvp_cb_info info = {
  2602. .response_type = HAL_SYS_WATCHDOG_TIMEOUT,
  2603. .response.cmd = {
  2604. .device_id = device->device_id,
  2605. }
  2606. };
  2607. if (vsfr)
  2608. dprintk(CVP_ERR, "SFR Message from FW: %s\n",
  2609. vsfr->rg_data);
  2610. if (device->intr_status & CVP_WRAPPER_INTR_MASK_CPU_NOC_BMSK)
  2611. dprintk(CVP_ERR, "Received Xtensa NOC error\n");
  2612. if (device->intr_status & CVP_WRAPPER_INTR_MASK_CORE_NOC_BMSK)
  2613. dprintk(CVP_ERR, "Received CVP core NOC error\n");
  2614. if (device->intr_status & CVP_WRAPPER_INTR_MASK_A2HWD_BMSK)
  2615. dprintk(CVP_ERR, "Received CVP watchdog timeout\n");
  2616. packets[packet_count++] = info;
  2617. goto exit;
  2618. }
  2619. /* Bleed the msg queue dry of packets */
  2620. while (!__iface_msgq_read(device, raw_packet)) {
  2621. void **session_id = NULL;
  2622. struct msm_cvp_cb_info *info = &packets[packet_count++];
  2623. struct cvp_hfi_msg_session_hdr *hdr =
  2624. (struct cvp_hfi_msg_session_hdr *)raw_packet;
  2625. int rc = 0;
  2626. print_msg_hdr(hdr);
  2627. rc = cvp_hfi_process_msg_packet(device->device_id,
  2628. raw_packet, info);
  2629. if (rc) {
  2630. dprintk(CVP_WARN,
  2631. "Corrupt/unknown packet found, discarding\n");
  2632. --packet_count;
  2633. continue;
  2634. } else if (info->response_type == HAL_NO_RESP) {
  2635. --packet_count;
  2636. continue;
  2637. }
  2638. /* Process the packet types that we're interested in */
  2639. process_system_msg(info, device, raw_packet);
  2640. session_id = get_session_id(info);
  2641. /*
  2642. * hfi_process_msg_packet provides a session_id that's a hashed
  2643. * value of struct cvp_hal_session, we need to coerce the hashed
  2644. * value back to pointer that we can use. Ideally, hfi_process\
  2645. * _msg_packet should take care of this, but it doesn't have
  2646. * required information for it
  2647. */
  2648. if (session_id) {
  2649. struct cvp_hal_session *session = NULL;
  2650. if (upper_32_bits((uintptr_t)*session_id) != 0) {
  2651. dprintk(CVP_ERR,
  2652. "Upper 32-bits != 0 for sess_id=%pK\n",
  2653. *session_id);
  2654. }
  2655. session = __get_session(device,
  2656. (u32)(uintptr_t)*session_id);
  2657. if (!session) {
  2658. dprintk(CVP_ERR, _INVALID_MSG_,
  2659. info->response_type,
  2660. *session_id);
  2661. --packet_count;
  2662. continue;
  2663. }
  2664. *session_id = session->session_id;
  2665. }
  2666. if (packet_count >= cvp_max_packets) {
  2667. dprintk(CVP_WARN,
  2668. "Too many packets in message queue!\n");
  2669. break;
  2670. }
  2671. /* do not read packets after sys error packet */
  2672. if (info->response_type == HAL_SYS_ERROR)
  2673. break;
  2674. }
  2675. if (requeue_pm_work && device->res->sw_power_collapsible) {
  2676. cancel_delayed_work(&iris_hfi_pm_work);
  2677. if (!queue_delayed_work(device->iris_pm_workq,
  2678. &iris_hfi_pm_work,
  2679. msecs_to_jiffies(
  2680. device->res->msm_cvp_pwr_collapse_delay))) {
  2681. dprintk(CVP_ERR, "PM work already scheduled\n");
  2682. }
  2683. }
  2684. exit:
  2685. __flush_debug_queue(device, raw_packet);
  2686. return packet_count;
  2687. }
  2688. static void iris_hfi_core_work_handler(struct work_struct *work)
  2689. {
  2690. struct msm_cvp_core *core;
  2691. struct iris_hfi_device *device;
  2692. int num_responses = 0, i = 0;
  2693. u32 intr_status;
  2694. static bool warning_on = true;
  2695. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  2696. if (core)
  2697. device = core->device->hfi_device_data;
  2698. else
  2699. return;
  2700. mutex_lock(&device->lock);
  2701. if (!__core_in_valid_state(device)) {
  2702. if (warning_on) {
  2703. dprintk(CVP_WARN, "%s Core not in init state\n",
  2704. __func__);
  2705. warning_on = false;
  2706. }
  2707. goto err_no_work;
  2708. }
  2709. warning_on = true;
  2710. if (!device->callback) {
  2711. dprintk(CVP_ERR, "No interrupt callback function: %pK\n",
  2712. device);
  2713. goto err_no_work;
  2714. }
  2715. if (__resume(device)) {
  2716. dprintk(CVP_ERR, "%s: Power enable failed\n", __func__);
  2717. goto err_no_work;
  2718. }
  2719. __core_clear_interrupt(device);
  2720. num_responses = __response_handler(device);
  2721. dprintk(CVP_HFI, "%s:: cvp_driver_debug num_responses = %d ",
  2722. __func__, num_responses);
  2723. err_no_work:
  2724. /* Keep the interrupt status before releasing device lock */
  2725. intr_status = device->intr_status;
  2726. mutex_unlock(&device->lock);
  2727. /*
  2728. * Issue the callbacks outside of the locked contex to preserve
  2729. * re-entrancy.
  2730. */
  2731. for (i = 0; !IS_ERR_OR_NULL(device->response_pkt) &&
  2732. i < num_responses; ++i) {
  2733. struct msm_cvp_cb_info *r = &device->response_pkt[i];
  2734. void *rsp = (void *)&r->response;
  2735. if (!__core_in_valid_state(device)) {
  2736. dprintk(CVP_ERR,
  2737. _INVALID_STATE_, (i + 1), num_responses);
  2738. break;
  2739. }
  2740. dprintk(CVP_HFI, "Processing response %d of %d, type %d\n",
  2741. (i + 1), num_responses, r->response_type);
  2742. device->callback(r->response_type, rsp);
  2743. }
  2744. /* We need re-enable the irq which was disabled in ISR handler */
  2745. if (!(intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  2746. enable_irq(device->cvp_hal_data->irq);
  2747. /*
  2748. * XXX: Don't add any code beyond here. Reacquiring locks after release
  2749. * it above doesn't guarantee the atomicity that we're aiming for.
  2750. */
  2751. }
  2752. static DECLARE_WORK(iris_hfi_work, iris_hfi_core_work_handler);
  2753. static irqreturn_t iris_hfi_isr(int irq, void *dev)
  2754. {
  2755. struct iris_hfi_device *device = dev;
  2756. disable_irq_nosync(irq);
  2757. queue_work(device->cvp_workq, &iris_hfi_work);
  2758. return IRQ_HANDLED;
  2759. }
  2760. static int __init_regs_and_interrupts(struct iris_hfi_device *device,
  2761. struct msm_cvp_platform_resources *res)
  2762. {
  2763. struct cvp_hal_data *hal = NULL;
  2764. int rc = 0;
  2765. rc = __check_core_registered(device, res->firmware_base,
  2766. (u8 *)(uintptr_t)res->register_base,
  2767. res->register_size, res->irq);
  2768. if (!rc) {
  2769. dprintk(CVP_ERR, "Core present/Already added\n");
  2770. rc = -EEXIST;
  2771. goto err_core_init;
  2772. }
  2773. hal = kzalloc(sizeof(*hal), GFP_KERNEL);
  2774. if (!hal) {
  2775. dprintk(CVP_ERR, "Failed to alloc\n");
  2776. rc = -ENOMEM;
  2777. goto err_core_init;
  2778. }
  2779. hal->irq = res->irq;
  2780. hal->firmware_base = res->firmware_base;
  2781. hal->register_base = devm_ioremap(&res->pdev->dev,
  2782. res->register_base, res->register_size);
  2783. hal->register_size = res->register_size;
  2784. if (!hal->register_base) {
  2785. dprintk(CVP_ERR,
  2786. "could not map reg addr %pa of size %d\n",
  2787. &res->register_base, res->register_size);
  2788. goto error_irq_fail;
  2789. }
  2790. if (res->gcc_reg_base) {
  2791. hal->gcc_reg_base = devm_ioremap(&res->pdev->dev,
  2792. res->gcc_reg_base, res->gcc_reg_size);
  2793. hal->gcc_reg_size = res->gcc_reg_size;
  2794. if (!hal->gcc_reg_base)
  2795. dprintk(CVP_ERR,
  2796. "could not map gcc reg addr %pa of size %d\n",
  2797. &res->gcc_reg_base, res->gcc_reg_size);
  2798. }
  2799. device->cvp_hal_data = hal;
  2800. rc = request_irq(res->irq, iris_hfi_isr, IRQF_TRIGGER_HIGH,
  2801. "msm_cvp", device);
  2802. if (unlikely(rc)) {
  2803. dprintk(CVP_ERR, "() :request_irq failed\n");
  2804. goto error_irq_fail;
  2805. }
  2806. disable_irq_nosync(res->irq);
  2807. dprintk(CVP_INFO,
  2808. "firmware_base = %pa, register_base = %pa, register_size = %d\n",
  2809. &res->firmware_base, &res->register_base,
  2810. res->register_size);
  2811. return rc;
  2812. error_irq_fail:
  2813. kfree(hal);
  2814. err_core_init:
  2815. return rc;
  2816. }
  2817. static inline void __deinit_clocks(struct iris_hfi_device *device)
  2818. {
  2819. struct clock_info *cl;
  2820. device->clk_freq = 0;
  2821. iris_hfi_for_each_clock_reverse(device, cl) {
  2822. if (cl->clk) {
  2823. clk_put(cl->clk);
  2824. cl->clk = NULL;
  2825. }
  2826. }
  2827. }
  2828. static inline int __init_clocks(struct iris_hfi_device *device)
  2829. {
  2830. int rc = 0;
  2831. struct clock_info *cl = NULL;
  2832. if (!device) {
  2833. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  2834. return -EINVAL;
  2835. }
  2836. iris_hfi_for_each_clock(device, cl) {
  2837. dprintk(CVP_PWR, "%s: scalable? %d, count %d\n",
  2838. cl->name, cl->has_scaling, cl->count);
  2839. }
  2840. iris_hfi_for_each_clock(device, cl) {
  2841. if (!cl->clk) {
  2842. cl->clk = clk_get(&device->res->pdev->dev, cl->name);
  2843. if (IS_ERR_OR_NULL(cl->clk)) {
  2844. dprintk(CVP_ERR,
  2845. "Failed to get clock: %s\n", cl->name);
  2846. rc = PTR_ERR(cl->clk) ?: -EINVAL;
  2847. cl->clk = NULL;
  2848. goto err_clk_get;
  2849. }
  2850. }
  2851. }
  2852. device->clk_freq = 0;
  2853. return 0;
  2854. err_clk_get:
  2855. __deinit_clocks(device);
  2856. return rc;
  2857. }
  2858. static int __handle_reset_clk(struct msm_cvp_platform_resources *res,
  2859. int reset_index, enum reset_state state,
  2860. enum power_state pwr_state)
  2861. {
  2862. int rc = 0;
  2863. struct reset_control *rst;
  2864. struct reset_info rst_info;
  2865. struct reset_set *rst_set = &res->reset_set;
  2866. if (!rst_set->reset_tbl)
  2867. return 0;
  2868. rst_info = rst_set->reset_tbl[reset_index];
  2869. rst = rst_info.rst;
  2870. dprintk(CVP_PWR, "reset_clk: name %s reset_state %d rst %pK ps=%d\n",
  2871. rst_set->reset_tbl[reset_index].name, state, rst, pwr_state);
  2872. switch (state) {
  2873. case INIT:
  2874. if (rst)
  2875. goto skip_reset_init;
  2876. rst = devm_reset_control_get(&res->pdev->dev,
  2877. rst_set->reset_tbl[reset_index].name);
  2878. if (IS_ERR(rst))
  2879. rc = PTR_ERR(rst);
  2880. rst_set->reset_tbl[reset_index].rst = rst;
  2881. break;
  2882. case ASSERT:
  2883. if (!rst) {
  2884. rc = PTR_ERR(rst);
  2885. goto failed_to_reset;
  2886. }
  2887. if (pwr_state != rst_info.required_state)
  2888. break;
  2889. rc = reset_control_assert(rst);
  2890. break;
  2891. case DEASSERT:
  2892. if (!rst) {
  2893. rc = PTR_ERR(rst);
  2894. goto failed_to_reset;
  2895. }
  2896. if (pwr_state != rst_info.required_state)
  2897. break;
  2898. rc = reset_control_deassert(rst);
  2899. break;
  2900. default:
  2901. dprintk(CVP_ERR, "Invalid reset request\n");
  2902. if (rc)
  2903. goto failed_to_reset;
  2904. }
  2905. return 0;
  2906. skip_reset_init:
  2907. failed_to_reset:
  2908. return rc;
  2909. }
  2910. static inline void __disable_unprepare_clks(struct iris_hfi_device *device)
  2911. {
  2912. struct clock_info *cl;
  2913. if (!device) {
  2914. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  2915. return;
  2916. }
  2917. iris_hfi_for_each_clock_reverse(device, cl) {
  2918. dprintk(CVP_PWR, "Clock: %s disable and unprepare\n",
  2919. cl->name);
  2920. clk_disable_unprepare(cl->clk);
  2921. }
  2922. }
  2923. static int reset_ahb2axi_bridge(struct iris_hfi_device *device)
  2924. {
  2925. int rc, i;
  2926. enum power_state s;
  2927. if (!device) {
  2928. dprintk(CVP_ERR, "NULL device\n");
  2929. rc = -EINVAL;
  2930. goto failed_to_reset;
  2931. }
  2932. if (device->power_enabled)
  2933. s = CVP_POWER_ON;
  2934. else
  2935. s = CVP_POWER_OFF;
  2936. for (i = 0; i < device->res->reset_set.count; i++) {
  2937. rc = __handle_reset_clk(device->res, i, ASSERT, s);
  2938. if (rc) {
  2939. dprintk(CVP_ERR,
  2940. "failed to assert reset clocks\n");
  2941. goto failed_to_reset;
  2942. }
  2943. /* wait for deassert */
  2944. usleep_range(1000, 1050);
  2945. rc = __handle_reset_clk(device->res, i, DEASSERT, s);
  2946. if (rc) {
  2947. dprintk(CVP_ERR,
  2948. "failed to deassert reset clocks\n");
  2949. goto failed_to_reset;
  2950. }
  2951. }
  2952. return 0;
  2953. failed_to_reset:
  2954. return rc;
  2955. }
  2956. static inline int __prepare_enable_clks(struct iris_hfi_device *device)
  2957. {
  2958. struct clock_info *cl = NULL, *cl_fail = NULL;
  2959. int rc = 0, c = 0;
  2960. if (!device) {
  2961. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  2962. return -EINVAL;
  2963. }
  2964. iris_hfi_for_each_clock(device, cl) {
  2965. /*
  2966. * For the clocks we control, set the rate prior to preparing
  2967. * them. Since we don't really have a load at this point, scale
  2968. * it to the lowest frequency possible
  2969. */
  2970. if (cl->has_scaling) {
  2971. if (device->mmrm_cvp != NULL) {
  2972. // set min freq and cur freq to 0;
  2973. rc = msm_cvp_mmrm_set_value_in_range(device, 0, 0);
  2974. if (rc)
  2975. dprintk(CVP_ERR,
  2976. "%s Failed to set clock rate for %s: %d\n",
  2977. __func__, cl->name, rc);
  2978. } else {
  2979. dprintk(CVP_PWR, "%s: set clock rate with clk_set_rate\n",
  2980. __func__);
  2981. clk_set_rate(cl->clk, clk_round_rate(cl->clk, 0));
  2982. }
  2983. }
  2984. rc = clk_prepare_enable(cl->clk);
  2985. if (rc) {
  2986. dprintk(CVP_ERR, "Failed to enable clocks\n");
  2987. cl_fail = cl;
  2988. goto fail_clk_enable;
  2989. }
  2990. c++;
  2991. dprintk(CVP_PWR, "Clock: %s prepared and enabled\n", cl->name);
  2992. }
  2993. return rc;
  2994. fail_clk_enable:
  2995. iris_hfi_for_each_clock_reverse_continue(device, cl, c) {
  2996. dprintk(CVP_ERR, "Clock: %s disable and unprepare\n",
  2997. cl->name);
  2998. clk_disable_unprepare(cl->clk);
  2999. }
  3000. return rc;
  3001. }
  3002. static void __deinit_bus(struct iris_hfi_device *device)
  3003. {
  3004. struct bus_info *bus = NULL;
  3005. if (!device)
  3006. return;
  3007. kfree(device->bus_vote.data);
  3008. device->bus_vote = CVP_DEFAULT_BUS_VOTE;
  3009. iris_hfi_for_each_bus_reverse(device, bus) {
  3010. dev_set_drvdata(bus->dev, NULL);
  3011. icc_put(bus->client);
  3012. bus->client = NULL;
  3013. }
  3014. }
  3015. static int __init_bus(struct iris_hfi_device *device)
  3016. {
  3017. struct bus_info *bus = NULL;
  3018. int rc = 0;
  3019. if (!device)
  3020. return -EINVAL;
  3021. iris_hfi_for_each_bus(device, bus) {
  3022. /*
  3023. * This is stupid, but there's no other easy way to ahold
  3024. * of struct bus_info in iris_hfi_devfreq_*()
  3025. */
  3026. WARN(dev_get_drvdata(bus->dev), "%s's drvdata already set\n",
  3027. dev_name(bus->dev));
  3028. dev_set_drvdata(bus->dev, device);
  3029. bus->client = icc_get(&device->res->pdev->dev,
  3030. bus->master, bus->slave);
  3031. if (IS_ERR_OR_NULL(bus->client)) {
  3032. rc = PTR_ERR(bus->client) ?: -EBADHANDLE;
  3033. dprintk(CVP_ERR, "Failed to register bus %s: %d\n",
  3034. bus->name, rc);
  3035. bus->client = NULL;
  3036. goto err_add_dev;
  3037. }
  3038. }
  3039. return 0;
  3040. err_add_dev:
  3041. __deinit_bus(device);
  3042. return rc;
  3043. }
  3044. static void __deinit_regulators(struct iris_hfi_device *device)
  3045. {
  3046. struct regulator_info *rinfo = NULL;
  3047. iris_hfi_for_each_regulator_reverse(device, rinfo) {
  3048. if (rinfo->regulator) {
  3049. regulator_put(rinfo->regulator);
  3050. rinfo->regulator = NULL;
  3051. }
  3052. }
  3053. }
  3054. static int __init_regulators(struct iris_hfi_device *device)
  3055. {
  3056. int rc = 0;
  3057. struct regulator_info *rinfo = NULL;
  3058. iris_hfi_for_each_regulator(device, rinfo) {
  3059. rinfo->regulator = regulator_get(&device->res->pdev->dev,
  3060. rinfo->name);
  3061. if (IS_ERR_OR_NULL(rinfo->regulator)) {
  3062. rc = PTR_ERR(rinfo->regulator) ?: -EBADHANDLE;
  3063. dprintk(CVP_ERR, "Failed to get regulator: %s\n",
  3064. rinfo->name);
  3065. rinfo->regulator = NULL;
  3066. goto err_reg_get;
  3067. }
  3068. }
  3069. return 0;
  3070. err_reg_get:
  3071. __deinit_regulators(device);
  3072. return rc;
  3073. }
  3074. static void __deinit_subcaches(struct iris_hfi_device *device)
  3075. {
  3076. struct subcache_info *sinfo = NULL;
  3077. if (!device) {
  3078. dprintk(CVP_ERR, "deinit_subcaches: invalid device %pK\n",
  3079. device);
  3080. goto exit;
  3081. }
  3082. if (!is_sys_cache_present(device))
  3083. goto exit;
  3084. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  3085. if (sinfo->subcache) {
  3086. dprintk(CVP_CORE, "deinit_subcaches: %s\n",
  3087. sinfo->name);
  3088. llcc_slice_putd(sinfo->subcache);
  3089. sinfo->subcache = NULL;
  3090. }
  3091. }
  3092. exit:
  3093. return;
  3094. }
  3095. static int __init_subcaches(struct iris_hfi_device *device)
  3096. {
  3097. int rc = 0;
  3098. struct subcache_info *sinfo = NULL;
  3099. if (!device) {
  3100. dprintk(CVP_ERR, "init_subcaches: invalid device %pK\n",
  3101. device);
  3102. return -EINVAL;
  3103. }
  3104. if (!is_sys_cache_present(device))
  3105. return 0;
  3106. iris_hfi_for_each_subcache(device, sinfo) {
  3107. if (!strcmp("cvp", sinfo->name)) {
  3108. sinfo->subcache = llcc_slice_getd(LLCC_CVP);
  3109. } else if (!strcmp("cvpfw", sinfo->name)) {
  3110. sinfo->subcache = llcc_slice_getd(LLCC_CVPFW);
  3111. } else {
  3112. dprintk(CVP_ERR, "Invalid subcache name %s\n",
  3113. sinfo->name);
  3114. }
  3115. if (IS_ERR_OR_NULL(sinfo->subcache)) {
  3116. rc = PTR_ERR(sinfo->subcache) ?
  3117. PTR_ERR(sinfo->subcache) : -EBADHANDLE;
  3118. dprintk(CVP_ERR,
  3119. "init_subcaches: invalid subcache: %s rc %d\n",
  3120. sinfo->name, rc);
  3121. sinfo->subcache = NULL;
  3122. goto err_subcache_get;
  3123. }
  3124. dprintk(CVP_CORE, "init_subcaches: %s\n",
  3125. sinfo->name);
  3126. }
  3127. return 0;
  3128. err_subcache_get:
  3129. __deinit_subcaches(device);
  3130. return rc;
  3131. }
  3132. static int __init_resources(struct iris_hfi_device *device,
  3133. struct msm_cvp_platform_resources *res)
  3134. {
  3135. int i, rc = 0;
  3136. rc = __init_regulators(device);
  3137. if (rc) {
  3138. dprintk(CVP_ERR, "Failed to get all regulators\n");
  3139. return -ENODEV;
  3140. }
  3141. rc = __init_clocks(device);
  3142. if (rc) {
  3143. dprintk(CVP_ERR, "Failed to init clocks\n");
  3144. rc = -ENODEV;
  3145. goto err_init_clocks;
  3146. }
  3147. for (i = 0; i < device->res->reset_set.count; i++) {
  3148. rc = __handle_reset_clk(res, i, INIT, 0);
  3149. if (rc) {
  3150. dprintk(CVP_ERR, "Failed to init reset clocks\n");
  3151. rc = -ENODEV;
  3152. goto err_init_reset_clk;
  3153. }
  3154. }
  3155. rc = __init_bus(device);
  3156. if (rc) {
  3157. dprintk(CVP_ERR, "Failed to init bus: %d\n", rc);
  3158. goto err_init_bus;
  3159. }
  3160. rc = __init_subcaches(device);
  3161. if (rc)
  3162. dprintk(CVP_WARN, "Failed to init subcaches: %d\n", rc);
  3163. device->sys_init_capabilities =
  3164. kzalloc(sizeof(struct msm_cvp_capability)
  3165. * CVP_MAX_SESSIONS, GFP_KERNEL);
  3166. return rc;
  3167. err_init_reset_clk:
  3168. err_init_bus:
  3169. __deinit_clocks(device);
  3170. err_init_clocks:
  3171. __deinit_regulators(device);
  3172. return rc;
  3173. }
  3174. static void __deinit_resources(struct iris_hfi_device *device)
  3175. {
  3176. __deinit_subcaches(device);
  3177. __deinit_bus(device);
  3178. __deinit_clocks(device);
  3179. __deinit_regulators(device);
  3180. kfree(device->sys_init_capabilities);
  3181. device->sys_init_capabilities = NULL;
  3182. }
  3183. static int __disable_regulator(struct regulator_info *rinfo,
  3184. struct iris_hfi_device *device)
  3185. {
  3186. int rc = 0;
  3187. dprintk(CVP_PWR, "Disabling regulator %s\n", rinfo->name);
  3188. /*
  3189. * This call is needed. Driver needs to acquire the control back
  3190. * from HW in order to disable the regualtor. Else the behavior
  3191. * is unknown.
  3192. */
  3193. rc = __acquire_regulator(rinfo, device);
  3194. if (rc) {
  3195. /*
  3196. * This is somewhat fatal, but nothing we can do
  3197. * about it. We can't disable the regulator w/o
  3198. * getting it back under s/w control
  3199. */
  3200. dprintk(CVP_WARN,
  3201. "Failed to acquire control on %s\n",
  3202. rinfo->name);
  3203. goto disable_regulator_failed;
  3204. }
  3205. rc = regulator_disable(rinfo->regulator);
  3206. if (rc) {
  3207. dprintk(CVP_WARN,
  3208. "Failed to disable %s: %d\n",
  3209. rinfo->name, rc);
  3210. goto disable_regulator_failed;
  3211. }
  3212. return 0;
  3213. disable_regulator_failed:
  3214. /* Bring attention to this issue */
  3215. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  3216. return rc;
  3217. }
  3218. static int __enable_hw_power_collapse(struct iris_hfi_device *device)
  3219. {
  3220. int rc = 0;
  3221. if (!msm_cvp_fw_low_power_mode) {
  3222. dprintk(CVP_PWR, "Not enabling hardware power collapse\n");
  3223. return 0;
  3224. }
  3225. rc = __hand_off_regulators(device);
  3226. if (rc)
  3227. dprintk(CVP_WARN,
  3228. "%s : Failed to enable HW power collapse %d\n",
  3229. __func__, rc);
  3230. return rc;
  3231. }
  3232. static int __enable_regulators(struct iris_hfi_device *device)
  3233. {
  3234. int rc = 0, c = 0;
  3235. struct regulator_info *rinfo;
  3236. dprintk(CVP_PWR, "Enabling regulators\n");
  3237. iris_hfi_for_each_regulator(device, rinfo) {
  3238. rc = regulator_enable(rinfo->regulator);
  3239. if (rc) {
  3240. dprintk(CVP_ERR, "Failed to enable %s: %d\n",
  3241. rinfo->name, rc);
  3242. goto err_reg_enable_failed;
  3243. }
  3244. dprintk(CVP_PWR, "Enabled regulator %s\n", rinfo->name);
  3245. c++;
  3246. }
  3247. return 0;
  3248. err_reg_enable_failed:
  3249. iris_hfi_for_each_regulator_reverse_continue(device, rinfo, c)
  3250. __disable_regulator(rinfo, device);
  3251. return rc;
  3252. }
  3253. static int __disable_regulators(struct iris_hfi_device *device)
  3254. {
  3255. struct regulator_info *rinfo;
  3256. dprintk(CVP_PWR, "Disabling regulators\n");
  3257. iris_hfi_for_each_regulator_reverse(device, rinfo) {
  3258. __disable_regulator(rinfo, device);
  3259. if (rinfo->has_hw_power_collapse)
  3260. regulator_set_mode(rinfo->regulator,
  3261. REGULATOR_MODE_NORMAL);
  3262. }
  3263. return 0;
  3264. }
  3265. static int __enable_subcaches(struct iris_hfi_device *device)
  3266. {
  3267. int rc = 0;
  3268. u32 c = 0;
  3269. struct subcache_info *sinfo;
  3270. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  3271. return 0;
  3272. /* Activate subcaches */
  3273. iris_hfi_for_each_subcache(device, sinfo) {
  3274. rc = llcc_slice_activate(sinfo->subcache);
  3275. if (rc) {
  3276. dprintk(CVP_WARN, "Failed to activate %s: %d\n",
  3277. sinfo->name, rc);
  3278. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  3279. goto err_activate_fail;
  3280. }
  3281. sinfo->isactive = true;
  3282. dprintk(CVP_CORE, "Activated subcache %s\n", sinfo->name);
  3283. c++;
  3284. }
  3285. dprintk(CVP_CORE, "Activated %d Subcaches to CVP\n", c);
  3286. return 0;
  3287. err_activate_fail:
  3288. __release_subcaches(device);
  3289. __disable_subcaches(device);
  3290. return 0;
  3291. }
  3292. static int __set_subcaches(struct iris_hfi_device *device)
  3293. {
  3294. int rc = 0;
  3295. u32 c = 0;
  3296. struct subcache_info *sinfo;
  3297. u32 resource[CVP_MAX_SUBCACHE_SIZE];
  3298. struct cvp_hfi_resource_syscache_info_type *sc_res_info;
  3299. struct cvp_hfi_resource_subcache_type *sc_res;
  3300. struct cvp_resource_hdr rhdr;
  3301. if (device->res->sys_cache_res_set || msm_cvp_syscache_disable) {
  3302. dprintk(CVP_CORE, "Subcaches already set or disabled\n");
  3303. return 0;
  3304. }
  3305. memset((void *)resource, 0x0, (sizeof(u32) * CVP_MAX_SUBCACHE_SIZE));
  3306. sc_res_info = (struct cvp_hfi_resource_syscache_info_type *)resource;
  3307. sc_res = &(sc_res_info->rg_subcache_entries[0]);
  3308. iris_hfi_for_each_subcache(device, sinfo) {
  3309. if (sinfo->isactive) {
  3310. sc_res[c].size = sinfo->subcache->slice_size;
  3311. sc_res[c].sc_id = sinfo->subcache->slice_id;
  3312. c++;
  3313. }
  3314. }
  3315. /* Set resource to CVP for activated subcaches */
  3316. if (c) {
  3317. dprintk(CVP_CORE, "Setting %d Subcaches\n", c);
  3318. rhdr.resource_handle = sc_res_info; /* cookie */
  3319. rhdr.resource_id = CVP_RESOURCE_SYSCACHE;
  3320. sc_res_info->num_entries = c;
  3321. rc = __core_set_resource(device, &rhdr, (void *)sc_res_info);
  3322. if (rc) {
  3323. dprintk(CVP_WARN, "Failed to set subcaches %d\n", rc);
  3324. goto err_fail_set_subacaches;
  3325. }
  3326. iris_hfi_for_each_subcache(device, sinfo) {
  3327. if (sinfo->isactive)
  3328. sinfo->isset = true;
  3329. }
  3330. dprintk(CVP_CORE, "Set Subcaches done to CVP\n");
  3331. device->res->sys_cache_res_set = true;
  3332. }
  3333. return 0;
  3334. err_fail_set_subacaches:
  3335. __disable_subcaches(device);
  3336. return 0;
  3337. }
  3338. static int __release_subcaches(struct iris_hfi_device *device)
  3339. {
  3340. struct subcache_info *sinfo;
  3341. int rc = 0;
  3342. u32 c = 0;
  3343. u32 resource[CVP_MAX_SUBCACHE_SIZE];
  3344. struct cvp_hfi_resource_syscache_info_type *sc_res_info;
  3345. struct cvp_hfi_resource_subcache_type *sc_res;
  3346. struct cvp_resource_hdr rhdr;
  3347. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  3348. return 0;
  3349. memset((void *)resource, 0x0, (sizeof(u32) * CVP_MAX_SUBCACHE_SIZE));
  3350. sc_res_info = (struct cvp_hfi_resource_syscache_info_type *)resource;
  3351. sc_res = &(sc_res_info->rg_subcache_entries[0]);
  3352. /* Release resource command to Iris */
  3353. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  3354. if (sinfo->isset) {
  3355. /* Update the entry */
  3356. sc_res[c].size = sinfo->subcache->slice_size;
  3357. sc_res[c].sc_id = sinfo->subcache->slice_id;
  3358. c++;
  3359. sinfo->isset = false;
  3360. }
  3361. }
  3362. if (c > 0) {
  3363. dprintk(CVP_CORE, "Releasing %d subcaches\n", c);
  3364. rhdr.resource_handle = sc_res_info; /* cookie */
  3365. rhdr.resource_id = CVP_RESOURCE_SYSCACHE;
  3366. rc = __core_release_resource(device, &rhdr);
  3367. if (rc)
  3368. dprintk(CVP_WARN,
  3369. "Failed to release %d subcaches\n", c);
  3370. }
  3371. device->res->sys_cache_res_set = false;
  3372. return 0;
  3373. }
  3374. static int __disable_subcaches(struct iris_hfi_device *device)
  3375. {
  3376. struct subcache_info *sinfo;
  3377. int rc = 0;
  3378. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  3379. return 0;
  3380. /* De-activate subcaches */
  3381. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  3382. if (sinfo->isactive) {
  3383. dprintk(CVP_CORE, "De-activate subcache %s\n",
  3384. sinfo->name);
  3385. rc = llcc_slice_deactivate(sinfo->subcache);
  3386. if (rc) {
  3387. dprintk(CVP_WARN,
  3388. "Failed to de-activate %s: %d\n",
  3389. sinfo->name, rc);
  3390. }
  3391. sinfo->isactive = false;
  3392. }
  3393. }
  3394. return 0;
  3395. }
  3396. static void interrupt_init_iris2(struct iris_hfi_device *device)
  3397. {
  3398. u32 mask_val = 0;
  3399. /* All interrupts should be disabled initially 0x1F6 : Reset value */
  3400. mask_val = __read_register(device, CVP_WRAPPER_INTR_MASK);
  3401. /* Write 0 to unmask CPU and WD interrupts */
  3402. mask_val &= ~(CVP_FATAL_INTR_BMSK | CVP_WRAPPER_INTR_MASK_A2HCPU_BMSK);
  3403. __write_register(device, CVP_WRAPPER_INTR_MASK, mask_val);
  3404. dprintk(CVP_REG, "Init irq: reg: %x, mask value %x\n",
  3405. CVP_WRAPPER_INTR_MASK, mask_val);
  3406. }
  3407. static void setup_dsp_uc_memmap_vpu5(struct iris_hfi_device *device)
  3408. {
  3409. /* initialize DSP QTBL & UCREGION with CPU queues */
  3410. __write_register(device, HFI_DSP_QTBL_ADDR,
  3411. (u32)device->dsp_iface_q_table.align_device_addr);
  3412. __write_register(device, HFI_DSP_UC_REGION_ADDR,
  3413. (u32)device->dsp_iface_q_table.align_device_addr);
  3414. __write_register(device, HFI_DSP_UC_REGION_SIZE,
  3415. device->dsp_iface_q_table.mem_data.size);
  3416. }
  3417. static void clock_config_on_enable_vpu5(struct iris_hfi_device *device)
  3418. {
  3419. __write_register(device, CVP_WRAPPER_CPU_CLOCK_CONFIG, 0);
  3420. }
  3421. static int __set_ubwc_config(struct iris_hfi_device *device)
  3422. {
  3423. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  3424. int rc = 0;
  3425. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  3426. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  3427. if (!device->res->ubwc_config)
  3428. return 0;
  3429. rc = call_hfi_pkt_op(device, sys_ubwc_config, pkt,
  3430. device->res->ubwc_config);
  3431. if (rc) {
  3432. dprintk(CVP_WARN,
  3433. "ubwc config setting to FW failed\n");
  3434. rc = -ENOTEMPTY;
  3435. goto fail_to_set_ubwc_config;
  3436. }
  3437. if (__iface_cmdq_write(device, pkt)) {
  3438. rc = -ENOTEMPTY;
  3439. goto fail_to_set_ubwc_config;
  3440. }
  3441. fail_to_set_ubwc_config:
  3442. return rc;
  3443. }
  3444. static int __iris_power_on(struct iris_hfi_device *device)
  3445. {
  3446. int rc = 0;
  3447. if (device->power_enabled)
  3448. return 0;
  3449. /* Vote for all hardware resources */
  3450. rc = __vote_buses(device, device->bus_vote.data,
  3451. device->bus_vote.data_count);
  3452. if (rc) {
  3453. dprintk(CVP_ERR, "Failed to vote buses, err: %d\n", rc);
  3454. goto fail_vote_buses;
  3455. }
  3456. rc = __enable_regulators(device);
  3457. if (rc) {
  3458. dprintk(CVP_ERR, "Failed to enable GDSC, err = %d\n", rc);
  3459. goto fail_enable_gdsc;
  3460. }
  3461. rc = call_iris_op(device, reset_ahb2axi_bridge, device);
  3462. if (rc) {
  3463. dprintk(CVP_ERR, "Failed to reset ahb2axi: %d\n", rc);
  3464. goto fail_enable_clks;
  3465. }
  3466. rc = __prepare_enable_clks(device);
  3467. if (rc) {
  3468. dprintk(CVP_ERR, "Failed to enable clocks: %d\n", rc);
  3469. goto fail_enable_clks;
  3470. }
  3471. rc = __scale_clocks(device);
  3472. if (rc) {
  3473. dprintk(CVP_WARN,
  3474. "Failed to scale clocks, perf may regress\n");
  3475. rc = 0;
  3476. }
  3477. /*Do not access registers before this point!*/
  3478. device->power_enabled = true;
  3479. dprintk(CVP_PWR, "Done with scaling\n");
  3480. /*
  3481. * Re-program all of the registers that get reset as a result of
  3482. * regulator_disable() and _enable()
  3483. */
  3484. __set_registers(device);
  3485. dprintk(CVP_CORE, "Done with register set\n");
  3486. call_iris_op(device, interrupt_init, device);
  3487. dprintk(CVP_CORE, "Done with interrupt enabling\n");
  3488. device->intr_status = 0;
  3489. enable_irq(device->cvp_hal_data->irq);
  3490. return rc;
  3491. fail_enable_clks:
  3492. __disable_regulators(device);
  3493. fail_enable_gdsc:
  3494. __unvote_buses(device);
  3495. fail_vote_buses:
  3496. device->power_enabled = false;
  3497. return rc;
  3498. }
  3499. void power_off_common(struct iris_hfi_device *device)
  3500. {
  3501. if (!device->power_enabled)
  3502. return;
  3503. if (!(device->intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  3504. disable_irq_nosync(device->cvp_hal_data->irq);
  3505. device->intr_status = 0;
  3506. __disable_unprepare_clks(device);
  3507. if (__disable_regulators(device))
  3508. dprintk(CVP_WARN, "Failed to disable regulators\n");
  3509. if (__unvote_buses(device))
  3510. dprintk(CVP_WARN, "Failed to unvote for buses\n");
  3511. device->power_enabled = false;
  3512. }
  3513. static inline int __suspend(struct iris_hfi_device *device)
  3514. {
  3515. int rc = 0;
  3516. if (!device) {
  3517. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  3518. return -EINVAL;
  3519. } else if (!device->power_enabled) {
  3520. dprintk(CVP_PWR, "Power already disabled\n");
  3521. return 0;
  3522. }
  3523. dprintk(CVP_PWR, "Entering suspend\n");
  3524. if (device->res->pm_qos_latency_us &&
  3525. cpu_latency_qos_request_active(&device->qos))
  3526. cpu_latency_qos_remove_request(&device->qos);
  3527. rc = __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_SUSPEND);
  3528. if (rc) {
  3529. dprintk(CVP_WARN, "Failed to suspend cvp core %d\n", rc);
  3530. goto err_tzbsp_suspend;
  3531. }
  3532. __disable_subcaches(device);
  3533. call_iris_op(device, power_off, device);
  3534. dprintk(CVP_PWR, "Iris power off\n");
  3535. return rc;
  3536. err_tzbsp_suspend:
  3537. return rc;
  3538. }
  3539. static void power_off_iris2(struct iris_hfi_device *device)
  3540. {
  3541. u32 lpi_status, reg_status = 0, count = 0, max_count = 1000;
  3542. u32 pc_ready, wfi_status, sbm_ln0_low;
  3543. u32 main_sbm_ln0_low, main_sbm_ln1_high;
  3544. if (!device->power_enabled || !device->res->sw_power_collapsible)
  3545. return;
  3546. if (!(device->intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  3547. disable_irq_nosync(device->cvp_hal_data->irq);
  3548. device->intr_status = 0;
  3549. /* HPG 6.1.2 Step 1 */
  3550. __write_register(device, CVP_CPU_CS_X2RPMh, 0x3);
  3551. /* HPG 6.1.2 Step 2, noc to low power */
  3552. __write_register(device, CVP_AON_WRAPPER_MVP_NOC_LPI_CONTROL, 0x1);
  3553. while (!reg_status && count < max_count) {
  3554. lpi_status =
  3555. __read_register(device,
  3556. CVP_AON_WRAPPER_MVP_NOC_LPI_STATUS);
  3557. reg_status = lpi_status & BIT(0);
  3558. /* Wait for noc lpi status to be set */
  3559. usleep_range(50, 100);
  3560. count++;
  3561. }
  3562. dprintk(CVP_PWR,
  3563. "Noc: lpi_status %x noc_status %x (count %d)\n",
  3564. lpi_status, reg_status, count);
  3565. if (count == max_count) {
  3566. wfi_status = __read_register(device, CVP_WRAPPER_CPU_STATUS);
  3567. pc_ready = __read_register(device, CVP_CTRL_STATUS);
  3568. sbm_ln0_low =
  3569. __read_register(device, CVP_NOC_SBM_SENSELN0_LOW);
  3570. main_sbm_ln0_low = __read_register(device,
  3571. CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN0_LOW);
  3572. main_sbm_ln1_high = __read_register(device,
  3573. CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN1_HIGH);
  3574. dprintk(CVP_WARN,
  3575. "NOC not in qaccept status %x %x %x %x %x %x %x\n",
  3576. reg_status, lpi_status, wfi_status, pc_ready,
  3577. sbm_ln0_low, main_sbm_ln0_low, main_sbm_ln1_high);
  3578. }
  3579. /* HPG 6.1.2 Step 3, debug bridge to low power BYPASSED */
  3580. /* HPG 6.1.2 Step 4, debug bridge to lpi release */
  3581. __write_register(device,
  3582. CVP_WRAPPER_DEBUG_BRIDGE_LPI_CONTROL, 0x0);
  3583. lpi_status = 0x1;
  3584. count = 0;
  3585. while (lpi_status && count < max_count) {
  3586. lpi_status = __read_register(device,
  3587. CVP_WRAPPER_DEBUG_BRIDGE_LPI_STATUS);
  3588. usleep_range(50, 100);
  3589. count++;
  3590. }
  3591. dprintk(CVP_PWR,
  3592. "DBLP Release: lpi_status %d(count %d)\n",
  3593. lpi_status, count);
  3594. if (count == max_count) {
  3595. dprintk(CVP_WARN,
  3596. "DBLP Release: lpi_status %x\n", lpi_status);
  3597. }
  3598. /* HPG 6.1.2 Step 6 */
  3599. __disable_unprepare_clks(device);
  3600. /*
  3601. * HPG 6.1.2 Step 7 & 8
  3602. * per new HPG update, core clock reset will be unnecessary
  3603. */
  3604. if (__unvote_buses(device))
  3605. dprintk(CVP_WARN, "Failed to unvote for buses\n");
  3606. /* HPG 6.1.2 Step 5 */
  3607. if (__disable_regulators(device))
  3608. dprintk(CVP_WARN, "Failed to disable regulators\n");
  3609. /*Do not access registers after this point!*/
  3610. device->power_enabled = false;
  3611. }
  3612. static inline int __resume(struct iris_hfi_device *device)
  3613. {
  3614. int rc = 0;
  3615. u32 flags = 0, reg_gdsc, reg_cbcr;
  3616. if (!device) {
  3617. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  3618. return -EINVAL;
  3619. } else if (device->power_enabled) {
  3620. goto exit;
  3621. } else if (!__core_in_valid_state(device)) {
  3622. dprintk(CVP_PWR, "iris_hfi_device in deinit state.");
  3623. return -EINVAL;
  3624. }
  3625. dprintk(CVP_PWR, "Resuming from power collapse\n");
  3626. rc = __iris_power_on(device);
  3627. if (rc) {
  3628. dprintk(CVP_ERR, "Failed to power on cvp\n");
  3629. goto err_iris_power_on;
  3630. }
  3631. reg_gdsc = __read_register(device, CVP_CC_MVS1C_GDSCR);
  3632. reg_cbcr = __read_register(device, CVP_CC_MVS1C_CBCR);
  3633. if (!(reg_gdsc & 0x80000000) || (reg_cbcr & 0x80000000))
  3634. dprintk(CVP_ERR, "CVP power on failed gdsc %x cbcr %x\n",
  3635. reg_gdsc, reg_cbcr);
  3636. /* Reboot the firmware */
  3637. rc = __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_RESUME);
  3638. if (rc) {
  3639. dprintk(CVP_ERR, "Failed to resume cvp core %d\n", rc);
  3640. goto err_set_cvp_state;
  3641. }
  3642. __setup_ucregion_memory_map(device);
  3643. /* Wait for boot completion */
  3644. rc = __boot_firmware(device);
  3645. if (rc) {
  3646. dprintk(CVP_ERR, "Failed to reset cvp core\n");
  3647. goto err_reset_core;
  3648. }
  3649. /*
  3650. * Work around for H/W bug, need to reprogram these registers once
  3651. * firmware is out reset
  3652. */
  3653. __set_threshold_registers(device);
  3654. if (device->res->pm_qos_latency_us)
  3655. cpu_latency_qos_add_request(&device->qos,
  3656. device->res->pm_qos_latency_us);
  3657. __sys_set_debug(device, msm_cvp_fw_debug);
  3658. __enable_subcaches(device);
  3659. __set_subcaches(device);
  3660. __dsp_resume(device, flags);
  3661. dprintk(CVP_PWR, "Resumed from power collapse\n");
  3662. exit:
  3663. /* Don't reset skip_pc_count for SYS_PC_PREP cmd */
  3664. if (device->last_packet_type != HFI_CMD_SYS_PC_PREP)
  3665. device->skip_pc_count = 0;
  3666. return rc;
  3667. err_reset_core:
  3668. __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_SUSPEND);
  3669. err_set_cvp_state:
  3670. call_iris_op(device, power_off, device);
  3671. err_iris_power_on:
  3672. dprintk(CVP_ERR, "Failed to resume from power collapse\n");
  3673. return rc;
  3674. }
  3675. static int __load_fw(struct iris_hfi_device *device)
  3676. {
  3677. int rc = 0;
  3678. /* Initialize resources */
  3679. rc = __init_resources(device, device->res);
  3680. if (rc) {
  3681. dprintk(CVP_ERR, "Failed to init resources: %d\n", rc);
  3682. goto fail_init_res;
  3683. }
  3684. rc = __initialize_packetization(device);
  3685. if (rc) {
  3686. dprintk(CVP_ERR, "Failed to initialize packetization\n");
  3687. goto fail_init_pkt;
  3688. }
  3689. rc = __iris_power_on(device);
  3690. if (rc) {
  3691. dprintk(CVP_ERR, "Failed to power on iris in in load_fw\n");
  3692. goto fail_iris_power_on;
  3693. }
  3694. if ((!device->res->use_non_secure_pil && !device->res->firmware_base)
  3695. || device->res->use_non_secure_pil) {
  3696. rc = load_cvp_fw_impl(device);
  3697. if (rc)
  3698. goto fail_load_fw;
  3699. }
  3700. return rc;
  3701. fail_load_fw:
  3702. call_iris_op(device, power_off, device);
  3703. fail_iris_power_on:
  3704. fail_init_pkt:
  3705. __deinit_resources(device);
  3706. fail_init_res:
  3707. return rc;
  3708. }
  3709. static void __unload_fw(struct iris_hfi_device *device)
  3710. {
  3711. if (!device->resources.fw.cookie)
  3712. return;
  3713. cancel_delayed_work(&iris_hfi_pm_work);
  3714. if (device->state != IRIS_STATE_DEINIT)
  3715. flush_workqueue(device->iris_pm_workq);
  3716. unload_cvp_fw_impl(device);
  3717. __interface_queues_release(device);
  3718. call_iris_op(device, power_off, device);
  3719. __deinit_resources(device);
  3720. dprintk(CVP_WARN, "Firmware unloaded\n");
  3721. }
  3722. static int iris_hfi_get_fw_info(void *dev, struct cvp_hal_fw_info *fw_info)
  3723. {
  3724. int i = 0;
  3725. struct iris_hfi_device *device = dev;
  3726. if (!device || !fw_info) {
  3727. dprintk(CVP_ERR,
  3728. "%s Invalid parameter: device = %pK fw_info = %pK\n",
  3729. __func__, device, fw_info);
  3730. return -EINVAL;
  3731. }
  3732. mutex_lock(&device->lock);
  3733. while (cvp_driver->fw_version[i++] != 'V' && i < CVP_VERSION_LENGTH)
  3734. ;
  3735. if (i == CVP_VERSION_LENGTH - 1) {
  3736. dprintk(CVP_WARN, "Iris version string is not proper\n");
  3737. fw_info->version[0] = '\0';
  3738. goto fail_version_string;
  3739. }
  3740. memcpy(&fw_info->version[0], &cvp_driver->fw_version[0],
  3741. CVP_VERSION_LENGTH);
  3742. fw_info->version[CVP_VERSION_LENGTH - 1] = '\0';
  3743. fail_version_string:
  3744. dprintk(CVP_CORE, "F/W version retrieved : %s\n", fw_info->version);
  3745. fw_info->base_addr = device->cvp_hal_data->firmware_base;
  3746. fw_info->register_base = device->res->register_base;
  3747. fw_info->register_size = device->cvp_hal_data->register_size;
  3748. fw_info->irq = device->cvp_hal_data->irq;
  3749. mutex_unlock(&device->lock);
  3750. return 0;
  3751. }
  3752. static int iris_hfi_get_core_capabilities(void *dev)
  3753. {
  3754. dprintk(CVP_CORE, "%s not supported yet!\n", __func__);
  3755. return 0;
  3756. }
  3757. static u32 cvp_arp_test_regs[16];
  3758. static u32 cvp_dma_test_regs[512];
  3759. static const char * const mid_names[16] = {
  3760. "CVP_FW",
  3761. "ARP_DATA",
  3762. "CVP_OD_NON_PIXEL",
  3763. "CVP_OD_ORIG_PIXEL",
  3764. "CVP_OD_WR_PIXEL",
  3765. "CVP_MPU_ORIG_PIXEL",
  3766. "CVP_MPU_REF_PIXEL",
  3767. "CVP_MPU_NON_PIXEL",
  3768. "CVP_MPU_DFS",
  3769. "CVP_FDU_NON_PIXEL",
  3770. "CVP_FDU_PIXEL",
  3771. "CVP_ICA_PIXEL",
  3772. "Invalid",
  3773. "Invalid",
  3774. "Invalid",
  3775. "Invalid"
  3776. };
  3777. static void __print_reg_details(u32 val)
  3778. {
  3779. u32 mid, sid;
  3780. mid = (val >> 5) & 0xF;
  3781. sid = (val >> 2) & 0x7;
  3782. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG3_LOW: %#x\n", val);
  3783. dprintk(CVP_ERR, "Sub-client:%s, SID: %d\n", mid_names[mid], sid);
  3784. }
  3785. static void __noc_error_info_iris2(struct iris_hfi_device *device)
  3786. {
  3787. u32 val = 0, regi, i;
  3788. val = __read_register(device, CVP_NOC_ERR_SWID_LOW_OFFS);
  3789. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_SWID_LOW: %#x\n", val);
  3790. val = __read_register(device, CVP_NOC_ERR_SWID_HIGH_OFFS);
  3791. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_SWID_HIGH: %#x\n", val);
  3792. val = __read_register(device, CVP_NOC_ERR_MAINCTL_LOW_OFFS);
  3793. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_MAINCTL_LOW: %#x\n", val);
  3794. val = __read_register(device, CVP_NOC_ERR_ERRVLD_LOW_OFFS);
  3795. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRVLD_LOW: %#x\n", val);
  3796. val = __read_register(device, CVP_NOC_ERR_ERRCLR_LOW_OFFS);
  3797. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRCLR_LOW: %#x\n", val);
  3798. val = __read_register(device, CVP_NOC_ERR_ERRLOG0_LOW_OFFS);
  3799. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG0_LOW: %#x\n", val);
  3800. val = __read_register(device, CVP_NOC_ERR_ERRLOG0_HIGH_OFFS);
  3801. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG0_HIGH: %#x\n", val);
  3802. val = __read_register(device, CVP_NOC_ERR_ERRLOG1_LOW_OFFS);
  3803. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG1_LOW: %#x\n", val);
  3804. val = __read_register(device, CVP_NOC_ERR_ERRLOG1_HIGH_OFFS);
  3805. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG1_HIGH: %#x\n", val);
  3806. val = __read_register(device, CVP_NOC_ERR_ERRLOG2_LOW_OFFS);
  3807. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG2_LOW: %#x\n", val);
  3808. val = __read_register(device, CVP_NOC_ERR_ERRLOG2_HIGH_OFFS);
  3809. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG2_HIGH: %#x\n", val);
  3810. val = __read_register(device, CVP_NOC_ERR_ERRLOG3_LOW_OFFS);
  3811. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG3_LOW: %#x\n", val);
  3812. val = __read_register(device, CVP_NOC_ERR_ERRLOG3_HIGH_OFFS);
  3813. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG3_HIGH: %#x\n", val);
  3814. val = __read_register(device, CVP_NOC_CORE_ERR_SWID_LOW_OFFS);
  3815. dprintk(CVP_ERR, "CVP_NOC__CORE_ERL_MAIN_SWID_LOW: %#x\n", val);
  3816. val = __read_register(device, CVP_NOC_CORE_ERR_SWID_HIGH_OFFS);
  3817. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_SWID_HIGH: %#x\n", val);
  3818. val = __read_register(device, CVP_NOC_CORE_ERR_MAINCTL_LOW_OFFS);
  3819. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_MAINCTL_LOW: %#x\n", val);
  3820. val = __read_register(device, CVP_NOC_CORE_ERR_ERRVLD_LOW_OFFS);
  3821. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRVLD_LOW: %#x\n", val);
  3822. val = __read_register(device, CVP_NOC_CORE_ERR_ERRCLR_LOW_OFFS);
  3823. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRCLR_LOW: %#x\n", val);
  3824. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG0_LOW_OFFS);
  3825. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG0_LOW: %#x\n", val);
  3826. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG0_HIGH_OFFS);
  3827. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG0_HIGH: %#x\n", val);
  3828. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG1_LOW_OFFS);
  3829. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG1_LOW: %#x\n", val);
  3830. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG1_HIGH_OFFS);
  3831. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG1_HIGH: %#x\n", val);
  3832. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG2_LOW_OFFS);
  3833. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG2_LOW: %#x\n", val);
  3834. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG2_HIGH_OFFS);
  3835. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG2_HIGH: %#x\n", val);
  3836. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG3_LOW_OFFS);
  3837. __print_reg_details(val);
  3838. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG3_HIGH_OFFS);
  3839. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG3_HIGH: %#x\n", val);
  3840. #define CVP_SS_CLK_HALT 0x8
  3841. #define CVP_SS_CLK_EN 0xC
  3842. #define CVP_SS_ARP_TEST_BUS_CONTROL 0x700
  3843. #define CVP_SS_ARP_TEST_BUS_REGISTER 0x704
  3844. #define CVP_DMA_TEST_BUS_CONTROL 0x66A0
  3845. #define CVP_DMA_TEST_BUS_REGISTER 0x66A4
  3846. #define CVP_VPU_WRAPPER_CORE_CONFIG 0xB0088
  3847. __write_register(device, CVP_SS_CLK_HALT, 0);
  3848. __write_register(device, CVP_SS_CLK_EN, 0x3f);
  3849. __write_register(device, CVP_VPU_WRAPPER_CORE_CONFIG, 0);
  3850. for (i = 0; i < 15; i++) {
  3851. regi = 0xC0000000 + i;
  3852. __write_register(device, CVP_SS_ARP_TEST_BUS_CONTROL, regi);
  3853. val = __read_register(device, CVP_SS_ARP_TEST_BUS_REGISTER);
  3854. cvp_arp_test_regs[i] = val;
  3855. dprintk(CVP_ERR, "ARP_CTL:%x - %x\n", regi, val);
  3856. }
  3857. for (i = 0; i < 512; i++) {
  3858. regi = 0x40000000 + i;
  3859. __write_register(device, CVP_DMA_TEST_BUS_CONTROL, regi);
  3860. val = __read_register(device, CVP_DMA_TEST_BUS_REGISTER);
  3861. cvp_dma_test_regs[i] = val;
  3862. dprintk(CVP_ERR, "DMA_CTL:%x - %x\n", regi, val);
  3863. }
  3864. }
  3865. static int iris_hfi_noc_error_info(void *dev)
  3866. {
  3867. struct iris_hfi_device *device;
  3868. if (!dev) {
  3869. dprintk(CVP_ERR, "%s: null device\n", __func__);
  3870. return -EINVAL;
  3871. }
  3872. device = dev;
  3873. mutex_lock(&device->lock);
  3874. dprintk(CVP_ERR, "%s: non error information\n", __func__);
  3875. call_iris_op(device, noc_error_info, device);
  3876. mutex_unlock(&device->lock);
  3877. return 0;
  3878. }
  3879. static int __initialize_packetization(struct iris_hfi_device *device)
  3880. {
  3881. int rc = 0;
  3882. if (!device || !device->res) {
  3883. dprintk(CVP_ERR, "%s - invalid param\n", __func__);
  3884. return -EINVAL;
  3885. }
  3886. device->packetization_type = HFI_PACKETIZATION_4XX;
  3887. device->pkt_ops = cvp_hfi_get_pkt_ops_handle(
  3888. device->packetization_type);
  3889. if (!device->pkt_ops) {
  3890. rc = -EINVAL;
  3891. dprintk(CVP_ERR, "Failed to get pkt_ops handle\n");
  3892. }
  3893. return rc;
  3894. }
  3895. void __init_cvp_ops(struct iris_hfi_device *device)
  3896. {
  3897. device->vpu_ops = &iris2_ops;
  3898. }
  3899. static struct iris_hfi_device *__add_device(u32 device_id,
  3900. struct msm_cvp_platform_resources *res,
  3901. hfi_cmd_response_callback callback)
  3902. {
  3903. struct iris_hfi_device *hdevice = NULL;
  3904. int rc = 0;
  3905. if (!res || !callback) {
  3906. dprintk(CVP_ERR, "Invalid Parameters\n");
  3907. return NULL;
  3908. }
  3909. dprintk(CVP_INFO, "%s: device_id: %d\n", __func__, device_id);
  3910. hdevice = kzalloc(sizeof(*hdevice), GFP_KERNEL);
  3911. if (!hdevice) {
  3912. dprintk(CVP_ERR, "failed to allocate new device\n");
  3913. goto exit;
  3914. }
  3915. hdevice->response_pkt = kmalloc_array(cvp_max_packets,
  3916. sizeof(*hdevice->response_pkt), GFP_KERNEL);
  3917. if (!hdevice->response_pkt) {
  3918. dprintk(CVP_ERR, "failed to allocate response_pkt\n");
  3919. goto err_cleanup;
  3920. }
  3921. hdevice->raw_packet =
  3922. kzalloc(CVP_IFACEQ_VAR_HUGE_PKT_SIZE, GFP_KERNEL);
  3923. if (!hdevice->raw_packet) {
  3924. dprintk(CVP_ERR, "failed to allocate raw packet\n");
  3925. goto err_cleanup;
  3926. }
  3927. rc = __init_regs_and_interrupts(hdevice, res);
  3928. if (rc)
  3929. goto err_cleanup;
  3930. hdevice->res = res;
  3931. hdevice->device_id = device_id;
  3932. hdevice->callback = callback;
  3933. __init_cvp_ops(hdevice);
  3934. hdevice->cvp_workq = create_singlethread_workqueue(
  3935. "msm_cvp_workerq_iris");
  3936. if (!hdevice->cvp_workq) {
  3937. dprintk(CVP_ERR, ": create cvp workq failed\n");
  3938. goto err_cleanup;
  3939. }
  3940. hdevice->iris_pm_workq = create_singlethread_workqueue(
  3941. "pm_workerq_iris");
  3942. if (!hdevice->iris_pm_workq) {
  3943. dprintk(CVP_ERR, ": create pm workq failed\n");
  3944. goto err_cleanup;
  3945. }
  3946. mutex_init(&hdevice->lock);
  3947. INIT_LIST_HEAD(&hdevice->sess_head);
  3948. return hdevice;
  3949. err_cleanup:
  3950. if (hdevice->iris_pm_workq)
  3951. destroy_workqueue(hdevice->iris_pm_workq);
  3952. if (hdevice->cvp_workq)
  3953. destroy_workqueue(hdevice->cvp_workq);
  3954. kfree(hdevice->response_pkt);
  3955. kfree(hdevice->raw_packet);
  3956. kfree(hdevice);
  3957. exit:
  3958. return NULL;
  3959. }
  3960. static struct iris_hfi_device *__get_device(u32 device_id,
  3961. struct msm_cvp_platform_resources *res,
  3962. hfi_cmd_response_callback callback)
  3963. {
  3964. if (!res || !callback) {
  3965. dprintk(CVP_ERR, "Invalid params: %pK %pK\n", res, callback);
  3966. return NULL;
  3967. }
  3968. return __add_device(device_id, res, callback);
  3969. }
  3970. void cvp_iris_hfi_delete_device(void *device)
  3971. {
  3972. struct msm_cvp_core *core;
  3973. struct iris_hfi_device *dev = NULL;
  3974. if (!device)
  3975. return;
  3976. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  3977. if (core)
  3978. dev = core->device->hfi_device_data;
  3979. if (!dev)
  3980. return;
  3981. mutex_destroy(&dev->lock);
  3982. destroy_workqueue(dev->cvp_workq);
  3983. destroy_workqueue(dev->iris_pm_workq);
  3984. free_irq(dev->cvp_hal_data->irq, dev);
  3985. iounmap(dev->cvp_hal_data->register_base);
  3986. iounmap(dev->cvp_hal_data->gcc_reg_base);
  3987. kfree(dev->cvp_hal_data);
  3988. kfree(dev->response_pkt);
  3989. kfree(dev->raw_packet);
  3990. kfree(dev);
  3991. }
  3992. static int iris_hfi_validate_session(void *sess, const char *func)
  3993. {
  3994. struct cvp_hal_session *session = sess;
  3995. int rc = 0;
  3996. struct iris_hfi_device *device;
  3997. if (!session || !session->device) {
  3998. dprintk(CVP_ERR, " %s Invalid Params %pK\n", __func__, session);
  3999. return -EINVAL;
  4000. }
  4001. device = session->device;
  4002. mutex_lock(&device->lock);
  4003. if (!__is_session_valid(device, session, func))
  4004. rc = -ECONNRESET;
  4005. mutex_unlock(&device->lock);
  4006. return rc;
  4007. }
  4008. static void iris_init_hfi_callbacks(struct cvp_hfi_device *hdev)
  4009. {
  4010. hdev->core_init = iris_hfi_core_init;
  4011. hdev->core_release = iris_hfi_core_release;
  4012. hdev->core_trigger_ssr = iris_hfi_core_trigger_ssr;
  4013. hdev->session_init = iris_hfi_session_init;
  4014. hdev->session_end = iris_hfi_session_end;
  4015. hdev->session_abort = iris_hfi_session_abort;
  4016. hdev->session_clean = iris_hfi_session_clean;
  4017. hdev->session_set_buffers = iris_hfi_session_set_buffers;
  4018. hdev->session_release_buffers = iris_hfi_session_release_buffers;
  4019. hdev->session_send = iris_hfi_session_send;
  4020. hdev->session_flush = iris_hfi_session_flush;
  4021. hdev->scale_clocks = iris_hfi_scale_clocks;
  4022. hdev->vote_bus = iris_hfi_vote_buses;
  4023. hdev->get_fw_info = iris_hfi_get_fw_info;
  4024. hdev->get_core_capabilities = iris_hfi_get_core_capabilities;
  4025. hdev->suspend = iris_hfi_suspend;
  4026. hdev->resume = iris_hfi_resume;
  4027. hdev->flush_debug_queue = iris_hfi_flush_debug_queue;
  4028. hdev->noc_error_info = iris_hfi_noc_error_info;
  4029. hdev->validate_session = iris_hfi_validate_session;
  4030. }
  4031. int cvp_iris_hfi_initialize(struct cvp_hfi_device *hdev, u32 device_id,
  4032. struct msm_cvp_platform_resources *res,
  4033. hfi_cmd_response_callback callback)
  4034. {
  4035. int rc = 0;
  4036. if (!hdev || !res || !callback) {
  4037. dprintk(CVP_ERR, "Invalid params: %pK %pK %pK\n",
  4038. hdev, res, callback);
  4039. rc = -EINVAL;
  4040. goto err_iris_hfi_init;
  4041. }
  4042. hdev->hfi_device_data = __get_device(device_id, res, callback);
  4043. if (IS_ERR_OR_NULL(hdev->hfi_device_data)) {
  4044. rc = PTR_ERR(hdev->hfi_device_data) ?: -EINVAL;
  4045. goto err_iris_hfi_init;
  4046. }
  4047. iris_init_hfi_callbacks(hdev);
  4048. err_iris_hfi_init:
  4049. return rc;
  4050. }