qmi.c 93 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/soc/qcom/qmi.h>
  8. #include "bus.h"
  9. #include "debug.h"
  10. #include "main.h"
  11. #include "qmi.h"
  12. #include "genl.h"
  13. #define WLFW_SERVICE_INS_ID_V01 1
  14. #define WLFW_CLIENT_ID 0x4b4e454c
  15. #define BDF_FILE_NAME_PREFIX "bdwlan"
  16. #define ELF_BDF_FILE_NAME "bdwlan.elf"
  17. #define ELF_BDF_FILE_NAME_GF "bdwlang.elf"
  18. #define ELF_BDF_FILE_NAME_PREFIX "bdwlan.e"
  19. #define ELF_BDF_FILE_NAME_GF_PREFIX "bdwlang.e"
  20. #define BIN_BDF_FILE_NAME "bdwlan.bin"
  21. #define BIN_BDF_FILE_NAME_GF "bdwlang.bin"
  22. #define BIN_BDF_FILE_NAME_PREFIX "bdwlan.b"
  23. #define BIN_BDF_FILE_NAME_GF_PREFIX "bdwlang.b"
  24. #define REGDB_FILE_NAME "regdb.bin"
  25. #define HDS_FILE_NAME "hds.bin"
  26. #define CHIP_ID_GF_MASK 0x10
  27. #define QDSS_TRACE_CONFIG_FILE "qdss_trace_config"
  28. #ifdef CONFIG_CNSS2_DEBUG
  29. #define QDSS_DEBUG_FILE_STR "debug_"
  30. #else
  31. #define QDSS_DEBUG_FILE_STR ""
  32. #endif
  33. #define HW_V1_NUMBER "v1"
  34. #define HW_V2_NUMBER "v2"
  35. #define QMI_WLFW_TIMEOUT_MS (plat_priv->ctrl_params.qmi_timeout)
  36. #define QMI_WLFW_TIMEOUT_JF msecs_to_jiffies(QMI_WLFW_TIMEOUT_MS)
  37. #define COEX_TIMEOUT QMI_WLFW_TIMEOUT_JF
  38. #define IMS_TIMEOUT QMI_WLFW_TIMEOUT_JF
  39. #define QMI_WLFW_MAX_RECV_BUF_SIZE SZ_8K
  40. #define IMSPRIVATE_SERVICE_MAX_MSG_LEN SZ_8K
  41. #define DMS_QMI_MAX_MSG_LEN SZ_256
  42. #define MAX_SHADOW_REG_RESERVED 2
  43. #define MAX_NUM_SHADOW_REG_V3 (QMI_WLFW_MAX_NUM_SHADOW_REG_V3_USAGE_V01 - \
  44. MAX_SHADOW_REG_RESERVED)
  45. #define QMI_WLFW_MAC_READY_TIMEOUT_MS 50
  46. #define QMI_WLFW_MAC_READY_MAX_RETRY 200
  47. #ifdef CONFIG_CNSS2_DEBUG
  48. static bool ignore_qmi_failure;
  49. #define CNSS_QMI_ASSERT() CNSS_ASSERT(ignore_qmi_failure)
  50. void cnss_ignore_qmi_failure(bool ignore)
  51. {
  52. ignore_qmi_failure = ignore;
  53. }
  54. #else
  55. #define CNSS_QMI_ASSERT() do { } while (0)
  56. void cnss_ignore_qmi_failure(bool ignore) { }
  57. #endif
  58. static char *cnss_qmi_mode_to_str(enum cnss_driver_mode mode)
  59. {
  60. switch (mode) {
  61. case CNSS_MISSION:
  62. return "MISSION";
  63. case CNSS_FTM:
  64. return "FTM";
  65. case CNSS_EPPING:
  66. return "EPPING";
  67. case CNSS_WALTEST:
  68. return "WALTEST";
  69. case CNSS_OFF:
  70. return "OFF";
  71. case CNSS_CCPM:
  72. return "CCPM";
  73. case CNSS_QVIT:
  74. return "QVIT";
  75. case CNSS_CALIBRATION:
  76. return "CALIBRATION";
  77. default:
  78. return "UNKNOWN";
  79. }
  80. }
  81. static int qmi_send_wait(struct qmi_handle *qmi, void *req, void *rsp,
  82. struct qmi_elem_info *req_ei,
  83. struct qmi_elem_info *rsp_ei,
  84. int req_id, size_t req_len,
  85. unsigned long timeout)
  86. {
  87. struct qmi_txn txn;
  88. int ret;
  89. char *err_msg;
  90. struct qmi_response_type_v01 *resp = rsp;
  91. ret = qmi_txn_init(qmi, &txn, rsp_ei, rsp);
  92. if (ret < 0) {
  93. err_msg = "Qmi fail: fail to init txn,";
  94. goto out;
  95. }
  96. ret = qmi_send_request(qmi, NULL, &txn, req_id,
  97. req_len, req_ei, req);
  98. if (ret < 0) {
  99. qmi_txn_cancel(&txn);
  100. err_msg = "Qmi fail: fail to send req,";
  101. goto out;
  102. }
  103. ret = qmi_txn_wait(&txn, timeout);
  104. if (ret < 0) {
  105. err_msg = "Qmi fail: wait timeout,";
  106. goto out;
  107. } else if (resp->result != QMI_RESULT_SUCCESS_V01) {
  108. err_msg = "Qmi fail: request rejected,";
  109. cnss_pr_err("Qmi fail: respons with error:%d\n",
  110. resp->error);
  111. ret = -resp->result;
  112. goto out;
  113. }
  114. cnss_pr_dbg("req %x success\n", req_id);
  115. return 0;
  116. out:
  117. cnss_pr_err("%s req %x, ret %d\n", err_msg, req_id, ret);
  118. return ret;
  119. }
  120. static int cnss_wlfw_ind_register_send_sync(struct cnss_plat_data *plat_priv)
  121. {
  122. struct wlfw_ind_register_req_msg_v01 *req;
  123. struct wlfw_ind_register_resp_msg_v01 *resp;
  124. struct qmi_txn txn;
  125. int ret = 0;
  126. cnss_pr_dbg("Sending indication register message, state: 0x%lx\n",
  127. plat_priv->driver_state);
  128. req = kzalloc(sizeof(*req), GFP_KERNEL);
  129. if (!req)
  130. return -ENOMEM;
  131. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  132. if (!resp) {
  133. kfree(req);
  134. return -ENOMEM;
  135. }
  136. req->client_id_valid = 1;
  137. req->client_id = WLFW_CLIENT_ID;
  138. req->request_mem_enable_valid = 1;
  139. req->request_mem_enable = 1;
  140. req->fw_mem_ready_enable_valid = 1;
  141. req->fw_mem_ready_enable = 1;
  142. /* fw_ready indication is replaced by fw_init_done in HST/HSP */
  143. req->fw_init_done_enable_valid = 1;
  144. req->fw_init_done_enable = 1;
  145. req->pin_connect_result_enable_valid = 1;
  146. req->pin_connect_result_enable = 1;
  147. req->cal_done_enable_valid = 1;
  148. req->cal_done_enable = 1;
  149. req->qdss_trace_req_mem_enable_valid = 1;
  150. req->qdss_trace_req_mem_enable = 1;
  151. req->qdss_trace_save_enable_valid = 1;
  152. req->qdss_trace_save_enable = 1;
  153. req->qdss_trace_free_enable_valid = 1;
  154. req->qdss_trace_free_enable = 1;
  155. req->respond_get_info_enable_valid = 1;
  156. req->respond_get_info_enable = 1;
  157. req->wfc_call_twt_config_enable_valid = 1;
  158. req->wfc_call_twt_config_enable = 1;
  159. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  160. wlfw_ind_register_resp_msg_v01_ei, resp);
  161. if (ret < 0) {
  162. cnss_pr_err("Failed to initialize txn for indication register request, err: %d\n",
  163. ret);
  164. goto out;
  165. }
  166. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  167. QMI_WLFW_IND_REGISTER_REQ_V01,
  168. WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN,
  169. wlfw_ind_register_req_msg_v01_ei, req);
  170. if (ret < 0) {
  171. qmi_txn_cancel(&txn);
  172. cnss_pr_err("Failed to send indication register request, err: %d\n",
  173. ret);
  174. goto out;
  175. }
  176. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  177. if (ret < 0) {
  178. cnss_pr_err("Failed to wait for response of indication register request, err: %d\n",
  179. ret);
  180. goto out;
  181. }
  182. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  183. cnss_pr_err("Indication register request failed, result: %d, err: %d\n",
  184. resp->resp.result, resp->resp.error);
  185. ret = -resp->resp.result;
  186. goto out;
  187. }
  188. if (resp->fw_status_valid) {
  189. if (resp->fw_status & QMI_WLFW_ALREADY_REGISTERED_V01) {
  190. ret = -EALREADY;
  191. goto qmi_registered;
  192. }
  193. }
  194. kfree(req);
  195. kfree(resp);
  196. return 0;
  197. out:
  198. CNSS_QMI_ASSERT();
  199. qmi_registered:
  200. kfree(req);
  201. kfree(resp);
  202. return ret;
  203. }
  204. static void cnss_wlfw_host_cap_parse_mlo(struct cnss_plat_data *plat_priv,
  205. struct wlfw_host_cap_req_msg_v01 *req)
  206. {
  207. if (plat_priv->device_id == KIWI_DEVICE_ID) {
  208. req->mlo_capable_valid = 1;
  209. req->mlo_capable = 1;
  210. req->mlo_chip_id_valid = 1;
  211. req->mlo_chip_id = 0;
  212. req->mlo_group_id_valid = 1;
  213. req->mlo_group_id = 0;
  214. req->max_mlo_peer_valid = 1;
  215. /* Max peer number generally won't change for the same device
  216. * but needs to be synced with host driver.
  217. */
  218. req->max_mlo_peer = 32;
  219. req->mlo_num_chips_valid = 1;
  220. req->mlo_num_chips = 1;
  221. req->mlo_chip_info_valid = 1;
  222. req->mlo_chip_info[0].chip_id = 0;
  223. req->mlo_chip_info[0].num_local_links = 2;
  224. req->mlo_chip_info[0].hw_link_id[0] = 0;
  225. req->mlo_chip_info[0].hw_link_id[1] = 1;
  226. req->mlo_chip_info[0].valid_mlo_link_id[0] = 1;
  227. req->mlo_chip_info[0].valid_mlo_link_id[1] = 1;
  228. }
  229. }
  230. static int cnss_wlfw_host_cap_send_sync(struct cnss_plat_data *plat_priv)
  231. {
  232. struct wlfw_host_cap_req_msg_v01 *req;
  233. struct wlfw_host_cap_resp_msg_v01 *resp;
  234. struct qmi_txn txn;
  235. int ret = 0;
  236. u64 iova_start = 0, iova_size = 0,
  237. iova_ipa_start = 0, iova_ipa_size = 0;
  238. u64 feature_list = 0;
  239. cnss_pr_dbg("Sending host capability message, state: 0x%lx\n",
  240. plat_priv->driver_state);
  241. req = kzalloc(sizeof(*req), GFP_KERNEL);
  242. if (!req)
  243. return -ENOMEM;
  244. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  245. if (!resp) {
  246. kfree(req);
  247. return -ENOMEM;
  248. }
  249. req->num_clients_valid = 1;
  250. req->num_clients = 1;
  251. cnss_pr_dbg("Number of clients is %d\n", req->num_clients);
  252. req->wake_msi = cnss_bus_get_wake_irq(plat_priv);
  253. if (req->wake_msi) {
  254. cnss_pr_dbg("WAKE MSI base data is %d\n", req->wake_msi);
  255. req->wake_msi_valid = 1;
  256. }
  257. req->bdf_support_valid = 1;
  258. req->bdf_support = 1;
  259. req->m3_support_valid = 1;
  260. req->m3_support = 1;
  261. req->m3_cache_support_valid = 1;
  262. req->m3_cache_support = 1;
  263. req->cal_done_valid = 1;
  264. req->cal_done = plat_priv->cal_done;
  265. cnss_pr_dbg("Calibration done is %d\n", plat_priv->cal_done);
  266. if (!cnss_bus_get_iova(plat_priv, &iova_start, &iova_size) &&
  267. !cnss_bus_get_iova_ipa(plat_priv, &iova_ipa_start,
  268. &iova_ipa_size)) {
  269. req->ddr_range_valid = 1;
  270. req->ddr_range[0].start = iova_start;
  271. req->ddr_range[0].size = iova_size + iova_ipa_size;
  272. cnss_pr_dbg("Sending iova starting 0x%llx with size 0x%llx\n",
  273. req->ddr_range[0].start, req->ddr_range[0].size);
  274. }
  275. req->host_build_type_valid = 1;
  276. req->host_build_type = cnss_get_host_build_type();
  277. cnss_wlfw_host_cap_parse_mlo(plat_priv, req);
  278. ret = cnss_get_feature_list(plat_priv, &feature_list);
  279. if (!ret) {
  280. req->feature_list_valid = 1;
  281. req->feature_list = feature_list;
  282. cnss_pr_dbg("Sending feature list 0x%llx\n",
  283. req->feature_list);
  284. }
  285. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  286. wlfw_host_cap_resp_msg_v01_ei, resp);
  287. if (ret < 0) {
  288. cnss_pr_err("Failed to initialize txn for host capability request, err: %d\n",
  289. ret);
  290. goto out;
  291. }
  292. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  293. QMI_WLFW_HOST_CAP_REQ_V01,
  294. WLFW_HOST_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  295. wlfw_host_cap_req_msg_v01_ei, req);
  296. if (ret < 0) {
  297. qmi_txn_cancel(&txn);
  298. cnss_pr_err("Failed to send host capability request, err: %d\n",
  299. ret);
  300. goto out;
  301. }
  302. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  303. if (ret < 0) {
  304. cnss_pr_err("Failed to wait for response of host capability request, err: %d\n",
  305. ret);
  306. goto out;
  307. }
  308. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  309. cnss_pr_err("Host capability request failed, result: %d, err: %d\n",
  310. resp->resp.result, resp->resp.error);
  311. ret = -resp->resp.result;
  312. goto out;
  313. }
  314. kfree(req);
  315. kfree(resp);
  316. return 0;
  317. out:
  318. CNSS_QMI_ASSERT();
  319. kfree(req);
  320. kfree(resp);
  321. return ret;
  322. }
  323. int cnss_wlfw_respond_mem_send_sync(struct cnss_plat_data *plat_priv)
  324. {
  325. struct wlfw_respond_mem_req_msg_v01 *req;
  326. struct wlfw_respond_mem_resp_msg_v01 *resp;
  327. struct qmi_txn txn;
  328. struct cnss_fw_mem *fw_mem = plat_priv->fw_mem;
  329. int ret = 0, i;
  330. cnss_pr_dbg("Sending respond memory message, state: 0x%lx\n",
  331. plat_priv->driver_state);
  332. req = kzalloc(sizeof(*req), GFP_KERNEL);
  333. if (!req)
  334. return -ENOMEM;
  335. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  336. if (!resp) {
  337. kfree(req);
  338. return -ENOMEM;
  339. }
  340. req->mem_seg_len = plat_priv->fw_mem_seg_len;
  341. for (i = 0; i < req->mem_seg_len; i++) {
  342. if (!fw_mem[i].pa || !fw_mem[i].size) {
  343. if (fw_mem[i].type == 0) {
  344. cnss_pr_err("Invalid memory for FW type, segment = %d\n",
  345. i);
  346. ret = -EINVAL;
  347. goto out;
  348. }
  349. cnss_pr_err("Memory for FW is not available for type: %u\n",
  350. fw_mem[i].type);
  351. ret = -ENOMEM;
  352. goto out;
  353. }
  354. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  355. fw_mem[i].va, &fw_mem[i].pa,
  356. fw_mem[i].size, fw_mem[i].type);
  357. req->mem_seg[i].addr = fw_mem[i].pa;
  358. req->mem_seg[i].size = fw_mem[i].size;
  359. req->mem_seg[i].type = fw_mem[i].type;
  360. }
  361. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  362. wlfw_respond_mem_resp_msg_v01_ei, resp);
  363. if (ret < 0) {
  364. cnss_pr_err("Failed to initialize txn for respond memory request, err: %d\n",
  365. ret);
  366. goto out;
  367. }
  368. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  369. QMI_WLFW_RESPOND_MEM_REQ_V01,
  370. WLFW_RESPOND_MEM_REQ_MSG_V01_MAX_MSG_LEN,
  371. wlfw_respond_mem_req_msg_v01_ei, req);
  372. if (ret < 0) {
  373. qmi_txn_cancel(&txn);
  374. cnss_pr_err("Failed to send respond memory request, err: %d\n",
  375. ret);
  376. goto out;
  377. }
  378. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  379. if (ret < 0) {
  380. cnss_pr_err("Failed to wait for response of respond memory request, err: %d\n",
  381. ret);
  382. goto out;
  383. }
  384. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  385. cnss_pr_err("Respond memory request failed, result: %d, err: %d\n",
  386. resp->resp.result, resp->resp.error);
  387. ret = -resp->resp.result;
  388. goto out;
  389. }
  390. kfree(req);
  391. kfree(resp);
  392. return 0;
  393. out:
  394. CNSS_QMI_ASSERT();
  395. kfree(req);
  396. kfree(resp);
  397. return ret;
  398. }
  399. int cnss_wlfw_tgt_cap_send_sync(struct cnss_plat_data *plat_priv)
  400. {
  401. struct wlfw_cap_req_msg_v01 *req;
  402. struct wlfw_cap_resp_msg_v01 *resp;
  403. struct qmi_txn txn;
  404. char *fw_build_timestamp;
  405. int ret = 0, i;
  406. cnss_pr_dbg("Sending target capability message, state: 0x%lx\n",
  407. plat_priv->driver_state);
  408. req = kzalloc(sizeof(*req), GFP_KERNEL);
  409. if (!req)
  410. return -ENOMEM;
  411. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  412. if (!resp) {
  413. kfree(req);
  414. return -ENOMEM;
  415. }
  416. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  417. wlfw_cap_resp_msg_v01_ei, resp);
  418. if (ret < 0) {
  419. cnss_pr_err("Failed to initialize txn for target capability request, err: %d\n",
  420. ret);
  421. goto out;
  422. }
  423. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  424. QMI_WLFW_CAP_REQ_V01,
  425. WLFW_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  426. wlfw_cap_req_msg_v01_ei, req);
  427. if (ret < 0) {
  428. qmi_txn_cancel(&txn);
  429. cnss_pr_err("Failed to send respond target capability request, err: %d\n",
  430. ret);
  431. goto out;
  432. }
  433. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  434. if (ret < 0) {
  435. cnss_pr_err("Failed to wait for response of target capability request, err: %d\n",
  436. ret);
  437. goto out;
  438. }
  439. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  440. cnss_pr_err("Target capability request failed, result: %d, err: %d\n",
  441. resp->resp.result, resp->resp.error);
  442. ret = -resp->resp.result;
  443. goto out;
  444. }
  445. if (resp->chip_info_valid) {
  446. plat_priv->chip_info.chip_id = resp->chip_info.chip_id;
  447. plat_priv->chip_info.chip_family = resp->chip_info.chip_family;
  448. }
  449. if (resp->board_info_valid)
  450. plat_priv->board_info.board_id = resp->board_info.board_id;
  451. else
  452. plat_priv->board_info.board_id = 0xFF;
  453. if (resp->soc_info_valid)
  454. plat_priv->soc_info.soc_id = resp->soc_info.soc_id;
  455. if (resp->fw_version_info_valid) {
  456. plat_priv->fw_version_info.fw_version =
  457. resp->fw_version_info.fw_version;
  458. fw_build_timestamp = resp->fw_version_info.fw_build_timestamp;
  459. fw_build_timestamp[QMI_WLFW_MAX_TIMESTAMP_LEN] = '\0';
  460. strlcpy(plat_priv->fw_version_info.fw_build_timestamp,
  461. resp->fw_version_info.fw_build_timestamp,
  462. QMI_WLFW_MAX_TIMESTAMP_LEN + 1);
  463. }
  464. if (resp->fw_build_id_valid) {
  465. resp->fw_build_id[QMI_WLFW_MAX_BUILD_ID_LEN] = '\0';
  466. strlcpy(plat_priv->fw_build_id, resp->fw_build_id,
  467. QMI_WLFW_MAX_BUILD_ID_LEN + 1);
  468. }
  469. if (resp->voltage_mv_valid) {
  470. plat_priv->cpr_info.voltage = resp->voltage_mv;
  471. cnss_pr_dbg("Voltage for CPR: %dmV\n",
  472. plat_priv->cpr_info.voltage);
  473. cnss_update_cpr_info(plat_priv);
  474. }
  475. if (resp->time_freq_hz_valid) {
  476. plat_priv->device_freq_hz = resp->time_freq_hz;
  477. cnss_pr_dbg("Device frequency is %d HZ\n",
  478. plat_priv->device_freq_hz);
  479. }
  480. if (resp->otp_version_valid)
  481. plat_priv->otp_version = resp->otp_version;
  482. if (resp->dev_mem_info_valid) {
  483. for (i = 0; i < QMI_WLFW_MAX_DEV_MEM_NUM_V01; i++) {
  484. plat_priv->dev_mem_info[i].start =
  485. resp->dev_mem_info[i].start;
  486. plat_priv->dev_mem_info[i].size =
  487. resp->dev_mem_info[i].size;
  488. cnss_pr_buf("Device memory info[%d]: start = 0x%llx, size = 0x%llx\n",
  489. i, plat_priv->dev_mem_info[i].start,
  490. plat_priv->dev_mem_info[i].size);
  491. }
  492. }
  493. if (resp->fw_caps_valid)
  494. plat_priv->fw_pcie_gen_switch =
  495. !!(resp->fw_caps & QMI_WLFW_HOST_PCIE_GEN_SWITCH_V01);
  496. if (resp->hang_data_length_valid &&
  497. resp->hang_data_length &&
  498. resp->hang_data_length <= WLFW_MAX_HANG_EVENT_DATA_SIZE)
  499. plat_priv->hang_event_data_len = resp->hang_data_length;
  500. else
  501. plat_priv->hang_event_data_len = 0;
  502. if (resp->hang_data_addr_offset_valid)
  503. plat_priv->hang_data_addr_offset = resp->hang_data_addr_offset;
  504. else
  505. plat_priv->hang_data_addr_offset = 0;
  506. if (resp->ol_cpr_cfg_valid)
  507. cnss_aop_ol_cpr_cfg_setup(plat_priv, &resp->ol_cpr_cfg);
  508. cnss_pr_dbg("Target capability: chip_id: 0x%x, chip_family: 0x%x, board_id: 0x%x, soc_id: 0x%x, otp_version: 0x%x\n",
  509. plat_priv->chip_info.chip_id,
  510. plat_priv->chip_info.chip_family,
  511. plat_priv->board_info.board_id, plat_priv->soc_info.soc_id,
  512. plat_priv->otp_version);
  513. cnss_pr_dbg("fw_version: 0x%x, fw_build_timestamp: %s, fw_build_id: %s\n",
  514. plat_priv->fw_version_info.fw_version,
  515. plat_priv->fw_version_info.fw_build_timestamp,
  516. plat_priv->fw_build_id);
  517. cnss_pr_dbg("Hang event params, Length: 0x%x, Offset Address: 0x%x\n",
  518. plat_priv->hang_event_data_len,
  519. plat_priv->hang_data_addr_offset);
  520. kfree(req);
  521. kfree(resp);
  522. return 0;
  523. out:
  524. CNSS_QMI_ASSERT();
  525. kfree(req);
  526. kfree(resp);
  527. return ret;
  528. }
  529. static int cnss_get_bdf_file_name(struct cnss_plat_data *plat_priv,
  530. u32 bdf_type, char *filename,
  531. u32 filename_len)
  532. {
  533. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  534. int ret = 0;
  535. switch (bdf_type) {
  536. case CNSS_BDF_ELF:
  537. /* Board ID will be equal or less than 0xFF in GF mask case */
  538. if (plat_priv->board_info.board_id == 0xFF) {
  539. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  540. snprintf(filename_tmp, filename_len,
  541. ELF_BDF_FILE_NAME_GF);
  542. else
  543. snprintf(filename_tmp, filename_len,
  544. ELF_BDF_FILE_NAME);
  545. } else if (plat_priv->board_info.board_id < 0xFF) {
  546. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  547. snprintf(filename_tmp, filename_len,
  548. ELF_BDF_FILE_NAME_GF_PREFIX "%02x",
  549. plat_priv->board_info.board_id);
  550. else
  551. snprintf(filename_tmp, filename_len,
  552. ELF_BDF_FILE_NAME_PREFIX "%02x",
  553. plat_priv->board_info.board_id);
  554. } else {
  555. snprintf(filename_tmp, filename_len,
  556. BDF_FILE_NAME_PREFIX "%02x.e%02x",
  557. plat_priv->board_info.board_id >> 8 & 0xFF,
  558. plat_priv->board_info.board_id & 0xFF);
  559. }
  560. break;
  561. case CNSS_BDF_BIN:
  562. if (plat_priv->board_info.board_id == 0xFF) {
  563. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  564. snprintf(filename_tmp, filename_len,
  565. BIN_BDF_FILE_NAME_GF);
  566. else
  567. snprintf(filename_tmp, filename_len,
  568. BIN_BDF_FILE_NAME);
  569. } else if (plat_priv->board_info.board_id < 0xFF) {
  570. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  571. snprintf(filename_tmp, filename_len,
  572. BIN_BDF_FILE_NAME_GF_PREFIX "%02x",
  573. plat_priv->board_info.board_id);
  574. else
  575. snprintf(filename_tmp, filename_len,
  576. BIN_BDF_FILE_NAME_PREFIX "%02x",
  577. plat_priv->board_info.board_id);
  578. } else {
  579. snprintf(filename_tmp, filename_len,
  580. BDF_FILE_NAME_PREFIX "%02x.b%02x",
  581. plat_priv->board_info.board_id >> 8 & 0xFF,
  582. plat_priv->board_info.board_id & 0xFF);
  583. }
  584. break;
  585. case CNSS_BDF_REGDB:
  586. snprintf(filename_tmp, filename_len, REGDB_FILE_NAME);
  587. break;
  588. case CNSS_BDF_HDS:
  589. snprintf(filename_tmp, filename_len, HDS_FILE_NAME);
  590. break;
  591. default:
  592. cnss_pr_err("Invalid BDF type: %d\n",
  593. plat_priv->ctrl_params.bdf_type);
  594. ret = -EINVAL;
  595. break;
  596. }
  597. if (!ret)
  598. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  599. return ret;
  600. }
  601. int cnss_wlfw_bdf_dnld_send_sync(struct cnss_plat_data *plat_priv,
  602. u32 bdf_type)
  603. {
  604. struct wlfw_bdf_download_req_msg_v01 *req;
  605. struct wlfw_bdf_download_resp_msg_v01 *resp;
  606. struct qmi_txn txn;
  607. char filename[MAX_FIRMWARE_NAME_LEN];
  608. const struct firmware *fw_entry = NULL;
  609. const u8 *temp;
  610. unsigned int remaining;
  611. int ret = 0;
  612. cnss_pr_dbg("Sending BDF download message, state: 0x%lx, type: %d\n",
  613. plat_priv->driver_state, bdf_type);
  614. req = kzalloc(sizeof(*req), GFP_KERNEL);
  615. if (!req)
  616. return -ENOMEM;
  617. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  618. if (!resp) {
  619. kfree(req);
  620. return -ENOMEM;
  621. }
  622. ret = cnss_get_bdf_file_name(plat_priv, bdf_type,
  623. filename, sizeof(filename));
  624. if (ret)
  625. goto err_req_fw;
  626. if (bdf_type == CNSS_BDF_REGDB)
  627. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  628. filename);
  629. else
  630. ret = firmware_request_nowarn(&fw_entry, filename,
  631. &plat_priv->plat_dev->dev);
  632. if (ret) {
  633. cnss_pr_err("Failed to load BDF: %s, ret: %d\n", filename, ret);
  634. goto err_req_fw;
  635. }
  636. temp = fw_entry->data;
  637. remaining = fw_entry->size;
  638. cnss_pr_dbg("Downloading BDF: %s, size: %u\n", filename, remaining);
  639. while (remaining) {
  640. req->valid = 1;
  641. req->file_id_valid = 1;
  642. req->file_id = plat_priv->board_info.board_id;
  643. req->total_size_valid = 1;
  644. req->total_size = remaining;
  645. req->seg_id_valid = 1;
  646. req->data_valid = 1;
  647. req->end_valid = 1;
  648. req->bdf_type_valid = 1;
  649. req->bdf_type = bdf_type;
  650. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  651. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  652. } else {
  653. req->data_len = remaining;
  654. req->end = 1;
  655. }
  656. memcpy(req->data, temp, req->data_len);
  657. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  658. wlfw_bdf_download_resp_msg_v01_ei, resp);
  659. if (ret < 0) {
  660. cnss_pr_err("Failed to initialize txn for BDF download request, err: %d\n",
  661. ret);
  662. goto err_send;
  663. }
  664. ret = qmi_send_request
  665. (&plat_priv->qmi_wlfw, NULL, &txn,
  666. QMI_WLFW_BDF_DOWNLOAD_REQ_V01,
  667. WLFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  668. wlfw_bdf_download_req_msg_v01_ei, req);
  669. if (ret < 0) {
  670. qmi_txn_cancel(&txn);
  671. cnss_pr_err("Failed to send respond BDF download request, err: %d\n",
  672. ret);
  673. goto err_send;
  674. }
  675. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  676. if (ret < 0) {
  677. cnss_pr_err("Failed to wait for response of BDF download request, err: %d\n",
  678. ret);
  679. goto err_send;
  680. }
  681. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  682. cnss_pr_err("BDF download request failed, result: %d, err: %d\n",
  683. resp->resp.result, resp->resp.error);
  684. ret = -resp->resp.result;
  685. goto err_send;
  686. }
  687. remaining -= req->data_len;
  688. temp += req->data_len;
  689. req->seg_id++;
  690. }
  691. release_firmware(fw_entry);
  692. if (resp->host_bdf_data_valid) {
  693. /* QCA6490 enable S3E regulator for IPA configuration only */
  694. if (!(resp->host_bdf_data & QMI_WLFW_HW_XPA_V01))
  695. cnss_enable_int_pow_amp_vreg(plat_priv);
  696. plat_priv->cbc_file_download =
  697. resp->host_bdf_data & QMI_WLFW_CBC_FILE_DOWNLOAD_V01;
  698. cnss_pr_info("Host BDF config: HW_XPA: %d CalDB: %d\n",
  699. resp->host_bdf_data & QMI_WLFW_HW_XPA_V01,
  700. plat_priv->cbc_file_download);
  701. }
  702. kfree(req);
  703. kfree(resp);
  704. return 0;
  705. err_send:
  706. release_firmware(fw_entry);
  707. err_req_fw:
  708. if (!(bdf_type == CNSS_BDF_REGDB ||
  709. test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state) ||
  710. ret == -EAGAIN))
  711. CNSS_QMI_ASSERT();
  712. kfree(req);
  713. kfree(resp);
  714. return ret;
  715. }
  716. int cnss_wlfw_m3_dnld_send_sync(struct cnss_plat_data *plat_priv)
  717. {
  718. struct wlfw_m3_info_req_msg_v01 *req;
  719. struct wlfw_m3_info_resp_msg_v01 *resp;
  720. struct qmi_txn txn;
  721. struct cnss_fw_mem *m3_mem = &plat_priv->m3_mem;
  722. int ret = 0;
  723. cnss_pr_dbg("Sending M3 information message, state: 0x%lx\n",
  724. plat_priv->driver_state);
  725. req = kzalloc(sizeof(*req), GFP_KERNEL);
  726. if (!req)
  727. return -ENOMEM;
  728. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  729. if (!resp) {
  730. kfree(req);
  731. return -ENOMEM;
  732. }
  733. if (!m3_mem->pa || !m3_mem->size) {
  734. cnss_pr_err("Memory for M3 is not available\n");
  735. ret = -ENOMEM;
  736. goto out;
  737. }
  738. cnss_pr_dbg("M3 memory, va: 0x%pK, pa: %pa, size: 0x%zx\n",
  739. m3_mem->va, &m3_mem->pa, m3_mem->size);
  740. req->addr = plat_priv->m3_mem.pa;
  741. req->size = plat_priv->m3_mem.size;
  742. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  743. wlfw_m3_info_resp_msg_v01_ei, resp);
  744. if (ret < 0) {
  745. cnss_pr_err("Failed to initialize txn for M3 information request, err: %d\n",
  746. ret);
  747. goto out;
  748. }
  749. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  750. QMI_WLFW_M3_INFO_REQ_V01,
  751. WLFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  752. wlfw_m3_info_req_msg_v01_ei, req);
  753. if (ret < 0) {
  754. qmi_txn_cancel(&txn);
  755. cnss_pr_err("Failed to send M3 information request, err: %d\n",
  756. ret);
  757. goto out;
  758. }
  759. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  760. if (ret < 0) {
  761. cnss_pr_err("Failed to wait for response of M3 information request, err: %d\n",
  762. ret);
  763. goto out;
  764. }
  765. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  766. cnss_pr_err("M3 information request failed, result: %d, err: %d\n",
  767. resp->resp.result, resp->resp.error);
  768. ret = -resp->resp.result;
  769. goto out;
  770. }
  771. kfree(req);
  772. kfree(resp);
  773. return 0;
  774. out:
  775. CNSS_QMI_ASSERT();
  776. kfree(req);
  777. kfree(resp);
  778. return ret;
  779. }
  780. int cnss_wlfw_wlan_mac_req_send_sync(struct cnss_plat_data *plat_priv,
  781. u8 *mac, u32 mac_len)
  782. {
  783. struct wlfw_mac_addr_req_msg_v01 req;
  784. struct wlfw_mac_addr_resp_msg_v01 resp = {0};
  785. struct qmi_txn txn;
  786. int ret;
  787. if (!plat_priv || !mac || mac_len != QMI_WLFW_MAC_ADDR_SIZE_V01)
  788. return -EINVAL;
  789. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  790. wlfw_mac_addr_resp_msg_v01_ei, &resp);
  791. if (ret < 0) {
  792. cnss_pr_err("Failed to initialize txn for mac req, err: %d\n",
  793. ret);
  794. ret = -EIO;
  795. goto out;
  796. }
  797. cnss_pr_dbg("Sending WLAN mac req [%pM], state: 0x%lx\n",
  798. mac, plat_priv->driver_state);
  799. memcpy(req.mac_addr, mac, mac_len);
  800. req.mac_addr_valid = 1;
  801. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  802. QMI_WLFW_MAC_ADDR_REQ_V01,
  803. WLFW_MAC_ADDR_REQ_MSG_V01_MAX_MSG_LEN,
  804. wlfw_mac_addr_req_msg_v01_ei, &req);
  805. if (ret < 0) {
  806. qmi_txn_cancel(&txn);
  807. cnss_pr_err("Failed to send mac req, err: %d\n", ret);
  808. ret = -EIO;
  809. goto out;
  810. }
  811. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  812. if (ret < 0) {
  813. cnss_pr_err("Failed to wait for resp of mac req, err: %d\n",
  814. ret);
  815. ret = -EIO;
  816. goto out;
  817. }
  818. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  819. cnss_pr_err("WLAN mac req failed, result: %d, err: %d\n",
  820. resp.resp.result);
  821. ret = -resp.resp.result;
  822. }
  823. out:
  824. return ret;
  825. }
  826. int cnss_wlfw_qdss_data_send_sync(struct cnss_plat_data *plat_priv, char *file_name,
  827. u32 total_size)
  828. {
  829. int ret = 0;
  830. struct wlfw_qdss_trace_data_req_msg_v01 *req;
  831. struct wlfw_qdss_trace_data_resp_msg_v01 *resp;
  832. unsigned char *p_qdss_trace_data_temp, *p_qdss_trace_data = NULL;
  833. unsigned int remaining;
  834. struct qmi_txn txn;
  835. cnss_pr_dbg("%s\n", __func__);
  836. req = kzalloc(sizeof(*req), GFP_KERNEL);
  837. if (!req)
  838. return -ENOMEM;
  839. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  840. if (!resp) {
  841. kfree(req);
  842. return -ENOMEM;
  843. }
  844. p_qdss_trace_data = kzalloc(total_size, GFP_KERNEL);
  845. if (!p_qdss_trace_data) {
  846. ret = ENOMEM;
  847. goto end;
  848. }
  849. remaining = total_size;
  850. p_qdss_trace_data_temp = p_qdss_trace_data;
  851. while (remaining && resp->end == 0) {
  852. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  853. wlfw_qdss_trace_data_resp_msg_v01_ei, resp);
  854. if (ret < 0) {
  855. cnss_pr_err("Fail to init txn for QDSS trace resp %d\n",
  856. ret);
  857. goto fail;
  858. }
  859. ret = qmi_send_request
  860. (&plat_priv->qmi_wlfw, NULL, &txn,
  861. QMI_WLFW_QDSS_TRACE_DATA_REQ_V01,
  862. WLFW_QDSS_TRACE_DATA_REQ_MSG_V01_MAX_MSG_LEN,
  863. wlfw_qdss_trace_data_req_msg_v01_ei, req);
  864. if (ret < 0) {
  865. qmi_txn_cancel(&txn);
  866. cnss_pr_err("Fail to send QDSS trace data req %d\n",
  867. ret);
  868. goto fail;
  869. }
  870. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  871. if (ret < 0) {
  872. cnss_pr_err("QDSS trace resp wait failed with rc %d\n",
  873. ret);
  874. goto fail;
  875. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  876. cnss_pr_err("QMI QDSS trace request rejected, result:%d error:%d\n",
  877. resp->resp.result, resp->resp.error);
  878. ret = -resp->resp.result;
  879. goto fail;
  880. } else {
  881. ret = 0;
  882. }
  883. cnss_pr_dbg("%s: response total size %d data len %d",
  884. __func__, resp->total_size, resp->data_len);
  885. if ((resp->total_size_valid == 1 &&
  886. resp->total_size == total_size) &&
  887. (resp->seg_id_valid == 1 && resp->seg_id == req->seg_id) &&
  888. (resp->data_valid == 1 &&
  889. resp->data_len <= QMI_WLFW_MAX_DATA_SIZE_V01)) {
  890. memcpy(p_qdss_trace_data_temp,
  891. resp->data, resp->data_len);
  892. } else {
  893. cnss_pr_err("%s: Unmatched qdss trace data, Expect total_size %u, seg_id %u, Recv total_size_valid %u, total_size %u, seg_id_valid %u, seg_id %u, data_len_valid %u, data_len %u",
  894. __func__,
  895. total_size, req->seg_id,
  896. resp->total_size_valid,
  897. resp->total_size,
  898. resp->seg_id_valid,
  899. resp->seg_id,
  900. resp->data_valid,
  901. resp->data_len);
  902. ret = -1;
  903. goto fail;
  904. }
  905. remaining -= resp->data_len;
  906. p_qdss_trace_data_temp += resp->data_len;
  907. req->seg_id++;
  908. }
  909. if (remaining == 0 && (resp->end_valid && resp->end)) {
  910. ret = cnss_genl_send_msg(p_qdss_trace_data,
  911. CNSS_GENL_MSG_TYPE_QDSS, file_name,
  912. total_size);
  913. if (ret < 0) {
  914. cnss_pr_err("Fail to save QDSS trace data: %d\n",
  915. ret);
  916. ret = -1;
  917. goto fail;
  918. }
  919. } else {
  920. cnss_pr_err("%s: QDSS trace file corrupted: remaining %u, end_valid %u, end %u",
  921. __func__,
  922. remaining, resp->end_valid, resp->end);
  923. ret = -1;
  924. goto fail;
  925. }
  926. fail:
  927. kfree(p_qdss_trace_data);
  928. end:
  929. kfree(req);
  930. kfree(resp);
  931. return ret;
  932. }
  933. void cnss_get_qdss_cfg_filename(struct cnss_plat_data *plat_priv,
  934. char *filename, u32 filename_len)
  935. {
  936. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  937. char *debug_str = QDSS_DEBUG_FILE_STR;
  938. if (plat_priv->device_id == KIWI_DEVICE_ID)
  939. debug_str = "";
  940. if (plat_priv->device_version.major_version == FW_V2_NUMBER)
  941. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  942. "_%s%s.cfg", debug_str, HW_V2_NUMBER);
  943. else
  944. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  945. "_%s%s.cfg", debug_str, HW_V1_NUMBER);
  946. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  947. }
  948. int cnss_wlfw_qdss_dnld_send_sync(struct cnss_plat_data *plat_priv)
  949. {
  950. struct wlfw_qdss_trace_config_download_req_msg_v01 *req;
  951. struct wlfw_qdss_trace_config_download_resp_msg_v01 *resp;
  952. struct qmi_txn txn;
  953. const struct firmware *fw_entry = NULL;
  954. const u8 *temp;
  955. char qdss_cfg_filename[MAX_FIRMWARE_NAME_LEN];
  956. unsigned int remaining;
  957. int ret = 0;
  958. cnss_pr_dbg("Sending QDSS config download message, state: 0x%lx\n",
  959. plat_priv->driver_state);
  960. req = kzalloc(sizeof(*req), GFP_KERNEL);
  961. if (!req)
  962. return -ENOMEM;
  963. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  964. if (!resp) {
  965. kfree(req);
  966. return -ENOMEM;
  967. }
  968. cnss_get_qdss_cfg_filename(plat_priv, qdss_cfg_filename, sizeof(qdss_cfg_filename));
  969. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  970. qdss_cfg_filename);
  971. if (ret) {
  972. cnss_pr_dbg("Unable to load %s\n",
  973. qdss_cfg_filename);
  974. goto err_req_fw;
  975. }
  976. temp = fw_entry->data;
  977. remaining = fw_entry->size;
  978. cnss_pr_dbg("Downloading QDSS: %s, size: %u\n",
  979. qdss_cfg_filename, remaining);
  980. while (remaining) {
  981. req->total_size_valid = 1;
  982. req->total_size = remaining;
  983. req->seg_id_valid = 1;
  984. req->data_valid = 1;
  985. req->end_valid = 1;
  986. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  987. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  988. } else {
  989. req->data_len = remaining;
  990. req->end = 1;
  991. }
  992. memcpy(req->data, temp, req->data_len);
  993. ret = qmi_txn_init
  994. (&plat_priv->qmi_wlfw, &txn,
  995. wlfw_qdss_trace_config_download_resp_msg_v01_ei,
  996. resp);
  997. if (ret < 0) {
  998. cnss_pr_err("Failed to initialize txn for QDSS download request, err: %d\n",
  999. ret);
  1000. goto err_send;
  1001. }
  1002. ret = qmi_send_request
  1003. (&plat_priv->qmi_wlfw, NULL, &txn,
  1004. QMI_WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_V01,
  1005. WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  1006. wlfw_qdss_trace_config_download_req_msg_v01_ei, req);
  1007. if (ret < 0) {
  1008. qmi_txn_cancel(&txn);
  1009. cnss_pr_err("Failed to send respond QDSS download request, err: %d\n",
  1010. ret);
  1011. goto err_send;
  1012. }
  1013. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1014. if (ret < 0) {
  1015. cnss_pr_err("Failed to wait for response of QDSS download request, err: %d\n",
  1016. ret);
  1017. goto err_send;
  1018. }
  1019. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1020. cnss_pr_err("QDSS download request failed, result: %d, err: %d\n",
  1021. resp->resp.result, resp->resp.error);
  1022. ret = -resp->resp.result;
  1023. goto err_send;
  1024. }
  1025. remaining -= req->data_len;
  1026. temp += req->data_len;
  1027. req->seg_id++;
  1028. }
  1029. release_firmware(fw_entry);
  1030. kfree(req);
  1031. kfree(resp);
  1032. return 0;
  1033. err_send:
  1034. release_firmware(fw_entry);
  1035. err_req_fw:
  1036. kfree(req);
  1037. kfree(resp);
  1038. return ret;
  1039. }
  1040. static int wlfw_send_qdss_trace_mode_req
  1041. (struct cnss_plat_data *plat_priv,
  1042. enum wlfw_qdss_trace_mode_enum_v01 mode,
  1043. unsigned long long option)
  1044. {
  1045. int rc = 0;
  1046. int tmp = 0;
  1047. struct wlfw_qdss_trace_mode_req_msg_v01 *req;
  1048. struct wlfw_qdss_trace_mode_resp_msg_v01 *resp;
  1049. struct qmi_txn txn;
  1050. if (!plat_priv)
  1051. return -ENODEV;
  1052. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1053. if (!req)
  1054. return -ENOMEM;
  1055. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1056. if (!resp) {
  1057. kfree(req);
  1058. return -ENOMEM;
  1059. }
  1060. req->mode_valid = 1;
  1061. req->mode = mode;
  1062. req->option_valid = 1;
  1063. req->option = option;
  1064. tmp = plat_priv->hw_trc_override;
  1065. req->hw_trc_disable_override_valid = 1;
  1066. req->hw_trc_disable_override =
  1067. (tmp > QMI_PARAM_DISABLE_V01 ? QMI_PARAM_DISABLE_V01 :
  1068. (tmp < 0 ? QMI_PARAM_INVALID_V01 : tmp));
  1069. cnss_pr_dbg("%s: mode %u, option %llu, hw_trc_disable_override: %u",
  1070. __func__, mode, option, req->hw_trc_disable_override);
  1071. rc = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1072. wlfw_qdss_trace_mode_resp_msg_v01_ei, resp);
  1073. if (rc < 0) {
  1074. cnss_pr_err("Fail to init txn for QDSS Mode resp %d\n",
  1075. rc);
  1076. goto out;
  1077. }
  1078. rc = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1079. QMI_WLFW_QDSS_TRACE_MODE_REQ_V01,
  1080. WLFW_QDSS_TRACE_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1081. wlfw_qdss_trace_mode_req_msg_v01_ei, req);
  1082. if (rc < 0) {
  1083. qmi_txn_cancel(&txn);
  1084. cnss_pr_err("Fail to send QDSS Mode req %d\n", rc);
  1085. goto out;
  1086. }
  1087. rc = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1088. if (rc < 0) {
  1089. cnss_pr_err("QDSS Mode resp wait failed with rc %d\n",
  1090. rc);
  1091. goto out;
  1092. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1093. cnss_pr_err("QMI QDSS Mode request rejected, result:%d error:%d\n",
  1094. resp->resp.result, resp->resp.error);
  1095. rc = -resp->resp.result;
  1096. goto out;
  1097. }
  1098. kfree(resp);
  1099. kfree(req);
  1100. return rc;
  1101. out:
  1102. kfree(resp);
  1103. kfree(req);
  1104. CNSS_QMI_ASSERT();
  1105. return rc;
  1106. }
  1107. int wlfw_qdss_trace_start(struct cnss_plat_data *plat_priv)
  1108. {
  1109. return wlfw_send_qdss_trace_mode_req(plat_priv,
  1110. QMI_WLFW_QDSS_TRACE_ON_V01, 0);
  1111. }
  1112. int wlfw_qdss_trace_stop(struct cnss_plat_data *plat_priv, unsigned long long option)
  1113. {
  1114. return wlfw_send_qdss_trace_mode_req(plat_priv, QMI_WLFW_QDSS_TRACE_OFF_V01,
  1115. option);
  1116. }
  1117. int cnss_wlfw_wlan_mode_send_sync(struct cnss_plat_data *plat_priv,
  1118. enum cnss_driver_mode mode)
  1119. {
  1120. struct wlfw_wlan_mode_req_msg_v01 *req;
  1121. struct wlfw_wlan_mode_resp_msg_v01 *resp;
  1122. struct qmi_txn txn;
  1123. int ret = 0;
  1124. if (!plat_priv)
  1125. return -ENODEV;
  1126. cnss_pr_dbg("Sending mode message, mode: %s(%d), state: 0x%lx\n",
  1127. cnss_qmi_mode_to_str(mode), mode, plat_priv->driver_state);
  1128. if (mode == CNSS_OFF &&
  1129. test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1130. cnss_pr_dbg("Recovery is in progress, ignore mode off request\n");
  1131. return 0;
  1132. }
  1133. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1134. if (!req)
  1135. return -ENOMEM;
  1136. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1137. if (!resp) {
  1138. kfree(req);
  1139. return -ENOMEM;
  1140. }
  1141. req->mode = (enum wlfw_driver_mode_enum_v01)mode;
  1142. req->hw_debug_valid = 1;
  1143. req->hw_debug = 0;
  1144. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1145. wlfw_wlan_mode_resp_msg_v01_ei, resp);
  1146. if (ret < 0) {
  1147. cnss_pr_err("Failed to initialize txn for mode request, mode: %s(%d), err: %d\n",
  1148. cnss_qmi_mode_to_str(mode), mode, ret);
  1149. goto out;
  1150. }
  1151. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1152. QMI_WLFW_WLAN_MODE_REQ_V01,
  1153. WLFW_WLAN_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1154. wlfw_wlan_mode_req_msg_v01_ei, req);
  1155. if (ret < 0) {
  1156. qmi_txn_cancel(&txn);
  1157. cnss_pr_err("Failed to send mode request, mode: %s(%d), err: %d\n",
  1158. cnss_qmi_mode_to_str(mode), mode, ret);
  1159. goto out;
  1160. }
  1161. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1162. if (ret < 0) {
  1163. cnss_pr_err("Failed to wait for response of mode request, mode: %s(%d), err: %d\n",
  1164. cnss_qmi_mode_to_str(mode), mode, ret);
  1165. goto out;
  1166. }
  1167. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1168. cnss_pr_err("Mode request failed, mode: %s(%d), result: %d, err: %d\n",
  1169. cnss_qmi_mode_to_str(mode), mode, resp->resp.result,
  1170. resp->resp.error);
  1171. ret = -resp->resp.result;
  1172. goto out;
  1173. }
  1174. kfree(req);
  1175. kfree(resp);
  1176. return 0;
  1177. out:
  1178. if (mode == CNSS_OFF) {
  1179. cnss_pr_dbg("WLFW service is disconnected while sending mode off request\n");
  1180. ret = 0;
  1181. } else {
  1182. CNSS_QMI_ASSERT();
  1183. }
  1184. kfree(req);
  1185. kfree(resp);
  1186. return ret;
  1187. }
  1188. int cnss_wlfw_wlan_cfg_send_sync(struct cnss_plat_data *plat_priv,
  1189. struct cnss_wlan_enable_cfg *config,
  1190. const char *host_version)
  1191. {
  1192. struct wlfw_wlan_cfg_req_msg_v01 *req;
  1193. struct wlfw_wlan_cfg_resp_msg_v01 *resp;
  1194. struct qmi_txn txn;
  1195. u32 i;
  1196. int ret = 0;
  1197. if (!plat_priv)
  1198. return -ENODEV;
  1199. cnss_pr_dbg("Sending WLAN config message, state: 0x%lx\n",
  1200. plat_priv->driver_state);
  1201. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1202. if (!req)
  1203. return -ENOMEM;
  1204. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1205. if (!resp) {
  1206. kfree(req);
  1207. return -ENOMEM;
  1208. }
  1209. req->host_version_valid = 1;
  1210. strlcpy(req->host_version, host_version,
  1211. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  1212. req->tgt_cfg_valid = 1;
  1213. if (config->num_ce_tgt_cfg > QMI_WLFW_MAX_NUM_CE_V01)
  1214. req->tgt_cfg_len = QMI_WLFW_MAX_NUM_CE_V01;
  1215. else
  1216. req->tgt_cfg_len = config->num_ce_tgt_cfg;
  1217. for (i = 0; i < req->tgt_cfg_len; i++) {
  1218. req->tgt_cfg[i].pipe_num = config->ce_tgt_cfg[i].pipe_num;
  1219. req->tgt_cfg[i].pipe_dir = config->ce_tgt_cfg[i].pipe_dir;
  1220. req->tgt_cfg[i].nentries = config->ce_tgt_cfg[i].nentries;
  1221. req->tgt_cfg[i].nbytes_max = config->ce_tgt_cfg[i].nbytes_max;
  1222. req->tgt_cfg[i].flags = config->ce_tgt_cfg[i].flags;
  1223. }
  1224. req->svc_cfg_valid = 1;
  1225. if (config->num_ce_svc_pipe_cfg > QMI_WLFW_MAX_NUM_SVC_V01)
  1226. req->svc_cfg_len = QMI_WLFW_MAX_NUM_SVC_V01;
  1227. else
  1228. req->svc_cfg_len = config->num_ce_svc_pipe_cfg;
  1229. for (i = 0; i < req->svc_cfg_len; i++) {
  1230. req->svc_cfg[i].service_id = config->ce_svc_cfg[i].service_id;
  1231. req->svc_cfg[i].pipe_dir = config->ce_svc_cfg[i].pipe_dir;
  1232. req->svc_cfg[i].pipe_num = config->ce_svc_cfg[i].pipe_num;
  1233. }
  1234. if (plat_priv->device_id != KIWI_DEVICE_ID) {
  1235. req->shadow_reg_v2_valid = 1;
  1236. if (config->num_shadow_reg_v2_cfg >
  1237. QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01)
  1238. req->shadow_reg_v2_len = QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01;
  1239. else
  1240. req->shadow_reg_v2_len = config->num_shadow_reg_v2_cfg;
  1241. memcpy(req->shadow_reg_v2, config->shadow_reg_v2_cfg,
  1242. sizeof(struct wlfw_shadow_reg_v2_cfg_s_v01)
  1243. * req->shadow_reg_v2_len);
  1244. } else {
  1245. cnss_pr_dbg("Shadow reg v3 len: %d\n",
  1246. config->num_shadow_reg_v3_cfg);
  1247. req->shadow_reg_v3_valid = 1;
  1248. if (config->num_shadow_reg_v3_cfg >
  1249. MAX_NUM_SHADOW_REG_V3)
  1250. req->shadow_reg_v3_len = MAX_NUM_SHADOW_REG_V3;
  1251. else
  1252. req->shadow_reg_v3_len = config->num_shadow_reg_v3_cfg;
  1253. memcpy(req->shadow_reg_v3, config->shadow_reg_v3_cfg,
  1254. sizeof(struct wlfw_shadow_reg_v3_cfg_s_v01)
  1255. * req->shadow_reg_v3_len);
  1256. }
  1257. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1258. wlfw_wlan_cfg_resp_msg_v01_ei, resp);
  1259. if (ret < 0) {
  1260. cnss_pr_err("Failed to initialize txn for WLAN config request, err: %d\n",
  1261. ret);
  1262. goto out;
  1263. }
  1264. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1265. QMI_WLFW_WLAN_CFG_REQ_V01,
  1266. WLFW_WLAN_CFG_REQ_MSG_V01_MAX_MSG_LEN,
  1267. wlfw_wlan_cfg_req_msg_v01_ei, req);
  1268. if (ret < 0) {
  1269. qmi_txn_cancel(&txn);
  1270. cnss_pr_err("Failed to send WLAN config request, err: %d\n",
  1271. ret);
  1272. goto out;
  1273. }
  1274. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1275. if (ret < 0) {
  1276. cnss_pr_err("Failed to wait for response of WLAN config request, err: %d\n",
  1277. ret);
  1278. goto out;
  1279. }
  1280. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1281. cnss_pr_err("WLAN config request failed, result: %d, err: %d\n",
  1282. resp->resp.result, resp->resp.error);
  1283. ret = -resp->resp.result;
  1284. goto out;
  1285. }
  1286. kfree(req);
  1287. kfree(resp);
  1288. return 0;
  1289. out:
  1290. CNSS_QMI_ASSERT();
  1291. kfree(req);
  1292. kfree(resp);
  1293. return ret;
  1294. }
  1295. int cnss_wlfw_athdiag_read_send_sync(struct cnss_plat_data *plat_priv,
  1296. u32 offset, u32 mem_type,
  1297. u32 data_len, u8 *data)
  1298. {
  1299. struct wlfw_athdiag_read_req_msg_v01 *req;
  1300. struct wlfw_athdiag_read_resp_msg_v01 *resp;
  1301. struct qmi_txn txn;
  1302. int ret = 0;
  1303. if (!plat_priv)
  1304. return -ENODEV;
  1305. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1306. cnss_pr_err("Invalid parameters for athdiag read: data %pK, data_len %u\n",
  1307. data, data_len);
  1308. return -EINVAL;
  1309. }
  1310. cnss_pr_dbg("athdiag read: state 0x%lx, offset %x, mem_type %x, data_len %u\n",
  1311. plat_priv->driver_state, offset, mem_type, data_len);
  1312. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1313. if (!req)
  1314. return -ENOMEM;
  1315. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1316. if (!resp) {
  1317. kfree(req);
  1318. return -ENOMEM;
  1319. }
  1320. req->offset = offset;
  1321. req->mem_type = mem_type;
  1322. req->data_len = data_len;
  1323. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1324. wlfw_athdiag_read_resp_msg_v01_ei, resp);
  1325. if (ret < 0) {
  1326. cnss_pr_err("Failed to initialize txn for athdiag read request, err: %d\n",
  1327. ret);
  1328. goto out;
  1329. }
  1330. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1331. QMI_WLFW_ATHDIAG_READ_REQ_V01,
  1332. WLFW_ATHDIAG_READ_REQ_MSG_V01_MAX_MSG_LEN,
  1333. wlfw_athdiag_read_req_msg_v01_ei, req);
  1334. if (ret < 0) {
  1335. qmi_txn_cancel(&txn);
  1336. cnss_pr_err("Failed to send athdiag read request, err: %d\n",
  1337. ret);
  1338. goto out;
  1339. }
  1340. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1341. if (ret < 0) {
  1342. cnss_pr_err("Failed to wait for response of athdiag read request, err: %d\n",
  1343. ret);
  1344. goto out;
  1345. }
  1346. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1347. cnss_pr_err("Athdiag read request failed, result: %d, err: %d\n",
  1348. resp->resp.result, resp->resp.error);
  1349. ret = -resp->resp.result;
  1350. goto out;
  1351. }
  1352. if (!resp->data_valid || resp->data_len != data_len) {
  1353. cnss_pr_err("athdiag read data is invalid, data_valid = %u, data_len = %u\n",
  1354. resp->data_valid, resp->data_len);
  1355. ret = -EINVAL;
  1356. goto out;
  1357. }
  1358. memcpy(data, resp->data, resp->data_len);
  1359. kfree(req);
  1360. kfree(resp);
  1361. return 0;
  1362. out:
  1363. kfree(req);
  1364. kfree(resp);
  1365. return ret;
  1366. }
  1367. int cnss_wlfw_athdiag_write_send_sync(struct cnss_plat_data *plat_priv,
  1368. u32 offset, u32 mem_type,
  1369. u32 data_len, u8 *data)
  1370. {
  1371. struct wlfw_athdiag_write_req_msg_v01 *req;
  1372. struct wlfw_athdiag_write_resp_msg_v01 *resp;
  1373. struct qmi_txn txn;
  1374. int ret = 0;
  1375. if (!plat_priv)
  1376. return -ENODEV;
  1377. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1378. cnss_pr_err("Invalid parameters for athdiag write: data %pK, data_len %u\n",
  1379. data, data_len);
  1380. return -EINVAL;
  1381. }
  1382. cnss_pr_dbg("athdiag write: state 0x%lx, offset %x, mem_type %x, data_len %u, data %pK\n",
  1383. plat_priv->driver_state, offset, mem_type, data_len, data);
  1384. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1385. if (!req)
  1386. return -ENOMEM;
  1387. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1388. if (!resp) {
  1389. kfree(req);
  1390. return -ENOMEM;
  1391. }
  1392. req->offset = offset;
  1393. req->mem_type = mem_type;
  1394. req->data_len = data_len;
  1395. memcpy(req->data, data, data_len);
  1396. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1397. wlfw_athdiag_write_resp_msg_v01_ei, resp);
  1398. if (ret < 0) {
  1399. cnss_pr_err("Failed to initialize txn for athdiag write request, err: %d\n",
  1400. ret);
  1401. goto out;
  1402. }
  1403. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1404. QMI_WLFW_ATHDIAG_WRITE_REQ_V01,
  1405. WLFW_ATHDIAG_WRITE_REQ_MSG_V01_MAX_MSG_LEN,
  1406. wlfw_athdiag_write_req_msg_v01_ei, req);
  1407. if (ret < 0) {
  1408. qmi_txn_cancel(&txn);
  1409. cnss_pr_err("Failed to send athdiag write request, err: %d\n",
  1410. ret);
  1411. goto out;
  1412. }
  1413. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1414. if (ret < 0) {
  1415. cnss_pr_err("Failed to wait for response of athdiag write request, err: %d\n",
  1416. ret);
  1417. goto out;
  1418. }
  1419. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1420. cnss_pr_err("Athdiag write request failed, result: %d, err: %d\n",
  1421. resp->resp.result, resp->resp.error);
  1422. ret = -resp->resp.result;
  1423. goto out;
  1424. }
  1425. kfree(req);
  1426. kfree(resp);
  1427. return 0;
  1428. out:
  1429. kfree(req);
  1430. kfree(resp);
  1431. return ret;
  1432. }
  1433. int cnss_wlfw_ini_send_sync(struct cnss_plat_data *plat_priv,
  1434. u8 fw_log_mode)
  1435. {
  1436. struct wlfw_ini_req_msg_v01 *req;
  1437. struct wlfw_ini_resp_msg_v01 *resp;
  1438. struct qmi_txn txn;
  1439. int ret = 0;
  1440. if (!plat_priv)
  1441. return -ENODEV;
  1442. cnss_pr_dbg("Sending ini sync request, state: 0x%lx, fw_log_mode: %d\n",
  1443. plat_priv->driver_state, fw_log_mode);
  1444. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1445. if (!req)
  1446. return -ENOMEM;
  1447. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1448. if (!resp) {
  1449. kfree(req);
  1450. return -ENOMEM;
  1451. }
  1452. req->enablefwlog_valid = 1;
  1453. req->enablefwlog = fw_log_mode;
  1454. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1455. wlfw_ini_resp_msg_v01_ei, resp);
  1456. if (ret < 0) {
  1457. cnss_pr_err("Failed to initialize txn for ini request, fw_log_mode: %d, err: %d\n",
  1458. fw_log_mode, ret);
  1459. goto out;
  1460. }
  1461. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1462. QMI_WLFW_INI_REQ_V01,
  1463. WLFW_INI_REQ_MSG_V01_MAX_MSG_LEN,
  1464. wlfw_ini_req_msg_v01_ei, req);
  1465. if (ret < 0) {
  1466. qmi_txn_cancel(&txn);
  1467. cnss_pr_err("Failed to send ini request, fw_log_mode: %d, err: %d\n",
  1468. fw_log_mode, ret);
  1469. goto out;
  1470. }
  1471. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1472. if (ret < 0) {
  1473. cnss_pr_err("Failed to wait for response of ini request, fw_log_mode: %d, err: %d\n",
  1474. fw_log_mode, ret);
  1475. goto out;
  1476. }
  1477. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1478. cnss_pr_err("Ini request failed, fw_log_mode: %d, result: %d, err: %d\n",
  1479. fw_log_mode, resp->resp.result, resp->resp.error);
  1480. ret = -resp->resp.result;
  1481. goto out;
  1482. }
  1483. kfree(req);
  1484. kfree(resp);
  1485. return 0;
  1486. out:
  1487. kfree(req);
  1488. kfree(resp);
  1489. return ret;
  1490. }
  1491. int cnss_wlfw_send_pcie_gen_speed_sync(struct cnss_plat_data *plat_priv)
  1492. {
  1493. struct wlfw_pcie_gen_switch_req_msg_v01 req;
  1494. struct wlfw_pcie_gen_switch_resp_msg_v01 resp = {0};
  1495. struct qmi_txn txn;
  1496. int ret = 0;
  1497. if (!plat_priv)
  1498. return -ENODEV;
  1499. if (plat_priv->pcie_gen_speed == QMI_PCIE_GEN_SPEED_INVALID_V01 ||
  1500. !plat_priv->fw_pcie_gen_switch) {
  1501. cnss_pr_dbg("PCIE Gen speed not setup\n");
  1502. return 0;
  1503. }
  1504. cnss_pr_dbg("Sending PCIE Gen speed: %d state: 0x%lx\n",
  1505. plat_priv->pcie_gen_speed, plat_priv->driver_state);
  1506. req.pcie_speed = (enum wlfw_pcie_gen_speed_v01)
  1507. plat_priv->pcie_gen_speed;
  1508. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1509. wlfw_pcie_gen_switch_resp_msg_v01_ei, &resp);
  1510. if (ret < 0) {
  1511. cnss_pr_err("Failed to initialize txn for PCIE speed switch err: %d\n",
  1512. ret);
  1513. goto out;
  1514. }
  1515. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1516. QMI_WLFW_PCIE_GEN_SWITCH_REQ_V01,
  1517. WLFW_PCIE_GEN_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1518. wlfw_pcie_gen_switch_req_msg_v01_ei, &req);
  1519. if (ret < 0) {
  1520. qmi_txn_cancel(&txn);
  1521. cnss_pr_err("Failed to send PCIE speed switch, err: %d\n", ret);
  1522. goto out;
  1523. }
  1524. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1525. if (ret < 0) {
  1526. cnss_pr_err("Failed to wait for PCIE Gen switch resp, err: %d\n",
  1527. ret);
  1528. goto out;
  1529. }
  1530. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  1531. cnss_pr_err("PCIE Gen Switch req failed, Speed: %d, result: %d, err: %d\n",
  1532. plat_priv->pcie_gen_speed, resp.resp.result,
  1533. resp.resp.error);
  1534. ret = -resp.resp.result;
  1535. }
  1536. out:
  1537. /* Reset PCIE Gen speed after one time use */
  1538. plat_priv->pcie_gen_speed = QMI_PCIE_GEN_SPEED_INVALID_V01;
  1539. return ret;
  1540. }
  1541. int cnss_wlfw_antenna_switch_send_sync(struct cnss_plat_data *plat_priv)
  1542. {
  1543. struct wlfw_antenna_switch_req_msg_v01 *req;
  1544. struct wlfw_antenna_switch_resp_msg_v01 *resp;
  1545. struct qmi_txn txn;
  1546. int ret = 0;
  1547. if (!plat_priv)
  1548. return -ENODEV;
  1549. cnss_pr_dbg("Sending antenna switch sync request, state: 0x%lx\n",
  1550. plat_priv->driver_state);
  1551. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1552. if (!req)
  1553. return -ENOMEM;
  1554. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1555. if (!resp) {
  1556. kfree(req);
  1557. return -ENOMEM;
  1558. }
  1559. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1560. wlfw_antenna_switch_resp_msg_v01_ei, resp);
  1561. if (ret < 0) {
  1562. cnss_pr_err("Failed to initialize txn for antenna switch request, err: %d\n",
  1563. ret);
  1564. goto out;
  1565. }
  1566. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1567. QMI_WLFW_ANTENNA_SWITCH_REQ_V01,
  1568. WLFW_ANTENNA_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1569. wlfw_antenna_switch_req_msg_v01_ei, req);
  1570. if (ret < 0) {
  1571. qmi_txn_cancel(&txn);
  1572. cnss_pr_err("Failed to send antenna switch request, err: %d\n",
  1573. ret);
  1574. goto out;
  1575. }
  1576. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1577. if (ret < 0) {
  1578. cnss_pr_err("Failed to wait for response of antenna switch request, err: %d\n",
  1579. ret);
  1580. goto out;
  1581. }
  1582. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1583. cnss_pr_dbg("Antenna switch request failed, result: %d, err: %d\n",
  1584. resp->resp.result, resp->resp.error);
  1585. ret = -resp->resp.result;
  1586. goto out;
  1587. }
  1588. if (resp->antenna_valid)
  1589. plat_priv->antenna = resp->antenna;
  1590. cnss_pr_dbg("Antenna valid: %u, antenna 0x%llx\n",
  1591. resp->antenna_valid, resp->antenna);
  1592. kfree(req);
  1593. kfree(resp);
  1594. return 0;
  1595. out:
  1596. kfree(req);
  1597. kfree(resp);
  1598. return ret;
  1599. }
  1600. int cnss_wlfw_antenna_grant_send_sync(struct cnss_plat_data *plat_priv)
  1601. {
  1602. struct wlfw_antenna_grant_req_msg_v01 *req;
  1603. struct wlfw_antenna_grant_resp_msg_v01 *resp;
  1604. struct qmi_txn txn;
  1605. int ret = 0;
  1606. if (!plat_priv)
  1607. return -ENODEV;
  1608. cnss_pr_dbg("Sending antenna grant sync request, state: 0x%lx, grant 0x%llx\n",
  1609. plat_priv->driver_state, plat_priv->grant);
  1610. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1611. if (!req)
  1612. return -ENOMEM;
  1613. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1614. if (!resp) {
  1615. kfree(req);
  1616. return -ENOMEM;
  1617. }
  1618. req->grant_valid = 1;
  1619. req->grant = plat_priv->grant;
  1620. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1621. wlfw_antenna_grant_resp_msg_v01_ei, resp);
  1622. if (ret < 0) {
  1623. cnss_pr_err("Failed to initialize txn for antenna grant request, err: %d\n",
  1624. ret);
  1625. goto out;
  1626. }
  1627. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1628. QMI_WLFW_ANTENNA_GRANT_REQ_V01,
  1629. WLFW_ANTENNA_GRANT_REQ_MSG_V01_MAX_MSG_LEN,
  1630. wlfw_antenna_grant_req_msg_v01_ei, req);
  1631. if (ret < 0) {
  1632. qmi_txn_cancel(&txn);
  1633. cnss_pr_err("Failed to send antenna grant request, err: %d\n",
  1634. ret);
  1635. goto out;
  1636. }
  1637. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1638. if (ret < 0) {
  1639. cnss_pr_err("Failed to wait for response of antenna grant request, err: %d\n",
  1640. ret);
  1641. goto out;
  1642. }
  1643. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1644. cnss_pr_err("Antenna grant request failed, result: %d, err: %d\n",
  1645. resp->resp.result, resp->resp.error);
  1646. ret = -resp->resp.result;
  1647. goto out;
  1648. }
  1649. kfree(req);
  1650. kfree(resp);
  1651. return 0;
  1652. out:
  1653. kfree(req);
  1654. kfree(resp);
  1655. return ret;
  1656. }
  1657. int cnss_wlfw_qdss_trace_mem_info_send_sync(struct cnss_plat_data *plat_priv)
  1658. {
  1659. struct wlfw_qdss_trace_mem_info_req_msg_v01 *req;
  1660. struct wlfw_qdss_trace_mem_info_resp_msg_v01 *resp;
  1661. struct qmi_txn txn;
  1662. struct cnss_fw_mem *qdss_mem = plat_priv->qdss_mem;
  1663. int ret = 0;
  1664. int i;
  1665. cnss_pr_dbg("Sending QDSS trace mem info, state: 0x%lx\n",
  1666. plat_priv->driver_state);
  1667. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1668. if (!req)
  1669. return -ENOMEM;
  1670. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1671. if (!resp) {
  1672. kfree(req);
  1673. return -ENOMEM;
  1674. }
  1675. req->mem_seg_len = plat_priv->qdss_mem_seg_len;
  1676. for (i = 0; i < req->mem_seg_len; i++) {
  1677. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  1678. qdss_mem[i].va, &qdss_mem[i].pa,
  1679. qdss_mem[i].size, qdss_mem[i].type);
  1680. req->mem_seg[i].addr = qdss_mem[i].pa;
  1681. req->mem_seg[i].size = qdss_mem[i].size;
  1682. req->mem_seg[i].type = qdss_mem[i].type;
  1683. }
  1684. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1685. wlfw_qdss_trace_mem_info_resp_msg_v01_ei, resp);
  1686. if (ret < 0) {
  1687. cnss_pr_err("Fail to initialize txn for QDSS trace mem request: err %d\n",
  1688. ret);
  1689. goto out;
  1690. }
  1691. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1692. QMI_WLFW_QDSS_TRACE_MEM_INFO_REQ_V01,
  1693. WLFW_QDSS_TRACE_MEM_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  1694. wlfw_qdss_trace_mem_info_req_msg_v01_ei, req);
  1695. if (ret < 0) {
  1696. qmi_txn_cancel(&txn);
  1697. cnss_pr_err("Fail to send QDSS trace mem info request: err %d\n",
  1698. ret);
  1699. goto out;
  1700. }
  1701. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1702. if (ret < 0) {
  1703. cnss_pr_err("Fail to wait for response of QDSS trace mem info request, err %d\n",
  1704. ret);
  1705. goto out;
  1706. }
  1707. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1708. cnss_pr_err("QDSS trace mem info request failed, result: %d, err: %d\n",
  1709. resp->resp.result, resp->resp.error);
  1710. ret = -resp->resp.result;
  1711. goto out;
  1712. }
  1713. kfree(req);
  1714. kfree(resp);
  1715. return 0;
  1716. out:
  1717. kfree(req);
  1718. kfree(resp);
  1719. return ret;
  1720. }
  1721. static int cnss_wlfw_wfc_call_status_send_sync
  1722. (struct cnss_plat_data *plat_priv,
  1723. const struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg)
  1724. {
  1725. struct wlfw_wfc_call_status_req_msg_v01 *req;
  1726. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  1727. struct qmi_txn txn;
  1728. int ret = 0;
  1729. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1730. cnss_pr_err("Drop IMS WFC indication as FW not initialized\n");
  1731. return -EINVAL;
  1732. }
  1733. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1734. if (!req)
  1735. return -ENOMEM;
  1736. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1737. if (!resp) {
  1738. kfree(req);
  1739. return -ENOMEM;
  1740. }
  1741. /**
  1742. * WFC Call r1 design has CNSS as pass thru using opaque hex buffer.
  1743. * But in r2 update QMI structure is expanded and as an effect qmi
  1744. * decoded structures have padding. Thus we cannot use buffer design.
  1745. * For backward compatibility for r1 design copy only wfc_call_active
  1746. * value in hex buffer.
  1747. */
  1748. req->wfc_call_status_len = sizeof(ind_msg->wfc_call_active);
  1749. req->wfc_call_status[0] = ind_msg->wfc_call_active;
  1750. /* wfc_call_active is mandatory in IMS indication */
  1751. req->wfc_call_active_valid = 1;
  1752. req->wfc_call_active = ind_msg->wfc_call_active;
  1753. req->all_wfc_calls_held_valid = ind_msg->all_wfc_calls_held_valid;
  1754. req->all_wfc_calls_held = ind_msg->all_wfc_calls_held;
  1755. req->is_wfc_emergency_valid = ind_msg->is_wfc_emergency_valid;
  1756. req->is_wfc_emergency = ind_msg->is_wfc_emergency;
  1757. req->twt_ims_start_valid = ind_msg->twt_ims_start_valid;
  1758. req->twt_ims_start = ind_msg->twt_ims_start;
  1759. req->twt_ims_int_valid = ind_msg->twt_ims_int_valid;
  1760. req->twt_ims_int = ind_msg->twt_ims_int;
  1761. req->media_quality_valid = ind_msg->media_quality_valid;
  1762. req->media_quality =
  1763. (enum wlfw_wfc_media_quality_v01)ind_msg->media_quality;
  1764. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  1765. plat_priv->driver_state);
  1766. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1767. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  1768. if (ret < 0) {
  1769. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  1770. ret);
  1771. goto out;
  1772. }
  1773. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1774. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  1775. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  1776. wlfw_wfc_call_status_req_msg_v01_ei, req);
  1777. if (ret < 0) {
  1778. qmi_txn_cancel(&txn);
  1779. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  1780. ret);
  1781. goto out;
  1782. }
  1783. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1784. if (ret < 0) {
  1785. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  1786. ret);
  1787. goto out;
  1788. }
  1789. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1790. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  1791. resp->resp.result, resp->resp.error);
  1792. ret = -resp->resp.result;
  1793. goto out;
  1794. }
  1795. ret = 0;
  1796. out:
  1797. kfree(req);
  1798. kfree(resp);
  1799. return ret;
  1800. }
  1801. int cnss_wlfw_dynamic_feature_mask_send_sync(struct cnss_plat_data *plat_priv)
  1802. {
  1803. struct wlfw_dynamic_feature_mask_req_msg_v01 *req;
  1804. struct wlfw_dynamic_feature_mask_resp_msg_v01 *resp;
  1805. struct qmi_txn txn;
  1806. int ret = 0;
  1807. cnss_pr_dbg("Sending dynamic feature mask 0x%llx, state: 0x%lx\n",
  1808. plat_priv->dynamic_feature,
  1809. plat_priv->driver_state);
  1810. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1811. if (!req)
  1812. return -ENOMEM;
  1813. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1814. if (!resp) {
  1815. kfree(req);
  1816. return -ENOMEM;
  1817. }
  1818. req->mask_valid = 1;
  1819. req->mask = plat_priv->dynamic_feature;
  1820. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1821. wlfw_dynamic_feature_mask_resp_msg_v01_ei, resp);
  1822. if (ret < 0) {
  1823. cnss_pr_err("Fail to initialize txn for dynamic feature mask request: err %d\n",
  1824. ret);
  1825. goto out;
  1826. }
  1827. ret = qmi_send_request
  1828. (&plat_priv->qmi_wlfw, NULL, &txn,
  1829. QMI_WLFW_DYNAMIC_FEATURE_MASK_REQ_V01,
  1830. WLFW_DYNAMIC_FEATURE_MASK_REQ_MSG_V01_MAX_MSG_LEN,
  1831. wlfw_dynamic_feature_mask_req_msg_v01_ei, req);
  1832. if (ret < 0) {
  1833. qmi_txn_cancel(&txn);
  1834. cnss_pr_err("Fail to send dynamic feature mask request: err %d\n",
  1835. ret);
  1836. goto out;
  1837. }
  1838. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1839. if (ret < 0) {
  1840. cnss_pr_err("Fail to wait for response of dynamic feature mask request, err %d\n",
  1841. ret);
  1842. goto out;
  1843. }
  1844. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1845. cnss_pr_err("Dynamic feature mask request failed, result: %d, err: %d\n",
  1846. resp->resp.result, resp->resp.error);
  1847. ret = -resp->resp.result;
  1848. goto out;
  1849. }
  1850. out:
  1851. kfree(req);
  1852. kfree(resp);
  1853. return ret;
  1854. }
  1855. int cnss_wlfw_get_info_send_sync(struct cnss_plat_data *plat_priv, int type,
  1856. void *cmd, int cmd_len)
  1857. {
  1858. struct wlfw_get_info_req_msg_v01 *req;
  1859. struct wlfw_get_info_resp_msg_v01 *resp;
  1860. struct qmi_txn txn;
  1861. int ret = 0;
  1862. cnss_pr_buf("Sending get info message, type: %d, cmd length: %d, state: 0x%lx\n",
  1863. type, cmd_len, plat_priv->driver_state);
  1864. if (cmd_len > QMI_WLFW_MAX_DATA_SIZE_V01)
  1865. return -EINVAL;
  1866. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1867. if (!req)
  1868. return -ENOMEM;
  1869. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1870. if (!resp) {
  1871. kfree(req);
  1872. return -ENOMEM;
  1873. }
  1874. req->type = type;
  1875. req->data_len = cmd_len;
  1876. memcpy(req->data, cmd, req->data_len);
  1877. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1878. wlfw_get_info_resp_msg_v01_ei, resp);
  1879. if (ret < 0) {
  1880. cnss_pr_err("Failed to initialize txn for get info request, err: %d\n",
  1881. ret);
  1882. goto out;
  1883. }
  1884. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1885. QMI_WLFW_GET_INFO_REQ_V01,
  1886. WLFW_GET_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  1887. wlfw_get_info_req_msg_v01_ei, req);
  1888. if (ret < 0) {
  1889. qmi_txn_cancel(&txn);
  1890. cnss_pr_err("Failed to send get info request, err: %d\n",
  1891. ret);
  1892. goto out;
  1893. }
  1894. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1895. if (ret < 0) {
  1896. cnss_pr_err("Failed to wait for response of get info request, err: %d\n",
  1897. ret);
  1898. goto out;
  1899. }
  1900. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1901. cnss_pr_err("Get info request failed, result: %d, err: %d\n",
  1902. resp->resp.result, resp->resp.error);
  1903. ret = -resp->resp.result;
  1904. goto out;
  1905. }
  1906. kfree(req);
  1907. kfree(resp);
  1908. return 0;
  1909. out:
  1910. kfree(req);
  1911. kfree(resp);
  1912. return ret;
  1913. }
  1914. unsigned int cnss_get_qmi_timeout(struct cnss_plat_data *plat_priv)
  1915. {
  1916. return QMI_WLFW_TIMEOUT_MS;
  1917. }
  1918. static void cnss_wlfw_request_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  1919. struct sockaddr_qrtr *sq,
  1920. struct qmi_txn *txn, const void *data)
  1921. {
  1922. struct cnss_plat_data *plat_priv =
  1923. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  1924. const struct wlfw_request_mem_ind_msg_v01 *ind_msg = data;
  1925. int i;
  1926. cnss_pr_dbg("Received QMI WLFW request memory indication\n");
  1927. if (!txn) {
  1928. cnss_pr_err("Spurious indication\n");
  1929. return;
  1930. }
  1931. plat_priv->fw_mem_seg_len = ind_msg->mem_seg_len;
  1932. for (i = 0; i < plat_priv->fw_mem_seg_len; i++) {
  1933. cnss_pr_dbg("FW requests for memory, size: 0x%x, type: %u\n",
  1934. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  1935. plat_priv->fw_mem[i].type = ind_msg->mem_seg[i].type;
  1936. plat_priv->fw_mem[i].size = ind_msg->mem_seg[i].size;
  1937. if (plat_priv->fw_mem[i].type == CNSS_MEM_TYPE_DDR)
  1938. plat_priv->fw_mem[i].attrs |=
  1939. DMA_ATTR_FORCE_CONTIGUOUS;
  1940. if (plat_priv->fw_mem[i].type == CNSS_MEM_CAL_V01)
  1941. plat_priv->cal_mem = &plat_priv->fw_mem[i];
  1942. }
  1943. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_REQUEST_MEM,
  1944. 0, NULL);
  1945. }
  1946. static void cnss_wlfw_fw_mem_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  1947. struct sockaddr_qrtr *sq,
  1948. struct qmi_txn *txn, const void *data)
  1949. {
  1950. struct cnss_plat_data *plat_priv =
  1951. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  1952. cnss_pr_dbg("Received QMI WLFW FW memory ready indication\n");
  1953. if (!txn) {
  1954. cnss_pr_err("Spurious indication\n");
  1955. return;
  1956. }
  1957. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_READY,
  1958. 0, NULL);
  1959. }
  1960. /**
  1961. * cnss_wlfw_fw_ready_ind_cb: FW ready indication handler (Helium arch)
  1962. *
  1963. * This event is not required for HST/ HSP as FW calibration done is
  1964. * provided in QMI_WLFW_CAL_DONE_IND_V01
  1965. */
  1966. static void cnss_wlfw_fw_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  1967. struct sockaddr_qrtr *sq,
  1968. struct qmi_txn *txn, const void *data)
  1969. {
  1970. struct cnss_plat_data *plat_priv =
  1971. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  1972. struct cnss_cal_info *cal_info;
  1973. if (!txn) {
  1974. cnss_pr_err("Spurious indication\n");
  1975. return;
  1976. }
  1977. if (plat_priv->device_id == QCA6390_DEVICE_ID ||
  1978. plat_priv->device_id == QCA6490_DEVICE_ID) {
  1979. cnss_pr_dbg("Ignore FW Ready Indication for HST/HSP");
  1980. return;
  1981. }
  1982. cnss_pr_dbg("Received QMI WLFW FW ready indication.\n");
  1983. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  1984. if (!cal_info)
  1985. return;
  1986. cal_info->cal_status = CNSS_CAL_DONE;
  1987. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  1988. 0, cal_info);
  1989. }
  1990. static void cnss_wlfw_fw_init_done_ind_cb(struct qmi_handle *qmi_wlfw,
  1991. struct sockaddr_qrtr *sq,
  1992. struct qmi_txn *txn, const void *data)
  1993. {
  1994. struct cnss_plat_data *plat_priv =
  1995. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  1996. cnss_pr_dbg("Received QMI WLFW FW initialization done indication\n");
  1997. if (!txn) {
  1998. cnss_pr_err("Spurious indication\n");
  1999. return;
  2000. }
  2001. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_READY, 0, NULL);
  2002. }
  2003. static void cnss_wlfw_pin_result_ind_cb(struct qmi_handle *qmi_wlfw,
  2004. struct sockaddr_qrtr *sq,
  2005. struct qmi_txn *txn, const void *data)
  2006. {
  2007. struct cnss_plat_data *plat_priv =
  2008. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2009. const struct wlfw_pin_connect_result_ind_msg_v01 *ind_msg = data;
  2010. cnss_pr_dbg("Received QMI WLFW pin connect result indication\n");
  2011. if (!txn) {
  2012. cnss_pr_err("Spurious indication\n");
  2013. return;
  2014. }
  2015. if (ind_msg->pwr_pin_result_valid)
  2016. plat_priv->pin_result.fw_pwr_pin_result =
  2017. ind_msg->pwr_pin_result;
  2018. if (ind_msg->phy_io_pin_result_valid)
  2019. plat_priv->pin_result.fw_phy_io_pin_result =
  2020. ind_msg->phy_io_pin_result;
  2021. if (ind_msg->rf_pin_result_valid)
  2022. plat_priv->pin_result.fw_rf_pin_result = ind_msg->rf_pin_result;
  2023. cnss_pr_dbg("Pin connect Result: pwr_pin: 0x%x phy_io_pin: 0x%x rf_io_pin: 0x%x\n",
  2024. ind_msg->pwr_pin_result, ind_msg->phy_io_pin_result,
  2025. ind_msg->rf_pin_result);
  2026. }
  2027. int cnss_wlfw_cal_report_req_send_sync(struct cnss_plat_data *plat_priv,
  2028. u32 cal_file_download_size)
  2029. {
  2030. struct wlfw_cal_report_req_msg_v01 req = {0};
  2031. struct wlfw_cal_report_resp_msg_v01 resp = {0};
  2032. struct qmi_txn txn;
  2033. int ret = 0;
  2034. cnss_pr_dbg("Sending cal file report request. File size: %d, state: 0x%lx\n",
  2035. cal_file_download_size, plat_priv->driver_state);
  2036. req.cal_file_download_size_valid = 1;
  2037. req.cal_file_download_size = cal_file_download_size;
  2038. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2039. wlfw_cal_report_resp_msg_v01_ei, &resp);
  2040. if (ret < 0) {
  2041. cnss_pr_err("Failed to initialize txn for Cal Report request, err: %d\n",
  2042. ret);
  2043. goto out;
  2044. }
  2045. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2046. QMI_WLFW_CAL_REPORT_REQ_V01,
  2047. WLFW_CAL_REPORT_REQ_MSG_V01_MAX_MSG_LEN,
  2048. wlfw_cal_report_req_msg_v01_ei, &req);
  2049. if (ret < 0) {
  2050. qmi_txn_cancel(&txn);
  2051. cnss_pr_err("Failed to send Cal Report request, err: %d\n",
  2052. ret);
  2053. goto out;
  2054. }
  2055. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2056. if (ret < 0) {
  2057. cnss_pr_err("Failed to wait for response of Cal Report request, err: %d\n",
  2058. ret);
  2059. goto out;
  2060. }
  2061. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2062. cnss_pr_err("Cal Report request failed, result: %d, err: %d\n",
  2063. resp.resp.result, resp.resp.error);
  2064. ret = -resp.resp.result;
  2065. goto out;
  2066. }
  2067. out:
  2068. return ret;
  2069. }
  2070. static void cnss_wlfw_cal_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2071. struct sockaddr_qrtr *sq,
  2072. struct qmi_txn *txn, const void *data)
  2073. {
  2074. struct cnss_plat_data *plat_priv =
  2075. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2076. const struct wlfw_cal_done_ind_msg_v01 *ind = data;
  2077. struct cnss_cal_info *cal_info;
  2078. cnss_pr_dbg("Received Cal done indication. File size: %d\n",
  2079. ind->cal_file_upload_size);
  2080. cnss_pr_info("Calibration took %d ms\n",
  2081. jiffies_to_msecs(jiffies - plat_priv->cal_time));
  2082. if (!txn) {
  2083. cnss_pr_err("Spurious indication\n");
  2084. return;
  2085. }
  2086. if (ind->cal_file_upload_size_valid)
  2087. plat_priv->cal_file_size = ind->cal_file_upload_size;
  2088. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2089. if (!cal_info)
  2090. return;
  2091. cal_info->cal_status = CNSS_CAL_DONE;
  2092. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2093. 0, cal_info);
  2094. }
  2095. static void cnss_wlfw_qdss_trace_req_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2096. struct sockaddr_qrtr *sq,
  2097. struct qmi_txn *txn,
  2098. const void *data)
  2099. {
  2100. struct cnss_plat_data *plat_priv =
  2101. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2102. const struct wlfw_qdss_trace_req_mem_ind_msg_v01 *ind_msg = data;
  2103. int i;
  2104. cnss_pr_dbg("Received QMI WLFW QDSS trace request mem indication\n");
  2105. if (!txn) {
  2106. cnss_pr_err("Spurious indication\n");
  2107. return;
  2108. }
  2109. if (plat_priv->qdss_mem_seg_len) {
  2110. cnss_pr_err("Ignore double allocation for QDSS trace, current len %u\n",
  2111. plat_priv->qdss_mem_seg_len);
  2112. return;
  2113. }
  2114. plat_priv->qdss_mem_seg_len = ind_msg->mem_seg_len;
  2115. for (i = 0; i < plat_priv->qdss_mem_seg_len; i++) {
  2116. cnss_pr_dbg("QDSS requests for memory, size: 0x%x, type: %u\n",
  2117. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2118. plat_priv->qdss_mem[i].type = ind_msg->mem_seg[i].type;
  2119. plat_priv->qdss_mem[i].size = ind_msg->mem_seg[i].size;
  2120. }
  2121. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM,
  2122. 0, NULL);
  2123. }
  2124. /**
  2125. * cnss_wlfw_fw_mem_file_save_ind_cb: Save given FW mem to filesystem
  2126. *
  2127. * QDSS_TRACE_SAVE_IND feature is overloaded to provide any host allocated
  2128. * fw memory segment for dumping to file system. Only one type of mem can be
  2129. * saved per indication and is provided in mem seg index 0.
  2130. *
  2131. * Return: None
  2132. */
  2133. static void cnss_wlfw_fw_mem_file_save_ind_cb(struct qmi_handle *qmi_wlfw,
  2134. struct sockaddr_qrtr *sq,
  2135. struct qmi_txn *txn,
  2136. const void *data)
  2137. {
  2138. struct cnss_plat_data *plat_priv =
  2139. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2140. const struct wlfw_qdss_trace_save_ind_msg_v01 *ind_msg = data;
  2141. struct cnss_qmi_event_fw_mem_file_save_data *event_data;
  2142. int i = 0;
  2143. if (!txn || !data) {
  2144. cnss_pr_err("Spurious indication\n");
  2145. return;
  2146. }
  2147. cnss_pr_dbg("QMI fw_mem_file_save: source: %d mem_seg: %d type: %u len: %u\n",
  2148. ind_msg->source, ind_msg->mem_seg_valid,
  2149. ind_msg->mem_seg[0].type, ind_msg->mem_seg_len);
  2150. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2151. if (!event_data)
  2152. return;
  2153. event_data->mem_type = ind_msg->mem_seg[0].type;
  2154. event_data->mem_seg_len = ind_msg->mem_seg_len;
  2155. event_data->total_size = ind_msg->total_size;
  2156. if (ind_msg->mem_seg_valid) {
  2157. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_STR_LEN_V01) {
  2158. cnss_pr_err("Invalid seg len indication\n");
  2159. goto free_event_data;
  2160. }
  2161. for (i = 0; i < ind_msg->mem_seg_len; i++) {
  2162. event_data->mem_seg[i].addr = ind_msg->mem_seg[i].addr;
  2163. event_data->mem_seg[i].size = ind_msg->mem_seg[i].size;
  2164. if (event_data->mem_type != ind_msg->mem_seg[i].type) {
  2165. cnss_pr_err("FW Mem file save ind cannot have multiple mem types\n");
  2166. goto free_event_data;
  2167. }
  2168. cnss_pr_dbg("seg-%d: addr 0x%llx size 0x%x\n",
  2169. i, ind_msg->mem_seg[i].addr,
  2170. ind_msg->mem_seg[i].size);
  2171. }
  2172. }
  2173. if (ind_msg->file_name_valid)
  2174. strlcpy(event_data->file_name, ind_msg->file_name,
  2175. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2176. if (ind_msg->source == 1) {
  2177. if (!ind_msg->file_name_valid)
  2178. strlcpy(event_data->file_name, "qdss_trace_wcss_etb",
  2179. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2180. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA,
  2181. 0, event_data);
  2182. } else {
  2183. if (event_data->mem_type == QMI_WLFW_MEM_QDSS_V01) {
  2184. if (!ind_msg->file_name_valid)
  2185. strlcpy(event_data->file_name, "qdss_trace_ddr",
  2186. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2187. } else {
  2188. if (!ind_msg->file_name_valid)
  2189. strlcpy(event_data->file_name, "fw_mem_dump",
  2190. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2191. }
  2192. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE,
  2193. 0, event_data);
  2194. }
  2195. return;
  2196. free_event_data:
  2197. kfree(event_data);
  2198. }
  2199. static void cnss_wlfw_qdss_trace_free_ind_cb(struct qmi_handle *qmi_wlfw,
  2200. struct sockaddr_qrtr *sq,
  2201. struct qmi_txn *txn,
  2202. const void *data)
  2203. {
  2204. struct cnss_plat_data *plat_priv =
  2205. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2206. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_FREE,
  2207. 0, NULL);
  2208. }
  2209. static void cnss_wlfw_respond_get_info_ind_cb(struct qmi_handle *qmi_wlfw,
  2210. struct sockaddr_qrtr *sq,
  2211. struct qmi_txn *txn,
  2212. const void *data)
  2213. {
  2214. struct cnss_plat_data *plat_priv =
  2215. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2216. const struct wlfw_respond_get_info_ind_msg_v01 *ind_msg = data;
  2217. cnss_pr_buf("Received QMI WLFW respond get info indication\n");
  2218. if (!txn) {
  2219. cnss_pr_err("Spurious indication\n");
  2220. return;
  2221. }
  2222. cnss_pr_buf("Extract message with event length: %d, type: %d, is last: %d, seq no: %d\n",
  2223. ind_msg->data_len, ind_msg->type,
  2224. ind_msg->is_last, ind_msg->seq_no);
  2225. if (plat_priv->get_info_cb_ctx && plat_priv->get_info_cb)
  2226. plat_priv->get_info_cb(plat_priv->get_info_cb_ctx,
  2227. (void *)ind_msg->data,
  2228. ind_msg->data_len);
  2229. }
  2230. static int cnss_ims_wfc_call_twt_cfg_send_sync
  2231. (struct cnss_plat_data *plat_priv,
  2232. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg)
  2233. {
  2234. struct ims_private_service_wfc_call_twt_config_req_msg_v01 *req;
  2235. struct ims_private_service_wfc_call_twt_config_rsp_msg_v01 *resp;
  2236. struct qmi_txn txn;
  2237. int ret = 0;
  2238. if (!test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  2239. cnss_pr_err("Drop FW WFC indication as IMS QMI not connected\n");
  2240. return -EINVAL;
  2241. }
  2242. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2243. if (!req)
  2244. return -ENOMEM;
  2245. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2246. if (!resp) {
  2247. kfree(req);
  2248. return -ENOMEM;
  2249. }
  2250. req->twt_sta_start_valid = ind_msg->twt_sta_start_valid;
  2251. req->twt_sta_start = ind_msg->twt_sta_start;
  2252. req->twt_sta_int_valid = ind_msg->twt_sta_int_valid;
  2253. req->twt_sta_int = ind_msg->twt_sta_int;
  2254. req->twt_sta_upo_valid = ind_msg->twt_sta_upo_valid;
  2255. req->twt_sta_upo = ind_msg->twt_sta_upo;
  2256. req->twt_sta_sp_valid = ind_msg->twt_sta_sp_valid;
  2257. req->twt_sta_sp = ind_msg->twt_sta_sp;
  2258. req->twt_sta_dl_valid = req->twt_sta_dl_valid;
  2259. req->twt_sta_dl = req->twt_sta_dl;
  2260. req->twt_sta_config_changed_valid =
  2261. ind_msg->twt_sta_config_changed_valid;
  2262. req->twt_sta_config_changed = ind_msg->twt_sta_config_changed;
  2263. cnss_pr_dbg("CNSS->IMS: TWT_CFG_REQ: state: 0x%lx\n",
  2264. plat_priv->driver_state);
  2265. ret =
  2266. qmi_txn_init(&plat_priv->ims_qmi, &txn,
  2267. ims_private_service_wfc_call_twt_config_rsp_msg_v01_ei,
  2268. resp);
  2269. if (ret < 0) {
  2270. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Txn Init Err: %d\n",
  2271. ret);
  2272. goto out;
  2273. }
  2274. ret =
  2275. qmi_send_request(&plat_priv->ims_qmi, NULL, &txn,
  2276. QMI_IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_V01,
  2277. IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_MSG_V01_MAX_MSG_LEN,
  2278. ims_private_service_wfc_call_twt_config_req_msg_v01_ei, req);
  2279. if (ret < 0) {
  2280. qmi_txn_cancel(&txn);
  2281. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Send Err: %d\n", ret);
  2282. goto out;
  2283. }
  2284. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2285. if (ret < 0) {
  2286. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: QMI Wait Err: %d\n", ret);
  2287. goto out;
  2288. }
  2289. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2290. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: Result: %d Err: %d\n",
  2291. resp->resp.result, resp->resp.error);
  2292. ret = -resp->resp.result;
  2293. goto out;
  2294. }
  2295. ret = 0;
  2296. out:
  2297. kfree(req);
  2298. kfree(resp);
  2299. return ret;
  2300. }
  2301. int cnss_process_twt_cfg_ind_event(struct cnss_plat_data *plat_priv,
  2302. void *data)
  2303. {
  2304. int ret;
  2305. struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2306. ret = cnss_ims_wfc_call_twt_cfg_send_sync(plat_priv, ind_msg);
  2307. kfree(data);
  2308. return ret;
  2309. }
  2310. static void cnss_wlfw_process_twt_cfg_ind(struct qmi_handle *qmi_wlfw,
  2311. struct sockaddr_qrtr *sq,
  2312. struct qmi_txn *txn,
  2313. const void *data)
  2314. {
  2315. struct cnss_plat_data *plat_priv =
  2316. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2317. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2318. struct wlfw_wfc_call_twt_config_ind_msg_v01 *event_data;
  2319. if (!txn) {
  2320. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Spurious indication\n");
  2321. return;
  2322. }
  2323. if (!ind_msg) {
  2324. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Invalid indication\n");
  2325. return;
  2326. }
  2327. cnss_pr_dbg("FW->CNSS: TWT_CFG_IND: %x %llx, %x %x, %x %x, %x %x, %x %x, %x %x\n",
  2328. ind_msg->twt_sta_start_valid, ind_msg->twt_sta_start,
  2329. ind_msg->twt_sta_int_valid, ind_msg->twt_sta_int,
  2330. ind_msg->twt_sta_upo_valid, ind_msg->twt_sta_upo,
  2331. ind_msg->twt_sta_sp_valid, ind_msg->twt_sta_sp,
  2332. ind_msg->twt_sta_dl_valid, ind_msg->twt_sta_dl,
  2333. ind_msg->twt_sta_config_changed_valid,
  2334. ind_msg->twt_sta_config_changed);
  2335. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  2336. if (!event_data)
  2337. return;
  2338. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND, 0,
  2339. event_data);
  2340. }
  2341. static struct qmi_msg_handler qmi_wlfw_msg_handlers[] = {
  2342. {
  2343. .type = QMI_INDICATION,
  2344. .msg_id = QMI_WLFW_REQUEST_MEM_IND_V01,
  2345. .ei = wlfw_request_mem_ind_msg_v01_ei,
  2346. .decoded_size = sizeof(struct wlfw_request_mem_ind_msg_v01),
  2347. .fn = cnss_wlfw_request_mem_ind_cb
  2348. },
  2349. {
  2350. .type = QMI_INDICATION,
  2351. .msg_id = QMI_WLFW_FW_MEM_READY_IND_V01,
  2352. .ei = wlfw_fw_mem_ready_ind_msg_v01_ei,
  2353. .decoded_size = sizeof(struct wlfw_fw_mem_ready_ind_msg_v01),
  2354. .fn = cnss_wlfw_fw_mem_ready_ind_cb
  2355. },
  2356. {
  2357. .type = QMI_INDICATION,
  2358. .msg_id = QMI_WLFW_FW_READY_IND_V01,
  2359. .ei = wlfw_fw_ready_ind_msg_v01_ei,
  2360. .decoded_size = sizeof(struct wlfw_fw_ready_ind_msg_v01),
  2361. .fn = cnss_wlfw_fw_ready_ind_cb
  2362. },
  2363. {
  2364. .type = QMI_INDICATION,
  2365. .msg_id = QMI_WLFW_FW_INIT_DONE_IND_V01,
  2366. .ei = wlfw_fw_init_done_ind_msg_v01_ei,
  2367. .decoded_size = sizeof(struct wlfw_fw_init_done_ind_msg_v01),
  2368. .fn = cnss_wlfw_fw_init_done_ind_cb
  2369. },
  2370. {
  2371. .type = QMI_INDICATION,
  2372. .msg_id = QMI_WLFW_PIN_CONNECT_RESULT_IND_V01,
  2373. .ei = wlfw_pin_connect_result_ind_msg_v01_ei,
  2374. .decoded_size =
  2375. sizeof(struct wlfw_pin_connect_result_ind_msg_v01),
  2376. .fn = cnss_wlfw_pin_result_ind_cb
  2377. },
  2378. {
  2379. .type = QMI_INDICATION,
  2380. .msg_id = QMI_WLFW_CAL_DONE_IND_V01,
  2381. .ei = wlfw_cal_done_ind_msg_v01_ei,
  2382. .decoded_size = sizeof(struct wlfw_cal_done_ind_msg_v01),
  2383. .fn = cnss_wlfw_cal_done_ind_cb
  2384. },
  2385. {
  2386. .type = QMI_INDICATION,
  2387. .msg_id = QMI_WLFW_QDSS_TRACE_REQ_MEM_IND_V01,
  2388. .ei = wlfw_qdss_trace_req_mem_ind_msg_v01_ei,
  2389. .decoded_size =
  2390. sizeof(struct wlfw_qdss_trace_req_mem_ind_msg_v01),
  2391. .fn = cnss_wlfw_qdss_trace_req_mem_ind_cb
  2392. },
  2393. {
  2394. .type = QMI_INDICATION,
  2395. .msg_id = QMI_WLFW_QDSS_TRACE_SAVE_IND_V01,
  2396. .ei = wlfw_qdss_trace_save_ind_msg_v01_ei,
  2397. .decoded_size =
  2398. sizeof(struct wlfw_qdss_trace_save_ind_msg_v01),
  2399. .fn = cnss_wlfw_fw_mem_file_save_ind_cb
  2400. },
  2401. {
  2402. .type = QMI_INDICATION,
  2403. .msg_id = QMI_WLFW_QDSS_TRACE_FREE_IND_V01,
  2404. .ei = wlfw_qdss_trace_free_ind_msg_v01_ei,
  2405. .decoded_size =
  2406. sizeof(struct wlfw_qdss_trace_free_ind_msg_v01),
  2407. .fn = cnss_wlfw_qdss_trace_free_ind_cb
  2408. },
  2409. {
  2410. .type = QMI_INDICATION,
  2411. .msg_id = QMI_WLFW_RESPOND_GET_INFO_IND_V01,
  2412. .ei = wlfw_respond_get_info_ind_msg_v01_ei,
  2413. .decoded_size =
  2414. sizeof(struct wlfw_respond_get_info_ind_msg_v01),
  2415. .fn = cnss_wlfw_respond_get_info_ind_cb
  2416. },
  2417. {
  2418. .type = QMI_INDICATION,
  2419. .msg_id = QMI_WLFW_WFC_CALL_TWT_CONFIG_IND_V01,
  2420. .ei = wlfw_wfc_call_twt_config_ind_msg_v01_ei,
  2421. .decoded_size =
  2422. sizeof(struct wlfw_wfc_call_twt_config_ind_msg_v01),
  2423. .fn = cnss_wlfw_process_twt_cfg_ind
  2424. },
  2425. {}
  2426. };
  2427. static int cnss_wlfw_connect_to_server(struct cnss_plat_data *plat_priv,
  2428. void *data)
  2429. {
  2430. struct cnss_qmi_event_server_arrive_data *event_data = data;
  2431. struct qmi_handle *qmi_wlfw = &plat_priv->qmi_wlfw;
  2432. struct sockaddr_qrtr sq = { 0 };
  2433. int ret = 0;
  2434. if (!event_data)
  2435. return -EINVAL;
  2436. sq.sq_family = AF_QIPCRTR;
  2437. sq.sq_node = event_data->node;
  2438. sq.sq_port = event_data->port;
  2439. ret = kernel_connect(qmi_wlfw->sock, (struct sockaddr *)&sq,
  2440. sizeof(sq), 0);
  2441. if (ret < 0) {
  2442. cnss_pr_err("Failed to connect to QMI WLFW remote service port\n");
  2443. goto out;
  2444. }
  2445. set_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2446. cnss_pr_info("QMI WLFW service connected, state: 0x%lx\n",
  2447. plat_priv->driver_state);
  2448. kfree(data);
  2449. return 0;
  2450. out:
  2451. CNSS_QMI_ASSERT();
  2452. kfree(data);
  2453. return ret;
  2454. }
  2455. int cnss_wlfw_server_arrive(struct cnss_plat_data *plat_priv, void *data)
  2456. {
  2457. int ret = 0;
  2458. if (!plat_priv)
  2459. return -ENODEV;
  2460. if (test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state)) {
  2461. cnss_pr_err("Unexpected WLFW server arrive\n");
  2462. CNSS_ASSERT(0);
  2463. return -EINVAL;
  2464. }
  2465. cnss_ignore_qmi_failure(false);
  2466. ret = cnss_wlfw_connect_to_server(plat_priv, data);
  2467. if (ret < 0)
  2468. goto out;
  2469. ret = cnss_wlfw_ind_register_send_sync(plat_priv);
  2470. if (ret < 0) {
  2471. if (ret == -EALREADY)
  2472. ret = 0;
  2473. goto out;
  2474. }
  2475. ret = cnss_wlfw_host_cap_send_sync(plat_priv);
  2476. if (ret < 0)
  2477. goto out;
  2478. return 0;
  2479. out:
  2480. return ret;
  2481. }
  2482. int cnss_wlfw_server_exit(struct cnss_plat_data *plat_priv)
  2483. {
  2484. int ret;
  2485. if (!plat_priv)
  2486. return -ENODEV;
  2487. clear_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2488. cnss_pr_info("QMI WLFW service disconnected, state: 0x%lx\n",
  2489. plat_priv->driver_state);
  2490. cnss_qmi_deinit(plat_priv);
  2491. clear_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2492. ret = cnss_qmi_init(plat_priv);
  2493. if (ret < 0) {
  2494. cnss_pr_err("QMI WLFW service registraton failed, ret\n", ret);
  2495. CNSS_ASSERT(0);
  2496. }
  2497. return 0;
  2498. }
  2499. static int wlfw_new_server(struct qmi_handle *qmi_wlfw,
  2500. struct qmi_service *service)
  2501. {
  2502. struct cnss_plat_data *plat_priv =
  2503. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2504. struct cnss_qmi_event_server_arrive_data *event_data;
  2505. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2506. cnss_pr_info("WLFW server delete in progress, Ignore server arrive, state: 0x%lx\n",
  2507. plat_priv->driver_state);
  2508. return 0;
  2509. }
  2510. cnss_pr_dbg("WLFW server arriving: node %u port %u\n",
  2511. service->node, service->port);
  2512. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2513. if (!event_data)
  2514. return -ENOMEM;
  2515. event_data->node = service->node;
  2516. event_data->port = service->port;
  2517. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_ARRIVE,
  2518. 0, event_data);
  2519. return 0;
  2520. }
  2521. static void wlfw_del_server(struct qmi_handle *qmi_wlfw,
  2522. struct qmi_service *service)
  2523. {
  2524. struct cnss_plat_data *plat_priv =
  2525. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2526. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2527. cnss_pr_info("WLFW server delete in progress, Ignore server delete, state: 0x%lx\n",
  2528. plat_priv->driver_state);
  2529. return;
  2530. }
  2531. cnss_pr_dbg("WLFW server exiting\n");
  2532. if (plat_priv) {
  2533. cnss_ignore_qmi_failure(true);
  2534. set_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2535. }
  2536. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_EXIT,
  2537. 0, NULL);
  2538. }
  2539. static struct qmi_ops qmi_wlfw_ops = {
  2540. .new_server = wlfw_new_server,
  2541. .del_server = wlfw_del_server,
  2542. };
  2543. int cnss_qmi_init(struct cnss_plat_data *plat_priv)
  2544. {
  2545. int ret = 0;
  2546. ret = qmi_handle_init(&plat_priv->qmi_wlfw,
  2547. QMI_WLFW_MAX_RECV_BUF_SIZE,
  2548. &qmi_wlfw_ops, qmi_wlfw_msg_handlers);
  2549. if (ret < 0) {
  2550. cnss_pr_err("Failed to initialize WLFW QMI handle, err: %d\n",
  2551. ret);
  2552. goto out;
  2553. }
  2554. ret = qmi_add_lookup(&plat_priv->qmi_wlfw, WLFW_SERVICE_ID_V01,
  2555. WLFW_SERVICE_VERS_V01, WLFW_SERVICE_INS_ID_V01);
  2556. if (ret < 0)
  2557. cnss_pr_err("Failed to add WLFW QMI lookup, err: %d\n", ret);
  2558. out:
  2559. return ret;
  2560. }
  2561. void cnss_qmi_deinit(struct cnss_plat_data *plat_priv)
  2562. {
  2563. qmi_handle_release(&plat_priv->qmi_wlfw);
  2564. }
  2565. int cnss_qmi_get_dms_mac(struct cnss_plat_data *plat_priv)
  2566. {
  2567. struct dms_get_mac_address_req_msg_v01 req;
  2568. struct dms_get_mac_address_resp_msg_v01 resp;
  2569. struct qmi_txn txn;
  2570. int ret = 0;
  2571. if (!test_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state)) {
  2572. cnss_pr_err("DMS QMI connection not established\n");
  2573. return -EINVAL;
  2574. }
  2575. cnss_pr_dbg("Requesting DMS MAC address");
  2576. memset(&resp, 0, sizeof(resp));
  2577. ret = qmi_txn_init(&plat_priv->qmi_dms, &txn,
  2578. dms_get_mac_address_resp_msg_v01_ei, &resp);
  2579. if (ret < 0) {
  2580. cnss_pr_err("Failed to initialize txn for dms, err: %d\n",
  2581. ret);
  2582. goto out;
  2583. }
  2584. req.device = DMS_DEVICE_MAC_WLAN_V01;
  2585. ret = qmi_send_request(&plat_priv->qmi_dms, NULL, &txn,
  2586. QMI_DMS_GET_MAC_ADDRESS_REQ_V01,
  2587. DMS_GET_MAC_ADDRESS_REQ_MSG_V01_MAX_MSG_LEN,
  2588. dms_get_mac_address_req_msg_v01_ei, &req);
  2589. if (ret < 0) {
  2590. qmi_txn_cancel(&txn);
  2591. cnss_pr_err("Failed to send QMI_DMS_GET_MAC_ADDRESS_REQ_V01, err: %d\n",
  2592. ret);
  2593. goto out;
  2594. }
  2595. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2596. if (ret < 0) {
  2597. cnss_pr_err("Failed to wait for QMI_DMS_GET_MAC_ADDRESS_RESP_V01, err: %d\n",
  2598. ret);
  2599. goto out;
  2600. }
  2601. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2602. cnss_pr_err("QMI_DMS_GET_MAC_ADDRESS_REQ_V01 failed, result: %d, err: %d\n",
  2603. resp.resp.result, resp.resp.error);
  2604. ret = -resp.resp.result;
  2605. goto out;
  2606. }
  2607. if (!resp.mac_address_valid ||
  2608. resp.mac_address_len != QMI_WLFW_MAC_ADDR_SIZE_V01) {
  2609. cnss_pr_err("Invalid MAC address received from DMS\n");
  2610. plat_priv->dms.mac_valid = false;
  2611. goto out;
  2612. }
  2613. plat_priv->dms.mac_valid = true;
  2614. memcpy(plat_priv->dms.mac, resp.mac_address, QMI_WLFW_MAC_ADDR_SIZE_V01);
  2615. cnss_pr_info("Received DMS MAC: [%pM]\n", plat_priv->dms.mac);
  2616. out:
  2617. return ret;
  2618. }
  2619. static int cnss_dms_connect_to_server(struct cnss_plat_data *plat_priv,
  2620. unsigned int node, unsigned int port)
  2621. {
  2622. struct qmi_handle *qmi_dms = &plat_priv->qmi_dms;
  2623. struct sockaddr_qrtr sq = {0};
  2624. int ret = 0;
  2625. sq.sq_family = AF_QIPCRTR;
  2626. sq.sq_node = node;
  2627. sq.sq_port = port;
  2628. ret = kernel_connect(qmi_dms->sock, (struct sockaddr *)&sq,
  2629. sizeof(sq), 0);
  2630. if (ret < 0) {
  2631. cnss_pr_err("Failed to connect to QMI DMS remote service Node: %d Port: %d\n",
  2632. node, port);
  2633. goto out;
  2634. }
  2635. set_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2636. cnss_pr_info("QMI DMS service connected, state: 0x%lx\n",
  2637. plat_priv->driver_state);
  2638. out:
  2639. return ret;
  2640. }
  2641. static int dms_new_server(struct qmi_handle *qmi_dms,
  2642. struct qmi_service *service)
  2643. {
  2644. struct cnss_plat_data *plat_priv =
  2645. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2646. if (!service)
  2647. return -EINVAL;
  2648. return cnss_dms_connect_to_server(plat_priv, service->node,
  2649. service->port);
  2650. }
  2651. static void dms_del_server(struct qmi_handle *qmi_dms,
  2652. struct qmi_service *service)
  2653. {
  2654. struct cnss_plat_data *plat_priv =
  2655. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2656. clear_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2657. cnss_pr_info("QMI DMS service disconnected, state: 0x%lx\n",
  2658. plat_priv->driver_state);
  2659. }
  2660. static struct qmi_ops qmi_dms_ops = {
  2661. .new_server = dms_new_server,
  2662. .del_server = dms_del_server,
  2663. };
  2664. int cnss_dms_init(struct cnss_plat_data *plat_priv)
  2665. {
  2666. int ret = 0;
  2667. ret = qmi_handle_init(&plat_priv->qmi_dms, DMS_QMI_MAX_MSG_LEN,
  2668. &qmi_dms_ops, NULL);
  2669. if (ret < 0) {
  2670. cnss_pr_err("Failed to initialize DMS handle, err: %d\n", ret);
  2671. goto out;
  2672. }
  2673. ret = qmi_add_lookup(&plat_priv->qmi_dms, DMS_SERVICE_ID_V01,
  2674. DMS_SERVICE_VERS_V01, 0);
  2675. if (ret < 0)
  2676. cnss_pr_err("Failed to add DMS lookup, err: %d\n", ret);
  2677. out:
  2678. return ret;
  2679. }
  2680. void cnss_dms_deinit(struct cnss_plat_data *plat_priv)
  2681. {
  2682. qmi_handle_release(&plat_priv->qmi_dms);
  2683. }
  2684. int coex_antenna_switch_to_wlan_send_sync_msg(struct cnss_plat_data *plat_priv)
  2685. {
  2686. int ret;
  2687. struct coex_antenna_switch_to_wlan_req_msg_v01 *req;
  2688. struct coex_antenna_switch_to_wlan_resp_msg_v01 *resp;
  2689. struct qmi_txn txn;
  2690. if (!plat_priv)
  2691. return -ENODEV;
  2692. cnss_pr_dbg("Sending coex antenna switch_to_wlan\n");
  2693. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2694. if (!req)
  2695. return -ENOMEM;
  2696. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2697. if (!resp) {
  2698. kfree(req);
  2699. return -ENOMEM;
  2700. }
  2701. req->antenna = plat_priv->antenna;
  2702. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  2703. coex_antenna_switch_to_wlan_resp_msg_v01_ei, resp);
  2704. if (ret < 0) {
  2705. cnss_pr_err("Fail to init txn for coex antenna switch_to_wlan resp %d\n",
  2706. ret);
  2707. goto out;
  2708. }
  2709. ret = qmi_send_request
  2710. (&plat_priv->coex_qmi, NULL, &txn,
  2711. QMI_COEX_SWITCH_ANTENNA_TO_WLAN_REQ_V01,
  2712. COEX_ANTENNA_SWITCH_TO_WLAN_REQ_MSG_V01_MAX_MSG_LEN,
  2713. coex_antenna_switch_to_wlan_req_msg_v01_ei, req);
  2714. if (ret < 0) {
  2715. qmi_txn_cancel(&txn);
  2716. cnss_pr_err("Fail to send coex antenna switch_to_wlan req %d\n",
  2717. ret);
  2718. goto out;
  2719. }
  2720. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  2721. if (ret < 0) {
  2722. cnss_pr_err("Coex antenna switch_to_wlan resp wait failed with ret %d\n",
  2723. ret);
  2724. goto out;
  2725. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2726. cnss_pr_err("Coex antenna switch_to_wlan request rejected, result:%d error:%d\n",
  2727. resp->resp.result, resp->resp.error);
  2728. ret = -resp->resp.result;
  2729. goto out;
  2730. }
  2731. if (resp->grant_valid)
  2732. plat_priv->grant = resp->grant;
  2733. cnss_pr_dbg("Coex antenna grant: 0x%llx\n", resp->grant);
  2734. kfree(resp);
  2735. kfree(req);
  2736. return 0;
  2737. out:
  2738. kfree(resp);
  2739. kfree(req);
  2740. return ret;
  2741. }
  2742. int coex_antenna_switch_to_mdm_send_sync_msg(struct cnss_plat_data *plat_priv)
  2743. {
  2744. int ret;
  2745. struct coex_antenna_switch_to_mdm_req_msg_v01 *req;
  2746. struct coex_antenna_switch_to_mdm_resp_msg_v01 *resp;
  2747. struct qmi_txn txn;
  2748. if (!plat_priv)
  2749. return -ENODEV;
  2750. cnss_pr_dbg("Sending coex antenna switch_to_mdm\n");
  2751. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2752. if (!req)
  2753. return -ENOMEM;
  2754. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2755. if (!resp) {
  2756. kfree(req);
  2757. return -ENOMEM;
  2758. }
  2759. req->antenna = plat_priv->antenna;
  2760. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  2761. coex_antenna_switch_to_mdm_resp_msg_v01_ei, resp);
  2762. if (ret < 0) {
  2763. cnss_pr_err("Fail to init txn for coex antenna switch_to_mdm resp %d\n",
  2764. ret);
  2765. goto out;
  2766. }
  2767. ret = qmi_send_request
  2768. (&plat_priv->coex_qmi, NULL, &txn,
  2769. QMI_COEX_SWITCH_ANTENNA_TO_MDM_REQ_V01,
  2770. COEX_ANTENNA_SWITCH_TO_MDM_REQ_MSG_V01_MAX_MSG_LEN,
  2771. coex_antenna_switch_to_mdm_req_msg_v01_ei, req);
  2772. if (ret < 0) {
  2773. qmi_txn_cancel(&txn);
  2774. cnss_pr_err("Fail to send coex antenna switch_to_mdm req %d\n",
  2775. ret);
  2776. goto out;
  2777. }
  2778. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  2779. if (ret < 0) {
  2780. cnss_pr_err("Coex antenna switch_to_mdm resp wait failed with ret %d\n",
  2781. ret);
  2782. goto out;
  2783. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2784. cnss_pr_err("Coex antenna switch_to_mdm request rejected, result:%d error:%d\n",
  2785. resp->resp.result, resp->resp.error);
  2786. ret = -resp->resp.result;
  2787. goto out;
  2788. }
  2789. kfree(resp);
  2790. kfree(req);
  2791. return 0;
  2792. out:
  2793. kfree(resp);
  2794. kfree(req);
  2795. return ret;
  2796. }
  2797. int cnss_send_subsys_restart_level_msg(struct cnss_plat_data *plat_priv)
  2798. {
  2799. int ret;
  2800. struct wlfw_subsys_restart_level_req_msg_v01 req;
  2801. struct wlfw_subsys_restart_level_resp_msg_v01 resp;
  2802. u8 pcss_enabled;
  2803. if (!plat_priv)
  2804. return -ENODEV;
  2805. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  2806. cnss_pr_err("Can't send pcss cmd before fw ready\n");
  2807. return -EINVAL;
  2808. }
  2809. pcss_enabled = plat_priv->recovery_pcss_enabled;
  2810. cnss_pr_dbg("Sending pcss recovery status: %d\n", pcss_enabled);
  2811. req.restart_level_type_valid = 1;
  2812. req.restart_level_type = pcss_enabled;
  2813. ret = qmi_send_wait(&plat_priv->qmi_wlfw, &req, &resp,
  2814. wlfw_subsys_restart_level_req_msg_v01_ei,
  2815. wlfw_subsys_restart_level_resp_msg_v01_ei,
  2816. QMI_WLFW_SUBSYS_RESTART_LEVEL_REQ_V01,
  2817. WLFW_SUBSYS_RESTART_LEVEL_REQ_MSG_V01_MAX_MSG_LEN,
  2818. QMI_WLFW_TIMEOUT_JF);
  2819. return ret;
  2820. }
  2821. static int coex_new_server(struct qmi_handle *qmi,
  2822. struct qmi_service *service)
  2823. {
  2824. struct cnss_plat_data *plat_priv =
  2825. container_of(qmi, struct cnss_plat_data, coex_qmi);
  2826. struct sockaddr_qrtr sq = { 0 };
  2827. int ret = 0;
  2828. cnss_pr_dbg("COEX server arrive: node %u port %u\n",
  2829. service->node, service->port);
  2830. sq.sq_family = AF_QIPCRTR;
  2831. sq.sq_node = service->node;
  2832. sq.sq_port = service->port;
  2833. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  2834. if (ret < 0) {
  2835. cnss_pr_err("Fail to connect to remote service port\n");
  2836. return ret;
  2837. }
  2838. set_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  2839. cnss_pr_dbg("COEX Server Connected: 0x%lx\n",
  2840. plat_priv->driver_state);
  2841. return 0;
  2842. }
  2843. static void coex_del_server(struct qmi_handle *qmi,
  2844. struct qmi_service *service)
  2845. {
  2846. struct cnss_plat_data *plat_priv =
  2847. container_of(qmi, struct cnss_plat_data, coex_qmi);
  2848. cnss_pr_dbg("COEX server exit\n");
  2849. clear_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  2850. }
  2851. static struct qmi_ops coex_qmi_ops = {
  2852. .new_server = coex_new_server,
  2853. .del_server = coex_del_server,
  2854. };
  2855. int cnss_register_coex_service(struct cnss_plat_data *plat_priv)
  2856. { int ret;
  2857. ret = qmi_handle_init(&plat_priv->coex_qmi,
  2858. COEX_SERVICE_MAX_MSG_LEN,
  2859. &coex_qmi_ops, NULL);
  2860. if (ret < 0)
  2861. return ret;
  2862. ret = qmi_add_lookup(&plat_priv->coex_qmi, COEX_SERVICE_ID_V01,
  2863. COEX_SERVICE_VERS_V01, 0);
  2864. return ret;
  2865. }
  2866. void cnss_unregister_coex_service(struct cnss_plat_data *plat_priv)
  2867. {
  2868. qmi_handle_release(&plat_priv->coex_qmi);
  2869. }
  2870. /* IMS Service */
  2871. int ims_subscribe_for_indication_send_async(struct cnss_plat_data *plat_priv)
  2872. {
  2873. int ret;
  2874. struct ims_private_service_subscribe_for_indications_req_msg_v01 *req;
  2875. struct qmi_txn *txn;
  2876. if (!plat_priv)
  2877. return -ENODEV;
  2878. cnss_pr_dbg("Sending ASYNC ims subscribe for indication\n");
  2879. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2880. if (!req)
  2881. return -ENOMEM;
  2882. req->wfc_call_status_valid = 1;
  2883. req->wfc_call_status = 1;
  2884. txn = &plat_priv->txn;
  2885. ret = qmi_txn_init(&plat_priv->ims_qmi, txn, NULL, NULL);
  2886. if (ret < 0) {
  2887. cnss_pr_err("Fail to init txn for ims subscribe for indication resp %d\n",
  2888. ret);
  2889. goto out;
  2890. }
  2891. ret = qmi_send_request
  2892. (&plat_priv->ims_qmi, NULL, txn,
  2893. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  2894. IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_MSG_V01_MAX_MSG_LEN,
  2895. ims_private_service_subscribe_for_indications_req_msg_v01_ei, req);
  2896. if (ret < 0) {
  2897. qmi_txn_cancel(txn);
  2898. cnss_pr_err("Fail to send ims subscribe for indication req %d\n",
  2899. ret);
  2900. goto out;
  2901. }
  2902. kfree(req);
  2903. return 0;
  2904. out:
  2905. kfree(req);
  2906. return ret;
  2907. }
  2908. static void ims_subscribe_for_indication_resp_cb(struct qmi_handle *qmi,
  2909. struct sockaddr_qrtr *sq,
  2910. struct qmi_txn *txn,
  2911. const void *data)
  2912. {
  2913. const
  2914. struct ims_private_service_subscribe_for_indications_rsp_msg_v01 *resp =
  2915. data;
  2916. cnss_pr_dbg("Received IMS subscribe indication response\n");
  2917. if (!txn) {
  2918. cnss_pr_err("spurious response\n");
  2919. return;
  2920. }
  2921. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2922. cnss_pr_err("IMS subscribe for indication request rejected, result:%d error:%d\n",
  2923. resp->resp.result, resp->resp.error);
  2924. txn->result = -resp->resp.result;
  2925. }
  2926. }
  2927. int cnss_process_wfc_call_ind_event(struct cnss_plat_data *plat_priv,
  2928. void *data)
  2929. {
  2930. int ret;
  2931. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  2932. ret = cnss_wlfw_wfc_call_status_send_sync(plat_priv, ind_msg);
  2933. kfree(data);
  2934. return ret;
  2935. }
  2936. static void
  2937. cnss_ims_process_wfc_call_ind_cb(struct qmi_handle *ims_qmi,
  2938. struct sockaddr_qrtr *sq,
  2939. struct qmi_txn *txn, const void *data)
  2940. {
  2941. struct cnss_plat_data *plat_priv =
  2942. container_of(ims_qmi, struct cnss_plat_data, ims_qmi);
  2943. const
  2944. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  2945. struct ims_private_service_wfc_call_status_ind_msg_v01 *event_data;
  2946. if (!txn) {
  2947. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Spurious indication\n");
  2948. return;
  2949. }
  2950. if (!ind_msg) {
  2951. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Invalid indication\n");
  2952. return;
  2953. }
  2954. cnss_pr_dbg("IMS->CNSS: WFC_CALL_IND: %x, %x %x, %x %x, %x %llx, %x %x, %x %x\n",
  2955. ind_msg->wfc_call_active, ind_msg->all_wfc_calls_held_valid,
  2956. ind_msg->all_wfc_calls_held,
  2957. ind_msg->is_wfc_emergency_valid, ind_msg->is_wfc_emergency,
  2958. ind_msg->twt_ims_start_valid, ind_msg->twt_ims_start,
  2959. ind_msg->twt_ims_int_valid, ind_msg->twt_ims_int,
  2960. ind_msg->media_quality_valid, ind_msg->media_quality);
  2961. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  2962. if (!event_data)
  2963. return;
  2964. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND,
  2965. 0, event_data);
  2966. }
  2967. static struct qmi_msg_handler qmi_ims_msg_handlers[] = {
  2968. {
  2969. .type = QMI_RESPONSE,
  2970. .msg_id =
  2971. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  2972. .ei =
  2973. ims_private_service_subscribe_for_indications_rsp_msg_v01_ei,
  2974. .decoded_size = sizeof(struct
  2975. ims_private_service_subscribe_for_indications_rsp_msg_v01),
  2976. .fn = ims_subscribe_for_indication_resp_cb
  2977. },
  2978. {
  2979. .type = QMI_INDICATION,
  2980. .msg_id = QMI_IMS_PRIVATE_SERVICE_WFC_CALL_STATUS_IND_V01,
  2981. .ei = ims_private_service_wfc_call_status_ind_msg_v01_ei,
  2982. .decoded_size =
  2983. sizeof(struct ims_private_service_wfc_call_status_ind_msg_v01),
  2984. .fn = cnss_ims_process_wfc_call_ind_cb
  2985. },
  2986. {}
  2987. };
  2988. static int ims_new_server(struct qmi_handle *qmi,
  2989. struct qmi_service *service)
  2990. {
  2991. struct cnss_plat_data *plat_priv =
  2992. container_of(qmi, struct cnss_plat_data, ims_qmi);
  2993. struct sockaddr_qrtr sq = { 0 };
  2994. int ret = 0;
  2995. cnss_pr_dbg("IMS server arrive: node %u port %u\n",
  2996. service->node, service->port);
  2997. sq.sq_family = AF_QIPCRTR;
  2998. sq.sq_node = service->node;
  2999. sq.sq_port = service->port;
  3000. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3001. if (ret < 0) {
  3002. cnss_pr_err("Fail to connect to remote service port\n");
  3003. return ret;
  3004. }
  3005. set_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3006. cnss_pr_dbg("IMS Server Connected: 0x%lx\n",
  3007. plat_priv->driver_state);
  3008. ret = ims_subscribe_for_indication_send_async(plat_priv);
  3009. return ret;
  3010. }
  3011. static void ims_del_server(struct qmi_handle *qmi,
  3012. struct qmi_service *service)
  3013. {
  3014. struct cnss_plat_data *plat_priv =
  3015. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3016. cnss_pr_dbg("IMS server exit\n");
  3017. clear_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3018. }
  3019. static struct qmi_ops ims_qmi_ops = {
  3020. .new_server = ims_new_server,
  3021. .del_server = ims_del_server,
  3022. };
  3023. int cnss_register_ims_service(struct cnss_plat_data *plat_priv)
  3024. { int ret;
  3025. ret = qmi_handle_init(&plat_priv->ims_qmi,
  3026. IMSPRIVATE_SERVICE_MAX_MSG_LEN,
  3027. &ims_qmi_ops, qmi_ims_msg_handlers);
  3028. if (ret < 0)
  3029. return ret;
  3030. ret = qmi_add_lookup(&plat_priv->ims_qmi, IMSPRIVATE_SERVICE_ID_V01,
  3031. IMSPRIVATE_SERVICE_VERS_V01, 0);
  3032. return ret;
  3033. }
  3034. void cnss_unregister_ims_service(struct cnss_plat_data *plat_priv)
  3035. {
  3036. qmi_handle_release(&plat_priv->ims_qmi);
  3037. }