main.c 104 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/version.h>
  20. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  21. #include <linux/panic_notifier.h>
  22. #endif
  23. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  24. #include <soc/qcom/minidump.h>
  25. #endif
  26. #include "cnss_plat_ipc_qmi.h"
  27. #include "cnss_utils.h"
  28. #include "main.h"
  29. #include "bus.h"
  30. #include "debug.h"
  31. #include "genl.h"
  32. #include "reg.h"
  33. #define CNSS_DUMP_FORMAT_VER 0x11
  34. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  35. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  36. #define CNSS_DUMP_NAME "CNSS_WLAN"
  37. #define CNSS_DUMP_DESC_SIZE 0x1000
  38. #define CNSS_DUMP_SEG_VER 0x1
  39. #define FILE_SYSTEM_READY 1
  40. #define FW_READY_TIMEOUT 20000
  41. #define FW_ASSERT_TIMEOUT 5000
  42. #define CNSS_EVENT_PENDING 2989
  43. #define POWER_RESET_MIN_DELAY_MS 100
  44. #define CNSS_QUIRKS_DEFAULT 0
  45. #ifdef CONFIG_CNSS_EMULATION
  46. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  47. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  48. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  49. #else
  50. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  51. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  52. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  53. #endif
  54. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  55. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  56. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  57. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  58. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  59. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  60. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  61. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  62. enum cnss_cal_db_op {
  63. CNSS_CAL_DB_UPLOAD,
  64. CNSS_CAL_DB_DOWNLOAD,
  65. CNSS_CAL_DB_INVALID_OP,
  66. };
  67. enum cnss_recovery_type {
  68. CNSS_WLAN_RECOVERY = 0x1,
  69. CNSS_PCSS_RECOVERY = 0x2,
  70. };
  71. static struct cnss_plat_data *plat_env;
  72. static DECLARE_RWSEM(cnss_pm_sem);
  73. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  74. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  75. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  76. };
  77. static struct cnss_fw_files FW_FILES_DEFAULT = {
  78. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  79. "utfbd.bin", "epping.bin", "evicted.bin"
  80. };
  81. struct cnss_driver_event {
  82. struct list_head list;
  83. enum cnss_driver_event_type type;
  84. bool sync;
  85. struct completion complete;
  86. int ret;
  87. void *data;
  88. };
  89. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  90. struct cnss_plat_data *plat_priv)
  91. {
  92. plat_env = plat_priv;
  93. }
  94. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  95. {
  96. return plat_env;
  97. }
  98. /**
  99. * cnss_get_mem_seg_count - Get segment count of memory
  100. * @type: memory type
  101. * @seg: segment count
  102. *
  103. * Return: 0 on success, negative value on failure
  104. */
  105. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  106. {
  107. struct cnss_plat_data *plat_priv;
  108. plat_priv = cnss_get_plat_priv(NULL);
  109. if (!plat_priv)
  110. return -ENODEV;
  111. switch (type) {
  112. case CNSS_REMOTE_MEM_TYPE_FW:
  113. *seg = plat_priv->fw_mem_seg_len;
  114. break;
  115. case CNSS_REMOTE_MEM_TYPE_QDSS:
  116. *seg = plat_priv->qdss_mem_seg_len;
  117. break;
  118. default:
  119. return -EINVAL;
  120. }
  121. return 0;
  122. }
  123. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  124. /**
  125. * cnss_get_mem_segment_info - Get memory info of different type
  126. * @type: memory type
  127. * @segment: array to save the segment info
  128. * @seg: segment count
  129. *
  130. * Return: 0 on success, negative value on failure
  131. */
  132. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  133. struct cnss_mem_segment segment[],
  134. u32 segment_count)
  135. {
  136. struct cnss_plat_data *plat_priv;
  137. u32 i;
  138. plat_priv = cnss_get_plat_priv(NULL);
  139. if (!plat_priv)
  140. return -ENODEV;
  141. switch (type) {
  142. case CNSS_REMOTE_MEM_TYPE_FW:
  143. if (segment_count > plat_priv->fw_mem_seg_len)
  144. segment_count = plat_priv->fw_mem_seg_len;
  145. for (i = 0; i < segment_count; i++) {
  146. segment[i].size = plat_priv->fw_mem[i].size;
  147. segment[i].va = plat_priv->fw_mem[i].va;
  148. segment[i].pa = plat_priv->fw_mem[i].pa;
  149. }
  150. break;
  151. case CNSS_REMOTE_MEM_TYPE_QDSS:
  152. if (segment_count > plat_priv->qdss_mem_seg_len)
  153. segment_count = plat_priv->qdss_mem_seg_len;
  154. for (i = 0; i < segment_count; i++) {
  155. segment[i].size = plat_priv->qdss_mem[i].size;
  156. segment[i].va = plat_priv->qdss_mem[i].va;
  157. segment[i].pa = plat_priv->qdss_mem[i].pa;
  158. }
  159. break;
  160. default:
  161. return -EINVAL;
  162. }
  163. return 0;
  164. }
  165. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  166. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  167. enum cnss_feature_v01 feature)
  168. {
  169. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  170. return -EINVAL;
  171. plat_priv->feature_list |= 1 << feature;
  172. return 0;
  173. }
  174. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  175. enum cnss_feature_v01 feature)
  176. {
  177. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  178. return -EINVAL;
  179. plat_priv->feature_list &= ~(1 << feature);
  180. return 0;
  181. }
  182. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  183. u64 *feature_list)
  184. {
  185. if (unlikely(!plat_priv))
  186. return -EINVAL;
  187. *feature_list = plat_priv->feature_list;
  188. return 0;
  189. }
  190. static int cnss_pm_notify(struct notifier_block *b,
  191. unsigned long event, void *p)
  192. {
  193. switch (event) {
  194. case PM_SUSPEND_PREPARE:
  195. down_write(&cnss_pm_sem);
  196. break;
  197. case PM_POST_SUSPEND:
  198. up_write(&cnss_pm_sem);
  199. break;
  200. }
  201. return NOTIFY_DONE;
  202. }
  203. static struct notifier_block cnss_pm_notifier = {
  204. .notifier_call = cnss_pm_notify,
  205. };
  206. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  207. {
  208. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  209. return;
  210. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  211. plat_priv->driver_state,
  212. atomic_read(&plat_priv->pm_count));
  213. pm_stay_awake(&plat_priv->plat_dev->dev);
  214. }
  215. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  216. {
  217. int r = atomic_dec_return(&plat_priv->pm_count);
  218. WARN_ON(r < 0);
  219. if (r != 0)
  220. return;
  221. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  222. plat_priv->driver_state,
  223. atomic_read(&plat_priv->pm_count));
  224. pm_relax(&plat_priv->plat_dev->dev);
  225. }
  226. void cnss_lock_pm_sem(struct device *dev)
  227. {
  228. down_read(&cnss_pm_sem);
  229. }
  230. EXPORT_SYMBOL(cnss_lock_pm_sem);
  231. void cnss_release_pm_sem(struct device *dev)
  232. {
  233. up_read(&cnss_pm_sem);
  234. }
  235. EXPORT_SYMBOL(cnss_release_pm_sem);
  236. int cnss_get_fw_files_for_target(struct device *dev,
  237. struct cnss_fw_files *pfw_files,
  238. u32 target_type, u32 target_version)
  239. {
  240. if (!pfw_files)
  241. return -ENODEV;
  242. switch (target_version) {
  243. case QCA6174_REV3_VERSION:
  244. case QCA6174_REV3_2_VERSION:
  245. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  246. break;
  247. default:
  248. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  249. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  250. target_type, target_version);
  251. break;
  252. }
  253. return 0;
  254. }
  255. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  256. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  257. {
  258. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  259. if (!plat_priv)
  260. return -ENODEV;
  261. if (!cap)
  262. return -EINVAL;
  263. *cap = plat_priv->cap;
  264. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  265. return 0;
  266. }
  267. EXPORT_SYMBOL(cnss_get_platform_cap);
  268. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  269. {
  270. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  271. if (!plat_priv)
  272. return;
  273. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  274. }
  275. EXPORT_SYMBOL(cnss_request_pm_qos);
  276. void cnss_remove_pm_qos(struct device *dev)
  277. {
  278. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  279. if (!plat_priv)
  280. return;
  281. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  282. }
  283. EXPORT_SYMBOL(cnss_remove_pm_qos);
  284. int cnss_wlan_enable(struct device *dev,
  285. struct cnss_wlan_enable_cfg *config,
  286. enum cnss_driver_mode mode,
  287. const char *host_version)
  288. {
  289. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  290. int ret = 0;
  291. if (!plat_priv)
  292. return -ENODEV;
  293. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  294. return 0;
  295. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  296. return 0;
  297. if (!config || !host_version) {
  298. cnss_pr_err("Invalid config or host_version pointer\n");
  299. return -EINVAL;
  300. }
  301. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  302. mode, config, host_version);
  303. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  304. goto skip_cfg;
  305. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  306. if (ret)
  307. goto out;
  308. skip_cfg:
  309. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  310. out:
  311. return ret;
  312. }
  313. EXPORT_SYMBOL(cnss_wlan_enable);
  314. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  315. {
  316. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  317. int ret = 0;
  318. if (!plat_priv)
  319. return -ENODEV;
  320. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  321. return 0;
  322. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  323. return 0;
  324. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  325. cnss_bus_free_qdss_mem(plat_priv);
  326. return ret;
  327. }
  328. EXPORT_SYMBOL(cnss_wlan_disable);
  329. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  330. u32 data_len, u8 *output)
  331. {
  332. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  333. int ret = 0;
  334. if (!plat_priv) {
  335. cnss_pr_err("plat_priv is NULL!\n");
  336. return -EINVAL;
  337. }
  338. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  339. return 0;
  340. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  341. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  342. plat_priv->driver_state);
  343. ret = -EINVAL;
  344. goto out;
  345. }
  346. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  347. data_len, output);
  348. out:
  349. return ret;
  350. }
  351. EXPORT_SYMBOL(cnss_athdiag_read);
  352. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  353. u32 data_len, u8 *input)
  354. {
  355. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  356. int ret = 0;
  357. if (!plat_priv) {
  358. cnss_pr_err("plat_priv is NULL!\n");
  359. return -EINVAL;
  360. }
  361. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  362. return 0;
  363. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  364. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  365. plat_priv->driver_state);
  366. ret = -EINVAL;
  367. goto out;
  368. }
  369. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  370. data_len, input);
  371. out:
  372. return ret;
  373. }
  374. EXPORT_SYMBOL(cnss_athdiag_write);
  375. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  376. {
  377. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  378. if (!plat_priv)
  379. return -ENODEV;
  380. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  381. return 0;
  382. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  383. }
  384. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  385. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  386. {
  387. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  388. if (!plat_priv)
  389. return -EINVAL;
  390. if (plat_priv->device_id != QCA6490_DEVICE_ID ||
  391. !plat_priv->fw_pcie_gen_switch)
  392. return -EOPNOTSUPP;
  393. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  394. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  395. return -EINVAL;
  396. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  397. plat_priv->pcie_gen_speed = pcie_gen_speed;
  398. return 0;
  399. }
  400. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  401. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  402. {
  403. int ret = 0;
  404. if (!plat_priv)
  405. return -ENODEV;
  406. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  407. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  408. if (ret)
  409. goto out;
  410. if (plat_priv->hds_enabled)
  411. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  412. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  413. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  414. plat_priv->ctrl_params.bdf_type);
  415. if (ret)
  416. goto out;
  417. ret = cnss_bus_load_m3(plat_priv);
  418. if (ret)
  419. goto out;
  420. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  421. if (ret)
  422. goto out;
  423. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  424. return 0;
  425. out:
  426. return ret;
  427. }
  428. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  429. {
  430. int ret = 0;
  431. if (!plat_priv->antenna) {
  432. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  433. if (ret)
  434. goto out;
  435. }
  436. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  437. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  438. if (ret)
  439. goto out;
  440. }
  441. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  442. if (ret)
  443. goto out;
  444. return 0;
  445. out:
  446. return ret;
  447. }
  448. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  449. {
  450. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  451. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  452. }
  453. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  454. {
  455. u32 i;
  456. int ret = 0;
  457. struct cnss_plat_ipc_daemon_config *cfg;
  458. ret = cnss_qmi_get_dms_mac(plat_priv);
  459. if (ret == 0 && plat_priv->dms.mac_valid)
  460. goto qmi_send;
  461. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  462. * Thus assert on failure to get MAC from DMS even after retries
  463. */
  464. if (plat_priv->use_nv_mac) {
  465. /* Check if Daemon says platform support DMS MAC provisioning */
  466. cfg = cnss_plat_ipc_qmi_daemon_config();
  467. if (cfg) {
  468. if (!cfg->dms_mac_addr_supported) {
  469. cnss_pr_err("DMS MAC address not supported\n");
  470. CNSS_ASSERT(0);
  471. return -EINVAL;
  472. }
  473. }
  474. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  475. if (plat_priv->dms.mac_valid)
  476. break;
  477. ret = cnss_qmi_get_dms_mac(plat_priv);
  478. if (ret == 0)
  479. break;
  480. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  481. }
  482. if (!plat_priv->dms.mac_valid) {
  483. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  484. CNSS_ASSERT(0);
  485. return -EINVAL;
  486. }
  487. }
  488. qmi_send:
  489. if (plat_priv->dms.mac_valid)
  490. ret =
  491. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  492. ARRAY_SIZE(plat_priv->dms.mac));
  493. return ret;
  494. }
  495. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  496. enum cnss_cal_db_op op, u32 *size)
  497. {
  498. int ret = 0;
  499. u32 timeout = cnss_get_timeout(plat_priv,
  500. CNSS_TIMEOUT_DAEMON_CONNECTION);
  501. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  502. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  503. if (op >= CNSS_CAL_DB_INVALID_OP)
  504. return -EINVAL;
  505. if (!plat_priv->cbc_file_download) {
  506. cnss_pr_info("CAL DB file not required as per BDF\n");
  507. return 0;
  508. }
  509. if (*size == 0) {
  510. cnss_pr_err("Invalid cal file size\n");
  511. return -EINVAL;
  512. }
  513. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  514. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  515. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  516. msecs_to_jiffies(timeout));
  517. if (!ret) {
  518. cnss_pr_err("Daemon not yet connected\n");
  519. CNSS_ASSERT(0);
  520. return ret;
  521. }
  522. }
  523. if (!plat_priv->cal_mem->va) {
  524. cnss_pr_err("CAL DB Memory not setup for FW\n");
  525. return -EINVAL;
  526. }
  527. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  528. if (op == CNSS_CAL_DB_DOWNLOAD) {
  529. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  530. ret = cnss_plat_ipc_qmi_file_download(client_id,
  531. CNSS_CAL_DB_FILE_NAME,
  532. plat_priv->cal_mem->va,
  533. size);
  534. } else {
  535. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  536. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  537. CNSS_CAL_DB_FILE_NAME,
  538. plat_priv->cal_mem->va,
  539. *size);
  540. }
  541. if (ret)
  542. cnss_pr_err("Cal DB file %s %s failure\n",
  543. CNSS_CAL_DB_FILE_NAME,
  544. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  545. else
  546. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  547. CNSS_CAL_DB_FILE_NAME,
  548. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  549. *size);
  550. return ret;
  551. }
  552. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  553. {
  554. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  555. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  556. return -EINVAL;
  557. }
  558. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  559. &plat_priv->cal_file_size);
  560. }
  561. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  562. u32 *cal_file_size)
  563. {
  564. /* To download pass the total size of cal DB mem allocated.
  565. * After cal file is download to mem, its size is updated in
  566. * return pointer
  567. */
  568. *cal_file_size = plat_priv->cal_mem->size;
  569. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  570. cal_file_size);
  571. }
  572. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  573. {
  574. int ret = 0;
  575. u32 cal_file_size = 0;
  576. if (!plat_priv)
  577. return -ENODEV;
  578. cnss_pr_dbg("Processing FW Init Done..\n");
  579. del_timer(&plat_priv->fw_boot_timer);
  580. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  581. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  582. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  583. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  584. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  585. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  586. }
  587. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  588. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  589. CNSS_WALTEST);
  590. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  591. cnss_request_antenna_sharing(plat_priv);
  592. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  593. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  594. plat_priv->cal_time = jiffies;
  595. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  596. CNSS_CALIBRATION);
  597. } else {
  598. ret = cnss_setup_dms_mac(plat_priv);
  599. ret = cnss_bus_call_driver_probe(plat_priv);
  600. }
  601. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  602. goto out;
  603. else if (ret)
  604. goto shutdown;
  605. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  606. return 0;
  607. shutdown:
  608. cnss_bus_dev_shutdown(plat_priv);
  609. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  610. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  611. out:
  612. return ret;
  613. }
  614. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  615. {
  616. switch (type) {
  617. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  618. return "SERVER_ARRIVE";
  619. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  620. return "SERVER_EXIT";
  621. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  622. return "REQUEST_MEM";
  623. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  624. return "FW_MEM_READY";
  625. case CNSS_DRIVER_EVENT_FW_READY:
  626. return "FW_READY";
  627. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  628. return "COLD_BOOT_CAL_START";
  629. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  630. return "COLD_BOOT_CAL_DONE";
  631. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  632. return "REGISTER_DRIVER";
  633. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  634. return "UNREGISTER_DRIVER";
  635. case CNSS_DRIVER_EVENT_RECOVERY:
  636. return "RECOVERY";
  637. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  638. return "FORCE_FW_ASSERT";
  639. case CNSS_DRIVER_EVENT_POWER_UP:
  640. return "POWER_UP";
  641. case CNSS_DRIVER_EVENT_POWER_DOWN:
  642. return "POWER_DOWN";
  643. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  644. return "IDLE_RESTART";
  645. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  646. return "IDLE_SHUTDOWN";
  647. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  648. return "IMS_WFC_CALL_IND";
  649. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  650. return "WLFW_TWC_CFG_IND";
  651. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  652. return "QDSS_TRACE_REQ_MEM";
  653. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  654. return "FW_MEM_FILE_SAVE";
  655. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  656. return "QDSS_TRACE_FREE";
  657. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  658. return "QDSS_TRACE_REQ_DATA";
  659. case CNSS_DRIVER_EVENT_MAX:
  660. return "EVENT_MAX";
  661. }
  662. return "UNKNOWN";
  663. };
  664. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  665. enum cnss_driver_event_type type,
  666. u32 flags, void *data)
  667. {
  668. struct cnss_driver_event *event;
  669. unsigned long irq_flags;
  670. int gfp = GFP_KERNEL;
  671. int ret = 0;
  672. if (!plat_priv)
  673. return -ENODEV;
  674. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  675. cnss_driver_event_to_str(type), type,
  676. flags ? "-sync" : "", plat_priv->driver_state, flags);
  677. if (type >= CNSS_DRIVER_EVENT_MAX) {
  678. cnss_pr_err("Invalid Event type: %d, can't post", type);
  679. return -EINVAL;
  680. }
  681. if (in_interrupt() || irqs_disabled())
  682. gfp = GFP_ATOMIC;
  683. event = kzalloc(sizeof(*event), gfp);
  684. if (!event)
  685. return -ENOMEM;
  686. cnss_pm_stay_awake(plat_priv);
  687. event->type = type;
  688. event->data = data;
  689. init_completion(&event->complete);
  690. event->ret = CNSS_EVENT_PENDING;
  691. event->sync = !!(flags & CNSS_EVENT_SYNC);
  692. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  693. list_add_tail(&event->list, &plat_priv->event_list);
  694. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  695. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  696. if (!(flags & CNSS_EVENT_SYNC))
  697. goto out;
  698. if (flags & CNSS_EVENT_UNKILLABLE)
  699. wait_for_completion(&event->complete);
  700. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  701. ret = wait_for_completion_killable(&event->complete);
  702. else
  703. ret = wait_for_completion_interruptible(&event->complete);
  704. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  705. cnss_driver_event_to_str(type), type,
  706. plat_priv->driver_state, ret, event->ret);
  707. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  708. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  709. event->sync = false;
  710. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  711. ret = -EINTR;
  712. goto out;
  713. }
  714. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  715. ret = event->ret;
  716. kfree(event);
  717. out:
  718. cnss_pm_relax(plat_priv);
  719. return ret;
  720. }
  721. /**
  722. * cnss_get_timeout - Get timeout for corresponding type.
  723. * @plat_priv: Pointer to platform driver context.
  724. * @cnss_timeout_type: Timeout type.
  725. *
  726. * Return: Timeout in milliseconds.
  727. */
  728. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  729. enum cnss_timeout_type timeout_type)
  730. {
  731. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  732. switch (timeout_type) {
  733. case CNSS_TIMEOUT_QMI:
  734. return qmi_timeout;
  735. case CNSS_TIMEOUT_POWER_UP:
  736. return (qmi_timeout << 2);
  737. case CNSS_TIMEOUT_IDLE_RESTART:
  738. /* In idle restart power up sequence, we have fw_boot_timer to
  739. * handle FW initialization failure.
  740. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  741. * account for FW dump collection and FW re-initialization on
  742. * retry.
  743. */
  744. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  745. case CNSS_TIMEOUT_CALIBRATION:
  746. /* Similar to mission mode, in CBC if FW init fails
  747. * fw recovery is tried. Thus return 2x the CBC timeout.
  748. */
  749. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  750. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  751. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  752. case CNSS_TIMEOUT_RDDM:
  753. return CNSS_RDDM_TIMEOUT_MS;
  754. case CNSS_TIMEOUT_RECOVERY:
  755. return RECOVERY_TIMEOUT;
  756. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  757. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  758. default:
  759. return qmi_timeout;
  760. }
  761. }
  762. unsigned int cnss_get_boot_timeout(struct device *dev)
  763. {
  764. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  765. if (!plat_priv) {
  766. cnss_pr_err("plat_priv is NULL\n");
  767. return 0;
  768. }
  769. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  770. }
  771. EXPORT_SYMBOL(cnss_get_boot_timeout);
  772. int cnss_power_up(struct device *dev)
  773. {
  774. int ret = 0;
  775. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  776. unsigned int timeout;
  777. if (!plat_priv) {
  778. cnss_pr_err("plat_priv is NULL\n");
  779. return -ENODEV;
  780. }
  781. cnss_pr_dbg("Powering up device\n");
  782. ret = cnss_driver_event_post(plat_priv,
  783. CNSS_DRIVER_EVENT_POWER_UP,
  784. CNSS_EVENT_SYNC, NULL);
  785. if (ret)
  786. goto out;
  787. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  788. goto out;
  789. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  790. reinit_completion(&plat_priv->power_up_complete);
  791. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  792. msecs_to_jiffies(timeout));
  793. if (!ret) {
  794. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  795. timeout);
  796. ret = -EAGAIN;
  797. goto out;
  798. }
  799. return 0;
  800. out:
  801. return ret;
  802. }
  803. EXPORT_SYMBOL(cnss_power_up);
  804. int cnss_power_down(struct device *dev)
  805. {
  806. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  807. if (!plat_priv) {
  808. cnss_pr_err("plat_priv is NULL\n");
  809. return -ENODEV;
  810. }
  811. cnss_pr_dbg("Powering down device\n");
  812. return cnss_driver_event_post(plat_priv,
  813. CNSS_DRIVER_EVENT_POWER_DOWN,
  814. CNSS_EVENT_SYNC, NULL);
  815. }
  816. EXPORT_SYMBOL(cnss_power_down);
  817. int cnss_idle_restart(struct device *dev)
  818. {
  819. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  820. unsigned int timeout;
  821. int ret = 0;
  822. if (!plat_priv) {
  823. cnss_pr_err("plat_priv is NULL\n");
  824. return -ENODEV;
  825. }
  826. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  827. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  828. return -EBUSY;
  829. }
  830. cnss_pr_dbg("Doing idle restart\n");
  831. reinit_completion(&plat_priv->power_up_complete);
  832. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  833. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  834. ret = -EINVAL;
  835. goto out;
  836. }
  837. ret = cnss_driver_event_post(plat_priv,
  838. CNSS_DRIVER_EVENT_IDLE_RESTART,
  839. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  840. if (ret)
  841. goto out;
  842. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  843. ret = cnss_bus_call_driver_probe(plat_priv);
  844. goto out;
  845. }
  846. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  847. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  848. msecs_to_jiffies(timeout));
  849. if (plat_priv->power_up_error) {
  850. ret = plat_priv->power_up_error;
  851. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  852. cnss_pr_dbg("Power up error:%d, exiting\n",
  853. plat_priv->power_up_error);
  854. goto out;
  855. }
  856. if (!ret) {
  857. /* This exception occurs after attempting retry of FW recovery.
  858. * Thus we can safely power off the device.
  859. */
  860. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  861. timeout);
  862. ret = -ETIMEDOUT;
  863. cnss_power_down(dev);
  864. CNSS_ASSERT(0);
  865. goto out;
  866. }
  867. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  868. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  869. del_timer(&plat_priv->fw_boot_timer);
  870. ret = -EINVAL;
  871. goto out;
  872. }
  873. mutex_unlock(&plat_priv->driver_ops_lock);
  874. return 0;
  875. out:
  876. mutex_unlock(&plat_priv->driver_ops_lock);
  877. return ret;
  878. }
  879. EXPORT_SYMBOL(cnss_idle_restart);
  880. int cnss_idle_shutdown(struct device *dev)
  881. {
  882. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  883. unsigned int timeout;
  884. int ret;
  885. if (!plat_priv) {
  886. cnss_pr_err("plat_priv is NULL\n");
  887. return -ENODEV;
  888. }
  889. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  890. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  891. return -EAGAIN;
  892. }
  893. cnss_pr_dbg("Doing idle shutdown\n");
  894. if (!test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) &&
  895. !test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  896. goto skip_wait;
  897. reinit_completion(&plat_priv->recovery_complete);
  898. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY);
  899. ret = wait_for_completion_timeout(&plat_priv->recovery_complete,
  900. msecs_to_jiffies(timeout));
  901. if (!ret) {
  902. cnss_pr_err("Timeout (%ums) waiting for recovery to complete\n",
  903. timeout);
  904. CNSS_ASSERT(0);
  905. }
  906. skip_wait:
  907. return cnss_driver_event_post(plat_priv,
  908. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  909. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  910. }
  911. EXPORT_SYMBOL(cnss_idle_shutdown);
  912. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  913. {
  914. int ret = 0;
  915. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  916. if (ret) {
  917. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  918. goto out;
  919. }
  920. ret = cnss_get_clk(plat_priv);
  921. if (ret) {
  922. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  923. goto put_vreg;
  924. }
  925. ret = cnss_get_pinctrl(plat_priv);
  926. if (ret) {
  927. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  928. goto put_clk;
  929. }
  930. return 0;
  931. put_clk:
  932. cnss_put_clk(plat_priv);
  933. put_vreg:
  934. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  935. out:
  936. return ret;
  937. }
  938. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  939. {
  940. cnss_put_clk(plat_priv);
  941. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  942. }
  943. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  944. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  945. unsigned long code,
  946. void *ss_handle)
  947. {
  948. struct cnss_plat_data *plat_priv =
  949. container_of(nb, struct cnss_plat_data, modem_nb);
  950. struct cnss_esoc_info *esoc_info;
  951. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  952. if (!plat_priv)
  953. return NOTIFY_DONE;
  954. esoc_info = &plat_priv->esoc_info;
  955. if (code == SUBSYS_AFTER_POWERUP)
  956. esoc_info->modem_current_status = 1;
  957. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  958. esoc_info->modem_current_status = 0;
  959. else
  960. return NOTIFY_DONE;
  961. if (!cnss_bus_call_driver_modem_status(plat_priv,
  962. esoc_info->modem_current_status))
  963. return NOTIFY_DONE;
  964. return NOTIFY_OK;
  965. }
  966. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  967. {
  968. int ret = 0;
  969. struct device *dev;
  970. struct cnss_esoc_info *esoc_info;
  971. struct esoc_desc *esoc_desc;
  972. const char *client_desc;
  973. dev = &plat_priv->plat_dev->dev;
  974. esoc_info = &plat_priv->esoc_info;
  975. esoc_info->notify_modem_status =
  976. of_property_read_bool(dev->of_node,
  977. "qcom,notify-modem-status");
  978. if (!esoc_info->notify_modem_status)
  979. goto out;
  980. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  981. &client_desc);
  982. if (ret) {
  983. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  984. } else {
  985. esoc_desc = devm_register_esoc_client(dev, client_desc);
  986. if (IS_ERR_OR_NULL(esoc_desc)) {
  987. ret = PTR_RET(esoc_desc);
  988. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  989. ret);
  990. goto out;
  991. }
  992. esoc_info->esoc_desc = esoc_desc;
  993. }
  994. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  995. esoc_info->modem_current_status = 0;
  996. esoc_info->modem_notify_handler =
  997. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  998. esoc_info->esoc_desc->name :
  999. "modem", &plat_priv->modem_nb);
  1000. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1001. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1002. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1003. ret);
  1004. goto unreg_esoc;
  1005. }
  1006. return 0;
  1007. unreg_esoc:
  1008. if (esoc_info->esoc_desc)
  1009. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1010. out:
  1011. return ret;
  1012. }
  1013. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1014. {
  1015. struct device *dev;
  1016. struct cnss_esoc_info *esoc_info;
  1017. dev = &plat_priv->plat_dev->dev;
  1018. esoc_info = &plat_priv->esoc_info;
  1019. if (esoc_info->notify_modem_status)
  1020. subsys_notif_unregister_notifier
  1021. (esoc_info->modem_notify_handler,
  1022. &plat_priv->modem_nb);
  1023. if (esoc_info->esoc_desc)
  1024. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1025. }
  1026. #else
  1027. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1028. {
  1029. return 0;
  1030. }
  1031. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1032. #endif
  1033. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1034. {
  1035. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1036. int ret = 0;
  1037. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1038. return 0;
  1039. enable_irq(sol_gpio->dev_sol_irq);
  1040. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1041. if (ret)
  1042. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1043. ret);
  1044. return ret;
  1045. }
  1046. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1047. {
  1048. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1049. int ret = 0;
  1050. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1051. return 0;
  1052. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1053. if (ret)
  1054. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1055. ret);
  1056. disable_irq(sol_gpio->dev_sol_irq);
  1057. return ret;
  1058. }
  1059. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1060. {
  1061. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1062. if (sol_gpio->dev_sol_gpio < 0)
  1063. return -EINVAL;
  1064. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1065. }
  1066. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1067. {
  1068. struct cnss_plat_data *plat_priv = data;
  1069. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1070. sol_gpio->dev_sol_counter++;
  1071. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1072. irq, sol_gpio->dev_sol_counter);
  1073. /* Make sure abort current suspend */
  1074. cnss_pm_stay_awake(plat_priv);
  1075. cnss_pm_relax(plat_priv);
  1076. pm_system_wakeup();
  1077. cnss_bus_handle_dev_sol_irq(plat_priv);
  1078. return IRQ_HANDLED;
  1079. }
  1080. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1081. {
  1082. struct device *dev = &plat_priv->plat_dev->dev;
  1083. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1084. int ret = 0;
  1085. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1086. "wlan-dev-sol-gpio", 0);
  1087. if (sol_gpio->dev_sol_gpio < 0)
  1088. goto out;
  1089. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1090. sol_gpio->dev_sol_gpio);
  1091. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1092. if (ret) {
  1093. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1094. ret);
  1095. goto out;
  1096. }
  1097. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1098. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1099. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1100. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1101. if (ret) {
  1102. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1103. goto free_gpio;
  1104. }
  1105. return 0;
  1106. free_gpio:
  1107. gpio_free(sol_gpio->dev_sol_gpio);
  1108. out:
  1109. return ret;
  1110. }
  1111. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1112. {
  1113. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1114. if (sol_gpio->dev_sol_gpio < 0)
  1115. return;
  1116. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1117. gpio_free(sol_gpio->dev_sol_gpio);
  1118. }
  1119. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1120. {
  1121. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1122. if (sol_gpio->host_sol_gpio < 0)
  1123. return -EINVAL;
  1124. if (value)
  1125. cnss_pr_dbg("Assert host SOL GPIO\n");
  1126. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1127. return 0;
  1128. }
  1129. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1130. {
  1131. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1132. if (sol_gpio->host_sol_gpio < 0)
  1133. return -EINVAL;
  1134. return gpio_get_value(sol_gpio->host_sol_gpio);
  1135. }
  1136. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1137. {
  1138. struct device *dev = &plat_priv->plat_dev->dev;
  1139. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1140. int ret = 0;
  1141. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1142. "wlan-host-sol-gpio", 0);
  1143. if (sol_gpio->host_sol_gpio < 0)
  1144. goto out;
  1145. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1146. sol_gpio->host_sol_gpio);
  1147. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1148. if (ret) {
  1149. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1150. ret);
  1151. goto out;
  1152. }
  1153. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1154. return 0;
  1155. out:
  1156. return ret;
  1157. }
  1158. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1159. {
  1160. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1161. if (sol_gpio->host_sol_gpio < 0)
  1162. return;
  1163. gpio_free(sol_gpio->host_sol_gpio);
  1164. }
  1165. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1166. {
  1167. int ret;
  1168. ret = cnss_init_dev_sol_gpio(plat_priv);
  1169. if (ret)
  1170. goto out;
  1171. ret = cnss_init_host_sol_gpio(plat_priv);
  1172. if (ret)
  1173. goto deinit_dev_sol;
  1174. return 0;
  1175. deinit_dev_sol:
  1176. cnss_deinit_dev_sol_gpio(plat_priv);
  1177. out:
  1178. return ret;
  1179. }
  1180. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1181. {
  1182. cnss_deinit_host_sol_gpio(plat_priv);
  1183. cnss_deinit_dev_sol_gpio(plat_priv);
  1184. }
  1185. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1186. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1187. {
  1188. struct cnss_plat_data *plat_priv;
  1189. int ret = 0;
  1190. if (!subsys_desc->dev) {
  1191. cnss_pr_err("dev from subsys_desc is NULL\n");
  1192. return -ENODEV;
  1193. }
  1194. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1195. if (!plat_priv) {
  1196. cnss_pr_err("plat_priv is NULL\n");
  1197. return -ENODEV;
  1198. }
  1199. if (!plat_priv->driver_state) {
  1200. cnss_pr_dbg("Powerup is ignored\n");
  1201. return 0;
  1202. }
  1203. ret = cnss_bus_dev_powerup(plat_priv);
  1204. if (ret)
  1205. __pm_relax(plat_priv->recovery_ws);
  1206. return ret;
  1207. }
  1208. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1209. bool force_stop)
  1210. {
  1211. struct cnss_plat_data *plat_priv;
  1212. if (!subsys_desc->dev) {
  1213. cnss_pr_err("dev from subsys_desc is NULL\n");
  1214. return -ENODEV;
  1215. }
  1216. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1217. if (!plat_priv) {
  1218. cnss_pr_err("plat_priv is NULL\n");
  1219. return -ENODEV;
  1220. }
  1221. if (!plat_priv->driver_state) {
  1222. cnss_pr_dbg("shutdown is ignored\n");
  1223. return 0;
  1224. }
  1225. return cnss_bus_dev_shutdown(plat_priv);
  1226. }
  1227. void cnss_device_crashed(struct device *dev)
  1228. {
  1229. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1230. struct cnss_subsys_info *subsys_info;
  1231. if (!plat_priv)
  1232. return;
  1233. subsys_info = &plat_priv->subsys_info;
  1234. if (subsys_info->subsys_device) {
  1235. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1236. subsys_set_crash_status(subsys_info->subsys_device, true);
  1237. subsystem_restart_dev(subsys_info->subsys_device);
  1238. }
  1239. }
  1240. EXPORT_SYMBOL(cnss_device_crashed);
  1241. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1242. {
  1243. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1244. if (!plat_priv) {
  1245. cnss_pr_err("plat_priv is NULL\n");
  1246. return;
  1247. }
  1248. cnss_bus_dev_crash_shutdown(plat_priv);
  1249. }
  1250. static int cnss_subsys_ramdump(int enable,
  1251. const struct subsys_desc *subsys_desc)
  1252. {
  1253. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1254. if (!plat_priv) {
  1255. cnss_pr_err("plat_priv is NULL\n");
  1256. return -ENODEV;
  1257. }
  1258. if (!enable)
  1259. return 0;
  1260. return cnss_bus_dev_ramdump(plat_priv);
  1261. }
  1262. static void cnss_recovery_work_handler(struct work_struct *work)
  1263. {
  1264. }
  1265. #else
  1266. static void cnss_recovery_work_handler(struct work_struct *work)
  1267. {
  1268. int ret;
  1269. struct cnss_plat_data *plat_priv =
  1270. container_of(work, struct cnss_plat_data, recovery_work);
  1271. if (!plat_priv->recovery_enabled)
  1272. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1273. cnss_bus_dev_shutdown(plat_priv);
  1274. cnss_bus_dev_ramdump(plat_priv);
  1275. msleep(POWER_RESET_MIN_DELAY_MS);
  1276. ret = cnss_bus_dev_powerup(plat_priv);
  1277. if (ret)
  1278. __pm_relax(plat_priv->recovery_ws);
  1279. return;
  1280. }
  1281. void cnss_device_crashed(struct device *dev)
  1282. {
  1283. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1284. if (!plat_priv)
  1285. return;
  1286. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1287. schedule_work(&plat_priv->recovery_work);
  1288. }
  1289. EXPORT_SYMBOL(cnss_device_crashed);
  1290. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1291. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1292. {
  1293. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1294. struct cnss_ramdump_info *ramdump_info;
  1295. if (!plat_priv)
  1296. return NULL;
  1297. ramdump_info = &plat_priv->ramdump_info;
  1298. *size = ramdump_info->ramdump_size;
  1299. return ramdump_info->ramdump_va;
  1300. }
  1301. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1302. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1303. {
  1304. switch (reason) {
  1305. case CNSS_REASON_DEFAULT:
  1306. return "DEFAULT";
  1307. case CNSS_REASON_LINK_DOWN:
  1308. return "LINK_DOWN";
  1309. case CNSS_REASON_RDDM:
  1310. return "RDDM";
  1311. case CNSS_REASON_TIMEOUT:
  1312. return "TIMEOUT";
  1313. }
  1314. return "UNKNOWN";
  1315. };
  1316. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1317. enum cnss_recovery_reason reason)
  1318. {
  1319. plat_priv->recovery_count++;
  1320. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1321. goto self_recovery;
  1322. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1323. cnss_pr_dbg("Skip device recovery\n");
  1324. return 0;
  1325. }
  1326. /* FW recovery sequence has multiple steps and firmware load requires
  1327. * linux PM in awake state. Thus hold the cnss wake source until
  1328. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1329. * time taken in this process.
  1330. */
  1331. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1332. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1333. true);
  1334. switch (reason) {
  1335. case CNSS_REASON_LINK_DOWN:
  1336. if (!cnss_bus_check_link_status(plat_priv)) {
  1337. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1338. return 0;
  1339. }
  1340. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1341. &plat_priv->ctrl_params.quirks))
  1342. goto self_recovery;
  1343. if (!cnss_bus_recover_link_down(plat_priv)) {
  1344. /* clear recovery bit here to avoid skipping
  1345. * the recovery work for RDDM later
  1346. */
  1347. clear_bit(CNSS_DRIVER_RECOVERY,
  1348. &plat_priv->driver_state);
  1349. return 0;
  1350. }
  1351. break;
  1352. case CNSS_REASON_RDDM:
  1353. cnss_bus_collect_dump_info(plat_priv, false);
  1354. break;
  1355. case CNSS_REASON_DEFAULT:
  1356. case CNSS_REASON_TIMEOUT:
  1357. break;
  1358. default:
  1359. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1360. cnss_recovery_reason_to_str(reason), reason);
  1361. break;
  1362. }
  1363. cnss_bus_device_crashed(plat_priv);
  1364. return 0;
  1365. self_recovery:
  1366. cnss_pr_dbg("Going for self recovery\n");
  1367. cnss_bus_dev_shutdown(plat_priv);
  1368. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1369. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1370. &plat_priv->ctrl_params.quirks);
  1371. cnss_bus_dev_powerup(plat_priv);
  1372. return 0;
  1373. }
  1374. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1375. void *data)
  1376. {
  1377. struct cnss_recovery_data *recovery_data = data;
  1378. int ret = 0;
  1379. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1380. cnss_recovery_reason_to_str(recovery_data->reason),
  1381. recovery_data->reason);
  1382. if (!plat_priv->driver_state) {
  1383. cnss_pr_err("Improper driver state, ignore recovery\n");
  1384. ret = -EINVAL;
  1385. goto out;
  1386. }
  1387. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1388. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1389. ret = -EINVAL;
  1390. goto out;
  1391. }
  1392. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1393. cnss_pr_err("Recovery is already in progress\n");
  1394. CNSS_ASSERT(0);
  1395. ret = -EINVAL;
  1396. goto out;
  1397. }
  1398. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1399. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1400. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1401. ret = -EINVAL;
  1402. goto out;
  1403. }
  1404. switch (plat_priv->device_id) {
  1405. case QCA6174_DEVICE_ID:
  1406. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1407. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1408. &plat_priv->driver_state)) {
  1409. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1410. ret = -EINVAL;
  1411. goto out;
  1412. }
  1413. break;
  1414. default:
  1415. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1416. set_bit(CNSS_FW_BOOT_RECOVERY,
  1417. &plat_priv->driver_state);
  1418. }
  1419. break;
  1420. }
  1421. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1422. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1423. out:
  1424. kfree(data);
  1425. return ret;
  1426. }
  1427. int cnss_self_recovery(struct device *dev,
  1428. enum cnss_recovery_reason reason)
  1429. {
  1430. cnss_schedule_recovery(dev, reason);
  1431. return 0;
  1432. }
  1433. EXPORT_SYMBOL(cnss_self_recovery);
  1434. void cnss_schedule_recovery(struct device *dev,
  1435. enum cnss_recovery_reason reason)
  1436. {
  1437. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1438. struct cnss_recovery_data *data;
  1439. int gfp = GFP_KERNEL;
  1440. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1441. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1442. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1443. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1444. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1445. return;
  1446. }
  1447. if (in_interrupt() || irqs_disabled())
  1448. gfp = GFP_ATOMIC;
  1449. data = kzalloc(sizeof(*data), gfp);
  1450. if (!data)
  1451. return;
  1452. data->reason = reason;
  1453. cnss_driver_event_post(plat_priv,
  1454. CNSS_DRIVER_EVENT_RECOVERY,
  1455. 0, data);
  1456. }
  1457. EXPORT_SYMBOL(cnss_schedule_recovery);
  1458. int cnss_force_fw_assert(struct device *dev)
  1459. {
  1460. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1461. if (!plat_priv) {
  1462. cnss_pr_err("plat_priv is NULL\n");
  1463. return -ENODEV;
  1464. }
  1465. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1466. cnss_pr_info("Forced FW assert is not supported\n");
  1467. return -EOPNOTSUPP;
  1468. }
  1469. if (cnss_bus_is_device_down(plat_priv)) {
  1470. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1471. return 0;
  1472. }
  1473. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1474. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1475. return 0;
  1476. }
  1477. if (in_interrupt() || irqs_disabled())
  1478. cnss_driver_event_post(plat_priv,
  1479. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1480. 0, NULL);
  1481. else
  1482. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1483. return 0;
  1484. }
  1485. EXPORT_SYMBOL(cnss_force_fw_assert);
  1486. int cnss_force_collect_rddm(struct device *dev)
  1487. {
  1488. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1489. unsigned int timeout;
  1490. int ret = 0;
  1491. if (!plat_priv) {
  1492. cnss_pr_err("plat_priv is NULL\n");
  1493. return -ENODEV;
  1494. }
  1495. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1496. cnss_pr_info("Force collect rddm is not supported\n");
  1497. return -EOPNOTSUPP;
  1498. }
  1499. if (cnss_bus_is_device_down(plat_priv)) {
  1500. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1501. goto wait_rddm;
  1502. }
  1503. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1504. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1505. goto wait_rddm;
  1506. }
  1507. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1508. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1509. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1510. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1511. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1512. return 0;
  1513. }
  1514. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1515. if (ret)
  1516. return ret;
  1517. wait_rddm:
  1518. reinit_completion(&plat_priv->rddm_complete);
  1519. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1520. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1521. msecs_to_jiffies(timeout));
  1522. if (!ret) {
  1523. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1524. timeout);
  1525. ret = -ETIMEDOUT;
  1526. } else if (ret > 0) {
  1527. ret = 0;
  1528. }
  1529. return ret;
  1530. }
  1531. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1532. int cnss_qmi_send_get(struct device *dev)
  1533. {
  1534. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1535. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1536. return 0;
  1537. return cnss_bus_qmi_send_get(plat_priv);
  1538. }
  1539. EXPORT_SYMBOL(cnss_qmi_send_get);
  1540. int cnss_qmi_send_put(struct device *dev)
  1541. {
  1542. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1543. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1544. return 0;
  1545. return cnss_bus_qmi_send_put(plat_priv);
  1546. }
  1547. EXPORT_SYMBOL(cnss_qmi_send_put);
  1548. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1549. int cmd_len, void *cb_ctx,
  1550. int (*cb)(void *ctx, void *event, int event_len))
  1551. {
  1552. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1553. int ret;
  1554. if (!plat_priv)
  1555. return -ENODEV;
  1556. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1557. return -EINVAL;
  1558. plat_priv->get_info_cb = cb;
  1559. plat_priv->get_info_cb_ctx = cb_ctx;
  1560. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1561. if (ret) {
  1562. plat_priv->get_info_cb = NULL;
  1563. plat_priv->get_info_cb_ctx = NULL;
  1564. }
  1565. return ret;
  1566. }
  1567. EXPORT_SYMBOL(cnss_qmi_send);
  1568. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1569. {
  1570. int ret = 0;
  1571. u32 retry = 0, timeout;
  1572. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1573. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1574. goto out;
  1575. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1576. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1577. goto out;
  1578. }
  1579. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1580. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1581. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1582. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1583. CNSS_ASSERT(0);
  1584. return -EINVAL;
  1585. }
  1586. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1587. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1588. break;
  1589. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1590. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1591. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1592. CNSS_ASSERT(0);
  1593. ret = -EINVAL;
  1594. goto mark_cal_fail;
  1595. }
  1596. }
  1597. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1598. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  1599. timeout = cnss_get_timeout(plat_priv,
  1600. CNSS_TIMEOUT_CALIBRATION);
  1601. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  1602. timeout / 1000);
  1603. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1604. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1605. msecs_to_jiffies(timeout));
  1606. }
  1607. reinit_completion(&plat_priv->cal_complete);
  1608. ret = cnss_bus_dev_powerup(plat_priv);
  1609. mark_cal_fail:
  1610. if (ret) {
  1611. complete(&plat_priv->cal_complete);
  1612. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1613. /* Set CBC done in driver state to mark attempt and note error
  1614. * since calibration cannot be retried at boot.
  1615. */
  1616. plat_priv->cal_done = CNSS_CAL_FAILURE;
  1617. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1618. }
  1619. out:
  1620. return ret;
  1621. }
  1622. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  1623. void *data)
  1624. {
  1625. struct cnss_cal_info *cal_info = data;
  1626. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  1627. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  1628. goto out;
  1629. switch (cal_info->cal_status) {
  1630. case CNSS_CAL_DONE:
  1631. cnss_pr_dbg("Calibration completed successfully\n");
  1632. plat_priv->cal_done = true;
  1633. break;
  1634. case CNSS_CAL_TIMEOUT:
  1635. case CNSS_CAL_FAILURE:
  1636. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  1637. cal_info->cal_status);
  1638. break;
  1639. default:
  1640. cnss_pr_err("Unknown calibration status: %u\n",
  1641. cal_info->cal_status);
  1642. break;
  1643. }
  1644. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  1645. cnss_bus_free_qdss_mem(plat_priv);
  1646. cnss_release_antenna_sharing(plat_priv);
  1647. cnss_bus_dev_shutdown(plat_priv);
  1648. msleep(POWER_RESET_MIN_DELAY_MS);
  1649. complete(&plat_priv->cal_complete);
  1650. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1651. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1652. if (cal_info->cal_status == CNSS_CAL_DONE) {
  1653. cnss_cal_mem_upload_to_file(plat_priv);
  1654. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1655. goto out;
  1656. cnss_pr_dbg("Schedule WLAN driver load\n");
  1657. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1658. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1659. 0);
  1660. }
  1661. out:
  1662. kfree(data);
  1663. return 0;
  1664. }
  1665. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  1666. {
  1667. int ret;
  1668. ret = cnss_bus_dev_powerup(plat_priv);
  1669. if (ret)
  1670. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1671. return ret;
  1672. }
  1673. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  1674. {
  1675. cnss_bus_dev_shutdown(plat_priv);
  1676. return 0;
  1677. }
  1678. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  1679. {
  1680. int ret = 0;
  1681. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  1682. if (ret < 0)
  1683. return ret;
  1684. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  1685. }
  1686. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  1687. u32 mem_seg_len, u64 pa, u32 size)
  1688. {
  1689. int i = 0;
  1690. u64 offset = 0;
  1691. void *va = NULL;
  1692. u64 local_pa;
  1693. u32 local_size;
  1694. for (i = 0; i < mem_seg_len; i++) {
  1695. local_pa = (u64)fw_mem[i].pa;
  1696. local_size = (u32)fw_mem[i].size;
  1697. if (pa == local_pa && size <= local_size) {
  1698. va = fw_mem[i].va;
  1699. break;
  1700. }
  1701. if (pa > local_pa &&
  1702. pa < local_pa + local_size &&
  1703. pa + size <= local_pa + local_size) {
  1704. offset = pa - local_pa;
  1705. va = fw_mem[i].va + offset;
  1706. break;
  1707. }
  1708. }
  1709. return va;
  1710. }
  1711. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  1712. void *data)
  1713. {
  1714. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1715. struct cnss_fw_mem *fw_mem_seg;
  1716. int ret = 0L;
  1717. void *va = NULL;
  1718. u32 i, fw_mem_seg_len;
  1719. switch (event_data->mem_type) {
  1720. case QMI_WLFW_MEM_TYPE_DDR_V01:
  1721. if (!plat_priv->fw_mem_seg_len)
  1722. goto invalid_mem_save;
  1723. fw_mem_seg = plat_priv->fw_mem;
  1724. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  1725. break;
  1726. case QMI_WLFW_MEM_QDSS_V01:
  1727. if (!plat_priv->qdss_mem_seg_len)
  1728. goto invalid_mem_save;
  1729. fw_mem_seg = plat_priv->qdss_mem;
  1730. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  1731. break;
  1732. default:
  1733. goto invalid_mem_save;
  1734. }
  1735. for (i = 0; i < event_data->mem_seg_len; i++) {
  1736. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  1737. event_data->mem_seg[i].addr,
  1738. event_data->mem_seg[i].size);
  1739. if (!va) {
  1740. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  1741. &event_data->mem_seg[i].addr,
  1742. event_data->mem_type);
  1743. ret = -EINVAL;
  1744. break;
  1745. }
  1746. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  1747. event_data->file_name,
  1748. event_data->mem_seg[i].size);
  1749. if (ret < 0) {
  1750. cnss_pr_err("Fail to save fw mem data: %d\n",
  1751. ret);
  1752. break;
  1753. }
  1754. }
  1755. kfree(data);
  1756. return ret;
  1757. invalid_mem_save:
  1758. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  1759. event_data->mem_type);
  1760. kfree(data);
  1761. return -EINVAL;
  1762. }
  1763. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  1764. {
  1765. cnss_bus_free_qdss_mem(plat_priv);
  1766. return 0;
  1767. }
  1768. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  1769. void *data)
  1770. {
  1771. int ret = 0;
  1772. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1773. if (!plat_priv)
  1774. return -ENODEV;
  1775. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  1776. event_data->total_size);
  1777. kfree(data);
  1778. return ret;
  1779. }
  1780. static void cnss_driver_event_work(struct work_struct *work)
  1781. {
  1782. struct cnss_plat_data *plat_priv =
  1783. container_of(work, struct cnss_plat_data, event_work);
  1784. struct cnss_driver_event *event;
  1785. unsigned long flags;
  1786. int ret = 0;
  1787. if (!plat_priv) {
  1788. cnss_pr_err("plat_priv is NULL!\n");
  1789. return;
  1790. }
  1791. cnss_pm_stay_awake(plat_priv);
  1792. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1793. while (!list_empty(&plat_priv->event_list)) {
  1794. event = list_first_entry(&plat_priv->event_list,
  1795. struct cnss_driver_event, list);
  1796. list_del(&event->list);
  1797. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1798. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  1799. cnss_driver_event_to_str(event->type),
  1800. event->sync ? "-sync" : "", event->type,
  1801. plat_priv->driver_state);
  1802. switch (event->type) {
  1803. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1804. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  1805. break;
  1806. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  1807. ret = cnss_wlfw_server_exit(plat_priv);
  1808. break;
  1809. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  1810. ret = cnss_bus_alloc_fw_mem(plat_priv);
  1811. if (ret)
  1812. break;
  1813. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  1814. break;
  1815. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  1816. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  1817. break;
  1818. case CNSS_DRIVER_EVENT_FW_READY:
  1819. ret = cnss_fw_ready_hdlr(plat_priv);
  1820. break;
  1821. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  1822. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  1823. break;
  1824. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  1825. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  1826. event->data);
  1827. break;
  1828. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1829. ret = cnss_bus_register_driver_hdlr(plat_priv,
  1830. event->data);
  1831. break;
  1832. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1833. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  1834. break;
  1835. case CNSS_DRIVER_EVENT_RECOVERY:
  1836. ret = cnss_driver_recovery_hdlr(plat_priv,
  1837. event->data);
  1838. break;
  1839. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  1840. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1841. break;
  1842. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  1843. set_bit(CNSS_DRIVER_IDLE_RESTART,
  1844. &plat_priv->driver_state);
  1845. /* fall through */
  1846. case CNSS_DRIVER_EVENT_POWER_UP:
  1847. ret = cnss_power_up_hdlr(plat_priv);
  1848. break;
  1849. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1850. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  1851. &plat_priv->driver_state);
  1852. /* fall through */
  1853. case CNSS_DRIVER_EVENT_POWER_DOWN:
  1854. ret = cnss_power_down_hdlr(plat_priv);
  1855. break;
  1856. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  1857. ret = cnss_process_wfc_call_ind_event(plat_priv,
  1858. event->data);
  1859. break;
  1860. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  1861. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  1862. event->data);
  1863. break;
  1864. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1865. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  1866. break;
  1867. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  1868. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  1869. event->data);
  1870. break;
  1871. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1872. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  1873. break;
  1874. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1875. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  1876. event->data);
  1877. break;
  1878. default:
  1879. cnss_pr_err("Invalid driver event type: %d",
  1880. event->type);
  1881. kfree(event);
  1882. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1883. continue;
  1884. }
  1885. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1886. if (event->sync) {
  1887. event->ret = ret;
  1888. complete(&event->complete);
  1889. continue;
  1890. }
  1891. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1892. kfree(event);
  1893. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1894. }
  1895. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1896. cnss_pm_relax(plat_priv);
  1897. }
  1898. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1899. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  1900. {
  1901. int ret = 0;
  1902. struct cnss_subsys_info *subsys_info;
  1903. subsys_info = &plat_priv->subsys_info;
  1904. subsys_info->subsys_desc.name = "wlan";
  1905. subsys_info->subsys_desc.owner = THIS_MODULE;
  1906. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  1907. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  1908. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  1909. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  1910. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  1911. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  1912. if (IS_ERR(subsys_info->subsys_device)) {
  1913. ret = PTR_ERR(subsys_info->subsys_device);
  1914. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  1915. goto out;
  1916. }
  1917. subsys_info->subsys_handle =
  1918. subsystem_get(subsys_info->subsys_desc.name);
  1919. if (!subsys_info->subsys_handle) {
  1920. cnss_pr_err("Failed to get subsys_handle!\n");
  1921. ret = -EINVAL;
  1922. goto unregister_subsys;
  1923. } else if (IS_ERR(subsys_info->subsys_handle)) {
  1924. ret = PTR_ERR(subsys_info->subsys_handle);
  1925. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  1926. goto unregister_subsys;
  1927. }
  1928. return 0;
  1929. unregister_subsys:
  1930. subsys_unregister(subsys_info->subsys_device);
  1931. out:
  1932. return ret;
  1933. }
  1934. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  1935. {
  1936. struct cnss_subsys_info *subsys_info;
  1937. subsys_info = &plat_priv->subsys_info;
  1938. subsystem_put(subsys_info->subsys_handle);
  1939. subsys_unregister(subsys_info->subsys_device);
  1940. }
  1941. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  1942. {
  1943. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  1944. return create_ramdump_device(subsys_info->subsys_desc.name,
  1945. subsys_info->subsys_desc.dev);
  1946. }
  1947. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  1948. void *ramdump_dev)
  1949. {
  1950. destroy_ramdump_device(ramdump_dev);
  1951. }
  1952. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  1953. {
  1954. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  1955. struct ramdump_segment segment;
  1956. memset(&segment, 0, sizeof(segment));
  1957. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  1958. segment.size = ramdump_info->ramdump_size;
  1959. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  1960. }
  1961. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  1962. {
  1963. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  1964. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  1965. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  1966. struct ramdump_segment *ramdump_segs, *s;
  1967. struct cnss_dump_meta_info meta_info = {0};
  1968. int i, ret = 0;
  1969. ramdump_segs = kcalloc(dump_data->nentries + 1,
  1970. sizeof(*ramdump_segs),
  1971. GFP_KERNEL);
  1972. if (!ramdump_segs)
  1973. return -ENOMEM;
  1974. s = ramdump_segs + 1;
  1975. for (i = 0; i < dump_data->nentries; i++) {
  1976. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  1977. cnss_pr_err("Unsupported dump type: %d",
  1978. dump_seg->type);
  1979. continue;
  1980. }
  1981. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  1982. meta_info.entry[dump_seg->type].type = dump_seg->type;
  1983. meta_info.entry[dump_seg->type].entry_start = i + 1;
  1984. }
  1985. meta_info.entry[dump_seg->type].entry_num++;
  1986. s->address = dump_seg->address;
  1987. s->v_address = (void __iomem *)dump_seg->v_address;
  1988. s->size = dump_seg->size;
  1989. s++;
  1990. dump_seg++;
  1991. }
  1992. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  1993. meta_info.version = CNSS_RAMDUMP_VERSION;
  1994. meta_info.chipset = plat_priv->device_id;
  1995. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  1996. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  1997. ramdump_segs->size = sizeof(meta_info);
  1998. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  1999. dump_data->nentries + 1);
  2000. kfree(ramdump_segs);
  2001. return ret;
  2002. }
  2003. #else
  2004. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2005. void *data)
  2006. {
  2007. struct cnss_plat_data *plat_priv =
  2008. container_of(nb, struct cnss_plat_data, panic_nb);
  2009. cnss_bus_dev_crash_shutdown(plat_priv);
  2010. return NOTIFY_DONE;
  2011. }
  2012. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2013. {
  2014. int ret;
  2015. if (!plat_priv)
  2016. return -ENODEV;
  2017. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2018. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2019. &plat_priv->panic_nb);
  2020. if (ret) {
  2021. cnss_pr_err("Failed to register panic handler\n");
  2022. return -EINVAL;
  2023. }
  2024. return 0;
  2025. }
  2026. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2027. {
  2028. int ret;
  2029. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2030. &plat_priv->panic_nb);
  2031. if (ret)
  2032. cnss_pr_err("Failed to unregister panic handler\n");
  2033. }
  2034. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2035. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2036. {
  2037. return &plat_priv->plat_dev->dev;
  2038. }
  2039. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2040. void *ramdump_dev)
  2041. {
  2042. }
  2043. #endif
  2044. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2045. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2046. {
  2047. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2048. struct qcom_dump_segment segment;
  2049. struct list_head head;
  2050. INIT_LIST_HEAD(&head);
  2051. memset(&segment, 0, sizeof(segment));
  2052. segment.va = ramdump_info->ramdump_va;
  2053. segment.size = ramdump_info->ramdump_size;
  2054. list_add(&segment.node, &head);
  2055. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2056. }
  2057. #else
  2058. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2059. {
  2060. return 0;
  2061. }
  2062. /* Using completion event inside dynamically allocated ramdump_desc
  2063. * may result a race between freeing the event after setting it to
  2064. * complete inside dev coredump free callback and the thread that is
  2065. * waiting for completion.
  2066. */
  2067. DECLARE_COMPLETION(dump_done);
  2068. #define TIMEOUT_SAVE_DUMP_MS 30000
  2069. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2070. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2071. { \
  2072. if (class == ELFCLASS32) \
  2073. return sizeof(struct elf32_##__xhdr); \
  2074. else \
  2075. return sizeof(struct elf64_##__xhdr); \
  2076. }
  2077. SIZEOF_ELF_STRUCT(phdr)
  2078. SIZEOF_ELF_STRUCT(hdr)
  2079. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2080. do { \
  2081. if (class == ELFCLASS32) \
  2082. ((struct elf32_##__xhdr *)arg)->member = value; \
  2083. else \
  2084. ((struct elf64_##__xhdr *)arg)->member = value; \
  2085. } while (0)
  2086. #define set_ehdr_property(arg, class, member, value) \
  2087. set_xhdr_property(hdr, arg, class, member, value)
  2088. #define set_phdr_property(arg, class, member, value) \
  2089. set_xhdr_property(phdr, arg, class, member, value)
  2090. /* These replace qcom_ramdump driver APIs called from common API
  2091. * cnss_do_elf_dump() by the ones defined here.
  2092. */
  2093. #define qcom_dump_segment cnss_qcom_dump_segment
  2094. #define qcom_elf_dump cnss_qcom_elf_dump
  2095. #define dump_enabled cnss_dump_enabled
  2096. struct cnss_qcom_dump_segment {
  2097. struct list_head node;
  2098. dma_addr_t da;
  2099. void *va;
  2100. size_t size;
  2101. };
  2102. struct cnss_qcom_ramdump_desc {
  2103. void *data;
  2104. struct completion dump_done;
  2105. };
  2106. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2107. void *data, size_t datalen)
  2108. {
  2109. struct cnss_qcom_ramdump_desc *desc = data;
  2110. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2111. datalen);
  2112. }
  2113. static void cnss_qcom_devcd_freev(void *data)
  2114. {
  2115. struct cnss_qcom_ramdump_desc *desc = data;
  2116. cnss_pr_dbg("Free dump data for dev coredump\n");
  2117. complete(&dump_done);
  2118. vfree(desc->data);
  2119. kfree(desc);
  2120. }
  2121. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2122. gfp_t gfp)
  2123. {
  2124. struct cnss_qcom_ramdump_desc *desc;
  2125. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2126. int ret;
  2127. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2128. if (!desc)
  2129. return -ENOMEM;
  2130. desc->data = data;
  2131. reinit_completion(&dump_done);
  2132. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2133. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2134. ret = wait_for_completion_timeout(&dump_done,
  2135. msecs_to_jiffies(timeout));
  2136. if (!ret)
  2137. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2138. timeout);
  2139. return ret ? 0 : -ETIMEDOUT;
  2140. }
  2141. /* Since the elf32 and elf64 identification is identical apart from
  2142. * the class, use elf32 by default.
  2143. */
  2144. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2145. {
  2146. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2147. ehdr->e_ident[EI_CLASS] = class;
  2148. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2149. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2150. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2151. }
  2152. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2153. unsigned char class)
  2154. {
  2155. struct cnss_qcom_dump_segment *segment;
  2156. void *phdr, *ehdr;
  2157. size_t data_size, offset;
  2158. int phnum = 0;
  2159. void *data;
  2160. void __iomem *ptr;
  2161. if (!segs || list_empty(segs))
  2162. return -EINVAL;
  2163. data_size = sizeof_elf_hdr(class);
  2164. list_for_each_entry(segment, segs, node) {
  2165. data_size += sizeof_elf_phdr(class) + segment->size;
  2166. phnum++;
  2167. }
  2168. data = vmalloc(data_size);
  2169. if (!data)
  2170. return -ENOMEM;
  2171. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2172. ehdr = data;
  2173. memset(ehdr, 0, sizeof_elf_hdr(class));
  2174. init_elf_identification(ehdr, class);
  2175. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2176. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2177. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2178. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2179. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2180. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2181. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2182. phdr = data + sizeof_elf_hdr(class);
  2183. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2184. list_for_each_entry(segment, segs, node) {
  2185. memset(phdr, 0, sizeof_elf_phdr(class));
  2186. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2187. set_phdr_property(phdr, class, p_offset, offset);
  2188. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2189. set_phdr_property(phdr, class, p_paddr, segment->da);
  2190. set_phdr_property(phdr, class, p_filesz, segment->size);
  2191. set_phdr_property(phdr, class, p_memsz, segment->size);
  2192. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2193. set_phdr_property(phdr, class, p_align, 0);
  2194. if (segment->va) {
  2195. memcpy(data + offset, segment->va, segment->size);
  2196. } else {
  2197. ptr = devm_ioremap(dev, segment->da, segment->size);
  2198. if (!ptr) {
  2199. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2200. &segment->da, segment->size);
  2201. memset(data + offset, 0xff, segment->size);
  2202. } else {
  2203. memcpy_fromio(data + offset, ptr,
  2204. segment->size);
  2205. }
  2206. }
  2207. offset += segment->size;
  2208. phdr += sizeof_elf_phdr(class);
  2209. }
  2210. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2211. }
  2212. /* Saving dump to file system is always needed in this case. */
  2213. static bool cnss_dump_enabled(void)
  2214. {
  2215. return true;
  2216. }
  2217. #endif /* CONFIG_QCOM_RAMDUMP */
  2218. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2219. {
  2220. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2221. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2222. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2223. struct qcom_dump_segment *seg;
  2224. struct cnss_dump_meta_info meta_info = {0};
  2225. struct list_head head;
  2226. int i, ret = 0;
  2227. if (!dump_enabled()) {
  2228. cnss_pr_info("Dump collection is not enabled\n");
  2229. return ret;
  2230. }
  2231. INIT_LIST_HEAD(&head);
  2232. for (i = 0; i < dump_data->nentries; i++) {
  2233. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2234. cnss_pr_err("Unsupported dump type: %d",
  2235. dump_seg->type);
  2236. continue;
  2237. }
  2238. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2239. if (!seg)
  2240. continue;
  2241. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2242. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2243. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2244. }
  2245. meta_info.entry[dump_seg->type].entry_num++;
  2246. seg->da = dump_seg->address;
  2247. seg->va = dump_seg->v_address;
  2248. seg->size = dump_seg->size;
  2249. list_add_tail(&seg->node, &head);
  2250. dump_seg++;
  2251. }
  2252. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2253. if (!seg)
  2254. goto do_elf_dump;
  2255. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2256. meta_info.version = CNSS_RAMDUMP_VERSION;
  2257. meta_info.chipset = plat_priv->device_id;
  2258. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2259. seg->va = &meta_info;
  2260. seg->size = sizeof(meta_info);
  2261. list_add(&seg->node, &head);
  2262. do_elf_dump:
  2263. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2264. while (!list_empty(&head)) {
  2265. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2266. list_del(&seg->node);
  2267. kfree(seg);
  2268. }
  2269. return ret;
  2270. }
  2271. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2272. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2273. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2274. {
  2275. struct cnss_ramdump_info *ramdump_info;
  2276. struct msm_dump_entry dump_entry;
  2277. ramdump_info = &plat_priv->ramdump_info;
  2278. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2279. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2280. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2281. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2282. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2283. sizeof(ramdump_info->dump_data.name));
  2284. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2285. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2286. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2287. &dump_entry);
  2288. }
  2289. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2290. {
  2291. int ret = 0;
  2292. struct device *dev;
  2293. struct cnss_ramdump_info *ramdump_info;
  2294. u32 ramdump_size = 0;
  2295. dev = &plat_priv->plat_dev->dev;
  2296. ramdump_info = &plat_priv->ramdump_info;
  2297. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2298. &ramdump_size) == 0) {
  2299. ramdump_info->ramdump_va =
  2300. dma_alloc_coherent(dev, ramdump_size,
  2301. &ramdump_info->ramdump_pa,
  2302. GFP_KERNEL);
  2303. if (ramdump_info->ramdump_va)
  2304. ramdump_info->ramdump_size = ramdump_size;
  2305. }
  2306. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2307. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2308. if (ramdump_info->ramdump_size == 0) {
  2309. cnss_pr_info("Ramdump will not be collected");
  2310. goto out;
  2311. }
  2312. ret = cnss_init_dump_entry(plat_priv);
  2313. if (ret) {
  2314. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2315. goto free_ramdump;
  2316. }
  2317. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2318. if (!ramdump_info->ramdump_dev) {
  2319. cnss_pr_err("Failed to create ramdump device!");
  2320. ret = -ENOMEM;
  2321. goto free_ramdump;
  2322. }
  2323. return 0;
  2324. free_ramdump:
  2325. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2326. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2327. out:
  2328. return ret;
  2329. }
  2330. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2331. {
  2332. struct device *dev;
  2333. struct cnss_ramdump_info *ramdump_info;
  2334. dev = &plat_priv->plat_dev->dev;
  2335. ramdump_info = &plat_priv->ramdump_info;
  2336. if (ramdump_info->ramdump_dev)
  2337. cnss_destroy_ramdump_device(plat_priv,
  2338. ramdump_info->ramdump_dev);
  2339. if (ramdump_info->ramdump_va)
  2340. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2341. ramdump_info->ramdump_va,
  2342. ramdump_info->ramdump_pa);
  2343. }
  2344. /**
  2345. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2346. * @ret: Error returned by msm_dump_data_register_nominidump
  2347. *
  2348. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2349. * ignore failure.
  2350. *
  2351. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2352. */
  2353. static int cnss_ignore_dump_data_reg_fail(int ret)
  2354. {
  2355. return ret;
  2356. }
  2357. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2358. {
  2359. int ret = 0;
  2360. struct cnss_ramdump_info_v2 *info_v2;
  2361. struct cnss_dump_data *dump_data;
  2362. struct msm_dump_entry dump_entry;
  2363. struct device *dev = &plat_priv->plat_dev->dev;
  2364. u32 ramdump_size = 0;
  2365. info_v2 = &plat_priv->ramdump_info_v2;
  2366. dump_data = &info_v2->dump_data;
  2367. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2368. &ramdump_size) == 0)
  2369. info_v2->ramdump_size = ramdump_size;
  2370. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2371. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2372. if (!info_v2->dump_data_vaddr)
  2373. return -ENOMEM;
  2374. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2375. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2376. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2377. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2378. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2379. sizeof(dump_data->name));
  2380. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2381. dump_entry.addr = virt_to_phys(dump_data);
  2382. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2383. &dump_entry);
  2384. if (ret) {
  2385. ret = cnss_ignore_dump_data_reg_fail(ret);
  2386. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  2387. ret ? "Error" : "Ignoring", ret);
  2388. goto free_ramdump;
  2389. }
  2390. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2391. if (!info_v2->ramdump_dev) {
  2392. cnss_pr_err("Failed to create ramdump device!\n");
  2393. ret = -ENOMEM;
  2394. goto free_ramdump;
  2395. }
  2396. return 0;
  2397. free_ramdump:
  2398. kfree(info_v2->dump_data_vaddr);
  2399. info_v2->dump_data_vaddr = NULL;
  2400. return ret;
  2401. }
  2402. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  2403. {
  2404. struct cnss_ramdump_info_v2 *info_v2;
  2405. info_v2 = &plat_priv->ramdump_info_v2;
  2406. if (info_v2->ramdump_dev)
  2407. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  2408. kfree(info_v2->dump_data_vaddr);
  2409. info_v2->dump_data_vaddr = NULL;
  2410. info_v2->dump_data_valid = false;
  2411. }
  2412. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2413. {
  2414. int ret = 0;
  2415. switch (plat_priv->device_id) {
  2416. case QCA6174_DEVICE_ID:
  2417. ret = cnss_register_ramdump_v1(plat_priv);
  2418. break;
  2419. case QCA6290_DEVICE_ID:
  2420. case QCA6390_DEVICE_ID:
  2421. case QCA6490_DEVICE_ID:
  2422. case KIWI_DEVICE_ID:
  2423. ret = cnss_register_ramdump_v2(plat_priv);
  2424. break;
  2425. default:
  2426. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2427. ret = -ENODEV;
  2428. break;
  2429. }
  2430. return ret;
  2431. }
  2432. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2433. {
  2434. switch (plat_priv->device_id) {
  2435. case QCA6174_DEVICE_ID:
  2436. cnss_unregister_ramdump_v1(plat_priv);
  2437. break;
  2438. case QCA6290_DEVICE_ID:
  2439. case QCA6390_DEVICE_ID:
  2440. case QCA6490_DEVICE_ID:
  2441. case KIWI_DEVICE_ID:
  2442. cnss_unregister_ramdump_v2(plat_priv);
  2443. break;
  2444. default:
  2445. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2446. break;
  2447. }
  2448. }
  2449. #else
  2450. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2451. {
  2452. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2453. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  2454. struct device *dev = &plat_priv->plat_dev->dev;
  2455. u32 ramdump_size = 0;
  2456. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2457. &ramdump_size) == 0)
  2458. info_v2->ramdump_size = ramdump_size;
  2459. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2460. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2461. if (!info_v2->dump_data_vaddr)
  2462. return -ENOMEM;
  2463. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2464. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2465. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2466. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2467. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2468. sizeof(dump_data->name));
  2469. info_v2->ramdump_dev = dev;
  2470. return 0;
  2471. }
  2472. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2473. {
  2474. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2475. info_v2->ramdump_dev = NULL;
  2476. kfree(info_v2->dump_data_vaddr);
  2477. info_v2->dump_data_vaddr = NULL;
  2478. info_v2->dump_data_valid = false;
  2479. }
  2480. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  2481. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  2482. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2483. phys_addr_t *pa, unsigned long attrs)
  2484. {
  2485. struct sg_table sgt;
  2486. int ret;
  2487. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  2488. if (ret) {
  2489. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  2490. va, &dma, size, attrs);
  2491. return -EINVAL;
  2492. }
  2493. *pa = page_to_phys(sg_page(sgt.sgl));
  2494. sg_free_table(&sgt);
  2495. return 0;
  2496. }
  2497. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2498. enum cnss_fw_dump_type type, int seg_no,
  2499. void *va, phys_addr_t pa, size_t size)
  2500. {
  2501. struct md_region md_entry;
  2502. int ret;
  2503. switch (type) {
  2504. case CNSS_FW_IMAGE:
  2505. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2506. seg_no);
  2507. break;
  2508. case CNSS_FW_RDDM:
  2509. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2510. seg_no);
  2511. break;
  2512. case CNSS_FW_REMOTE_HEAP:
  2513. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2514. seg_no);
  2515. break;
  2516. default:
  2517. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2518. return -EINVAL;
  2519. }
  2520. md_entry.phys_addr = pa;
  2521. md_entry.virt_addr = (uintptr_t)va;
  2522. md_entry.size = size;
  2523. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2524. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2525. md_entry.name, va, &pa, size);
  2526. ret = msm_minidump_add_region(&md_entry);
  2527. if (ret < 0)
  2528. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  2529. return ret;
  2530. }
  2531. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2532. enum cnss_fw_dump_type type, int seg_no,
  2533. void *va, phys_addr_t pa, size_t size)
  2534. {
  2535. struct md_region md_entry;
  2536. int ret;
  2537. switch (type) {
  2538. case CNSS_FW_IMAGE:
  2539. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2540. seg_no);
  2541. break;
  2542. case CNSS_FW_RDDM:
  2543. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2544. seg_no);
  2545. break;
  2546. case CNSS_FW_REMOTE_HEAP:
  2547. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2548. seg_no);
  2549. break;
  2550. default:
  2551. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2552. return -EINVAL;
  2553. }
  2554. md_entry.phys_addr = pa;
  2555. md_entry.virt_addr = (uintptr_t)va;
  2556. md_entry.size = size;
  2557. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2558. cnss_pr_dbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2559. md_entry.name, va, &pa, size);
  2560. ret = msm_minidump_remove_region(&md_entry);
  2561. if (ret)
  2562. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  2563. ret);
  2564. return ret;
  2565. }
  2566. #else
  2567. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2568. phys_addr_t *pa, unsigned long attrs)
  2569. {
  2570. return 0;
  2571. }
  2572. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2573. enum cnss_fw_dump_type type, int seg_no,
  2574. void *va, phys_addr_t pa, size_t size)
  2575. {
  2576. return 0;
  2577. }
  2578. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2579. enum cnss_fw_dump_type type, int seg_no,
  2580. void *va, phys_addr_t pa, size_t size)
  2581. {
  2582. return 0;
  2583. }
  2584. #endif /* CONFIG_QCOM_MINIDUMP */
  2585. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  2586. const struct firmware **fw_entry,
  2587. const char *filename)
  2588. {
  2589. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  2590. return request_firmware_direct(fw_entry, filename,
  2591. &plat_priv->plat_dev->dev);
  2592. else
  2593. return firmware_request_nowarn(fw_entry, filename,
  2594. &plat_priv->plat_dev->dev);
  2595. }
  2596. #if IS_ENABLED(CONFIG_INTERCONNECT)
  2597. /**
  2598. * cnss_register_bus_scale() - Setup interconnect voting data
  2599. * @plat_priv: Platform data structure
  2600. *
  2601. * For different interconnect path configured in device tree setup voting data
  2602. * for list of bandwidth requirements.
  2603. *
  2604. * Result: 0 for success. -EINVAL if not configured
  2605. */
  2606. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2607. {
  2608. int ret = -EINVAL;
  2609. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  2610. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2611. struct device *dev = &plat_priv->plat_dev->dev;
  2612. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  2613. ret = of_property_read_u32(dev->of_node,
  2614. "qcom,icc-path-count",
  2615. &plat_priv->icc.path_count);
  2616. if (ret) {
  2617. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  2618. return 0;
  2619. }
  2620. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  2621. "qcom,bus-bw-cfg-count",
  2622. &plat_priv->icc.bus_bw_cfg_count);
  2623. if (ret) {
  2624. cnss_pr_err("Failed to get Bus BW Config table size\n");
  2625. goto cleanup;
  2626. }
  2627. cfg_arr_size = plat_priv->icc.path_count *
  2628. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  2629. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  2630. if (!cfg_arr) {
  2631. cnss_pr_err("Failed to alloc cfg table mem\n");
  2632. ret = -ENOMEM;
  2633. goto cleanup;
  2634. }
  2635. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  2636. "qcom,bus-bw-cfg", cfg_arr,
  2637. cfg_arr_size);
  2638. if (ret) {
  2639. cnss_pr_err("Invalid Bus BW Config Table\n");
  2640. goto cleanup;
  2641. }
  2642. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  2643. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  2644. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  2645. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  2646. GFP_KERNEL);
  2647. if (!bus_bw_info) {
  2648. ret = -ENOMEM;
  2649. goto out;
  2650. }
  2651. ret = of_property_read_string_index(dev->of_node,
  2652. "interconnect-names", idx,
  2653. &bus_bw_info->icc_name);
  2654. if (ret)
  2655. goto out;
  2656. bus_bw_info->icc_path =
  2657. of_icc_get(&plat_priv->plat_dev->dev,
  2658. bus_bw_info->icc_name);
  2659. if (IS_ERR(bus_bw_info->icc_path)) {
  2660. ret = PTR_ERR(bus_bw_info->icc_path);
  2661. if (ret != -EPROBE_DEFER) {
  2662. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  2663. bus_bw_info->icc_name, ret);
  2664. goto out;
  2665. }
  2666. }
  2667. bus_bw_info->cfg_table =
  2668. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  2669. sizeof(*bus_bw_info->cfg_table),
  2670. GFP_KERNEL);
  2671. if (!bus_bw_info->cfg_table) {
  2672. ret = -ENOMEM;
  2673. goto out;
  2674. }
  2675. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  2676. bus_bw_info->icc_name);
  2677. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  2678. CNSS_ICC_VOTE_MAX);
  2679. i < plat_priv->icc.bus_bw_cfg_count;
  2680. i++, j += 2) {
  2681. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  2682. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  2683. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  2684. i, bus_bw_info->cfg_table[i].avg_bw,
  2685. bus_bw_info->cfg_table[i].peak_bw);
  2686. }
  2687. list_add_tail(&bus_bw_info->list,
  2688. &plat_priv->icc.list_head);
  2689. }
  2690. kfree(cfg_arr);
  2691. return 0;
  2692. out:
  2693. list_for_each_entry_safe(bus_bw_info, tmp,
  2694. &plat_priv->icc.list_head, list) {
  2695. list_del(&bus_bw_info->list);
  2696. }
  2697. cleanup:
  2698. kfree(cfg_arr);
  2699. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2700. return ret;
  2701. }
  2702. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  2703. {
  2704. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2705. list_for_each_entry_safe(bus_bw_info, tmp,
  2706. &plat_priv->icc.list_head, list) {
  2707. list_del(&bus_bw_info->list);
  2708. if (bus_bw_info->icc_path)
  2709. icc_put(bus_bw_info->icc_path);
  2710. }
  2711. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2712. }
  2713. #else
  2714. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2715. {
  2716. return 0;
  2717. }
  2718. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  2719. #endif /* CONFIG_INTERCONNECT */
  2720. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  2721. {
  2722. struct cnss_plat_data *plat_priv = cb_ctx;
  2723. if (!plat_priv) {
  2724. cnss_pr_err("%s: Invalid context\n", __func__);
  2725. return;
  2726. }
  2727. if (status) {
  2728. cnss_pr_info("CNSS Daemon connected\n");
  2729. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2730. complete(&plat_priv->daemon_connected);
  2731. } else {
  2732. cnss_pr_info("CNSS Daemon disconnected\n");
  2733. reinit_completion(&plat_priv->daemon_connected);
  2734. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2735. }
  2736. }
  2737. static ssize_t enable_hds_store(struct device *dev,
  2738. struct device_attribute *attr,
  2739. const char *buf, size_t count)
  2740. {
  2741. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2742. unsigned int enable_hds = 0;
  2743. if (!plat_priv)
  2744. return -ENODEV;
  2745. if (sscanf(buf, "%du", &enable_hds) != 1) {
  2746. cnss_pr_err("Invalid enable_hds sysfs command\n");
  2747. return -EINVAL;
  2748. }
  2749. if (enable_hds)
  2750. plat_priv->hds_enabled = true;
  2751. else
  2752. plat_priv->hds_enabled = false;
  2753. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  2754. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  2755. return count;
  2756. }
  2757. static ssize_t recovery_show(struct device *dev,
  2758. struct device_attribute *attr,
  2759. char *buf)
  2760. {
  2761. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2762. u32 buf_size = PAGE_SIZE;
  2763. u32 curr_len = 0;
  2764. u32 buf_written = 0;
  2765. if (!plat_priv)
  2766. return -ENODEV;
  2767. buf_written = scnprintf(buf, buf_size,
  2768. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  2769. "BIT0 -- wlan fw recovery\n"
  2770. "BIT1 -- wlan pcss recovery\n"
  2771. "---------------------------------\n");
  2772. curr_len += buf_written;
  2773. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  2774. "WLAN recovery %s[%d]\n",
  2775. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  2776. plat_priv->recovery_enabled);
  2777. curr_len += buf_written;
  2778. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  2779. "WLAN PCSS recovery %s[%d]\n",
  2780. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  2781. plat_priv->recovery_pcss_enabled);
  2782. curr_len += buf_written;
  2783. /*
  2784. * Now size of curr_len is not over page size for sure,
  2785. * later if new item or none-fixed size item added, need
  2786. * add check to make sure curr_len is not over page size.
  2787. */
  2788. return curr_len;
  2789. }
  2790. static ssize_t recovery_store(struct device *dev,
  2791. struct device_attribute *attr,
  2792. const char *buf, size_t count)
  2793. {
  2794. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2795. unsigned int recovery = 0;
  2796. int ret;
  2797. if (!plat_priv)
  2798. return -ENODEV;
  2799. if (sscanf(buf, "%du", &recovery) != 1) {
  2800. cnss_pr_err("Invalid recovery sysfs command\n");
  2801. return -EINVAL;
  2802. }
  2803. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  2804. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  2805. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  2806. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  2807. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  2808. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  2809. ret = cnss_send_subsys_restart_level_msg(plat_priv);
  2810. if (ret < 0) {
  2811. cnss_pr_err("pcss recovery setting failed with ret %d\n", ret);
  2812. plat_priv->recovery_pcss_enabled = false;
  2813. return -EINVAL;
  2814. }
  2815. return count;
  2816. }
  2817. static ssize_t shutdown_store(struct device *dev,
  2818. struct device_attribute *attr,
  2819. const char *buf, size_t count)
  2820. {
  2821. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2822. if (plat_priv) {
  2823. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  2824. del_timer(&plat_priv->fw_boot_timer);
  2825. complete_all(&plat_priv->power_up_complete);
  2826. complete_all(&plat_priv->cal_complete);
  2827. }
  2828. cnss_pr_dbg("Received shutdown notification\n");
  2829. return count;
  2830. }
  2831. static ssize_t fs_ready_store(struct device *dev,
  2832. struct device_attribute *attr,
  2833. const char *buf, size_t count)
  2834. {
  2835. int fs_ready = 0;
  2836. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2837. if (sscanf(buf, "%du", &fs_ready) != 1)
  2838. return -EINVAL;
  2839. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  2840. fs_ready, count);
  2841. if (!plat_priv) {
  2842. cnss_pr_err("plat_priv is NULL\n");
  2843. return count;
  2844. }
  2845. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  2846. cnss_pr_dbg("QMI is bypassed\n");
  2847. return count;
  2848. }
  2849. switch (plat_priv->device_id) {
  2850. case QCA6290_DEVICE_ID:
  2851. case QCA6390_DEVICE_ID:
  2852. case QCA6490_DEVICE_ID:
  2853. case KIWI_DEVICE_ID:
  2854. break;
  2855. default:
  2856. cnss_pr_err("Not supported for device ID 0x%lx\n",
  2857. plat_priv->device_id);
  2858. return count;
  2859. }
  2860. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  2861. cnss_driver_event_post(plat_priv,
  2862. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  2863. 0, NULL);
  2864. }
  2865. return count;
  2866. }
  2867. static ssize_t qdss_trace_start_store(struct device *dev,
  2868. struct device_attribute *attr,
  2869. const char *buf, size_t count)
  2870. {
  2871. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2872. wlfw_qdss_trace_start(plat_priv);
  2873. cnss_pr_dbg("Received QDSS start command\n");
  2874. return count;
  2875. }
  2876. static ssize_t qdss_trace_stop_store(struct device *dev,
  2877. struct device_attribute *attr,
  2878. const char *buf, size_t count)
  2879. {
  2880. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2881. u32 option = 0;
  2882. if (sscanf(buf, "%du", &option) != 1)
  2883. return -EINVAL;
  2884. wlfw_qdss_trace_stop(plat_priv, option);
  2885. cnss_pr_dbg("Received QDSS stop command\n");
  2886. return count;
  2887. }
  2888. static ssize_t qdss_conf_download_store(struct device *dev,
  2889. struct device_attribute *attr,
  2890. const char *buf, size_t count)
  2891. {
  2892. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2893. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  2894. cnss_pr_dbg("Received QDSS download config command\n");
  2895. return count;
  2896. }
  2897. static ssize_t hw_trace_override_store(struct device *dev,
  2898. struct device_attribute *attr,
  2899. const char *buf, size_t count)
  2900. {
  2901. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2902. int tmp = 0;
  2903. if (sscanf(buf, "%du", &tmp) != 1)
  2904. return -EINVAL;
  2905. plat_priv->hw_trc_override = tmp;
  2906. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  2907. return count;
  2908. }
  2909. static ssize_t charger_mode_store(struct device *dev,
  2910. struct device_attribute *attr,
  2911. const char *buf, size_t count)
  2912. {
  2913. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2914. int tmp = 0;
  2915. if (sscanf(buf, "%du", &tmp) != 1)
  2916. return -EINVAL;
  2917. plat_priv->charger_mode = tmp;
  2918. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  2919. return count;
  2920. }
  2921. static DEVICE_ATTR_WO(fs_ready);
  2922. static DEVICE_ATTR_WO(shutdown);
  2923. static DEVICE_ATTR_RW(recovery);
  2924. static DEVICE_ATTR_WO(enable_hds);
  2925. static DEVICE_ATTR_WO(qdss_trace_start);
  2926. static DEVICE_ATTR_WO(qdss_trace_stop);
  2927. static DEVICE_ATTR_WO(qdss_conf_download);
  2928. static DEVICE_ATTR_WO(hw_trace_override);
  2929. static DEVICE_ATTR_WO(charger_mode);
  2930. static struct attribute *cnss_attrs[] = {
  2931. &dev_attr_fs_ready.attr,
  2932. &dev_attr_shutdown.attr,
  2933. &dev_attr_recovery.attr,
  2934. &dev_attr_enable_hds.attr,
  2935. &dev_attr_qdss_trace_start.attr,
  2936. &dev_attr_qdss_trace_stop.attr,
  2937. &dev_attr_qdss_conf_download.attr,
  2938. &dev_attr_hw_trace_override.attr,
  2939. &dev_attr_charger_mode.attr,
  2940. NULL,
  2941. };
  2942. static struct attribute_group cnss_attr_group = {
  2943. .attrs = cnss_attrs,
  2944. };
  2945. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  2946. {
  2947. struct device *dev = &plat_priv->plat_dev->dev;
  2948. int ret;
  2949. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "cnss");
  2950. if (ret) {
  2951. cnss_pr_err("Failed to create cnss link, err = %d\n",
  2952. ret);
  2953. goto out;
  2954. }
  2955. /* This is only for backward compatibility. */
  2956. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "shutdown_wlan");
  2957. if (ret) {
  2958. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  2959. ret);
  2960. goto rm_cnss_link;
  2961. }
  2962. return 0;
  2963. rm_cnss_link:
  2964. sysfs_remove_link(kernel_kobj, "cnss");
  2965. out:
  2966. return ret;
  2967. }
  2968. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  2969. {
  2970. sysfs_remove_link(kernel_kobj, "shutdown_wlan");
  2971. sysfs_remove_link(kernel_kobj, "cnss");
  2972. }
  2973. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  2974. {
  2975. int ret = 0;
  2976. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  2977. &cnss_attr_group);
  2978. if (ret) {
  2979. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  2980. ret);
  2981. goto out;
  2982. }
  2983. cnss_create_sysfs_link(plat_priv);
  2984. return 0;
  2985. out:
  2986. return ret;
  2987. }
  2988. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  2989. {
  2990. cnss_remove_sysfs_link(plat_priv);
  2991. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  2992. }
  2993. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  2994. {
  2995. spin_lock_init(&plat_priv->event_lock);
  2996. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  2997. WQ_UNBOUND, 1);
  2998. if (!plat_priv->event_wq) {
  2999. cnss_pr_err("Failed to create event workqueue!\n");
  3000. return -EFAULT;
  3001. }
  3002. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3003. INIT_LIST_HEAD(&plat_priv->event_list);
  3004. return 0;
  3005. }
  3006. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3007. {
  3008. destroy_workqueue(plat_priv->event_wq);
  3009. }
  3010. static int cnss_reboot_notifier(struct notifier_block *nb,
  3011. unsigned long action,
  3012. void *data)
  3013. {
  3014. struct cnss_plat_data *plat_priv =
  3015. container_of(nb, struct cnss_plat_data, reboot_nb);
  3016. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3017. del_timer(&plat_priv->fw_boot_timer);
  3018. complete_all(&plat_priv->power_up_complete);
  3019. complete_all(&plat_priv->cal_complete);
  3020. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3021. return NOTIFY_DONE;
  3022. }
  3023. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  3024. {
  3025. int ret;
  3026. ret = cnss_init_sol_gpio(plat_priv);
  3027. if (ret)
  3028. return ret;
  3029. timer_setup(&plat_priv->fw_boot_timer,
  3030. cnss_bus_fw_boot_timeout_hdlr, 0);
  3031. ret = register_pm_notifier(&cnss_pm_notifier);
  3032. if (ret)
  3033. cnss_pr_err("Failed to register PM notifier, err = %d\n", ret);
  3034. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  3035. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  3036. if (ret)
  3037. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  3038. ret);
  3039. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  3040. if (ret)
  3041. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3042. ret);
  3043. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  3044. init_completion(&plat_priv->power_up_complete);
  3045. init_completion(&plat_priv->cal_complete);
  3046. init_completion(&plat_priv->rddm_complete);
  3047. init_completion(&plat_priv->recovery_complete);
  3048. init_completion(&plat_priv->daemon_connected);
  3049. mutex_init(&plat_priv->dev_lock);
  3050. mutex_init(&plat_priv->driver_ops_lock);
  3051. plat_priv->recovery_ws =
  3052. wakeup_source_register(&plat_priv->plat_dev->dev,
  3053. "CNSS_FW_RECOVERY");
  3054. if (!plat_priv->recovery_ws)
  3055. cnss_pr_err("Failed to setup FW recovery wake source\n");
  3056. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3057. cnss_daemon_connection_update_cb,
  3058. plat_priv);
  3059. if (ret)
  3060. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  3061. ret);
  3062. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3063. return 0;
  3064. }
  3065. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  3066. {
  3067. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3068. plat_priv);
  3069. complete_all(&plat_priv->recovery_complete);
  3070. complete_all(&plat_priv->rddm_complete);
  3071. complete_all(&plat_priv->cal_complete);
  3072. complete_all(&plat_priv->power_up_complete);
  3073. complete_all(&plat_priv->daemon_connected);
  3074. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  3075. unregister_reboot_notifier(&plat_priv->reboot_nb);
  3076. unregister_pm_notifier(&cnss_pm_notifier);
  3077. del_timer(&plat_priv->fw_boot_timer);
  3078. wakeup_source_unregister(plat_priv->recovery_ws);
  3079. cnss_deinit_sol_gpio(plat_priv);
  3080. kfree(plat_priv->sram_dump);
  3081. }
  3082. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  3083. {
  3084. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  3085. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  3086. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3087. "qcom,wlan-cbc-enabled");
  3088. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  3089. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  3090. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  3091. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  3092. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3093. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  3094. * enabled by default
  3095. */
  3096. plat_priv->adsp_pc_enabled = true;
  3097. }
  3098. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  3099. {
  3100. struct device *dev = &plat_priv->plat_dev->dev;
  3101. plat_priv->use_pm_domain =
  3102. of_property_read_bool(dev->of_node, "use-pm-domain");
  3103. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  3104. }
  3105. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  3106. {
  3107. struct device *dev = &plat_priv->plat_dev->dev;
  3108. plat_priv->set_wlaon_pwr_ctrl =
  3109. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  3110. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  3111. plat_priv->set_wlaon_pwr_ctrl);
  3112. }
  3113. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  3114. {
  3115. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3116. "qcom,converged-dt") ||
  3117. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3118. "qcom,same-dt-multi-dev") ||
  3119. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3120. "qcom,multi-wlan-exchg"));
  3121. }
  3122. static const struct platform_device_id cnss_platform_id_table[] = {
  3123. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  3124. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  3125. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  3126. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  3127. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  3128. { .name = "qcaconv", .driver_data = 0, },
  3129. { },
  3130. };
  3131. static const struct of_device_id cnss_of_match_table[] = {
  3132. {
  3133. .compatible = "qcom,cnss",
  3134. .data = (void *)&cnss_platform_id_table[0]},
  3135. {
  3136. .compatible = "qcom,cnss-qca6290",
  3137. .data = (void *)&cnss_platform_id_table[1]},
  3138. {
  3139. .compatible = "qcom,cnss-qca6390",
  3140. .data = (void *)&cnss_platform_id_table[2]},
  3141. {
  3142. .compatible = "qcom,cnss-qca6490",
  3143. .data = (void *)&cnss_platform_id_table[3]},
  3144. {
  3145. .compatible = "qcom,cnss-kiwi",
  3146. .data = (void *)&cnss_platform_id_table[4]},
  3147. {
  3148. .compatible = "qcom,cnss-qca-converged",
  3149. .data = (void *)&cnss_platform_id_table[5]},
  3150. { },
  3151. };
  3152. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  3153. static inline bool
  3154. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  3155. {
  3156. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3157. "use-nv-mac");
  3158. }
  3159. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  3160. {
  3161. struct device_node *child;
  3162. u32 id, i;
  3163. int id_n, device_identifier_gpio, ret;
  3164. u8 gpio_value;
  3165. if (!plat_priv->is_converged_dt)
  3166. return 0;
  3167. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  3168. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  3169. if (ret) {
  3170. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  3171. return ret;
  3172. }
  3173. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  3174. gpio_value = gpio_get_value(device_identifier_gpio);
  3175. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  3176. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  3177. child) {
  3178. if (strcmp(child->name, "chip_cfg"))
  3179. continue;
  3180. id_n = of_property_count_u32_elems(child, "supported-ids");
  3181. if (id_n <= 0) {
  3182. cnss_pr_err("Device id is NOT set\n");
  3183. return -EINVAL;
  3184. }
  3185. for (i = 0; i < id_n; i++) {
  3186. ret = of_property_read_u32_index(child,
  3187. "supported-ids",
  3188. i, &id);
  3189. if (ret) {
  3190. cnss_pr_err("Failed to read supported ids\n");
  3191. return -EINVAL;
  3192. }
  3193. if (gpio_value && id == QCA6490_DEVICE_ID) {
  3194. plat_priv->plat_dev->dev.of_node = child;
  3195. plat_priv->device_id = QCA6490_DEVICE_ID;
  3196. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  3197. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3198. child->name, i, id);
  3199. return 0;
  3200. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  3201. plat_priv->plat_dev->dev.of_node = child;
  3202. plat_priv->device_id = KIWI_DEVICE_ID;
  3203. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  3204. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3205. child->name, i, id);
  3206. return 0;
  3207. }
  3208. }
  3209. }
  3210. return -EINVAL;
  3211. }
  3212. static inline bool
  3213. cnss_is_converged_dt(struct cnss_plat_data *plat_priv)
  3214. {
  3215. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3216. "qcom,converged-dt");
  3217. }
  3218. static int cnss_probe(struct platform_device *plat_dev)
  3219. {
  3220. int ret = 0;
  3221. struct cnss_plat_data *plat_priv;
  3222. const struct of_device_id *of_id;
  3223. const struct platform_device_id *device_id;
  3224. int retry = 0;
  3225. if (cnss_get_plat_priv(plat_dev)) {
  3226. cnss_pr_err("Driver is already initialized!\n");
  3227. ret = -EEXIST;
  3228. goto out;
  3229. }
  3230. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  3231. if (!of_id || !of_id->data) {
  3232. cnss_pr_err("Failed to find of match device!\n");
  3233. ret = -ENODEV;
  3234. goto out;
  3235. }
  3236. device_id = of_id->data;
  3237. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  3238. GFP_KERNEL);
  3239. if (!plat_priv) {
  3240. ret = -ENOMEM;
  3241. goto out;
  3242. }
  3243. plat_priv->plat_dev = plat_dev;
  3244. plat_priv->device_id = device_id->driver_data;
  3245. plat_priv->is_converged_dt = cnss_is_converged_dt(plat_priv);
  3246. plat_priv->use_fw_path_with_prefix =
  3247. cnss_use_fw_path_with_prefix(plat_priv);
  3248. ret = cnss_get_dev_cfg_node(plat_priv);
  3249. if (ret) {
  3250. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  3251. goto reset_plat_dev;
  3252. }
  3253. plat_priv->bus_type = cnss_get_bus_type(plat_priv->device_id);
  3254. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  3255. cnss_set_plat_priv(plat_dev, plat_priv);
  3256. platform_set_drvdata(plat_dev, plat_priv);
  3257. INIT_LIST_HEAD(&plat_priv->vreg_list);
  3258. INIT_LIST_HEAD(&plat_priv->clk_list);
  3259. cnss_get_pm_domain_info(plat_priv);
  3260. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  3261. cnss_power_misc_params_init(plat_priv);
  3262. cnss_get_tcs_info(plat_priv);
  3263. cnss_get_cpr_info(plat_priv);
  3264. cnss_aop_mbox_init(plat_priv);
  3265. cnss_init_control_params(plat_priv);
  3266. ret = cnss_get_resources(plat_priv);
  3267. if (ret)
  3268. goto reset_ctx;
  3269. ret = cnss_register_esoc(plat_priv);
  3270. if (ret)
  3271. goto free_res;
  3272. ret = cnss_register_bus_scale(plat_priv);
  3273. if (ret)
  3274. goto unreg_esoc;
  3275. ret = cnss_create_sysfs(plat_priv);
  3276. if (ret)
  3277. goto unreg_bus_scale;
  3278. ret = cnss_event_work_init(plat_priv);
  3279. if (ret)
  3280. goto remove_sysfs;
  3281. ret = cnss_qmi_init(plat_priv);
  3282. if (ret)
  3283. goto deinit_event_work;
  3284. ret = cnss_dms_init(plat_priv);
  3285. if (ret)
  3286. goto deinit_qmi;
  3287. ret = cnss_debugfs_create(plat_priv);
  3288. if (ret)
  3289. goto deinit_dms;
  3290. ret = cnss_misc_init(plat_priv);
  3291. if (ret)
  3292. goto destroy_debugfs;
  3293. /* Make sure all platform related init are done before
  3294. * device power on and bus init.
  3295. */
  3296. if (!test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks)) {
  3297. retry:
  3298. ret = cnss_power_on_device(plat_priv);
  3299. if (ret)
  3300. goto deinit_misc;
  3301. ret = cnss_bus_init(plat_priv);
  3302. if (ret) {
  3303. if ((ret != -EPROBE_DEFER) &&
  3304. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  3305. cnss_power_off_device(plat_priv);
  3306. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  3307. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  3308. goto retry;
  3309. }
  3310. goto power_off;
  3311. }
  3312. }
  3313. cnss_register_coex_service(plat_priv);
  3314. cnss_register_ims_service(plat_priv);
  3315. ret = cnss_genl_init();
  3316. if (ret < 0)
  3317. cnss_pr_err("CNSS genl init failed %d\n", ret);
  3318. cnss_pr_info("Platform driver probed successfully.\n");
  3319. return 0;
  3320. power_off:
  3321. if (!test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  3322. cnss_power_off_device(plat_priv);
  3323. deinit_misc:
  3324. cnss_misc_deinit(plat_priv);
  3325. destroy_debugfs:
  3326. cnss_debugfs_destroy(plat_priv);
  3327. deinit_dms:
  3328. cnss_dms_deinit(plat_priv);
  3329. deinit_qmi:
  3330. cnss_qmi_deinit(plat_priv);
  3331. deinit_event_work:
  3332. cnss_event_work_deinit(plat_priv);
  3333. remove_sysfs:
  3334. cnss_remove_sysfs(plat_priv);
  3335. unreg_bus_scale:
  3336. cnss_unregister_bus_scale(plat_priv);
  3337. unreg_esoc:
  3338. cnss_unregister_esoc(plat_priv);
  3339. free_res:
  3340. cnss_put_resources(plat_priv);
  3341. reset_ctx:
  3342. platform_set_drvdata(plat_dev, NULL);
  3343. reset_plat_dev:
  3344. cnss_set_plat_priv(plat_dev, NULL);
  3345. out:
  3346. return ret;
  3347. }
  3348. static int cnss_remove(struct platform_device *plat_dev)
  3349. {
  3350. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  3351. cnss_genl_exit();
  3352. cnss_unregister_ims_service(plat_priv);
  3353. cnss_unregister_coex_service(plat_priv);
  3354. cnss_bus_deinit(plat_priv);
  3355. cnss_misc_deinit(plat_priv);
  3356. cnss_debugfs_destroy(plat_priv);
  3357. cnss_dms_deinit(plat_priv);
  3358. cnss_qmi_deinit(plat_priv);
  3359. cnss_event_work_deinit(plat_priv);
  3360. cnss_remove_sysfs(plat_priv);
  3361. cnss_unregister_bus_scale(plat_priv);
  3362. cnss_unregister_esoc(plat_priv);
  3363. cnss_put_resources(plat_priv);
  3364. if (!IS_ERR_OR_NULL(plat_priv->mbox_chan))
  3365. mbox_free_channel(plat_priv->mbox_chan);
  3366. platform_set_drvdata(plat_dev, NULL);
  3367. plat_env = NULL;
  3368. return 0;
  3369. }
  3370. static struct platform_driver cnss_platform_driver = {
  3371. .probe = cnss_probe,
  3372. .remove = cnss_remove,
  3373. .driver = {
  3374. .name = "cnss2",
  3375. .of_match_table = cnss_of_match_table,
  3376. #ifdef CONFIG_CNSS_ASYNC
  3377. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3378. #endif
  3379. },
  3380. };
  3381. /**
  3382. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  3383. *
  3384. * Valid device tree node means a node with "compatible" property from the
  3385. * device match table and "status" property is not disabled.
  3386. *
  3387. * Return: true if valid device tree node found, false if not found
  3388. */
  3389. static bool cnss_is_valid_dt_node_found(void)
  3390. {
  3391. struct device_node *dn = NULL;
  3392. for_each_matching_node(dn, cnss_of_match_table) {
  3393. if (of_device_is_available(dn))
  3394. break;
  3395. }
  3396. if (dn)
  3397. return true;
  3398. return false;
  3399. }
  3400. static int __init cnss_initialize(void)
  3401. {
  3402. int ret = 0;
  3403. if (!cnss_is_valid_dt_node_found())
  3404. return -ENODEV;
  3405. cnss_debug_init();
  3406. ret = platform_driver_register(&cnss_platform_driver);
  3407. if (ret)
  3408. cnss_debug_deinit();
  3409. return ret;
  3410. }
  3411. static void __exit cnss_exit(void)
  3412. {
  3413. platform_driver_unregister(&cnss_platform_driver);
  3414. cnss_debug_deinit();
  3415. }
  3416. module_init(cnss_initialize);
  3417. module_exit(cnss_exit);
  3418. MODULE_LICENSE("GPL v2");
  3419. MODULE_DESCRIPTION("CNSS2 Platform Driver");