qmi.c 101 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/soc/qcom/qmi.h>
  8. #include "bus.h"
  9. #include "debug.h"
  10. #include "main.h"
  11. #include "qmi.h"
  12. #include "genl.h"
  13. #define WLFW_SERVICE_INS_ID_V01 1
  14. #define WLFW_CLIENT_ID 0x4b4e454c
  15. #define BDF_FILE_NAME_PREFIX "bdwlan"
  16. #define ELF_BDF_FILE_NAME "bdwlan.elf"
  17. #define ELF_BDF_FILE_NAME_GF "bdwlang.elf"
  18. #define ELF_BDF_FILE_NAME_PREFIX "bdwlan.e"
  19. #define ELF_BDF_FILE_NAME_GF_PREFIX "bdwlang.e"
  20. #define BIN_BDF_FILE_NAME "bdwlan.bin"
  21. #define BIN_BDF_FILE_NAME_GF "bdwlang.bin"
  22. #define BIN_BDF_FILE_NAME_PREFIX "bdwlan.b"
  23. #define BIN_BDF_FILE_NAME_GF_PREFIX "bdwlang.b"
  24. #define REGDB_FILE_NAME "regdb.bin"
  25. #define HDS_FILE_NAME "hds.bin"
  26. #define CHIP_ID_GF_MASK 0x10
  27. #define CONN_ROAM_FILE_NAME "wlan-connection-roaming"
  28. #define INI_EXT ".ini"
  29. #define INI_FILE_NAME_LEN 100
  30. #define QDSS_TRACE_CONFIG_FILE "qdss_trace_config"
  31. #ifdef CONFIG_CNSS2_DEBUG
  32. #define QDSS_DEBUG_FILE_STR "debug_"
  33. #else
  34. #define QDSS_DEBUG_FILE_STR ""
  35. #endif
  36. #define HW_V1_NUMBER "v1"
  37. #define HW_V2_NUMBER "v2"
  38. #define QMI_WLFW_TIMEOUT_MS (plat_priv->ctrl_params.qmi_timeout)
  39. #define QMI_WLFW_TIMEOUT_JF msecs_to_jiffies(QMI_WLFW_TIMEOUT_MS)
  40. #define COEX_TIMEOUT QMI_WLFW_TIMEOUT_JF
  41. #define IMS_TIMEOUT QMI_WLFW_TIMEOUT_JF
  42. #define QMI_WLFW_MAX_RECV_BUF_SIZE SZ_8K
  43. #define IMSPRIVATE_SERVICE_MAX_MSG_LEN SZ_8K
  44. #define DMS_QMI_MAX_MSG_LEN SZ_256
  45. #define MAX_SHADOW_REG_RESERVED 2
  46. #define MAX_NUM_SHADOW_REG_V3 (QMI_WLFW_MAX_NUM_SHADOW_REG_V3_USAGE_V01 - \
  47. MAX_SHADOW_REG_RESERVED)
  48. #define QMI_WLFW_MAC_READY_TIMEOUT_MS 50
  49. #define QMI_WLFW_MAC_READY_MAX_RETRY 200
  50. #ifdef CONFIG_CNSS2_DEBUG
  51. static bool ignore_qmi_failure;
  52. #define CNSS_QMI_ASSERT() CNSS_ASSERT(ignore_qmi_failure)
  53. void cnss_ignore_qmi_failure(bool ignore)
  54. {
  55. ignore_qmi_failure = ignore;
  56. }
  57. #else
  58. #define CNSS_QMI_ASSERT() do { } while (0)
  59. void cnss_ignore_qmi_failure(bool ignore) { }
  60. #endif
  61. static char *cnss_qmi_mode_to_str(enum cnss_driver_mode mode)
  62. {
  63. switch (mode) {
  64. case CNSS_MISSION:
  65. return "MISSION";
  66. case CNSS_FTM:
  67. return "FTM";
  68. case CNSS_EPPING:
  69. return "EPPING";
  70. case CNSS_WALTEST:
  71. return "WALTEST";
  72. case CNSS_OFF:
  73. return "OFF";
  74. case CNSS_CCPM:
  75. return "CCPM";
  76. case CNSS_QVIT:
  77. return "QVIT";
  78. case CNSS_CALIBRATION:
  79. return "CALIBRATION";
  80. default:
  81. return "UNKNOWN";
  82. }
  83. }
  84. static int qmi_send_wait(struct qmi_handle *qmi, void *req, void *rsp,
  85. struct qmi_elem_info *req_ei,
  86. struct qmi_elem_info *rsp_ei,
  87. int req_id, size_t req_len,
  88. unsigned long timeout)
  89. {
  90. struct qmi_txn txn;
  91. int ret;
  92. char *err_msg;
  93. struct qmi_response_type_v01 *resp = rsp;
  94. ret = qmi_txn_init(qmi, &txn, rsp_ei, rsp);
  95. if (ret < 0) {
  96. err_msg = "Qmi fail: fail to init txn,";
  97. goto out;
  98. }
  99. ret = qmi_send_request(qmi, NULL, &txn, req_id,
  100. req_len, req_ei, req);
  101. if (ret < 0) {
  102. qmi_txn_cancel(&txn);
  103. err_msg = "Qmi fail: fail to send req,";
  104. goto out;
  105. }
  106. ret = qmi_txn_wait(&txn, timeout);
  107. if (ret < 0) {
  108. err_msg = "Qmi fail: wait timeout,";
  109. goto out;
  110. } else if (resp->result != QMI_RESULT_SUCCESS_V01) {
  111. err_msg = "Qmi fail: request rejected,";
  112. cnss_pr_err("Qmi fail: respons with error:%d\n",
  113. resp->error);
  114. ret = -resp->result;
  115. goto out;
  116. }
  117. cnss_pr_dbg("req %x success\n", req_id);
  118. return 0;
  119. out:
  120. cnss_pr_err("%s req %x, ret %d\n", err_msg, req_id, ret);
  121. return ret;
  122. }
  123. static int cnss_wlfw_ind_register_send_sync(struct cnss_plat_data *plat_priv)
  124. {
  125. struct wlfw_ind_register_req_msg_v01 *req;
  126. struct wlfw_ind_register_resp_msg_v01 *resp;
  127. struct qmi_txn txn;
  128. int ret = 0;
  129. cnss_pr_dbg("Sending indication register message, state: 0x%lx\n",
  130. plat_priv->driver_state);
  131. req = kzalloc(sizeof(*req), GFP_KERNEL);
  132. if (!req)
  133. return -ENOMEM;
  134. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  135. if (!resp) {
  136. kfree(req);
  137. return -ENOMEM;
  138. }
  139. req->client_id_valid = 1;
  140. req->client_id = WLFW_CLIENT_ID;
  141. req->request_mem_enable_valid = 1;
  142. req->request_mem_enable = 1;
  143. req->fw_mem_ready_enable_valid = 1;
  144. req->fw_mem_ready_enable = 1;
  145. /* fw_ready indication is replaced by fw_init_done in HST/HSP */
  146. req->fw_init_done_enable_valid = 1;
  147. req->fw_init_done_enable = 1;
  148. req->pin_connect_result_enable_valid = 1;
  149. req->pin_connect_result_enable = 1;
  150. req->cal_done_enable_valid = 1;
  151. req->cal_done_enable = 1;
  152. req->qdss_trace_req_mem_enable_valid = 1;
  153. req->qdss_trace_req_mem_enable = 1;
  154. req->qdss_trace_save_enable_valid = 1;
  155. req->qdss_trace_save_enable = 1;
  156. req->qdss_trace_free_enable_valid = 1;
  157. req->qdss_trace_free_enable = 1;
  158. req->respond_get_info_enable_valid = 1;
  159. req->respond_get_info_enable = 1;
  160. req->wfc_call_twt_config_enable_valid = 1;
  161. req->wfc_call_twt_config_enable = 1;
  162. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  163. wlfw_ind_register_resp_msg_v01_ei, resp);
  164. if (ret < 0) {
  165. cnss_pr_err("Failed to initialize txn for indication register request, err: %d\n",
  166. ret);
  167. goto out;
  168. }
  169. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  170. QMI_WLFW_IND_REGISTER_REQ_V01,
  171. WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN,
  172. wlfw_ind_register_req_msg_v01_ei, req);
  173. if (ret < 0) {
  174. qmi_txn_cancel(&txn);
  175. cnss_pr_err("Failed to send indication register request, err: %d\n",
  176. ret);
  177. goto out;
  178. }
  179. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  180. if (ret < 0) {
  181. cnss_pr_err("Failed to wait for response of indication register request, err: %d\n",
  182. ret);
  183. goto out;
  184. }
  185. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  186. cnss_pr_err("Indication register request failed, result: %d, err: %d\n",
  187. resp->resp.result, resp->resp.error);
  188. ret = -resp->resp.result;
  189. goto out;
  190. }
  191. if (resp->fw_status_valid) {
  192. if (resp->fw_status & QMI_WLFW_ALREADY_REGISTERED_V01) {
  193. ret = -EALREADY;
  194. goto qmi_registered;
  195. }
  196. }
  197. kfree(req);
  198. kfree(resp);
  199. return 0;
  200. out:
  201. CNSS_QMI_ASSERT();
  202. qmi_registered:
  203. kfree(req);
  204. kfree(resp);
  205. return ret;
  206. }
  207. static void cnss_wlfw_host_cap_parse_mlo(struct cnss_plat_data *plat_priv,
  208. struct wlfw_host_cap_req_msg_v01 *req)
  209. {
  210. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  211. plat_priv->device_id == MANGO_DEVICE_ID ||
  212. plat_priv->device_id == PEACH_DEVICE_ID) {
  213. req->mlo_capable_valid = 1;
  214. req->mlo_capable = 1;
  215. req->mlo_chip_id_valid = 1;
  216. req->mlo_chip_id = 0;
  217. req->mlo_group_id_valid = 1;
  218. req->mlo_group_id = 0;
  219. req->max_mlo_peer_valid = 1;
  220. /* Max peer number generally won't change for the same device
  221. * but needs to be synced with host driver.
  222. */
  223. req->max_mlo_peer = 32;
  224. req->mlo_num_chips_valid = 1;
  225. req->mlo_num_chips = 1;
  226. req->mlo_chip_info_valid = 1;
  227. req->mlo_chip_info[0].chip_id = 0;
  228. req->mlo_chip_info[0].num_local_links = 2;
  229. req->mlo_chip_info[0].hw_link_id[0] = 0;
  230. req->mlo_chip_info[0].hw_link_id[1] = 1;
  231. req->mlo_chip_info[0].valid_mlo_link_id[0] = 1;
  232. req->mlo_chip_info[0].valid_mlo_link_id[1] = 1;
  233. }
  234. }
  235. static int cnss_wlfw_host_cap_send_sync(struct cnss_plat_data *plat_priv)
  236. {
  237. struct wlfw_host_cap_req_msg_v01 *req;
  238. struct wlfw_host_cap_resp_msg_v01 *resp;
  239. struct qmi_txn txn;
  240. int ret = 0;
  241. u64 iova_start = 0, iova_size = 0,
  242. iova_ipa_start = 0, iova_ipa_size = 0;
  243. u64 feature_list = 0;
  244. cnss_pr_dbg("Sending host capability message, state: 0x%lx\n",
  245. plat_priv->driver_state);
  246. req = kzalloc(sizeof(*req), GFP_KERNEL);
  247. if (!req)
  248. return -ENOMEM;
  249. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  250. if (!resp) {
  251. kfree(req);
  252. return -ENOMEM;
  253. }
  254. req->num_clients_valid = 1;
  255. req->num_clients = 1;
  256. cnss_pr_dbg("Number of clients is %d\n", req->num_clients);
  257. req->wake_msi = cnss_bus_get_wake_irq(plat_priv);
  258. if (req->wake_msi) {
  259. cnss_pr_dbg("WAKE MSI base data is %d\n", req->wake_msi);
  260. req->wake_msi_valid = 1;
  261. }
  262. req->bdf_support_valid = 1;
  263. req->bdf_support = 1;
  264. req->m3_support_valid = 1;
  265. req->m3_support = 1;
  266. req->m3_cache_support_valid = 1;
  267. req->m3_cache_support = 1;
  268. req->cal_done_valid = 1;
  269. req->cal_done = plat_priv->cal_done;
  270. cnss_pr_dbg("Calibration done is %d\n", plat_priv->cal_done);
  271. if (cnss_bus_is_smmu_s1_enabled(plat_priv) &&
  272. !cnss_bus_get_iova(plat_priv, &iova_start, &iova_size) &&
  273. !cnss_bus_get_iova_ipa(plat_priv, &iova_ipa_start,
  274. &iova_ipa_size)) {
  275. req->ddr_range_valid = 1;
  276. req->ddr_range[0].start = iova_start;
  277. req->ddr_range[0].size = iova_size + iova_ipa_size;
  278. cnss_pr_dbg("Sending iova starting 0x%llx with size 0x%llx\n",
  279. req->ddr_range[0].start, req->ddr_range[0].size);
  280. }
  281. req->host_build_type_valid = 1;
  282. req->host_build_type = cnss_get_host_build_type();
  283. cnss_wlfw_host_cap_parse_mlo(plat_priv, req);
  284. ret = cnss_get_feature_list(plat_priv, &feature_list);
  285. if (!ret) {
  286. req->feature_list_valid = 1;
  287. req->feature_list = feature_list;
  288. cnss_pr_dbg("Sending feature list 0x%llx\n",
  289. req->feature_list);
  290. }
  291. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  292. wlfw_host_cap_resp_msg_v01_ei, resp);
  293. if (ret < 0) {
  294. cnss_pr_err("Failed to initialize txn for host capability request, err: %d\n",
  295. ret);
  296. goto out;
  297. }
  298. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  299. QMI_WLFW_HOST_CAP_REQ_V01,
  300. WLFW_HOST_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  301. wlfw_host_cap_req_msg_v01_ei, req);
  302. if (ret < 0) {
  303. qmi_txn_cancel(&txn);
  304. cnss_pr_err("Failed to send host capability request, err: %d\n",
  305. ret);
  306. goto out;
  307. }
  308. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  309. if (ret < 0) {
  310. cnss_pr_err("Failed to wait for response of host capability request, err: %d\n",
  311. ret);
  312. goto out;
  313. }
  314. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  315. cnss_pr_err("Host capability request failed, result: %d, err: %d\n",
  316. resp->resp.result, resp->resp.error);
  317. ret = -resp->resp.result;
  318. goto out;
  319. }
  320. kfree(req);
  321. kfree(resp);
  322. return 0;
  323. out:
  324. CNSS_QMI_ASSERT();
  325. kfree(req);
  326. kfree(resp);
  327. return ret;
  328. }
  329. int cnss_wlfw_respond_mem_send_sync(struct cnss_plat_data *plat_priv)
  330. {
  331. struct wlfw_respond_mem_req_msg_v01 *req;
  332. struct wlfw_respond_mem_resp_msg_v01 *resp;
  333. struct qmi_txn txn;
  334. struct cnss_fw_mem *fw_mem = plat_priv->fw_mem;
  335. int ret = 0, i;
  336. cnss_pr_dbg("Sending respond memory message, state: 0x%lx\n",
  337. plat_priv->driver_state);
  338. req = kzalloc(sizeof(*req), GFP_KERNEL);
  339. if (!req)
  340. return -ENOMEM;
  341. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  342. if (!resp) {
  343. kfree(req);
  344. return -ENOMEM;
  345. }
  346. if (plat_priv->fw_mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  347. cnss_pr_err("Invalid seg len %u\n", plat_priv->fw_mem_seg_len);
  348. ret = -EINVAL;
  349. goto out;
  350. }
  351. req->mem_seg_len = plat_priv->fw_mem_seg_len;
  352. for (i = 0; i < req->mem_seg_len; i++) {
  353. if (!fw_mem[i].pa || !fw_mem[i].size) {
  354. if (fw_mem[i].type == 0) {
  355. cnss_pr_err("Invalid memory for FW type, segment = %d\n",
  356. i);
  357. ret = -EINVAL;
  358. goto out;
  359. }
  360. cnss_pr_err("Memory for FW is not available for type: %u\n",
  361. fw_mem[i].type);
  362. ret = -ENOMEM;
  363. goto out;
  364. }
  365. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  366. fw_mem[i].va, &fw_mem[i].pa,
  367. fw_mem[i].size, fw_mem[i].type);
  368. req->mem_seg[i].addr = fw_mem[i].pa;
  369. req->mem_seg[i].size = fw_mem[i].size;
  370. req->mem_seg[i].type = fw_mem[i].type;
  371. }
  372. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  373. wlfw_respond_mem_resp_msg_v01_ei, resp);
  374. if (ret < 0) {
  375. cnss_pr_err("Failed to initialize txn for respond memory request, err: %d\n",
  376. ret);
  377. goto out;
  378. }
  379. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  380. QMI_WLFW_RESPOND_MEM_REQ_V01,
  381. WLFW_RESPOND_MEM_REQ_MSG_V01_MAX_MSG_LEN,
  382. wlfw_respond_mem_req_msg_v01_ei, req);
  383. if (ret < 0) {
  384. qmi_txn_cancel(&txn);
  385. cnss_pr_err("Failed to send respond memory request, err: %d\n",
  386. ret);
  387. goto out;
  388. }
  389. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  390. if (ret < 0) {
  391. cnss_pr_err("Failed to wait for response of respond memory request, err: %d\n",
  392. ret);
  393. goto out;
  394. }
  395. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  396. cnss_pr_err("Respond memory request failed, result: %d, err: %d\n",
  397. resp->resp.result, resp->resp.error);
  398. ret = -resp->resp.result;
  399. goto out;
  400. }
  401. kfree(req);
  402. kfree(resp);
  403. return 0;
  404. out:
  405. CNSS_QMI_ASSERT();
  406. kfree(req);
  407. kfree(resp);
  408. return ret;
  409. }
  410. int cnss_wlfw_tgt_cap_send_sync(struct cnss_plat_data *plat_priv)
  411. {
  412. struct wlfw_cap_req_msg_v01 *req;
  413. struct wlfw_cap_resp_msg_v01 *resp;
  414. struct qmi_txn txn;
  415. char *fw_build_timestamp;
  416. int ret = 0, i;
  417. cnss_pr_dbg("Sending target capability message, state: 0x%lx\n",
  418. plat_priv->driver_state);
  419. req = kzalloc(sizeof(*req), GFP_KERNEL);
  420. if (!req)
  421. return -ENOMEM;
  422. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  423. if (!resp) {
  424. kfree(req);
  425. return -ENOMEM;
  426. }
  427. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  428. wlfw_cap_resp_msg_v01_ei, resp);
  429. if (ret < 0) {
  430. cnss_pr_err("Failed to initialize txn for target capability request, err: %d\n",
  431. ret);
  432. goto out;
  433. }
  434. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  435. QMI_WLFW_CAP_REQ_V01,
  436. WLFW_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  437. wlfw_cap_req_msg_v01_ei, req);
  438. if (ret < 0) {
  439. qmi_txn_cancel(&txn);
  440. cnss_pr_err("Failed to send respond target capability request, err: %d\n",
  441. ret);
  442. goto out;
  443. }
  444. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  445. if (ret < 0) {
  446. cnss_pr_err("Failed to wait for response of target capability request, err: %d\n",
  447. ret);
  448. goto out;
  449. }
  450. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  451. cnss_pr_err("Target capability request failed, result: %d, err: %d\n",
  452. resp->resp.result, resp->resp.error);
  453. ret = -resp->resp.result;
  454. goto out;
  455. }
  456. if (resp->chip_info_valid) {
  457. plat_priv->chip_info.chip_id = resp->chip_info.chip_id;
  458. plat_priv->chip_info.chip_family = resp->chip_info.chip_family;
  459. }
  460. if (resp->board_info_valid)
  461. plat_priv->board_info.board_id = resp->board_info.board_id;
  462. else
  463. plat_priv->board_info.board_id = 0xFF;
  464. if (resp->soc_info_valid)
  465. plat_priv->soc_info.soc_id = resp->soc_info.soc_id;
  466. if (resp->fw_version_info_valid) {
  467. plat_priv->fw_version_info.fw_version =
  468. resp->fw_version_info.fw_version;
  469. fw_build_timestamp = resp->fw_version_info.fw_build_timestamp;
  470. fw_build_timestamp[QMI_WLFW_MAX_TIMESTAMP_LEN] = '\0';
  471. strlcpy(plat_priv->fw_version_info.fw_build_timestamp,
  472. resp->fw_version_info.fw_build_timestamp,
  473. QMI_WLFW_MAX_TIMESTAMP_LEN + 1);
  474. }
  475. if (resp->fw_build_id_valid) {
  476. resp->fw_build_id[QMI_WLFW_MAX_BUILD_ID_LEN] = '\0';
  477. strlcpy(plat_priv->fw_build_id, resp->fw_build_id,
  478. QMI_WLFW_MAX_BUILD_ID_LEN + 1);
  479. }
  480. /* FW will send aop retention volatage for qca6490 */
  481. if (resp->voltage_mv_valid) {
  482. plat_priv->cpr_info.voltage = resp->voltage_mv;
  483. cnss_pr_dbg("Voltage for CPR: %dmV\n",
  484. plat_priv->cpr_info.voltage);
  485. cnss_update_cpr_info(plat_priv);
  486. }
  487. if (resp->time_freq_hz_valid) {
  488. plat_priv->device_freq_hz = resp->time_freq_hz;
  489. cnss_pr_dbg("Device frequency is %d HZ\n",
  490. plat_priv->device_freq_hz);
  491. }
  492. if (resp->otp_version_valid)
  493. plat_priv->otp_version = resp->otp_version;
  494. if (resp->dev_mem_info_valid) {
  495. for (i = 0; i < QMI_WLFW_MAX_DEV_MEM_NUM_V01; i++) {
  496. plat_priv->dev_mem_info[i].start =
  497. resp->dev_mem_info[i].start;
  498. plat_priv->dev_mem_info[i].size =
  499. resp->dev_mem_info[i].size;
  500. cnss_pr_buf("Device memory info[%d]: start = 0x%llx, size = 0x%llx\n",
  501. i, plat_priv->dev_mem_info[i].start,
  502. plat_priv->dev_mem_info[i].size);
  503. }
  504. }
  505. if (resp->fw_caps_valid) {
  506. plat_priv->fw_pcie_gen_switch =
  507. !!(resp->fw_caps & QMI_WLFW_HOST_PCIE_GEN_SWITCH_V01);
  508. plat_priv->fw_caps = resp->fw_caps;
  509. }
  510. if (resp->hang_data_length_valid &&
  511. resp->hang_data_length &&
  512. resp->hang_data_length <= WLFW_MAX_HANG_EVENT_DATA_SIZE)
  513. plat_priv->hang_event_data_len = resp->hang_data_length;
  514. else
  515. plat_priv->hang_event_data_len = 0;
  516. if (resp->hang_data_addr_offset_valid)
  517. plat_priv->hang_data_addr_offset = resp->hang_data_addr_offset;
  518. else
  519. plat_priv->hang_data_addr_offset = 0;
  520. if (resp->hwid_bitmap_valid)
  521. plat_priv->hwid_bitmap = resp->hwid_bitmap;
  522. if (resp->ol_cpr_cfg_valid)
  523. cnss_aop_ol_cpr_cfg_setup(plat_priv, &resp->ol_cpr_cfg);
  524. /* Disable WLAN PDC in AOP firmware for boards which support on chip PMIC
  525. * so AOP will ignore SW_CTRL changes and do not update regulator votes.
  526. **/
  527. for (i = 0; i < plat_priv->on_chip_pmic_devices_count; i++) {
  528. if (plat_priv->board_info.board_id ==
  529. plat_priv->on_chip_pmic_board_ids[i]) {
  530. cnss_pr_dbg("Disabling WLAN PDC for board_id: %02x\n",
  531. plat_priv->board_info.board_id);
  532. ret = cnss_aop_send_msg(plat_priv,
  533. "{class: wlan_pdc, ss: rf, res: pdc, enable: 0}");
  534. if (ret < 0)
  535. cnss_pr_dbg("Failed to Send AOP Msg");
  536. break;
  537. }
  538. }
  539. cnss_pr_dbg("Target capability: chip_id: 0x%x, chip_family: 0x%x, board_id: 0x%x, soc_id: 0x%x, otp_version: 0x%x\n",
  540. plat_priv->chip_info.chip_id,
  541. plat_priv->chip_info.chip_family,
  542. plat_priv->board_info.board_id, plat_priv->soc_info.soc_id,
  543. plat_priv->otp_version);
  544. cnss_pr_dbg("fw_version: 0x%x, fw_build_timestamp: %s, fw_build_id: %s, hwid_bitmap:0x%x\n",
  545. plat_priv->fw_version_info.fw_version,
  546. plat_priv->fw_version_info.fw_build_timestamp,
  547. plat_priv->fw_build_id,
  548. plat_priv->hwid_bitmap);
  549. cnss_pr_dbg("Hang event params, Length: 0x%x, Offset Address: 0x%x\n",
  550. plat_priv->hang_event_data_len,
  551. plat_priv->hang_data_addr_offset);
  552. kfree(req);
  553. kfree(resp);
  554. return 0;
  555. out:
  556. CNSS_QMI_ASSERT();
  557. kfree(req);
  558. kfree(resp);
  559. return ret;
  560. }
  561. static int cnss_get_bdf_file_name(struct cnss_plat_data *plat_priv,
  562. u32 bdf_type, char *filename,
  563. u32 filename_len)
  564. {
  565. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  566. int ret = 0;
  567. switch (bdf_type) {
  568. case CNSS_BDF_ELF:
  569. /* Board ID will be equal or less than 0xFF in GF mask case */
  570. if (plat_priv->board_info.board_id == 0xFF) {
  571. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  572. snprintf(filename_tmp, filename_len,
  573. ELF_BDF_FILE_NAME_GF);
  574. else
  575. snprintf(filename_tmp, filename_len,
  576. ELF_BDF_FILE_NAME);
  577. } else if (plat_priv->board_info.board_id < 0xFF) {
  578. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  579. snprintf(filename_tmp, filename_len,
  580. ELF_BDF_FILE_NAME_GF_PREFIX "%02x",
  581. plat_priv->board_info.board_id);
  582. else
  583. snprintf(filename_tmp, filename_len,
  584. ELF_BDF_FILE_NAME_PREFIX "%02x",
  585. plat_priv->board_info.board_id);
  586. } else {
  587. snprintf(filename_tmp, filename_len,
  588. BDF_FILE_NAME_PREFIX "%02x.e%02x",
  589. plat_priv->board_info.board_id >> 8 & 0xFF,
  590. plat_priv->board_info.board_id & 0xFF);
  591. }
  592. break;
  593. case CNSS_BDF_BIN:
  594. if (plat_priv->board_info.board_id == 0xFF) {
  595. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  596. snprintf(filename_tmp, filename_len,
  597. BIN_BDF_FILE_NAME_GF);
  598. else
  599. snprintf(filename_tmp, filename_len,
  600. BIN_BDF_FILE_NAME);
  601. } else if (plat_priv->board_info.board_id < 0xFF) {
  602. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  603. snprintf(filename_tmp, filename_len,
  604. BIN_BDF_FILE_NAME_GF_PREFIX "%02x",
  605. plat_priv->board_info.board_id);
  606. else
  607. snprintf(filename_tmp, filename_len,
  608. BIN_BDF_FILE_NAME_PREFIX "%02x",
  609. plat_priv->board_info.board_id);
  610. } else {
  611. snprintf(filename_tmp, filename_len,
  612. BDF_FILE_NAME_PREFIX "%02x.b%02x",
  613. plat_priv->board_info.board_id >> 8 & 0xFF,
  614. plat_priv->board_info.board_id & 0xFF);
  615. }
  616. break;
  617. case CNSS_BDF_REGDB:
  618. snprintf(filename_tmp, filename_len, REGDB_FILE_NAME);
  619. break;
  620. case CNSS_BDF_HDS:
  621. snprintf(filename_tmp, filename_len, HDS_FILE_NAME);
  622. break;
  623. default:
  624. cnss_pr_err("Invalid BDF type: %d\n",
  625. plat_priv->ctrl_params.bdf_type);
  626. ret = -EINVAL;
  627. break;
  628. }
  629. if (!ret)
  630. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  631. return ret;
  632. }
  633. int cnss_wlfw_ini_file_send_sync(struct cnss_plat_data *plat_priv,
  634. enum wlfw_ini_file_type_v01 file_type)
  635. {
  636. struct wlfw_ini_file_download_req_msg_v01 *req;
  637. struct wlfw_ini_file_download_resp_msg_v01 *resp;
  638. struct qmi_txn txn;
  639. int ret = 0;
  640. const struct firmware *fw;
  641. char filename[INI_FILE_NAME_LEN] = {0};
  642. char tmp_filename[INI_FILE_NAME_LEN] = {0};
  643. const u8 *temp;
  644. unsigned int remaining;
  645. bool backup_supported = false;
  646. req = kzalloc(sizeof(*req), GFP_KERNEL);
  647. if (!req)
  648. return -ENOMEM;
  649. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  650. if (!resp) {
  651. kfree(req);
  652. return -ENOMEM;
  653. }
  654. switch (file_type) {
  655. case WLFW_CONN_ROAM_INI_V01:
  656. snprintf(tmp_filename, sizeof(tmp_filename),
  657. CONN_ROAM_FILE_NAME);
  658. backup_supported = true;
  659. break;
  660. default:
  661. cnss_pr_err("Invalid file type: %u\n", file_type);
  662. ret = -EINVAL;
  663. goto err_req_fw;
  664. }
  665. snprintf(filename, sizeof(filename), "%s%s", tmp_filename, INI_EXT);
  666. /* Fetch the file */
  667. ret = firmware_request_nowarn(&fw, filename, &plat_priv->plat_dev->dev);
  668. if (ret) {
  669. if (!backup_supported)
  670. goto err_req_fw;
  671. snprintf(filename, sizeof(filename),
  672. "%s-%s%s", tmp_filename, "backup", INI_EXT);
  673. ret = firmware_request_nowarn(&fw, filename,
  674. &plat_priv->plat_dev->dev);
  675. if (ret)
  676. goto err_req_fw;
  677. }
  678. temp = fw->data;
  679. remaining = fw->size;
  680. cnss_pr_dbg("Downloading INI file: %s, size: %u\n", filename,
  681. remaining);
  682. while (remaining) {
  683. req->file_type_valid = 1;
  684. req->file_type = file_type;
  685. req->total_size_valid = 1;
  686. req->total_size = remaining;
  687. req->seg_id_valid = 1;
  688. req->data_valid = 1;
  689. req->end_valid = 1;
  690. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  691. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  692. } else {
  693. req->data_len = remaining;
  694. req->end = 1;
  695. }
  696. memcpy(req->data, temp, req->data_len);
  697. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  698. wlfw_ini_file_download_resp_msg_v01_ei,
  699. resp);
  700. if (ret < 0) {
  701. cnss_pr_err("Failed to initialize txn for INI file download request, err: %d\n",
  702. ret);
  703. goto err;
  704. }
  705. ret = qmi_send_request
  706. (&plat_priv->qmi_wlfw, NULL, &txn,
  707. QMI_WLFW_INI_FILE_DOWNLOAD_REQ_V01,
  708. WLFW_INI_FILE_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  709. wlfw_ini_file_download_req_msg_v01_ei, req);
  710. if (ret < 0) {
  711. qmi_txn_cancel(&txn);
  712. cnss_pr_err("Failed to send INI File download request, err: %d\n",
  713. ret);
  714. goto err;
  715. }
  716. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  717. if (ret < 0) {
  718. cnss_pr_err("Failed to wait for response of INI File download request, err: %d\n",
  719. ret);
  720. goto err;
  721. }
  722. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  723. cnss_pr_err("INI file download request failed, result: %d, err: %d\n",
  724. resp->resp.result, resp->resp.error);
  725. ret = -resp->resp.result;
  726. goto err;
  727. }
  728. remaining -= req->data_len;
  729. temp += req->data_len;
  730. req->seg_id++;
  731. }
  732. release_firmware(fw);
  733. kfree(req);
  734. kfree(resp);
  735. return 0;
  736. err:
  737. release_firmware(fw);
  738. err_req_fw:
  739. kfree(req);
  740. kfree(resp);
  741. return ret;
  742. }
  743. int cnss_wlfw_bdf_dnld_send_sync(struct cnss_plat_data *plat_priv,
  744. u32 bdf_type)
  745. {
  746. struct wlfw_bdf_download_req_msg_v01 *req;
  747. struct wlfw_bdf_download_resp_msg_v01 *resp;
  748. struct qmi_txn txn;
  749. char filename[MAX_FIRMWARE_NAME_LEN];
  750. const struct firmware *fw_entry = NULL;
  751. const u8 *temp;
  752. unsigned int remaining;
  753. int ret = 0;
  754. cnss_pr_dbg("Sending BDF download message, state: 0x%lx, type: %d\n",
  755. plat_priv->driver_state, bdf_type);
  756. req = kzalloc(sizeof(*req), GFP_KERNEL);
  757. if (!req)
  758. return -ENOMEM;
  759. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  760. if (!resp) {
  761. kfree(req);
  762. return -ENOMEM;
  763. }
  764. ret = cnss_get_bdf_file_name(plat_priv, bdf_type,
  765. filename, sizeof(filename));
  766. if (ret)
  767. goto err_req_fw;
  768. if (bdf_type == CNSS_BDF_REGDB)
  769. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  770. filename);
  771. else
  772. ret = firmware_request_nowarn(&fw_entry, filename,
  773. &plat_priv->plat_dev->dev);
  774. if (ret) {
  775. cnss_pr_err("Failed to load BDF: %s, ret: %d\n", filename, ret);
  776. goto err_req_fw;
  777. }
  778. temp = fw_entry->data;
  779. remaining = fw_entry->size;
  780. cnss_pr_dbg("Downloading BDF: %s, size: %u\n", filename, remaining);
  781. while (remaining) {
  782. req->valid = 1;
  783. req->file_id_valid = 1;
  784. req->file_id = plat_priv->board_info.board_id;
  785. req->total_size_valid = 1;
  786. req->total_size = remaining;
  787. req->seg_id_valid = 1;
  788. req->data_valid = 1;
  789. req->end_valid = 1;
  790. req->bdf_type_valid = 1;
  791. req->bdf_type = bdf_type;
  792. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  793. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  794. } else {
  795. req->data_len = remaining;
  796. req->end = 1;
  797. }
  798. memcpy(req->data, temp, req->data_len);
  799. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  800. wlfw_bdf_download_resp_msg_v01_ei, resp);
  801. if (ret < 0) {
  802. cnss_pr_err("Failed to initialize txn for BDF download request, err: %d\n",
  803. ret);
  804. goto err_send;
  805. }
  806. ret = qmi_send_request
  807. (&plat_priv->qmi_wlfw, NULL, &txn,
  808. QMI_WLFW_BDF_DOWNLOAD_REQ_V01,
  809. WLFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  810. wlfw_bdf_download_req_msg_v01_ei, req);
  811. if (ret < 0) {
  812. qmi_txn_cancel(&txn);
  813. cnss_pr_err("Failed to send respond BDF download request, err: %d\n",
  814. ret);
  815. goto err_send;
  816. }
  817. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  818. if (ret < 0) {
  819. cnss_pr_err("Failed to wait for response of BDF download request, err: %d\n",
  820. ret);
  821. goto err_send;
  822. }
  823. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  824. cnss_pr_err("BDF download request failed, result: %d, err: %d\n",
  825. resp->resp.result, resp->resp.error);
  826. ret = -resp->resp.result;
  827. goto err_send;
  828. }
  829. remaining -= req->data_len;
  830. temp += req->data_len;
  831. req->seg_id++;
  832. }
  833. release_firmware(fw_entry);
  834. if (resp->host_bdf_data_valid) {
  835. /* QCA6490 enable S3E regulator for IPA configuration only */
  836. if (!(resp->host_bdf_data & QMI_WLFW_HW_XPA_V01))
  837. cnss_enable_int_pow_amp_vreg(plat_priv);
  838. plat_priv->cbc_file_download =
  839. resp->host_bdf_data & QMI_WLFW_CBC_FILE_DOWNLOAD_V01;
  840. cnss_pr_info("Host BDF config: HW_XPA: %d CalDB: %d\n",
  841. resp->host_bdf_data & QMI_WLFW_HW_XPA_V01,
  842. plat_priv->cbc_file_download);
  843. }
  844. kfree(req);
  845. kfree(resp);
  846. return 0;
  847. err_send:
  848. release_firmware(fw_entry);
  849. err_req_fw:
  850. if (!(bdf_type == CNSS_BDF_REGDB ||
  851. test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state) ||
  852. ret == -EAGAIN))
  853. CNSS_QMI_ASSERT();
  854. kfree(req);
  855. kfree(resp);
  856. return ret;
  857. }
  858. int cnss_wlfw_m3_dnld_send_sync(struct cnss_plat_data *plat_priv)
  859. {
  860. struct wlfw_m3_info_req_msg_v01 *req;
  861. struct wlfw_m3_info_resp_msg_v01 *resp;
  862. struct qmi_txn txn;
  863. struct cnss_fw_mem *m3_mem = &plat_priv->m3_mem;
  864. int ret = 0;
  865. cnss_pr_dbg("Sending M3 information message, state: 0x%lx\n",
  866. plat_priv->driver_state);
  867. req = kzalloc(sizeof(*req), GFP_KERNEL);
  868. if (!req)
  869. return -ENOMEM;
  870. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  871. if (!resp) {
  872. kfree(req);
  873. return -ENOMEM;
  874. }
  875. if (!m3_mem->pa || !m3_mem->size) {
  876. cnss_pr_err("Memory for M3 is not available\n");
  877. ret = -ENOMEM;
  878. goto out;
  879. }
  880. cnss_pr_dbg("M3 memory, va: 0x%pK, pa: %pa, size: 0x%zx\n",
  881. m3_mem->va, &m3_mem->pa, m3_mem->size);
  882. req->addr = plat_priv->m3_mem.pa;
  883. req->size = plat_priv->m3_mem.size;
  884. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  885. wlfw_m3_info_resp_msg_v01_ei, resp);
  886. if (ret < 0) {
  887. cnss_pr_err("Failed to initialize txn for M3 information request, err: %d\n",
  888. ret);
  889. goto out;
  890. }
  891. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  892. QMI_WLFW_M3_INFO_REQ_V01,
  893. WLFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  894. wlfw_m3_info_req_msg_v01_ei, req);
  895. if (ret < 0) {
  896. qmi_txn_cancel(&txn);
  897. cnss_pr_err("Failed to send M3 information request, err: %d\n",
  898. ret);
  899. goto out;
  900. }
  901. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  902. if (ret < 0) {
  903. cnss_pr_err("Failed to wait for response of M3 information request, err: %d\n",
  904. ret);
  905. goto out;
  906. }
  907. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  908. cnss_pr_err("M3 information request failed, result: %d, err: %d\n",
  909. resp->resp.result, resp->resp.error);
  910. ret = -resp->resp.result;
  911. goto out;
  912. }
  913. kfree(req);
  914. kfree(resp);
  915. return 0;
  916. out:
  917. CNSS_QMI_ASSERT();
  918. kfree(req);
  919. kfree(resp);
  920. return ret;
  921. }
  922. int cnss_wlfw_wlan_mac_req_send_sync(struct cnss_plat_data *plat_priv,
  923. u8 *mac, u32 mac_len)
  924. {
  925. struct wlfw_mac_addr_req_msg_v01 req;
  926. struct wlfw_mac_addr_resp_msg_v01 resp = {0};
  927. struct qmi_txn txn;
  928. int ret;
  929. if (!plat_priv || !mac || mac_len != QMI_WLFW_MAC_ADDR_SIZE_V01)
  930. return -EINVAL;
  931. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  932. wlfw_mac_addr_resp_msg_v01_ei, &resp);
  933. if (ret < 0) {
  934. cnss_pr_err("Failed to initialize txn for mac req, err: %d\n",
  935. ret);
  936. ret = -EIO;
  937. goto out;
  938. }
  939. cnss_pr_dbg("Sending WLAN mac req [%pM], state: 0x%lx\n",
  940. mac, plat_priv->driver_state);
  941. memcpy(req.mac_addr, mac, mac_len);
  942. req.mac_addr_valid = 1;
  943. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  944. QMI_WLFW_MAC_ADDR_REQ_V01,
  945. WLFW_MAC_ADDR_REQ_MSG_V01_MAX_MSG_LEN,
  946. wlfw_mac_addr_req_msg_v01_ei, &req);
  947. if (ret < 0) {
  948. qmi_txn_cancel(&txn);
  949. cnss_pr_err("Failed to send mac req, err: %d\n", ret);
  950. ret = -EIO;
  951. goto out;
  952. }
  953. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  954. if (ret < 0) {
  955. cnss_pr_err("Failed to wait for resp of mac req, err: %d\n",
  956. ret);
  957. ret = -EIO;
  958. goto out;
  959. }
  960. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  961. cnss_pr_err("WLAN mac req failed, result: %d, err: %d\n",
  962. resp.resp.result);
  963. ret = -resp.resp.result;
  964. }
  965. out:
  966. return ret;
  967. }
  968. int cnss_wlfw_qdss_data_send_sync(struct cnss_plat_data *plat_priv, char *file_name,
  969. u32 total_size)
  970. {
  971. int ret = 0;
  972. struct wlfw_qdss_trace_data_req_msg_v01 *req;
  973. struct wlfw_qdss_trace_data_resp_msg_v01 *resp;
  974. unsigned char *p_qdss_trace_data_temp, *p_qdss_trace_data = NULL;
  975. unsigned int remaining;
  976. struct qmi_txn txn;
  977. cnss_pr_dbg("%s\n", __func__);
  978. req = kzalloc(sizeof(*req), GFP_KERNEL);
  979. if (!req)
  980. return -ENOMEM;
  981. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  982. if (!resp) {
  983. kfree(req);
  984. return -ENOMEM;
  985. }
  986. p_qdss_trace_data = kzalloc(total_size, GFP_KERNEL);
  987. if (!p_qdss_trace_data) {
  988. ret = ENOMEM;
  989. goto end;
  990. }
  991. remaining = total_size;
  992. p_qdss_trace_data_temp = p_qdss_trace_data;
  993. while (remaining && resp->end == 0) {
  994. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  995. wlfw_qdss_trace_data_resp_msg_v01_ei, resp);
  996. if (ret < 0) {
  997. cnss_pr_err("Fail to init txn for QDSS trace resp %d\n",
  998. ret);
  999. goto fail;
  1000. }
  1001. ret = qmi_send_request
  1002. (&plat_priv->qmi_wlfw, NULL, &txn,
  1003. QMI_WLFW_QDSS_TRACE_DATA_REQ_V01,
  1004. WLFW_QDSS_TRACE_DATA_REQ_MSG_V01_MAX_MSG_LEN,
  1005. wlfw_qdss_trace_data_req_msg_v01_ei, req);
  1006. if (ret < 0) {
  1007. qmi_txn_cancel(&txn);
  1008. cnss_pr_err("Fail to send QDSS trace data req %d\n",
  1009. ret);
  1010. goto fail;
  1011. }
  1012. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1013. if (ret < 0) {
  1014. cnss_pr_err("QDSS trace resp wait failed with rc %d\n",
  1015. ret);
  1016. goto fail;
  1017. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1018. cnss_pr_err("QMI QDSS trace request rejected, result:%d error:%d\n",
  1019. resp->resp.result, resp->resp.error);
  1020. ret = -resp->resp.result;
  1021. goto fail;
  1022. } else {
  1023. ret = 0;
  1024. }
  1025. cnss_pr_dbg("%s: response total size %d data len %d",
  1026. __func__, resp->total_size, resp->data_len);
  1027. if ((resp->total_size_valid == 1 &&
  1028. resp->total_size == total_size) &&
  1029. (resp->seg_id_valid == 1 && resp->seg_id == req->seg_id) &&
  1030. (resp->data_valid == 1 &&
  1031. resp->data_len <= QMI_WLFW_MAX_DATA_SIZE_V01) &&
  1032. resp->data_len <= remaining) {
  1033. memcpy(p_qdss_trace_data_temp,
  1034. resp->data, resp->data_len);
  1035. } else {
  1036. cnss_pr_err("%s: Unmatched qdss trace data, Expect total_size %u, seg_id %u, Recv total_size_valid %u, total_size %u, seg_id_valid %u, seg_id %u, data_len_valid %u, data_len %u",
  1037. __func__,
  1038. total_size, req->seg_id,
  1039. resp->total_size_valid,
  1040. resp->total_size,
  1041. resp->seg_id_valid,
  1042. resp->seg_id,
  1043. resp->data_valid,
  1044. resp->data_len);
  1045. ret = -1;
  1046. goto fail;
  1047. }
  1048. remaining -= resp->data_len;
  1049. p_qdss_trace_data_temp += resp->data_len;
  1050. req->seg_id++;
  1051. }
  1052. if (remaining == 0 && (resp->end_valid && resp->end)) {
  1053. ret = cnss_genl_send_msg(p_qdss_trace_data,
  1054. CNSS_GENL_MSG_TYPE_QDSS, file_name,
  1055. total_size);
  1056. if (ret < 0) {
  1057. cnss_pr_err("Fail to save QDSS trace data: %d\n",
  1058. ret);
  1059. ret = -1;
  1060. goto fail;
  1061. }
  1062. } else {
  1063. cnss_pr_err("%s: QDSS trace file corrupted: remaining %u, end_valid %u, end %u",
  1064. __func__,
  1065. remaining, resp->end_valid, resp->end);
  1066. ret = -1;
  1067. goto fail;
  1068. }
  1069. fail:
  1070. kfree(p_qdss_trace_data);
  1071. end:
  1072. kfree(req);
  1073. kfree(resp);
  1074. return ret;
  1075. }
  1076. void cnss_get_qdss_cfg_filename(struct cnss_plat_data *plat_priv,
  1077. char *filename, u32 filename_len)
  1078. {
  1079. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  1080. char *debug_str = QDSS_DEBUG_FILE_STR;
  1081. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  1082. plat_priv->device_id == MANGO_DEVICE_ID ||
  1083. plat_priv->device_id == PEACH_DEVICE_ID)
  1084. debug_str = "";
  1085. if (plat_priv->device_version.major_version == FW_V2_NUMBER)
  1086. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1087. "_%s%s.cfg", debug_str, HW_V2_NUMBER);
  1088. else
  1089. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1090. "_%s%s.cfg", debug_str, HW_V1_NUMBER);
  1091. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  1092. }
  1093. int cnss_wlfw_qdss_dnld_send_sync(struct cnss_plat_data *plat_priv)
  1094. {
  1095. struct wlfw_qdss_trace_config_download_req_msg_v01 *req;
  1096. struct wlfw_qdss_trace_config_download_resp_msg_v01 *resp;
  1097. struct qmi_txn txn;
  1098. const struct firmware *fw_entry = NULL;
  1099. const u8 *temp;
  1100. char qdss_cfg_filename[MAX_FIRMWARE_NAME_LEN];
  1101. unsigned int remaining;
  1102. int ret = 0;
  1103. cnss_pr_dbg("Sending QDSS config download message, state: 0x%lx\n",
  1104. plat_priv->driver_state);
  1105. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1106. if (!req)
  1107. return -ENOMEM;
  1108. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1109. if (!resp) {
  1110. kfree(req);
  1111. return -ENOMEM;
  1112. }
  1113. cnss_get_qdss_cfg_filename(plat_priv, qdss_cfg_filename, sizeof(qdss_cfg_filename));
  1114. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  1115. qdss_cfg_filename);
  1116. if (ret) {
  1117. cnss_pr_dbg("Unable to load %s\n",
  1118. qdss_cfg_filename);
  1119. goto err_req_fw;
  1120. }
  1121. temp = fw_entry->data;
  1122. remaining = fw_entry->size;
  1123. cnss_pr_dbg("Downloading QDSS: %s, size: %u\n",
  1124. qdss_cfg_filename, remaining);
  1125. while (remaining) {
  1126. req->total_size_valid = 1;
  1127. req->total_size = remaining;
  1128. req->seg_id_valid = 1;
  1129. req->data_valid = 1;
  1130. req->end_valid = 1;
  1131. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1132. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  1133. } else {
  1134. req->data_len = remaining;
  1135. req->end = 1;
  1136. }
  1137. memcpy(req->data, temp, req->data_len);
  1138. ret = qmi_txn_init
  1139. (&plat_priv->qmi_wlfw, &txn,
  1140. wlfw_qdss_trace_config_download_resp_msg_v01_ei,
  1141. resp);
  1142. if (ret < 0) {
  1143. cnss_pr_err("Failed to initialize txn for QDSS download request, err: %d\n",
  1144. ret);
  1145. goto err_send;
  1146. }
  1147. ret = qmi_send_request
  1148. (&plat_priv->qmi_wlfw, NULL, &txn,
  1149. QMI_WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_V01,
  1150. WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  1151. wlfw_qdss_trace_config_download_req_msg_v01_ei, req);
  1152. if (ret < 0) {
  1153. qmi_txn_cancel(&txn);
  1154. cnss_pr_err("Failed to send respond QDSS download request, err: %d\n",
  1155. ret);
  1156. goto err_send;
  1157. }
  1158. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1159. if (ret < 0) {
  1160. cnss_pr_err("Failed to wait for response of QDSS download request, err: %d\n",
  1161. ret);
  1162. goto err_send;
  1163. }
  1164. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1165. cnss_pr_err("QDSS download request failed, result: %d, err: %d\n",
  1166. resp->resp.result, resp->resp.error);
  1167. ret = -resp->resp.result;
  1168. goto err_send;
  1169. }
  1170. remaining -= req->data_len;
  1171. temp += req->data_len;
  1172. req->seg_id++;
  1173. }
  1174. release_firmware(fw_entry);
  1175. kfree(req);
  1176. kfree(resp);
  1177. return 0;
  1178. err_send:
  1179. release_firmware(fw_entry);
  1180. err_req_fw:
  1181. kfree(req);
  1182. kfree(resp);
  1183. return ret;
  1184. }
  1185. static int wlfw_send_qdss_trace_mode_req
  1186. (struct cnss_plat_data *plat_priv,
  1187. enum wlfw_qdss_trace_mode_enum_v01 mode,
  1188. unsigned long long option)
  1189. {
  1190. int rc = 0;
  1191. int tmp = 0;
  1192. struct wlfw_qdss_trace_mode_req_msg_v01 *req;
  1193. struct wlfw_qdss_trace_mode_resp_msg_v01 *resp;
  1194. struct qmi_txn txn;
  1195. if (!plat_priv)
  1196. return -ENODEV;
  1197. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1198. if (!req)
  1199. return -ENOMEM;
  1200. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1201. if (!resp) {
  1202. kfree(req);
  1203. return -ENOMEM;
  1204. }
  1205. req->mode_valid = 1;
  1206. req->mode = mode;
  1207. req->option_valid = 1;
  1208. req->option = option;
  1209. tmp = plat_priv->hw_trc_override;
  1210. req->hw_trc_disable_override_valid = 1;
  1211. req->hw_trc_disable_override =
  1212. (tmp > QMI_PARAM_DISABLE_V01 ? QMI_PARAM_DISABLE_V01 :
  1213. (tmp < 0 ? QMI_PARAM_INVALID_V01 : tmp));
  1214. cnss_pr_dbg("%s: mode %u, option %llu, hw_trc_disable_override: %u",
  1215. __func__, mode, option, req->hw_trc_disable_override);
  1216. rc = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1217. wlfw_qdss_trace_mode_resp_msg_v01_ei, resp);
  1218. if (rc < 0) {
  1219. cnss_pr_err("Fail to init txn for QDSS Mode resp %d\n",
  1220. rc);
  1221. goto out;
  1222. }
  1223. rc = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1224. QMI_WLFW_QDSS_TRACE_MODE_REQ_V01,
  1225. WLFW_QDSS_TRACE_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1226. wlfw_qdss_trace_mode_req_msg_v01_ei, req);
  1227. if (rc < 0) {
  1228. qmi_txn_cancel(&txn);
  1229. cnss_pr_err("Fail to send QDSS Mode req %d\n", rc);
  1230. goto out;
  1231. }
  1232. rc = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1233. if (rc < 0) {
  1234. cnss_pr_err("QDSS Mode resp wait failed with rc %d\n",
  1235. rc);
  1236. goto out;
  1237. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1238. cnss_pr_err("QMI QDSS Mode request rejected, result:%d error:%d\n",
  1239. resp->resp.result, resp->resp.error);
  1240. rc = -resp->resp.result;
  1241. goto out;
  1242. }
  1243. kfree(resp);
  1244. kfree(req);
  1245. return rc;
  1246. out:
  1247. kfree(resp);
  1248. kfree(req);
  1249. CNSS_QMI_ASSERT();
  1250. return rc;
  1251. }
  1252. int wlfw_qdss_trace_start(struct cnss_plat_data *plat_priv)
  1253. {
  1254. return wlfw_send_qdss_trace_mode_req(plat_priv,
  1255. QMI_WLFW_QDSS_TRACE_ON_V01, 0);
  1256. }
  1257. int wlfw_qdss_trace_stop(struct cnss_plat_data *plat_priv, unsigned long long option)
  1258. {
  1259. return wlfw_send_qdss_trace_mode_req(plat_priv, QMI_WLFW_QDSS_TRACE_OFF_V01,
  1260. option);
  1261. }
  1262. int cnss_wlfw_wlan_mode_send_sync(struct cnss_plat_data *plat_priv,
  1263. enum cnss_driver_mode mode)
  1264. {
  1265. struct wlfw_wlan_mode_req_msg_v01 *req;
  1266. struct wlfw_wlan_mode_resp_msg_v01 *resp;
  1267. struct qmi_txn txn;
  1268. int ret = 0;
  1269. if (!plat_priv)
  1270. return -ENODEV;
  1271. cnss_pr_dbg("Sending mode message, mode: %s(%d), state: 0x%lx\n",
  1272. cnss_qmi_mode_to_str(mode), mode, plat_priv->driver_state);
  1273. if (mode == CNSS_OFF &&
  1274. test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1275. cnss_pr_dbg("Recovery is in progress, ignore mode off request\n");
  1276. return 0;
  1277. }
  1278. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1279. if (!req)
  1280. return -ENOMEM;
  1281. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1282. if (!resp) {
  1283. kfree(req);
  1284. return -ENOMEM;
  1285. }
  1286. req->mode = (enum wlfw_driver_mode_enum_v01)mode;
  1287. req->hw_debug_valid = 1;
  1288. req->hw_debug = 0;
  1289. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1290. wlfw_wlan_mode_resp_msg_v01_ei, resp);
  1291. if (ret < 0) {
  1292. cnss_pr_err("Failed to initialize txn for mode request, mode: %s(%d), err: %d\n",
  1293. cnss_qmi_mode_to_str(mode), mode, ret);
  1294. goto out;
  1295. }
  1296. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1297. QMI_WLFW_WLAN_MODE_REQ_V01,
  1298. WLFW_WLAN_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1299. wlfw_wlan_mode_req_msg_v01_ei, req);
  1300. if (ret < 0) {
  1301. qmi_txn_cancel(&txn);
  1302. cnss_pr_err("Failed to send mode request, mode: %s(%d), err: %d\n",
  1303. cnss_qmi_mode_to_str(mode), mode, ret);
  1304. goto out;
  1305. }
  1306. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1307. if (ret < 0) {
  1308. cnss_pr_err("Failed to wait for response of mode request, mode: %s(%d), err: %d\n",
  1309. cnss_qmi_mode_to_str(mode), mode, ret);
  1310. goto out;
  1311. }
  1312. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1313. cnss_pr_err("Mode request failed, mode: %s(%d), result: %d, err: %d\n",
  1314. cnss_qmi_mode_to_str(mode), mode, resp->resp.result,
  1315. resp->resp.error);
  1316. ret = -resp->resp.result;
  1317. goto out;
  1318. }
  1319. kfree(req);
  1320. kfree(resp);
  1321. return 0;
  1322. out:
  1323. if (mode == CNSS_OFF) {
  1324. cnss_pr_dbg("WLFW service is disconnected while sending mode off request\n");
  1325. ret = 0;
  1326. } else {
  1327. CNSS_QMI_ASSERT();
  1328. }
  1329. kfree(req);
  1330. kfree(resp);
  1331. return ret;
  1332. }
  1333. int cnss_wlfw_wlan_cfg_send_sync(struct cnss_plat_data *plat_priv,
  1334. struct cnss_wlan_enable_cfg *config,
  1335. const char *host_version)
  1336. {
  1337. struct wlfw_wlan_cfg_req_msg_v01 *req;
  1338. struct wlfw_wlan_cfg_resp_msg_v01 *resp;
  1339. struct qmi_txn txn;
  1340. u32 i;
  1341. int ret = 0;
  1342. if (!plat_priv)
  1343. return -ENODEV;
  1344. cnss_pr_dbg("Sending WLAN config message, state: 0x%lx\n",
  1345. plat_priv->driver_state);
  1346. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1347. if (!req)
  1348. return -ENOMEM;
  1349. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1350. if (!resp) {
  1351. kfree(req);
  1352. return -ENOMEM;
  1353. }
  1354. req->host_version_valid = 1;
  1355. strlcpy(req->host_version, host_version,
  1356. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  1357. req->tgt_cfg_valid = 1;
  1358. if (config->num_ce_tgt_cfg > QMI_WLFW_MAX_NUM_CE_V01)
  1359. req->tgt_cfg_len = QMI_WLFW_MAX_NUM_CE_V01;
  1360. else
  1361. req->tgt_cfg_len = config->num_ce_tgt_cfg;
  1362. for (i = 0; i < req->tgt_cfg_len; i++) {
  1363. req->tgt_cfg[i].pipe_num = config->ce_tgt_cfg[i].pipe_num;
  1364. req->tgt_cfg[i].pipe_dir = config->ce_tgt_cfg[i].pipe_dir;
  1365. req->tgt_cfg[i].nentries = config->ce_tgt_cfg[i].nentries;
  1366. req->tgt_cfg[i].nbytes_max = config->ce_tgt_cfg[i].nbytes_max;
  1367. req->tgt_cfg[i].flags = config->ce_tgt_cfg[i].flags;
  1368. }
  1369. req->svc_cfg_valid = 1;
  1370. if (config->num_ce_svc_pipe_cfg > QMI_WLFW_MAX_NUM_SVC_V01)
  1371. req->svc_cfg_len = QMI_WLFW_MAX_NUM_SVC_V01;
  1372. else
  1373. req->svc_cfg_len = config->num_ce_svc_pipe_cfg;
  1374. for (i = 0; i < req->svc_cfg_len; i++) {
  1375. req->svc_cfg[i].service_id = config->ce_svc_cfg[i].service_id;
  1376. req->svc_cfg[i].pipe_dir = config->ce_svc_cfg[i].pipe_dir;
  1377. req->svc_cfg[i].pipe_num = config->ce_svc_cfg[i].pipe_num;
  1378. }
  1379. if (plat_priv->device_id != KIWI_DEVICE_ID &&
  1380. plat_priv->device_id != MANGO_DEVICE_ID &&
  1381. plat_priv->device_id != PEACH_DEVICE_ID) {
  1382. req->shadow_reg_v2_valid = 1;
  1383. if (config->num_shadow_reg_v2_cfg >
  1384. QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01)
  1385. req->shadow_reg_v2_len = QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01;
  1386. else
  1387. req->shadow_reg_v2_len = config->num_shadow_reg_v2_cfg;
  1388. memcpy(req->shadow_reg_v2, config->shadow_reg_v2_cfg,
  1389. sizeof(struct wlfw_shadow_reg_v2_cfg_s_v01)
  1390. * req->shadow_reg_v2_len);
  1391. } else {
  1392. req->shadow_reg_v3_valid = 1;
  1393. if (config->num_shadow_reg_v3_cfg >
  1394. MAX_NUM_SHADOW_REG_V3)
  1395. req->shadow_reg_v3_len = MAX_NUM_SHADOW_REG_V3;
  1396. else
  1397. req->shadow_reg_v3_len = config->num_shadow_reg_v3_cfg;
  1398. plat_priv->num_shadow_regs_v3 = req->shadow_reg_v3_len;
  1399. cnss_pr_dbg("Shadow reg v3 len: %d\n",
  1400. plat_priv->num_shadow_regs_v3);
  1401. memcpy(req->shadow_reg_v3, config->shadow_reg_v3_cfg,
  1402. sizeof(struct wlfw_shadow_reg_v3_cfg_s_v01)
  1403. * req->shadow_reg_v3_len);
  1404. }
  1405. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1406. wlfw_wlan_cfg_resp_msg_v01_ei, resp);
  1407. if (ret < 0) {
  1408. cnss_pr_err("Failed to initialize txn for WLAN config request, err: %d\n",
  1409. ret);
  1410. goto out;
  1411. }
  1412. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1413. QMI_WLFW_WLAN_CFG_REQ_V01,
  1414. WLFW_WLAN_CFG_REQ_MSG_V01_MAX_MSG_LEN,
  1415. wlfw_wlan_cfg_req_msg_v01_ei, req);
  1416. if (ret < 0) {
  1417. qmi_txn_cancel(&txn);
  1418. cnss_pr_err("Failed to send WLAN config request, err: %d\n",
  1419. ret);
  1420. goto out;
  1421. }
  1422. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1423. if (ret < 0) {
  1424. cnss_pr_err("Failed to wait for response of WLAN config request, err: %d\n",
  1425. ret);
  1426. goto out;
  1427. }
  1428. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1429. cnss_pr_err("WLAN config request failed, result: %d, err: %d\n",
  1430. resp->resp.result, resp->resp.error);
  1431. ret = -resp->resp.result;
  1432. goto out;
  1433. }
  1434. kfree(req);
  1435. kfree(resp);
  1436. return 0;
  1437. out:
  1438. CNSS_QMI_ASSERT();
  1439. kfree(req);
  1440. kfree(resp);
  1441. return ret;
  1442. }
  1443. int cnss_wlfw_athdiag_read_send_sync(struct cnss_plat_data *plat_priv,
  1444. u32 offset, u32 mem_type,
  1445. u32 data_len, u8 *data)
  1446. {
  1447. struct wlfw_athdiag_read_req_msg_v01 *req;
  1448. struct wlfw_athdiag_read_resp_msg_v01 *resp;
  1449. struct qmi_txn txn;
  1450. int ret = 0;
  1451. if (!plat_priv)
  1452. return -ENODEV;
  1453. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1454. cnss_pr_err("Invalid parameters for athdiag read: data %pK, data_len %u\n",
  1455. data, data_len);
  1456. return -EINVAL;
  1457. }
  1458. cnss_pr_dbg("athdiag read: state 0x%lx, offset %x, mem_type %x, data_len %u\n",
  1459. plat_priv->driver_state, offset, mem_type, data_len);
  1460. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1461. if (!req)
  1462. return -ENOMEM;
  1463. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1464. if (!resp) {
  1465. kfree(req);
  1466. return -ENOMEM;
  1467. }
  1468. req->offset = offset;
  1469. req->mem_type = mem_type;
  1470. req->data_len = data_len;
  1471. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1472. wlfw_athdiag_read_resp_msg_v01_ei, resp);
  1473. if (ret < 0) {
  1474. cnss_pr_err("Failed to initialize txn for athdiag read request, err: %d\n",
  1475. ret);
  1476. goto out;
  1477. }
  1478. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1479. QMI_WLFW_ATHDIAG_READ_REQ_V01,
  1480. WLFW_ATHDIAG_READ_REQ_MSG_V01_MAX_MSG_LEN,
  1481. wlfw_athdiag_read_req_msg_v01_ei, req);
  1482. if (ret < 0) {
  1483. qmi_txn_cancel(&txn);
  1484. cnss_pr_err("Failed to send athdiag read request, err: %d\n",
  1485. ret);
  1486. goto out;
  1487. }
  1488. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1489. if (ret < 0) {
  1490. cnss_pr_err("Failed to wait for response of athdiag read request, err: %d\n",
  1491. ret);
  1492. goto out;
  1493. }
  1494. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1495. cnss_pr_err("Athdiag read request failed, result: %d, err: %d\n",
  1496. resp->resp.result, resp->resp.error);
  1497. ret = -resp->resp.result;
  1498. goto out;
  1499. }
  1500. if (!resp->data_valid || resp->data_len != data_len) {
  1501. cnss_pr_err("athdiag read data is invalid, data_valid = %u, data_len = %u\n",
  1502. resp->data_valid, resp->data_len);
  1503. ret = -EINVAL;
  1504. goto out;
  1505. }
  1506. memcpy(data, resp->data, resp->data_len);
  1507. kfree(req);
  1508. kfree(resp);
  1509. return 0;
  1510. out:
  1511. kfree(req);
  1512. kfree(resp);
  1513. return ret;
  1514. }
  1515. int cnss_wlfw_athdiag_write_send_sync(struct cnss_plat_data *plat_priv,
  1516. u32 offset, u32 mem_type,
  1517. u32 data_len, u8 *data)
  1518. {
  1519. struct wlfw_athdiag_write_req_msg_v01 *req;
  1520. struct wlfw_athdiag_write_resp_msg_v01 *resp;
  1521. struct qmi_txn txn;
  1522. int ret = 0;
  1523. if (!plat_priv)
  1524. return -ENODEV;
  1525. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1526. cnss_pr_err("Invalid parameters for athdiag write: data %pK, data_len %u\n",
  1527. data, data_len);
  1528. return -EINVAL;
  1529. }
  1530. cnss_pr_dbg("athdiag write: state 0x%lx, offset %x, mem_type %x, data_len %u, data %pK\n",
  1531. plat_priv->driver_state, offset, mem_type, data_len, data);
  1532. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1533. if (!req)
  1534. return -ENOMEM;
  1535. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1536. if (!resp) {
  1537. kfree(req);
  1538. return -ENOMEM;
  1539. }
  1540. req->offset = offset;
  1541. req->mem_type = mem_type;
  1542. req->data_len = data_len;
  1543. memcpy(req->data, data, data_len);
  1544. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1545. wlfw_athdiag_write_resp_msg_v01_ei, resp);
  1546. if (ret < 0) {
  1547. cnss_pr_err("Failed to initialize txn for athdiag write request, err: %d\n",
  1548. ret);
  1549. goto out;
  1550. }
  1551. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1552. QMI_WLFW_ATHDIAG_WRITE_REQ_V01,
  1553. WLFW_ATHDIAG_WRITE_REQ_MSG_V01_MAX_MSG_LEN,
  1554. wlfw_athdiag_write_req_msg_v01_ei, req);
  1555. if (ret < 0) {
  1556. qmi_txn_cancel(&txn);
  1557. cnss_pr_err("Failed to send athdiag write request, err: %d\n",
  1558. ret);
  1559. goto out;
  1560. }
  1561. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1562. if (ret < 0) {
  1563. cnss_pr_err("Failed to wait for response of athdiag write request, err: %d\n",
  1564. ret);
  1565. goto out;
  1566. }
  1567. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1568. cnss_pr_err("Athdiag write request failed, result: %d, err: %d\n",
  1569. resp->resp.result, resp->resp.error);
  1570. ret = -resp->resp.result;
  1571. goto out;
  1572. }
  1573. kfree(req);
  1574. kfree(resp);
  1575. return 0;
  1576. out:
  1577. kfree(req);
  1578. kfree(resp);
  1579. return ret;
  1580. }
  1581. int cnss_wlfw_ini_send_sync(struct cnss_plat_data *plat_priv,
  1582. u8 fw_log_mode)
  1583. {
  1584. struct wlfw_ini_req_msg_v01 *req;
  1585. struct wlfw_ini_resp_msg_v01 *resp;
  1586. struct qmi_txn txn;
  1587. int ret = 0;
  1588. if (!plat_priv)
  1589. return -ENODEV;
  1590. cnss_pr_dbg("Sending ini sync request, state: 0x%lx, fw_log_mode: %d\n",
  1591. plat_priv->driver_state, fw_log_mode);
  1592. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1593. if (!req)
  1594. return -ENOMEM;
  1595. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1596. if (!resp) {
  1597. kfree(req);
  1598. return -ENOMEM;
  1599. }
  1600. req->enablefwlog_valid = 1;
  1601. req->enablefwlog = fw_log_mode;
  1602. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1603. wlfw_ini_resp_msg_v01_ei, resp);
  1604. if (ret < 0) {
  1605. cnss_pr_err("Failed to initialize txn for ini request, fw_log_mode: %d, err: %d\n",
  1606. fw_log_mode, ret);
  1607. goto out;
  1608. }
  1609. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1610. QMI_WLFW_INI_REQ_V01,
  1611. WLFW_INI_REQ_MSG_V01_MAX_MSG_LEN,
  1612. wlfw_ini_req_msg_v01_ei, req);
  1613. if (ret < 0) {
  1614. qmi_txn_cancel(&txn);
  1615. cnss_pr_err("Failed to send ini request, fw_log_mode: %d, err: %d\n",
  1616. fw_log_mode, ret);
  1617. goto out;
  1618. }
  1619. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1620. if (ret < 0) {
  1621. cnss_pr_err("Failed to wait for response of ini request, fw_log_mode: %d, err: %d\n",
  1622. fw_log_mode, ret);
  1623. goto out;
  1624. }
  1625. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1626. cnss_pr_err("Ini request failed, fw_log_mode: %d, result: %d, err: %d\n",
  1627. fw_log_mode, resp->resp.result, resp->resp.error);
  1628. ret = -resp->resp.result;
  1629. goto out;
  1630. }
  1631. kfree(req);
  1632. kfree(resp);
  1633. return 0;
  1634. out:
  1635. kfree(req);
  1636. kfree(resp);
  1637. return ret;
  1638. }
  1639. int cnss_wlfw_send_pcie_gen_speed_sync(struct cnss_plat_data *plat_priv)
  1640. {
  1641. struct wlfw_pcie_gen_switch_req_msg_v01 req;
  1642. struct wlfw_pcie_gen_switch_resp_msg_v01 resp = {0};
  1643. struct qmi_txn txn;
  1644. int ret = 0;
  1645. if (!plat_priv)
  1646. return -ENODEV;
  1647. if (plat_priv->pcie_gen_speed == QMI_PCIE_GEN_SPEED_INVALID_V01 ||
  1648. !plat_priv->fw_pcie_gen_switch) {
  1649. cnss_pr_dbg("PCIE Gen speed not setup\n");
  1650. return 0;
  1651. }
  1652. cnss_pr_dbg("Sending PCIE Gen speed: %d state: 0x%lx\n",
  1653. plat_priv->pcie_gen_speed, plat_priv->driver_state);
  1654. req.pcie_speed = (enum wlfw_pcie_gen_speed_v01)
  1655. plat_priv->pcie_gen_speed;
  1656. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1657. wlfw_pcie_gen_switch_resp_msg_v01_ei, &resp);
  1658. if (ret < 0) {
  1659. cnss_pr_err("Failed to initialize txn for PCIE speed switch err: %d\n",
  1660. ret);
  1661. goto out;
  1662. }
  1663. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1664. QMI_WLFW_PCIE_GEN_SWITCH_REQ_V01,
  1665. WLFW_PCIE_GEN_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1666. wlfw_pcie_gen_switch_req_msg_v01_ei, &req);
  1667. if (ret < 0) {
  1668. qmi_txn_cancel(&txn);
  1669. cnss_pr_err("Failed to send PCIE speed switch, err: %d\n", ret);
  1670. goto out;
  1671. }
  1672. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1673. if (ret < 0) {
  1674. cnss_pr_err("Failed to wait for PCIE Gen switch resp, err: %d\n",
  1675. ret);
  1676. goto out;
  1677. }
  1678. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  1679. cnss_pr_err("PCIE Gen Switch req failed, Speed: %d, result: %d, err: %d\n",
  1680. plat_priv->pcie_gen_speed, resp.resp.result,
  1681. resp.resp.error);
  1682. ret = -resp.resp.result;
  1683. }
  1684. out:
  1685. /* Reset PCIE Gen speed after one time use */
  1686. plat_priv->pcie_gen_speed = QMI_PCIE_GEN_SPEED_INVALID_V01;
  1687. return ret;
  1688. }
  1689. int cnss_wlfw_antenna_switch_send_sync(struct cnss_plat_data *plat_priv)
  1690. {
  1691. struct wlfw_antenna_switch_req_msg_v01 *req;
  1692. struct wlfw_antenna_switch_resp_msg_v01 *resp;
  1693. struct qmi_txn txn;
  1694. int ret = 0;
  1695. if (!plat_priv)
  1696. return -ENODEV;
  1697. cnss_pr_dbg("Sending antenna switch sync request, state: 0x%lx\n",
  1698. plat_priv->driver_state);
  1699. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1700. if (!req)
  1701. return -ENOMEM;
  1702. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1703. if (!resp) {
  1704. kfree(req);
  1705. return -ENOMEM;
  1706. }
  1707. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1708. wlfw_antenna_switch_resp_msg_v01_ei, resp);
  1709. if (ret < 0) {
  1710. cnss_pr_err("Failed to initialize txn for antenna switch request, err: %d\n",
  1711. ret);
  1712. goto out;
  1713. }
  1714. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1715. QMI_WLFW_ANTENNA_SWITCH_REQ_V01,
  1716. WLFW_ANTENNA_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1717. wlfw_antenna_switch_req_msg_v01_ei, req);
  1718. if (ret < 0) {
  1719. qmi_txn_cancel(&txn);
  1720. cnss_pr_err("Failed to send antenna switch request, err: %d\n",
  1721. ret);
  1722. goto out;
  1723. }
  1724. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1725. if (ret < 0) {
  1726. cnss_pr_err("Failed to wait for response of antenna switch request, err: %d\n",
  1727. ret);
  1728. goto out;
  1729. }
  1730. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1731. cnss_pr_dbg("Antenna switch request failed, result: %d, err: %d\n",
  1732. resp->resp.result, resp->resp.error);
  1733. ret = -resp->resp.result;
  1734. goto out;
  1735. }
  1736. if (resp->antenna_valid)
  1737. plat_priv->antenna = resp->antenna;
  1738. cnss_pr_dbg("Antenna valid: %u, antenna 0x%llx\n",
  1739. resp->antenna_valid, resp->antenna);
  1740. kfree(req);
  1741. kfree(resp);
  1742. return 0;
  1743. out:
  1744. kfree(req);
  1745. kfree(resp);
  1746. return ret;
  1747. }
  1748. int cnss_wlfw_antenna_grant_send_sync(struct cnss_plat_data *plat_priv)
  1749. {
  1750. struct wlfw_antenna_grant_req_msg_v01 *req;
  1751. struct wlfw_antenna_grant_resp_msg_v01 *resp;
  1752. struct qmi_txn txn;
  1753. int ret = 0;
  1754. if (!plat_priv)
  1755. return -ENODEV;
  1756. cnss_pr_dbg("Sending antenna grant sync request, state: 0x%lx, grant 0x%llx\n",
  1757. plat_priv->driver_state, plat_priv->grant);
  1758. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1759. if (!req)
  1760. return -ENOMEM;
  1761. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1762. if (!resp) {
  1763. kfree(req);
  1764. return -ENOMEM;
  1765. }
  1766. req->grant_valid = 1;
  1767. req->grant = plat_priv->grant;
  1768. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1769. wlfw_antenna_grant_resp_msg_v01_ei, resp);
  1770. if (ret < 0) {
  1771. cnss_pr_err("Failed to initialize txn for antenna grant request, err: %d\n",
  1772. ret);
  1773. goto out;
  1774. }
  1775. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1776. QMI_WLFW_ANTENNA_GRANT_REQ_V01,
  1777. WLFW_ANTENNA_GRANT_REQ_MSG_V01_MAX_MSG_LEN,
  1778. wlfw_antenna_grant_req_msg_v01_ei, req);
  1779. if (ret < 0) {
  1780. qmi_txn_cancel(&txn);
  1781. cnss_pr_err("Failed to send antenna grant request, err: %d\n",
  1782. ret);
  1783. goto out;
  1784. }
  1785. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1786. if (ret < 0) {
  1787. cnss_pr_err("Failed to wait for response of antenna grant request, err: %d\n",
  1788. ret);
  1789. goto out;
  1790. }
  1791. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1792. cnss_pr_err("Antenna grant request failed, result: %d, err: %d\n",
  1793. resp->resp.result, resp->resp.error);
  1794. ret = -resp->resp.result;
  1795. goto out;
  1796. }
  1797. kfree(req);
  1798. kfree(resp);
  1799. return 0;
  1800. out:
  1801. kfree(req);
  1802. kfree(resp);
  1803. return ret;
  1804. }
  1805. int cnss_wlfw_qdss_trace_mem_info_send_sync(struct cnss_plat_data *plat_priv)
  1806. {
  1807. struct wlfw_qdss_trace_mem_info_req_msg_v01 *req;
  1808. struct wlfw_qdss_trace_mem_info_resp_msg_v01 *resp;
  1809. struct qmi_txn txn;
  1810. struct cnss_fw_mem *qdss_mem = plat_priv->qdss_mem;
  1811. int ret = 0;
  1812. int i;
  1813. cnss_pr_dbg("Sending QDSS trace mem info, state: 0x%lx\n",
  1814. plat_priv->driver_state);
  1815. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1816. if (!req)
  1817. return -ENOMEM;
  1818. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1819. if (!resp) {
  1820. kfree(req);
  1821. return -ENOMEM;
  1822. }
  1823. if (plat_priv->qdss_mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  1824. cnss_pr_err("Invalid seg len %u\n", plat_priv->qdss_mem_seg_len);
  1825. ret = -EINVAL;
  1826. goto out;
  1827. }
  1828. req->mem_seg_len = plat_priv->qdss_mem_seg_len;
  1829. for (i = 0; i < req->mem_seg_len; i++) {
  1830. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  1831. qdss_mem[i].va, &qdss_mem[i].pa,
  1832. qdss_mem[i].size, qdss_mem[i].type);
  1833. req->mem_seg[i].addr = qdss_mem[i].pa;
  1834. req->mem_seg[i].size = qdss_mem[i].size;
  1835. req->mem_seg[i].type = qdss_mem[i].type;
  1836. }
  1837. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1838. wlfw_qdss_trace_mem_info_resp_msg_v01_ei, resp);
  1839. if (ret < 0) {
  1840. cnss_pr_err("Fail to initialize txn for QDSS trace mem request: err %d\n",
  1841. ret);
  1842. goto out;
  1843. }
  1844. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1845. QMI_WLFW_QDSS_TRACE_MEM_INFO_REQ_V01,
  1846. WLFW_QDSS_TRACE_MEM_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  1847. wlfw_qdss_trace_mem_info_req_msg_v01_ei, req);
  1848. if (ret < 0) {
  1849. qmi_txn_cancel(&txn);
  1850. cnss_pr_err("Fail to send QDSS trace mem info request: err %d\n",
  1851. ret);
  1852. goto out;
  1853. }
  1854. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1855. if (ret < 0) {
  1856. cnss_pr_err("Fail to wait for response of QDSS trace mem info request, err %d\n",
  1857. ret);
  1858. goto out;
  1859. }
  1860. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1861. cnss_pr_err("QDSS trace mem info request failed, result: %d, err: %d\n",
  1862. resp->resp.result, resp->resp.error);
  1863. ret = -resp->resp.result;
  1864. goto out;
  1865. }
  1866. kfree(req);
  1867. kfree(resp);
  1868. return 0;
  1869. out:
  1870. kfree(req);
  1871. kfree(resp);
  1872. return ret;
  1873. }
  1874. int cnss_wlfw_send_host_wfc_call_status(struct cnss_plat_data *plat_priv,
  1875. struct cnss_wfc_cfg cfg)
  1876. {
  1877. struct wlfw_wfc_call_status_req_msg_v01 *req;
  1878. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  1879. struct qmi_txn txn;
  1880. int ret = 0;
  1881. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1882. cnss_pr_err("Drop host WFC indication as FW not initialized\n");
  1883. return -EINVAL;
  1884. }
  1885. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1886. if (!req)
  1887. return -ENOMEM;
  1888. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1889. if (!resp) {
  1890. kfree(req);
  1891. return -ENOMEM;
  1892. }
  1893. req->wfc_call_active_valid = 1;
  1894. req->wfc_call_active = cfg.mode;
  1895. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  1896. plat_priv->driver_state);
  1897. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1898. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  1899. if (ret < 0) {
  1900. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  1901. ret);
  1902. goto out;
  1903. }
  1904. cnss_pr_dbg("Send WFC Mode: %d\n", cfg.mode);
  1905. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1906. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  1907. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  1908. wlfw_wfc_call_status_req_msg_v01_ei, req);
  1909. if (ret < 0) {
  1910. qmi_txn_cancel(&txn);
  1911. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  1912. ret);
  1913. goto out;
  1914. }
  1915. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1916. if (ret < 0) {
  1917. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  1918. ret);
  1919. goto out;
  1920. }
  1921. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1922. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  1923. resp->resp.result, resp->resp.error);
  1924. ret = -EINVAL;
  1925. goto out;
  1926. }
  1927. ret = 0;
  1928. out:
  1929. kfree(req);
  1930. kfree(resp);
  1931. return ret;
  1932. }
  1933. static int cnss_wlfw_wfc_call_status_send_sync
  1934. (struct cnss_plat_data *plat_priv,
  1935. const struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg)
  1936. {
  1937. struct wlfw_wfc_call_status_req_msg_v01 *req;
  1938. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  1939. struct qmi_txn txn;
  1940. int ret = 0;
  1941. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1942. cnss_pr_err("Drop IMS WFC indication as FW not initialized\n");
  1943. return -EINVAL;
  1944. }
  1945. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1946. if (!req)
  1947. return -ENOMEM;
  1948. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1949. if (!resp) {
  1950. kfree(req);
  1951. return -ENOMEM;
  1952. }
  1953. /**
  1954. * WFC Call r1 design has CNSS as pass thru using opaque hex buffer.
  1955. * But in r2 update QMI structure is expanded and as an effect qmi
  1956. * decoded structures have padding. Thus we cannot use buffer design.
  1957. * For backward compatibility for r1 design copy only wfc_call_active
  1958. * value in hex buffer.
  1959. */
  1960. req->wfc_call_status_len = sizeof(ind_msg->wfc_call_active);
  1961. req->wfc_call_status[0] = ind_msg->wfc_call_active;
  1962. /* wfc_call_active is mandatory in IMS indication */
  1963. req->wfc_call_active_valid = 1;
  1964. req->wfc_call_active = ind_msg->wfc_call_active;
  1965. req->all_wfc_calls_held_valid = ind_msg->all_wfc_calls_held_valid;
  1966. req->all_wfc_calls_held = ind_msg->all_wfc_calls_held;
  1967. req->is_wfc_emergency_valid = ind_msg->is_wfc_emergency_valid;
  1968. req->is_wfc_emergency = ind_msg->is_wfc_emergency;
  1969. req->twt_ims_start_valid = ind_msg->twt_ims_start_valid;
  1970. req->twt_ims_start = ind_msg->twt_ims_start;
  1971. req->twt_ims_int_valid = ind_msg->twt_ims_int_valid;
  1972. req->twt_ims_int = ind_msg->twt_ims_int;
  1973. req->media_quality_valid = ind_msg->media_quality_valid;
  1974. req->media_quality =
  1975. (enum wlfw_wfc_media_quality_v01)ind_msg->media_quality;
  1976. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  1977. plat_priv->driver_state);
  1978. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1979. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  1980. if (ret < 0) {
  1981. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  1982. ret);
  1983. goto out;
  1984. }
  1985. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1986. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  1987. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  1988. wlfw_wfc_call_status_req_msg_v01_ei, req);
  1989. if (ret < 0) {
  1990. qmi_txn_cancel(&txn);
  1991. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  1992. ret);
  1993. goto out;
  1994. }
  1995. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1996. if (ret < 0) {
  1997. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  1998. ret);
  1999. goto out;
  2000. }
  2001. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2002. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  2003. resp->resp.result, resp->resp.error);
  2004. ret = -resp->resp.result;
  2005. goto out;
  2006. }
  2007. ret = 0;
  2008. out:
  2009. kfree(req);
  2010. kfree(resp);
  2011. return ret;
  2012. }
  2013. int cnss_wlfw_dynamic_feature_mask_send_sync(struct cnss_plat_data *plat_priv)
  2014. {
  2015. struct wlfw_dynamic_feature_mask_req_msg_v01 *req;
  2016. struct wlfw_dynamic_feature_mask_resp_msg_v01 *resp;
  2017. struct qmi_txn txn;
  2018. int ret = 0;
  2019. cnss_pr_dbg("Sending dynamic feature mask 0x%llx, state: 0x%lx\n",
  2020. plat_priv->dynamic_feature,
  2021. plat_priv->driver_state);
  2022. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2023. if (!req)
  2024. return -ENOMEM;
  2025. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2026. if (!resp) {
  2027. kfree(req);
  2028. return -ENOMEM;
  2029. }
  2030. req->mask_valid = 1;
  2031. req->mask = plat_priv->dynamic_feature;
  2032. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2033. wlfw_dynamic_feature_mask_resp_msg_v01_ei, resp);
  2034. if (ret < 0) {
  2035. cnss_pr_err("Fail to initialize txn for dynamic feature mask request: err %d\n",
  2036. ret);
  2037. goto out;
  2038. }
  2039. ret = qmi_send_request
  2040. (&plat_priv->qmi_wlfw, NULL, &txn,
  2041. QMI_WLFW_DYNAMIC_FEATURE_MASK_REQ_V01,
  2042. WLFW_DYNAMIC_FEATURE_MASK_REQ_MSG_V01_MAX_MSG_LEN,
  2043. wlfw_dynamic_feature_mask_req_msg_v01_ei, req);
  2044. if (ret < 0) {
  2045. qmi_txn_cancel(&txn);
  2046. cnss_pr_err("Fail to send dynamic feature mask request: err %d\n",
  2047. ret);
  2048. goto out;
  2049. }
  2050. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2051. if (ret < 0) {
  2052. cnss_pr_err("Fail to wait for response of dynamic feature mask request, err %d\n",
  2053. ret);
  2054. goto out;
  2055. }
  2056. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2057. cnss_pr_err("Dynamic feature mask request failed, result: %d, err: %d\n",
  2058. resp->resp.result, resp->resp.error);
  2059. ret = -resp->resp.result;
  2060. goto out;
  2061. }
  2062. out:
  2063. kfree(req);
  2064. kfree(resp);
  2065. return ret;
  2066. }
  2067. int cnss_wlfw_get_info_send_sync(struct cnss_plat_data *plat_priv, int type,
  2068. void *cmd, int cmd_len)
  2069. {
  2070. struct wlfw_get_info_req_msg_v01 *req;
  2071. struct wlfw_get_info_resp_msg_v01 *resp;
  2072. struct qmi_txn txn;
  2073. int ret = 0;
  2074. cnss_pr_buf("Sending get info message, type: %d, cmd length: %d, state: 0x%lx\n",
  2075. type, cmd_len, plat_priv->driver_state);
  2076. if (cmd_len > QMI_WLFW_MAX_DATA_SIZE_V01)
  2077. return -EINVAL;
  2078. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2079. if (!req)
  2080. return -ENOMEM;
  2081. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2082. if (!resp) {
  2083. kfree(req);
  2084. return -ENOMEM;
  2085. }
  2086. req->type = type;
  2087. req->data_len = cmd_len;
  2088. memcpy(req->data, cmd, req->data_len);
  2089. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2090. wlfw_get_info_resp_msg_v01_ei, resp);
  2091. if (ret < 0) {
  2092. cnss_pr_err("Failed to initialize txn for get info request, err: %d\n",
  2093. ret);
  2094. goto out;
  2095. }
  2096. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2097. QMI_WLFW_GET_INFO_REQ_V01,
  2098. WLFW_GET_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  2099. wlfw_get_info_req_msg_v01_ei, req);
  2100. if (ret < 0) {
  2101. qmi_txn_cancel(&txn);
  2102. cnss_pr_err("Failed to send get info request, err: %d\n",
  2103. ret);
  2104. goto out;
  2105. }
  2106. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2107. if (ret < 0) {
  2108. cnss_pr_err("Failed to wait for response of get info request, err: %d\n",
  2109. ret);
  2110. goto out;
  2111. }
  2112. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2113. cnss_pr_err("Get info request failed, result: %d, err: %d\n",
  2114. resp->resp.result, resp->resp.error);
  2115. ret = -resp->resp.result;
  2116. goto out;
  2117. }
  2118. kfree(req);
  2119. kfree(resp);
  2120. return 0;
  2121. out:
  2122. kfree(req);
  2123. kfree(resp);
  2124. return ret;
  2125. }
  2126. unsigned int cnss_get_qmi_timeout(struct cnss_plat_data *plat_priv)
  2127. {
  2128. return QMI_WLFW_TIMEOUT_MS;
  2129. }
  2130. static void cnss_wlfw_request_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2131. struct sockaddr_qrtr *sq,
  2132. struct qmi_txn *txn, const void *data)
  2133. {
  2134. struct cnss_plat_data *plat_priv =
  2135. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2136. const struct wlfw_request_mem_ind_msg_v01 *ind_msg = data;
  2137. int i;
  2138. cnss_pr_dbg("Received QMI WLFW request memory indication\n");
  2139. if (!txn) {
  2140. cnss_pr_err("Spurious indication\n");
  2141. return;
  2142. }
  2143. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  2144. cnss_pr_err("Invalid seg len %u\n", ind_msg->mem_seg_len);
  2145. return;
  2146. }
  2147. plat_priv->fw_mem_seg_len = ind_msg->mem_seg_len;
  2148. for (i = 0; i < plat_priv->fw_mem_seg_len; i++) {
  2149. cnss_pr_dbg("FW requests for memory, size: 0x%x, type: %u\n",
  2150. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2151. plat_priv->fw_mem[i].type = ind_msg->mem_seg[i].type;
  2152. plat_priv->fw_mem[i].size = ind_msg->mem_seg[i].size;
  2153. if (!plat_priv->fw_mem[i].va &&
  2154. plat_priv->fw_mem[i].type == CNSS_MEM_TYPE_DDR)
  2155. plat_priv->fw_mem[i].attrs |=
  2156. DMA_ATTR_FORCE_CONTIGUOUS;
  2157. if (plat_priv->fw_mem[i].type == CNSS_MEM_CAL_V01)
  2158. plat_priv->cal_mem = &plat_priv->fw_mem[i];
  2159. }
  2160. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_REQUEST_MEM,
  2161. 0, NULL);
  2162. }
  2163. static void cnss_wlfw_fw_mem_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2164. struct sockaddr_qrtr *sq,
  2165. struct qmi_txn *txn, const void *data)
  2166. {
  2167. struct cnss_plat_data *plat_priv =
  2168. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2169. cnss_pr_dbg("Received QMI WLFW FW memory ready indication\n");
  2170. if (!txn) {
  2171. cnss_pr_err("Spurious indication\n");
  2172. return;
  2173. }
  2174. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_READY,
  2175. 0, NULL);
  2176. }
  2177. /**
  2178. * cnss_wlfw_fw_ready_ind_cb: FW ready indication handler (Helium arch)
  2179. *
  2180. * This event is not required for HST/ HSP as FW calibration done is
  2181. * provided in QMI_WLFW_CAL_DONE_IND_V01
  2182. */
  2183. static void cnss_wlfw_fw_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2184. struct sockaddr_qrtr *sq,
  2185. struct qmi_txn *txn, const void *data)
  2186. {
  2187. struct cnss_plat_data *plat_priv =
  2188. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2189. struct cnss_cal_info *cal_info;
  2190. if (!txn) {
  2191. cnss_pr_err("Spurious indication\n");
  2192. return;
  2193. }
  2194. if (plat_priv->device_id == QCA6390_DEVICE_ID ||
  2195. plat_priv->device_id == QCA6490_DEVICE_ID) {
  2196. cnss_pr_dbg("Ignore FW Ready Indication for HST/HSP");
  2197. return;
  2198. }
  2199. cnss_pr_dbg("Received QMI WLFW FW ready indication.\n");
  2200. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2201. if (!cal_info)
  2202. return;
  2203. cal_info->cal_status = CNSS_CAL_DONE;
  2204. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2205. 0, cal_info);
  2206. }
  2207. static void cnss_wlfw_fw_init_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2208. struct sockaddr_qrtr *sq,
  2209. struct qmi_txn *txn, const void *data)
  2210. {
  2211. struct cnss_plat_data *plat_priv =
  2212. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2213. cnss_pr_dbg("Received QMI WLFW FW initialization done indication\n");
  2214. if (!txn) {
  2215. cnss_pr_err("Spurious indication\n");
  2216. return;
  2217. }
  2218. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_READY, 0, NULL);
  2219. }
  2220. static void cnss_wlfw_pin_result_ind_cb(struct qmi_handle *qmi_wlfw,
  2221. struct sockaddr_qrtr *sq,
  2222. struct qmi_txn *txn, const void *data)
  2223. {
  2224. struct cnss_plat_data *plat_priv =
  2225. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2226. const struct wlfw_pin_connect_result_ind_msg_v01 *ind_msg = data;
  2227. cnss_pr_dbg("Received QMI WLFW pin connect result indication\n");
  2228. if (!txn) {
  2229. cnss_pr_err("Spurious indication\n");
  2230. return;
  2231. }
  2232. if (ind_msg->pwr_pin_result_valid)
  2233. plat_priv->pin_result.fw_pwr_pin_result =
  2234. ind_msg->pwr_pin_result;
  2235. if (ind_msg->phy_io_pin_result_valid)
  2236. plat_priv->pin_result.fw_phy_io_pin_result =
  2237. ind_msg->phy_io_pin_result;
  2238. if (ind_msg->rf_pin_result_valid)
  2239. plat_priv->pin_result.fw_rf_pin_result = ind_msg->rf_pin_result;
  2240. cnss_pr_dbg("Pin connect Result: pwr_pin: 0x%x phy_io_pin: 0x%x rf_io_pin: 0x%x\n",
  2241. ind_msg->pwr_pin_result, ind_msg->phy_io_pin_result,
  2242. ind_msg->rf_pin_result);
  2243. }
  2244. int cnss_wlfw_cal_report_req_send_sync(struct cnss_plat_data *plat_priv,
  2245. u32 cal_file_download_size)
  2246. {
  2247. struct wlfw_cal_report_req_msg_v01 req = {0};
  2248. struct wlfw_cal_report_resp_msg_v01 resp = {0};
  2249. struct qmi_txn txn;
  2250. int ret = 0;
  2251. cnss_pr_dbg("Sending cal file report request. File size: %d, state: 0x%lx\n",
  2252. cal_file_download_size, plat_priv->driver_state);
  2253. req.cal_file_download_size_valid = 1;
  2254. req.cal_file_download_size = cal_file_download_size;
  2255. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2256. wlfw_cal_report_resp_msg_v01_ei, &resp);
  2257. if (ret < 0) {
  2258. cnss_pr_err("Failed to initialize txn for Cal Report request, err: %d\n",
  2259. ret);
  2260. goto out;
  2261. }
  2262. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2263. QMI_WLFW_CAL_REPORT_REQ_V01,
  2264. WLFW_CAL_REPORT_REQ_MSG_V01_MAX_MSG_LEN,
  2265. wlfw_cal_report_req_msg_v01_ei, &req);
  2266. if (ret < 0) {
  2267. qmi_txn_cancel(&txn);
  2268. cnss_pr_err("Failed to send Cal Report request, err: %d\n",
  2269. ret);
  2270. goto out;
  2271. }
  2272. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2273. if (ret < 0) {
  2274. cnss_pr_err("Failed to wait for response of Cal Report request, err: %d\n",
  2275. ret);
  2276. goto out;
  2277. }
  2278. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2279. cnss_pr_err("Cal Report request failed, result: %d, err: %d\n",
  2280. resp.resp.result, resp.resp.error);
  2281. ret = -resp.resp.result;
  2282. goto out;
  2283. }
  2284. out:
  2285. return ret;
  2286. }
  2287. static void cnss_wlfw_cal_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2288. struct sockaddr_qrtr *sq,
  2289. struct qmi_txn *txn, const void *data)
  2290. {
  2291. struct cnss_plat_data *plat_priv =
  2292. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2293. const struct wlfw_cal_done_ind_msg_v01 *ind = data;
  2294. struct cnss_cal_info *cal_info;
  2295. cnss_pr_dbg("Received Cal done indication. File size: %d\n",
  2296. ind->cal_file_upload_size);
  2297. cnss_pr_info("Calibration took %d ms\n",
  2298. jiffies_to_msecs(jiffies - plat_priv->cal_time));
  2299. if (!txn) {
  2300. cnss_pr_err("Spurious indication\n");
  2301. return;
  2302. }
  2303. if (ind->cal_file_upload_size_valid)
  2304. plat_priv->cal_file_size = ind->cal_file_upload_size;
  2305. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2306. if (!cal_info)
  2307. return;
  2308. cal_info->cal_status = CNSS_CAL_DONE;
  2309. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2310. 0, cal_info);
  2311. }
  2312. static void cnss_wlfw_qdss_trace_req_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2313. struct sockaddr_qrtr *sq,
  2314. struct qmi_txn *txn,
  2315. const void *data)
  2316. {
  2317. struct cnss_plat_data *plat_priv =
  2318. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2319. const struct wlfw_qdss_trace_req_mem_ind_msg_v01 *ind_msg = data;
  2320. int i;
  2321. cnss_pr_dbg("Received QMI WLFW QDSS trace request mem indication\n");
  2322. if (!txn) {
  2323. cnss_pr_err("Spurious indication\n");
  2324. return;
  2325. }
  2326. if (plat_priv->qdss_mem_seg_len) {
  2327. cnss_pr_err("Ignore double allocation for QDSS trace, current len %u\n",
  2328. plat_priv->qdss_mem_seg_len);
  2329. return;
  2330. }
  2331. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  2332. cnss_pr_err("Invalid seg len %u\n", ind_msg->mem_seg_len);
  2333. return;
  2334. }
  2335. plat_priv->qdss_mem_seg_len = ind_msg->mem_seg_len;
  2336. for (i = 0; i < plat_priv->qdss_mem_seg_len; i++) {
  2337. cnss_pr_dbg("QDSS requests for memory, size: 0x%x, type: %u\n",
  2338. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2339. plat_priv->qdss_mem[i].type = ind_msg->mem_seg[i].type;
  2340. plat_priv->qdss_mem[i].size = ind_msg->mem_seg[i].size;
  2341. }
  2342. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM,
  2343. 0, NULL);
  2344. }
  2345. /**
  2346. * cnss_wlfw_fw_mem_file_save_ind_cb: Save given FW mem to filesystem
  2347. *
  2348. * QDSS_TRACE_SAVE_IND feature is overloaded to provide any host allocated
  2349. * fw memory segment for dumping to file system. Only one type of mem can be
  2350. * saved per indication and is provided in mem seg index 0.
  2351. *
  2352. * Return: None
  2353. */
  2354. static void cnss_wlfw_fw_mem_file_save_ind_cb(struct qmi_handle *qmi_wlfw,
  2355. struct sockaddr_qrtr *sq,
  2356. struct qmi_txn *txn,
  2357. const void *data)
  2358. {
  2359. struct cnss_plat_data *plat_priv =
  2360. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2361. const struct wlfw_qdss_trace_save_ind_msg_v01 *ind_msg = data;
  2362. struct cnss_qmi_event_fw_mem_file_save_data *event_data;
  2363. int i = 0;
  2364. if (!txn || !data) {
  2365. cnss_pr_err("Spurious indication\n");
  2366. return;
  2367. }
  2368. cnss_pr_dbg("QMI fw_mem_file_save: source: %d mem_seg: %d type: %u len: %u\n",
  2369. ind_msg->source, ind_msg->mem_seg_valid,
  2370. ind_msg->mem_seg[0].type, ind_msg->mem_seg_len);
  2371. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2372. if (!event_data)
  2373. return;
  2374. event_data->mem_type = ind_msg->mem_seg[0].type;
  2375. event_data->mem_seg_len = ind_msg->mem_seg_len;
  2376. event_data->total_size = ind_msg->total_size;
  2377. if (ind_msg->mem_seg_valid) {
  2378. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_STR_LEN_V01) {
  2379. cnss_pr_err("Invalid seg len indication\n");
  2380. goto free_event_data;
  2381. }
  2382. for (i = 0; i < ind_msg->mem_seg_len; i++) {
  2383. event_data->mem_seg[i].addr = ind_msg->mem_seg[i].addr;
  2384. event_data->mem_seg[i].size = ind_msg->mem_seg[i].size;
  2385. if (event_data->mem_type != ind_msg->mem_seg[i].type) {
  2386. cnss_pr_err("FW Mem file save ind cannot have multiple mem types\n");
  2387. goto free_event_data;
  2388. }
  2389. cnss_pr_dbg("seg-%d: addr 0x%llx size 0x%x\n",
  2390. i, ind_msg->mem_seg[i].addr,
  2391. ind_msg->mem_seg[i].size);
  2392. }
  2393. }
  2394. if (ind_msg->file_name_valid)
  2395. strlcpy(event_data->file_name, ind_msg->file_name,
  2396. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2397. if (ind_msg->source == 1) {
  2398. if (!ind_msg->file_name_valid)
  2399. strlcpy(event_data->file_name, "qdss_trace_wcss_etb",
  2400. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2401. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA,
  2402. 0, event_data);
  2403. } else {
  2404. if (event_data->mem_type == QMI_WLFW_MEM_QDSS_V01) {
  2405. if (!ind_msg->file_name_valid)
  2406. strlcpy(event_data->file_name, "qdss_trace_ddr",
  2407. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2408. } else {
  2409. if (!ind_msg->file_name_valid)
  2410. strlcpy(event_data->file_name, "fw_mem_dump",
  2411. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2412. }
  2413. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE,
  2414. 0, event_data);
  2415. }
  2416. return;
  2417. free_event_data:
  2418. kfree(event_data);
  2419. }
  2420. static void cnss_wlfw_qdss_trace_free_ind_cb(struct qmi_handle *qmi_wlfw,
  2421. struct sockaddr_qrtr *sq,
  2422. struct qmi_txn *txn,
  2423. const void *data)
  2424. {
  2425. struct cnss_plat_data *plat_priv =
  2426. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2427. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_FREE,
  2428. 0, NULL);
  2429. }
  2430. static void cnss_wlfw_respond_get_info_ind_cb(struct qmi_handle *qmi_wlfw,
  2431. struct sockaddr_qrtr *sq,
  2432. struct qmi_txn *txn,
  2433. const void *data)
  2434. {
  2435. struct cnss_plat_data *plat_priv =
  2436. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2437. const struct wlfw_respond_get_info_ind_msg_v01 *ind_msg = data;
  2438. cnss_pr_buf("Received QMI WLFW respond get info indication\n");
  2439. if (!txn) {
  2440. cnss_pr_err("Spurious indication\n");
  2441. return;
  2442. }
  2443. cnss_pr_buf("Extract message with event length: %d, type: %d, is last: %d, seq no: %d\n",
  2444. ind_msg->data_len, ind_msg->type,
  2445. ind_msg->is_last, ind_msg->seq_no);
  2446. if (plat_priv->get_info_cb_ctx && plat_priv->get_info_cb)
  2447. plat_priv->get_info_cb(plat_priv->get_info_cb_ctx,
  2448. (void *)ind_msg->data,
  2449. ind_msg->data_len);
  2450. }
  2451. static int cnss_ims_wfc_call_twt_cfg_send_sync
  2452. (struct cnss_plat_data *plat_priv,
  2453. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg)
  2454. {
  2455. struct ims_private_service_wfc_call_twt_config_req_msg_v01 *req;
  2456. struct ims_private_service_wfc_call_twt_config_rsp_msg_v01 *resp;
  2457. struct qmi_txn txn;
  2458. int ret = 0;
  2459. if (!test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  2460. cnss_pr_err("Drop FW WFC indication as IMS QMI not connected\n");
  2461. return -EINVAL;
  2462. }
  2463. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2464. if (!req)
  2465. return -ENOMEM;
  2466. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2467. if (!resp) {
  2468. kfree(req);
  2469. return -ENOMEM;
  2470. }
  2471. req->twt_sta_start_valid = ind_msg->twt_sta_start_valid;
  2472. req->twt_sta_start = ind_msg->twt_sta_start;
  2473. req->twt_sta_int_valid = ind_msg->twt_sta_int_valid;
  2474. req->twt_sta_int = ind_msg->twt_sta_int;
  2475. req->twt_sta_upo_valid = ind_msg->twt_sta_upo_valid;
  2476. req->twt_sta_upo = ind_msg->twt_sta_upo;
  2477. req->twt_sta_sp_valid = ind_msg->twt_sta_sp_valid;
  2478. req->twt_sta_sp = ind_msg->twt_sta_sp;
  2479. req->twt_sta_dl_valid = req->twt_sta_dl_valid;
  2480. req->twt_sta_dl = req->twt_sta_dl;
  2481. req->twt_sta_config_changed_valid =
  2482. ind_msg->twt_sta_config_changed_valid;
  2483. req->twt_sta_config_changed = ind_msg->twt_sta_config_changed;
  2484. cnss_pr_dbg("CNSS->IMS: TWT_CFG_REQ: state: 0x%lx\n",
  2485. plat_priv->driver_state);
  2486. ret =
  2487. qmi_txn_init(&plat_priv->ims_qmi, &txn,
  2488. ims_private_service_wfc_call_twt_config_rsp_msg_v01_ei,
  2489. resp);
  2490. if (ret < 0) {
  2491. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Txn Init Err: %d\n",
  2492. ret);
  2493. goto out;
  2494. }
  2495. ret =
  2496. qmi_send_request(&plat_priv->ims_qmi, NULL, &txn,
  2497. QMI_IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_V01,
  2498. IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_MSG_V01_MAX_MSG_LEN,
  2499. ims_private_service_wfc_call_twt_config_req_msg_v01_ei, req);
  2500. if (ret < 0) {
  2501. qmi_txn_cancel(&txn);
  2502. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Send Err: %d\n", ret);
  2503. goto out;
  2504. }
  2505. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2506. if (ret < 0) {
  2507. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: QMI Wait Err: %d\n", ret);
  2508. goto out;
  2509. }
  2510. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2511. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: Result: %d Err: %d\n",
  2512. resp->resp.result, resp->resp.error);
  2513. ret = -resp->resp.result;
  2514. goto out;
  2515. }
  2516. ret = 0;
  2517. out:
  2518. kfree(req);
  2519. kfree(resp);
  2520. return ret;
  2521. }
  2522. int cnss_process_twt_cfg_ind_event(struct cnss_plat_data *plat_priv,
  2523. void *data)
  2524. {
  2525. int ret;
  2526. struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2527. ret = cnss_ims_wfc_call_twt_cfg_send_sync(plat_priv, ind_msg);
  2528. kfree(data);
  2529. return ret;
  2530. }
  2531. static void cnss_wlfw_process_twt_cfg_ind(struct qmi_handle *qmi_wlfw,
  2532. struct sockaddr_qrtr *sq,
  2533. struct qmi_txn *txn,
  2534. const void *data)
  2535. {
  2536. struct cnss_plat_data *plat_priv =
  2537. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2538. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2539. struct wlfw_wfc_call_twt_config_ind_msg_v01 *event_data;
  2540. if (!txn) {
  2541. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Spurious indication\n");
  2542. return;
  2543. }
  2544. if (!ind_msg) {
  2545. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Invalid indication\n");
  2546. return;
  2547. }
  2548. cnss_pr_dbg("FW->CNSS: TWT_CFG_IND: %x %llx, %x %x, %x %x, %x %x, %x %x, %x %x\n",
  2549. ind_msg->twt_sta_start_valid, ind_msg->twt_sta_start,
  2550. ind_msg->twt_sta_int_valid, ind_msg->twt_sta_int,
  2551. ind_msg->twt_sta_upo_valid, ind_msg->twt_sta_upo,
  2552. ind_msg->twt_sta_sp_valid, ind_msg->twt_sta_sp,
  2553. ind_msg->twt_sta_dl_valid, ind_msg->twt_sta_dl,
  2554. ind_msg->twt_sta_config_changed_valid,
  2555. ind_msg->twt_sta_config_changed);
  2556. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  2557. if (!event_data)
  2558. return;
  2559. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND, 0,
  2560. event_data);
  2561. }
  2562. static struct qmi_msg_handler qmi_wlfw_msg_handlers[] = {
  2563. {
  2564. .type = QMI_INDICATION,
  2565. .msg_id = QMI_WLFW_REQUEST_MEM_IND_V01,
  2566. .ei = wlfw_request_mem_ind_msg_v01_ei,
  2567. .decoded_size = sizeof(struct wlfw_request_mem_ind_msg_v01),
  2568. .fn = cnss_wlfw_request_mem_ind_cb
  2569. },
  2570. {
  2571. .type = QMI_INDICATION,
  2572. .msg_id = QMI_WLFW_FW_MEM_READY_IND_V01,
  2573. .ei = wlfw_fw_mem_ready_ind_msg_v01_ei,
  2574. .decoded_size = sizeof(struct wlfw_fw_mem_ready_ind_msg_v01),
  2575. .fn = cnss_wlfw_fw_mem_ready_ind_cb
  2576. },
  2577. {
  2578. .type = QMI_INDICATION,
  2579. .msg_id = QMI_WLFW_FW_READY_IND_V01,
  2580. .ei = wlfw_fw_ready_ind_msg_v01_ei,
  2581. .decoded_size = sizeof(struct wlfw_fw_ready_ind_msg_v01),
  2582. .fn = cnss_wlfw_fw_ready_ind_cb
  2583. },
  2584. {
  2585. .type = QMI_INDICATION,
  2586. .msg_id = QMI_WLFW_FW_INIT_DONE_IND_V01,
  2587. .ei = wlfw_fw_init_done_ind_msg_v01_ei,
  2588. .decoded_size = sizeof(struct wlfw_fw_init_done_ind_msg_v01),
  2589. .fn = cnss_wlfw_fw_init_done_ind_cb
  2590. },
  2591. {
  2592. .type = QMI_INDICATION,
  2593. .msg_id = QMI_WLFW_PIN_CONNECT_RESULT_IND_V01,
  2594. .ei = wlfw_pin_connect_result_ind_msg_v01_ei,
  2595. .decoded_size =
  2596. sizeof(struct wlfw_pin_connect_result_ind_msg_v01),
  2597. .fn = cnss_wlfw_pin_result_ind_cb
  2598. },
  2599. {
  2600. .type = QMI_INDICATION,
  2601. .msg_id = QMI_WLFW_CAL_DONE_IND_V01,
  2602. .ei = wlfw_cal_done_ind_msg_v01_ei,
  2603. .decoded_size = sizeof(struct wlfw_cal_done_ind_msg_v01),
  2604. .fn = cnss_wlfw_cal_done_ind_cb
  2605. },
  2606. {
  2607. .type = QMI_INDICATION,
  2608. .msg_id = QMI_WLFW_QDSS_TRACE_REQ_MEM_IND_V01,
  2609. .ei = wlfw_qdss_trace_req_mem_ind_msg_v01_ei,
  2610. .decoded_size =
  2611. sizeof(struct wlfw_qdss_trace_req_mem_ind_msg_v01),
  2612. .fn = cnss_wlfw_qdss_trace_req_mem_ind_cb
  2613. },
  2614. {
  2615. .type = QMI_INDICATION,
  2616. .msg_id = QMI_WLFW_QDSS_TRACE_SAVE_IND_V01,
  2617. .ei = wlfw_qdss_trace_save_ind_msg_v01_ei,
  2618. .decoded_size =
  2619. sizeof(struct wlfw_qdss_trace_save_ind_msg_v01),
  2620. .fn = cnss_wlfw_fw_mem_file_save_ind_cb
  2621. },
  2622. {
  2623. .type = QMI_INDICATION,
  2624. .msg_id = QMI_WLFW_QDSS_TRACE_FREE_IND_V01,
  2625. .ei = wlfw_qdss_trace_free_ind_msg_v01_ei,
  2626. .decoded_size =
  2627. sizeof(struct wlfw_qdss_trace_free_ind_msg_v01),
  2628. .fn = cnss_wlfw_qdss_trace_free_ind_cb
  2629. },
  2630. {
  2631. .type = QMI_INDICATION,
  2632. .msg_id = QMI_WLFW_RESPOND_GET_INFO_IND_V01,
  2633. .ei = wlfw_respond_get_info_ind_msg_v01_ei,
  2634. .decoded_size =
  2635. sizeof(struct wlfw_respond_get_info_ind_msg_v01),
  2636. .fn = cnss_wlfw_respond_get_info_ind_cb
  2637. },
  2638. {
  2639. .type = QMI_INDICATION,
  2640. .msg_id = QMI_WLFW_WFC_CALL_TWT_CONFIG_IND_V01,
  2641. .ei = wlfw_wfc_call_twt_config_ind_msg_v01_ei,
  2642. .decoded_size =
  2643. sizeof(struct wlfw_wfc_call_twt_config_ind_msg_v01),
  2644. .fn = cnss_wlfw_process_twt_cfg_ind
  2645. },
  2646. {}
  2647. };
  2648. static int cnss_wlfw_connect_to_server(struct cnss_plat_data *plat_priv,
  2649. void *data)
  2650. {
  2651. struct cnss_qmi_event_server_arrive_data *event_data = data;
  2652. struct qmi_handle *qmi_wlfw = &plat_priv->qmi_wlfw;
  2653. struct sockaddr_qrtr sq = { 0 };
  2654. int ret = 0;
  2655. if (!event_data)
  2656. return -EINVAL;
  2657. sq.sq_family = AF_QIPCRTR;
  2658. sq.sq_node = event_data->node;
  2659. sq.sq_port = event_data->port;
  2660. ret = kernel_connect(qmi_wlfw->sock, (struct sockaddr *)&sq,
  2661. sizeof(sq), 0);
  2662. if (ret < 0) {
  2663. cnss_pr_err("Failed to connect to QMI WLFW remote service port\n");
  2664. goto out;
  2665. }
  2666. set_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2667. cnss_pr_info("QMI WLFW service connected, state: 0x%lx\n",
  2668. plat_priv->driver_state);
  2669. kfree(data);
  2670. return 0;
  2671. out:
  2672. CNSS_QMI_ASSERT();
  2673. kfree(data);
  2674. return ret;
  2675. }
  2676. int cnss_wlfw_server_arrive(struct cnss_plat_data *plat_priv, void *data)
  2677. {
  2678. int ret = 0;
  2679. if (!plat_priv)
  2680. return -ENODEV;
  2681. if (test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state)) {
  2682. cnss_pr_err("Unexpected WLFW server arrive\n");
  2683. CNSS_ASSERT(0);
  2684. return -EINVAL;
  2685. }
  2686. cnss_ignore_qmi_failure(false);
  2687. ret = cnss_wlfw_connect_to_server(plat_priv, data);
  2688. if (ret < 0)
  2689. goto out;
  2690. ret = cnss_wlfw_ind_register_send_sync(plat_priv);
  2691. if (ret < 0) {
  2692. if (ret == -EALREADY)
  2693. ret = 0;
  2694. goto out;
  2695. }
  2696. ret = cnss_wlfw_host_cap_send_sync(plat_priv);
  2697. if (ret < 0)
  2698. goto out;
  2699. return 0;
  2700. out:
  2701. return ret;
  2702. }
  2703. int cnss_wlfw_server_exit(struct cnss_plat_data *plat_priv)
  2704. {
  2705. int ret;
  2706. if (!plat_priv)
  2707. return -ENODEV;
  2708. clear_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2709. cnss_pr_info("QMI WLFW service disconnected, state: 0x%lx\n",
  2710. plat_priv->driver_state);
  2711. cnss_qmi_deinit(plat_priv);
  2712. clear_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2713. ret = cnss_qmi_init(plat_priv);
  2714. if (ret < 0) {
  2715. cnss_pr_err("QMI WLFW service registraton failed, ret\n", ret);
  2716. CNSS_ASSERT(0);
  2717. }
  2718. return 0;
  2719. }
  2720. static int wlfw_new_server(struct qmi_handle *qmi_wlfw,
  2721. struct qmi_service *service)
  2722. {
  2723. struct cnss_plat_data *plat_priv =
  2724. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2725. struct cnss_qmi_event_server_arrive_data *event_data;
  2726. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2727. cnss_pr_info("WLFW server delete in progress, Ignore server arrive, state: 0x%lx\n",
  2728. plat_priv->driver_state);
  2729. return 0;
  2730. }
  2731. cnss_pr_dbg("WLFW server arriving: node %u port %u\n",
  2732. service->node, service->port);
  2733. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2734. if (!event_data)
  2735. return -ENOMEM;
  2736. event_data->node = service->node;
  2737. event_data->port = service->port;
  2738. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_ARRIVE,
  2739. 0, event_data);
  2740. return 0;
  2741. }
  2742. static void wlfw_del_server(struct qmi_handle *qmi_wlfw,
  2743. struct qmi_service *service)
  2744. {
  2745. struct cnss_plat_data *plat_priv =
  2746. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2747. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2748. cnss_pr_info("WLFW server delete in progress, Ignore server delete, state: 0x%lx\n",
  2749. plat_priv->driver_state);
  2750. return;
  2751. }
  2752. cnss_pr_dbg("WLFW server exiting\n");
  2753. if (plat_priv) {
  2754. cnss_ignore_qmi_failure(true);
  2755. set_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2756. }
  2757. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_EXIT,
  2758. 0, NULL);
  2759. }
  2760. static struct qmi_ops qmi_wlfw_ops = {
  2761. .new_server = wlfw_new_server,
  2762. .del_server = wlfw_del_server,
  2763. };
  2764. static int cnss_qmi_add_lookup(struct cnss_plat_data *plat_priv)
  2765. {
  2766. unsigned int id = WLFW_SERVICE_INS_ID_V01;
  2767. /* In order to support dual wlan card attach case,
  2768. * need separate qmi service instance id for each dev
  2769. */
  2770. if (cnss_is_dual_wlan_enabled() && plat_priv->qrtr_node_id != 0 &&
  2771. plat_priv->wlfw_service_instance_id != 0)
  2772. id = plat_priv->wlfw_service_instance_id;
  2773. return qmi_add_lookup(&plat_priv->qmi_wlfw, WLFW_SERVICE_ID_V01,
  2774. WLFW_SERVICE_VERS_V01, id);
  2775. }
  2776. int cnss_qmi_init(struct cnss_plat_data *plat_priv)
  2777. {
  2778. int ret = 0;
  2779. cnss_get_qrtr_info(plat_priv);
  2780. ret = qmi_handle_init(&plat_priv->qmi_wlfw,
  2781. QMI_WLFW_MAX_RECV_BUF_SIZE,
  2782. &qmi_wlfw_ops, qmi_wlfw_msg_handlers);
  2783. if (ret < 0) {
  2784. cnss_pr_err("Failed to initialize WLFW QMI handle, err: %d\n",
  2785. ret);
  2786. goto out;
  2787. }
  2788. ret = cnss_qmi_add_lookup(plat_priv);
  2789. if (ret < 0)
  2790. cnss_pr_err("Failed to add WLFW QMI lookup, err: %d\n", ret);
  2791. out:
  2792. return ret;
  2793. }
  2794. void cnss_qmi_deinit(struct cnss_plat_data *plat_priv)
  2795. {
  2796. qmi_handle_release(&plat_priv->qmi_wlfw);
  2797. }
  2798. int cnss_qmi_get_dms_mac(struct cnss_plat_data *plat_priv)
  2799. {
  2800. struct dms_get_mac_address_req_msg_v01 req;
  2801. struct dms_get_mac_address_resp_msg_v01 resp;
  2802. struct qmi_txn txn;
  2803. int ret = 0;
  2804. if (!test_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state)) {
  2805. cnss_pr_err("DMS QMI connection not established\n");
  2806. return -EINVAL;
  2807. }
  2808. cnss_pr_dbg("Requesting DMS MAC address");
  2809. memset(&resp, 0, sizeof(resp));
  2810. ret = qmi_txn_init(&plat_priv->qmi_dms, &txn,
  2811. dms_get_mac_address_resp_msg_v01_ei, &resp);
  2812. if (ret < 0) {
  2813. cnss_pr_err("Failed to initialize txn for dms, err: %d\n",
  2814. ret);
  2815. goto out;
  2816. }
  2817. req.device = DMS_DEVICE_MAC_WLAN_V01;
  2818. ret = qmi_send_request(&plat_priv->qmi_dms, NULL, &txn,
  2819. QMI_DMS_GET_MAC_ADDRESS_REQ_V01,
  2820. DMS_GET_MAC_ADDRESS_REQ_MSG_V01_MAX_MSG_LEN,
  2821. dms_get_mac_address_req_msg_v01_ei, &req);
  2822. if (ret < 0) {
  2823. qmi_txn_cancel(&txn);
  2824. cnss_pr_err("Failed to send QMI_DMS_GET_MAC_ADDRESS_REQ_V01, err: %d\n",
  2825. ret);
  2826. goto out;
  2827. }
  2828. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2829. if (ret < 0) {
  2830. cnss_pr_err("Failed to wait for QMI_DMS_GET_MAC_ADDRESS_RESP_V01, err: %d\n",
  2831. ret);
  2832. goto out;
  2833. }
  2834. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2835. cnss_pr_err("QMI_DMS_GET_MAC_ADDRESS_REQ_V01 failed, result: %d, err: %d\n",
  2836. resp.resp.result, resp.resp.error);
  2837. ret = -resp.resp.result;
  2838. goto out;
  2839. }
  2840. if (!resp.mac_address_valid ||
  2841. resp.mac_address_len != QMI_WLFW_MAC_ADDR_SIZE_V01) {
  2842. cnss_pr_err("Invalid MAC address received from DMS\n");
  2843. plat_priv->dms.mac_valid = false;
  2844. goto out;
  2845. }
  2846. plat_priv->dms.mac_valid = true;
  2847. memcpy(plat_priv->dms.mac, resp.mac_address, QMI_WLFW_MAC_ADDR_SIZE_V01);
  2848. cnss_pr_info("Received DMS MAC: [%pM]\n", plat_priv->dms.mac);
  2849. out:
  2850. return ret;
  2851. }
  2852. static int cnss_dms_connect_to_server(struct cnss_plat_data *plat_priv,
  2853. unsigned int node, unsigned int port)
  2854. {
  2855. struct qmi_handle *qmi_dms = &plat_priv->qmi_dms;
  2856. struct sockaddr_qrtr sq = {0};
  2857. int ret = 0;
  2858. sq.sq_family = AF_QIPCRTR;
  2859. sq.sq_node = node;
  2860. sq.sq_port = port;
  2861. ret = kernel_connect(qmi_dms->sock, (struct sockaddr *)&sq,
  2862. sizeof(sq), 0);
  2863. if (ret < 0) {
  2864. cnss_pr_err("Failed to connect to QMI DMS remote service Node: %d Port: %d\n",
  2865. node, port);
  2866. goto out;
  2867. }
  2868. set_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2869. cnss_pr_info("QMI DMS service connected, state: 0x%lx\n",
  2870. plat_priv->driver_state);
  2871. out:
  2872. return ret;
  2873. }
  2874. static int dms_new_server(struct qmi_handle *qmi_dms,
  2875. struct qmi_service *service)
  2876. {
  2877. struct cnss_plat_data *plat_priv =
  2878. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2879. if (!service)
  2880. return -EINVAL;
  2881. return cnss_dms_connect_to_server(plat_priv, service->node,
  2882. service->port);
  2883. }
  2884. static void cnss_dms_server_exit_work(struct work_struct *work)
  2885. {
  2886. int ret;
  2887. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  2888. cnss_dms_deinit(plat_priv);
  2889. cnss_pr_info("QMI DMS Server Exit");
  2890. clear_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2891. ret = cnss_dms_init(plat_priv);
  2892. if (ret < 0)
  2893. cnss_pr_err("QMI DMS service registraton failed, ret\n", ret);
  2894. }
  2895. static DECLARE_WORK(cnss_dms_del_work, cnss_dms_server_exit_work);
  2896. static void dms_del_server(struct qmi_handle *qmi_dms,
  2897. struct qmi_service *service)
  2898. {
  2899. struct cnss_plat_data *plat_priv =
  2900. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2901. if (!plat_priv)
  2902. return;
  2903. if (test_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state)) {
  2904. cnss_pr_info("DMS server delete or cnss remove in progress, Ignore server delete: 0x%lx\n",
  2905. plat_priv->driver_state);
  2906. return;
  2907. }
  2908. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2909. clear_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2910. cnss_pr_info("QMI DMS service disconnected, state: 0x%lx\n",
  2911. plat_priv->driver_state);
  2912. schedule_work(&cnss_dms_del_work);
  2913. }
  2914. void cnss_cancel_dms_work(void)
  2915. {
  2916. cancel_work_sync(&cnss_dms_del_work);
  2917. }
  2918. static struct qmi_ops qmi_dms_ops = {
  2919. .new_server = dms_new_server,
  2920. .del_server = dms_del_server,
  2921. };
  2922. int cnss_dms_init(struct cnss_plat_data *plat_priv)
  2923. {
  2924. int ret = 0;
  2925. ret = qmi_handle_init(&plat_priv->qmi_dms, DMS_QMI_MAX_MSG_LEN,
  2926. &qmi_dms_ops, NULL);
  2927. if (ret < 0) {
  2928. cnss_pr_err("Failed to initialize DMS handle, err: %d\n", ret);
  2929. goto out;
  2930. }
  2931. ret = qmi_add_lookup(&plat_priv->qmi_dms, DMS_SERVICE_ID_V01,
  2932. DMS_SERVICE_VERS_V01, 0);
  2933. if (ret < 0)
  2934. cnss_pr_err("Failed to add DMS lookup, err: %d\n", ret);
  2935. out:
  2936. return ret;
  2937. }
  2938. void cnss_dms_deinit(struct cnss_plat_data *plat_priv)
  2939. {
  2940. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2941. qmi_handle_release(&plat_priv->qmi_dms);
  2942. }
  2943. int coex_antenna_switch_to_wlan_send_sync_msg(struct cnss_plat_data *plat_priv)
  2944. {
  2945. int ret;
  2946. struct coex_antenna_switch_to_wlan_req_msg_v01 *req;
  2947. struct coex_antenna_switch_to_wlan_resp_msg_v01 *resp;
  2948. struct qmi_txn txn;
  2949. if (!plat_priv)
  2950. return -ENODEV;
  2951. cnss_pr_dbg("Sending coex antenna switch_to_wlan\n");
  2952. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2953. if (!req)
  2954. return -ENOMEM;
  2955. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2956. if (!resp) {
  2957. kfree(req);
  2958. return -ENOMEM;
  2959. }
  2960. req->antenna = plat_priv->antenna;
  2961. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  2962. coex_antenna_switch_to_wlan_resp_msg_v01_ei, resp);
  2963. if (ret < 0) {
  2964. cnss_pr_err("Fail to init txn for coex antenna switch_to_wlan resp %d\n",
  2965. ret);
  2966. goto out;
  2967. }
  2968. ret = qmi_send_request
  2969. (&plat_priv->coex_qmi, NULL, &txn,
  2970. QMI_COEX_SWITCH_ANTENNA_TO_WLAN_REQ_V01,
  2971. COEX_ANTENNA_SWITCH_TO_WLAN_REQ_MSG_V01_MAX_MSG_LEN,
  2972. coex_antenna_switch_to_wlan_req_msg_v01_ei, req);
  2973. if (ret < 0) {
  2974. qmi_txn_cancel(&txn);
  2975. cnss_pr_err("Fail to send coex antenna switch_to_wlan req %d\n",
  2976. ret);
  2977. goto out;
  2978. }
  2979. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  2980. if (ret < 0) {
  2981. cnss_pr_err("Coex antenna switch_to_wlan resp wait failed with ret %d\n",
  2982. ret);
  2983. goto out;
  2984. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2985. cnss_pr_err("Coex antenna switch_to_wlan request rejected, result:%d error:%d\n",
  2986. resp->resp.result, resp->resp.error);
  2987. ret = -resp->resp.result;
  2988. goto out;
  2989. }
  2990. if (resp->grant_valid)
  2991. plat_priv->grant = resp->grant;
  2992. cnss_pr_dbg("Coex antenna grant: 0x%llx\n", resp->grant);
  2993. kfree(resp);
  2994. kfree(req);
  2995. return 0;
  2996. out:
  2997. kfree(resp);
  2998. kfree(req);
  2999. return ret;
  3000. }
  3001. int coex_antenna_switch_to_mdm_send_sync_msg(struct cnss_plat_data *plat_priv)
  3002. {
  3003. int ret;
  3004. struct coex_antenna_switch_to_mdm_req_msg_v01 *req;
  3005. struct coex_antenna_switch_to_mdm_resp_msg_v01 *resp;
  3006. struct qmi_txn txn;
  3007. if (!plat_priv)
  3008. return -ENODEV;
  3009. cnss_pr_dbg("Sending coex antenna switch_to_mdm\n");
  3010. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3011. if (!req)
  3012. return -ENOMEM;
  3013. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  3014. if (!resp) {
  3015. kfree(req);
  3016. return -ENOMEM;
  3017. }
  3018. req->antenna = plat_priv->antenna;
  3019. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  3020. coex_antenna_switch_to_mdm_resp_msg_v01_ei, resp);
  3021. if (ret < 0) {
  3022. cnss_pr_err("Fail to init txn for coex antenna switch_to_mdm resp %d\n",
  3023. ret);
  3024. goto out;
  3025. }
  3026. ret = qmi_send_request
  3027. (&plat_priv->coex_qmi, NULL, &txn,
  3028. QMI_COEX_SWITCH_ANTENNA_TO_MDM_REQ_V01,
  3029. COEX_ANTENNA_SWITCH_TO_MDM_REQ_MSG_V01_MAX_MSG_LEN,
  3030. coex_antenna_switch_to_mdm_req_msg_v01_ei, req);
  3031. if (ret < 0) {
  3032. qmi_txn_cancel(&txn);
  3033. cnss_pr_err("Fail to send coex antenna switch_to_mdm req %d\n",
  3034. ret);
  3035. goto out;
  3036. }
  3037. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  3038. if (ret < 0) {
  3039. cnss_pr_err("Coex antenna switch_to_mdm resp wait failed with ret %d\n",
  3040. ret);
  3041. goto out;
  3042. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3043. cnss_pr_err("Coex antenna switch_to_mdm request rejected, result:%d error:%d\n",
  3044. resp->resp.result, resp->resp.error);
  3045. ret = -resp->resp.result;
  3046. goto out;
  3047. }
  3048. kfree(resp);
  3049. kfree(req);
  3050. return 0;
  3051. out:
  3052. kfree(resp);
  3053. kfree(req);
  3054. return ret;
  3055. }
  3056. int cnss_send_subsys_restart_level_msg(struct cnss_plat_data *plat_priv)
  3057. {
  3058. int ret;
  3059. struct wlfw_subsys_restart_level_req_msg_v01 req;
  3060. struct wlfw_subsys_restart_level_resp_msg_v01 resp;
  3061. u8 pcss_enabled;
  3062. if (!plat_priv)
  3063. return -ENODEV;
  3064. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  3065. cnss_pr_dbg("Can't send pcss cmd before fw ready\n");
  3066. return 0;
  3067. }
  3068. pcss_enabled = plat_priv->recovery_pcss_enabled;
  3069. cnss_pr_dbg("Sending pcss recovery status: %d\n", pcss_enabled);
  3070. req.restart_level_type_valid = 1;
  3071. req.restart_level_type = pcss_enabled;
  3072. ret = qmi_send_wait(&plat_priv->qmi_wlfw, &req, &resp,
  3073. wlfw_subsys_restart_level_req_msg_v01_ei,
  3074. wlfw_subsys_restart_level_resp_msg_v01_ei,
  3075. QMI_WLFW_SUBSYS_RESTART_LEVEL_REQ_V01,
  3076. WLFW_SUBSYS_RESTART_LEVEL_REQ_MSG_V01_MAX_MSG_LEN,
  3077. QMI_WLFW_TIMEOUT_JF);
  3078. if (ret < 0)
  3079. cnss_pr_err("pcss recovery setting failed with ret %d\n", ret);
  3080. return ret;
  3081. }
  3082. static int coex_new_server(struct qmi_handle *qmi,
  3083. struct qmi_service *service)
  3084. {
  3085. struct cnss_plat_data *plat_priv =
  3086. container_of(qmi, struct cnss_plat_data, coex_qmi);
  3087. struct sockaddr_qrtr sq = { 0 };
  3088. int ret = 0;
  3089. cnss_pr_dbg("COEX server arrive: node %u port %u\n",
  3090. service->node, service->port);
  3091. sq.sq_family = AF_QIPCRTR;
  3092. sq.sq_node = service->node;
  3093. sq.sq_port = service->port;
  3094. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3095. if (ret < 0) {
  3096. cnss_pr_err("Fail to connect to remote service port\n");
  3097. return ret;
  3098. }
  3099. set_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  3100. cnss_pr_dbg("COEX Server Connected: 0x%lx\n",
  3101. plat_priv->driver_state);
  3102. return 0;
  3103. }
  3104. static void coex_del_server(struct qmi_handle *qmi,
  3105. struct qmi_service *service)
  3106. {
  3107. struct cnss_plat_data *plat_priv =
  3108. container_of(qmi, struct cnss_plat_data, coex_qmi);
  3109. cnss_pr_dbg("COEX server exit\n");
  3110. clear_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  3111. }
  3112. static struct qmi_ops coex_qmi_ops = {
  3113. .new_server = coex_new_server,
  3114. .del_server = coex_del_server,
  3115. };
  3116. int cnss_register_coex_service(struct cnss_plat_data *plat_priv)
  3117. { int ret;
  3118. ret = qmi_handle_init(&plat_priv->coex_qmi,
  3119. COEX_SERVICE_MAX_MSG_LEN,
  3120. &coex_qmi_ops, NULL);
  3121. if (ret < 0)
  3122. return ret;
  3123. ret = qmi_add_lookup(&plat_priv->coex_qmi, COEX_SERVICE_ID_V01,
  3124. COEX_SERVICE_VERS_V01, 0);
  3125. return ret;
  3126. }
  3127. void cnss_unregister_coex_service(struct cnss_plat_data *plat_priv)
  3128. {
  3129. qmi_handle_release(&plat_priv->coex_qmi);
  3130. }
  3131. /* IMS Service */
  3132. int ims_subscribe_for_indication_send_async(struct cnss_plat_data *plat_priv)
  3133. {
  3134. int ret;
  3135. struct ims_private_service_subscribe_for_indications_req_msg_v01 *req;
  3136. struct qmi_txn *txn;
  3137. if (!plat_priv)
  3138. return -ENODEV;
  3139. cnss_pr_dbg("Sending ASYNC ims subscribe for indication\n");
  3140. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3141. if (!req)
  3142. return -ENOMEM;
  3143. req->wfc_call_status_valid = 1;
  3144. req->wfc_call_status = 1;
  3145. txn = &plat_priv->txn;
  3146. ret = qmi_txn_init(&plat_priv->ims_qmi, txn, NULL, NULL);
  3147. if (ret < 0) {
  3148. cnss_pr_err("Fail to init txn for ims subscribe for indication resp %d\n",
  3149. ret);
  3150. goto out;
  3151. }
  3152. ret = qmi_send_request
  3153. (&plat_priv->ims_qmi, NULL, txn,
  3154. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3155. IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_MSG_V01_MAX_MSG_LEN,
  3156. ims_private_service_subscribe_for_indications_req_msg_v01_ei, req);
  3157. if (ret < 0) {
  3158. qmi_txn_cancel(txn);
  3159. cnss_pr_err("Fail to send ims subscribe for indication req %d\n",
  3160. ret);
  3161. goto out;
  3162. }
  3163. kfree(req);
  3164. return 0;
  3165. out:
  3166. kfree(req);
  3167. return ret;
  3168. }
  3169. static void ims_subscribe_for_indication_resp_cb(struct qmi_handle *qmi,
  3170. struct sockaddr_qrtr *sq,
  3171. struct qmi_txn *txn,
  3172. const void *data)
  3173. {
  3174. const
  3175. struct ims_private_service_subscribe_for_indications_rsp_msg_v01 *resp =
  3176. data;
  3177. cnss_pr_dbg("Received IMS subscribe indication response\n");
  3178. if (!txn) {
  3179. cnss_pr_err("spurious response\n");
  3180. return;
  3181. }
  3182. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3183. cnss_pr_err("IMS subscribe for indication request rejected, result:%d error:%d\n",
  3184. resp->resp.result, resp->resp.error);
  3185. txn->result = -resp->resp.result;
  3186. }
  3187. }
  3188. int cnss_process_wfc_call_ind_event(struct cnss_plat_data *plat_priv,
  3189. void *data)
  3190. {
  3191. int ret;
  3192. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3193. ret = cnss_wlfw_wfc_call_status_send_sync(plat_priv, ind_msg);
  3194. kfree(data);
  3195. return ret;
  3196. }
  3197. static void
  3198. cnss_ims_process_wfc_call_ind_cb(struct qmi_handle *ims_qmi,
  3199. struct sockaddr_qrtr *sq,
  3200. struct qmi_txn *txn, const void *data)
  3201. {
  3202. struct cnss_plat_data *plat_priv =
  3203. container_of(ims_qmi, struct cnss_plat_data, ims_qmi);
  3204. const
  3205. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3206. struct ims_private_service_wfc_call_status_ind_msg_v01 *event_data;
  3207. if (!txn) {
  3208. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Spurious indication\n");
  3209. return;
  3210. }
  3211. if (!ind_msg) {
  3212. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Invalid indication\n");
  3213. return;
  3214. }
  3215. cnss_pr_dbg("IMS->CNSS: WFC_CALL_IND: %x, %x %x, %x %x, %x %llx, %x %x, %x %x\n",
  3216. ind_msg->wfc_call_active, ind_msg->all_wfc_calls_held_valid,
  3217. ind_msg->all_wfc_calls_held,
  3218. ind_msg->is_wfc_emergency_valid, ind_msg->is_wfc_emergency,
  3219. ind_msg->twt_ims_start_valid, ind_msg->twt_ims_start,
  3220. ind_msg->twt_ims_int_valid, ind_msg->twt_ims_int,
  3221. ind_msg->media_quality_valid, ind_msg->media_quality);
  3222. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  3223. if (!event_data)
  3224. return;
  3225. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND,
  3226. 0, event_data);
  3227. }
  3228. static struct qmi_msg_handler qmi_ims_msg_handlers[] = {
  3229. {
  3230. .type = QMI_RESPONSE,
  3231. .msg_id =
  3232. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3233. .ei =
  3234. ims_private_service_subscribe_for_indications_rsp_msg_v01_ei,
  3235. .decoded_size = sizeof(struct
  3236. ims_private_service_subscribe_for_indications_rsp_msg_v01),
  3237. .fn = ims_subscribe_for_indication_resp_cb
  3238. },
  3239. {
  3240. .type = QMI_INDICATION,
  3241. .msg_id = QMI_IMS_PRIVATE_SERVICE_WFC_CALL_STATUS_IND_V01,
  3242. .ei = ims_private_service_wfc_call_status_ind_msg_v01_ei,
  3243. .decoded_size =
  3244. sizeof(struct ims_private_service_wfc_call_status_ind_msg_v01),
  3245. .fn = cnss_ims_process_wfc_call_ind_cb
  3246. },
  3247. {}
  3248. };
  3249. static int ims_new_server(struct qmi_handle *qmi,
  3250. struct qmi_service *service)
  3251. {
  3252. struct cnss_plat_data *plat_priv =
  3253. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3254. struct sockaddr_qrtr sq = { 0 };
  3255. int ret = 0;
  3256. cnss_pr_dbg("IMS server arrive: node %u port %u\n",
  3257. service->node, service->port);
  3258. sq.sq_family = AF_QIPCRTR;
  3259. sq.sq_node = service->node;
  3260. sq.sq_port = service->port;
  3261. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3262. if (ret < 0) {
  3263. cnss_pr_err("Fail to connect to remote service port\n");
  3264. return ret;
  3265. }
  3266. set_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3267. cnss_pr_dbg("IMS Server Connected: 0x%lx\n",
  3268. plat_priv->driver_state);
  3269. ret = ims_subscribe_for_indication_send_async(plat_priv);
  3270. return ret;
  3271. }
  3272. static void ims_del_server(struct qmi_handle *qmi,
  3273. struct qmi_service *service)
  3274. {
  3275. struct cnss_plat_data *plat_priv =
  3276. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3277. cnss_pr_dbg("IMS server exit\n");
  3278. clear_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3279. }
  3280. static struct qmi_ops ims_qmi_ops = {
  3281. .new_server = ims_new_server,
  3282. .del_server = ims_del_server,
  3283. };
  3284. int cnss_register_ims_service(struct cnss_plat_data *plat_priv)
  3285. { int ret;
  3286. ret = qmi_handle_init(&plat_priv->ims_qmi,
  3287. IMSPRIVATE_SERVICE_MAX_MSG_LEN,
  3288. &ims_qmi_ops, qmi_ims_msg_handlers);
  3289. if (ret < 0)
  3290. return ret;
  3291. ret = qmi_add_lookup(&plat_priv->ims_qmi, IMSPRIVATE_SERVICE_ID_V01,
  3292. IMSPRIVATE_SERVICE_VERS_V01, 0);
  3293. return ret;
  3294. }
  3295. void cnss_unregister_ims_service(struct cnss_plat_data *plat_priv)
  3296. {
  3297. qmi_handle_release(&plat_priv->ims_qmi);
  3298. }