dsi_panel.c 119 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. #include "sde_dbg.h"
  15. #include "sde_dsc_helper.h"
  16. #include "sde_vdc_helper.h"
  17. /**
  18. * topology is currently defined by a set of following 3 values:
  19. * 1. num of layer mixers
  20. * 2. num of compression encoders
  21. * 3. num of interfaces
  22. */
  23. #define TOPOLOGY_SET_LEN 3
  24. #define MAX_TOPOLOGY 5
  25. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  26. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  27. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  28. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  29. #define MAX_PANEL_JITTER 10
  30. #define DEFAULT_PANEL_PREFILL_LINES 25
  31. #define HIGH_REFRESH_RATE_THRESHOLD_TIME_US 500
  32. #define MIN_PREFILL_LINES 40
  33. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  34. {
  35. char *bp;
  36. bp = buf;
  37. /* First 7 bytes are cmd header */
  38. *bp++ = 0x0A;
  39. *bp++ = 1;
  40. *bp++ = 0;
  41. *bp++ = 0;
  42. *bp++ = pps_delay_ms;
  43. *bp++ = 0;
  44. *bp++ = 128;
  45. }
  46. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  47. char *buf, int pps_id, u32 size)
  48. {
  49. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  50. buf += DSI_CMD_PPS_HDR_SIZE;
  51. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  52. size);
  53. }
  54. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  55. char *buf, int pps_id, u32 size)
  56. {
  57. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  58. buf += DSI_CMD_PPS_HDR_SIZE;
  59. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  60. size);
  61. }
  62. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  63. {
  64. int rc = 0;
  65. int i;
  66. struct regulator *vreg = NULL;
  67. for (i = 0; i < panel->power_info.count; i++) {
  68. vreg = devm_regulator_get(panel->parent,
  69. panel->power_info.vregs[i].vreg_name);
  70. rc = PTR_ERR_OR_ZERO(vreg);
  71. if (rc) {
  72. DSI_ERR("failed to get %s regulator\n",
  73. panel->power_info.vregs[i].vreg_name);
  74. goto error_put;
  75. }
  76. panel->power_info.vregs[i].vreg = vreg;
  77. }
  78. return rc;
  79. error_put:
  80. for (i = i - 1; i >= 0; i--) {
  81. devm_regulator_put(panel->power_info.vregs[i].vreg);
  82. panel->power_info.vregs[i].vreg = NULL;
  83. }
  84. return rc;
  85. }
  86. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  87. {
  88. int rc = 0;
  89. int i;
  90. for (i = panel->power_info.count - 1; i >= 0; i--)
  91. devm_regulator_put(panel->power_info.vregs[i].vreg);
  92. return rc;
  93. }
  94. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  95. {
  96. int rc = 0;
  97. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  98. if (gpio_is_valid(r_config->reset_gpio)) {
  99. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  100. if (rc) {
  101. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  102. goto error;
  103. }
  104. }
  105. if (gpio_is_valid(r_config->disp_en_gpio)) {
  106. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  107. if (rc) {
  108. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  109. goto error_release_reset;
  110. }
  111. }
  112. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  113. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  114. if (rc) {
  115. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  116. goto error_release_disp_en;
  117. }
  118. }
  119. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  120. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  121. if (rc) {
  122. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  123. goto error_release_mode_sel;
  124. }
  125. }
  126. if (gpio_is_valid(panel->panel_test_gpio)) {
  127. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  128. if (rc) {
  129. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  130. rc);
  131. panel->panel_test_gpio = -1;
  132. rc = 0;
  133. }
  134. }
  135. goto error;
  136. error_release_mode_sel:
  137. if (gpio_is_valid(panel->bl_config.en_gpio))
  138. gpio_free(panel->bl_config.en_gpio);
  139. error_release_disp_en:
  140. if (gpio_is_valid(r_config->disp_en_gpio))
  141. gpio_free(r_config->disp_en_gpio);
  142. error_release_reset:
  143. if (gpio_is_valid(r_config->reset_gpio))
  144. gpio_free(r_config->reset_gpio);
  145. error:
  146. return rc;
  147. }
  148. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  149. {
  150. int rc = 0;
  151. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  152. if (gpio_is_valid(r_config->reset_gpio))
  153. gpio_free(r_config->reset_gpio);
  154. if (gpio_is_valid(r_config->disp_en_gpio))
  155. gpio_free(r_config->disp_en_gpio);
  156. if (gpio_is_valid(panel->bl_config.en_gpio))
  157. gpio_free(panel->bl_config.en_gpio);
  158. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  159. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  160. if (gpio_is_valid(panel->panel_test_gpio))
  161. gpio_free(panel->panel_test_gpio);
  162. return rc;
  163. }
  164. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel, bool trusted_vm_env)
  165. {
  166. if (!panel) {
  167. DSI_ERR("Invalid panel param\n");
  168. return -EINVAL;
  169. }
  170. /* toggle reset-gpio by writing directly to register in trusted-vm */
  171. if (trusted_vm_env) {
  172. struct dsi_tlmm_gpio *gpio = NULL;
  173. void __iomem *io;
  174. u32 offset = 0x4;
  175. int i;
  176. for (i = 0; i < panel->tlmm_gpio_count; i++)
  177. if (!strcmp(panel->tlmm_gpio[i].name, "reset-gpio"))
  178. gpio = &panel->tlmm_gpio[i];
  179. if (!gpio) {
  180. DSI_ERR("reset gpio not found\n");
  181. return -EINVAL;
  182. }
  183. io = ioremap(gpio->addr, gpio->size);
  184. writel_relaxed(0, io + offset);
  185. iounmap(io);
  186. } else {
  187. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  188. if (!r_config) {
  189. DSI_ERR("Invalid panel reset configuration\n");
  190. return -EINVAL;
  191. }
  192. if (!gpio_is_valid(r_config->reset_gpio)) {
  193. DSI_ERR("failed to pull down gpio\n");
  194. return -EINVAL;
  195. }
  196. gpio_set_value(r_config->reset_gpio, 0);
  197. }
  198. SDE_EVT32(SDE_EVTLOG_FUNC_CASE1);
  199. DSI_INFO("GPIO pulled low to simulate ESD\n");
  200. return 0;
  201. }
  202. static int dsi_panel_reset(struct dsi_panel *panel)
  203. {
  204. int rc = 0;
  205. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  206. int i;
  207. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  208. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  209. if (rc) {
  210. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  211. goto exit;
  212. }
  213. }
  214. if (r_config->count) {
  215. rc = gpio_direction_output(r_config->reset_gpio,
  216. r_config->sequence[0].level);
  217. if (rc) {
  218. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  219. goto exit;
  220. }
  221. }
  222. for (i = 0; i < r_config->count; i++) {
  223. gpio_set_value(r_config->reset_gpio,
  224. r_config->sequence[i].level);
  225. if (r_config->sequence[i].sleep_ms)
  226. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  227. (r_config->sequence[i].sleep_ms * 1000) + 100);
  228. }
  229. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  230. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  231. if (rc)
  232. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  233. }
  234. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  235. bool out = true;
  236. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  237. || (panel->reset_config.mode_sel_state
  238. == MODE_GPIO_LOW))
  239. out = false;
  240. else if ((panel->reset_config.mode_sel_state
  241. == MODE_SEL_SINGLE_PORT) ||
  242. (panel->reset_config.mode_sel_state
  243. == MODE_GPIO_HIGH))
  244. out = true;
  245. rc = gpio_direction_output(
  246. panel->reset_config.lcd_mode_sel_gpio, out);
  247. if (rc)
  248. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  249. }
  250. if (gpio_is_valid(panel->panel_test_gpio)) {
  251. rc = gpio_direction_input(panel->panel_test_gpio);
  252. if (rc)
  253. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  254. rc);
  255. }
  256. exit:
  257. return rc;
  258. }
  259. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  260. {
  261. int rc = 0;
  262. struct pinctrl_state *state;
  263. if (panel->host_config.ext_bridge_mode)
  264. return 0;
  265. if (!panel->pinctrl.pinctrl)
  266. return 0;
  267. if (enable)
  268. state = panel->pinctrl.active;
  269. else
  270. state = panel->pinctrl.suspend;
  271. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  272. if (rc)
  273. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  274. panel->name, rc);
  275. return rc;
  276. }
  277. static int dsi_panel_power_on(struct dsi_panel *panel)
  278. {
  279. int rc = 0;
  280. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  281. if (rc) {
  282. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  283. panel->name, rc);
  284. goto exit;
  285. }
  286. rc = dsi_panel_set_pinctrl_state(panel, true);
  287. if (rc) {
  288. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  289. goto error_disable_vregs;
  290. }
  291. rc = dsi_panel_reset(panel);
  292. if (rc) {
  293. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  294. goto error_disable_gpio;
  295. }
  296. goto exit;
  297. error_disable_gpio:
  298. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  299. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  300. if (gpio_is_valid(panel->bl_config.en_gpio))
  301. gpio_set_value(panel->bl_config.en_gpio, 0);
  302. (void)dsi_panel_set_pinctrl_state(panel, false);
  303. error_disable_vregs:
  304. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  305. exit:
  306. return rc;
  307. }
  308. static int dsi_panel_power_off(struct dsi_panel *panel)
  309. {
  310. int rc = 0;
  311. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  312. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  313. if (gpio_is_valid(panel->reset_config.reset_gpio) &&
  314. !panel->reset_gpio_always_on)
  315. gpio_set_value(panel->reset_config.reset_gpio, 0);
  316. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  317. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  318. if (gpio_is_valid(panel->panel_test_gpio)) {
  319. rc = gpio_direction_input(panel->panel_test_gpio);
  320. if (rc)
  321. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  322. rc);
  323. }
  324. rc = dsi_panel_set_pinctrl_state(panel, false);
  325. if (rc) {
  326. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  327. rc);
  328. }
  329. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  330. if (rc)
  331. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  332. panel->name, rc);
  333. return rc;
  334. }
  335. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  336. enum dsi_cmd_set_type type)
  337. {
  338. int rc = 0, i = 0;
  339. ssize_t len;
  340. struct dsi_cmd_desc *cmds;
  341. u32 count;
  342. enum dsi_cmd_set_state state;
  343. struct dsi_display_mode *mode;
  344. if (!panel || !panel->cur_mode)
  345. return -EINVAL;
  346. mode = panel->cur_mode;
  347. cmds = mode->priv_info->cmd_sets[type].cmds;
  348. count = mode->priv_info->cmd_sets[type].count;
  349. state = mode->priv_info->cmd_sets[type].state;
  350. SDE_EVT32(type, state, count);
  351. if (count == 0) {
  352. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  353. panel->name, type);
  354. goto error;
  355. }
  356. for (i = 0; i < count; i++) {
  357. if (state == DSI_CMD_SET_STATE_LP)
  358. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  359. if (type == DSI_CMD_SET_VID_SWITCH_OUT)
  360. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  361. len = dsi_host_transfer_sub(panel->host, cmds);
  362. if (len < 0) {
  363. rc = len;
  364. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  365. goto error;
  366. }
  367. if (cmds->post_wait_ms)
  368. usleep_range(cmds->post_wait_ms*1000,
  369. ((cmds->post_wait_ms*1000)+10));
  370. cmds++;
  371. }
  372. error:
  373. return rc;
  374. }
  375. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  376. {
  377. int rc = 0;
  378. if (panel->host_config.ext_bridge_mode)
  379. return 0;
  380. devm_pinctrl_put(panel->pinctrl.pinctrl);
  381. return rc;
  382. }
  383. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  384. {
  385. int rc = 0;
  386. if (panel->host_config.ext_bridge_mode)
  387. return 0;
  388. /* TODO: pinctrl is defined in dsi dt node */
  389. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  390. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  391. rc = PTR_ERR(panel->pinctrl.pinctrl);
  392. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  393. goto error;
  394. }
  395. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  396. "panel_active");
  397. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  398. rc = PTR_ERR(panel->pinctrl.active);
  399. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  400. goto error;
  401. }
  402. panel->pinctrl.suspend =
  403. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  404. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  405. rc = PTR_ERR(panel->pinctrl.suspend);
  406. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  407. goto error;
  408. }
  409. panel->pinctrl.pwm_pin =
  410. pinctrl_lookup_state(panel->pinctrl.pinctrl, "pwm_pin");
  411. if (IS_ERR_OR_NULL(panel->pinctrl.pwm_pin)) {
  412. panel->pinctrl.pwm_pin = NULL;
  413. DSI_DEBUG("failed to get pinctrl pwm_pin");
  414. }
  415. error:
  416. return rc;
  417. }
  418. static int dsi_panel_wled_register(struct dsi_panel *panel,
  419. struct dsi_backlight_config *bl)
  420. {
  421. struct backlight_device *bd;
  422. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  423. if (!bd) {
  424. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  425. panel->name, -EPROBE_DEFER);
  426. return -EPROBE_DEFER;
  427. }
  428. bl->raw_bd = bd;
  429. return 0;
  430. }
  431. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  432. u32 bl_lvl)
  433. {
  434. int rc = 0;
  435. unsigned long mode_flags = 0;
  436. struct mipi_dsi_device *dsi = NULL;
  437. if (!panel || (bl_lvl > 0xffff)) {
  438. DSI_ERR("invalid params\n");
  439. return -EINVAL;
  440. }
  441. dsi = &panel->mipi_device;
  442. if (unlikely(panel->bl_config.lp_mode)) {
  443. mode_flags = dsi->mode_flags;
  444. dsi->mode_flags |= MIPI_DSI_MODE_LPM;
  445. }
  446. if (panel->bl_config.bl_inverted_dbv)
  447. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  448. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  449. if (rc < 0)
  450. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  451. if (unlikely(panel->bl_config.lp_mode))
  452. dsi->mode_flags = mode_flags;
  453. return rc;
  454. }
  455. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  456. u32 bl_lvl)
  457. {
  458. int rc = 0;
  459. u32 duty = 0;
  460. u32 period_ns = 0;
  461. struct dsi_backlight_config *bl;
  462. if (!panel) {
  463. DSI_ERR("Invalid Params\n");
  464. return -EINVAL;
  465. }
  466. bl = &panel->bl_config;
  467. if (!bl->pwm_bl) {
  468. DSI_ERR("pwm device not found\n");
  469. return -EINVAL;
  470. }
  471. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  472. duty = bl_lvl * period_ns;
  473. duty /= bl->bl_max_level;
  474. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  475. if (rc) {
  476. DSI_ERR("[%s] failed to change pwm config, rc=%d\n", panel->name,
  477. rc);
  478. goto error;
  479. }
  480. if (bl_lvl == 0 && bl->pwm_enabled) {
  481. pwm_disable(bl->pwm_bl);
  482. bl->pwm_enabled = false;
  483. return 0;
  484. }
  485. if (bl_lvl != 0 && !bl->pwm_enabled) {
  486. rc = pwm_enable(bl->pwm_bl);
  487. if (rc) {
  488. DSI_ERR("[%s] failed to enable pwm, rc=%d\n", panel->name,
  489. rc);
  490. goto error;
  491. }
  492. bl->pwm_enabled = true;
  493. }
  494. error:
  495. return rc;
  496. }
  497. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  498. {
  499. int rc = 0;
  500. struct dsi_backlight_config *bl = &panel->bl_config;
  501. if (panel->host_config.ext_bridge_mode)
  502. return 0;
  503. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  504. switch (bl->type) {
  505. case DSI_BACKLIGHT_WLED:
  506. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  507. break;
  508. case DSI_BACKLIGHT_DCS:
  509. rc = dsi_panel_update_backlight(panel, bl_lvl);
  510. break;
  511. case DSI_BACKLIGHT_EXTERNAL:
  512. break;
  513. case DSI_BACKLIGHT_PWM:
  514. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  515. break;
  516. default:
  517. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  518. rc = -ENOTSUPP;
  519. }
  520. return rc;
  521. }
  522. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  523. {
  524. u32 cur_bl_level;
  525. struct backlight_device *bd = bl->raw_bd;
  526. /* default the brightness level to 50% */
  527. cur_bl_level = bl->bl_max_level >> 1;
  528. switch (bl->type) {
  529. case DSI_BACKLIGHT_WLED:
  530. /* Try to query the backlight level from the backlight device */
  531. if (bd->ops && bd->ops->get_brightness)
  532. cur_bl_level = bd->ops->get_brightness(bd);
  533. break;
  534. case DSI_BACKLIGHT_DCS:
  535. case DSI_BACKLIGHT_EXTERNAL:
  536. case DSI_BACKLIGHT_PWM:
  537. default:
  538. /*
  539. * Ideally, we should read the backlight level from the
  540. * panel. For now, just set it default value.
  541. */
  542. break;
  543. }
  544. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  545. return cur_bl_level;
  546. }
  547. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  548. {
  549. struct dsi_backlight_config *bl = &panel->bl_config;
  550. bl->bl_level = dsi_panel_get_brightness(bl);
  551. }
  552. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  553. {
  554. int rc = 0;
  555. struct dsi_backlight_config *bl = &panel->bl_config;
  556. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  557. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  558. rc = PTR_ERR(bl->pwm_bl);
  559. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  560. rc);
  561. return rc;
  562. }
  563. if (panel->pinctrl.pwm_pin) {
  564. rc = pinctrl_select_state(panel->pinctrl.pinctrl,
  565. panel->pinctrl.pwm_pin);
  566. if (rc)
  567. DSI_ERR("[%s] failed to set pwm pinctrl, rc=%d\n",
  568. panel->name, rc);
  569. }
  570. return 0;
  571. }
  572. static int dsi_panel_bl_register(struct dsi_panel *panel)
  573. {
  574. int rc = 0;
  575. struct dsi_backlight_config *bl = &panel->bl_config;
  576. if (panel->host_config.ext_bridge_mode)
  577. return 0;
  578. switch (bl->type) {
  579. case DSI_BACKLIGHT_WLED:
  580. rc = dsi_panel_wled_register(panel, bl);
  581. break;
  582. case DSI_BACKLIGHT_DCS:
  583. break;
  584. case DSI_BACKLIGHT_EXTERNAL:
  585. break;
  586. case DSI_BACKLIGHT_PWM:
  587. rc = dsi_panel_pwm_register(panel);
  588. break;
  589. default:
  590. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  591. rc = -ENOTSUPP;
  592. goto error;
  593. }
  594. error:
  595. return rc;
  596. }
  597. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  598. {
  599. struct dsi_backlight_config *bl = &panel->bl_config;
  600. devm_pwm_put(panel->parent, bl->pwm_bl);
  601. }
  602. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  603. {
  604. int rc = 0;
  605. struct dsi_backlight_config *bl = &panel->bl_config;
  606. if (panel->host_config.ext_bridge_mode)
  607. return 0;
  608. switch (bl->type) {
  609. case DSI_BACKLIGHT_WLED:
  610. break;
  611. case DSI_BACKLIGHT_DCS:
  612. break;
  613. case DSI_BACKLIGHT_EXTERNAL:
  614. break;
  615. case DSI_BACKLIGHT_PWM:
  616. dsi_panel_pwm_unregister(panel);
  617. break;
  618. default:
  619. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  620. rc = -ENOTSUPP;
  621. goto error;
  622. }
  623. error:
  624. return rc;
  625. }
  626. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  627. struct dsi_parser_utils *utils)
  628. {
  629. int rc = 0;
  630. u64 tmp64 = 0;
  631. struct dsi_display_mode *display_mode;
  632. struct dsi_display_mode_priv_info *priv_info;
  633. display_mode = container_of(mode, struct dsi_display_mode, timing);
  634. priv_info = display_mode->priv_info;
  635. rc = utils->read_u64(utils->data,
  636. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  637. if (rc == -EOVERFLOW) {
  638. tmp64 = 0;
  639. rc = utils->read_u32(utils->data,
  640. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  641. }
  642. mode->clk_rate_hz = !rc ? tmp64 : 0;
  643. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  644. mode->pclk_scale.numer = 1;
  645. mode->pclk_scale.denom = 1;
  646. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  647. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  648. &mode->mdp_transfer_time_us);
  649. if (!rc)
  650. display_mode->priv_info->mdp_transfer_time_us =
  651. mode->mdp_transfer_time_us;
  652. else
  653. display_mode->priv_info->mdp_transfer_time_us = 0;
  654. rc = utils->read_u32(utils->data,
  655. "qcom,mdss-dsi-panel-framerate",
  656. &mode->refresh_rate);
  657. if (rc) {
  658. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  659. rc);
  660. goto error;
  661. }
  662. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  663. &mode->h_active);
  664. if (rc) {
  665. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  666. rc);
  667. goto error;
  668. }
  669. rc = utils->read_u32(utils->data,
  670. "qcom,mdss-dsi-h-front-porch",
  671. &mode->h_front_porch);
  672. if (rc) {
  673. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  674. rc);
  675. goto error;
  676. }
  677. rc = utils->read_u32(utils->data,
  678. "qcom,mdss-dsi-h-back-porch",
  679. &mode->h_back_porch);
  680. if (rc) {
  681. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  682. rc);
  683. goto error;
  684. }
  685. rc = utils->read_u32(utils->data,
  686. "qcom,mdss-dsi-h-pulse-width",
  687. &mode->h_sync_width);
  688. if (rc) {
  689. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  690. rc);
  691. goto error;
  692. }
  693. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  694. &mode->h_skew);
  695. if (rc)
  696. DSI_DEBUG("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  697. rc);
  698. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  699. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  700. mode->h_sync_width);
  701. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  702. &mode->v_active);
  703. if (rc) {
  704. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  705. rc);
  706. goto error;
  707. }
  708. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  709. &mode->v_back_porch);
  710. if (rc) {
  711. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  712. rc);
  713. goto error;
  714. }
  715. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  716. &mode->v_front_porch);
  717. if (rc) {
  718. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  719. rc);
  720. goto error;
  721. }
  722. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  723. &mode->v_sync_width);
  724. if (rc) {
  725. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  726. rc);
  727. goto error;
  728. }
  729. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  730. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  731. mode->v_sync_width);
  732. error:
  733. return rc;
  734. }
  735. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  736. struct dsi_parser_utils *utils,
  737. const char *name)
  738. {
  739. int rc = 0;
  740. u32 bpp = 0;
  741. enum dsi_pixel_format fmt;
  742. const char *packing;
  743. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  744. if (rc) {
  745. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  746. name, rc);
  747. return rc;
  748. }
  749. host->bpp = bpp;
  750. switch (bpp) {
  751. case 3:
  752. fmt = DSI_PIXEL_FORMAT_RGB111;
  753. break;
  754. case 8:
  755. fmt = DSI_PIXEL_FORMAT_RGB332;
  756. break;
  757. case 12:
  758. fmt = DSI_PIXEL_FORMAT_RGB444;
  759. break;
  760. case 16:
  761. fmt = DSI_PIXEL_FORMAT_RGB565;
  762. break;
  763. case 18:
  764. fmt = DSI_PIXEL_FORMAT_RGB666;
  765. break;
  766. case 24:
  767. default:
  768. fmt = DSI_PIXEL_FORMAT_RGB888;
  769. break;
  770. }
  771. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  772. packing = utils->get_property(utils->data,
  773. "qcom,mdss-dsi-pixel-packing",
  774. NULL);
  775. if (packing && !strcmp(packing, "loose"))
  776. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  777. }
  778. host->dst_format = fmt;
  779. return rc;
  780. }
  781. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  782. struct dsi_parser_utils *utils,
  783. const char *name)
  784. {
  785. int rc = 0;
  786. bool lane_enabled;
  787. u32 num_of_lanes = 0;
  788. lane_enabled = utils->read_bool(utils->data,
  789. "qcom,mdss-dsi-lane-0-state");
  790. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  791. lane_enabled = utils->read_bool(utils->data,
  792. "qcom,mdss-dsi-lane-1-state");
  793. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  794. lane_enabled = utils->read_bool(utils->data,
  795. "qcom,mdss-dsi-lane-2-state");
  796. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  797. lane_enabled = utils->read_bool(utils->data,
  798. "qcom,mdss-dsi-lane-3-state");
  799. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  800. if (host->data_lanes & DSI_DATA_LANE_0)
  801. num_of_lanes++;
  802. if (host->data_lanes & DSI_DATA_LANE_1)
  803. num_of_lanes++;
  804. if (host->data_lanes & DSI_DATA_LANE_2)
  805. num_of_lanes++;
  806. if (host->data_lanes & DSI_DATA_LANE_3)
  807. num_of_lanes++;
  808. host->num_data_lanes = num_of_lanes;
  809. if (host->data_lanes == 0) {
  810. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  811. rc = -EINVAL;
  812. }
  813. return rc;
  814. }
  815. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  816. struct dsi_parser_utils *utils,
  817. const char *name)
  818. {
  819. int rc = 0;
  820. const char *swap_mode;
  821. swap_mode = utils->get_property(utils->data,
  822. "qcom,mdss-dsi-color-order", NULL);
  823. if (swap_mode) {
  824. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  825. host->swap_mode = DSI_COLOR_SWAP_RGB;
  826. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  827. host->swap_mode = DSI_COLOR_SWAP_RBG;
  828. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  829. host->swap_mode = DSI_COLOR_SWAP_BRG;
  830. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  831. host->swap_mode = DSI_COLOR_SWAP_GRB;
  832. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  833. host->swap_mode = DSI_COLOR_SWAP_GBR;
  834. } else {
  835. DSI_ERR("[%s] Unrecognized color order-%s\n",
  836. name, swap_mode);
  837. rc = -EINVAL;
  838. }
  839. } else {
  840. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  841. host->swap_mode = DSI_COLOR_SWAP_RGB;
  842. }
  843. /* bit swap on color channel is not defined in dt */
  844. host->bit_swap_red = false;
  845. host->bit_swap_green = false;
  846. host->bit_swap_blue = false;
  847. return rc;
  848. }
  849. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  850. struct dsi_parser_utils *utils,
  851. const char *name)
  852. {
  853. const char *trig;
  854. int rc = 0;
  855. trig = utils->get_property(utils->data,
  856. "qcom,mdss-dsi-mdp-trigger", NULL);
  857. if (trig) {
  858. if (!strcmp(trig, "none")) {
  859. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  860. } else if (!strcmp(trig, "trigger_te")) {
  861. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  862. } else if (!strcmp(trig, "trigger_sw")) {
  863. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  864. } else if (!strcmp(trig, "trigger_sw_te")) {
  865. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  866. } else {
  867. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  868. name, trig);
  869. rc = -EINVAL;
  870. }
  871. } else {
  872. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  873. name);
  874. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  875. }
  876. trig = utils->get_property(utils->data,
  877. "qcom,mdss-dsi-dma-trigger", NULL);
  878. if (trig) {
  879. if (!strcmp(trig, "none")) {
  880. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  881. } else if (!strcmp(trig, "trigger_te")) {
  882. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  883. } else if (!strcmp(trig, "trigger_sw")) {
  884. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  885. } else if (!strcmp(trig, "trigger_sw_seof")) {
  886. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  887. } else if (!strcmp(trig, "trigger_sw_te")) {
  888. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  889. } else {
  890. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  891. name, trig);
  892. rc = -EINVAL;
  893. }
  894. } else {
  895. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  896. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  897. }
  898. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  899. &host->te_mode);
  900. if (rc) {
  901. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  902. host->te_mode = 1;
  903. rc = 0;
  904. }
  905. return rc;
  906. }
  907. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  908. struct dsi_parser_utils *utils,
  909. const char *name)
  910. {
  911. u32 val = 0, line_no = 0, window = 0;
  912. int rc = 0;
  913. bool panel_cphy_mode = false;
  914. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  915. if (!rc) {
  916. host->t_clk_post = val;
  917. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  918. }
  919. val = 0;
  920. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  921. if (!rc) {
  922. host->t_clk_pre = val;
  923. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  924. }
  925. host->ignore_rx_eot = utils->read_bool(utils->data,
  926. "qcom,mdss-dsi-rx-eot-ignore");
  927. host->append_tx_eot = utils->read_bool(utils->data,
  928. "qcom,mdss-dsi-tx-eot-append");
  929. host->ext_bridge_mode = utils->read_bool(utils->data,
  930. "qcom,mdss-dsi-ext-bridge-mode");
  931. host->force_hs_clk_lane = utils->read_bool(utils->data,
  932. "qcom,mdss-dsi-force-clock-lane-hs");
  933. panel_cphy_mode = utils->read_bool(utils->data,
  934. "qcom,panel-cphy-mode");
  935. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  936. : DSI_PHY_TYPE_DPHY;
  937. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  938. &line_no);
  939. if (rc)
  940. host->dma_sched_line = 0;
  941. else
  942. host->dma_sched_line = line_no;
  943. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-window",
  944. &window);
  945. if (rc)
  946. host->dma_sched_window = 0;
  947. else
  948. host->dma_sched_window = window;
  949. DSI_DEBUG("[%s] DMA scheduling parameters Line: %d Window: %d\n", name,
  950. host->dma_sched_line, host->dma_sched_window);
  951. return 0;
  952. }
  953. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  954. struct dsi_parser_utils *utils,
  955. const char *name)
  956. {
  957. int rc = 0;
  958. u32 val = 0;
  959. bool supported = false;
  960. struct dsi_split_link_config *split_link = &host->split_link;
  961. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  962. if (!supported) {
  963. DSI_DEBUG("[%s] Split link is not supported\n", name);
  964. split_link->enabled = false;
  965. return;
  966. }
  967. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  968. if (rc || val < 1) {
  969. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  970. split_link->num_sublinks = 2;
  971. } else {
  972. split_link->num_sublinks = val;
  973. }
  974. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  975. if (rc || val < 1) {
  976. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  977. split_link->lanes_per_sublink = 2;
  978. } else {
  979. split_link->lanes_per_sublink = val;
  980. }
  981. supported = utils->read_bool(utils->data, "qcom,split-link-sublink-swap");
  982. if (!supported)
  983. split_link->sublink_swap = false;
  984. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  985. split_link->num_sublinks, split_link->lanes_per_sublink);
  986. split_link->enabled = true;
  987. }
  988. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  989. {
  990. int rc = 0;
  991. struct dsi_parser_utils *utils = &panel->utils;
  992. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  993. panel->name);
  994. if (rc) {
  995. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  996. panel->name, rc);
  997. goto error;
  998. }
  999. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  1000. panel->name);
  1001. if (rc) {
  1002. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  1003. panel->name, rc);
  1004. goto error;
  1005. }
  1006. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  1007. panel->name);
  1008. if (rc) {
  1009. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  1010. panel->name, rc);
  1011. goto error;
  1012. }
  1013. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  1014. panel->name);
  1015. if (rc) {
  1016. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  1017. panel->name, rc);
  1018. goto error;
  1019. }
  1020. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1021. panel->name);
  1022. if (rc) {
  1023. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  1024. panel->name, rc);
  1025. goto error;
  1026. }
  1027. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1028. panel->name);
  1029. error:
  1030. return rc;
  1031. }
  1032. static int dsi_panel_parse_avr_caps(struct dsi_panel *panel,
  1033. struct device_node *of_node)
  1034. {
  1035. struct dsi_avr_capabilities *avr_caps = &panel->avr_caps;
  1036. struct dsi_parser_utils *utils = &panel->utils;
  1037. int val, rc = 0;
  1038. val = utils->count_u32_elems(utils->data, "qcom,dsi-qsync-avr-step-list");
  1039. if (val <= 0) {
  1040. DSI_DEBUG("[%s] optional avr step list not defined, val:%d\n", panel->name, val);
  1041. return rc;
  1042. } else if (val > 1 && val != panel->dfps_caps.dfps_list_len) {
  1043. DSI_ERR("[%s] avr step list size %d not same as dfps list %d\n",
  1044. val, panel->dfps_caps.dfps_list_len);
  1045. return -EINVAL;
  1046. }
  1047. avr_caps->avr_step_fps_list = kcalloc(val, sizeof(u32), GFP_KERNEL);
  1048. if (!avr_caps->avr_step_fps_list)
  1049. return -ENOMEM;
  1050. rc = utils->read_u32_array(utils->data, "qcom,dsi-qsync-avr-step-list",
  1051. avr_caps->avr_step_fps_list, val);
  1052. if (rc) {
  1053. kfree(avr_caps->avr_step_fps_list);
  1054. return rc;
  1055. }
  1056. avr_caps->avr_step_fps_list_len = val;
  1057. return rc;
  1058. }
  1059. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1060. struct device_node *of_node)
  1061. {
  1062. int rc = 0;
  1063. u32 val = 0, i;
  1064. struct dsi_qsync_capabilities *qsync_caps = &panel->qsync_caps;
  1065. struct dsi_parser_utils *utils = &panel->utils;
  1066. const char *name = panel->name;
  1067. /**
  1068. * "mdss-dsi-qsync-min-refresh-rate" is defined in cmd mode and
  1069. * video mode when there is only one qsync min fps present.
  1070. */
  1071. rc = of_property_read_u32(of_node,
  1072. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1073. &val);
  1074. if (rc)
  1075. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1076. panel->name, rc);
  1077. qsync_caps->qsync_min_fps = val;
  1078. /**
  1079. * "dsi-supported-qsync-min-fps-list" may be defined in video
  1080. * mode, only in dfps case when "qcom,dsi-supported-dfps-list"
  1081. * is defined.
  1082. */
  1083. qsync_caps->qsync_min_fps_list_len = utils->count_u32_elems(utils->data,
  1084. "qcom,dsi-supported-qsync-min-fps-list");
  1085. if (qsync_caps->qsync_min_fps_list_len < 1)
  1086. goto qsync_support;
  1087. /**
  1088. * qcom,dsi-supported-qsync-min-fps-list cannot be defined
  1089. * along with qcom,mdss-dsi-qsync-min-refresh-rate.
  1090. */
  1091. if (qsync_caps->qsync_min_fps_list_len >= 1 &&
  1092. qsync_caps->qsync_min_fps) {
  1093. DSI_ERR("[%s] Both qsync nodes are defined\n",
  1094. name);
  1095. rc = -EINVAL;
  1096. goto error;
  1097. }
  1098. if (panel->dfps_caps.dfps_list_len !=
  1099. qsync_caps->qsync_min_fps_list_len) {
  1100. DSI_ERR("[%s] Qsync min fps list mismatch with dfps\n", name);
  1101. rc = -EINVAL;
  1102. goto error;
  1103. }
  1104. qsync_caps->qsync_min_fps_list =
  1105. kcalloc(qsync_caps->qsync_min_fps_list_len, sizeof(u32),
  1106. GFP_KERNEL);
  1107. if (!qsync_caps->qsync_min_fps_list) {
  1108. rc = -ENOMEM;
  1109. goto error;
  1110. }
  1111. rc = utils->read_u32_array(utils->data,
  1112. "qcom,dsi-supported-qsync-min-fps-list",
  1113. qsync_caps->qsync_min_fps_list,
  1114. qsync_caps->qsync_min_fps_list_len);
  1115. if (rc) {
  1116. DSI_ERR("[%s] Qsync min fps list parse failed\n", name);
  1117. rc = -EINVAL;
  1118. goto error;
  1119. }
  1120. qsync_caps->qsync_min_fps = qsync_caps->qsync_min_fps_list[0];
  1121. for (i = 1; i < qsync_caps->qsync_min_fps_list_len; i++) {
  1122. if (qsync_caps->qsync_min_fps_list[i] <
  1123. qsync_caps->qsync_min_fps)
  1124. qsync_caps->qsync_min_fps =
  1125. qsync_caps->qsync_min_fps_list[i];
  1126. }
  1127. qsync_support:
  1128. /* allow qsync support only if DFPS is with VFP approach */
  1129. if ((panel->dfps_caps.dfps_support) &&
  1130. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP))
  1131. panel->qsync_caps.qsync_min_fps = 0;
  1132. error:
  1133. if (rc < 0) {
  1134. qsync_caps->qsync_min_fps = 0;
  1135. qsync_caps->qsync_min_fps_list_len = 0;
  1136. }
  1137. return rc;
  1138. }
  1139. static int dsi_panel_parse_dyn_clk_list(struct dsi_display_mode *mode,
  1140. struct dsi_parser_utils *utils)
  1141. {
  1142. int i, rc = 0;
  1143. struct dyn_clk_list *bit_clk_list;
  1144. if (!mode || !mode->priv_info) {
  1145. DSI_ERR("invalid arguments\n");
  1146. return -EINVAL;
  1147. }
  1148. bit_clk_list = &mode->priv_info->bit_clk_list;
  1149. bit_clk_list->count = utils->count_u32_elems(utils->data, "qcom,dsi-dyn-clk-list");
  1150. if (bit_clk_list->count < 1)
  1151. return 0;
  1152. bit_clk_list->rates = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1153. if (!bit_clk_list->rates) {
  1154. DSI_ERR("failed to allocate space for bit clock list\n");
  1155. return -ENOMEM;
  1156. }
  1157. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1158. bit_clk_list->rates, bit_clk_list->count);
  1159. if (rc) {
  1160. DSI_ERR("failed to parse supported bit clk list, rc=%d\n", rc);
  1161. return -EINVAL;
  1162. }
  1163. for (i = 0; i < bit_clk_list->count; i++)
  1164. DSI_DEBUG("bit clk rate[%d]:%d\n", i, bit_clk_list->rates[i]);
  1165. return 0;
  1166. }
  1167. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1168. {
  1169. int rc = 0;
  1170. bool supported = false;
  1171. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1172. struct dsi_parser_utils *utils = &panel->utils;
  1173. const char *type;
  1174. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1175. if (!supported) {
  1176. dyn_clk_caps->dyn_clk_support = false;
  1177. return rc;
  1178. }
  1179. dyn_clk_caps->dyn_clk_support = true;
  1180. type = utils->get_property(utils->data,
  1181. "qcom,dsi-dyn-clk-type", NULL);
  1182. if (!type) {
  1183. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1184. dyn_clk_caps->maintain_const_fps = false;
  1185. return 0;
  1186. }
  1187. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1188. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1189. dyn_clk_caps->maintain_const_fps = true;
  1190. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1191. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1192. dyn_clk_caps->maintain_const_fps = true;
  1193. } else {
  1194. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1195. dyn_clk_caps->maintain_const_fps = false;
  1196. }
  1197. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1198. return 0;
  1199. }
  1200. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1201. {
  1202. int rc = 0;
  1203. bool supported = false;
  1204. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1205. struct dsi_parser_utils *utils = &panel->utils;
  1206. const char *name = panel->name;
  1207. const char *type;
  1208. u32 i;
  1209. supported = utils->read_bool(utils->data,
  1210. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1211. if (!supported) {
  1212. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1213. dfps_caps->dfps_support = false;
  1214. return rc;
  1215. }
  1216. type = utils->get_property(utils->data,
  1217. "qcom,mdss-dsi-pan-fps-update", NULL);
  1218. if (!type) {
  1219. DSI_ERR("[%s] dfps type not defined\n", name);
  1220. rc = -EINVAL;
  1221. goto error;
  1222. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1223. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1224. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1225. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1226. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1227. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1228. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1229. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1230. } else {
  1231. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1232. rc = -EINVAL;
  1233. goto error;
  1234. }
  1235. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1236. "qcom,dsi-supported-dfps-list");
  1237. if (dfps_caps->dfps_list_len < 1) {
  1238. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1239. rc = -EINVAL;
  1240. goto error;
  1241. }
  1242. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1243. GFP_KERNEL);
  1244. if (!dfps_caps->dfps_list) {
  1245. rc = -ENOMEM;
  1246. goto error;
  1247. }
  1248. rc = utils->read_u32_array(utils->data,
  1249. "qcom,dsi-supported-dfps-list",
  1250. dfps_caps->dfps_list,
  1251. dfps_caps->dfps_list_len);
  1252. if (rc) {
  1253. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1254. rc = -EINVAL;
  1255. goto error;
  1256. }
  1257. dfps_caps->dfps_support = true;
  1258. /* calculate max and min fps */
  1259. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1260. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1261. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1262. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1263. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1264. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1265. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1266. }
  1267. error:
  1268. return rc;
  1269. }
  1270. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1271. struct dsi_parser_utils *utils,
  1272. const char *name)
  1273. {
  1274. int rc = 0;
  1275. const char *traffic_mode;
  1276. u32 vc_id = 0;
  1277. u32 val = 0;
  1278. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1279. if (rc) {
  1280. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1281. cfg->pulse_mode_hsa_he = false;
  1282. } else if (val == 1) {
  1283. cfg->pulse_mode_hsa_he = true;
  1284. } else if (val == 0) {
  1285. cfg->pulse_mode_hsa_he = false;
  1286. } else {
  1287. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1288. name);
  1289. rc = -EINVAL;
  1290. goto error;
  1291. }
  1292. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1293. "qcom,mdss-dsi-hfp-power-mode");
  1294. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1295. "qcom,mdss-dsi-hbp-power-mode");
  1296. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1297. "qcom,mdss-dsi-hsa-power-mode");
  1298. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1299. "qcom,mdss-dsi-last-line-interleave");
  1300. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1301. "qcom,mdss-dsi-bllp-eof-power-mode");
  1302. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1303. "qcom,mdss-dsi-bllp-power-mode");
  1304. traffic_mode = utils->get_property(utils->data,
  1305. "qcom,mdss-dsi-traffic-mode",
  1306. NULL);
  1307. if (!traffic_mode) {
  1308. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1309. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1310. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1311. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1312. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1313. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1314. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1315. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1316. } else {
  1317. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1318. traffic_mode);
  1319. rc = -EINVAL;
  1320. goto error;
  1321. }
  1322. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1323. &vc_id);
  1324. if (rc) {
  1325. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1326. cfg->vc_id = 0;
  1327. } else {
  1328. cfg->vc_id = vc_id;
  1329. }
  1330. error:
  1331. return rc;
  1332. }
  1333. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1334. struct dsi_parser_utils *utils,
  1335. const char *name)
  1336. {
  1337. u32 val = 0;
  1338. int rc = 0;
  1339. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1340. if (rc) {
  1341. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1342. cfg->wr_mem_start = 0x2C;
  1343. } else {
  1344. cfg->wr_mem_start = val;
  1345. }
  1346. val = 0;
  1347. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1348. &val);
  1349. if (rc) {
  1350. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1351. cfg->wr_mem_continue = 0x3C;
  1352. } else {
  1353. cfg->wr_mem_continue = val;
  1354. }
  1355. /* TODO: fix following */
  1356. cfg->max_cmd_packets_interleave = 0;
  1357. val = 0;
  1358. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1359. &val);
  1360. if (rc) {
  1361. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1362. cfg->insert_dcs_command = true;
  1363. } else if (val == 1) {
  1364. cfg->insert_dcs_command = true;
  1365. } else if (val == 0) {
  1366. cfg->insert_dcs_command = false;
  1367. } else {
  1368. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1369. name);
  1370. rc = -EINVAL;
  1371. goto error;
  1372. }
  1373. error:
  1374. return rc;
  1375. }
  1376. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1377. {
  1378. int rc = 0;
  1379. struct dsi_parser_utils *utils = &panel->utils;
  1380. bool panel_mode_switch_enabled;
  1381. enum dsi_op_mode panel_mode;
  1382. const char *mode;
  1383. mode = utils->get_property(utils->data,
  1384. "qcom,mdss-dsi-panel-type", NULL);
  1385. if (!mode) {
  1386. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1387. panel_mode = DSI_OP_VIDEO_MODE;
  1388. } else if (!strcmp(mode, "dsi_video_mode")) {
  1389. panel_mode = DSI_OP_VIDEO_MODE;
  1390. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1391. panel_mode = DSI_OP_CMD_MODE;
  1392. } else {
  1393. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1394. rc = -EINVAL;
  1395. goto error;
  1396. }
  1397. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1398. "qcom,mdss-dsi-panel-mode-switch");
  1399. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1400. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1401. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1402. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1403. utils,
  1404. panel->name);
  1405. if (rc) {
  1406. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1407. panel->name, rc);
  1408. goto error;
  1409. }
  1410. }
  1411. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1412. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1413. utils,
  1414. panel->name);
  1415. if (rc) {
  1416. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1417. panel->name, rc);
  1418. goto error;
  1419. }
  1420. }
  1421. panel->poms_align_vsync = utils->read_bool(utils->data,
  1422. "qcom,poms-align-panel-vsync");
  1423. panel->panel_mode = panel_mode;
  1424. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1425. error:
  1426. return rc;
  1427. }
  1428. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1429. {
  1430. int rc = 0;
  1431. u32 val = 0;
  1432. const char *str;
  1433. struct dsi_panel_phy_props *props = &panel->phy_props;
  1434. struct dsi_parser_utils *utils = &panel->utils;
  1435. const char *name = panel->name;
  1436. rc = utils->read_u32(utils->data,
  1437. "qcom,mdss-pan-physical-width-dimension", &val);
  1438. if (rc) {
  1439. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1440. props->panel_width_mm = 0;
  1441. rc = 0;
  1442. } else {
  1443. props->panel_width_mm = val;
  1444. }
  1445. rc = utils->read_u32(utils->data,
  1446. "qcom,mdss-pan-physical-height-dimension",
  1447. &val);
  1448. if (rc) {
  1449. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1450. props->panel_height_mm = 0;
  1451. rc = 0;
  1452. } else {
  1453. props->panel_height_mm = val;
  1454. }
  1455. str = utils->get_property(utils->data,
  1456. "qcom,mdss-dsi-panel-orientation", NULL);
  1457. if (!str) {
  1458. props->rotation = DSI_PANEL_ROTATE_NONE;
  1459. } else if (!strcmp(str, "180")) {
  1460. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1461. } else if (!strcmp(str, "hflip")) {
  1462. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1463. } else if (!strcmp(str, "vflip")) {
  1464. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1465. } else {
  1466. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1467. rc = -EINVAL;
  1468. goto error;
  1469. }
  1470. error:
  1471. return rc;
  1472. }
  1473. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1474. "qcom,mdss-dsi-pre-on-command",
  1475. "qcom,mdss-dsi-on-command",
  1476. "qcom,vid-on-commands",
  1477. "qcom,cmd-on-commands",
  1478. "qcom,mdss-dsi-post-panel-on-command",
  1479. "qcom,mdss-dsi-pre-off-command",
  1480. "qcom,mdss-dsi-off-command",
  1481. "qcom,mdss-dsi-post-off-command",
  1482. "qcom,mdss-dsi-pre-res-switch",
  1483. "qcom,mdss-dsi-res-switch",
  1484. "qcom,mdss-dsi-post-res-switch",
  1485. "qcom,video-mode-switch-in-commands",
  1486. "qcom,video-mode-switch-out-commands",
  1487. "qcom,cmd-mode-switch-in-commands",
  1488. "qcom,cmd-mode-switch-out-commands",
  1489. "qcom,mdss-dsi-panel-status-command",
  1490. "qcom,mdss-dsi-lp1-command",
  1491. "qcom,mdss-dsi-lp2-command",
  1492. "qcom,mdss-dsi-nolp-command",
  1493. "PPS not parsed from DTSI, generated dynamically",
  1494. "ROI not parsed from DTSI, generated dynamically",
  1495. "qcom,mdss-dsi-timing-switch-command",
  1496. "qcom,mdss-dsi-post-mode-switch-on-command",
  1497. "qcom,mdss-dsi-qsync-on-commands",
  1498. "qcom,mdss-dsi-qsync-off-commands",
  1499. };
  1500. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1501. "qcom,mdss-dsi-pre-on-command-state",
  1502. "qcom,mdss-dsi-on-command-state",
  1503. "qcom,vid-on-commands-state",
  1504. "qcom,cmd-on-commands-state",
  1505. "qcom,mdss-dsi-post-on-command-state",
  1506. "qcom,mdss-dsi-pre-off-command-state",
  1507. "qcom,mdss-dsi-off-command-state",
  1508. "qcom,mdss-dsi-post-off-command-state",
  1509. "qcom,mdss-dsi-pre-res-switch-state",
  1510. "qcom,mdss-dsi-res-switch-state",
  1511. "qcom,mdss-dsi-post-res-switch-state",
  1512. "qcom,video-mode-switch-in-commands-state",
  1513. "qcom,video-mode-switch-out-commands-state",
  1514. "qcom,cmd-mode-switch-in-commands-state",
  1515. "qcom,cmd-mode-switch-out-commands-state",
  1516. "qcom,mdss-dsi-panel-status-command-state",
  1517. "qcom,mdss-dsi-lp1-command-state",
  1518. "qcom,mdss-dsi-lp2-command-state",
  1519. "qcom,mdss-dsi-nolp-command-state",
  1520. "PPS not parsed from DTSI, generated dynamically",
  1521. "ROI not parsed from DTSI, generated dynamically",
  1522. "qcom,mdss-dsi-timing-switch-command-state",
  1523. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1524. "qcom,mdss-dsi-qsync-on-commands-state",
  1525. "qcom,mdss-dsi-qsync-off-commands-state",
  1526. };
  1527. int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1528. {
  1529. const u32 cmd_set_min_size = 7;
  1530. u32 count = 0;
  1531. u32 packet_length;
  1532. u32 tmp;
  1533. while (length >= cmd_set_min_size) {
  1534. packet_length = cmd_set_min_size;
  1535. tmp = ((data[5] << 8) | (data[6]));
  1536. packet_length += tmp;
  1537. if (packet_length > length) {
  1538. DSI_ERR("format error\n");
  1539. return -EINVAL;
  1540. }
  1541. length -= packet_length;
  1542. data += packet_length;
  1543. count++;
  1544. }
  1545. *cnt = count;
  1546. return 0;
  1547. }
  1548. int dsi_panel_create_cmd_packets(const char *data,
  1549. u32 length,
  1550. u32 count,
  1551. struct dsi_cmd_desc *cmd)
  1552. {
  1553. int rc = 0;
  1554. int i, j;
  1555. u8 *payload;
  1556. for (i = 0; i < count; i++) {
  1557. u32 size;
  1558. cmd[i].msg.type = data[0];
  1559. cmd[i].msg.channel = data[2];
  1560. cmd[i].msg.flags |= data[3];
  1561. cmd[i].ctrl = 0;
  1562. cmd[i].post_wait_ms = data[4];
  1563. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1564. if (cmd[i].msg.flags & MIPI_DSI_MSG_BATCH_COMMAND)
  1565. cmd[i].last_command = false;
  1566. else
  1567. cmd[i].last_command = true;
  1568. size = cmd[i].msg.tx_len * sizeof(u8);
  1569. payload = kzalloc(size, GFP_KERNEL);
  1570. if (!payload) {
  1571. rc = -ENOMEM;
  1572. goto error_free_payloads;
  1573. }
  1574. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1575. payload[j] = data[7 + j];
  1576. cmd[i].msg.tx_buf = payload;
  1577. data += (7 + cmd[i].msg.tx_len);
  1578. }
  1579. return rc;
  1580. error_free_payloads:
  1581. for (i = i - 1; i >= 0; i--) {
  1582. cmd--;
  1583. kfree(cmd->msg.tx_buf);
  1584. }
  1585. return rc;
  1586. }
  1587. void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1588. {
  1589. u32 i = 0;
  1590. struct dsi_cmd_desc *cmd;
  1591. for (i = 0; i < set->count; i++) {
  1592. cmd = &set->cmds[i];
  1593. kfree(cmd->msg.tx_buf);
  1594. }
  1595. }
  1596. void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1597. {
  1598. kfree(set->cmds);
  1599. }
  1600. int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1601. u32 packet_count)
  1602. {
  1603. u32 size;
  1604. size = packet_count * sizeof(*cmd->cmds);
  1605. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1606. if (!cmd->cmds)
  1607. return -ENOMEM;
  1608. cmd->count = packet_count;
  1609. return 0;
  1610. }
  1611. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1612. enum dsi_cmd_set_type type,
  1613. struct dsi_parser_utils *utils)
  1614. {
  1615. int rc = 0;
  1616. u32 length = 0;
  1617. const char *data;
  1618. const char *state;
  1619. u32 packet_count = 0;
  1620. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1621. &length);
  1622. if (!data) {
  1623. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1624. rc = -ENOTSUPP;
  1625. goto error;
  1626. }
  1627. DSI_DEBUG("type=%d, name=%s, length=%d\n", type, cmd_set_prop_map[type], length);
  1628. print_hex_dump_debug("", DUMP_PREFIX_NONE, 8, 1, data, length, false);
  1629. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1630. if (rc) {
  1631. DSI_ERR("commands failed, rc=%d\n", rc);
  1632. goto error;
  1633. }
  1634. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1635. packet_count, length);
  1636. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1637. if (rc) {
  1638. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1639. goto error;
  1640. }
  1641. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1642. cmd->cmds);
  1643. if (rc) {
  1644. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1645. goto error_free_mem;
  1646. }
  1647. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1648. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1649. cmd->state = DSI_CMD_SET_STATE_LP;
  1650. } else if (!strcmp(state, "dsi_hs_mode")) {
  1651. cmd->state = DSI_CMD_SET_STATE_HS;
  1652. } else {
  1653. DSI_ERR("[%s] command state unrecognized-%s\n",
  1654. cmd_set_state_map[type], state);
  1655. goto error_free_mem;
  1656. }
  1657. return rc;
  1658. error_free_mem:
  1659. kfree(cmd->cmds);
  1660. cmd->cmds = NULL;
  1661. error:
  1662. return rc;
  1663. }
  1664. static int dsi_panel_parse_cmd_sets(
  1665. struct dsi_display_mode_priv_info *priv_info,
  1666. struct dsi_parser_utils *utils)
  1667. {
  1668. int rc = 0;
  1669. struct dsi_panel_cmd_set *set;
  1670. u32 i;
  1671. if (!priv_info) {
  1672. DSI_ERR("invalid mode priv info\n");
  1673. return -EINVAL;
  1674. }
  1675. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1676. set = &priv_info->cmd_sets[i];
  1677. set->type = i;
  1678. set->count = 0;
  1679. if (i == DSI_CMD_SET_PPS) {
  1680. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1681. if (rc)
  1682. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1683. i, rc);
  1684. set->state = DSI_CMD_SET_STATE_LP;
  1685. } else {
  1686. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1687. if (rc)
  1688. DSI_DEBUG("failed to parse set %d\n", i);
  1689. }
  1690. }
  1691. rc = 0;
  1692. return rc;
  1693. }
  1694. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1695. {
  1696. int rc = 0;
  1697. int i;
  1698. u32 length = 0;
  1699. u32 count = 0;
  1700. u32 size = 0;
  1701. u32 *arr_32 = NULL;
  1702. const u32 *arr;
  1703. struct dsi_parser_utils *utils = &panel->utils;
  1704. struct dsi_reset_seq *seq;
  1705. if (panel->host_config.ext_bridge_mode)
  1706. return 0;
  1707. arr = utils->get_property(utils->data,
  1708. "qcom,mdss-dsi-reset-sequence", &length);
  1709. if (!arr) {
  1710. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1711. rc = -EINVAL;
  1712. goto error;
  1713. }
  1714. if (length & 0x1) {
  1715. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1716. panel->name);
  1717. rc = -EINVAL;
  1718. goto error;
  1719. }
  1720. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1721. length = length / sizeof(u32);
  1722. size = length * sizeof(u32);
  1723. arr_32 = kzalloc(size, GFP_KERNEL);
  1724. if (!arr_32) {
  1725. rc = -ENOMEM;
  1726. goto error;
  1727. }
  1728. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1729. arr_32, length);
  1730. if (rc) {
  1731. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1732. goto error_free_arr_32;
  1733. }
  1734. count = length / 2;
  1735. size = count * sizeof(*seq);
  1736. seq = kzalloc(size, GFP_KERNEL);
  1737. if (!seq) {
  1738. rc = -ENOMEM;
  1739. goto error_free_arr_32;
  1740. }
  1741. panel->reset_config.sequence = seq;
  1742. panel->reset_config.count = count;
  1743. for (i = 0; i < length; i += 2) {
  1744. seq->level = arr_32[i];
  1745. seq->sleep_ms = arr_32[i + 1];
  1746. seq++;
  1747. }
  1748. error_free_arr_32:
  1749. kfree(arr_32);
  1750. error:
  1751. return rc;
  1752. }
  1753. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1754. {
  1755. struct dsi_parser_utils *utils = &panel->utils;
  1756. const char *string;
  1757. int i, rc = 0;
  1758. panel->ulps_feature_enabled =
  1759. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1760. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1761. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1762. panel->ulps_suspend_enabled =
  1763. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1764. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1765. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1766. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1767. "qcom,mdss-dsi-te-using-wd");
  1768. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1769. "qcom,cmd-sync-wait-broadcast");
  1770. panel->lp11_init = utils->read_bool(utils->data,
  1771. "qcom,mdss-dsi-lp11-init");
  1772. panel->reset_gpio_always_on = utils->read_bool(utils->data,
  1773. "qcom,platform-reset-gpio-always-on");
  1774. panel->spr_info.enable = false;
  1775. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1776. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1777. if (!rc) {
  1778. // find match for pack-type string
  1779. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1780. if (msm_spr_pack_type_str[i] &&
  1781. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1782. panel->spr_info.enable = true;
  1783. panel->spr_info.pack_type = i;
  1784. break;
  1785. }
  1786. }
  1787. }
  1788. pr_debug("%s source side spr packing, pack-type %s\n",
  1789. panel->spr_info.enable ? "enable" : "disable",
  1790. panel->spr_info.enable ?
  1791. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1792. return 0;
  1793. }
  1794. static int dsi_panel_parse_jitter_config(
  1795. struct dsi_display_mode *mode,
  1796. struct dsi_parser_utils *utils)
  1797. {
  1798. int rc;
  1799. struct dsi_display_mode_priv_info *priv_info;
  1800. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1801. u64 jitter_val = 0;
  1802. priv_info = mode->priv_info;
  1803. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1804. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1805. if (rc) {
  1806. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1807. } else {
  1808. jitter_val = jitter[0];
  1809. jitter_val = div_u64(jitter_val, jitter[1]);
  1810. }
  1811. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1812. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1813. priv_info->panel_jitter_denom =
  1814. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1815. } else {
  1816. priv_info->panel_jitter_numer = jitter[0];
  1817. priv_info->panel_jitter_denom = jitter[1];
  1818. }
  1819. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1820. &priv_info->panel_prefill_lines);
  1821. if (rc) {
  1822. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1823. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1824. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1825. } else if (priv_info->panel_prefill_lines >=
  1826. DSI_V_TOTAL(&mode->timing)) {
  1827. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1828. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1829. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1830. }
  1831. return 0;
  1832. }
  1833. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1834. {
  1835. int rc = 0;
  1836. char *supply_name;
  1837. if (panel->host_config.ext_bridge_mode)
  1838. return 0;
  1839. if (!strcmp(panel->type, "primary"))
  1840. supply_name = "qcom,panel-supply-entries";
  1841. else
  1842. supply_name = "qcom,panel-sec-supply-entries";
  1843. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1844. &panel->power_info, supply_name);
  1845. if (rc) {
  1846. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1847. goto error;
  1848. }
  1849. error:
  1850. return rc;
  1851. }
  1852. int dsi_panel_get_io_resources(struct dsi_panel *panel,
  1853. struct msm_io_res *io_res)
  1854. {
  1855. struct list_head temp_head;
  1856. struct msm_io_mem_entry *io_mem, *pos, *tmp;
  1857. struct list_head *mem_list = &io_res->mem;
  1858. int i, rc = 0;
  1859. INIT_LIST_HEAD(&temp_head);
  1860. for (i = 0; i < panel->tlmm_gpio_count; i++) {
  1861. io_mem = kzalloc(sizeof(*io_mem), GFP_KERNEL);
  1862. if (!io_mem) {
  1863. rc = -ENOMEM;
  1864. goto parse_fail;
  1865. }
  1866. io_mem->base = panel->tlmm_gpio[i].addr;
  1867. io_mem->size = panel->tlmm_gpio[i].size;
  1868. list_add(&io_mem->list, &temp_head);
  1869. }
  1870. list_splice(&temp_head, mem_list);
  1871. goto end;
  1872. parse_fail:
  1873. list_for_each_entry_safe(pos, tmp, &temp_head, list) {
  1874. list_del(&pos->list);
  1875. kfree(pos);
  1876. }
  1877. end:
  1878. return rc;
  1879. }
  1880. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1881. {
  1882. int rc = 0;
  1883. const char *data;
  1884. struct dsi_parser_utils *utils = &panel->utils;
  1885. char *reset_gpio_name, *mode_set_gpio_name;
  1886. if (!strcmp(panel->type, "primary")) {
  1887. reset_gpio_name = "qcom,platform-reset-gpio";
  1888. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1889. } else {
  1890. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1891. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1892. }
  1893. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1894. reset_gpio_name, 0);
  1895. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1896. !panel->host_config.ext_bridge_mode) {
  1897. DSI_DEBUG("[%s] reset gpio not set, rc=%d\n", panel->name,
  1898. panel->reset_config.reset_gpio);
  1899. }
  1900. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1901. "qcom,5v-boost-gpio",
  1902. 0);
  1903. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1904. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1905. panel->name, rc);
  1906. panel->reset_config.disp_en_gpio =
  1907. utils->get_named_gpio(utils->data,
  1908. "qcom,platform-en-gpio", 0);
  1909. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1910. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1911. panel->name, rc);
  1912. }
  1913. }
  1914. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1915. utils->data, mode_set_gpio_name, 0);
  1916. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1917. DSI_DEBUG("mode gpio not specified\n");
  1918. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1919. data = utils->get_property(utils->data,
  1920. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1921. if (data) {
  1922. if (!strcmp(data, "single_port"))
  1923. panel->reset_config.mode_sel_state =
  1924. MODE_SEL_SINGLE_PORT;
  1925. else if (!strcmp(data, "dual_port"))
  1926. panel->reset_config.mode_sel_state =
  1927. MODE_SEL_DUAL_PORT;
  1928. else if (!strcmp(data, "high"))
  1929. panel->reset_config.mode_sel_state =
  1930. MODE_GPIO_HIGH;
  1931. else if (!strcmp(data, "low"))
  1932. panel->reset_config.mode_sel_state =
  1933. MODE_GPIO_LOW;
  1934. } else {
  1935. /* Set default mode as SPLIT mode */
  1936. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1937. }
  1938. /* TODO: release memory */
  1939. rc = dsi_panel_parse_reset_sequence(panel);
  1940. if (rc) {
  1941. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1942. panel->name, rc);
  1943. goto error;
  1944. }
  1945. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1946. "qcom,mdss-dsi-panel-test-pin",
  1947. 0);
  1948. if (!gpio_is_valid(panel->panel_test_gpio))
  1949. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1950. __LINE__);
  1951. error:
  1952. return rc;
  1953. }
  1954. static int dsi_panel_parse_tlmm_gpio(struct dsi_panel *panel)
  1955. {
  1956. struct dsi_parser_utils *utils = &panel->utils;
  1957. u32 base, size, pin;
  1958. int pin_count, address_count, name_count, i;
  1959. address_count = utils->count_u32_elems(utils->data,
  1960. "qcom,dsi-panel-gpio-address");
  1961. if (address_count != 2) {
  1962. DSI_DEBUG("panel gpio address not defined\n");
  1963. return 0;
  1964. }
  1965. utils->read_u32_index(utils->data,
  1966. "qcom,dsi-panel-gpio-address", 0, &base);
  1967. utils->read_u32_index(utils->data,
  1968. "qcom,dsi-panel-gpio-address", 1, &size);
  1969. pin_count = utils->count_u32_elems(utils->data,
  1970. "qcom,dsi-panel-gpio-pins");
  1971. name_count = utils->count_strings(utils->data,
  1972. "qcom,dsi-panel-gpio-names");
  1973. if ((pin_count < 0) || (name_count < 0) || (pin_count != name_count)) {
  1974. DSI_ERR("invalid gpio pins/names\n");
  1975. return -EINVAL;
  1976. }
  1977. panel->tlmm_gpio = kcalloc(pin_count,
  1978. sizeof(struct dsi_tlmm_gpio), GFP_KERNEL);
  1979. if (!panel->tlmm_gpio)
  1980. return -ENOMEM;
  1981. panel->tlmm_gpio_count = pin_count;
  1982. for (i = 0; i < pin_count; i++) {
  1983. utils->read_u32_index(utils->data,
  1984. "qcom,dsi-panel-gpio-pins", i, &pin);
  1985. panel->tlmm_gpio[i].num = pin;
  1986. panel->tlmm_gpio[i].addr = base + (pin * size);
  1987. panel->tlmm_gpio[i].size = size;
  1988. utils->read_string_index(utils->data,
  1989. "qcom,dsi-panel-gpio-names", i,
  1990. &(panel->tlmm_gpio[i].name));
  1991. }
  1992. return 0;
  1993. }
  1994. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1995. {
  1996. int rc = 0;
  1997. u32 val;
  1998. struct dsi_backlight_config *config = &panel->bl_config;
  1999. struct dsi_parser_utils *utils = &panel->utils;
  2000. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  2001. &val);
  2002. if (rc) {
  2003. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  2004. goto error;
  2005. }
  2006. config->pwm_period_usecs = val;
  2007. error:
  2008. return rc;
  2009. }
  2010. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  2011. {
  2012. int rc = 0;
  2013. u32 val = 0;
  2014. const char *bl_type = NULL;
  2015. const char *data = NULL;
  2016. const char *state = NULL;
  2017. struct dsi_parser_utils *utils = &panel->utils;
  2018. char *bl_name = NULL;
  2019. if (!strcmp(panel->type, "primary"))
  2020. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  2021. else
  2022. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  2023. bl_type = utils->get_property(utils->data, bl_name, NULL);
  2024. if (!bl_type) {
  2025. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2026. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  2027. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  2028. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  2029. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  2030. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  2031. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  2032. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  2033. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  2034. } else {
  2035. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  2036. panel->name, bl_type);
  2037. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2038. }
  2039. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  2040. if (!data) {
  2041. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2042. } else if (!strcmp(data, "delay_until_first_frame")) {
  2043. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  2044. } else {
  2045. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  2046. panel->name, data);
  2047. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2048. }
  2049. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  2050. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  2051. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  2052. if (rc) {
  2053. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  2054. panel->name);
  2055. panel->bl_config.bl_min_level = 0;
  2056. } else {
  2057. panel->bl_config.bl_min_level = val;
  2058. }
  2059. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  2060. if (rc) {
  2061. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  2062. panel->name);
  2063. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  2064. } else {
  2065. panel->bl_config.bl_max_level = val;
  2066. }
  2067. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  2068. &val);
  2069. if (rc) {
  2070. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  2071. panel->name);
  2072. panel->bl_config.brightness_max_level = 255;
  2073. rc = 0;
  2074. } else {
  2075. panel->bl_config.brightness_max_level = val;
  2076. }
  2077. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  2078. "qcom,mdss-dsi-bl-inverted-dbv");
  2079. state = utils->get_property(utils->data, "qcom,bl-dsc-cmd-state", NULL);
  2080. if (!state || !strcmp(state, "dsi_hs_mode"))
  2081. panel->bl_config.lp_mode = false;
  2082. else if (!strcmp(state, "dsi_lp_mode"))
  2083. panel->bl_config.lp_mode = true;
  2084. else
  2085. DSI_ERR("bl-dsc-cmd-state command state unrecognized-%s\n",
  2086. state);
  2087. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  2088. rc = dsi_panel_parse_bl_pwm_config(panel);
  2089. if (rc) {
  2090. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  2091. panel->name, rc);
  2092. goto error;
  2093. }
  2094. }
  2095. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  2096. "qcom,platform-bklight-en-gpio",
  2097. 0);
  2098. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  2099. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  2100. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2101. panel->name, rc);
  2102. rc = -EPROBE_DEFER;
  2103. goto error;
  2104. } else {
  2105. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2106. panel->name, rc);
  2107. rc = 0;
  2108. goto error;
  2109. }
  2110. }
  2111. error:
  2112. return rc;
  2113. }
  2114. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  2115. struct dsi_parser_utils *utils)
  2116. {
  2117. const char *data;
  2118. u32 len, i;
  2119. int rc = 0;
  2120. struct dsi_display_mode_priv_info *priv_info;
  2121. u64 pixel_clk_khz;
  2122. if (!mode || !mode->priv_info)
  2123. return -EINVAL;
  2124. priv_info = mode->priv_info;
  2125. data = utils->get_property(utils->data,
  2126. "qcom,mdss-dsi-panel-phy-timings", &len);
  2127. if (!data) {
  2128. DSI_DEBUG("Unable to read Phy timing settings\n");
  2129. } else {
  2130. priv_info->phy_timing_val =
  2131. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2132. if (!priv_info->phy_timing_val)
  2133. return -EINVAL;
  2134. for (i = 0; i < len; i++)
  2135. priv_info->phy_timing_val[i] = data[i];
  2136. priv_info->phy_timing_len = len;
  2137. }
  2138. if (mode->panel_mode_caps & DSI_OP_VIDEO_MODE) {
  2139. /*
  2140. * For command mode we update the pclk as part of
  2141. * function dsi_panel_calc_dsi_transfer_time( )
  2142. * as we set it based on dsi clock or mdp transfer time.
  2143. */
  2144. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  2145. DSI_V_TOTAL(&mode->timing) *
  2146. mode->timing.refresh_rate);
  2147. do_div(pixel_clk_khz, 1000);
  2148. mode->pixel_clk_khz = pixel_clk_khz;
  2149. }
  2150. return rc;
  2151. }
  2152. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2153. struct dsi_parser_utils *utils)
  2154. {
  2155. u32 data;
  2156. int rc = -EINVAL;
  2157. int intf_width;
  2158. const char *compression;
  2159. struct dsi_display_mode_priv_info *priv_info;
  2160. if (!mode || !mode->priv_info)
  2161. return -EINVAL;
  2162. priv_info = mode->priv_info;
  2163. priv_info->dsc_enabled = false;
  2164. compression = utils->get_property(utils->data,
  2165. "qcom,compression-mode", NULL);
  2166. if (compression && !strcmp(compression, "dsc"))
  2167. priv_info->dsc_enabled = true;
  2168. if (!priv_info->dsc_enabled) {
  2169. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  2170. return 0;
  2171. }
  2172. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2173. if (rc) {
  2174. priv_info->dsc.config.dsc_version_major = 0x1;
  2175. priv_info->dsc.config.dsc_version_minor = 0x1;
  2176. rc = 0;
  2177. } else {
  2178. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2179. * major version information
  2180. */
  2181. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  2182. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  2183. if ((priv_info->dsc.config.dsc_version_major != 0x1) ||
  2184. ((priv_info->dsc.config.dsc_version_minor
  2185. != 0x1) &&
  2186. (priv_info->dsc.config.dsc_version_minor
  2187. != 0x2))) {
  2188. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2189. __func__,
  2190. priv_info->dsc.config.dsc_version_major,
  2191. priv_info->dsc.config.dsc_version_minor
  2192. );
  2193. rc = -EINVAL;
  2194. goto error;
  2195. }
  2196. }
  2197. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2198. if (rc) {
  2199. priv_info->dsc.scr_rev = 0x0;
  2200. rc = 0;
  2201. } else {
  2202. priv_info->dsc.scr_rev = data & 0xff;
  2203. /* only one scr rev supported */
  2204. if (priv_info->dsc.scr_rev > 0x1) {
  2205. DSI_ERR("%s: DSC scr version:%d not supported\n",
  2206. __func__, priv_info->dsc.scr_rev);
  2207. rc = -EINVAL;
  2208. goto error;
  2209. }
  2210. }
  2211. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2212. if (rc) {
  2213. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  2214. goto error;
  2215. }
  2216. priv_info->dsc.config.slice_height = data;
  2217. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2218. if (rc) {
  2219. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2220. goto error;
  2221. }
  2222. priv_info->dsc.config.slice_width = data;
  2223. intf_width = mode->timing.h_active;
  2224. if (intf_width % priv_info->dsc.config.slice_width) {
  2225. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2226. intf_width, priv_info->dsc.config.slice_width);
  2227. rc = -EINVAL;
  2228. goto error;
  2229. }
  2230. priv_info->dsc.config.pic_width = mode->timing.h_active;
  2231. priv_info->dsc.config.pic_height = mode->timing.v_active;
  2232. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2233. if (rc) {
  2234. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2235. goto error;
  2236. } else if (!data || (data > 2)) {
  2237. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2238. goto error;
  2239. }
  2240. priv_info->dsc.slice_per_pkt = data;
  2241. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2242. &data);
  2243. if (rc) {
  2244. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2245. goto error;
  2246. }
  2247. priv_info->dsc.config.bits_per_component = data;
  2248. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2249. if (rc) {
  2250. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2251. data = 0;
  2252. }
  2253. priv_info->dsc.pps_delay_ms = data;
  2254. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2255. &data);
  2256. if (rc) {
  2257. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2258. goto error;
  2259. }
  2260. priv_info->dsc.config.bits_per_pixel = data << 4;
  2261. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2262. &data);
  2263. if (rc) {
  2264. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2265. rc = 0;
  2266. data = MSM_CHROMA_444;
  2267. }
  2268. priv_info->dsc.chroma_format = data;
  2269. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2270. &data);
  2271. if (rc) {
  2272. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2273. rc = 0;
  2274. data = MSM_RGB;
  2275. }
  2276. priv_info->dsc.source_color_space = data;
  2277. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2278. "qcom,mdss-dsc-block-prediction-enable");
  2279. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2280. priv_info->dsc.config.slice_width);
  2281. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2282. priv_info->dsc.scr_rev);
  2283. if (rc) {
  2284. DSI_DEBUG("failed populating dsc params\n");
  2285. rc = -EINVAL;
  2286. goto error;
  2287. }
  2288. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2289. if (rc) {
  2290. DSI_DEBUG("failed populating other dsc params\n");
  2291. rc = -EINVAL;
  2292. goto error;
  2293. }
  2294. priv_info->pclk_scale.numer =
  2295. priv_info->dsc.config.bits_per_pixel >> 4;
  2296. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2297. priv_info->dsc.chroma_format,
  2298. priv_info->dsc.config.bits_per_component);
  2299. mode->timing.dsc_enabled = true;
  2300. mode->timing.dsc = &priv_info->dsc;
  2301. mode->timing.pclk_scale = priv_info->pclk_scale;
  2302. error:
  2303. return rc;
  2304. }
  2305. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2306. struct dsi_parser_utils *utils, int traffic_mode)
  2307. {
  2308. u32 data;
  2309. int rc = -EINVAL;
  2310. const char *compression;
  2311. struct dsi_display_mode_priv_info *priv_info;
  2312. int intf_width;
  2313. if (!mode || !mode->priv_info)
  2314. return -EINVAL;
  2315. priv_info = mode->priv_info;
  2316. priv_info->vdc_enabled = false;
  2317. compression = utils->get_property(utils->data,
  2318. "qcom,compression-mode", NULL);
  2319. if (compression && !strcmp(compression, "vdc"))
  2320. priv_info->vdc_enabled = true;
  2321. if (!priv_info->vdc_enabled) {
  2322. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2323. return 0;
  2324. }
  2325. priv_info->vdc.traffic_mode = traffic_mode;
  2326. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2327. if (rc) {
  2328. priv_info->vdc.version_major = 0x1;
  2329. priv_info->vdc.version_minor = 0x2;
  2330. priv_info->vdc.version_release = 0x0;
  2331. rc = 0;
  2332. } else {
  2333. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2334. * major version information
  2335. */
  2336. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2337. priv_info->vdc.version_minor = data & 0x0F;
  2338. if ((priv_info->vdc.version_major != 0x1) &&
  2339. ((priv_info->vdc.version_minor
  2340. != 0x2))) {
  2341. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2342. __func__,
  2343. priv_info->vdc.version_major,
  2344. priv_info->vdc.version_minor
  2345. );
  2346. rc = -EINVAL;
  2347. goto error;
  2348. }
  2349. }
  2350. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2351. if (rc) {
  2352. priv_info->vdc.version_release = 0x0;
  2353. rc = 0;
  2354. } else {
  2355. priv_info->vdc.version_release = data & 0xff;
  2356. /* only one release version is supported */
  2357. if (priv_info->vdc.version_release != 0x0) {
  2358. DSI_ERR("unsupported vdc release version %d\n",
  2359. priv_info->vdc.version_release);
  2360. rc = -EINVAL;
  2361. goto error;
  2362. }
  2363. }
  2364. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2365. priv_info->vdc.version_major,
  2366. priv_info->vdc.version_minor,
  2367. priv_info->vdc.version_release);
  2368. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2369. if (rc) {
  2370. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2371. goto error;
  2372. }
  2373. priv_info->vdc.slice_height = data;
  2374. /* slice height should be atleast 16 lines */
  2375. if (priv_info->vdc.slice_height < 16) {
  2376. DSI_ERR("invalid slice height %d\n",
  2377. priv_info->vdc.slice_height);
  2378. rc = -EINVAL;
  2379. goto error;
  2380. }
  2381. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2382. if (rc) {
  2383. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2384. goto error;
  2385. }
  2386. priv_info->vdc.slice_width = data;
  2387. /*
  2388. * slide-width should be multiple of 8
  2389. * slice-width should be atlease 64 pixels
  2390. */
  2391. if ((priv_info->vdc.slice_width & 7) ||
  2392. (priv_info->vdc.slice_width < 64)) {
  2393. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2394. rc = -EINVAL;
  2395. goto error;
  2396. }
  2397. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2398. if (rc) {
  2399. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2400. goto error;
  2401. } else if (!data || (data > 2)) {
  2402. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2403. rc = -EINVAL;
  2404. goto error;
  2405. }
  2406. intf_width = mode->timing.h_active;
  2407. priv_info->vdc.slice_per_pkt = data;
  2408. priv_info->vdc.frame_width = mode->timing.h_active;
  2409. priv_info->vdc.frame_height = mode->timing.v_active;
  2410. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2411. &data);
  2412. if (rc) {
  2413. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2414. goto error;
  2415. }
  2416. priv_info->vdc.bits_per_component = data;
  2417. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2418. if (rc) {
  2419. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2420. data = 0;
  2421. }
  2422. priv_info->vdc.pps_delay_ms = data;
  2423. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2424. &data);
  2425. if (rc) {
  2426. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2427. goto error;
  2428. }
  2429. priv_info->vdc.bits_per_pixel = data << 4;
  2430. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2431. &data);
  2432. if (rc) {
  2433. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2434. rc = 0;
  2435. data = MSM_CHROMA_444;
  2436. }
  2437. priv_info->vdc.chroma_format = data;
  2438. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2439. &data);
  2440. if (rc) {
  2441. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2442. rc = 0;
  2443. data = MSM_RGB;
  2444. }
  2445. priv_info->vdc.source_color_space = data;
  2446. rc = sde_vdc_populate_config(&priv_info->vdc,
  2447. intf_width, traffic_mode);
  2448. if (rc) {
  2449. DSI_DEBUG("failed populating vdc config\n");
  2450. rc = -EINVAL;
  2451. goto error;
  2452. }
  2453. priv_info->pclk_scale.numer =
  2454. priv_info->vdc.bits_per_pixel >> 4;
  2455. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2456. priv_info->vdc.chroma_format,
  2457. priv_info->vdc.bits_per_component);
  2458. mode->timing.vdc_enabled = true;
  2459. mode->timing.vdc = &priv_info->vdc;
  2460. mode->timing.pclk_scale = priv_info->pclk_scale;
  2461. error:
  2462. return rc;
  2463. }
  2464. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2465. {
  2466. int rc = 0;
  2467. struct drm_panel_hdr_properties *hdr_prop;
  2468. struct dsi_parser_utils *utils = &panel->utils;
  2469. hdr_prop = &panel->hdr_props;
  2470. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2471. "qcom,mdss-dsi-panel-hdr-enabled");
  2472. if (hdr_prop->hdr_enabled) {
  2473. rc = utils->read_u32_array(utils->data,
  2474. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2475. hdr_prop->display_primaries,
  2476. DISPLAY_PRIMARIES_MAX);
  2477. if (rc) {
  2478. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2479. __func__, __LINE__, rc);
  2480. hdr_prop->hdr_enabled = false;
  2481. return rc;
  2482. }
  2483. rc = utils->read_u32(utils->data,
  2484. "qcom,mdss-dsi-panel-peak-brightness",
  2485. &(hdr_prop->peak_brightness));
  2486. if (rc) {
  2487. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2488. __func__, __LINE__, rc);
  2489. hdr_prop->hdr_enabled = false;
  2490. return rc;
  2491. }
  2492. rc = utils->read_u32(utils->data,
  2493. "qcom,mdss-dsi-panel-blackness-level",
  2494. &(hdr_prop->blackness_level));
  2495. if (rc) {
  2496. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2497. __func__, __LINE__, rc);
  2498. hdr_prop->hdr_enabled = false;
  2499. return rc;
  2500. }
  2501. }
  2502. return 0;
  2503. }
  2504. static int dsi_panel_parse_topology(
  2505. struct dsi_display_mode_priv_info *priv_info,
  2506. struct dsi_parser_utils *utils,
  2507. int topology_override)
  2508. {
  2509. struct msm_display_topology *topology;
  2510. u32 top_count, top_sel, *array = NULL;
  2511. int i, len = 0;
  2512. int rc = -EINVAL;
  2513. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2514. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2515. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2516. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2517. return rc;
  2518. }
  2519. top_count = len / TOPOLOGY_SET_LEN;
  2520. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2521. if (!array)
  2522. return -ENOMEM;
  2523. rc = utils->read_u32_array(utils->data,
  2524. "qcom,display-topology", array, len);
  2525. if (rc) {
  2526. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2527. goto read_fail;
  2528. }
  2529. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2530. if (!topology) {
  2531. rc = -ENOMEM;
  2532. goto read_fail;
  2533. }
  2534. for (i = 0; i < top_count; i++) {
  2535. struct msm_display_topology *top = &topology[i];
  2536. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2537. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2538. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2539. }
  2540. if (topology_override >= 0 && topology_override < top_count) {
  2541. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2542. topology_override,
  2543. topology[topology_override].num_lm,
  2544. topology[topology_override].num_enc,
  2545. topology[topology_override].num_intf);
  2546. top_sel = topology_override;
  2547. goto parse_done;
  2548. }
  2549. rc = utils->read_u32(utils->data,
  2550. "qcom,default-topology-index", &top_sel);
  2551. if (rc) {
  2552. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2553. goto parse_fail;
  2554. }
  2555. if (top_sel >= top_count) {
  2556. rc = -EINVAL;
  2557. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2558. rc);
  2559. goto parse_fail;
  2560. }
  2561. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2562. topology[top_sel].num_lm,
  2563. topology[top_sel].num_enc,
  2564. topology[top_sel].num_intf);
  2565. parse_done:
  2566. memcpy(&priv_info->topology, &topology[top_sel],
  2567. sizeof(struct msm_display_topology));
  2568. parse_fail:
  2569. kfree(topology);
  2570. read_fail:
  2571. kfree(array);
  2572. return rc;
  2573. }
  2574. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2575. struct msm_roi_alignment *align)
  2576. {
  2577. int len = 0, rc = 0;
  2578. u32 value[6];
  2579. struct property *data;
  2580. if (!align)
  2581. return -EINVAL;
  2582. memset(align, 0, sizeof(*align));
  2583. data = utils->find_property(utils->data,
  2584. "qcom,panel-roi-alignment", &len);
  2585. len /= sizeof(u32);
  2586. if (!data) {
  2587. DSI_ERR("panel roi alignment not found\n");
  2588. rc = -EINVAL;
  2589. } else if (len != 6) {
  2590. DSI_ERR("incorrect roi alignment len %d\n", len);
  2591. rc = -EINVAL;
  2592. } else {
  2593. rc = utils->read_u32_array(utils->data,
  2594. "qcom,panel-roi-alignment", value, len);
  2595. if (rc)
  2596. DSI_DEBUG("error reading panel roi alignment values\n");
  2597. else {
  2598. align->xstart_pix_align = value[0];
  2599. align->ystart_pix_align = value[1];
  2600. align->width_pix_align = value[2];
  2601. align->height_pix_align = value[3];
  2602. align->min_width = value[4];
  2603. align->min_height = value[5];
  2604. }
  2605. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2606. align->xstart_pix_align,
  2607. align->width_pix_align,
  2608. align->ystart_pix_align,
  2609. align->height_pix_align,
  2610. align->min_width,
  2611. align->min_height);
  2612. }
  2613. return rc;
  2614. }
  2615. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2616. struct dsi_parser_utils *utils)
  2617. {
  2618. struct msm_roi_caps *roi_caps = NULL;
  2619. const char *data;
  2620. int rc = 0;
  2621. if (!mode || !mode->priv_info) {
  2622. DSI_ERR("invalid arguments\n");
  2623. return -EINVAL;
  2624. }
  2625. roi_caps = &mode->priv_info->roi_caps;
  2626. memset(roi_caps, 0, sizeof(*roi_caps));
  2627. data = utils->get_property(utils->data,
  2628. "qcom,partial-update-enabled", NULL);
  2629. if (data) {
  2630. if (!strcmp(data, "dual_roi"))
  2631. roi_caps->num_roi = 2;
  2632. else if (!strcmp(data, "single_roi"))
  2633. roi_caps->num_roi = 1;
  2634. else {
  2635. DSI_INFO(
  2636. "invalid value for qcom,partial-update-enabled: %s\n",
  2637. data);
  2638. return 0;
  2639. }
  2640. } else {
  2641. DSI_DEBUG("partial update disabled as the property is not set\n");
  2642. return 0;
  2643. }
  2644. roi_caps->merge_rois = utils->read_bool(utils->data,
  2645. "qcom,partial-update-roi-merge");
  2646. roi_caps->enabled = roi_caps->num_roi > 0;
  2647. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2648. roi_caps->enabled);
  2649. if (roi_caps->enabled)
  2650. rc = dsi_panel_parse_roi_alignment(utils,
  2651. &roi_caps->align);
  2652. if (rc)
  2653. memset(roi_caps, 0, sizeof(*roi_caps));
  2654. return rc;
  2655. }
  2656. static bool dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2657. struct dsi_parser_utils *utils)
  2658. {
  2659. if (!mode || !mode->priv_info) {
  2660. DSI_ERR("invalid arguments\n");
  2661. return false;
  2662. }
  2663. if (utils->read_bool(utils->data, "qcom,mdss-dsi-video-mode"))
  2664. mode->panel_mode_caps |= DSI_OP_VIDEO_MODE;
  2665. if (utils->read_bool(utils->data, "qcom,mdss-dsi-cmd-mode"))
  2666. mode->panel_mode_caps |= DSI_OP_CMD_MODE;
  2667. if (!mode->panel_mode_caps)
  2668. return false;
  2669. return true;
  2670. };
  2671. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2672. {
  2673. int dms_enabled;
  2674. const char *data;
  2675. struct dsi_parser_utils *utils = &panel->utils;
  2676. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2677. dms_enabled = utils->read_bool(utils->data,
  2678. "qcom,dynamic-mode-switch-enabled");
  2679. if (!dms_enabled)
  2680. return 0;
  2681. data = utils->get_property(utils->data,
  2682. "qcom,dynamic-mode-switch-type", NULL);
  2683. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2684. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2685. } else {
  2686. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2687. panel->name, data);
  2688. return -EINVAL;
  2689. }
  2690. return 0;
  2691. };
  2692. /*
  2693. * The length of all the valid values to be checked should not be greater
  2694. * than the length of returned data from read command.
  2695. */
  2696. static bool
  2697. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2698. {
  2699. int i;
  2700. struct drm_panel_esd_config *config = &panel->esd_config;
  2701. for (i = 0; i < count; ++i) {
  2702. if (config->status_valid_params[i] >
  2703. config->status_cmds_rlen[i]) {
  2704. DSI_DEBUG("ignore valid params\n");
  2705. return false;
  2706. }
  2707. }
  2708. return true;
  2709. }
  2710. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2711. char *prop_key, u32 **target, u32 cmd_cnt)
  2712. {
  2713. int tmp;
  2714. if (!utils->find_property(utils->data, prop_key, &tmp))
  2715. return false;
  2716. tmp /= sizeof(u32);
  2717. if (tmp != cmd_cnt) {
  2718. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2719. tmp, cmd_cnt);
  2720. return false;
  2721. }
  2722. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2723. if (IS_ERR_OR_NULL(*target)) {
  2724. DSI_ERR("Error allocating memory for property\n");
  2725. return false;
  2726. }
  2727. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2728. DSI_ERR("cannot get values from dts\n");
  2729. kfree(*target);
  2730. *target = NULL;
  2731. return false;
  2732. }
  2733. return true;
  2734. }
  2735. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2736. {
  2737. kfree(esd_config->status_buf);
  2738. kfree(esd_config->return_buf);
  2739. kfree(esd_config->status_value);
  2740. kfree(esd_config->status_valid_params);
  2741. kfree(esd_config->status_cmds_rlen);
  2742. kfree(esd_config->status_cmd.cmds);
  2743. }
  2744. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2745. {
  2746. struct drm_panel_esd_config *esd_config;
  2747. int rc = 0;
  2748. u32 tmp;
  2749. u32 i, status_len, *lenp;
  2750. struct property *data;
  2751. struct dsi_parser_utils *utils = &panel->utils;
  2752. if (!panel) {
  2753. DSI_ERR("Invalid Params\n");
  2754. return -EINVAL;
  2755. }
  2756. esd_config = &panel->esd_config;
  2757. if (!esd_config)
  2758. return -EINVAL;
  2759. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2760. DSI_CMD_SET_PANEL_STATUS, utils);
  2761. if (!esd_config->status_cmd.count) {
  2762. DSI_ERR("panel status command parsing failed\n");
  2763. rc = -EINVAL;
  2764. goto error;
  2765. }
  2766. if (!dsi_panel_parse_esd_status_len(utils,
  2767. "qcom,mdss-dsi-panel-status-read-length",
  2768. &panel->esd_config.status_cmds_rlen,
  2769. esd_config->status_cmd.count)) {
  2770. DSI_ERR("Invalid status read length\n");
  2771. rc = -EINVAL;
  2772. goto error1;
  2773. }
  2774. if (dsi_panel_parse_esd_status_len(utils,
  2775. "qcom,mdss-dsi-panel-status-valid-params",
  2776. &panel->esd_config.status_valid_params,
  2777. esd_config->status_cmd.count)) {
  2778. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2779. esd_config->status_cmd.count)) {
  2780. rc = -EINVAL;
  2781. goto error2;
  2782. }
  2783. }
  2784. status_len = 0;
  2785. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2786. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2787. status_len += lenp[i];
  2788. if (!status_len) {
  2789. rc = -EINVAL;
  2790. goto error2;
  2791. }
  2792. /*
  2793. * Some panel may need multiple read commands to properly
  2794. * check panel status. Do a sanity check for proper status
  2795. * value which will be compared with the value read by dsi
  2796. * controller during ESD check. Also check if multiple read
  2797. * commands are there then, there should be corresponding
  2798. * status check values for each read command.
  2799. */
  2800. data = utils->find_property(utils->data,
  2801. "qcom,mdss-dsi-panel-status-value", &tmp);
  2802. tmp /= sizeof(u32);
  2803. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2804. esd_config->groups = tmp / status_len;
  2805. } else {
  2806. DSI_ERR("error parse panel-status-value\n");
  2807. rc = -EINVAL;
  2808. goto error2;
  2809. }
  2810. esd_config->status_value =
  2811. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2812. GFP_KERNEL);
  2813. if (!esd_config->status_value) {
  2814. rc = -ENOMEM;
  2815. goto error2;
  2816. }
  2817. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2818. sizeof(unsigned char), GFP_KERNEL);
  2819. if (!esd_config->return_buf) {
  2820. rc = -ENOMEM;
  2821. goto error3;
  2822. }
  2823. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2824. if (!esd_config->status_buf) {
  2825. rc = -ENOMEM;
  2826. goto error4;
  2827. }
  2828. rc = utils->read_u32_array(utils->data,
  2829. "qcom,mdss-dsi-panel-status-value",
  2830. esd_config->status_value, esd_config->groups * status_len);
  2831. if (rc) {
  2832. DSI_DEBUG("error reading panel status values\n");
  2833. memset(esd_config->status_value, 0,
  2834. esd_config->groups * status_len);
  2835. }
  2836. return 0;
  2837. error4:
  2838. kfree(esd_config->return_buf);
  2839. error3:
  2840. kfree(esd_config->status_value);
  2841. error2:
  2842. kfree(esd_config->status_valid_params);
  2843. kfree(esd_config->status_cmds_rlen);
  2844. error1:
  2845. kfree(esd_config->status_cmd.cmds);
  2846. error:
  2847. return rc;
  2848. }
  2849. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2850. {
  2851. int rc = 0;
  2852. const char *string;
  2853. struct drm_panel_esd_config *esd_config;
  2854. struct dsi_parser_utils *utils = &panel->utils;
  2855. u8 *esd_mode = NULL;
  2856. esd_config = &panel->esd_config;
  2857. esd_config->status_mode = ESD_MODE_MAX;
  2858. esd_config->esd_enabled = utils->read_bool(utils->data,
  2859. "qcom,esd-check-enabled");
  2860. if (!esd_config->esd_enabled)
  2861. return 0;
  2862. rc = utils->read_string(utils->data,
  2863. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2864. if (!rc) {
  2865. if (!strcmp(string, "bta_check")) {
  2866. esd_config->status_mode = ESD_MODE_SW_BTA;
  2867. } else if (!strcmp(string, "reg_read")) {
  2868. esd_config->status_mode = ESD_MODE_REG_READ;
  2869. } else if (!strcmp(string, "te_signal_check")) {
  2870. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2871. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2872. } else {
  2873. DSI_ERR("TE-ESD not valid for video mode\n");
  2874. rc = -EINVAL;
  2875. goto error;
  2876. }
  2877. } else {
  2878. DSI_ERR("No valid panel-status-check-mode string\n");
  2879. rc = -EINVAL;
  2880. goto error;
  2881. }
  2882. } else {
  2883. DSI_DEBUG("status check method not defined!\n");
  2884. rc = -EINVAL;
  2885. goto error;
  2886. }
  2887. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2888. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2889. if (rc) {
  2890. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2891. rc);
  2892. goto error;
  2893. }
  2894. esd_mode = "register_read";
  2895. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2896. esd_mode = "bta_trigger";
  2897. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2898. esd_mode = "te_check";
  2899. }
  2900. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2901. return 0;
  2902. error:
  2903. panel->esd_config.esd_enabled = false;
  2904. return rc;
  2905. }
  2906. static void dsi_panel_update_util(struct dsi_panel *panel,
  2907. struct device_node *parser_node)
  2908. {
  2909. struct dsi_parser_utils *utils = &panel->utils;
  2910. if (parser_node) {
  2911. *utils = *dsi_parser_get_parser_utils();
  2912. utils->data = parser_node;
  2913. DSI_DEBUG("switching to parser APIs\n");
  2914. goto end;
  2915. }
  2916. *utils = *dsi_parser_get_of_utils();
  2917. utils->data = panel->panel_of_node;
  2918. end:
  2919. utils->node = panel->panel_of_node;
  2920. }
  2921. static int dsi_panel_vm_stub(struct dsi_panel *panel)
  2922. {
  2923. return 0;
  2924. }
  2925. static void dsi_panel_setup_vm_ops(struct dsi_panel *panel, bool trusted_vm_env)
  2926. {
  2927. if (trusted_vm_env) {
  2928. panel->panel_ops.pinctrl_init = dsi_panel_vm_stub;
  2929. panel->panel_ops.gpio_request = dsi_panel_vm_stub;
  2930. panel->panel_ops.pinctrl_deinit = dsi_panel_vm_stub;
  2931. panel->panel_ops.gpio_release = dsi_panel_vm_stub;
  2932. panel->panel_ops.bl_register = dsi_panel_vm_stub;
  2933. panel->panel_ops.bl_unregister = dsi_panel_vm_stub;
  2934. panel->panel_ops.parse_gpios = dsi_panel_vm_stub;
  2935. panel->panel_ops.parse_power_cfg = dsi_panel_vm_stub;
  2936. } else {
  2937. panel->panel_ops.pinctrl_init = dsi_panel_pinctrl_init;
  2938. panel->panel_ops.gpio_request = dsi_panel_gpio_request;
  2939. panel->panel_ops.pinctrl_deinit = dsi_panel_pinctrl_deinit;
  2940. panel->panel_ops.gpio_release = dsi_panel_gpio_release;
  2941. panel->panel_ops.bl_register = dsi_panel_bl_register;
  2942. panel->panel_ops.bl_unregister = dsi_panel_bl_unregister;
  2943. panel->panel_ops.parse_gpios = dsi_panel_parse_gpios;
  2944. panel->panel_ops.parse_power_cfg = dsi_panel_parse_power_cfg;
  2945. }
  2946. }
  2947. struct dsi_panel *dsi_panel_get(struct device *parent,
  2948. struct device_node *of_node,
  2949. struct device_node *parser_node,
  2950. const char *type,
  2951. int topology_override,
  2952. bool trusted_vm_env)
  2953. {
  2954. struct dsi_panel *panel;
  2955. struct dsi_parser_utils *utils;
  2956. const char *panel_physical_type;
  2957. int rc = 0;
  2958. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2959. if (!panel)
  2960. return ERR_PTR(-ENOMEM);
  2961. dsi_panel_setup_vm_ops(panel, trusted_vm_env);
  2962. panel->panel_of_node = of_node;
  2963. panel->parent = parent;
  2964. panel->type = type;
  2965. dsi_panel_update_util(panel, parser_node);
  2966. utils = &panel->utils;
  2967. panel->name = utils->get_property(utils->data,
  2968. "qcom,mdss-dsi-panel-name", NULL);
  2969. if (!panel->name)
  2970. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2971. /*
  2972. * Set panel type to LCD as default.
  2973. */
  2974. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  2975. panel_physical_type = utils->get_property(utils->data,
  2976. "qcom,mdss-dsi-panel-physical-type", NULL);
  2977. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  2978. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  2979. rc = dsi_panel_parse_host_config(panel);
  2980. if (rc) {
  2981. DSI_ERR("failed to parse host configuration, rc=%d\n",
  2982. rc);
  2983. goto error;
  2984. }
  2985. rc = dsi_panel_parse_panel_mode(panel);
  2986. if (rc) {
  2987. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  2988. rc);
  2989. goto error;
  2990. }
  2991. rc = dsi_panel_parse_dfps_caps(panel);
  2992. if (rc)
  2993. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  2994. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2995. if (rc)
  2996. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  2997. rc = dsi_panel_parse_avr_caps(panel, of_node);
  2998. if (rc)
  2999. DSI_ERR("failed to parse AVR features, rc=%d\n", rc);
  3000. rc = dsi_panel_parse_dyn_clk_caps(panel);
  3001. if (rc)
  3002. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  3003. rc = dsi_panel_parse_phy_props(panel);
  3004. if (rc) {
  3005. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  3006. rc);
  3007. goto error;
  3008. }
  3009. rc = panel->panel_ops.parse_gpios(panel);
  3010. if (rc) {
  3011. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  3012. goto error;
  3013. }
  3014. rc = dsi_panel_parse_tlmm_gpio(panel);
  3015. if (rc) {
  3016. DSI_ERR("failed to parse panel tlmm gpios, rc=%d\n", rc);
  3017. goto error;
  3018. }
  3019. rc = panel->panel_ops.parse_power_cfg(panel);
  3020. if (rc)
  3021. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  3022. rc = dsi_panel_parse_bl_config(panel);
  3023. if (rc) {
  3024. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  3025. if (rc == -EPROBE_DEFER)
  3026. goto error;
  3027. }
  3028. rc = dsi_panel_parse_misc_features(panel);
  3029. if (rc)
  3030. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  3031. rc = dsi_panel_parse_hdr_config(panel);
  3032. if (rc)
  3033. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  3034. rc = dsi_panel_get_mode_count(panel);
  3035. if (rc) {
  3036. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  3037. goto error;
  3038. }
  3039. rc = dsi_panel_parse_dms_info(panel);
  3040. if (rc)
  3041. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  3042. rc = dsi_panel_parse_esd_config(panel);
  3043. if (rc)
  3044. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  3045. rc = dsi_panel_vreg_get(panel);
  3046. if (rc) {
  3047. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  3048. panel->name, rc);
  3049. goto error;
  3050. }
  3051. panel->power_mode = SDE_MODE_DPMS_OFF;
  3052. drm_panel_init(&panel->drm_panel, &panel->mipi_device.dev,
  3053. NULL, DRM_MODE_CONNECTOR_DSI);
  3054. panel->mipi_device.dev.of_node = of_node;
  3055. drm_panel_add(&panel->drm_panel);
  3056. mutex_init(&panel->panel_lock);
  3057. return panel;
  3058. error:
  3059. kfree(panel);
  3060. return ERR_PTR(rc);
  3061. }
  3062. void dsi_panel_put(struct dsi_panel *panel)
  3063. {
  3064. drm_panel_remove(&panel->drm_panel);
  3065. /* free resources allocated for ESD check */
  3066. dsi_panel_esd_config_deinit(&panel->esd_config);
  3067. kfree(panel->avr_caps.avr_step_fps_list);
  3068. kfree(panel);
  3069. }
  3070. int dsi_panel_drv_init(struct dsi_panel *panel,
  3071. struct mipi_dsi_host *host)
  3072. {
  3073. int rc = 0;
  3074. struct mipi_dsi_device *dev;
  3075. if (!panel || !host) {
  3076. DSI_ERR("invalid params\n");
  3077. return -EINVAL;
  3078. }
  3079. mutex_lock(&panel->panel_lock);
  3080. dev = &panel->mipi_device;
  3081. dev->host = host;
  3082. /*
  3083. * We dont have device structure since panel is not a device node.
  3084. * When using drm panel framework, the device is probed when the host is
  3085. * create.
  3086. */
  3087. dev->channel = 0;
  3088. dev->lanes = 4;
  3089. panel->host = host;
  3090. rc = panel->panel_ops.pinctrl_init(panel);
  3091. if (rc) {
  3092. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  3093. panel->name, rc);
  3094. goto exit;
  3095. }
  3096. rc = panel->panel_ops.gpio_request(panel);
  3097. if (rc) {
  3098. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  3099. rc);
  3100. goto error_pinctrl_deinit;
  3101. }
  3102. rc = panel->panel_ops.bl_register(panel);
  3103. if (rc) {
  3104. if (rc != -EPROBE_DEFER)
  3105. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  3106. panel->name, rc);
  3107. goto error_gpio_release;
  3108. }
  3109. goto exit;
  3110. error_gpio_release:
  3111. (void)dsi_panel_gpio_release(panel);
  3112. error_pinctrl_deinit:
  3113. (void)dsi_panel_pinctrl_deinit(panel);
  3114. exit:
  3115. mutex_unlock(&panel->panel_lock);
  3116. return rc;
  3117. }
  3118. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  3119. {
  3120. int rc = 0;
  3121. if (!panel) {
  3122. DSI_ERR("invalid params\n");
  3123. return -EINVAL;
  3124. }
  3125. mutex_lock(&panel->panel_lock);
  3126. rc = panel->panel_ops.bl_unregister(panel);
  3127. if (rc)
  3128. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  3129. panel->name, rc);
  3130. rc = panel->panel_ops.gpio_release(panel);
  3131. if (rc)
  3132. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  3133. rc);
  3134. rc = panel->panel_ops.pinctrl_deinit(panel);
  3135. if (rc)
  3136. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  3137. rc);
  3138. rc = dsi_panel_vreg_put(panel);
  3139. if (rc)
  3140. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  3141. kfree(panel->tlmm_gpio);
  3142. panel->host = NULL;
  3143. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  3144. mutex_unlock(&panel->panel_lock);
  3145. return rc;
  3146. }
  3147. int dsi_panel_validate_mode(struct dsi_panel *panel,
  3148. struct dsi_display_mode *mode)
  3149. {
  3150. return 0;
  3151. }
  3152. static int dsi_panel_get_max_res_count(struct dsi_parser_utils *utils,
  3153. struct device_node *node, u32 *dsc_count, u32 *lm_count)
  3154. {
  3155. const char *compression;
  3156. u32 *array = NULL, top_count, len, i;
  3157. int rc = -EINVAL;
  3158. bool dsc_enable = false;
  3159. *dsc_count = 0;
  3160. *lm_count = 0;
  3161. compression = utils->get_property(node, "qcom,compression-mode", NULL);
  3162. if (compression && !strcmp(compression, "dsc"))
  3163. dsc_enable = true;
  3164. len = utils->count_u32_elems(node, "qcom,display-topology");
  3165. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  3166. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY))
  3167. return rc;
  3168. top_count = len / TOPOLOGY_SET_LEN;
  3169. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  3170. if (!array)
  3171. return -ENOMEM;
  3172. rc = utils->read_u32_array(node, "qcom,display-topology", array, len);
  3173. if (rc) {
  3174. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  3175. goto read_fail;
  3176. }
  3177. for (i = 0; i < top_count; i++) {
  3178. *lm_count = max(*lm_count, array[i * TOPOLOGY_SET_LEN]);
  3179. if (dsc_enable)
  3180. *dsc_count = max(*dsc_count,
  3181. array[i * TOPOLOGY_SET_LEN + 1]);
  3182. }
  3183. read_fail:
  3184. kfree(array);
  3185. return 0;
  3186. }
  3187. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  3188. {
  3189. const u32 SINGLE_MODE_SUPPORT = 1;
  3190. struct dsi_parser_utils *utils;
  3191. struct device_node *timings_np, *child_np;
  3192. int num_dfps_rates;
  3193. int num_video_modes = 0, num_cmd_modes = 0;
  3194. int count, rc = 0;
  3195. u32 dsc_count = 0, lm_count = 0;
  3196. if (!panel) {
  3197. DSI_ERR("invalid params\n");
  3198. return -EINVAL;
  3199. }
  3200. utils = &panel->utils;
  3201. panel->num_timing_nodes = 0;
  3202. timings_np = utils->get_child_by_name(utils->data,
  3203. "qcom,mdss-dsi-display-timings");
  3204. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  3205. DSI_ERR("no display timing nodes defined\n");
  3206. rc = -EINVAL;
  3207. goto error;
  3208. }
  3209. count = utils->get_child_count(timings_np);
  3210. if ((!count && !panel->host_config.ext_bridge_mode) ||
  3211. count > DSI_MODE_MAX) {
  3212. DSI_ERR("invalid count of timing nodes: %d\n", count);
  3213. rc = -EINVAL;
  3214. goto error;
  3215. }
  3216. /* No multiresolution support is available for video mode panels.
  3217. * Multi-mode is supported for video mode during POMS is enabled.
  3218. */
  3219. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  3220. !panel->host_config.ext_bridge_mode &&
  3221. !panel->panel_mode_switch_enabled)
  3222. count = SINGLE_MODE_SUPPORT;
  3223. panel->num_timing_nodes = count;
  3224. dsi_for_each_child_node(timings_np, child_np) {
  3225. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  3226. num_video_modes++;
  3227. else if (utils->read_bool(child_np,
  3228. "qcom,mdss-dsi-cmd-mode"))
  3229. num_cmd_modes++;
  3230. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  3231. num_video_modes++;
  3232. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  3233. num_cmd_modes++;
  3234. dsi_panel_get_max_res_count(utils, child_np,
  3235. &dsc_count, &lm_count);
  3236. panel->dsc_count = max(dsc_count, panel->dsc_count);
  3237. panel->lm_count = max(lm_count, panel->lm_count);
  3238. }
  3239. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  3240. panel->dfps_caps.dfps_list_len;
  3241. /*
  3242. * Inflate num_of_modes by fps in dfps.
  3243. * Single command mode for video mode panels supporting
  3244. * panel operating mode switch.
  3245. */
  3246. num_video_modes = num_video_modes * num_dfps_rates;
  3247. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  3248. (panel->panel_mode_switch_enabled))
  3249. num_cmd_modes = 1;
  3250. panel->num_display_modes = num_video_modes + num_cmd_modes;
  3251. error:
  3252. return rc;
  3253. }
  3254. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  3255. struct dsi_panel_phy_props *phy_props)
  3256. {
  3257. int rc = 0;
  3258. if (!panel || !phy_props) {
  3259. DSI_ERR("invalid params\n");
  3260. return -EINVAL;
  3261. }
  3262. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  3263. return rc;
  3264. }
  3265. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  3266. struct dsi_dfps_capabilities *dfps_caps)
  3267. {
  3268. int rc = 0;
  3269. if (!panel || !dfps_caps) {
  3270. DSI_ERR("invalid params\n");
  3271. return -EINVAL;
  3272. }
  3273. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  3274. return rc;
  3275. }
  3276. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  3277. {
  3278. int i;
  3279. if (!mode->priv_info)
  3280. return;
  3281. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  3282. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3283. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3284. }
  3285. kfree(mode->priv_info);
  3286. }
  3287. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  3288. struct dsi_display_mode *mode, u32 frame_threshold_us)
  3289. {
  3290. u32 frame_time_us, nslices;
  3291. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  3292. dsi_transfer_time_us, pixel_clk_khz;
  3293. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3294. struct dsi_mode_info *timing = &mode->timing;
  3295. struct dsi_display_mode *display_mode;
  3296. u32 jitter_numer, jitter_denom, prefill_lines;
  3297. u32 min_threshold_us, prefill_time_us, max_transfer_us, packet_overhead;
  3298. u16 bpp;
  3299. /* Packet overhead in bits,
  3300. * DPHY: 4 bytes header + 2 bytes checksum + 1 byte dcs data command.
  3301. * CPHY: 8 bytes header + 4 bytes checksum + 2 bytes SYNC +
  3302. * 1 byte dcs data command.
  3303. */
  3304. if (config->phy_type & DSI_PHY_TYPE_CPHY)
  3305. packet_overhead = 120;
  3306. else
  3307. packet_overhead = 56;
  3308. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3309. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3310. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3311. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3312. if (timing->refresh_rate >= 120)
  3313. frame_threshold_us = HIGH_REFRESH_RATE_THRESHOLD_TIME_US;
  3314. if (timing->dsc_enabled) {
  3315. nslices = (timing->h_active)/(dsc->config.slice_width);
  3316. /* (slice width x bit-per-pixel + packet overhead) x
  3317. * number of slices x height x fps / lane
  3318. */
  3319. bpp = DSC_BPP(dsc->config);
  3320. bits_per_line = ((dsc->config.slice_width * bpp) +
  3321. packet_overhead) * nslices;
  3322. bits_per_line = bits_per_line / (config->num_data_lanes);
  3323. min_bitclk_hz = (bits_per_line * timing->v_active *
  3324. timing->refresh_rate);
  3325. } else {
  3326. total_active_pixels = ((dsi_h_active_dce(timing)
  3327. * timing->v_active));
  3328. /* calculate the actual bitclk needed to transfer the frame */
  3329. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3330. (config->bpp));
  3331. do_div(min_bitclk_hz, config->num_data_lanes);
  3332. }
  3333. timing->min_dsi_clk_hz = min_bitclk_hz;
  3334. min_threshold_us = mult_frac(frame_time_us,
  3335. jitter_numer, (jitter_denom * 100));
  3336. /*
  3337. * Increase the prefill_lines proportionately as recommended
  3338. * 35lines for 60fps, 52 for 90fps, 70lines for 120fps.
  3339. */
  3340. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3341. timing->refresh_rate, 60);
  3342. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3343. (timing->v_active));
  3344. /*
  3345. * Threshold is sum of panel jitter time, prefill line time
  3346. * plus 64usec buffer time.
  3347. */
  3348. min_threshold_us = min_threshold_us + 64 + prefill_time_us;
  3349. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3350. if (timing->clk_rate_hz) {
  3351. /* adjust the transfer time proportionately for bit clk*/
  3352. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3353. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3354. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3355. } else if (mode->priv_info->mdp_transfer_time_us) {
  3356. max_transfer_us = frame_time_us - min_threshold_us;
  3357. mode->priv_info->mdp_transfer_time_us = min(
  3358. mode->priv_info->mdp_transfer_time_us,
  3359. max_transfer_us);
  3360. timing->dsi_transfer_time_us =
  3361. mode->priv_info->mdp_transfer_time_us;
  3362. } else {
  3363. if (min_threshold_us > frame_threshold_us)
  3364. frame_threshold_us = min_threshold_us;
  3365. timing->dsi_transfer_time_us = frame_time_us -
  3366. frame_threshold_us;
  3367. }
  3368. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3369. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3370. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3371. timing->mdp_transfer_time_us =
  3372. mode->priv_info->mdp_transfer_time_us;
  3373. }
  3374. /* Calculate pclk_khz to update modeinfo */
  3375. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3376. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3377. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3378. do_div(pixel_clk_khz, config->bpp);
  3379. display_mode->pixel_clk_khz = pixel_clk_khz;
  3380. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3381. }
  3382. int dsi_panel_get_mode(struct dsi_panel *panel,
  3383. u32 index, struct dsi_display_mode *mode,
  3384. int topology_override)
  3385. {
  3386. struct device_node *timings_np, *child_np;
  3387. struct dsi_parser_utils *utils;
  3388. struct dsi_display_mode_priv_info *prv_info;
  3389. u32 child_idx = 0;
  3390. int rc = 0, num_timings;
  3391. int traffic_mode;
  3392. void *utils_data = NULL;
  3393. if (!panel || !mode) {
  3394. DSI_ERR("invalid params\n");
  3395. return -EINVAL;
  3396. }
  3397. mutex_lock(&panel->panel_lock);
  3398. utils = &panel->utils;
  3399. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3400. if (!mode->priv_info) {
  3401. rc = -ENOMEM;
  3402. goto done;
  3403. }
  3404. prv_info = mode->priv_info;
  3405. timings_np = utils->get_child_by_name(utils->data,
  3406. "qcom,mdss-dsi-display-timings");
  3407. if (!timings_np) {
  3408. DSI_ERR("no display timing nodes defined\n");
  3409. rc = -EINVAL;
  3410. goto parse_fail;
  3411. }
  3412. num_timings = utils->get_child_count(timings_np);
  3413. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3414. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3415. rc = -EINVAL;
  3416. goto parse_fail;
  3417. }
  3418. utils_data = utils->data;
  3419. traffic_mode = panel->video_config.traffic_mode;
  3420. dsi_for_each_child_node(timings_np, child_np) {
  3421. if (index != child_idx++)
  3422. continue;
  3423. utils->data = child_np;
  3424. if (panel->panel_mode_switch_enabled) {
  3425. if (!dsi_panel_parse_panel_mode_caps(mode, utils)) {
  3426. mode->panel_mode_caps = panel->panel_mode;
  3427. DSI_INFO("panel mode isn't specified in timing[%d]\n",
  3428. child_idx);
  3429. }
  3430. } else {
  3431. mode->panel_mode_caps = panel->panel_mode;
  3432. }
  3433. rc = utils->read_u32(utils->data, "cell-index", &mode->mode_idx);
  3434. if (rc)
  3435. mode->mode_idx = index;
  3436. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3437. if (rc) {
  3438. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3439. goto parse_fail;
  3440. }
  3441. if (panel->dyn_clk_caps.dyn_clk_support) {
  3442. rc = dsi_panel_parse_dyn_clk_list(mode, utils);
  3443. if (rc)
  3444. DSI_ERR("failed to parse dynamic clk rates, rc=%d\n", rc);
  3445. }
  3446. rc = dsi_panel_parse_dsc_params(mode, utils);
  3447. if (rc) {
  3448. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3449. goto parse_fail;
  3450. }
  3451. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode);
  3452. if (rc) {
  3453. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3454. goto parse_fail;
  3455. }
  3456. rc = dsi_panel_parse_topology(prv_info, utils,
  3457. topology_override);
  3458. if (rc) {
  3459. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3460. goto parse_fail;
  3461. }
  3462. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3463. if (rc) {
  3464. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3465. goto parse_fail;
  3466. }
  3467. rc = dsi_panel_parse_jitter_config(mode, utils);
  3468. if (rc)
  3469. DSI_ERR(
  3470. "failed to parse panel jitter config, rc=%d\n", rc);
  3471. rc = dsi_panel_parse_phy_timing(mode, utils);
  3472. if (rc) {
  3473. DSI_ERR(
  3474. "failed to parse panel phy timings, rc=%d\n", rc);
  3475. goto parse_fail;
  3476. }
  3477. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3478. if (rc)
  3479. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3480. }
  3481. goto done;
  3482. parse_fail:
  3483. kfree(mode->priv_info);
  3484. mode->priv_info = NULL;
  3485. done:
  3486. utils->data = utils_data;
  3487. mutex_unlock(&panel->panel_lock);
  3488. return rc;
  3489. }
  3490. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3491. struct dsi_display_mode *mode,
  3492. struct dsi_host_config *config)
  3493. {
  3494. int rc = 0;
  3495. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3496. if (!panel || !mode || !config) {
  3497. DSI_ERR("invalid params\n");
  3498. return -EINVAL;
  3499. }
  3500. mutex_lock(&panel->panel_lock);
  3501. config->panel_mode = panel->panel_mode;
  3502. memcpy(&config->common_config, &panel->host_config,
  3503. sizeof(config->common_config));
  3504. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3505. memcpy(&config->u.video_engine, &panel->video_config,
  3506. sizeof(config->u.video_engine));
  3507. } else {
  3508. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3509. sizeof(config->u.cmd_engine));
  3510. }
  3511. memcpy(&config->video_timing, &mode->timing,
  3512. sizeof(config->video_timing));
  3513. config->video_timing.mdp_transfer_time_us =
  3514. mode->priv_info->mdp_transfer_time_us;
  3515. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3516. config->video_timing.dsc = &mode->priv_info->dsc;
  3517. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3518. config->video_timing.vdc = &mode->priv_info->vdc;
  3519. if (dyn_clk_caps->dyn_clk_support)
  3520. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3521. else
  3522. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3523. config->esc_clk_rate_hz = 19200000;
  3524. mutex_unlock(&panel->panel_lock);
  3525. return rc;
  3526. }
  3527. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3528. {
  3529. int rc = 0;
  3530. if (!panel) {
  3531. DSI_ERR("invalid params\n");
  3532. return -EINVAL;
  3533. }
  3534. mutex_lock(&panel->panel_lock);
  3535. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3536. if (panel->lp11_init)
  3537. goto error;
  3538. rc = dsi_panel_power_on(panel);
  3539. if (rc) {
  3540. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3541. goto error;
  3542. }
  3543. error:
  3544. mutex_unlock(&panel->panel_lock);
  3545. return rc;
  3546. }
  3547. int dsi_panel_update_pps(struct dsi_panel *panel)
  3548. {
  3549. int rc = 0;
  3550. struct dsi_panel_cmd_set *set = NULL;
  3551. struct dsi_display_mode_priv_info *priv_info = NULL;
  3552. if (!panel || !panel->cur_mode) {
  3553. DSI_ERR("invalid params\n");
  3554. return -EINVAL;
  3555. }
  3556. mutex_lock(&panel->panel_lock);
  3557. priv_info = panel->cur_mode->priv_info;
  3558. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3559. if (priv_info->dsc_enabled)
  3560. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3561. panel->dce_pps_cmd, 0,
  3562. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3563. else if (priv_info->vdc_enabled)
  3564. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3565. panel->dce_pps_cmd, 0,
  3566. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3567. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3568. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3569. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3570. if (rc) {
  3571. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3572. goto error;
  3573. }
  3574. }
  3575. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3576. if (rc) {
  3577. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3578. panel->name, rc);
  3579. }
  3580. dsi_panel_destroy_cmd_packets(set);
  3581. error:
  3582. mutex_unlock(&panel->panel_lock);
  3583. return rc;
  3584. }
  3585. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3586. {
  3587. int rc = 0;
  3588. if (!panel) {
  3589. DSI_ERR("invalid params\n");
  3590. return -EINVAL;
  3591. }
  3592. mutex_lock(&panel->panel_lock);
  3593. if (!panel->panel_initialized)
  3594. goto exit;
  3595. /*
  3596. * Consider LP1->LP2->LP1.
  3597. * If the panel is already in LP mode, do not need to
  3598. * set the regulator.
  3599. * IBB and AB power mode would be set at the same time
  3600. * in PMIC driver, so we only call ibb setting that is enough.
  3601. */
  3602. if (dsi_panel_is_type_oled(panel) &&
  3603. panel->power_mode != SDE_MODE_DPMS_LP2)
  3604. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3605. "ibb", REGULATOR_MODE_IDLE);
  3606. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3607. if (rc)
  3608. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3609. panel->name, rc);
  3610. exit:
  3611. mutex_unlock(&panel->panel_lock);
  3612. return rc;
  3613. }
  3614. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3615. {
  3616. int rc = 0;
  3617. if (!panel) {
  3618. DSI_ERR("invalid params\n");
  3619. return -EINVAL;
  3620. }
  3621. mutex_lock(&panel->panel_lock);
  3622. if (!panel->panel_initialized)
  3623. goto exit;
  3624. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3625. if (rc)
  3626. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3627. panel->name, rc);
  3628. exit:
  3629. mutex_unlock(&panel->panel_lock);
  3630. return rc;
  3631. }
  3632. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3633. {
  3634. int rc = 0;
  3635. if (!panel) {
  3636. DSI_ERR("invalid params\n");
  3637. return -EINVAL;
  3638. }
  3639. mutex_lock(&panel->panel_lock);
  3640. if (!panel->panel_initialized)
  3641. goto exit;
  3642. /*
  3643. * Consider about LP1->LP2->NOLP.
  3644. */
  3645. if (dsi_panel_is_type_oled(panel) &&
  3646. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3647. panel->power_mode == SDE_MODE_DPMS_LP2))
  3648. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3649. "ibb", REGULATOR_MODE_NORMAL);
  3650. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3651. if (rc)
  3652. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3653. panel->name, rc);
  3654. exit:
  3655. mutex_unlock(&panel->panel_lock);
  3656. return rc;
  3657. }
  3658. int dsi_panel_prepare(struct dsi_panel *panel)
  3659. {
  3660. int rc = 0;
  3661. if (!panel) {
  3662. DSI_ERR("invalid params\n");
  3663. return -EINVAL;
  3664. }
  3665. mutex_lock(&panel->panel_lock);
  3666. if (panel->lp11_init) {
  3667. rc = dsi_panel_power_on(panel);
  3668. if (rc) {
  3669. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3670. panel->name, rc);
  3671. goto error;
  3672. }
  3673. }
  3674. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3675. if (rc) {
  3676. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3677. panel->name, rc);
  3678. goto error;
  3679. }
  3680. error:
  3681. mutex_unlock(&panel->panel_lock);
  3682. return rc;
  3683. }
  3684. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3685. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3686. {
  3687. static const int ROI_CMD_LEN = 5;
  3688. int rc = 0;
  3689. /* DTYPE_DCS_LWRITE */
  3690. char *caset, *paset;
  3691. set->cmds = NULL;
  3692. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3693. if (!caset) {
  3694. rc = -ENOMEM;
  3695. goto exit;
  3696. }
  3697. caset[0] = 0x2a;
  3698. caset[1] = (roi->x & 0xFF00) >> 8;
  3699. caset[2] = roi->x & 0xFF;
  3700. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3701. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3702. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3703. if (!paset) {
  3704. rc = -ENOMEM;
  3705. goto error_free_mem;
  3706. }
  3707. paset[0] = 0x2b;
  3708. paset[1] = (roi->y & 0xFF00) >> 8;
  3709. paset[2] = roi->y & 0xFF;
  3710. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3711. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3712. set->type = DSI_CMD_SET_ROI;
  3713. set->state = DSI_CMD_SET_STATE_LP;
  3714. set->count = 2; /* send caset + paset together */
  3715. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3716. if (!set->cmds) {
  3717. rc = -ENOMEM;
  3718. goto error_free_mem;
  3719. }
  3720. set->cmds[0].msg.channel = 0;
  3721. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3722. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3723. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3724. set->cmds[0].msg.tx_buf = caset;
  3725. set->cmds[0].msg.rx_len = 0;
  3726. set->cmds[0].msg.rx_buf = 0;
  3727. set->cmds[0].last_command = 0;
  3728. set->cmds[0].post_wait_ms = 0;
  3729. set->cmds[0].ctrl = unicast ? ctrl_idx : 0;
  3730. set->cmds[1].msg.channel = 0;
  3731. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3732. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3733. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3734. set->cmds[1].msg.tx_buf = paset;
  3735. set->cmds[1].msg.rx_len = 0;
  3736. set->cmds[1].msg.rx_buf = 0;
  3737. set->cmds[1].last_command = 1;
  3738. set->cmds[1].post_wait_ms = 0;
  3739. set->cmds[1].ctrl = unicast ? ctrl_idx : 0;
  3740. goto exit;
  3741. error_free_mem:
  3742. kfree(caset);
  3743. kfree(paset);
  3744. kfree(set->cmds);
  3745. exit:
  3746. return rc;
  3747. }
  3748. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3749. int ctrl_idx)
  3750. {
  3751. int rc = 0;
  3752. if (!panel) {
  3753. DSI_ERR("invalid params\n");
  3754. return -EINVAL;
  3755. }
  3756. mutex_lock(&panel->panel_lock);
  3757. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3758. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3759. if (rc)
  3760. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3761. panel->name, rc);
  3762. mutex_unlock(&panel->panel_lock);
  3763. return rc;
  3764. }
  3765. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3766. int ctrl_idx)
  3767. {
  3768. int rc = 0;
  3769. if (!panel) {
  3770. DSI_ERR("invalid params\n");
  3771. return -EINVAL;
  3772. }
  3773. mutex_lock(&panel->panel_lock);
  3774. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3775. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3776. if (rc)
  3777. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3778. panel->name, rc);
  3779. mutex_unlock(&panel->panel_lock);
  3780. return rc;
  3781. }
  3782. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3783. struct dsi_rect *roi)
  3784. {
  3785. int rc = 0;
  3786. struct dsi_panel_cmd_set *set;
  3787. struct dsi_display_mode_priv_info *priv_info;
  3788. if (!panel || !panel->cur_mode) {
  3789. DSI_ERR("Invalid params\n");
  3790. return -EINVAL;
  3791. }
  3792. priv_info = panel->cur_mode->priv_info;
  3793. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3794. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3795. if (rc) {
  3796. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3797. panel->name, rc);
  3798. return rc;
  3799. }
  3800. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3801. roi->x, roi->y, roi->w, roi->h);
  3802. SDE_EVT32(roi->x, roi->y, roi->w, roi->h);
  3803. mutex_lock(&panel->panel_lock);
  3804. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3805. if (rc)
  3806. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3807. panel->name, rc);
  3808. mutex_unlock(&panel->panel_lock);
  3809. dsi_panel_destroy_cmd_packets(set);
  3810. dsi_panel_dealloc_cmd_packets(set);
  3811. return rc;
  3812. }
  3813. int dsi_panel_switch_cmd_mode_out(struct dsi_panel *panel)
  3814. {
  3815. int rc = 0;
  3816. if (!panel) {
  3817. DSI_ERR("Invalid params\n");
  3818. return -EINVAL;
  3819. }
  3820. mutex_lock(&panel->panel_lock);
  3821. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_OUT);
  3822. if (rc)
  3823. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_OUT cmds, rc=%d\n",
  3824. panel->name, rc);
  3825. mutex_unlock(&panel->panel_lock);
  3826. return rc;
  3827. }
  3828. int dsi_panel_switch_video_mode_out(struct dsi_panel *panel)
  3829. {
  3830. int rc = 0;
  3831. if (!panel) {
  3832. DSI_ERR("Invalid params\n");
  3833. return -EINVAL;
  3834. }
  3835. mutex_lock(&panel->panel_lock);
  3836. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_OUT);
  3837. if (rc)
  3838. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_OUT cmds, rc=%d\n",
  3839. panel->name, rc);
  3840. mutex_unlock(&panel->panel_lock);
  3841. return rc;
  3842. }
  3843. int dsi_panel_switch_video_mode_in(struct dsi_panel *panel)
  3844. {
  3845. int rc = 0;
  3846. if (!panel) {
  3847. DSI_ERR("Invalid params\n");
  3848. return -EINVAL;
  3849. }
  3850. mutex_lock(&panel->panel_lock);
  3851. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_IN);
  3852. if (rc)
  3853. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_IN cmds, rc=%d\n",
  3854. panel->name, rc);
  3855. mutex_unlock(&panel->panel_lock);
  3856. return rc;
  3857. }
  3858. int dsi_panel_switch_cmd_mode_in(struct dsi_panel *panel)
  3859. {
  3860. int rc = 0;
  3861. if (!panel) {
  3862. DSI_ERR("Invalid params\n");
  3863. return -EINVAL;
  3864. }
  3865. mutex_lock(&panel->panel_lock);
  3866. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_IN);
  3867. if (rc)
  3868. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_IN cmds, rc=%d\n",
  3869. panel->name, rc);
  3870. mutex_unlock(&panel->panel_lock);
  3871. return rc;
  3872. }
  3873. int dsi_panel_switch(struct dsi_panel *panel)
  3874. {
  3875. int rc = 0;
  3876. if (!panel) {
  3877. DSI_ERR("Invalid params\n");
  3878. return -EINVAL;
  3879. }
  3880. mutex_lock(&panel->panel_lock);
  3881. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3882. if (rc)
  3883. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3884. panel->name, rc);
  3885. mutex_unlock(&panel->panel_lock);
  3886. return rc;
  3887. }
  3888. int dsi_panel_post_switch(struct dsi_panel *panel)
  3889. {
  3890. int rc = 0;
  3891. if (!panel) {
  3892. DSI_ERR("Invalid params\n");
  3893. return -EINVAL;
  3894. }
  3895. mutex_lock(&panel->panel_lock);
  3896. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3897. if (rc)
  3898. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3899. panel->name, rc);
  3900. mutex_unlock(&panel->panel_lock);
  3901. return rc;
  3902. }
  3903. int dsi_panel_enable(struct dsi_panel *panel)
  3904. {
  3905. int rc = 0;
  3906. if (!panel) {
  3907. DSI_ERR("Invalid params\n");
  3908. return -EINVAL;
  3909. }
  3910. mutex_lock(&panel->panel_lock);
  3911. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3912. if (rc) {
  3913. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3914. panel->name, rc);
  3915. goto error;
  3916. }
  3917. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  3918. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_ON);
  3919. if (rc) {
  3920. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_ON cmds, rc=%d\n",
  3921. panel->name, rc);
  3922. goto error;
  3923. }
  3924. } else if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3925. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_ON);
  3926. if (rc) {
  3927. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_ON cmds, rc=%d\n",
  3928. panel->name, rc);
  3929. goto error;
  3930. }
  3931. }
  3932. panel->panel_initialized = true;
  3933. error:
  3934. mutex_unlock(&panel->panel_lock);
  3935. return rc;
  3936. }
  3937. int dsi_panel_post_enable(struct dsi_panel *panel)
  3938. {
  3939. int rc = 0;
  3940. if (!panel) {
  3941. DSI_ERR("invalid params\n");
  3942. return -EINVAL;
  3943. }
  3944. mutex_lock(&panel->panel_lock);
  3945. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3946. if (rc) {
  3947. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3948. panel->name, rc);
  3949. goto error;
  3950. }
  3951. error:
  3952. mutex_unlock(&panel->panel_lock);
  3953. return rc;
  3954. }
  3955. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3956. {
  3957. int rc = 0;
  3958. if (!panel) {
  3959. DSI_ERR("invalid params\n");
  3960. return -EINVAL;
  3961. }
  3962. mutex_lock(&panel->panel_lock);
  3963. if (gpio_is_valid(panel->bl_config.en_gpio))
  3964. gpio_set_value(panel->bl_config.en_gpio, 0);
  3965. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3966. if (rc) {
  3967. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3968. panel->name, rc);
  3969. goto error;
  3970. }
  3971. error:
  3972. mutex_unlock(&panel->panel_lock);
  3973. return rc;
  3974. }
  3975. int dsi_panel_disable(struct dsi_panel *panel)
  3976. {
  3977. int rc = 0;
  3978. if (!panel) {
  3979. DSI_ERR("invalid params\n");
  3980. return -EINVAL;
  3981. }
  3982. mutex_lock(&panel->panel_lock);
  3983. /* Avoid sending panel off commands when ESD recovery is underway */
  3984. if (!atomic_read(&panel->esd_recovery_pending)) {
  3985. /*
  3986. * Need to set IBB/AB regulator mode to STANDBY,
  3987. * if panel is going off from AOD mode.
  3988. */
  3989. if (dsi_panel_is_type_oled(panel) &&
  3990. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3991. panel->power_mode == SDE_MODE_DPMS_LP2))
  3992. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3993. "ibb", REGULATOR_MODE_STANDBY);
  3994. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3995. if (rc) {
  3996. /*
  3997. * Sending panel off commands may fail when DSI
  3998. * controller is in a bad state. These failures can be
  3999. * ignored since controller will go for full reset on
  4000. * subsequent display enable anyway.
  4001. */
  4002. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  4003. panel->name, rc);
  4004. rc = 0;
  4005. }
  4006. }
  4007. panel->panel_initialized = false;
  4008. panel->power_mode = SDE_MODE_DPMS_OFF;
  4009. mutex_unlock(&panel->panel_lock);
  4010. return rc;
  4011. }
  4012. int dsi_panel_unprepare(struct dsi_panel *panel)
  4013. {
  4014. int rc = 0;
  4015. if (!panel) {
  4016. DSI_ERR("invalid params\n");
  4017. return -EINVAL;
  4018. }
  4019. mutex_lock(&panel->panel_lock);
  4020. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  4021. if (rc) {
  4022. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  4023. panel->name, rc);
  4024. goto error;
  4025. }
  4026. error:
  4027. mutex_unlock(&panel->panel_lock);
  4028. return rc;
  4029. }
  4030. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  4031. {
  4032. int rc = 0;
  4033. if (!panel) {
  4034. DSI_ERR("invalid params\n");
  4035. return -EINVAL;
  4036. }
  4037. mutex_lock(&panel->panel_lock);
  4038. rc = dsi_panel_power_off(panel);
  4039. if (rc) {
  4040. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  4041. panel->name, rc);
  4042. goto error;
  4043. }
  4044. error:
  4045. mutex_unlock(&panel->panel_lock);
  4046. return rc;
  4047. }