wcd937x.c 67 KB

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  1. /*
  2. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/slab.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/device.h>
  17. #include <linux/delay.h>
  18. #include <linux/kernel.h>
  19. #include <linux/component.h>
  20. #include <sound/soc.h>
  21. #include <sound/tlv.h>
  22. #include <soc/soundwire.h>
  23. #include <linux/regmap.h>
  24. #include <sound/soc.h>
  25. #include <sound/soc-dapm.h>
  26. #include "internal.h"
  27. #include "../wcdcal-hwdep.h"
  28. #include "wcd937x-registers.h"
  29. #include "../msm-cdc-pinctrl.h"
  30. #include <dt-bindings/sound/audio-codec-port-types.h>
  31. #include "../msm-cdc-supply.h"
  32. #define WCD9370_VARIANT 0
  33. #define WCD9375_VARIANT 5
  34. #define NUM_SWRS_DT_PARAMS 5
  35. #define WCD937X_VERSION_1_0 1
  36. #define WCD937X_VERSION_ENTRY_SIZE 32
  37. enum {
  38. CODEC_TX = 0,
  39. CODEC_RX,
  40. };
  41. static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
  42. static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
  43. static int wcd937x_handle_post_irq(void *data);
  44. static int wcd937x_reset(struct device *dev);
  45. static int wcd937x_reset_low(struct device *dev);
  46. static const struct regmap_irq wcd937x_irqs[WCD937X_NUM_IRQS] = {
  47. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_BUTTON_PRESS_DET, 0, 0x01),
  48. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_BUTTON_RELEASE_DET, 0, 0x02),
  49. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_ELECT_INS_REM_DET, 0, 0x04),
  50. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_ELECT_INS_REM_LEG_DET, 0, 0x08),
  51. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_SW_DET, 0, 0x10),
  52. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_OCP_INT, 0, 0x20),
  53. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_CNP_INT, 0, 0x40),
  54. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_OCP_INT, 0, 0x80),
  55. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_CNP_INT, 1, 0x01),
  56. REGMAP_IRQ_REG(WCD937X_IRQ_EAR_CNP_INT, 1, 0x02),
  57. REGMAP_IRQ_REG(WCD937X_IRQ_EAR_SCD_INT, 1, 0x04),
  58. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_CNP_INT, 1, 0x08),
  59. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_SCD_INT, 1, 0x10),
  60. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_PDM_WD_INT, 1, 0x20),
  61. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_PDM_WD_INT, 1, 0x40),
  62. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_PDM_WD_INT, 1, 0x80),
  63. REGMAP_IRQ_REG(WCD937X_IRQ_LDORT_SCD_INT, 2, 0x01),
  64. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_MOISTURE_INT, 2, 0x02),
  65. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_SURGE_DET_INT, 2, 0x04),
  66. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_SURGE_DET_INT, 2, 0x08),
  67. };
  68. static struct regmap_irq_chip wcd937x_regmap_irq_chip = {
  69. .name = "wcd937x",
  70. .irqs = wcd937x_irqs,
  71. .num_irqs = ARRAY_SIZE(wcd937x_irqs),
  72. .num_regs = 3,
  73. .status_base = WCD937X_DIGITAL_INTR_STATUS_0,
  74. .mask_base = WCD937X_DIGITAL_INTR_MASK_0,
  75. .type_base = WCD937X_DIGITAL_INTR_LEVEL_0,
  76. .runtime_pm = false,
  77. .handle_post_irq = wcd937x_handle_post_irq,
  78. .irq_drv_data = NULL,
  79. };
  80. static int wcd937x_handle_post_irq(void *data)
  81. {
  82. struct wcd937x_priv *wcd937x = data;
  83. int val = 0;
  84. struct wcd937x_pdata *pdata = NULL;
  85. pdata = dev_get_platdata(wcd937x->dev);
  86. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_0, &val);
  87. dev_dbg(wcd937x->dev, "%s Clear OCP interupts\n", __func__);
  88. regmap_write(wcd937x->regmap,
  89. WCD937X_DIGITAL_INTR_CLEAR_0, 0xFF);
  90. regmap_write(wcd937x->regmap,
  91. WCD937X_DIGITAL_INTR_CLEAR_0, 0x0);
  92. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_1, &val);
  93. dev_dbg(wcd937x->dev, "%s Clear SCD interupts\n", __func__);
  94. regmap_write(wcd937x->regmap,
  95. WCD937X_DIGITAL_INTR_CLEAR_1, 0xFF);
  96. regmap_write(wcd937x->regmap,
  97. WCD937X_DIGITAL_INTR_CLEAR_1, 0x0);
  98. regmap_write(wcd937x->regmap,
  99. WCD937X_DIGITAL_INTR_CLEAR_2, 0xFF);
  100. regmap_write(wcd937x->regmap,
  101. WCD937X_DIGITAL_INTR_CLEAR_2, 0x0);
  102. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_0, &val);
  103. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_1, &val);
  104. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_2, &val);
  105. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_CLEAR_0, &val);
  106. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_CLEAR_1, &val);
  107. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_CLEAR_2, &val);
  108. return IRQ_HANDLED;
  109. }
  110. static int wcd937x_init_reg(struct snd_soc_codec *codec)
  111. {
  112. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x0E, 0x0E);
  113. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x80, 0x80);
  114. usleep_range(1000, 1010);
  115. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x40, 0x40);
  116. usleep_range(1000, 1010);
  117. snd_soc_update_bits(codec, WCD937X_LDORXTX_CONFIG, 0x10, 0x00);
  118. snd_soc_update_bits(codec, WCD937X_BIAS_VBG_FINE_ADJ, 0xF0, 0x80);
  119. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x80, 0x80);
  120. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x40, 0x40);
  121. usleep_range(10000, 10010);
  122. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x40, 0x00);
  123. return 0;
  124. }
  125. static int wcd937x_set_port_params(struct snd_soc_codec *codec, u8 slv_prt_type,
  126. u8 *port_id, u8 *num_ch, u8 *ch_mask, u32 *ch_rate,
  127. u8 *port_type, u8 path)
  128. {
  129. int i, j;
  130. u8 num_ports = 0;
  131. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  132. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  133. switch (path) {
  134. case CODEC_RX:
  135. map = &wcd937x->rx_port_mapping;
  136. num_ports = wcd937x->num_rx_ports;
  137. break;
  138. case CODEC_TX:
  139. map = &wcd937x->tx_port_mapping;
  140. num_ports = wcd937x->num_tx_ports;
  141. break;
  142. }
  143. for (i = 0; i <= num_ports; i++) {
  144. for (j = 0; j < MAX_CH_PER_PORT; j++) {
  145. if ((*map)[i][j].slave_port_type == slv_prt_type)
  146. goto found;
  147. }
  148. }
  149. found:
  150. if (i > num_ports || j == MAX_CH_PER_PORT) {
  151. dev_err(codec->dev, "%s Failed to find slave port for type %u\n",
  152. __func__, slv_prt_type);
  153. return -EINVAL;
  154. }
  155. *port_id = i;
  156. *num_ch = (*map)[i][j].num_ch;
  157. *ch_mask = (*map)[i][j].ch_mask;
  158. *ch_rate = (*map)[i][j].ch_rate;
  159. *port_type = (*map)[i][j].master_port_type;
  160. return 0;
  161. }
  162. static int wcd937x_parse_port_mapping(struct device *dev,
  163. char *prop, u8 path)
  164. {
  165. u32 *dt_array, map_size, map_length;
  166. u32 port_num, ch_mask, ch_rate, old_port_num = 0;
  167. u32 slave_port_type, master_port_type;
  168. u32 i, ch_iter = 0;
  169. int ret = 0;
  170. u8 *num_ports = NULL;
  171. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  172. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  173. switch (path) {
  174. case CODEC_RX:
  175. map = &wcd937x->rx_port_mapping;
  176. num_ports = &wcd937x->num_rx_ports;
  177. break;
  178. case CODEC_TX:
  179. map = &wcd937x->tx_port_mapping;
  180. num_ports = &wcd937x->num_tx_ports;
  181. break;
  182. }
  183. if (!of_find_property(dev->of_node, prop,
  184. &map_size)) {
  185. dev_err(dev, "missing port mapping prop %s\n", prop);
  186. goto err_pdata_fail;
  187. }
  188. map_length = map_size / (NUM_SWRS_DT_PARAMS * sizeof(u32));
  189. dt_array = kzalloc(map_size, GFP_KERNEL);
  190. if (!dt_array) {
  191. ret = -ENOMEM;
  192. goto err_pdata_fail;
  193. }
  194. ret = of_property_read_u32_array(dev->of_node, prop, dt_array,
  195. NUM_SWRS_DT_PARAMS * map_length);
  196. if (ret) {
  197. dev_err(dev, "%s: Failed to read port mapping from prop %s\n",
  198. __func__, prop);
  199. goto err_pdata_fail;
  200. }
  201. for (i = 0; i < map_length; i++) {
  202. port_num = dt_array[NUM_SWRS_DT_PARAMS * i];
  203. slave_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 1];
  204. ch_mask = dt_array[NUM_SWRS_DT_PARAMS * i + 2];
  205. ch_rate = dt_array[NUM_SWRS_DT_PARAMS * i + 3];
  206. master_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 4];
  207. if (port_num != old_port_num)
  208. ch_iter = 0;
  209. (*map)[port_num][ch_iter].slave_port_type = slave_port_type;
  210. (*map)[port_num][ch_iter].ch_mask = ch_mask;
  211. (*map)[port_num][ch_iter].master_port_type = master_port_type;
  212. (*map)[port_num][ch_iter].num_ch = __sw_hweight8(ch_mask);
  213. (*map)[port_num][ch_iter++].ch_rate = ch_rate;
  214. old_port_num = port_num;
  215. }
  216. *num_ports = port_num;
  217. kfree(dt_array);
  218. return 0;
  219. err_pdata_fail:
  220. kfree(dt_array);
  221. return -EINVAL;
  222. }
  223. static int wcd937x_tx_connect_port(struct snd_soc_codec *codec,
  224. u8 slv_port_type, u8 enable)
  225. {
  226. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  227. u8 port_id;
  228. u8 num_ch;
  229. u8 ch_mask;
  230. u32 ch_rate;
  231. u8 port_type;
  232. u8 num_port = 1;
  233. int ret = 0;
  234. ret = wcd937x_set_port_params(codec, slv_port_type, &port_id,
  235. &num_ch, &ch_mask, &ch_rate,
  236. &port_type, CODEC_TX);
  237. if (ret)
  238. return ret;
  239. if (enable)
  240. ret = swr_connect_port(wcd937x->tx_swr_dev, &port_id,
  241. num_port, &ch_mask, &ch_rate,
  242. &num_ch, &port_type);
  243. else
  244. ret = swr_disconnect_port(wcd937x->tx_swr_dev, &port_id,
  245. num_port, &ch_mask, &port_type);
  246. return ret;
  247. }
  248. static int wcd937x_rx_connect_port(struct snd_soc_codec *codec,
  249. u8 slv_port_type, u8 enable)
  250. {
  251. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  252. u8 port_id;
  253. u8 num_ch;
  254. u8 ch_mask;
  255. u32 ch_rate;
  256. u8 port_type;
  257. u8 num_port = 1;
  258. int ret = 0;
  259. ret = wcd937x_set_port_params(codec, slv_port_type, &port_id,
  260. &num_ch, &ch_mask, &ch_rate,
  261. &port_type, CODEC_RX);
  262. if (ret)
  263. return ret;
  264. if (enable)
  265. ret = swr_connect_port(wcd937x->rx_swr_dev, &port_id,
  266. num_port, &ch_mask, &ch_rate,
  267. &num_ch, &port_type);
  268. else
  269. ret = swr_disconnect_port(wcd937x->rx_swr_dev, &port_id,
  270. num_port, &ch_mask, &port_type);
  271. return ret;
  272. }
  273. static int wcd937x_rx_clk_enable(struct snd_soc_codec *codec)
  274. {
  275. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  276. if (wcd937x->rx_clk_cnt == 0) {
  277. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  278. 0x08, 0x08);
  279. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  280. 0x01, 0x01);
  281. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x01, 0x01);
  282. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_RX0_CTL,
  283. 0x40, 0x00);
  284. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_RX1_CTL,
  285. 0x40, 0x00);
  286. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_RX2_CTL,
  287. 0x40, 0x00);
  288. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  289. 0x02, 0x02);
  290. }
  291. wcd937x->rx_clk_cnt++;
  292. return 0;
  293. }
  294. static int wcd937x_rx_clk_disable(struct snd_soc_codec *codec)
  295. {
  296. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  297. wcd937x->rx_clk_cnt--;
  298. if (wcd937x->rx_clk_cnt == 0) {
  299. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x40, 0x00);
  300. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x80, 0x00);
  301. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x01, 0x00);
  302. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  303. 0x02, 0x00);
  304. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  305. 0x01, 0x00);
  306. }
  307. return 0;
  308. }
  309. /*
  310. * wcd937x_soc_get_mbhc: get wcd937x_mbhc handle of corresponding codec
  311. * @codec: handle to snd_soc_codec *
  312. *
  313. * return wcd937x_mbhc handle or error code in case of failure
  314. */
  315. struct wcd937x_mbhc *wcd937x_soc_get_mbhc(struct snd_soc_codec *codec)
  316. {
  317. struct wcd937x_priv *wcd937x;
  318. if (!codec) {
  319. pr_err("%s: Invalid params, NULL codec\n", __func__);
  320. return NULL;
  321. }
  322. wcd937x = snd_soc_codec_get_drvdata(codec);
  323. if (!wcd937x) {
  324. pr_err("%s: Invalid params, NULL tavil\n", __func__);
  325. return NULL;
  326. }
  327. return wcd937x->mbhc;
  328. }
  329. EXPORT_SYMBOL(wcd937x_soc_get_mbhc);
  330. static int wcd937x_codec_hphl_dac_event(struct snd_soc_dapm_widget *w,
  331. struct snd_kcontrol *kcontrol,
  332. int event)
  333. {
  334. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  335. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  336. int ret = 0;
  337. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  338. w->name, event);
  339. switch (event) {
  340. case SND_SOC_DAPM_PRE_PMU:
  341. wcd937x_rx_clk_enable(codec);
  342. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  343. 0x01, 0x01);
  344. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  345. 0x04, 0x04);
  346. snd_soc_update_bits(codec, WCD937X_HPH_RDAC_CLK_CTL1,
  347. 0x80, 0x00);
  348. break;
  349. case SND_SOC_DAPM_POST_PMU:
  350. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  351. 0x0F, 0x02);
  352. if (wcd937x->comp1_enable) {
  353. snd_soc_update_bits(codec,
  354. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  355. 0x02, 0x02);
  356. snd_soc_update_bits(codec,
  357. WCD937X_HPH_L_EN, 0x20, 0x00);
  358. } else {
  359. snd_soc_update_bits(codec,
  360. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  361. 0x02, 0x00);
  362. snd_soc_update_bits(codec,
  363. WCD937X_HPH_L_EN, 0x20, 0x20);
  364. }
  365. usleep_range(5000, 5010);
  366. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  367. 0x02, 0x00);
  368. break;
  369. case SND_SOC_DAPM_POST_PMD:
  370. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  371. wcd937x->rx_swr_dev->dev_num,
  372. false);
  373. break;
  374. }
  375. return ret;
  376. }
  377. static int wcd937x_codec_hphr_dac_event(struct snd_soc_dapm_widget *w,
  378. struct snd_kcontrol *kcontrol,
  379. int event)
  380. {
  381. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  382. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  383. int ret = 0;
  384. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  385. w->name, event);
  386. switch (event) {
  387. case SND_SOC_DAPM_PRE_PMU:
  388. wcd937x_rx_clk_enable(codec);
  389. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  390. 0x02, 0x02);
  391. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  392. 0x08, 0x08);
  393. snd_soc_update_bits(codec, WCD937X_HPH_RDAC_CLK_CTL1,
  394. 0x80, 0x00);
  395. break;
  396. case SND_SOC_DAPM_POST_PMU:
  397. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_R,
  398. 0x0F, 0x02);
  399. if (wcd937x->comp2_enable) {
  400. snd_soc_update_bits(codec,
  401. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  402. 0x01, 0x01);
  403. snd_soc_update_bits(codec,
  404. WCD937X_HPH_R_EN, 0x20, 0x00);
  405. } else {
  406. snd_soc_update_bits(codec,
  407. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  408. 0x01, 0x00);
  409. snd_soc_update_bits(codec,
  410. WCD937X_HPH_R_EN, 0x20, 0x20);
  411. }
  412. usleep_range(5000, 5010);
  413. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  414. 0x02, 0x00);
  415. break;
  416. case SND_SOC_DAPM_POST_PMD:
  417. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  418. wcd937x->rx_swr_dev->dev_num,
  419. false);
  420. break;
  421. }
  422. return ret;
  423. }
  424. static int wcd937x_codec_ear_dac_event(struct snd_soc_dapm_widget *w,
  425. struct snd_kcontrol *kcontrol,
  426. int event)
  427. {
  428. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  429. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  430. int ret = 0;
  431. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  432. w->name, event);
  433. switch (event) {
  434. case SND_SOC_DAPM_PRE_PMU:
  435. wcd937x_rx_clk_enable(codec);
  436. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  437. 0x04, 0x04);
  438. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  439. 0x01, 0x01);
  440. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_COMP_CTL_0,
  441. 0x02, 0x02);
  442. usleep_range(5000, 5010);
  443. break;
  444. case SND_SOC_DAPM_POST_PMD:
  445. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  446. wcd937x->rx_swr_dev->dev_num,
  447. false);
  448. break;
  449. };
  450. return ret;
  451. }
  452. static int wcd937x_codec_aux_dac_event(struct snd_soc_dapm_widget *w,
  453. struct snd_kcontrol *kcontrol,
  454. int event)
  455. {
  456. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  457. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  458. int ret = 0;
  459. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  460. w->name, event);
  461. switch (event) {
  462. case SND_SOC_DAPM_PRE_PMU:
  463. wcd937x_rx_clk_enable(codec);
  464. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  465. 0x04, 0x04);
  466. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  467. 0x04, 0x04);
  468. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_AUX_GAIN_CTL,
  469. 0x01, 0x01);
  470. break;
  471. case SND_SOC_DAPM_POST_PMD:
  472. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  473. wcd937x->rx_swr_dev->dev_num,
  474. false);
  475. wcd937x_rx_clk_disable(codec);
  476. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  477. 0x04, 0x00);
  478. break;
  479. };
  480. return ret;
  481. }
  482. static int wcd937x_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
  483. struct snd_kcontrol *kcontrol,
  484. int event)
  485. {
  486. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  487. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  488. int ret = 0;
  489. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  490. w->name, event);
  491. switch (event) {
  492. case SND_SOC_DAPM_PRE_PMU:
  493. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x10, 0x10);
  494. usleep_range(100, 110);
  495. break;
  496. case SND_SOC_DAPM_POST_PMU:
  497. usleep_range(7000, 7010);
  498. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  499. 0x02, 0x02);
  500. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  501. 0x02, 0x02);
  502. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  503. wcd937x->rx_swr_dev->dev_num,
  504. true);
  505. if (wcd937x->update_wcd_event)
  506. wcd937x->update_wcd_event(wcd937x->handle,
  507. WCD_BOLERO_EVT_RX_MUTE,
  508. (WCD_RX2 << 0x10));
  509. break;
  510. case SND_SOC_DAPM_PRE_PMD:
  511. if (wcd937x->update_wcd_event)
  512. wcd937x->update_wcd_event(wcd937x->handle,
  513. WCD_BOLERO_EVT_RX_MUTE,
  514. (WCD_RX2 << 0x10 | 0x1));
  515. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  516. WCD_EVENT_PRE_HPHR_PA_OFF,
  517. &wcd937x->mbhc->wcd_mbhc);
  518. break;
  519. case SND_SOC_DAPM_POST_PMD:
  520. usleep_range(7000, 7010);
  521. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  522. WCD_EVENT_POST_HPHR_PA_OFF,
  523. &wcd937x->mbhc->wcd_mbhc);
  524. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x10, 0x00);
  525. break;
  526. };
  527. return ret;
  528. }
  529. static int wcd937x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
  530. struct snd_kcontrol *kcontrol,
  531. int event)
  532. {
  533. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  534. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  535. int ret = 0;
  536. switch (event) {
  537. case SND_SOC_DAPM_PRE_PMU:
  538. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x20, 0x20);
  539. usleep_range(100, 110);
  540. break;
  541. case SND_SOC_DAPM_POST_PMU:
  542. usleep_range(7000, 7010);
  543. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  544. 0x02, 0x02);
  545. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  546. 0x02, 0x02);
  547. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  548. wcd937x->rx_swr_dev->dev_num,
  549. true);
  550. if (wcd937x->update_wcd_event)
  551. wcd937x->update_wcd_event(wcd937x->handle,
  552. WCD_BOLERO_EVT_RX_MUTE,
  553. (WCD_RX1 << 0x10));
  554. break;
  555. case SND_SOC_DAPM_PRE_PMD:
  556. if (wcd937x->update_wcd_event)
  557. wcd937x->update_wcd_event(wcd937x->handle,
  558. WCD_BOLERO_EVT_RX_MUTE,
  559. (WCD_RX1 << 0x10 | 0x1));
  560. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  561. WCD_EVENT_PRE_HPHL_PA_OFF,
  562. &wcd937x->mbhc->wcd_mbhc);
  563. break;
  564. case SND_SOC_DAPM_POST_PMD:
  565. usleep_range(7000, 7010);
  566. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  567. WCD_EVENT_POST_HPHL_PA_OFF,
  568. &wcd937x->mbhc->wcd_mbhc);
  569. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x20, 0x00);
  570. break;
  571. };
  572. return ret;
  573. }
  574. static int wcd937x_codec_enable_aux_pa(struct snd_soc_dapm_widget *w,
  575. struct snd_kcontrol *kcontrol,
  576. int event)
  577. {
  578. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  579. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  580. int ret = 0;
  581. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  582. w->name, event);
  583. switch (event) {
  584. case SND_SOC_DAPM_PRE_PMU:
  585. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  586. 0x80, 0x80);
  587. usleep_range(500, 510);
  588. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  589. usleep_range(500, 510);
  590. break;
  591. case SND_SOC_DAPM_POST_PMU:
  592. usleep_range(1000, 1010);
  593. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  594. 0x20, 0x20);
  595. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  596. wcd937x->rx_swr_dev->dev_num,
  597. true);
  598. if (wcd937x->update_wcd_event)
  599. wcd937x->update_wcd_event(wcd937x->handle,
  600. WCD_BOLERO_EVT_RX_MUTE,
  601. (WCD_RX3 << 0x10));
  602. break;
  603. case SND_SOC_DAPM_PRE_PMD:
  604. if (wcd937x->update_wcd_event)
  605. wcd937x->update_wcd_event(wcd937x->handle,
  606. WCD_BOLERO_EVT_RX_MUTE,
  607. (WCD_RX3 << 0x10 | 0x1));
  608. break;
  609. case SND_SOC_DAPM_POST_PMD:
  610. usleep_range(1000, 1010);
  611. usleep_range(1000, 1010);
  612. break;
  613. };
  614. return ret;
  615. }
  616. static int wcd937x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
  617. struct snd_kcontrol *kcontrol,
  618. int event)
  619. {
  620. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  621. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  622. int ret = 0;
  623. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  624. w->name, event);
  625. switch (event) {
  626. case SND_SOC_DAPM_PRE_PMU:
  627. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  628. 0x08, 0x08);
  629. usleep_range(500, 510);
  630. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  631. usleep_range(500, 510);
  632. break;
  633. case SND_SOC_DAPM_POST_PMU:
  634. usleep_range(6000, 6010);
  635. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  636. 0x02, 0x02);
  637. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  638. wcd937x->rx_swr_dev->dev_num,
  639. true);
  640. if (wcd937x->update_wcd_event)
  641. wcd937x->update_wcd_event(wcd937x->handle,
  642. WCD_BOLERO_EVT_RX_MUTE,
  643. (WCD_RX1 << 0x10));
  644. break;
  645. case SND_SOC_DAPM_PRE_PMD:
  646. if (wcd937x->update_wcd_event)
  647. wcd937x->update_wcd_event(wcd937x->handle,
  648. WCD_BOLERO_EVT_RX_MUTE,
  649. (WCD_RX1 << 0x10 | 0x1));
  650. break;
  651. case SND_SOC_DAPM_POST_PMD:
  652. usleep_range(7000, 7010);
  653. break;
  654. };
  655. return ret;
  656. }
  657. static int wcd937x_enable_rx1(struct snd_soc_dapm_widget *w,
  658. struct snd_kcontrol *kcontrol,
  659. int event)
  660. {
  661. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  662. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  663. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  664. w->name, event);
  665. switch (event) {
  666. case SND_SOC_DAPM_PRE_PMU:
  667. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_4,
  668. 0xF0, 0x80);
  669. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  670. 0xE0, 0xA0);
  671. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_3,
  672. 0x02, 0x02);
  673. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2,
  674. 0xFF, 0x1C);
  675. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  676. 0x40, 0x40);
  677. usleep_range(100, 110);
  678. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  679. 0xE0, 0xE0);
  680. usleep_range(100, 110);
  681. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  682. 0x80, 0x80);
  683. usleep_range(500, 510);
  684. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  685. usleep_range(500, 510);
  686. wcd937x_rx_connect_port(codec, HPH_L, true);
  687. if (wcd937x->comp1_enable)
  688. wcd937x_rx_connect_port(codec, COMP_L, true);
  689. break;
  690. case SND_SOC_DAPM_POST_PMD:
  691. wcd937x_rx_connect_port(codec, HPH_L, false);
  692. if (wcd937x->comp1_enable)
  693. wcd937x_rx_connect_port(codec, COMP_L, false);
  694. wcd937x_rx_clk_disable(codec);
  695. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  696. 0x01, 0x00);
  697. break;
  698. };
  699. return 0;
  700. }
  701. static int wcd937x_enable_rx2(struct snd_soc_dapm_widget *w,
  702. struct snd_kcontrol *kcontrol, int event)
  703. {
  704. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  705. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  706. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  707. w->name, event);
  708. switch (event) {
  709. case SND_SOC_DAPM_PRE_PMU:
  710. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_4,
  711. 0xF0, 0x80);
  712. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  713. 0xE0, 0xA0);
  714. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_3, 0x02, 0x02);
  715. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x1C);
  716. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  717. 0x40, 0x40);
  718. usleep_range(100, 110);
  719. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  720. 0xE0, 0xE0);
  721. usleep_range(100, 110);
  722. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  723. 0x80, 0x80);
  724. usleep_range(500, 510);
  725. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  726. usleep_range(500, 510);
  727. wcd937x_rx_connect_port(codec, HPH_R, true);
  728. if (wcd937x->comp2_enable)
  729. wcd937x_rx_connect_port(codec, COMP_R, true);
  730. break;
  731. case SND_SOC_DAPM_POST_PMD:
  732. wcd937x_rx_connect_port(codec, HPH_R, false);
  733. if (wcd937x->comp2_enable)
  734. wcd937x_rx_connect_port(codec, COMP_R, false);
  735. wcd937x_rx_clk_disable(codec);
  736. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  737. 0x02, 0x00);
  738. break;
  739. };
  740. return 0;
  741. }
  742. static int wcd937x_enable_rx3(struct snd_soc_dapm_widget *w,
  743. struct snd_kcontrol *kcontrol,
  744. int event)
  745. {
  746. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  747. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  748. w->name, event);
  749. switch (event) {
  750. case SND_SOC_DAPM_PRE_PMU:
  751. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_2,
  752. 0xE0, 0xA0);
  753. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_3, 0x02, 0x02);
  754. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x1C);
  755. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  756. 0x40, 0x40);
  757. usleep_range(100, 110);
  758. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_2,
  759. 0xE0, 0xE0);
  760. usleep_range(100, 110);
  761. wcd937x_rx_connect_port(codec, LO, true);
  762. break;
  763. case SND_SOC_DAPM_POST_PMD:
  764. wcd937x_rx_connect_port(codec, LO, false);
  765. usleep_range(6000, 6010);
  766. wcd937x_rx_clk_disable(codec);
  767. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  768. 0x04, 0x00);
  769. break;
  770. }
  771. return 0;
  772. }
  773. static int wcd937x_codec_enable_dmic(struct snd_soc_dapm_widget *w,
  774. struct snd_kcontrol *kcontrol,
  775. int event)
  776. {
  777. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  778. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  779. u16 dmic_clk_reg;
  780. s32 *dmic_clk_cnt;
  781. unsigned int dmic;
  782. char *wname;
  783. int ret = 0;
  784. wname = strpbrk(w->name, "012345");
  785. if (!wname) {
  786. dev_err(codec->dev, "%s: widget not found\n", __func__);
  787. return -EINVAL;
  788. }
  789. ret = kstrtouint(wname, 10, &dmic);
  790. if (ret < 0) {
  791. dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
  792. __func__);
  793. return -EINVAL;
  794. }
  795. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  796. w->name, event);
  797. switch (dmic) {
  798. case 0:
  799. case 1:
  800. dmic_clk_cnt = &(wcd937x->dmic_0_1_clk_cnt);
  801. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC0_CTL;
  802. break;
  803. case 2:
  804. case 3:
  805. dmic_clk_cnt = &(wcd937x->dmic_2_3_clk_cnt);
  806. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC1_CTL;
  807. break;
  808. case 4:
  809. case 5:
  810. dmic_clk_cnt = &(wcd937x->dmic_4_5_clk_cnt);
  811. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC2_CTL;
  812. break;
  813. default:
  814. dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
  815. __func__);
  816. return -EINVAL;
  817. };
  818. dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_clk_cnt %d\n",
  819. __func__, event, dmic, *dmic_clk_cnt);
  820. switch (event) {
  821. case SND_SOC_DAPM_PRE_PMU:
  822. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  823. 0x80, 0x80);
  824. snd_soc_update_bits(codec, dmic_clk_reg, 0x07, 0x02);
  825. snd_soc_update_bits(codec, dmic_clk_reg, 0x08, 0x08);
  826. snd_soc_update_bits(codec, dmic_clk_reg, 0x70, 0x20);
  827. wcd937x_tx_connect_port(codec, DMIC0 + (w->shift), true);
  828. break;
  829. case SND_SOC_DAPM_POST_PMD:
  830. wcd937x_tx_connect_port(codec, DMIC0 + (w->shift), false);
  831. break;
  832. };
  833. return 0;
  834. }
  835. /*
  836. * wcd937x_get_micb_vout_ctl_val: converts micbias from volts to register value
  837. * @micb_mv: micbias in mv
  838. *
  839. * return register value converted
  840. */
  841. int wcd937x_get_micb_vout_ctl_val(u32 micb_mv)
  842. {
  843. /* min micbias voltage is 1V and maximum is 2.85V */
  844. if (micb_mv < 1000 || micb_mv > 2850) {
  845. pr_err("%s: unsupported micbias voltage\n", __func__);
  846. return -EINVAL;
  847. }
  848. return (micb_mv - 1000) / 50;
  849. }
  850. EXPORT_SYMBOL(wcd937x_get_micb_vout_ctl_val);
  851. /*
  852. * wcd937x_mbhc_micb_adjust_voltage: adjust specific micbias voltage
  853. * @codec: handle to snd_soc_codec *
  854. * @req_volt: micbias voltage to be set
  855. * @micb_num: micbias to be set, e.g. micbias1 or micbias2
  856. *
  857. * return 0 if adjustment is success or error code in case of failure
  858. */
  859. int wcd937x_mbhc_micb_adjust_voltage(struct snd_soc_codec *codec,
  860. int req_volt, int micb_num)
  861. {
  862. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  863. int cur_vout_ctl, req_vout_ctl;
  864. int micb_reg, micb_val, micb_en;
  865. int ret = 0;
  866. switch (micb_num) {
  867. case MIC_BIAS_1:
  868. micb_reg = WCD937X_ANA_MICB1;
  869. break;
  870. case MIC_BIAS_2:
  871. micb_reg = WCD937X_ANA_MICB2;
  872. break;
  873. case MIC_BIAS_3:
  874. micb_reg = WCD937X_ANA_MICB3;
  875. break;
  876. default:
  877. return -EINVAL;
  878. }
  879. mutex_lock(&wcd937x->micb_lock);
  880. /*
  881. * If requested micbias voltage is same as current micbias
  882. * voltage, then just return. Otherwise, adjust voltage as
  883. * per requested value. If micbias is already enabled, then
  884. * to avoid slow micbias ramp-up or down enable pull-up
  885. * momentarily, change the micbias value and then re-enable
  886. * micbias.
  887. */
  888. micb_val = snd_soc_read(codec, micb_reg);
  889. micb_en = (micb_val & 0xC0) >> 6;
  890. cur_vout_ctl = micb_val & 0x3F;
  891. req_vout_ctl = wcd937x_get_micb_vout_ctl_val(req_volt);
  892. if (req_vout_ctl < 0) {
  893. ret = -EINVAL;
  894. goto exit;
  895. }
  896. if (cur_vout_ctl == req_vout_ctl) {
  897. ret = 0;
  898. goto exit;
  899. }
  900. dev_dbg(codec->dev, "%s: micb_num: %d, cur_mv: %d, req_mv: %d, micb_en: %d\n",
  901. __func__, micb_num, WCD_VOUT_CTL_TO_MICB(cur_vout_ctl),
  902. req_volt, micb_en);
  903. if (micb_en == 0x1)
  904. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  905. snd_soc_update_bits(codec, micb_reg, 0x3F, req_vout_ctl);
  906. if (micb_en == 0x1) {
  907. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x40);
  908. /*
  909. * Add 2ms delay as per HW requirement after enabling
  910. * micbias
  911. */
  912. usleep_range(2000, 2100);
  913. }
  914. exit:
  915. mutex_unlock(&wcd937x->micb_lock);
  916. return ret;
  917. }
  918. EXPORT_SYMBOL(wcd937x_mbhc_micb_adjust_voltage);
  919. static int wcd937x_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
  920. struct snd_kcontrol *kcontrol,
  921. int event)
  922. {
  923. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  924. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  925. int ret = 0;
  926. switch (event) {
  927. case SND_SOC_DAPM_PRE_PMU:
  928. ret = swr_slvdev_datapath_control(wcd937x->tx_swr_dev,
  929. wcd937x->tx_swr_dev->dev_num,
  930. true);
  931. break;
  932. case SND_SOC_DAPM_POST_PMD:
  933. ret = swr_slvdev_datapath_control(wcd937x->tx_swr_dev,
  934. wcd937x->tx_swr_dev->dev_num,
  935. false);
  936. break;
  937. };
  938. return ret;
  939. }
  940. static int wcd937x_codec_enable_adc(struct snd_soc_dapm_widget *w,
  941. struct snd_kcontrol *kcontrol,
  942. int event){
  943. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  944. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  945. w->name, event);
  946. switch (event) {
  947. case SND_SOC_DAPM_PRE_PMU:
  948. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  949. 0x80, 0x80);
  950. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  951. 0x08, 0x08);
  952. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  953. 0x10, 0x10);
  954. wcd937x_tx_connect_port(codec, ADC1 + (w->shift), true);
  955. break;
  956. case SND_SOC_DAPM_POST_PMD:
  957. wcd937x_tx_connect_port(codec, ADC1 + (w->shift), false);
  958. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  959. 0x08, 0x00);
  960. break;
  961. };
  962. return 0;
  963. }
  964. static int wcd937x_enable_req(struct snd_soc_dapm_widget *w,
  965. struct snd_kcontrol *kcontrol, int event)
  966. {
  967. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  968. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  969. w->name, event);
  970. switch (event) {
  971. case SND_SOC_DAPM_PRE_PMU:
  972. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_REQ_CTL,
  973. 0x02, 0x02);
  974. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_REQ_CTL, 0x01,
  975. 0x00);
  976. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x40, 0x40);
  977. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  978. 0x30, 0x30);
  979. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH1, 0x80, 0x80);
  980. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x40, 0x00);
  981. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x80, 0x80);
  982. break;
  983. case SND_SOC_DAPM_POST_PMD:
  984. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH1, 0x80, 0x00);
  985. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  986. 0x10, 0x00);
  987. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  988. 0x10, 0x00);
  989. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  990. 0x80, 0x00);
  991. break;
  992. };
  993. return 0;
  994. }
  995. int wcd937x_micbias_control(struct snd_soc_codec *codec,
  996. int micb_num, int req, bool is_dapm)
  997. {
  998. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  999. int micb_index = micb_num - 1;
  1000. u16 micb_reg;
  1001. int pre_off_event = 0, post_off_event = 0;
  1002. int post_on_event = 0, post_dapm_off = 0;
  1003. int post_dapm_on = 0;
  1004. if ((micb_index < 0) || (micb_index > WCD937X_MAX_MICBIAS - 1)) {
  1005. dev_err(codec->dev, "%s: Invalid micbias index, micb_ind:%d\n",
  1006. __func__, micb_index);
  1007. return -EINVAL;
  1008. }
  1009. switch (micb_num) {
  1010. case MIC_BIAS_1:
  1011. micb_reg = WCD937X_ANA_MICB1;
  1012. break;
  1013. case MIC_BIAS_2:
  1014. micb_reg = WCD937X_ANA_MICB2;
  1015. pre_off_event = WCD_EVENT_PRE_MICBIAS_2_OFF;
  1016. post_off_event = WCD_EVENT_POST_MICBIAS_2_OFF;
  1017. post_on_event = WCD_EVENT_POST_MICBIAS_2_ON;
  1018. post_dapm_on = WCD_EVENT_POST_DAPM_MICBIAS_2_ON;
  1019. post_dapm_off = WCD_EVENT_POST_DAPM_MICBIAS_2_OFF;
  1020. break;
  1021. case MIC_BIAS_3:
  1022. micb_reg = WCD937X_ANA_MICB3;
  1023. break;
  1024. default:
  1025. dev_err(codec->dev, "%s: Invalid micbias number: %d\n",
  1026. __func__, micb_num);
  1027. return -EINVAL;
  1028. };
  1029. mutex_lock(&wcd937x->micb_lock);
  1030. switch (req) {
  1031. case MICB_PULLUP_ENABLE:
  1032. wcd937x->pullup_ref[micb_index]++;
  1033. if ((wcd937x->pullup_ref[micb_index] == 1) &&
  1034. (wcd937x->micb_ref[micb_index] == 0))
  1035. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  1036. break;
  1037. case MICB_PULLUP_DISABLE:
  1038. if (wcd937x->pullup_ref[micb_index] > 0)
  1039. wcd937x->pullup_ref[micb_index]--;
  1040. if ((wcd937x->pullup_ref[micb_index] == 0) &&
  1041. (wcd937x->micb_ref[micb_index] == 0))
  1042. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x00);
  1043. break;
  1044. case MICB_ENABLE:
  1045. wcd937x->micb_ref[micb_index]++;
  1046. if (wcd937x->micb_ref[micb_index] == 1) {
  1047. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0xE0, 0xE0);
  1048. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x10, 0x10);
  1049. snd_soc_update_bits(codec, WCD937X_MICB1_TEST_CTL_2, 0x01, 0x01);
  1050. snd_soc_update_bits(codec, WCD937X_MICB2_TEST_CTL_2, 0x01, 0x01);
  1051. snd_soc_update_bits(codec, WCD937X_MICB3_TEST_CTL_2, 0x01, 0x01);
  1052. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x40);
  1053. if (post_on_event && wcd937x->mbhc)
  1054. blocking_notifier_call_chain(
  1055. &wcd937x->mbhc->notifier, post_on_event,
  1056. &wcd937x->mbhc->wcd_mbhc);
  1057. }
  1058. if (is_dapm && post_dapm_on && wcd937x->mbhc)
  1059. blocking_notifier_call_chain(
  1060. &wcd937x->mbhc->notifier, post_dapm_on,
  1061. &wcd937x->mbhc->wcd_mbhc);
  1062. break;
  1063. case MICB_DISABLE:
  1064. if (wcd937x->micb_ref[micb_index] > 0)
  1065. wcd937x->micb_ref[micb_index]--;
  1066. if ((wcd937x->micb_ref[micb_index] == 0) &&
  1067. (wcd937x->pullup_ref[micb_index] > 0))
  1068. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  1069. else if ((wcd937x->micb_ref[micb_index] == 0) &&
  1070. (wcd937x->pullup_ref[micb_index] == 0)) {
  1071. if (pre_off_event && wcd937x->mbhc)
  1072. blocking_notifier_call_chain(
  1073. &wcd937x->mbhc->notifier, pre_off_event,
  1074. &wcd937x->mbhc->wcd_mbhc);
  1075. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x00);
  1076. if (post_off_event && wcd937x->mbhc)
  1077. blocking_notifier_call_chain(
  1078. &wcd937x->mbhc->notifier,
  1079. post_off_event,
  1080. &wcd937x->mbhc->wcd_mbhc);
  1081. }
  1082. if (is_dapm && post_dapm_off && wcd937x->mbhc)
  1083. blocking_notifier_call_chain(
  1084. &wcd937x->mbhc->notifier, post_dapm_off,
  1085. &wcd937x->mbhc->wcd_mbhc);
  1086. break;
  1087. };
  1088. dev_dbg(codec->dev, "%s: micb_num:%d, micb_ref: %d, pullup_ref: %d\n",
  1089. __func__, micb_num, wcd937x->micb_ref[micb_index],
  1090. wcd937x->pullup_ref[micb_index]);
  1091. mutex_unlock(&wcd937x->micb_lock);
  1092. return 0;
  1093. }
  1094. EXPORT_SYMBOL(wcd937x_micbias_control);
  1095. static int wcd937x_get_logical_addr(struct swr_device *swr_dev)
  1096. {
  1097. int ret = 0;
  1098. uint8_t devnum = 0;
  1099. ret = swr_get_logical_dev_num(swr_dev, swr_dev->addr, &devnum);
  1100. if (ret) {
  1101. dev_err(&swr_dev->dev,
  1102. "%s get devnum %d for dev addr %lx failed\n",
  1103. __func__, devnum, swr_dev->addr);
  1104. swr_remove_device(swr_dev);
  1105. return ret;
  1106. }
  1107. swr_dev->dev_num = devnum;
  1108. return 0;
  1109. }
  1110. static int wcd937x_event_notify(struct notifier_block *block,
  1111. unsigned long val,
  1112. void *data)
  1113. {
  1114. u16 event = (val & 0xffff);
  1115. u16 amic = (val >> 0x10);
  1116. u16 mask = 0x40, reg = 0x0;
  1117. int ret = 0;
  1118. struct wcd937x_priv *wcd937x = dev_get_drvdata((struct device *)data);
  1119. struct snd_soc_codec *codec = wcd937x->codec;
  1120. struct wcd_mbhc *mbhc;
  1121. switch (event) {
  1122. case BOLERO_WCD_EVT_TX_CH_HOLD_CLEAR:
  1123. if (amic == 0x1 || amic == 0x2)
  1124. reg = WCD937X_ANA_TX_CH2;
  1125. else if (amic == 0x3)
  1126. reg = WCD937X_ANA_TX_CH3_HPF;
  1127. else
  1128. return 0;
  1129. if (amic == 0x2)
  1130. mask = 0x20;
  1131. snd_soc_update_bits(codec, reg, mask, 0x00);
  1132. break;
  1133. case BOLERO_WCD_EVT_SSR_DOWN:
  1134. wcd937x_reset_low(wcd937x->dev);
  1135. break;
  1136. case BOLERO_WCD_EVT_SSR_UP:
  1137. wcd937x_reset(wcd937x->dev);
  1138. wcd937x_get_logical_addr(wcd937x->tx_swr_dev);
  1139. wcd937x_get_logical_addr(wcd937x->rx_swr_dev);
  1140. regcache_mark_dirty(wcd937x->regmap);
  1141. regcache_sync(wcd937x->regmap);
  1142. /* Initialize MBHC module */
  1143. mbhc = &wcd937x->mbhc->wcd_mbhc;
  1144. ret = wcd937x_mbhc_post_ssr_init(wcd937x->mbhc, codec);
  1145. if (ret) {
  1146. dev_err(codec->dev, "%s: mbhc initialization failed\n",
  1147. __func__);
  1148. } else {
  1149. wcd937x_mbhc_hs_detect(codec, mbhc->mbhc_cfg);
  1150. }
  1151. break;
  1152. default:
  1153. dev_err(codec->dev, "%s: invalid event %d\n", __func__, event);
  1154. break;
  1155. }
  1156. return 0;
  1157. }
  1158. static int __wcd937x_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1159. int event)
  1160. {
  1161. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  1162. int micb_num;
  1163. dev_dbg(codec->dev, "%s: wname: %s, event: %d\n",
  1164. __func__, w->name, event);
  1165. if (strnstr(w->name, "MIC BIAS1", sizeof("MIC BIAS1")))
  1166. micb_num = MIC_BIAS_1;
  1167. else if (strnstr(w->name, "MIC BIAS2", sizeof("MIC BIAS2")))
  1168. micb_num = MIC_BIAS_2;
  1169. else if (strnstr(w->name, "MIC BIAS3", sizeof("MIC BIAS3")))
  1170. micb_num = MIC_BIAS_3;
  1171. else
  1172. return -EINVAL;
  1173. switch (event) {
  1174. case SND_SOC_DAPM_PRE_PMU:
  1175. wcd937x_micbias_control(codec, micb_num, MICB_ENABLE, true);
  1176. break;
  1177. case SND_SOC_DAPM_POST_PMU:
  1178. usleep_range(1000, 1100);
  1179. break;
  1180. case SND_SOC_DAPM_POST_PMD:
  1181. wcd937x_micbias_control(codec, micb_num, MICB_DISABLE, true);
  1182. break;
  1183. };
  1184. return 0;
  1185. }
  1186. static int wcd937x_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1187. struct snd_kcontrol *kcontrol,
  1188. int event)
  1189. {
  1190. return __wcd937x_codec_enable_micbias(w, event);
  1191. }
  1192. static int wcd937x_rx_hph_mode_get(struct snd_kcontrol *kcontrol,
  1193. struct snd_ctl_elem_value *ucontrol)
  1194. {
  1195. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  1196. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1197. ucontrol->value.integer.value[0] = wcd937x->hph_mode;
  1198. return 0;
  1199. }
  1200. static int wcd937x_rx_hph_mode_put(struct snd_kcontrol *kcontrol,
  1201. struct snd_ctl_elem_value *ucontrol)
  1202. {
  1203. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  1204. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1205. u32 mode_val;
  1206. mode_val = ucontrol->value.enumerated.item[0];
  1207. dev_dbg(codec->dev, "%s: mode: %d\n", __func__, mode_val);
  1208. if (mode_val == 0) {
  1209. dev_warn(codec->dev, "%s:Invalid HPH Mode, default to class_AB\n",
  1210. __func__);
  1211. mode_val = 3; /* enum will be updated later */
  1212. }
  1213. wcd937x->hph_mode = mode_val;
  1214. return 0;
  1215. }
  1216. static int wcd937x_get_compander(struct snd_kcontrol *kcontrol,
  1217. struct snd_ctl_elem_value *ucontrol)
  1218. {
  1219. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  1220. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1221. bool hphr;
  1222. struct soc_multi_mixer_control *mc;
  1223. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1224. hphr = mc->shift;
  1225. ucontrol->value.integer.value[0] = hphr ? wcd937x->comp2_enable :
  1226. wcd937x->comp1_enable;
  1227. return 0;
  1228. }
  1229. static int wcd937x_set_compander(struct snd_kcontrol *kcontrol,
  1230. struct snd_ctl_elem_value *ucontrol)
  1231. {
  1232. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  1233. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1234. int value = ucontrol->value.integer.value[0];
  1235. bool hphr;
  1236. struct soc_multi_mixer_control *mc;
  1237. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1238. hphr = mc->shift;
  1239. if (hphr)
  1240. wcd937x->comp2_enable = value;
  1241. else
  1242. wcd937x->comp1_enable = value;
  1243. return 0;
  1244. }
  1245. static const char * const rx_hph_mode_mux_text[] = {
  1246. "CLS_H_INVALID", "CLS_H_HIFI", "CLS_H_LP", "CLS_AB", "CLS_H_LOHIFI",
  1247. "CLS_H_ULP", "CLS_AB_HIFI",
  1248. };
  1249. static const struct soc_enum rx_hph_mode_mux_enum =
  1250. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(rx_hph_mode_mux_text),
  1251. rx_hph_mode_mux_text);
  1252. static const struct snd_kcontrol_new wcd937x_snd_controls[] = {
  1253. SOC_ENUM_EXT("RX HPH Mode", rx_hph_mode_mux_enum,
  1254. wcd937x_rx_hph_mode_get, wcd937x_rx_hph_mode_put),
  1255. SOC_SINGLE_EXT("HPHL_COMP Switch", SND_SOC_NOPM, 0, 1, 0,
  1256. wcd937x_get_compander, wcd937x_set_compander),
  1257. SOC_SINGLE_EXT("HPHR_COMP Switch", SND_SOC_NOPM, 1, 1, 0,
  1258. wcd937x_get_compander, wcd937x_set_compander),
  1259. SOC_SINGLE_TLV("HPHL Volume", WCD937X_HPH_L_EN, 0, 20, 1, line_gain),
  1260. SOC_SINGLE_TLV("HPHR Volume", WCD937X_HPH_R_EN, 0, 20, 1, line_gain),
  1261. SOC_SINGLE_TLV("ADC1 Volume", WCD937X_ANA_TX_CH1, 0, 20, 0, analog_gain),
  1262. SOC_SINGLE_TLV("ADC2 Volume", WCD937X_ANA_TX_CH2, 0, 20, 0, analog_gain),
  1263. SOC_SINGLE_TLV("ADC3 Volume", WCD937X_ANA_TX_CH3, 0, 20, 0, analog_gain),
  1264. };
  1265. static const struct snd_kcontrol_new adc1_switch[] = {
  1266. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1267. };
  1268. static const struct snd_kcontrol_new adc2_switch[] = {
  1269. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1270. };
  1271. static const struct snd_kcontrol_new adc3_switch[] = {
  1272. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1273. };
  1274. static const struct snd_kcontrol_new dmic1_switch[] = {
  1275. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1276. };
  1277. static const struct snd_kcontrol_new dmic2_switch[] = {
  1278. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1279. };
  1280. static const struct snd_kcontrol_new dmic3_switch[] = {
  1281. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1282. };
  1283. static const struct snd_kcontrol_new dmic4_switch[] = {
  1284. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1285. };
  1286. static const struct snd_kcontrol_new dmic5_switch[] = {
  1287. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1288. };
  1289. static const struct snd_kcontrol_new dmic6_switch[] = {
  1290. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1291. };
  1292. static const struct snd_kcontrol_new ear_rdac_switch[] = {
  1293. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1294. };
  1295. static const struct snd_kcontrol_new aux_rdac_switch[] = {
  1296. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1297. };
  1298. static const struct snd_kcontrol_new hphl_rdac_switch[] = {
  1299. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1300. };
  1301. static const struct snd_kcontrol_new hphr_rdac_switch[] = {
  1302. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1303. };
  1304. static const char * const adc2_mux_text[] = {
  1305. "INP2", "INP3"
  1306. };
  1307. static const char * const rdac3_mux_text[] = {
  1308. "RX1", "RX3"
  1309. };
  1310. static const struct soc_enum adc2_enum =
  1311. SOC_ENUM_SINGLE(WCD937X_TX_NEW_TX_CH2_SEL, 7,
  1312. ARRAY_SIZE(adc2_mux_text), adc2_mux_text);
  1313. static const struct soc_enum rdac3_enum =
  1314. SOC_ENUM_SINGLE(WCD937X_DIGITAL_CDC_EAR_PATH_CTL, 0,
  1315. ARRAY_SIZE(rdac3_mux_text), rdac3_mux_text);
  1316. static const struct snd_kcontrol_new tx_adc2_mux =
  1317. SOC_DAPM_ENUM("ADC2 MUX Mux", adc2_enum);
  1318. static const struct snd_kcontrol_new rx_rdac3_mux =
  1319. SOC_DAPM_ENUM("RDAC3_MUX Mux", rdac3_enum);
  1320. static const struct snd_soc_dapm_widget wcd937x_dapm_widgets[] = {
  1321. /*input widgets*/
  1322. SND_SOC_DAPM_INPUT("AMIC1"),
  1323. SND_SOC_DAPM_INPUT("AMIC2"),
  1324. SND_SOC_DAPM_INPUT("AMIC3"),
  1325. SND_SOC_DAPM_INPUT("IN1_HPHL"),
  1326. SND_SOC_DAPM_INPUT("IN2_HPHR"),
  1327. SND_SOC_DAPM_INPUT("IN3_AUX"),
  1328. /*tx widgets*/
  1329. SND_SOC_DAPM_ADC_E("ADC1", NULL, SND_SOC_NOPM, 0, 0,
  1330. wcd937x_codec_enable_adc,
  1331. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1332. SND_SOC_DAPM_ADC_E("ADC2", NULL, SND_SOC_NOPM, 1, 0,
  1333. wcd937x_codec_enable_adc,
  1334. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1335. SND_SOC_DAPM_MIXER_E("ADC1 REQ", SND_SOC_NOPM, 0, 0,
  1336. NULL, 0, wcd937x_enable_req,
  1337. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1338. SND_SOC_DAPM_MIXER_E("ADC2 REQ", SND_SOC_NOPM, 0, 0,
  1339. NULL, 0, wcd937x_enable_req,
  1340. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1341. SND_SOC_DAPM_MUX("ADC2 MUX", SND_SOC_NOPM, 0, 0,
  1342. &tx_adc2_mux),
  1343. /*tx mixers*/
  1344. SND_SOC_DAPM_MIXER_E("ADC1_MIXER", SND_SOC_NOPM, 0, 0,
  1345. adc1_switch, ARRAY_SIZE(adc1_switch),
  1346. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1347. SND_SOC_DAPM_POST_PMD),
  1348. SND_SOC_DAPM_MIXER_E("ADC2_MIXER", SND_SOC_NOPM, 0, 0,
  1349. adc2_switch, ARRAY_SIZE(adc2_switch),
  1350. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1351. SND_SOC_DAPM_POST_PMD),
  1352. /* micbias widgets*/
  1353. SND_SOC_DAPM_MICBIAS_E("MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1354. wcd937x_codec_enable_micbias,
  1355. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1356. SND_SOC_DAPM_POST_PMD),
  1357. SND_SOC_DAPM_MICBIAS_E("MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1358. wcd937x_codec_enable_micbias,
  1359. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1360. SND_SOC_DAPM_POST_PMD),
  1361. SND_SOC_DAPM_MICBIAS_E("MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1362. wcd937x_codec_enable_micbias,
  1363. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1364. SND_SOC_DAPM_POST_PMD),
  1365. /*rx widgets*/
  1366. SND_SOC_DAPM_PGA_E("EAR PGA", WCD937X_ANA_EAR, 7, 0, NULL, 0,
  1367. wcd937x_codec_enable_ear_pa,
  1368. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1369. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1370. SND_SOC_DAPM_PGA_E("AUX PGA", WCD937X_AUX_AUXPA, 7, 0, NULL, 0,
  1371. wcd937x_codec_enable_aux_pa,
  1372. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1373. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1374. SND_SOC_DAPM_PGA_E("HPHL PGA", WCD937X_ANA_HPH, 7, 0, NULL, 0,
  1375. wcd937x_codec_enable_hphl_pa,
  1376. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1377. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1378. SND_SOC_DAPM_PGA_E("HPHR PGA", WCD937X_ANA_HPH, 6, 0, NULL, 0,
  1379. wcd937x_codec_enable_hphr_pa,
  1380. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1381. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1382. SND_SOC_DAPM_DAC_E("RDAC1", NULL, SND_SOC_NOPM, 0, 0,
  1383. wcd937x_codec_hphl_dac_event,
  1384. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1385. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1386. SND_SOC_DAPM_DAC_E("RDAC2", NULL, SND_SOC_NOPM, 0, 0,
  1387. wcd937x_codec_hphr_dac_event,
  1388. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1389. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1390. SND_SOC_DAPM_DAC_E("RDAC3", NULL, SND_SOC_NOPM, 0, 0,
  1391. wcd937x_codec_ear_dac_event,
  1392. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1393. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1394. SND_SOC_DAPM_DAC_E("RDAC4", NULL, SND_SOC_NOPM, 0, 0,
  1395. wcd937x_codec_aux_dac_event,
  1396. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1397. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1398. SND_SOC_DAPM_MUX("RDAC3_MUX", SND_SOC_NOPM, 0, 0, &rx_rdac3_mux),
  1399. SND_SOC_DAPM_MIXER_E("RX1", SND_SOC_NOPM, 0, 0, NULL, 0,
  1400. wcd937x_enable_rx1, SND_SOC_DAPM_PRE_PMU |
  1401. SND_SOC_DAPM_POST_PMD),
  1402. SND_SOC_DAPM_MIXER_E("RX2", SND_SOC_NOPM, 0, 0, NULL, 0,
  1403. wcd937x_enable_rx2, SND_SOC_DAPM_PRE_PMU |
  1404. SND_SOC_DAPM_POST_PMD),
  1405. SND_SOC_DAPM_MIXER_E("RX3", SND_SOC_NOPM, 0, 0, NULL, 0,
  1406. wcd937x_enable_rx3, SND_SOC_DAPM_PRE_PMU |
  1407. SND_SOC_DAPM_POST_PMD),
  1408. /* rx mixer widgets*/
  1409. SND_SOC_DAPM_MIXER("EAR_RDAC", SND_SOC_NOPM, 0, 0,
  1410. ear_rdac_switch, ARRAY_SIZE(ear_rdac_switch)),
  1411. SND_SOC_DAPM_MIXER("AUX_RDAC", SND_SOC_NOPM, 0, 0,
  1412. aux_rdac_switch, ARRAY_SIZE(aux_rdac_switch)),
  1413. SND_SOC_DAPM_MIXER("HPHL_RDAC", SND_SOC_NOPM, 0, 0,
  1414. hphl_rdac_switch, ARRAY_SIZE(hphl_rdac_switch)),
  1415. SND_SOC_DAPM_MIXER("HPHR_RDAC", SND_SOC_NOPM, 0, 0,
  1416. hphr_rdac_switch, ARRAY_SIZE(hphr_rdac_switch)),
  1417. /*output widgets tx*/
  1418. SND_SOC_DAPM_OUTPUT("ADC1_OUTPUT"),
  1419. SND_SOC_DAPM_OUTPUT("ADC2_OUTPUT"),
  1420. /*output widgets rx*/
  1421. SND_SOC_DAPM_OUTPUT("EAR"),
  1422. SND_SOC_DAPM_OUTPUT("AUX"),
  1423. SND_SOC_DAPM_OUTPUT("HPHL"),
  1424. SND_SOC_DAPM_OUTPUT("HPHR"),
  1425. };
  1426. static const struct snd_soc_dapm_widget wcd9375_dapm_widgets[] = {
  1427. /*input widgets*/
  1428. SND_SOC_DAPM_INPUT("AMIC4"),
  1429. /*tx widgets*/
  1430. SND_SOC_DAPM_ADC_E("ADC3", NULL, SND_SOC_NOPM, 2, 0,
  1431. wcd937x_codec_enable_adc,
  1432. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1433. SND_SOC_DAPM_MIXER_E("ADC3 REQ", SND_SOC_NOPM, 0, 0,
  1434. NULL, 0, wcd937x_enable_req,
  1435. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1436. SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
  1437. wcd937x_codec_enable_dmic,
  1438. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1439. SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 1, 0,
  1440. wcd937x_codec_enable_dmic,
  1441. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1442. SND_SOC_DAPM_ADC_E("DMIC3", NULL, SND_SOC_NOPM, 2, 0,
  1443. wcd937x_codec_enable_dmic,
  1444. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1445. SND_SOC_DAPM_ADC_E("DMIC4", NULL, SND_SOC_NOPM, 3, 0,
  1446. wcd937x_codec_enable_dmic,
  1447. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1448. SND_SOC_DAPM_ADC_E("DMIC5", NULL, SND_SOC_NOPM, 4, 0,
  1449. wcd937x_codec_enable_dmic,
  1450. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1451. SND_SOC_DAPM_ADC_E("DMIC6", NULL, SND_SOC_NOPM, 5, 0,
  1452. wcd937x_codec_enable_dmic,
  1453. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1454. /*tx mixer widgets*/
  1455. SND_SOC_DAPM_MIXER_E("DMIC1_MIXER", SND_SOC_NOPM, 0,
  1456. 0, dmic1_switch, ARRAY_SIZE(dmic1_switch),
  1457. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1458. SND_SOC_DAPM_POST_PMD),
  1459. SND_SOC_DAPM_MIXER_E("DMIC2_MIXER", SND_SOC_NOPM, 0,
  1460. 0, dmic2_switch, ARRAY_SIZE(dmic2_switch),
  1461. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1462. SND_SOC_DAPM_POST_PMD),
  1463. SND_SOC_DAPM_MIXER_E("DMIC3_MIXER", SND_SOC_NOPM, 0,
  1464. 0, dmic3_switch, ARRAY_SIZE(dmic3_switch),
  1465. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1466. SND_SOC_DAPM_POST_PMD),
  1467. SND_SOC_DAPM_MIXER_E("DMIC4_MIXER", SND_SOC_NOPM, 0,
  1468. 0, dmic4_switch, ARRAY_SIZE(dmic4_switch),
  1469. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1470. SND_SOC_DAPM_POST_PMD),
  1471. SND_SOC_DAPM_MIXER_E("DMIC5_MIXER", SND_SOC_NOPM, 0,
  1472. 0, dmic5_switch, ARRAY_SIZE(dmic5_switch),
  1473. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1474. SND_SOC_DAPM_POST_PMD),
  1475. SND_SOC_DAPM_MIXER_E("DMIC6_MIXER", SND_SOC_NOPM, 0,
  1476. 0, dmic6_switch, ARRAY_SIZE(dmic6_switch),
  1477. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1478. SND_SOC_DAPM_POST_PMD),
  1479. SND_SOC_DAPM_MIXER_E("ADC3_MIXER", SND_SOC_NOPM, 0, 0, adc3_switch,
  1480. ARRAY_SIZE(adc3_switch), wcd937x_tx_swr_ctrl,
  1481. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1482. /*output widgets*/
  1483. SND_SOC_DAPM_OUTPUT("DMIC1_OUTPUT"),
  1484. SND_SOC_DAPM_OUTPUT("DMIC2_OUTPUT"),
  1485. SND_SOC_DAPM_OUTPUT("DMIC3_OUTPUT"),
  1486. SND_SOC_DAPM_OUTPUT("DMIC4_OUTPUT"),
  1487. SND_SOC_DAPM_OUTPUT("DMIC5_OUTPUT"),
  1488. SND_SOC_DAPM_OUTPUT("DMIC6_OUTPUT"),
  1489. SND_SOC_DAPM_OUTPUT("ADC3_OUTPUT"),
  1490. };
  1491. static const struct snd_soc_dapm_route wcd937x_audio_map[] = {
  1492. {"ADC1_OUTPUT", NULL, "ADC1_MIXER"},
  1493. {"ADC1_MIXER", "Switch", "ADC1 REQ"},
  1494. {"ADC1 REQ", NULL, "ADC1"},
  1495. {"ADC1", NULL, "AMIC1"},
  1496. {"ADC2_OUTPUT", NULL, "ADC2_MIXER"},
  1497. {"ADC2_MIXER", "Switch", "ADC2 REQ"},
  1498. {"ADC2 REQ", NULL, "ADC2"},
  1499. {"ADC2", NULL, "ADC2 MUX"},
  1500. {"ADC2 MUX", "INP3", "AMIC3"},
  1501. {"ADC2 MUX", "INP2", "AMIC2"},
  1502. {"RX1", NULL, "IN1_HPHL"},
  1503. {"RDAC1", NULL, "RX1"},
  1504. {"HPHL_RDAC", "Switch", "RDAC1"},
  1505. {"HPHL PGA", NULL, "HPHL_RDAC"},
  1506. {"HPHL", NULL, "HPHL PGA"},
  1507. {"RX2", NULL, "IN2_HPHR"},
  1508. {"RDAC2", NULL, "RX2"},
  1509. {"HPHR_RDAC", "Switch", "RDAC2"},
  1510. {"HPHR PGA", NULL, "HPHR_RDAC"},
  1511. {"HPHR", NULL, "HPHR PGA"},
  1512. {"RX3", NULL, "IN3_AUX"},
  1513. {"RDAC4", NULL, "RX3"},
  1514. {"AUX_RDAC", "Switch", "RDAC4"},
  1515. {"AUX PGA", NULL, "AUX_RDAC"},
  1516. {"AUX", NULL, "AUX PGA"},
  1517. {"RDAC3_MUX", "RX3", "RX3"},
  1518. {"RDAC3_MUX", "RX1", "RX1"},
  1519. {"RDAC3", NULL, "RDAC3_MUX"},
  1520. {"EAR_RDAC", "Switch", "RDAC3"},
  1521. {"EAR PGA", NULL, "EAR_RDAC"},
  1522. {"EAR", NULL, "EAR PGA"},
  1523. };
  1524. static const struct snd_soc_dapm_route wcd9375_audio_map[] = {
  1525. {"ADC3_OUTPUT", NULL, "ADC3_MIXER"},
  1526. {"ADC3_MIXER", "Switch", "ADC3 REQ"},
  1527. {"ADC3 REQ", NULL, "ADC3"},
  1528. {"ADC3", NULL, "AMIC4"},
  1529. {"DMIC1_OUTPUT", NULL, "DMIC1_MIXER"},
  1530. {"DMIC1_MIXER", "Switch", "DMIC1"},
  1531. {"DMIC2_OUTPUT", NULL, "DMIC2_MIXER"},
  1532. {"DMIC2_MIXER", "Switch", "DMIC2"},
  1533. {"DMIC3_OUTPUT", NULL, "DMIC3_MIXER"},
  1534. {"DMIC3_MIXER", "Switch", "DMIC3"},
  1535. {"DMIC4_OUTPUT", NULL, "DMIC4_MIXER"},
  1536. {"DMIC4_MIXER", "Switch", "DMIC4"},
  1537. {"DMIC5_OUTPUT", NULL, "DMIC5_MIXER"},
  1538. {"DMIC5_MIXER", "Switch", "DMIC5"},
  1539. {"DMIC6_OUTPUT", NULL, "DMIC6_MIXER"},
  1540. {"DMIC6_MIXER", "Switch", "DMIC6"},
  1541. };
  1542. static ssize_t wcd937x_version_read(struct snd_info_entry *entry,
  1543. void *file_private_data,
  1544. struct file *file,
  1545. char __user *buf, size_t count,
  1546. loff_t pos)
  1547. {
  1548. struct wcd937x_priv *priv;
  1549. char buffer[WCD937X_VERSION_ENTRY_SIZE];
  1550. int len = 0;
  1551. priv = (struct wcd937x_priv *) entry->private_data;
  1552. if (!priv) {
  1553. pr_err("%s: wcd937x priv is null\n", __func__);
  1554. return -EINVAL;
  1555. }
  1556. switch (priv->version) {
  1557. case WCD937X_VERSION_1_0:
  1558. len = snprintf(buffer, sizeof(buffer), "WCD937X_1_0\n");
  1559. break;
  1560. default:
  1561. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  1562. }
  1563. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  1564. }
  1565. static struct snd_info_entry_ops wcd937x_info_ops = {
  1566. .read = wcd937x_version_read,
  1567. };
  1568. /*
  1569. * wcd937x_info_create_codec_entry - creates wcd937x module
  1570. * @codec_root: The parent directory
  1571. * @codec: Codec instance
  1572. *
  1573. * Creates wcd937x module and version entry under the given
  1574. * parent directory.
  1575. *
  1576. * Return: 0 on success or negative error code on failure.
  1577. */
  1578. int wcd937x_info_create_codec_entry(struct snd_info_entry *codec_root,
  1579. struct snd_soc_codec *codec)
  1580. {
  1581. struct snd_info_entry *version_entry;
  1582. struct wcd937x_priv *priv;
  1583. struct snd_soc_card *card;
  1584. if (!codec_root || !codec)
  1585. return -EINVAL;
  1586. priv = snd_soc_codec_get_drvdata(codec);
  1587. if (priv->entry) {
  1588. dev_dbg(priv->dev,
  1589. "%s:wcd937x module already created\n", __func__);
  1590. return 0;
  1591. }
  1592. card = codec->component.card;
  1593. priv->entry = snd_info_create_subdir(codec_root->module,
  1594. "wcd937x", codec_root);
  1595. if (!priv->entry) {
  1596. dev_dbg(codec->dev, "%s: failed to create wcd937x entry\n",
  1597. __func__);
  1598. return -ENOMEM;
  1599. }
  1600. version_entry = snd_info_create_card_entry(card->snd_card,
  1601. "version",
  1602. priv->entry);
  1603. if (!version_entry) {
  1604. dev_dbg(codec->dev, "%s: failed to create wcd937x version entry\n",
  1605. __func__);
  1606. return -ENOMEM;
  1607. }
  1608. version_entry->private_data = priv;
  1609. version_entry->size = WCD937X_VERSION_ENTRY_SIZE;
  1610. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  1611. version_entry->c.ops = &wcd937x_info_ops;
  1612. if (snd_info_register(version_entry) < 0) {
  1613. snd_info_free_entry(version_entry);
  1614. return -ENOMEM;
  1615. }
  1616. priv->version_entry = version_entry;
  1617. return 0;
  1618. }
  1619. EXPORT_SYMBOL(wcd937x_info_create_codec_entry);
  1620. static int wcd937x_soc_codec_probe(struct snd_soc_codec *codec)
  1621. {
  1622. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1623. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  1624. int variant;
  1625. int ret = -EINVAL;
  1626. dev_info(codec->dev, "%s()\n", __func__);
  1627. wcd937x = snd_soc_codec_get_drvdata(codec);
  1628. if (!wcd937x)
  1629. return -EINVAL;
  1630. wcd937x->codec = codec;
  1631. variant = (snd_soc_read(codec, WCD937X_DIGITAL_EFUSE_REG_0) & 0x0E) >> 1;
  1632. wcd937x->variant = variant;
  1633. wcd937x->fw_data = devm_kzalloc(codec->dev,
  1634. sizeof(*(wcd937x->fw_data)),
  1635. GFP_KERNEL);
  1636. if (!wcd937x->fw_data) {
  1637. dev_err(codec->dev, "Failed to allocate fw_data\n");
  1638. ret = -ENOMEM;
  1639. goto err;
  1640. }
  1641. set_bit(WCD9XXX_MBHC_CAL, wcd937x->fw_data->cal_bit);
  1642. ret = wcd_cal_create_hwdep(wcd937x->fw_data,
  1643. WCD9XXX_CODEC_HWDEP_NODE, codec);
  1644. if (ret < 0) {
  1645. dev_err(codec->dev, "%s hwdep failed %d\n", __func__, ret);
  1646. goto err_hwdep;
  1647. }
  1648. ret = wcd937x_mbhc_init(&wcd937x->mbhc, codec, wcd937x->fw_data);
  1649. if (ret) {
  1650. pr_err("%s: mbhc initialization failed\n", __func__);
  1651. goto err_hwdep;
  1652. }
  1653. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  1654. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  1655. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  1656. snd_soc_dapm_ignore_suspend(dapm, "IN1_HPHL");
  1657. snd_soc_dapm_ignore_suspend(dapm, "IN2_HPHR");
  1658. snd_soc_dapm_ignore_suspend(dapm, "IN3_AUX");
  1659. snd_soc_dapm_ignore_suspend(dapm, "ADC1_OUTPUT");
  1660. snd_soc_dapm_ignore_suspend(dapm, "ADC2_OUTPUT");
  1661. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  1662. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  1663. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  1664. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  1665. snd_soc_dapm_sync(dapm);
  1666. wcd937x_init_reg(codec);
  1667. if (wcd937x->variant == WCD9375_VARIANT) {
  1668. ret = snd_soc_dapm_new_controls(dapm, wcd9375_dapm_widgets,
  1669. ARRAY_SIZE(wcd9375_dapm_widgets));
  1670. if (ret < 0) {
  1671. dev_err(codec->dev, "%s: Failed to add snd_ctls\n",
  1672. __func__);
  1673. goto err_hwdep;
  1674. }
  1675. ret = snd_soc_dapm_add_routes(dapm, wcd9375_audio_map,
  1676. ARRAY_SIZE(wcd9375_audio_map));
  1677. if (ret < 0) {
  1678. dev_err(codec->dev, "%s: Failed to add routes\n",
  1679. __func__);
  1680. goto err_hwdep;
  1681. }
  1682. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  1683. snd_soc_dapm_ignore_suspend(dapm, "DMIC1_OUTPUT");
  1684. snd_soc_dapm_ignore_suspend(dapm, "DMIC2_OUTPUT");
  1685. snd_soc_dapm_ignore_suspend(dapm, "DMIC3_OUTPUT");
  1686. snd_soc_dapm_ignore_suspend(dapm, "DMIC4_OUTPUT");
  1687. snd_soc_dapm_ignore_suspend(dapm, "DMIC5_OUTPUT");
  1688. snd_soc_dapm_ignore_suspend(dapm, "DMIC6_OUTPUT");
  1689. snd_soc_dapm_ignore_suspend(dapm, "ADC3_OUTPUT");
  1690. snd_soc_dapm_sync(dapm);
  1691. }
  1692. wcd937x->version = WCD937X_VERSION_1_0;
  1693. /* Register event notifier */
  1694. wcd937x->nblock.notifier_call = wcd937x_event_notify;
  1695. if (wcd937x->register_notifier) {
  1696. ret = wcd937x->register_notifier(wcd937x->handle,
  1697. &wcd937x->nblock,
  1698. true);
  1699. if (ret) {
  1700. dev_err(codec->dev,
  1701. "%s: Failed to register notifier %d\n",
  1702. __func__, ret);
  1703. return ret;
  1704. }
  1705. }
  1706. return ret;
  1707. err_hwdep:
  1708. wcd937x->fw_data = NULL;
  1709. err:
  1710. return ret;
  1711. }
  1712. static int wcd937x_soc_codec_remove(struct snd_soc_codec *codec)
  1713. {
  1714. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1715. if (!wcd937x)
  1716. return -EINVAL;
  1717. if (wcd937x->register_notifier)
  1718. return wcd937x->register_notifier(wcd937x->handle,
  1719. &wcd937x->nblock,
  1720. false);
  1721. return 0;
  1722. }
  1723. static struct regmap *wcd937x_get_regmap(struct device *dev)
  1724. {
  1725. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  1726. return wcd937x->regmap;
  1727. }
  1728. static struct snd_soc_codec_driver soc_codec_dev_wcd937x = {
  1729. .probe = wcd937x_soc_codec_probe,
  1730. .remove = wcd937x_soc_codec_remove,
  1731. .get_regmap = wcd937x_get_regmap,
  1732. .component_driver = {
  1733. .controls = wcd937x_snd_controls,
  1734. .num_controls = ARRAY_SIZE(wcd937x_snd_controls),
  1735. .dapm_widgets = wcd937x_dapm_widgets,
  1736. .num_dapm_widgets = ARRAY_SIZE(wcd937x_dapm_widgets),
  1737. .dapm_routes = wcd937x_audio_map,
  1738. .num_dapm_routes = ARRAY_SIZE(wcd937x_audio_map),
  1739. },
  1740. };
  1741. static int wcd937x_reset(struct device *dev)
  1742. {
  1743. struct wcd937x_priv *wcd937x = NULL;
  1744. int rc = 0;
  1745. int value = 0;
  1746. if (!dev)
  1747. return -ENODEV;
  1748. wcd937x = dev_get_drvdata(dev);
  1749. if (!wcd937x)
  1750. return -EINVAL;
  1751. if (!wcd937x->rst_np) {
  1752. dev_err(dev, "%s: reset gpio device node not specified\n",
  1753. __func__);
  1754. return -EINVAL;
  1755. }
  1756. value = msm_cdc_pinctrl_get_state(wcd937x->rst_np);
  1757. if (value > 0)
  1758. return 0;
  1759. rc = msm_cdc_pinctrl_select_sleep_state(wcd937x->rst_np);
  1760. if (rc) {
  1761. dev_err(dev, "%s: wcd sleep state request fail!\n",
  1762. __func__);
  1763. return rc;
  1764. }
  1765. /* 20ms sleep required after pulling the reset gpio to LOW */
  1766. usleep_range(20, 30);
  1767. rc = msm_cdc_pinctrl_select_active_state(wcd937x->rst_np);
  1768. if (rc) {
  1769. dev_err(dev, "%s: wcd active state request fail!\n",
  1770. __func__);
  1771. return rc;
  1772. }
  1773. /* 20ms sleep required after pulling the reset gpio to HIGH */
  1774. usleep_range(20, 30);
  1775. return rc;
  1776. }
  1777. static int wcd937x_read_of_property_u32(struct device *dev, const char *name,
  1778. u32 *val)
  1779. {
  1780. int rc = 0;
  1781. rc = of_property_read_u32(dev->of_node, name, val);
  1782. if (rc)
  1783. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  1784. __func__, name, dev->of_node->full_name);
  1785. return rc;
  1786. }
  1787. static void wcd937x_dt_parse_micbias_info(struct device *dev,
  1788. struct wcd937x_micbias_setting *mb)
  1789. {
  1790. u32 prop_val = 0;
  1791. int rc = 0;
  1792. /* MB1 */
  1793. if (of_find_property(dev->of_node, "qcom,cdc-micbias1-mv",
  1794. NULL)) {
  1795. rc = wcd937x_read_of_property_u32(dev,
  1796. "qcom,cdc-micbias1-mv",
  1797. &prop_val);
  1798. if (!rc)
  1799. mb->micb1_mv = prop_val;
  1800. } else {
  1801. dev_info(dev, "%s: Micbias1 DT property not found\n",
  1802. __func__);
  1803. }
  1804. /* MB2 */
  1805. if (of_find_property(dev->of_node, "qcom,cdc-micbias2-mv",
  1806. NULL)) {
  1807. rc = wcd937x_read_of_property_u32(dev,
  1808. "qcom,cdc-micbias2-mv",
  1809. &prop_val);
  1810. if (!rc)
  1811. mb->micb2_mv = prop_val;
  1812. } else {
  1813. dev_info(dev, "%s: Micbias2 DT property not found\n",
  1814. __func__);
  1815. }
  1816. /* MB3 */
  1817. if (of_find_property(dev->of_node, "qcom,cdc-micbias3-mv",
  1818. NULL)) {
  1819. rc = wcd937x_read_of_property_u32(dev,
  1820. "qcom,cdc-micbias3-mv",
  1821. &prop_val);
  1822. if (!rc)
  1823. mb->micb3_mv = prop_val;
  1824. } else {
  1825. dev_info(dev, "%s: Micbias3 DT property not found\n",
  1826. __func__);
  1827. }
  1828. }
  1829. static int wcd937x_reset_low(struct device *dev)
  1830. {
  1831. struct wcd937x_priv *wcd937x = NULL;
  1832. int rc = 0;
  1833. if (!dev)
  1834. return -ENODEV;
  1835. wcd937x = dev_get_drvdata(dev);
  1836. if (!wcd937x)
  1837. return -EINVAL;
  1838. if (!wcd937x->rst_np) {
  1839. dev_err(dev, "%s: reset gpio device node not specified\n",
  1840. __func__);
  1841. return -EINVAL;
  1842. }
  1843. rc = msm_cdc_pinctrl_select_sleep_state(wcd937x->rst_np);
  1844. if (rc) {
  1845. dev_err(dev, "%s: wcd sleep state request fail!\n",
  1846. __func__);
  1847. return rc;
  1848. }
  1849. /* 20ms sleep required after pulling the reset gpio to LOW */
  1850. usleep_range(20, 30);
  1851. return rc;
  1852. }
  1853. struct wcd937x_pdata *wcd937x_populate_dt_data(struct device *dev)
  1854. {
  1855. struct wcd937x_pdata *pdata = NULL;
  1856. pdata = devm_kzalloc(dev, sizeof(struct wcd937x_pdata),
  1857. GFP_KERNEL);
  1858. if (!pdata)
  1859. return NULL;
  1860. pdata->rst_np = of_parse_phandle(dev->of_node,
  1861. "qcom,wcd-rst-gpio-node", 0);
  1862. if (!pdata->rst_np) {
  1863. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  1864. __func__, "qcom,wcd-rst-gpio-node",
  1865. dev->of_node->full_name);
  1866. return NULL;
  1867. }
  1868. /* Parse power supplies */
  1869. msm_cdc_get_power_supplies(dev, &pdata->regulator,
  1870. &pdata->num_supplies);
  1871. if (!pdata->regulator || (pdata->num_supplies <= 0)) {
  1872. dev_err(dev, "%s: no power supplies defined for codec\n",
  1873. __func__);
  1874. return NULL;
  1875. }
  1876. pdata->rx_slave = of_parse_phandle(dev->of_node, "qcom,rx-slave", 0);
  1877. pdata->tx_slave = of_parse_phandle(dev->of_node, "qcom,tx-slave", 0);
  1878. wcd937x_dt_parse_micbias_info(dev, &pdata->micbias);
  1879. return pdata;
  1880. }
  1881. static int wcd937x_bind(struct device *dev)
  1882. {
  1883. int ret = 0, i = 0;
  1884. struct wcd937x_priv *wcd937x = NULL;
  1885. struct wcd937x_pdata *pdata = NULL;
  1886. struct wcd_ctrl_platform_data *plat_data = NULL;
  1887. wcd937x = devm_kzalloc(dev, sizeof(struct wcd937x_priv), GFP_KERNEL);
  1888. if (!wcd937x)
  1889. return -ENOMEM;
  1890. dev_set_drvdata(dev, wcd937x);
  1891. pdata = wcd937x_populate_dt_data(dev);
  1892. if (!pdata) {
  1893. dev_err(dev, "%s: Fail to obtain platform data\n", __func__);
  1894. return -EINVAL;
  1895. }
  1896. wcd937x->dev = dev;
  1897. wcd937x->dev->platform_data = pdata;
  1898. wcd937x->rst_np = pdata->rst_np;
  1899. ret = msm_cdc_init_supplies(dev, &wcd937x->supplies,
  1900. pdata->regulator, pdata->num_supplies);
  1901. if (!wcd937x->supplies) {
  1902. dev_err(dev, "%s: Cannot init wcd supplies\n",
  1903. __func__);
  1904. return ret;
  1905. }
  1906. plat_data = dev_get_platdata(dev->parent);
  1907. if (!plat_data) {
  1908. dev_err(dev, "%s: platform data from parent is NULL\n",
  1909. __func__);
  1910. return -EINVAL;
  1911. }
  1912. wcd937x->handle = (void *)plat_data->handle;
  1913. if (!wcd937x->handle) {
  1914. dev_err(dev, "%s: handle is NULL\n", __func__);
  1915. return -EINVAL;
  1916. }
  1917. wcd937x->update_wcd_event = plat_data->update_wcd_event;
  1918. if (!wcd937x->update_wcd_event) {
  1919. dev_err(dev, "%s: update_wcd_event api is null!\n",
  1920. __func__);
  1921. return -EINVAL;
  1922. }
  1923. wcd937x->register_notifier = plat_data->register_notifier;
  1924. if (!wcd937x->register_notifier) {
  1925. dev_err(dev, "%s: register_notifier api is null!\n",
  1926. __func__);
  1927. return -EINVAL;
  1928. }
  1929. ret = msm_cdc_enable_static_supplies(dev, wcd937x->supplies,
  1930. pdata->regulator,
  1931. pdata->num_supplies);
  1932. if (ret) {
  1933. dev_err(dev, "%s: wcd static supply enable failed!\n",
  1934. __func__);
  1935. return ret;
  1936. }
  1937. wcd937x_reset(dev);
  1938. /*
  1939. * Add 5msec delay to provide sufficient time for
  1940. * soundwire auto enumeration of slave devices as
  1941. * as per HW requirement.
  1942. */
  1943. usleep_range(5000, 5010);
  1944. ret = component_bind_all(dev, wcd937x);
  1945. if (ret) {
  1946. dev_err(dev, "%s: Slave bind failed, ret = %d\n",
  1947. __func__, ret);
  1948. return ret;
  1949. }
  1950. ret = wcd937x_parse_port_mapping(dev, "qcom,rx_swr_ch_map", CODEC_RX);
  1951. ret |= wcd937x_parse_port_mapping(dev, "qcom,tx_swr_ch_map", CODEC_TX);
  1952. if (ret) {
  1953. dev_err(dev, "Failed to read port mapping\n");
  1954. goto err;
  1955. }
  1956. wcd937x->rx_swr_dev = get_matching_swr_slave_device(pdata->rx_slave);
  1957. if (!wcd937x->rx_swr_dev) {
  1958. dev_err(dev, "%s: Could not find RX swr slave device\n",
  1959. __func__);
  1960. ret = -ENODEV;
  1961. goto err;
  1962. }
  1963. wcd937x->tx_swr_dev = get_matching_swr_slave_device(pdata->tx_slave);
  1964. if (!wcd937x->tx_swr_dev) {
  1965. dev_err(dev, "%s: Could not find TX swr slave device\n",
  1966. __func__);
  1967. ret = -ENODEV;
  1968. goto err;
  1969. }
  1970. wcd937x->regmap = devm_regmap_init_swr(wcd937x->tx_swr_dev,
  1971. &wcd937x_regmap_config);
  1972. if (!wcd937x->regmap) {
  1973. dev_err(dev, "%s: Regmap init failed\n",
  1974. __func__);
  1975. goto err;
  1976. }
  1977. /* Set all interupts as edge triggered */
  1978. for (i = 0; i < wcd937x_regmap_irq_chip.num_regs; i++)
  1979. regmap_write(wcd937x->regmap,
  1980. (WCD937X_DIGITAL_INTR_LEVEL_0 + i), 0);
  1981. wcd937x_regmap_irq_chip.irq_drv_data = wcd937x;
  1982. wcd937x->irq_info.wcd_regmap_irq_chip = &wcd937x_regmap_irq_chip;
  1983. wcd937x->irq_info.codec_name = "WCD937X";
  1984. wcd937x->irq_info.regmap = wcd937x->regmap;
  1985. wcd937x->irq_info.dev = dev;
  1986. ret = wcd_irq_init(&wcd937x->irq_info, &wcd937x->virq);
  1987. if (ret) {
  1988. dev_err(dev, "%s: IRQ init failed: %d\n",
  1989. __func__, ret);
  1990. goto err;
  1991. }
  1992. wcd937x->tx_swr_dev->slave_irq = wcd937x->virq;
  1993. ret = snd_soc_register_codec(dev, &soc_codec_dev_wcd937x,
  1994. NULL, 0);
  1995. if (ret) {
  1996. dev_err(dev, "%s: Codec registration failed\n",
  1997. __func__);
  1998. goto err_irq;
  1999. }
  2000. return ret;
  2001. err_irq:
  2002. wcd_irq_exit(&wcd937x->irq_info, wcd937x->virq);
  2003. err:
  2004. component_unbind_all(dev, wcd937x);
  2005. return ret;
  2006. }
  2007. static void wcd937x_unbind(struct device *dev)
  2008. {
  2009. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  2010. wcd_irq_exit(&wcd937x->irq_info, wcd937x->virq);
  2011. snd_soc_unregister_codec(dev);
  2012. component_unbind_all(dev, wcd937x);
  2013. }
  2014. static const struct of_device_id wcd937x_dt_match[] = {
  2015. { .compatible = "qcom,wcd937x-codec" },
  2016. {}
  2017. };
  2018. static const struct component_master_ops wcd937x_comp_ops = {
  2019. .bind = wcd937x_bind,
  2020. .unbind = wcd937x_unbind,
  2021. };
  2022. static int wcd937x_compare_of(struct device *dev, void *data)
  2023. {
  2024. return dev->of_node == data;
  2025. }
  2026. static void wcd937x_release_of(struct device *dev, void *data)
  2027. {
  2028. of_node_put(data);
  2029. }
  2030. static int wcd937x_add_slave_components(struct device *dev,
  2031. struct component_match **matchptr)
  2032. {
  2033. struct device_node *np, *rx_node, *tx_node;
  2034. np = dev->of_node;
  2035. rx_node = of_parse_phandle(np, "qcom,rx-slave", 0);
  2036. if (!rx_node) {
  2037. dev_err(dev, "%s: Rx-slave node not defined\n", __func__);
  2038. return -ENODEV;
  2039. }
  2040. of_node_get(rx_node);
  2041. component_match_add_release(dev, matchptr,
  2042. wcd937x_release_of,
  2043. wcd937x_compare_of,
  2044. rx_node);
  2045. tx_node = of_parse_phandle(np, "qcom,tx-slave", 0);
  2046. if (!tx_node) {
  2047. dev_err(dev, "%s: Tx-slave node not defined\n", __func__);
  2048. return -ENODEV;
  2049. }
  2050. of_node_get(tx_node);
  2051. component_match_add_release(dev, matchptr,
  2052. wcd937x_release_of,
  2053. wcd937x_compare_of,
  2054. tx_node);
  2055. return 0;
  2056. }
  2057. static int wcd937x_probe(struct platform_device *pdev)
  2058. {
  2059. struct component_match *match = NULL;
  2060. int ret;
  2061. ret = wcd937x_add_slave_components(&pdev->dev, &match);
  2062. if (ret)
  2063. return ret;
  2064. return component_master_add_with_match(&pdev->dev,
  2065. &wcd937x_comp_ops, match);
  2066. }
  2067. static int wcd937x_remove(struct platform_device *pdev)
  2068. {
  2069. component_master_del(&pdev->dev, &wcd937x_comp_ops);
  2070. return 0;
  2071. }
  2072. static struct platform_driver wcd937x_codec_driver = {
  2073. .probe = wcd937x_probe,
  2074. .remove = wcd937x_remove,
  2075. .driver = {
  2076. .name = "wcd937x_codec",
  2077. .owner = THIS_MODULE,
  2078. .of_match_table = of_match_ptr(wcd937x_dt_match),
  2079. },
  2080. };
  2081. module_platform_driver(wcd937x_codec_driver);
  2082. MODULE_DESCRIPTION("WCD937X Codec driver");
  2083. MODULE_LICENSE("GPL v2");