dp_rx_err.c 65 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428
  1. /*
  2. * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "dp_internal.h"
  23. #include "hal_api.h"
  24. #include "qdf_trace.h"
  25. #include "qdf_nbuf.h"
  26. #include "dp_rx_defrag.h"
  27. #ifdef FEATURE_WDS
  28. #include "dp_txrx_wds.h"
  29. #endif
  30. #include <enet.h> /* LLC_SNAP_HDR_LEN */
  31. #include "qdf_net_types.h"
  32. /* Max buffer in invalid peer SG list*/
  33. #define DP_MAX_INVALID_BUFFERS 10
  34. /**
  35. * dp_rx_mcast_echo_check() - check if the mcast pkt is a loop
  36. * back on same vap or a different vap.
  37. *
  38. * @soc: core DP main context
  39. * @peer: dp peer handler
  40. * @rx_tlv_hdr: start of the rx TLV header
  41. * @nbuf: pkt buffer
  42. *
  43. * Return: bool (true if it is a looped back pkt else false)
  44. *
  45. */
  46. static inline bool dp_rx_mcast_echo_check(struct dp_soc *soc,
  47. struct dp_peer *peer,
  48. uint8_t *rx_tlv_hdr,
  49. qdf_nbuf_t nbuf)
  50. {
  51. struct dp_vdev *vdev = peer->vdev;
  52. struct dp_ast_entry *ase = NULL;
  53. uint16_t sa_idx = 0;
  54. uint8_t *data;
  55. /*
  56. * Multicast Echo Check is required only if vdev is STA and
  57. * received pkt is a multicast/broadcast pkt. otherwise
  58. * skip the MEC check.
  59. */
  60. if (vdev->opmode != wlan_op_mode_sta)
  61. return false;
  62. if (!hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc, rx_tlv_hdr))
  63. return false;
  64. data = qdf_nbuf_data(nbuf);
  65. /*
  66. * if the received pkts src mac addr matches with vdev
  67. * mac address then drop the pkt as it is looped back
  68. */
  69. if (!(qdf_mem_cmp(&data[QDF_MAC_ADDR_SIZE],
  70. vdev->mac_addr.raw,
  71. QDF_MAC_ADDR_SIZE)))
  72. return true;
  73. /*
  74. * In case of qwrap isolation mode, donot drop loopback packets.
  75. * In isolation mode, all packets from the wired stations need to go
  76. * to rootap and loop back to reach the wireless stations and
  77. * vice-versa.
  78. */
  79. if (qdf_unlikely(vdev->isolation_vdev))
  80. return false;
  81. /* if the received pkts src mac addr matches with the
  82. * wired PCs MAC addr which is behind the STA or with
  83. * wireless STAs MAC addr which are behind the Repeater,
  84. * then drop the pkt as it is looped back
  85. */
  86. qdf_spin_lock_bh(&soc->ast_lock);
  87. if (hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc, rx_tlv_hdr)) {
  88. sa_idx = hal_rx_msdu_end_sa_idx_get(soc->hal_soc, rx_tlv_hdr);
  89. if ((sa_idx < 0) ||
  90. (sa_idx >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) {
  91. qdf_spin_unlock_bh(&soc->ast_lock);
  92. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  93. "invalid sa_idx: %d", sa_idx);
  94. qdf_assert_always(0);
  95. }
  96. ase = soc->ast_table[sa_idx];
  97. if (!ase) {
  98. /* We do not get a peer map event for STA and without
  99. * this event we don't know what is STA's sa_idx.
  100. * For this reason the AST is still not associated to
  101. * any index postion in ast_table.
  102. * In these kind of scenarios where sa is valid but
  103. * ast is not in ast_table, we use the below API to get
  104. * AST entry for STA's own mac_address.
  105. */
  106. ase = dp_peer_ast_list_find(soc, peer,
  107. &data[QDF_MAC_ADDR_SIZE]);
  108. if (ase) {
  109. ase->ast_idx = sa_idx;
  110. soc->ast_table[sa_idx] = ase;
  111. ase->is_mapped = TRUE;
  112. }
  113. }
  114. } else {
  115. ase = dp_peer_ast_hash_find_by_pdevid(soc,
  116. &data[QDF_MAC_ADDR_SIZE],
  117. vdev->pdev->pdev_id);
  118. }
  119. if (ase) {
  120. if (ase->pdev_id != vdev->pdev->pdev_id) {
  121. qdf_spin_unlock_bh(&soc->ast_lock);
  122. QDF_TRACE(QDF_MODULE_ID_DP,
  123. QDF_TRACE_LEVEL_INFO,
  124. "Detected DBDC Root AP %pM, %d %d",
  125. &data[QDF_MAC_ADDR_SIZE], vdev->pdev->pdev_id,
  126. ase->pdev_id);
  127. return false;
  128. }
  129. if ((ase->type == CDP_TXRX_AST_TYPE_MEC) ||
  130. (ase->peer != peer)) {
  131. qdf_spin_unlock_bh(&soc->ast_lock);
  132. QDF_TRACE(QDF_MODULE_ID_DP,
  133. QDF_TRACE_LEVEL_INFO,
  134. "received pkt with same src mac %pM",
  135. &data[QDF_MAC_ADDR_SIZE]);
  136. return true;
  137. }
  138. }
  139. qdf_spin_unlock_bh(&soc->ast_lock);
  140. return false;
  141. }
  142. /**
  143. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  144. * (WBM) by address
  145. *
  146. * @soc: core DP main context
  147. * @link_desc_addr: link descriptor addr
  148. *
  149. * Return: QDF_STATUS
  150. */
  151. QDF_STATUS
  152. dp_rx_link_desc_return_by_addr(struct dp_soc *soc,
  153. hal_buff_addrinfo_t link_desc_addr,
  154. uint8_t bm_action)
  155. {
  156. struct dp_srng *wbm_desc_rel_ring = &soc->wbm_desc_rel_ring;
  157. hal_ring_handle_t wbm_rel_srng = wbm_desc_rel_ring->hal_srng;
  158. hal_soc_handle_t hal_soc = soc->hal_soc;
  159. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  160. void *src_srng_desc;
  161. if (!wbm_rel_srng) {
  162. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  163. "WBM RELEASE RING not initialized");
  164. return status;
  165. }
  166. if (qdf_unlikely(hal_srng_access_start(hal_soc, wbm_rel_srng))) {
  167. /* TODO */
  168. /*
  169. * Need API to convert from hal_ring pointer to
  170. * Ring Type / Ring Id combo
  171. */
  172. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  173. FL("HAL RING Access For WBM Release SRNG Failed - %pK"),
  174. wbm_rel_srng);
  175. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  176. goto done;
  177. }
  178. src_srng_desc = hal_srng_src_get_next(hal_soc, wbm_rel_srng);
  179. if (qdf_likely(src_srng_desc)) {
  180. /* Return link descriptor through WBM ring (SW2WBM)*/
  181. hal_rx_msdu_link_desc_set(hal_soc,
  182. src_srng_desc, link_desc_addr, bm_action);
  183. status = QDF_STATUS_SUCCESS;
  184. } else {
  185. struct hal_srng *srng = (struct hal_srng *)wbm_rel_srng;
  186. DP_STATS_INC(soc, rx.err.hal_ring_access_full_fail, 1);
  187. dp_info_rl("WBM Release Ring (Id %d) Full(Fail CNT %u)",
  188. srng->ring_id,
  189. soc->stats.rx.err.hal_ring_access_full_fail);
  190. dp_info_rl("HP 0x%x Reap HP 0x%x TP 0x%x Cached TP 0x%x",
  191. *srng->u.src_ring.hp_addr,
  192. srng->u.src_ring.reap_hp,
  193. *srng->u.src_ring.tp_addr,
  194. srng->u.src_ring.cached_tp);
  195. QDF_BUG(0);
  196. }
  197. done:
  198. hal_srng_access_end(hal_soc, wbm_rel_srng);
  199. return status;
  200. }
  201. /**
  202. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  203. * (WBM), following error handling
  204. *
  205. * @soc: core DP main context
  206. * @ring_desc: opaque pointer to the REO error ring descriptor
  207. *
  208. * Return: QDF_STATUS
  209. */
  210. QDF_STATUS
  211. dp_rx_link_desc_return(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  212. uint8_t bm_action)
  213. {
  214. void *buf_addr_info = HAL_RX_REO_BUF_ADDR_INFO_GET(ring_desc);
  215. return dp_rx_link_desc_return_by_addr(soc, buf_addr_info, bm_action);
  216. }
  217. /**
  218. * dp_rx_msdus_drop() - Drops all MSDU's per MPDU
  219. *
  220. * @soc: core txrx main context
  221. * @ring_desc: opaque pointer to the REO error ring descriptor
  222. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  223. * @head: head of the local descriptor free-list
  224. * @tail: tail of the local descriptor free-list
  225. * @quota: No. of units (packets) that can be serviced in one shot.
  226. *
  227. * This function is used to drop all MSDU in an MPDU
  228. *
  229. * Return: uint32_t: No. of elements processed
  230. */
  231. static uint32_t
  232. dp_rx_msdus_drop(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  233. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  234. uint8_t *mac_id,
  235. uint32_t quota)
  236. {
  237. uint32_t rx_bufs_used = 0;
  238. void *link_desc_va;
  239. struct hal_buf_info buf_info;
  240. struct dp_pdev *pdev;
  241. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  242. int i;
  243. uint8_t *rx_tlv_hdr;
  244. uint32_t tid;
  245. struct rx_desc_pool *rx_desc_pool;
  246. hal_rx_reo_buf_paddr_get(ring_desc, &buf_info);
  247. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  248. /* No UNMAP required -- this is "malloc_consistent" memory */
  249. hal_rx_msdu_list_get(soc->hal_soc, link_desc_va, &msdu_list,
  250. &mpdu_desc_info->msdu_count);
  251. for (i = 0; (i < mpdu_desc_info->msdu_count) && quota--; i++) {
  252. struct dp_rx_desc *rx_desc =
  253. dp_rx_cookie_2_va_rxdma_buf(soc,
  254. msdu_list.sw_cookie[i]);
  255. qdf_assert_always(rx_desc);
  256. /* all buffers from a MSDU link link belong to same pdev */
  257. *mac_id = rx_desc->pool_id;
  258. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc->pool_id);
  259. if (!pdev) {
  260. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  261. "pdev is null for pool_id = %d",
  262. rx_desc->pool_id);
  263. return rx_bufs_used;
  264. }
  265. if (!dp_rx_desc_check_magic(rx_desc)) {
  266. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  267. FL("Invalid rx_desc cookie=%d"),
  268. msdu_list.sw_cookie[i]);
  269. return rx_bufs_used;
  270. }
  271. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  272. qdf_nbuf_unmap_nbytes_single(soc->osdev, rx_desc->nbuf,
  273. QDF_DMA_FROM_DEVICE,
  274. rx_desc_pool->buf_size);
  275. rx_desc->unmapped = 1;
  276. rx_desc->rx_buf_start = qdf_nbuf_data(rx_desc->nbuf);
  277. rx_bufs_used++;
  278. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  279. rx_desc->rx_buf_start);
  280. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  281. "Packet received with PN error for tid :%d", tid);
  282. rx_tlv_hdr = qdf_nbuf_data(rx_desc->nbuf);
  283. if (hal_rx_encryption_info_valid(soc->hal_soc, rx_tlv_hdr))
  284. hal_rx_print_pn(soc->hal_soc, rx_tlv_hdr);
  285. /* Just free the buffers */
  286. qdf_nbuf_free(rx_desc->nbuf);
  287. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  288. &pdev->free_list_tail, rx_desc);
  289. }
  290. /* Return link descriptor through WBM ring (SW2WBM)*/
  291. dp_rx_link_desc_return(soc, ring_desc, HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  292. return rx_bufs_used;
  293. }
  294. /**
  295. * dp_rx_pn_error_handle() - Handles PN check errors
  296. *
  297. * @soc: core txrx main context
  298. * @ring_desc: opaque pointer to the REO error ring descriptor
  299. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  300. * @head: head of the local descriptor free-list
  301. * @tail: tail of the local descriptor free-list
  302. * @quota: No. of units (packets) that can be serviced in one shot.
  303. *
  304. * This function implements PN error handling
  305. * If the peer is configured to ignore the PN check errors
  306. * or if DP feels, that this frame is still OK, the frame can be
  307. * re-injected back to REO to use some of the other features
  308. * of REO e.g. duplicate detection/routing to other cores
  309. *
  310. * Return: uint32_t: No. of elements processed
  311. */
  312. static uint32_t
  313. dp_rx_pn_error_handle(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  314. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  315. uint8_t *mac_id,
  316. uint32_t quota)
  317. {
  318. uint16_t peer_id;
  319. uint32_t rx_bufs_used = 0;
  320. struct dp_peer *peer;
  321. bool peer_pn_policy = false;
  322. peer_id = DP_PEER_METADATA_PEER_ID_GET(
  323. mpdu_desc_info->peer_meta_data);
  324. peer = dp_peer_find_by_id(soc, peer_id);
  325. if (qdf_likely(peer)) {
  326. /*
  327. * TODO: Check for peer specific policies & set peer_pn_policy
  328. */
  329. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  330. "discard rx due to PN error for peer %pK %pM",
  331. peer, peer->mac_addr.raw);
  332. dp_peer_unref_del_find_by_id(peer);
  333. }
  334. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  335. "Packet received with PN error");
  336. /* No peer PN policy -- definitely drop */
  337. if (!peer_pn_policy)
  338. rx_bufs_used = dp_rx_msdus_drop(soc, ring_desc,
  339. mpdu_desc_info,
  340. mac_id, quota);
  341. return rx_bufs_used;
  342. }
  343. /**
  344. * dp_rx_oor_handle() - Handles the msdu which is OOR error
  345. *
  346. * @soc: core txrx main context
  347. * @nbuf: pointer to msdu skb
  348. * @peer_id: dp peer ID
  349. * @rx_tlv_hdr: start of rx tlv header
  350. *
  351. * This function process the msdu delivered from REO2TCL
  352. * ring with error type OOR
  353. *
  354. * Return: None
  355. */
  356. static void
  357. dp_rx_oor_handle(struct dp_soc *soc,
  358. qdf_nbuf_t nbuf,
  359. uint16_t peer_id,
  360. uint8_t *rx_tlv_hdr)
  361. {
  362. uint32_t frame_mask = FRAME_MASK_IPV4_ARP | FRAME_MASK_IPV4_DHCP |
  363. FRAME_MASK_IPV4_EAPOL | FRAME_MASK_IPV6_DHCP;
  364. struct dp_peer *peer = NULL;
  365. peer = dp_peer_find_by_id(soc, peer_id);
  366. if (!peer) {
  367. dp_info_rl("peer not found");
  368. goto free_nbuf;
  369. }
  370. if (dp_rx_deliver_special_frame(soc, peer, nbuf, frame_mask,
  371. rx_tlv_hdr)) {
  372. DP_STATS_INC(soc, rx.err.reo_err_oor_to_stack, 1);
  373. dp_peer_unref_del_find_by_id(peer);
  374. return;
  375. }
  376. free_nbuf:
  377. if (peer)
  378. dp_peer_unref_del_find_by_id(peer);
  379. DP_STATS_INC(soc, rx.err.reo_err_oor_drop, 1);
  380. qdf_nbuf_free(nbuf);
  381. }
  382. /**
  383. * dp_rx_reo_err_entry_process() - Handles for REO error entry processing
  384. *
  385. * @soc: core txrx main context
  386. * @ring_desc: opaque pointer to the REO error ring descriptor
  387. * @mpdu_desc_info: pointer to mpdu level description info
  388. * @link_desc_va: pointer to msdu_link_desc virtual address
  389. * @err_code: reo erro code fetched from ring entry
  390. *
  391. * Function to handle msdus fetched from msdu link desc, currently
  392. * only support 2K jump, OOR error.
  393. *
  394. * Return: msdu count processed.
  395. */
  396. static uint32_t
  397. dp_rx_reo_err_entry_process(struct dp_soc *soc,
  398. void *ring_desc,
  399. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  400. void *link_desc_va,
  401. enum hal_reo_error_code err_code)
  402. {
  403. uint32_t rx_bufs_used = 0;
  404. struct dp_pdev *pdev;
  405. int i;
  406. uint8_t *rx_tlv_hdr_first;
  407. uint8_t *rx_tlv_hdr_last;
  408. uint32_t tid = DP_MAX_TIDS;
  409. uint16_t peer_id;
  410. struct dp_rx_desc *rx_desc;
  411. struct rx_desc_pool *rx_desc_pool;
  412. qdf_nbuf_t nbuf;
  413. struct hal_buf_info buf_info;
  414. struct hal_rx_msdu_list msdu_list;
  415. uint16_t num_msdus;
  416. struct buffer_addr_info cur_link_desc_addr_info = { 0 };
  417. struct buffer_addr_info next_link_desc_addr_info = { 0 };
  418. /* First field in REO Dst ring Desc is buffer_addr_info */
  419. void *buf_addr_info = ring_desc;
  420. qdf_nbuf_t head_nbuf = NULL;
  421. qdf_nbuf_t tail_nbuf = NULL;
  422. uint16_t msdu_processed = 0;
  423. peer_id = DP_PEER_METADATA_PEER_ID_GET(
  424. mpdu_desc_info->peer_meta_data);
  425. more_msdu_link_desc:
  426. hal_rx_msdu_list_get(soc->hal_soc, link_desc_va, &msdu_list,
  427. &num_msdus);
  428. for (i = 0; i < num_msdus; i++) {
  429. rx_desc = dp_rx_cookie_2_va_rxdma_buf(
  430. soc,
  431. msdu_list.sw_cookie[i]);
  432. qdf_assert_always(rx_desc);
  433. /* all buffers from a MSDU link belong to same pdev */
  434. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc->pool_id);
  435. nbuf = rx_desc->nbuf;
  436. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  437. qdf_nbuf_unmap_nbytes_single(soc->osdev, nbuf,
  438. QDF_DMA_FROM_DEVICE,
  439. rx_desc_pool->buf_size);
  440. rx_desc->unmapped = 1;
  441. QDF_NBUF_CB_RX_PKT_LEN(nbuf) = msdu_list.msdu_info[i].msdu_len;
  442. rx_bufs_used++;
  443. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  444. &pdev->free_list_tail, rx_desc);
  445. DP_RX_LIST_APPEND(head_nbuf, tail_nbuf, nbuf);
  446. if (qdf_unlikely(msdu_list.msdu_info[i].msdu_flags &
  447. HAL_MSDU_F_MSDU_CONTINUATION))
  448. continue;
  449. rx_tlv_hdr_first = qdf_nbuf_data(head_nbuf);
  450. rx_tlv_hdr_last = qdf_nbuf_data(tail_nbuf);
  451. if (qdf_unlikely(head_nbuf != tail_nbuf)) {
  452. nbuf = dp_rx_sg_create(head_nbuf);
  453. qdf_nbuf_set_is_frag(nbuf, 1);
  454. DP_STATS_INC(soc, rx.err.reo_err_oor_sg_count, 1);
  455. }
  456. switch (err_code) {
  457. case HAL_REO_ERR_REGULAR_FRAME_2K_JUMP:
  458. /*
  459. * only first msdu, mpdu start description tlv valid?
  460. * and use it for following msdu.
  461. */
  462. if (hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  463. rx_tlv_hdr_last))
  464. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  465. rx_tlv_hdr_first);
  466. dp_2k_jump_handle(soc, nbuf, rx_tlv_hdr_last,
  467. peer_id, tid);
  468. break;
  469. case HAL_REO_ERR_REGULAR_FRAME_OOR:
  470. dp_rx_oor_handle(soc, nbuf, peer_id, rx_tlv_hdr_last);
  471. break;
  472. default:
  473. dp_err_rl("Non-support error code %d", err_code);
  474. qdf_nbuf_free(nbuf);
  475. }
  476. msdu_processed++;
  477. head_nbuf = NULL;
  478. tail_nbuf = NULL;
  479. }
  480. if (msdu_processed < mpdu_desc_info->msdu_count) {
  481. hal_rx_get_next_msdu_link_desc_buf_addr_info(
  482. link_desc_va,
  483. &next_link_desc_addr_info);
  484. if (hal_rx_is_buf_addr_info_valid(
  485. &next_link_desc_addr_info)) {
  486. dp_rx_link_desc_return_by_addr(
  487. soc,
  488. buf_addr_info,
  489. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  490. hal_rx_buffer_addr_info_get_paddr(
  491. &next_link_desc_addr_info,
  492. &buf_info);
  493. link_desc_va =
  494. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  495. cur_link_desc_addr_info = next_link_desc_addr_info;
  496. buf_addr_info = &cur_link_desc_addr_info;
  497. goto more_msdu_link_desc;
  498. }
  499. }
  500. dp_rx_link_desc_return_by_addr(soc, buf_addr_info,
  501. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  502. QDF_BUG(msdu_processed == mpdu_desc_info->msdu_count);
  503. return rx_bufs_used;
  504. }
  505. #ifdef DP_INVALID_PEER_ASSERT
  506. #define DP_PDEV_INVALID_PEER_MSDU_CHECK(head, tail) \
  507. do { \
  508. qdf_assert_always(!(head)); \
  509. qdf_assert_always(!(tail)); \
  510. } while (0)
  511. #else
  512. #define DP_PDEV_INVALID_PEER_MSDU_CHECK(head, tail) /* no op */
  513. #endif
  514. /**
  515. * dp_rx_chain_msdus() - Function to chain all msdus of a mpdu
  516. * to pdev invalid peer list
  517. *
  518. * @soc: core DP main context
  519. * @nbuf: Buffer pointer
  520. * @rx_tlv_hdr: start of rx tlv header
  521. * @mac_id: mac id
  522. *
  523. * Return: bool: true for last msdu of mpdu
  524. */
  525. static bool
  526. dp_rx_chain_msdus(struct dp_soc *soc, qdf_nbuf_t nbuf,
  527. uint8_t *rx_tlv_hdr, uint8_t mac_id)
  528. {
  529. bool mpdu_done = false;
  530. qdf_nbuf_t curr_nbuf = NULL;
  531. qdf_nbuf_t tmp_nbuf = NULL;
  532. /* TODO: Currently only single radio is supported, hence
  533. * pdev hard coded to '0' index
  534. */
  535. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  536. if (!dp_pdev) {
  537. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  538. "pdev is null for mac_id = %d", mac_id);
  539. return mpdu_done;
  540. }
  541. /* if invalid peer SG list has max values free the buffers in list
  542. * and treat current buffer as start of list
  543. *
  544. * current logic to detect the last buffer from attn_tlv is not reliable
  545. * in OFDMA UL scenario hence add max buffers check to avoid list pile
  546. * up
  547. */
  548. if (!dp_pdev->first_nbuf ||
  549. (dp_pdev->invalid_peer_head_msdu &&
  550. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST
  551. (dp_pdev->invalid_peer_head_msdu) >= DP_MAX_INVALID_BUFFERS)) {
  552. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  553. dp_pdev->ppdu_id = hal_rx_get_ppdu_id(soc->hal_soc,
  554. rx_tlv_hdr);
  555. dp_pdev->first_nbuf = true;
  556. /* If the new nbuf received is the first msdu of the
  557. * amsdu and there are msdus in the invalid peer msdu
  558. * list, then let us free all the msdus of the invalid
  559. * peer msdu list.
  560. * This scenario can happen when we start receiving
  561. * new a-msdu even before the previous a-msdu is completely
  562. * received.
  563. */
  564. curr_nbuf = dp_pdev->invalid_peer_head_msdu;
  565. while (curr_nbuf) {
  566. tmp_nbuf = curr_nbuf->next;
  567. qdf_nbuf_free(curr_nbuf);
  568. curr_nbuf = tmp_nbuf;
  569. }
  570. dp_pdev->invalid_peer_head_msdu = NULL;
  571. dp_pdev->invalid_peer_tail_msdu = NULL;
  572. hal_rx_mon_hw_desc_get_mpdu_status(soc->hal_soc, rx_tlv_hdr,
  573. &(dp_pdev->ppdu_info.rx_status));
  574. }
  575. if (dp_pdev->ppdu_id == hal_rx_attn_phy_ppdu_id_get(rx_tlv_hdr) &&
  576. hal_rx_attn_msdu_done_get(rx_tlv_hdr)) {
  577. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  578. qdf_assert_always(dp_pdev->first_nbuf == true);
  579. dp_pdev->first_nbuf = false;
  580. mpdu_done = true;
  581. }
  582. /*
  583. * For MCL, invalid_peer_head_msdu and invalid_peer_tail_msdu
  584. * should be NULL here, add the checking for debugging purpose
  585. * in case some corner case.
  586. */
  587. DP_PDEV_INVALID_PEER_MSDU_CHECK(dp_pdev->invalid_peer_head_msdu,
  588. dp_pdev->invalid_peer_tail_msdu);
  589. DP_RX_LIST_APPEND(dp_pdev->invalid_peer_head_msdu,
  590. dp_pdev->invalid_peer_tail_msdu,
  591. nbuf);
  592. return mpdu_done;
  593. }
  594. static
  595. void dp_rx_wbm_err_handle_bar(struct dp_soc *soc,
  596. struct dp_peer *peer,
  597. qdf_nbuf_t nbuf)
  598. {
  599. uint8_t *rx_tlv_hdr;
  600. unsigned char type, subtype;
  601. uint16_t start_seq_num;
  602. uint32_t tid;
  603. struct ieee80211_frame_bar *bar;
  604. /*
  605. * 1. Is this a BAR frame. If not Discard it.
  606. * 2. If it is, get the peer id, tid, ssn
  607. * 2a Do a tid update
  608. */
  609. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  610. bar = (struct ieee80211_frame_bar *)(rx_tlv_hdr + SIZE_OF_DATA_RX_TLV);
  611. type = bar->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
  612. subtype = bar->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
  613. if (!(type == IEEE80211_FC0_TYPE_CTL &&
  614. subtype == QDF_IEEE80211_FC0_SUBTYPE_BAR)) {
  615. dp_err_rl("Not a BAR frame!");
  616. return;
  617. }
  618. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc, rx_tlv_hdr);
  619. qdf_assert_always(tid < DP_MAX_TIDS);
  620. start_seq_num = le16toh(bar->i_seq) >> IEEE80211_SEQ_SEQ_SHIFT;
  621. dp_info_rl("tid %u window_size %u start_seq_num %u",
  622. tid, peer->rx_tid[tid].ba_win_size, start_seq_num);
  623. dp_rx_tid_update_wifi3(peer, tid,
  624. peer->rx_tid[tid].ba_win_size,
  625. start_seq_num);
  626. }
  627. /**
  628. * dp_2k_jump_handle() - Function to handle 2k jump exception
  629. * on WBM ring
  630. *
  631. * @soc: core DP main context
  632. * @nbuf: buffer pointer
  633. * @rx_tlv_hdr: start of rx tlv header
  634. * @peer_id: peer id of first msdu
  635. * @tid: Tid for which exception occurred
  636. *
  637. * This function handles 2k jump violations arising out
  638. * of receiving aggregates in non BA case. This typically
  639. * may happen if aggregates are received on a QOS enabled TID
  640. * while Rx window size is still initialized to value of 2. Or
  641. * it may also happen if negotiated window size is 1 but peer
  642. * sends aggregates.
  643. *
  644. */
  645. void
  646. dp_2k_jump_handle(struct dp_soc *soc,
  647. qdf_nbuf_t nbuf,
  648. uint8_t *rx_tlv_hdr,
  649. uint16_t peer_id,
  650. uint8_t tid)
  651. {
  652. struct dp_peer *peer = NULL;
  653. struct dp_rx_tid *rx_tid = NULL;
  654. uint32_t frame_mask = FRAME_MASK_IPV4_ARP;
  655. peer = dp_peer_find_by_id(soc, peer_id);
  656. if (!peer) {
  657. dp_info_rl("peer not found");
  658. goto free_nbuf;
  659. }
  660. if (tid >= DP_MAX_TIDS) {
  661. dp_info_rl("invalid tid");
  662. goto nbuf_deliver;
  663. }
  664. rx_tid = &peer->rx_tid[tid];
  665. qdf_spin_lock_bh(&rx_tid->tid_lock);
  666. /* only if BA session is active, allow send Delba */
  667. if (rx_tid->ba_status != DP_RX_BA_ACTIVE) {
  668. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  669. goto nbuf_deliver;
  670. }
  671. if (!rx_tid->delba_tx_status) {
  672. rx_tid->delba_tx_retry++;
  673. rx_tid->delba_tx_status = 1;
  674. rx_tid->delba_rcode =
  675. IEEE80211_REASON_QOS_SETUP_REQUIRED;
  676. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  677. if (soc->cdp_soc.ol_ops->send_delba) {
  678. DP_STATS_INC(soc, rx.err.rx_2k_jump_delba_sent, 1);
  679. soc->cdp_soc.ol_ops->send_delba(
  680. peer->vdev->pdev->soc->ctrl_psoc,
  681. peer->vdev->vdev_id,
  682. peer->mac_addr.raw,
  683. tid,
  684. rx_tid->delba_rcode);
  685. }
  686. } else {
  687. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  688. }
  689. nbuf_deliver:
  690. if (dp_rx_deliver_special_frame(soc, peer, nbuf, frame_mask,
  691. rx_tlv_hdr)) {
  692. DP_STATS_INC(soc, rx.err.rx_2k_jump_to_stack, 1);
  693. dp_peer_unref_del_find_by_id(peer);
  694. return;
  695. }
  696. free_nbuf:
  697. if (peer)
  698. dp_peer_unref_del_find_by_id(peer);
  699. DP_STATS_INC(soc, rx.err.rx_2k_jump_drop, 1);
  700. qdf_nbuf_free(nbuf);
  701. }
  702. #if defined(QCA_WIFI_QCA6390) || defined(QCA_WIFI_QCA6490) || \
  703. defined(QCA_WIFI_QCA6750)
  704. /**
  705. * dp_rx_null_q_handle_invalid_peer_id_exception() - to find exception
  706. * @soc: pointer to dp_soc struct
  707. * @pool_id: Pool id to find dp_pdev
  708. * @rx_tlv_hdr: TLV header of received packet
  709. * @nbuf: SKB
  710. *
  711. * In certain types of packets if peer_id is not correct then
  712. * driver may not be able find. Try finding peer by addr_2 of
  713. * received MPDU. If you find the peer then most likely sw_peer_id &
  714. * ast_idx is corrupted.
  715. *
  716. * Return: True if you find the peer by addr_2 of received MPDU else false
  717. */
  718. static bool
  719. dp_rx_null_q_handle_invalid_peer_id_exception(struct dp_soc *soc,
  720. uint8_t pool_id,
  721. uint8_t *rx_tlv_hdr,
  722. qdf_nbuf_t nbuf)
  723. {
  724. struct dp_peer *peer = NULL;
  725. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  726. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  727. struct ieee80211_frame *wh = (struct ieee80211_frame *)rx_pkt_hdr;
  728. if (!pdev) {
  729. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  730. "pdev is null for pool_id = %d", pool_id);
  731. return false;
  732. }
  733. /*
  734. * WAR- In certain types of packets if peer_id is not correct then
  735. * driver may not be able find. Try finding peer by addr_2 of
  736. * received MPDU
  737. */
  738. if (wh)
  739. peer = dp_find_peer_by_addr((struct cdp_pdev *)pdev,
  740. wh->i_addr2);
  741. if (peer) {
  742. dp_verbose_debug("MPDU sw_peer_id & ast_idx is corrupted");
  743. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  744. QDF_TRACE_LEVEL_DEBUG);
  745. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer_id,
  746. 1, qdf_nbuf_len(nbuf));
  747. qdf_nbuf_free(nbuf);
  748. return true;
  749. }
  750. return false;
  751. }
  752. /**
  753. * dp_rx_check_pkt_len() - Check for pktlen validity
  754. * @soc: DP SOC context
  755. * @pkt_len: computed length of the pkt from caller in bytes
  756. *
  757. * Return: true if pktlen > RX_BUFFER_SIZE, else return false
  758. *
  759. */
  760. static inline
  761. bool dp_rx_check_pkt_len(struct dp_soc *soc, uint32_t pkt_len)
  762. {
  763. if (qdf_unlikely(pkt_len > RX_DATA_BUFFER_SIZE)) {
  764. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_pkt_len,
  765. 1, pkt_len);
  766. return true;
  767. } else {
  768. return false;
  769. }
  770. }
  771. #else
  772. static inline bool
  773. dp_rx_null_q_handle_invalid_peer_id_exception(struct dp_soc *soc,
  774. uint8_t pool_id,
  775. uint8_t *rx_tlv_hdr,
  776. qdf_nbuf_t nbuf)
  777. {
  778. return false;
  779. }
  780. static inline
  781. bool dp_rx_check_pkt_len(struct dp_soc *soc, uint32_t pkt_len)
  782. {
  783. return false;
  784. }
  785. #endif
  786. /**
  787. * dp_rx_null_q_desc_handle() - Function to handle NULL Queue
  788. * descriptor violation on either a
  789. * REO or WBM ring
  790. *
  791. * @soc: core DP main context
  792. * @nbuf: buffer pointer
  793. * @rx_tlv_hdr: start of rx tlv header
  794. * @pool_id: mac id
  795. * @peer: peer handle
  796. *
  797. * This function handles NULL queue descriptor violations arising out
  798. * a missing REO queue for a given peer or a given TID. This typically
  799. * may happen if a packet is received on a QOS enabled TID before the
  800. * ADDBA negotiation for that TID, when the TID queue is setup. Or
  801. * it may also happen for MC/BC frames if they are not routed to the
  802. * non-QOS TID queue, in the absence of any other default TID queue.
  803. * This error can show up both in a REO destination or WBM release ring.
  804. *
  805. * Return: QDF_STATUS_SUCCESS, if nbuf handled successfully. QDF status code
  806. * if nbuf could not be handled or dropped.
  807. */
  808. static QDF_STATUS
  809. dp_rx_null_q_desc_handle(struct dp_soc *soc, qdf_nbuf_t nbuf,
  810. uint8_t *rx_tlv_hdr, uint8_t pool_id,
  811. struct dp_peer *peer)
  812. {
  813. uint32_t pkt_len;
  814. uint16_t msdu_len;
  815. struct dp_vdev *vdev;
  816. uint8_t tid;
  817. qdf_ether_header_t *eh;
  818. struct hal_rx_msdu_metadata msdu_metadata;
  819. uint16_t sa_idx = 0;
  820. qdf_nbuf_set_rx_chfrag_start(nbuf,
  821. hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  822. rx_tlv_hdr));
  823. qdf_nbuf_set_rx_chfrag_end(nbuf,
  824. hal_rx_msdu_end_last_msdu_get(soc->hal_soc,
  825. rx_tlv_hdr));
  826. qdf_nbuf_set_da_mcbc(nbuf, hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  827. rx_tlv_hdr));
  828. qdf_nbuf_set_da_valid(nbuf,
  829. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  830. rx_tlv_hdr));
  831. qdf_nbuf_set_sa_valid(nbuf,
  832. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  833. rx_tlv_hdr));
  834. hal_rx_msdu_metadata_get(soc->hal_soc, rx_tlv_hdr, &msdu_metadata);
  835. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  836. pkt_len = msdu_len + msdu_metadata.l3_hdr_pad + RX_PKT_TLVS_LEN;
  837. if (qdf_likely(!qdf_nbuf_is_frag(nbuf))) {
  838. if (dp_rx_check_pkt_len(soc, pkt_len))
  839. goto drop_nbuf;
  840. /* Set length in nbuf */
  841. qdf_nbuf_set_pktlen(
  842. nbuf, qdf_min(pkt_len, (uint32_t)RX_DATA_BUFFER_SIZE));
  843. qdf_assert_always(nbuf->data == rx_tlv_hdr);
  844. }
  845. /*
  846. * Check if DMA completed -- msdu_done is the last bit
  847. * to be written
  848. */
  849. if (!hal_rx_attn_msdu_done_get(rx_tlv_hdr)) {
  850. dp_err_rl("MSDU DONE failure");
  851. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  852. QDF_TRACE_LEVEL_INFO);
  853. qdf_assert(0);
  854. }
  855. if (!peer &&
  856. dp_rx_null_q_handle_invalid_peer_id_exception(soc, pool_id,
  857. rx_tlv_hdr, nbuf))
  858. return QDF_STATUS_E_FAILURE;
  859. if (!peer) {
  860. bool mpdu_done = false;
  861. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  862. if (!pdev) {
  863. dp_err_rl("pdev is null for pool_id = %d", pool_id);
  864. return QDF_STATUS_E_FAILURE;
  865. }
  866. dp_err_rl("peer is NULL");
  867. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  868. qdf_nbuf_len(nbuf));
  869. /* QCN9000 has the support enabled */
  870. if (qdf_unlikely(soc->wbm_release_desc_rx_sg_support)) {
  871. mpdu_done = true;
  872. nbuf->next = NULL;
  873. /* Trigger invalid peer handler wrapper */
  874. dp_rx_process_invalid_peer_wrapper(soc,
  875. nbuf, mpdu_done, pool_id);
  876. } else {
  877. mpdu_done = dp_rx_chain_msdus(soc, nbuf, rx_tlv_hdr, pool_id);
  878. /* Trigger invalid peer handler wrapper */
  879. dp_rx_process_invalid_peer_wrapper(soc,
  880. pdev->invalid_peer_head_msdu,
  881. mpdu_done, pool_id);
  882. }
  883. if (mpdu_done) {
  884. pdev->invalid_peer_head_msdu = NULL;
  885. pdev->invalid_peer_tail_msdu = NULL;
  886. }
  887. return QDF_STATUS_E_FAILURE;
  888. }
  889. vdev = peer->vdev;
  890. if (!vdev) {
  891. dp_err_rl("Null vdev!");
  892. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  893. goto drop_nbuf;
  894. }
  895. /*
  896. * Advance the packet start pointer by total size of
  897. * pre-header TLV's
  898. */
  899. if (qdf_nbuf_is_frag(nbuf))
  900. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  901. else
  902. qdf_nbuf_pull_head(nbuf, (msdu_metadata.l3_hdr_pad +
  903. RX_PKT_TLVS_LEN));
  904. dp_vdev_peer_stats_update_protocol_cnt(vdev, nbuf, NULL, 0, 1);
  905. if (hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc, rx_tlv_hdr)) {
  906. sa_idx = hal_rx_msdu_end_sa_idx_get(soc->hal_soc, rx_tlv_hdr);
  907. if ((sa_idx < 0) ||
  908. (sa_idx >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) {
  909. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  910. goto drop_nbuf;
  911. }
  912. }
  913. if (dp_rx_mcast_echo_check(soc, peer, rx_tlv_hdr, nbuf)) {
  914. /* this is a looped back MCBC pkt, drop it */
  915. DP_STATS_INC_PKT(peer, rx.mec_drop, 1, qdf_nbuf_len(nbuf));
  916. goto drop_nbuf;
  917. }
  918. /*
  919. * In qwrap mode if the received packet matches with any of the vdev
  920. * mac addresses, drop it. Donot receive multicast packets originated
  921. * from any proxysta.
  922. */
  923. if (check_qwrap_multicast_loopback(vdev, nbuf)) {
  924. DP_STATS_INC_PKT(peer, rx.mec_drop, 1, qdf_nbuf_len(nbuf));
  925. goto drop_nbuf;
  926. }
  927. if (qdf_unlikely((peer->nawds_enabled == true) &&
  928. hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  929. rx_tlv_hdr))) {
  930. dp_err_rl("free buffer for multicast packet");
  931. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  932. goto drop_nbuf;
  933. }
  934. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer)) {
  935. dp_err_rl("mcast Policy Check Drop pkt");
  936. goto drop_nbuf;
  937. }
  938. /* WDS Source Port Learning */
  939. if (qdf_likely(vdev->rx_decap_type == htt_cmn_pkt_type_ethernet &&
  940. vdev->wds_enabled))
  941. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr, peer, nbuf,
  942. msdu_metadata);
  943. if (hal_rx_is_unicast(soc->hal_soc, rx_tlv_hdr)) {
  944. tid = hal_rx_tid_get(soc->hal_soc, rx_tlv_hdr);
  945. if (!peer->rx_tid[tid].hw_qdesc_vaddr_unaligned)
  946. dp_rx_tid_setup_wifi3(peer, tid, 1, IEEE80211_SEQ_MAX);
  947. /* IEEE80211_SEQ_MAX indicates invalid start_seq */
  948. }
  949. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  950. qdf_nbuf_set_next(nbuf, NULL);
  951. dp_rx_deliver_raw(vdev, nbuf, peer);
  952. } else {
  953. qdf_nbuf_set_next(nbuf, NULL);
  954. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  955. qdf_nbuf_len(nbuf));
  956. /*
  957. * Update the protocol tag in SKB based on
  958. * CCE metadata
  959. */
  960. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  961. EXCEPTION_DEST_RING_ID,
  962. true, true);
  963. /* Update the flow tag in SKB based on FSE metadata */
  964. dp_rx_update_flow_tag(soc, vdev, nbuf,
  965. rx_tlv_hdr, true);
  966. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(
  967. soc->hal_soc, rx_tlv_hdr) &&
  968. (vdev->rx_decap_type ==
  969. htt_cmn_pkt_type_ethernet))) {
  970. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  971. DP_STATS_INC_PKT(peer, rx.multicast, 1,
  972. qdf_nbuf_len(nbuf));
  973. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost))
  974. DP_STATS_INC_PKT(peer, rx.bcast, 1,
  975. qdf_nbuf_len(nbuf));
  976. }
  977. qdf_nbuf_set_exc_frame(nbuf, 1);
  978. dp_rx_deliver_to_stack(soc, vdev, peer, nbuf, NULL);
  979. }
  980. return QDF_STATUS_SUCCESS;
  981. drop_nbuf:
  982. qdf_nbuf_free(nbuf);
  983. return QDF_STATUS_E_FAILURE;
  984. }
  985. /**
  986. * dp_rx_process_rxdma_err() - Function to deliver rxdma unencrypted_err
  987. * frames to OS or wifi parse errors.
  988. * @soc: core DP main context
  989. * @nbuf: buffer pointer
  990. * @rx_tlv_hdr: start of rx tlv header
  991. * @peer: peer reference
  992. * @err_code: rxdma err code
  993. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  994. * pool_id has same mapping)
  995. *
  996. * Return: None
  997. */
  998. void
  999. dp_rx_process_rxdma_err(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1000. uint8_t *rx_tlv_hdr, struct dp_peer *peer,
  1001. uint8_t err_code, uint8_t mac_id)
  1002. {
  1003. uint32_t pkt_len, l2_hdr_offset;
  1004. uint16_t msdu_len;
  1005. struct dp_vdev *vdev;
  1006. qdf_ether_header_t *eh;
  1007. bool is_broadcast;
  1008. /*
  1009. * Check if DMA completed -- msdu_done is the last bit
  1010. * to be written
  1011. */
  1012. if (!hal_rx_attn_msdu_done_get(rx_tlv_hdr)) {
  1013. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1014. FL("MSDU DONE failure"));
  1015. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1016. QDF_TRACE_LEVEL_INFO);
  1017. qdf_assert(0);
  1018. }
  1019. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc,
  1020. rx_tlv_hdr);
  1021. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  1022. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1023. if (dp_rx_check_pkt_len(soc, pkt_len)) {
  1024. /* Drop & free packet */
  1025. qdf_nbuf_free(nbuf);
  1026. return;
  1027. }
  1028. /* Set length in nbuf */
  1029. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1030. qdf_nbuf_set_next(nbuf, NULL);
  1031. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  1032. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  1033. if (!peer) {
  1034. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP, "peer is NULL");
  1035. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1036. qdf_nbuf_len(nbuf));
  1037. /* Trigger invalid peer handler wrapper */
  1038. dp_rx_process_invalid_peer_wrapper(soc, nbuf, true, mac_id);
  1039. return;
  1040. }
  1041. vdev = peer->vdev;
  1042. if (!vdev) {
  1043. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1044. FL("INVALID vdev %pK OR osif_rx"), vdev);
  1045. /* Drop & free packet */
  1046. qdf_nbuf_free(nbuf);
  1047. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1048. return;
  1049. }
  1050. /*
  1051. * Advance the packet start pointer by total size of
  1052. * pre-header TLV's
  1053. */
  1054. dp_rx_skip_tlvs(nbuf, l2_hdr_offset);
  1055. if (err_code == HAL_RXDMA_ERR_WIFI_PARSE) {
  1056. uint8_t *pkt_type;
  1057. pkt_type = qdf_nbuf_data(nbuf) + (2 * QDF_MAC_ADDR_SIZE);
  1058. if (*(uint16_t *)pkt_type == htons(QDF_ETH_TYPE_8021Q)) {
  1059. if (*(uint16_t *)(pkt_type + DP_SKIP_VLAN) ==
  1060. htons(QDF_LLC_STP)) {
  1061. DP_STATS_INC(vdev->pdev, vlan_tag_stp_cnt, 1);
  1062. goto process_mesh;
  1063. } else {
  1064. goto process_rx;
  1065. }
  1066. }
  1067. }
  1068. if (vdev->rx_decap_type == htt_cmn_pkt_type_raw)
  1069. goto process_mesh;
  1070. /*
  1071. * WAPI cert AP sends rekey frames as unencrypted.
  1072. * Thus RXDMA will report unencrypted frame error.
  1073. * To pass WAPI cert case, SW needs to pass unencrypted
  1074. * rekey frame to stack.
  1075. */
  1076. if (qdf_nbuf_is_ipv4_wapi_pkt(nbuf)) {
  1077. goto process_rx;
  1078. }
  1079. /*
  1080. * In dynamic WEP case rekey frames are not encrypted
  1081. * similar to WAPI. Allow EAPOL when 8021+wep is enabled and
  1082. * key install is already done
  1083. */
  1084. if ((vdev->sec_type == cdp_sec_type_wep104) &&
  1085. (qdf_nbuf_is_ipv4_eapol_pkt(nbuf)))
  1086. goto process_rx;
  1087. process_mesh:
  1088. if (!vdev->mesh_vdev && err_code == HAL_RXDMA_ERR_UNENCRYPTED) {
  1089. qdf_nbuf_free(nbuf);
  1090. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1091. return;
  1092. }
  1093. if (vdev->mesh_vdev) {
  1094. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  1095. == QDF_STATUS_SUCCESS) {
  1096. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_MED,
  1097. FL("mesh pkt filtered"));
  1098. DP_STATS_INC(vdev->pdev, dropped.mesh_filter, 1);
  1099. qdf_nbuf_free(nbuf);
  1100. return;
  1101. }
  1102. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  1103. }
  1104. process_rx:
  1105. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1106. rx_tlv_hdr) &&
  1107. (vdev->rx_decap_type ==
  1108. htt_cmn_pkt_type_ethernet))) {
  1109. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1110. is_broadcast = (QDF_IS_ADDR_BROADCAST
  1111. (eh->ether_dhost)) ? 1 : 0 ;
  1112. DP_STATS_INC_PKT(peer, rx.multicast, 1, qdf_nbuf_len(nbuf));
  1113. if (is_broadcast) {
  1114. DP_STATS_INC_PKT(peer, rx.bcast, 1,
  1115. qdf_nbuf_len(nbuf));
  1116. }
  1117. }
  1118. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  1119. dp_rx_deliver_raw(vdev, nbuf, peer);
  1120. } else {
  1121. /* Update the protocol tag in SKB based on CCE metadata */
  1122. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1123. EXCEPTION_DEST_RING_ID, true, true);
  1124. /* Update the flow tag in SKB based on FSE metadata */
  1125. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  1126. DP_STATS_INC(peer, rx.to_stack.num, 1);
  1127. qdf_nbuf_set_exc_frame(nbuf, 1);
  1128. dp_rx_deliver_to_stack(soc, vdev, peer, nbuf, NULL);
  1129. }
  1130. return;
  1131. }
  1132. /**
  1133. * dp_rx_process_mic_error(): Function to pass mic error indication to umac
  1134. * @soc: core DP main context
  1135. * @nbuf: buffer pointer
  1136. * @rx_tlv_hdr: start of rx tlv header
  1137. * @peer: peer handle
  1138. *
  1139. * return: void
  1140. */
  1141. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1142. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  1143. {
  1144. struct dp_vdev *vdev = NULL;
  1145. struct dp_pdev *pdev = NULL;
  1146. struct ol_if_ops *tops = NULL;
  1147. uint16_t rx_seq, fragno;
  1148. uint8_t is_raw;
  1149. unsigned int tid;
  1150. QDF_STATUS status;
  1151. struct cdp_rx_mic_err_info mic_failure_info;
  1152. if (!hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1153. rx_tlv_hdr))
  1154. return;
  1155. if (!peer) {
  1156. dp_info_rl("peer not found");
  1157. goto fail;
  1158. }
  1159. vdev = peer->vdev;
  1160. if (!vdev) {
  1161. dp_info_rl("VDEV not found");
  1162. goto fail;
  1163. }
  1164. pdev = vdev->pdev;
  1165. if (!pdev) {
  1166. dp_info_rl("PDEV not found");
  1167. goto fail;
  1168. }
  1169. is_raw = HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, qdf_nbuf_data(nbuf));
  1170. if (is_raw) {
  1171. fragno = dp_rx_frag_get_mpdu_frag_number(qdf_nbuf_data(nbuf));
  1172. /* Can get only last fragment */
  1173. if (fragno) {
  1174. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  1175. qdf_nbuf_data(nbuf));
  1176. rx_seq = hal_rx_get_rx_sequence(soc->hal_soc,
  1177. qdf_nbuf_data(nbuf));
  1178. status = dp_rx_defrag_add_last_frag(soc, peer,
  1179. tid, rx_seq, nbuf);
  1180. dp_info_rl("Frag pkt seq# %d frag# %d consumed "
  1181. "status %d !", rx_seq, fragno, status);
  1182. return;
  1183. }
  1184. }
  1185. if (hal_rx_mpdu_get_addr1(soc->hal_soc, qdf_nbuf_data(nbuf),
  1186. &mic_failure_info.da_mac_addr.bytes[0])) {
  1187. dp_err_rl("Failed to get da_mac_addr");
  1188. goto fail;
  1189. }
  1190. if (hal_rx_mpdu_get_addr2(soc->hal_soc, qdf_nbuf_data(nbuf),
  1191. &mic_failure_info.ta_mac_addr.bytes[0])) {
  1192. dp_err_rl("Failed to get ta_mac_addr");
  1193. goto fail;
  1194. }
  1195. mic_failure_info.key_id = 0;
  1196. mic_failure_info.multicast =
  1197. IEEE80211_IS_MULTICAST(mic_failure_info.da_mac_addr.bytes);
  1198. qdf_mem_zero(mic_failure_info.tsc, MIC_SEQ_CTR_SIZE);
  1199. mic_failure_info.frame_type = cdp_rx_frame_type_802_11;
  1200. mic_failure_info.data = NULL;
  1201. mic_failure_info.vdev_id = vdev->vdev_id;
  1202. tops = pdev->soc->cdp_soc.ol_ops;
  1203. if (tops->rx_mic_error)
  1204. tops->rx_mic_error(soc->ctrl_psoc, pdev->pdev_id,
  1205. &mic_failure_info);
  1206. fail:
  1207. qdf_nbuf_free(nbuf);
  1208. return;
  1209. }
  1210. uint32_t
  1211. dp_rx_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  1212. hal_ring_handle_t hal_ring_hdl, uint32_t quota)
  1213. {
  1214. hal_ring_desc_t ring_desc;
  1215. hal_soc_handle_t hal_soc;
  1216. uint32_t count = 0;
  1217. uint32_t rx_bufs_used = 0;
  1218. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  1219. uint8_t mac_id = 0;
  1220. uint8_t buf_type;
  1221. uint8_t error, rbm;
  1222. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  1223. struct hal_buf_info hbi;
  1224. struct dp_pdev *dp_pdev;
  1225. struct dp_srng *dp_rxdma_srng;
  1226. struct rx_desc_pool *rx_desc_pool;
  1227. uint32_t cookie = 0;
  1228. void *link_desc_va;
  1229. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  1230. uint16_t num_msdus;
  1231. struct dp_rx_desc *rx_desc = NULL;
  1232. /* Debug -- Remove later */
  1233. qdf_assert(soc && hal_ring_hdl);
  1234. hal_soc = soc->hal_soc;
  1235. /* Debug -- Remove later */
  1236. qdf_assert(hal_soc);
  1237. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  1238. /* TODO */
  1239. /*
  1240. * Need API to convert from hal_ring pointer to
  1241. * Ring Type / Ring Id combo
  1242. */
  1243. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  1244. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1245. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  1246. goto done;
  1247. }
  1248. while (qdf_likely(quota-- && (ring_desc =
  1249. hal_srng_dst_get_next(hal_soc,
  1250. hal_ring_hdl)))) {
  1251. DP_STATS_INC(soc, rx.err_ring_pkts, 1);
  1252. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  1253. qdf_assert(error == HAL_REO_ERROR_DETECTED);
  1254. buf_type = HAL_RX_REO_BUF_TYPE_GET(ring_desc);
  1255. /*
  1256. * For REO error ring, expect only MSDU LINK DESC
  1257. */
  1258. qdf_assert_always(buf_type == HAL_RX_REO_MSDU_LINK_DESC_TYPE);
  1259. cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  1260. /*
  1261. * check for the magic number in the sw cookie
  1262. */
  1263. qdf_assert_always((cookie >> LINK_DESC_ID_SHIFT) &
  1264. LINK_DESC_ID_START);
  1265. /*
  1266. * Check if the buffer is to be processed on this processor
  1267. */
  1268. rbm = hal_rx_ret_buf_manager_get(ring_desc);
  1269. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  1270. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &hbi);
  1271. hal_rx_msdu_list_get(soc->hal_soc, link_desc_va, &msdu_list,
  1272. &num_msdus);
  1273. if (qdf_unlikely((msdu_list.rbm[0] != DP_WBM2SW_RBM) &&
  1274. (msdu_list.rbm[0] !=
  1275. HAL_RX_BUF_RBM_WBM_IDLE_DESC_LIST) &&
  1276. (msdu_list.rbm[0] != DP_DEFRAG_RBM))) {
  1277. /* TODO */
  1278. /* Call appropriate handler */
  1279. if (!wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx)) {
  1280. DP_STATS_INC(soc, rx.err.invalid_rbm, 1);
  1281. QDF_TRACE(QDF_MODULE_ID_DP,
  1282. QDF_TRACE_LEVEL_ERROR,
  1283. FL("Invalid RBM %d"),
  1284. msdu_list.rbm[0]);
  1285. }
  1286. /* Return link descriptor through WBM ring (SW2WBM)*/
  1287. dp_rx_link_desc_return(soc, ring_desc,
  1288. HAL_BM_ACTION_RELEASE_MSDU_LIST);
  1289. continue;
  1290. }
  1291. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc,
  1292. msdu_list.sw_cookie[0]);
  1293. qdf_assert_always(rx_desc);
  1294. mac_id = rx_desc->pool_id;
  1295. /* Get the MPDU DESC info */
  1296. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  1297. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_FRAGMENT) {
  1298. /*
  1299. * We only handle one msdu per link desc for fragmented
  1300. * case. We drop the msdus and release the link desc
  1301. * back if there are more than one msdu in link desc.
  1302. */
  1303. if (qdf_unlikely(num_msdus > 1)) {
  1304. count = dp_rx_msdus_drop(soc, ring_desc,
  1305. &mpdu_desc_info,
  1306. &mac_id, quota);
  1307. rx_bufs_reaped[mac_id] += count;
  1308. continue;
  1309. }
  1310. count = dp_rx_frag_handle(soc,
  1311. ring_desc, &mpdu_desc_info,
  1312. rx_desc, &mac_id, quota);
  1313. rx_bufs_reaped[mac_id] += count;
  1314. DP_STATS_INC(soc, rx.rx_frags, 1);
  1315. continue;
  1316. }
  1317. if (hal_rx_reo_is_pn_error(ring_desc)) {
  1318. /* TOD0 */
  1319. DP_STATS_INC(soc,
  1320. rx.err.
  1321. reo_error[HAL_REO_ERR_PN_CHECK_FAILED],
  1322. 1);
  1323. /* increment @pdev level */
  1324. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1325. if (dp_pdev)
  1326. DP_STATS_INC(dp_pdev, err.reo_error, 1);
  1327. count = dp_rx_pn_error_handle(soc,
  1328. ring_desc,
  1329. &mpdu_desc_info, &mac_id,
  1330. quota);
  1331. rx_bufs_reaped[mac_id] += count;
  1332. continue;
  1333. }
  1334. if (hal_rx_reo_is_2k_jump(ring_desc)) {
  1335. /* TOD0 */
  1336. DP_STATS_INC(soc,
  1337. rx.err.
  1338. reo_error[HAL_REO_ERR_REGULAR_FRAME_2K_JUMP],
  1339. 1);
  1340. /* increment @pdev level */
  1341. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1342. if (dp_pdev)
  1343. DP_STATS_INC(dp_pdev, err.reo_error, 1);
  1344. count = dp_rx_reo_err_entry_process(
  1345. soc,
  1346. ring_desc,
  1347. &mpdu_desc_info,
  1348. link_desc_va,
  1349. HAL_REO_ERR_REGULAR_FRAME_2K_JUMP);
  1350. rx_bufs_reaped[mac_id] += count;
  1351. continue;
  1352. }
  1353. if (hal_rx_reo_is_oor_error(ring_desc)) {
  1354. DP_STATS_INC(
  1355. soc,
  1356. rx.err.
  1357. reo_error[HAL_REO_ERR_REGULAR_FRAME_OOR],
  1358. 1);
  1359. /* increment @pdev level */
  1360. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1361. if (dp_pdev)
  1362. DP_STATS_INC(dp_pdev, err.reo_error, 1);
  1363. count = dp_rx_reo_err_entry_process(
  1364. soc,
  1365. ring_desc,
  1366. &mpdu_desc_info,
  1367. link_desc_va,
  1368. HAL_REO_ERR_REGULAR_FRAME_OOR);
  1369. rx_bufs_reaped[mac_id] += count;
  1370. continue;
  1371. }
  1372. }
  1373. done:
  1374. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1375. if (soc->rx.flags.defrag_timeout_check) {
  1376. uint32_t now_ms =
  1377. qdf_system_ticks_to_msecs(qdf_system_ticks());
  1378. if (now_ms >= soc->rx.defrag.next_flush_ms)
  1379. dp_rx_defrag_waitlist_flush(soc);
  1380. }
  1381. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1382. if (rx_bufs_reaped[mac_id]) {
  1383. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1384. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  1385. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1386. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  1387. rx_desc_pool,
  1388. rx_bufs_reaped[mac_id],
  1389. &dp_pdev->free_list_head,
  1390. &dp_pdev->free_list_tail);
  1391. rx_bufs_used += rx_bufs_reaped[mac_id];
  1392. }
  1393. }
  1394. return rx_bufs_used; /* Assume no scale factor for now */
  1395. }
  1396. #ifdef DROP_RXDMA_DECRYPT_ERR
  1397. /**
  1398. * dp_handle_rxdma_decrypt_err() - Check if decrypt err frames can be handled
  1399. *
  1400. * Return: true if rxdma decrypt err frames are handled and false otheriwse
  1401. */
  1402. static inline bool dp_handle_rxdma_decrypt_err(void)
  1403. {
  1404. return false;
  1405. }
  1406. #else
  1407. static inline bool dp_handle_rxdma_decrypt_err(void)
  1408. {
  1409. return true;
  1410. }
  1411. #endif
  1412. static inline bool
  1413. dp_rx_is_sg_formation_required(struct hal_wbm_err_desc_info *info)
  1414. {
  1415. /*
  1416. * Currently Null Queue and Unencrypted error handlers has support for
  1417. * SG. Other error handler do not deal with SG buffer.
  1418. */
  1419. if (((info->wbm_err_src == HAL_RX_WBM_ERR_SRC_REO) &&
  1420. (info->reo_err_code == HAL_REO_ERR_QUEUE_DESC_ADDR_0)) ||
  1421. ((info->wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) &&
  1422. (info->rxdma_err_code == HAL_RXDMA_ERR_UNENCRYPTED)))
  1423. return true;
  1424. return false;
  1425. }
  1426. uint32_t
  1427. dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  1428. hal_ring_handle_t hal_ring_hdl, uint32_t quota)
  1429. {
  1430. hal_ring_desc_t ring_desc;
  1431. hal_soc_handle_t hal_soc;
  1432. struct dp_rx_desc *rx_desc;
  1433. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT] = { NULL };
  1434. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT] = { NULL };
  1435. uint32_t rx_bufs_used = 0;
  1436. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  1437. uint8_t buf_type, rbm;
  1438. uint32_t rx_buf_cookie;
  1439. uint8_t mac_id;
  1440. struct dp_pdev *dp_pdev;
  1441. struct dp_srng *dp_rxdma_srng;
  1442. struct rx_desc_pool *rx_desc_pool;
  1443. uint8_t *rx_tlv_hdr;
  1444. qdf_nbuf_t nbuf_head = NULL;
  1445. qdf_nbuf_t nbuf_tail = NULL;
  1446. qdf_nbuf_t nbuf, next;
  1447. struct hal_wbm_err_desc_info wbm_err_info = { 0 };
  1448. uint8_t pool_id;
  1449. uint8_t tid = 0;
  1450. uint8_t msdu_continuation = 0;
  1451. bool process_sg_buf = false;
  1452. /* Debug -- Remove later */
  1453. qdf_assert(soc && hal_ring_hdl);
  1454. hal_soc = soc->hal_soc;
  1455. /* Debug -- Remove later */
  1456. qdf_assert(hal_soc);
  1457. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  1458. /* TODO */
  1459. /*
  1460. * Need API to convert from hal_ring pointer to
  1461. * Ring Type / Ring Id combo
  1462. */
  1463. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1464. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  1465. goto done;
  1466. }
  1467. while (qdf_likely(quota)) {
  1468. ring_desc = hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1469. if (qdf_unlikely(!ring_desc)) {
  1470. /* Check hw hp in case of SG support */
  1471. if (qdf_unlikely(soc->wbm_release_desc_rx_sg_support)) {
  1472. /*
  1473. * Update the cached hp from hw hp
  1474. * This is required for partially created
  1475. * SG packets while quote is still left
  1476. */
  1477. hal_srng_sync_cachedhp(hal_soc, hal_ring_hdl);
  1478. ring_desc = hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1479. if (!ring_desc) {
  1480. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1481. FL("No Rx Hw Desc for intermediate sg -- %pK"),
  1482. hal_ring_hdl);
  1483. break;
  1484. }
  1485. } else {
  1486. /* Come out of the loop in Non SG support cases */
  1487. break;
  1488. }
  1489. }
  1490. /* XXX */
  1491. buf_type = HAL_RX_WBM_BUF_TYPE_GET(ring_desc);
  1492. /*
  1493. * For WBM ring, expect only MSDU buffers
  1494. */
  1495. qdf_assert_always(buf_type == HAL_RX_WBM_BUF_TYPE_REL_BUF);
  1496. qdf_assert((HAL_RX_WBM_ERR_SRC_GET(ring_desc)
  1497. == HAL_RX_WBM_ERR_SRC_RXDMA) ||
  1498. (HAL_RX_WBM_ERR_SRC_GET(ring_desc)
  1499. == HAL_RX_WBM_ERR_SRC_REO));
  1500. /*
  1501. * Check if the buffer is to be processed on this processor
  1502. */
  1503. rbm = hal_rx_ret_buf_manager_get(ring_desc);
  1504. if (qdf_unlikely(rbm != HAL_RX_BUF_RBM_SW3_BM)) {
  1505. /* TODO */
  1506. /* Call appropriate handler */
  1507. DP_STATS_INC(soc, rx.err.invalid_rbm, 1);
  1508. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1509. FL("Invalid RBM %d"), rbm);
  1510. continue;
  1511. }
  1512. rx_buf_cookie = HAL_RX_WBM_BUF_COOKIE_GET(ring_desc);
  1513. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  1514. qdf_assert_always(rx_desc);
  1515. if (!dp_rx_desc_check_magic(rx_desc)) {
  1516. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1517. FL("Invalid rx_desc cookie=%d"),
  1518. rx_buf_cookie);
  1519. continue;
  1520. }
  1521. /*
  1522. * this is a unlikely scenario where the host is reaping
  1523. * a descriptor which it already reaped just a while ago
  1524. * but is yet to replenish it back to HW.
  1525. * In this case host will dump the last 128 descriptors
  1526. * including the software descriptor rx_desc and assert.
  1527. */
  1528. if (qdf_unlikely(!rx_desc->in_use)) {
  1529. DP_STATS_INC(soc, rx.err.hal_wbm_rel_dup, 1);
  1530. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1531. ring_desc, rx_desc);
  1532. }
  1533. hal_rx_wbm_err_info_get(ring_desc, &wbm_err_info, hal_soc);
  1534. if (qdf_unlikely(soc->wbm_release_desc_rx_sg_support &&
  1535. dp_rx_is_sg_formation_required(&wbm_err_info))) {
  1536. /* SG is detected from continuation bit */
  1537. msdu_continuation = hal_rx_wbm_err_msdu_continuation_get(hal_soc,
  1538. ring_desc);
  1539. if (msdu_continuation &&
  1540. !(soc->wbm_sg_param.wbm_is_first_msdu_in_sg)) {
  1541. /* Update length from first buffer in SG */
  1542. soc->wbm_sg_param.wbm_sg_desc_msdu_len =
  1543. hal_rx_msdu_start_msdu_len_get(
  1544. qdf_nbuf_data(rx_desc->nbuf));
  1545. soc->wbm_sg_param.wbm_is_first_msdu_in_sg = true;
  1546. }
  1547. if (msdu_continuation) {
  1548. /* MSDU continued packets */
  1549. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  1550. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) =
  1551. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  1552. } else {
  1553. /* This is the terminal packet in SG */
  1554. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  1555. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  1556. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) =
  1557. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  1558. process_sg_buf = true;
  1559. }
  1560. }
  1561. nbuf = rx_desc->nbuf;
  1562. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  1563. qdf_nbuf_unmap_nbytes_single(soc->osdev, nbuf,
  1564. QDF_DMA_FROM_DEVICE,
  1565. rx_desc_pool->buf_size);
  1566. rx_desc->unmapped = 1;
  1567. /*
  1568. * save the wbm desc info in nbuf TLV. We will need this
  1569. * info when we do the actual nbuf processing
  1570. */
  1571. wbm_err_info.pool_id = rx_desc->pool_id;
  1572. hal_rx_wbm_err_info_set_in_tlv(qdf_nbuf_data(nbuf),
  1573. &wbm_err_info);
  1574. rx_bufs_reaped[rx_desc->pool_id]++;
  1575. if (qdf_nbuf_is_rx_chfrag_cont(nbuf) || process_sg_buf) {
  1576. DP_RX_LIST_APPEND(soc->wbm_sg_param.wbm_sg_nbuf_head,
  1577. soc->wbm_sg_param.wbm_sg_nbuf_tail,
  1578. nbuf);
  1579. if (process_sg_buf) {
  1580. DP_RX_MERGE_TWO_LIST(nbuf_head, nbuf_tail,
  1581. soc->wbm_sg_param.wbm_sg_nbuf_head,
  1582. soc->wbm_sg_param.wbm_sg_nbuf_tail);
  1583. dp_rx_wbm_sg_list_reset(soc);
  1584. process_sg_buf = false;
  1585. }
  1586. } else {
  1587. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, nbuf);
  1588. }
  1589. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  1590. &tail[rx_desc->pool_id],
  1591. rx_desc);
  1592. /*
  1593. * if continuation bit is set then we have MSDU spread
  1594. * across multiple buffers, let us not decrement quota
  1595. * till we reap all buffers of that MSDU.
  1596. */
  1597. if (qdf_likely(!msdu_continuation))
  1598. quota -= 1;
  1599. }
  1600. done:
  1601. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1602. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1603. if (rx_bufs_reaped[mac_id]) {
  1604. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  1605. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1606. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  1607. rx_desc_pool, rx_bufs_reaped[mac_id],
  1608. &head[mac_id], &tail[mac_id]);
  1609. rx_bufs_used += rx_bufs_reaped[mac_id];
  1610. }
  1611. }
  1612. nbuf = nbuf_head;
  1613. while (nbuf) {
  1614. struct dp_peer *peer;
  1615. uint16_t peer_id;
  1616. uint8_t err_code;
  1617. uint8_t *tlv_hdr;
  1618. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1619. /*
  1620. * retrieve the wbm desc info from nbuf TLV, so we can
  1621. * handle error cases appropriately
  1622. */
  1623. hal_rx_wbm_err_info_get_from_tlv(rx_tlv_hdr, &wbm_err_info);
  1624. peer_id = hal_rx_mpdu_start_sw_peer_id_get(soc->hal_soc,
  1625. rx_tlv_hdr);
  1626. peer = dp_peer_find_by_id(soc, peer_id);
  1627. if (!peer)
  1628. dp_info_rl("peer is null peer_id%u err_src%u err_rsn%u",
  1629. peer_id, wbm_err_info.wbm_err_src,
  1630. wbm_err_info.reo_psh_rsn);
  1631. /* Set queue_mapping in nbuf to 0 */
  1632. dp_set_rx_queue(nbuf, 0);
  1633. next = nbuf->next;
  1634. /*
  1635. * Form the SG for msdu continued buffers
  1636. * QCN9000 has this support
  1637. */
  1638. if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  1639. nbuf = dp_rx_sg_create(nbuf);
  1640. next = nbuf->next;
  1641. /*
  1642. * SG error handling is not done correctly,
  1643. * drop SG frames for now.
  1644. */
  1645. qdf_nbuf_free(nbuf);
  1646. dp_info_rl("scattered msdu dropped");
  1647. nbuf = next;
  1648. continue;
  1649. }
  1650. if (wbm_err_info.wbm_err_src == HAL_RX_WBM_ERR_SRC_REO) {
  1651. if (wbm_err_info.reo_psh_rsn
  1652. == HAL_RX_WBM_REO_PSH_RSN_ERROR) {
  1653. DP_STATS_INC(soc,
  1654. rx.err.reo_error
  1655. [wbm_err_info.reo_err_code], 1);
  1656. /* increment @pdev level */
  1657. pool_id = wbm_err_info.pool_id;
  1658. dp_pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  1659. if (dp_pdev)
  1660. DP_STATS_INC(dp_pdev, err.reo_error,
  1661. 1);
  1662. switch (wbm_err_info.reo_err_code) {
  1663. /*
  1664. * Handling for packets which have NULL REO
  1665. * queue descriptor
  1666. */
  1667. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  1668. pool_id = wbm_err_info.pool_id;
  1669. dp_rx_null_q_desc_handle(soc, nbuf,
  1670. rx_tlv_hdr,
  1671. pool_id, peer);
  1672. nbuf = next;
  1673. if (peer)
  1674. dp_peer_unref_del_find_by_id(
  1675. peer);
  1676. continue;
  1677. /* TODO */
  1678. /* Add per error code accounting */
  1679. case HAL_REO_ERR_REGULAR_FRAME_2K_JUMP:
  1680. pool_id = wbm_err_info.pool_id;
  1681. if (hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1682. rx_tlv_hdr)) {
  1683. peer_id =
  1684. hal_rx_mpdu_start_sw_peer_id_get(soc->hal_soc,
  1685. rx_tlv_hdr);
  1686. tid =
  1687. hal_rx_mpdu_start_tid_get(hal_soc, rx_tlv_hdr);
  1688. }
  1689. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  1690. hal_rx_msdu_start_msdu_len_get(
  1691. rx_tlv_hdr);
  1692. nbuf->next = NULL;
  1693. dp_2k_jump_handle(soc, nbuf,
  1694. rx_tlv_hdr,
  1695. peer_id, tid);
  1696. nbuf = next;
  1697. if (peer)
  1698. dp_peer_unref_del_find_by_id(
  1699. peer);
  1700. continue;
  1701. case HAL_REO_ERR_BAR_FRAME_2K_JUMP:
  1702. case HAL_REO_ERR_BAR_FRAME_OOR:
  1703. if (peer)
  1704. dp_rx_wbm_err_handle_bar(soc,
  1705. peer,
  1706. nbuf);
  1707. break;
  1708. default:
  1709. dp_info_rl("Got pkt with REO ERROR: %d",
  1710. wbm_err_info.reo_err_code);
  1711. break;
  1712. }
  1713. }
  1714. } else if (wbm_err_info.wbm_err_src ==
  1715. HAL_RX_WBM_ERR_SRC_RXDMA) {
  1716. if (wbm_err_info.rxdma_psh_rsn
  1717. == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  1718. DP_STATS_INC(soc,
  1719. rx.err.rxdma_error
  1720. [wbm_err_info.rxdma_err_code], 1);
  1721. /* increment @pdev level */
  1722. pool_id = wbm_err_info.pool_id;
  1723. dp_pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  1724. if (dp_pdev)
  1725. DP_STATS_INC(dp_pdev,
  1726. err.rxdma_error, 1);
  1727. switch (wbm_err_info.rxdma_err_code) {
  1728. case HAL_RXDMA_ERR_UNENCRYPTED:
  1729. case HAL_RXDMA_ERR_WIFI_PARSE:
  1730. pool_id = wbm_err_info.pool_id;
  1731. dp_rx_process_rxdma_err(soc, nbuf,
  1732. rx_tlv_hdr,
  1733. peer,
  1734. wbm_err_info.
  1735. rxdma_err_code,
  1736. pool_id);
  1737. nbuf = next;
  1738. if (peer)
  1739. dp_peer_unref_del_find_by_id(peer);
  1740. continue;
  1741. case HAL_RXDMA_ERR_TKIP_MIC:
  1742. dp_rx_process_mic_error(soc, nbuf,
  1743. rx_tlv_hdr,
  1744. peer);
  1745. nbuf = next;
  1746. if (peer) {
  1747. DP_STATS_INC(peer, rx.err.mic_err, 1);
  1748. dp_peer_unref_del_find_by_id(
  1749. peer);
  1750. }
  1751. continue;
  1752. case HAL_RXDMA_ERR_DECRYPT:
  1753. if (peer) {
  1754. DP_STATS_INC(peer, rx.err.
  1755. decrypt_err, 1);
  1756. break;
  1757. }
  1758. if (!dp_handle_rxdma_decrypt_err())
  1759. break;
  1760. pool_id = wbm_err_info.pool_id;
  1761. err_code = wbm_err_info.rxdma_err_code;
  1762. tlv_hdr = rx_tlv_hdr;
  1763. dp_rx_process_rxdma_err(soc, nbuf,
  1764. tlv_hdr, NULL,
  1765. err_code,
  1766. pool_id);
  1767. nbuf = next;
  1768. continue;
  1769. default:
  1770. dp_err_rl("RXDMA error %d",
  1771. wbm_err_info.rxdma_err_code);
  1772. }
  1773. }
  1774. } else {
  1775. /* Should not come here */
  1776. qdf_assert(0);
  1777. }
  1778. if (peer)
  1779. dp_peer_unref_del_find_by_id(peer);
  1780. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  1781. QDF_TRACE_LEVEL_DEBUG);
  1782. qdf_nbuf_free(nbuf);
  1783. nbuf = next;
  1784. }
  1785. return rx_bufs_used; /* Assume no scale factor for now */
  1786. }
  1787. /**
  1788. * dup_desc_dbg() - dump and assert if duplicate rx desc found
  1789. *
  1790. * @soc: core DP main context
  1791. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  1792. * @rx_desc: void pointer to rx descriptor
  1793. *
  1794. * Return: void
  1795. */
  1796. static void dup_desc_dbg(struct dp_soc *soc,
  1797. hal_rxdma_desc_t rxdma_dst_ring_desc,
  1798. void *rx_desc)
  1799. {
  1800. DP_STATS_INC(soc, rx.err.hal_rxdma_err_dup, 1);
  1801. dp_rx_dump_info_and_assert(
  1802. soc,
  1803. soc->rx_rel_ring.hal_srng,
  1804. hal_rxdma_desc_to_hal_ring_desc(rxdma_dst_ring_desc),
  1805. rx_desc);
  1806. }
  1807. /**
  1808. * dp_rx_err_mpdu_pop() - extract the MSDU's from link descs
  1809. *
  1810. * @soc: core DP main context
  1811. * @mac_id: mac id which is one of 3 mac_ids
  1812. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  1813. * @head: head of descs list to be freed
  1814. * @tail: tail of decs list to be freed
  1815. * Return: number of msdu in MPDU to be popped
  1816. */
  1817. static inline uint32_t
  1818. dp_rx_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  1819. hal_rxdma_desc_t rxdma_dst_ring_desc,
  1820. union dp_rx_desc_list_elem_t **head,
  1821. union dp_rx_desc_list_elem_t **tail)
  1822. {
  1823. void *rx_msdu_link_desc;
  1824. qdf_nbuf_t msdu;
  1825. qdf_nbuf_t last;
  1826. struct hal_rx_msdu_list msdu_list;
  1827. uint16_t num_msdus;
  1828. struct hal_buf_info buf_info;
  1829. uint32_t rx_bufs_used = 0;
  1830. uint32_t msdu_cnt;
  1831. uint32_t i;
  1832. uint8_t push_reason;
  1833. uint8_t rxdma_error_code = 0;
  1834. uint8_t bm_action = HAL_BM_ACTION_PUT_IN_IDLE_LIST;
  1835. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1836. uint32_t rx_link_buf_info[HAL_RX_BUFFINFO_NUM_DWORDS];
  1837. hal_rxdma_desc_t ring_desc;
  1838. if (!pdev) {
  1839. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1840. "pdev is null for mac_id = %d", mac_id);
  1841. return rx_bufs_used;
  1842. }
  1843. msdu = 0;
  1844. last = NULL;
  1845. hal_rx_reo_ent_buf_paddr_get(rxdma_dst_ring_desc, &buf_info,
  1846. &msdu_cnt);
  1847. push_reason =
  1848. hal_rx_reo_ent_rxdma_push_reason_get(rxdma_dst_ring_desc);
  1849. if (push_reason == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  1850. rxdma_error_code =
  1851. hal_rx_reo_ent_rxdma_error_code_get(rxdma_dst_ring_desc);
  1852. }
  1853. do {
  1854. rx_msdu_link_desc =
  1855. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  1856. qdf_assert_always(rx_msdu_link_desc);
  1857. hal_rx_msdu_list_get(soc->hal_soc, rx_msdu_link_desc,
  1858. &msdu_list, &num_msdus);
  1859. if (msdu_list.sw_cookie[0] != HAL_RX_COOKIE_SPECIAL) {
  1860. /* if the msdus belongs to NSS offloaded radio &&
  1861. * the rbm is not SW1_BM then return the msdu_link
  1862. * descriptor without freeing the msdus (nbufs). let
  1863. * these buffers be given to NSS completion ring for
  1864. * NSS to free them.
  1865. * else iterate through the msdu link desc list and
  1866. * free each msdu in the list.
  1867. */
  1868. if (msdu_list.rbm[0] != HAL_RX_BUF_RBM_SW3_BM &&
  1869. wlan_cfg_get_dp_pdev_nss_enabled(
  1870. pdev->wlan_cfg_ctx))
  1871. bm_action = HAL_BM_ACTION_RELEASE_MSDU_LIST;
  1872. else {
  1873. for (i = 0; i < num_msdus; i++) {
  1874. struct dp_rx_desc *rx_desc =
  1875. dp_rx_cookie_2_va_rxdma_buf(soc,
  1876. msdu_list.sw_cookie[i]);
  1877. qdf_assert_always(rx_desc);
  1878. msdu = rx_desc->nbuf;
  1879. /*
  1880. * this is a unlikely scenario
  1881. * where the host is reaping
  1882. * a descriptor which
  1883. * it already reaped just a while ago
  1884. * but is yet to replenish
  1885. * it back to HW.
  1886. * In this case host will dump
  1887. * the last 128 descriptors
  1888. * including the software descriptor
  1889. * rx_desc and assert.
  1890. */
  1891. ring_desc = rxdma_dst_ring_desc;
  1892. if (qdf_unlikely(!rx_desc->in_use)) {
  1893. dup_desc_dbg(soc,
  1894. ring_desc,
  1895. rx_desc);
  1896. continue;
  1897. }
  1898. qdf_nbuf_unmap_single(soc->osdev, msdu,
  1899. QDF_DMA_FROM_DEVICE);
  1900. QDF_TRACE(QDF_MODULE_ID_DP,
  1901. QDF_TRACE_LEVEL_DEBUG,
  1902. "[%s][%d] msdu_nbuf=%pK ",
  1903. __func__, __LINE__, msdu);
  1904. qdf_nbuf_free(msdu);
  1905. rx_bufs_used++;
  1906. dp_rx_add_to_free_desc_list(head,
  1907. tail, rx_desc);
  1908. }
  1909. }
  1910. } else {
  1911. rxdma_error_code = HAL_RXDMA_ERR_WAR;
  1912. }
  1913. /*
  1914. * Store the current link buffer into to the local structure
  1915. * to be used for release purpose.
  1916. */
  1917. hal_rxdma_buff_addr_info_set(rx_link_buf_info, buf_info.paddr,
  1918. buf_info.sw_cookie, buf_info.rbm);
  1919. hal_rx_mon_next_link_desc_get(rx_msdu_link_desc, &buf_info);
  1920. dp_rx_link_desc_return_by_addr(soc,
  1921. (hal_buff_addrinfo_t)
  1922. rx_link_buf_info,
  1923. bm_action);
  1924. } while (buf_info.paddr);
  1925. DP_STATS_INC(soc, rx.err.rxdma_error[rxdma_error_code], 1);
  1926. if (pdev)
  1927. DP_STATS_INC(pdev, err.rxdma_error, 1);
  1928. if (rxdma_error_code == HAL_RXDMA_ERR_DECRYPT) {
  1929. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1930. "Packet received with Decrypt error");
  1931. }
  1932. return rx_bufs_used;
  1933. }
  1934. uint32_t
  1935. dp_rxdma_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  1936. uint32_t mac_id, uint32_t quota)
  1937. {
  1938. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1939. hal_rxdma_desc_t rxdma_dst_ring_desc;
  1940. hal_soc_handle_t hal_soc;
  1941. void *err_dst_srng;
  1942. union dp_rx_desc_list_elem_t *head = NULL;
  1943. union dp_rx_desc_list_elem_t *tail = NULL;
  1944. struct dp_srng *dp_rxdma_srng;
  1945. struct rx_desc_pool *rx_desc_pool;
  1946. uint32_t work_done = 0;
  1947. uint32_t rx_bufs_used = 0;
  1948. if (!pdev)
  1949. return 0;
  1950. err_dst_srng = soc->rxdma_err_dst_ring[mac_id].hal_srng;
  1951. if (!err_dst_srng) {
  1952. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1953. "%s %d : HAL Monitor Destination Ring Init \
  1954. Failed -- %pK",
  1955. __func__, __LINE__, err_dst_srng);
  1956. return 0;
  1957. }
  1958. hal_soc = soc->hal_soc;
  1959. qdf_assert(hal_soc);
  1960. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, err_dst_srng))) {
  1961. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1962. "%s %d : HAL Monitor Destination Ring Init \
  1963. Failed -- %pK",
  1964. __func__, __LINE__, err_dst_srng);
  1965. return 0;
  1966. }
  1967. while (qdf_likely(quota-- && (rxdma_dst_ring_desc =
  1968. hal_srng_dst_get_next(hal_soc, err_dst_srng)))) {
  1969. rx_bufs_used += dp_rx_err_mpdu_pop(soc, mac_id,
  1970. rxdma_dst_ring_desc,
  1971. &head, &tail);
  1972. }
  1973. dp_srng_access_end(int_ctx, soc, err_dst_srng);
  1974. if (rx_bufs_used) {
  1975. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  1976. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1977. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  1978. rx_desc_pool, rx_bufs_used, &head, &tail);
  1979. work_done += rx_bufs_used;
  1980. }
  1981. return work_done;
  1982. }
  1983. static inline uint32_t
  1984. dp_wbm_int_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  1985. hal_rxdma_desc_t rxdma_dst_ring_desc,
  1986. union dp_rx_desc_list_elem_t **head,
  1987. union dp_rx_desc_list_elem_t **tail)
  1988. {
  1989. void *rx_msdu_link_desc;
  1990. qdf_nbuf_t msdu;
  1991. qdf_nbuf_t last;
  1992. struct hal_rx_msdu_list msdu_list;
  1993. uint16_t num_msdus;
  1994. struct hal_buf_info buf_info;
  1995. uint32_t rx_bufs_used = 0, msdu_cnt, i;
  1996. uint32_t rx_link_buf_info[HAL_RX_BUFFINFO_NUM_DWORDS];
  1997. msdu = 0;
  1998. last = NULL;
  1999. hal_rx_reo_ent_buf_paddr_get(rxdma_dst_ring_desc, &buf_info,
  2000. &msdu_cnt);
  2001. do {
  2002. rx_msdu_link_desc =
  2003. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  2004. if (!rx_msdu_link_desc) {
  2005. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_NULL_LINK_DESC], 1);
  2006. break;
  2007. }
  2008. hal_rx_msdu_list_get(soc->hal_soc, rx_msdu_link_desc,
  2009. &msdu_list, &num_msdus);
  2010. if (msdu_list.sw_cookie[0] != HAL_RX_COOKIE_SPECIAL) {
  2011. for (i = 0; i < num_msdus; i++) {
  2012. struct dp_rx_desc *rx_desc =
  2013. dp_rx_cookie_2_va_rxdma_buf(
  2014. soc,
  2015. msdu_list.sw_cookie[i]);
  2016. qdf_assert_always(rx_desc);
  2017. msdu = rx_desc->nbuf;
  2018. qdf_nbuf_unmap_single(soc->osdev, msdu,
  2019. QDF_DMA_FROM_DEVICE);
  2020. qdf_nbuf_free(msdu);
  2021. rx_bufs_used++;
  2022. dp_rx_add_to_free_desc_list(head,
  2023. tail, rx_desc);
  2024. }
  2025. }
  2026. /*
  2027. * Store the current link buffer into to the local structure
  2028. * to be used for release purpose.
  2029. */
  2030. hal_rxdma_buff_addr_info_set(rx_link_buf_info, buf_info.paddr,
  2031. buf_info.sw_cookie, buf_info.rbm);
  2032. hal_rx_mon_next_link_desc_get(rx_msdu_link_desc, &buf_info);
  2033. dp_rx_link_desc_return_by_addr(soc, (hal_buff_addrinfo_t)
  2034. rx_link_buf_info,
  2035. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  2036. } while (buf_info.paddr);
  2037. return rx_bufs_used;
  2038. }
  2039. /*
  2040. *
  2041. * dp_handle_wbm_internal_error() - handles wbm_internal_error case
  2042. *
  2043. * @soc: core DP main context
  2044. * @hal_desc: hal descriptor
  2045. * @buf_type: indicates if the buffer is of type link disc or msdu
  2046. * Return: None
  2047. *
  2048. * wbm_internal_error is seen in following scenarios :
  2049. *
  2050. * 1. Null pointers detected in WBM_RELEASE_RING descriptors
  2051. * 2. Null pointers detected during delinking process
  2052. *
  2053. * Some null pointer cases:
  2054. *
  2055. * a. MSDU buffer pointer is NULL
  2056. * b. Next_MSDU_Link_Desc pointer is NULL, with no last msdu flag
  2057. * c. MSDU buffer pointer is NULL or Next_Link_Desc pointer is NULL
  2058. */
  2059. void
  2060. dp_handle_wbm_internal_error(struct dp_soc *soc, void *hal_desc,
  2061. uint32_t buf_type)
  2062. {
  2063. struct hal_buf_info buf_info = {0};
  2064. struct dp_rx_desc *rx_desc = NULL;
  2065. struct rx_desc_pool *rx_desc_pool;
  2066. uint32_t rx_buf_cookie;
  2067. uint32_t rx_bufs_reaped = 0;
  2068. union dp_rx_desc_list_elem_t *head = NULL;
  2069. union dp_rx_desc_list_elem_t *tail = NULL;
  2070. uint8_t pool_id;
  2071. hal_rx_reo_buf_paddr_get(hal_desc, &buf_info);
  2072. if (!buf_info.paddr) {
  2073. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_NULL_BUFFER], 1);
  2074. return;
  2075. }
  2076. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(hal_desc);
  2077. pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(rx_buf_cookie);
  2078. if (buf_type == HAL_WBM_RELEASE_RING_2_BUFFER_TYPE) {
  2079. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_NULL_MSDU_BUFF], 1);
  2080. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  2081. if (rx_desc && rx_desc->nbuf) {
  2082. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  2083. qdf_nbuf_unmap_nbytes_single(soc->osdev, rx_desc->nbuf,
  2084. QDF_DMA_FROM_DEVICE,
  2085. rx_desc_pool->buf_size);
  2086. rx_desc->unmapped = 1;
  2087. qdf_nbuf_free(rx_desc->nbuf);
  2088. dp_rx_add_to_free_desc_list(&head,
  2089. &tail,
  2090. rx_desc);
  2091. rx_bufs_reaped++;
  2092. }
  2093. } else if (buf_type == HAL_WBM_RELEASE_RING_2_DESC_TYPE) {
  2094. rx_bufs_reaped = dp_wbm_int_err_mpdu_pop(soc, pool_id,
  2095. hal_desc,
  2096. &head, &tail);
  2097. }
  2098. if (rx_bufs_reaped) {
  2099. struct rx_desc_pool *rx_desc_pool;
  2100. struct dp_srng *dp_rxdma_srng;
  2101. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_BUFF_REAPED], 1);
  2102. dp_rxdma_srng = &soc->rx_refill_buf_ring[pool_id];
  2103. rx_desc_pool = &soc->rx_desc_buf[pool_id];
  2104. dp_rx_buffers_replenish(soc, pool_id, dp_rxdma_srng,
  2105. rx_desc_pool,
  2106. rx_bufs_reaped,
  2107. &head, &tail);
  2108. }
  2109. }