dp_li_rx.c 46 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "cdp_txrx_cmn_struct.h"
  20. #include "hal_hw_headers.h"
  21. #include "dp_types.h"
  22. #include "dp_rx.h"
  23. #include "dp_tx.h"
  24. #include "dp_li_rx.h"
  25. #include "dp_peer.h"
  26. #include "hal_rx.h"
  27. #include "hal_li_rx.h"
  28. #include "hal_api.h"
  29. #include "hal_li_api.h"
  30. #include "qdf_nbuf.h"
  31. #ifdef MESH_MODE_SUPPORT
  32. #include "if_meta_hdr.h"
  33. #endif
  34. #include "dp_internal.h"
  35. #include "dp_ipa.h"
  36. #ifdef WIFI_MONITOR_SUPPORT
  37. #include <dp_mon.h>
  38. #endif
  39. #ifdef FEATURE_WDS
  40. #include "dp_txrx_wds.h"
  41. #endif
  42. #include "dp_hist.h"
  43. #include "dp_rx_buffer_pool.h"
  44. #include "dp_li.h"
  45. static inline
  46. bool is_sa_da_idx_valid(uint32_t max_ast,
  47. qdf_nbuf_t nbuf, struct hal_rx_msdu_metadata msdu_info)
  48. {
  49. if ((qdf_nbuf_is_sa_valid(nbuf) && (msdu_info.sa_idx > max_ast)) ||
  50. (!qdf_nbuf_is_da_mcbc(nbuf) && qdf_nbuf_is_da_valid(nbuf) &&
  51. (msdu_info.da_idx > max_ast)))
  52. return false;
  53. return true;
  54. }
  55. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  56. #if defined(FEATURE_MCL_REPEATER) && defined(FEATURE_MEC)
  57. /**
  58. * dp_rx_mec_check_wrapper() - wrapper to dp_rx_mcast_echo_check
  59. * @soc: core DP main context
  60. * @txrx_peer: dp peer handler
  61. * @rx_tlv_hdr: start of the rx TLV header
  62. * @nbuf: pkt buffer
  63. *
  64. * Return: bool (true if it is a looped back pkt else false)
  65. */
  66. static inline bool dp_rx_mec_check_wrapper(struct dp_soc *soc,
  67. struct dp_txrx_peer *txrx_peer,
  68. uint8_t *rx_tlv_hdr,
  69. qdf_nbuf_t nbuf)
  70. {
  71. return dp_rx_mcast_echo_check(soc, txrx_peer, rx_tlv_hdr, nbuf);
  72. }
  73. #else
  74. static inline bool dp_rx_mec_check_wrapper(struct dp_soc *soc,
  75. struct dp_txrx_peer *txrx_peer,
  76. uint8_t *rx_tlv_hdr,
  77. qdf_nbuf_t nbuf)
  78. {
  79. return false;
  80. }
  81. #endif
  82. #endif
  83. #ifndef QCA_HOST_MODE_WIFI_DISABLE
  84. static bool
  85. dp_rx_intrabss_ucast_check_li(struct dp_soc *soc, qdf_nbuf_t nbuf,
  86. struct dp_txrx_peer *ta_txrx_peer,
  87. struct hal_rx_msdu_metadata *msdu_metadata,
  88. uint8_t *p_tx_vdev_id)
  89. {
  90. uint16_t da_peer_id;
  91. struct dp_txrx_peer *da_peer;
  92. struct dp_ast_entry *ast_entry;
  93. dp_txrx_ref_handle txrx_ref_handle = NULL;
  94. if (!qdf_nbuf_is_da_valid(nbuf) || qdf_nbuf_is_da_mcbc(nbuf))
  95. return false;
  96. ast_entry = soc->ast_table[msdu_metadata->da_idx];
  97. if (!ast_entry)
  98. return false;
  99. if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
  100. ast_entry->is_active = TRUE;
  101. return false;
  102. }
  103. da_peer_id = ast_entry->peer_id;
  104. /* TA peer cannot be same as peer(DA) on which AST is present
  105. * this indicates a change in topology and that AST entries
  106. * are yet to be updated.
  107. */
  108. if (da_peer_id == ta_txrx_peer->peer_id ||
  109. da_peer_id == HTT_INVALID_PEER)
  110. return false;
  111. da_peer = dp_txrx_peer_get_ref_by_id(soc, da_peer_id,
  112. &txrx_ref_handle, DP_MOD_ID_RX);
  113. if (!da_peer)
  114. return false;
  115. *p_tx_vdev_id = da_peer->vdev->vdev_id;
  116. /* If the source or destination peer in the isolation
  117. * list then dont forward instead push to bridge stack.
  118. */
  119. if (dp_get_peer_isolation(ta_txrx_peer) ||
  120. dp_get_peer_isolation(da_peer) ||
  121. da_peer->vdev->vdev_id != ta_txrx_peer->vdev->vdev_id) {
  122. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  123. return false;
  124. }
  125. if (da_peer->bss_peer) {
  126. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  127. return false;
  128. }
  129. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  130. return true;
  131. }
  132. /*
  133. * dp_rx_intrabss_fwd_li() - Implements the Intra-BSS forwarding logic
  134. *
  135. * @soc: core txrx main context
  136. * @ta_txrx_peer : source peer entry
  137. * @rx_tlv_hdr : start address of rx tlvs
  138. * @nbuf : nbuf that has to be intrabss forwarded
  139. *
  140. * Return: bool: true if it is forwarded else false
  141. */
  142. static bool
  143. dp_rx_intrabss_fwd_li(struct dp_soc *soc,
  144. struct dp_txrx_peer *ta_txrx_peer,
  145. uint8_t *rx_tlv_hdr,
  146. qdf_nbuf_t nbuf,
  147. struct hal_rx_msdu_metadata msdu_metadata,
  148. struct cdp_tid_rx_stats *tid_stats)
  149. {
  150. uint8_t tx_vdev_id;
  151. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  152. * source, then clone the pkt and send the cloned pkt for
  153. * intra BSS forwarding and original pkt up the network stack
  154. * Note: how do we handle multicast pkts. do we forward
  155. * all multicast pkts as is or let a higher layer module
  156. * like igmpsnoop decide whether to forward or not with
  157. * Mcast enhancement.
  158. */
  159. if (qdf_nbuf_is_da_mcbc(nbuf) && !ta_txrx_peer->bss_peer)
  160. return dp_rx_intrabss_mcbc_fwd(soc, ta_txrx_peer, rx_tlv_hdr,
  161. nbuf, tid_stats, 0);
  162. if (dp_rx_intrabss_eapol_drop_check(soc, ta_txrx_peer, rx_tlv_hdr,
  163. nbuf))
  164. return true;
  165. if (dp_rx_intrabss_ucast_check_li(soc, nbuf, ta_txrx_peer,
  166. &msdu_metadata, &tx_vdev_id))
  167. return dp_rx_intrabss_ucast_fwd(soc, ta_txrx_peer, tx_vdev_id,
  168. rx_tlv_hdr, nbuf, tid_stats,
  169. 0);
  170. return false;
  171. }
  172. #endif
  173. uint32_t dp_rx_process_li(struct dp_intr *int_ctx,
  174. hal_ring_handle_t hal_ring_hdl, uint8_t reo_ring_num,
  175. uint32_t quota)
  176. {
  177. hal_ring_desc_t ring_desc;
  178. hal_ring_desc_t last_prefetched_hw_desc;
  179. hal_soc_handle_t hal_soc;
  180. struct dp_rx_desc *rx_desc = NULL;
  181. struct dp_rx_desc *last_prefetched_sw_desc = NULL;
  182. qdf_nbuf_t nbuf, next;
  183. bool near_full;
  184. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT];
  185. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT];
  186. uint32_t num_pending = 0;
  187. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  188. uint16_t msdu_len = 0;
  189. uint16_t peer_id;
  190. uint8_t vdev_id;
  191. struct dp_txrx_peer *txrx_peer;
  192. dp_txrx_ref_handle txrx_ref_handle = NULL;
  193. struct dp_vdev *vdev;
  194. uint32_t pkt_len = 0;
  195. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  196. struct hal_rx_msdu_desc_info msdu_desc_info;
  197. enum hal_reo_error_status error;
  198. uint32_t peer_mdata;
  199. uint8_t *rx_tlv_hdr;
  200. uint32_t rx_bufs_reaped[MAX_PDEV_CNT];
  201. uint8_t mac_id = 0;
  202. struct dp_pdev *rx_pdev;
  203. struct dp_srng *dp_rxdma_srng;
  204. struct rx_desc_pool *rx_desc_pool;
  205. struct dp_soc *soc = int_ctx->soc;
  206. struct cdp_tid_rx_stats *tid_stats;
  207. qdf_nbuf_t nbuf_head;
  208. qdf_nbuf_t nbuf_tail;
  209. qdf_nbuf_t deliver_list_head;
  210. qdf_nbuf_t deliver_list_tail;
  211. uint32_t num_rx_bufs_reaped = 0;
  212. uint32_t intr_id;
  213. struct hif_opaque_softc *scn;
  214. int32_t tid = 0;
  215. bool is_prev_msdu_last = true;
  216. uint32_t rx_ol_pkt_cnt = 0;
  217. uint32_t num_entries = 0;
  218. struct hal_rx_msdu_metadata msdu_metadata;
  219. QDF_STATUS status;
  220. qdf_nbuf_t ebuf_head;
  221. qdf_nbuf_t ebuf_tail;
  222. uint8_t pkt_capture_offload = 0;
  223. int max_reap_limit;
  224. uint32_t old_tid;
  225. uint32_t peer_ext_stats;
  226. uint32_t dsf;
  227. uint32_t max_ast;
  228. uint64_t current_time = 0;
  229. DP_HIST_INIT();
  230. qdf_assert_always(soc && hal_ring_hdl);
  231. hal_soc = soc->hal_soc;
  232. qdf_assert_always(hal_soc);
  233. scn = soc->hif_handle;
  234. intr_id = int_ctx->dp_intr_id;
  235. num_entries = hal_srng_get_num_entries(hal_soc, hal_ring_hdl);
  236. dp_runtime_pm_mark_last_busy(soc);
  237. more_data:
  238. /* reset local variables here to be re-used in the function */
  239. nbuf_head = NULL;
  240. nbuf_tail = NULL;
  241. deliver_list_head = NULL;
  242. deliver_list_tail = NULL;
  243. txrx_peer = NULL;
  244. vdev = NULL;
  245. num_rx_bufs_reaped = 0;
  246. ebuf_head = NULL;
  247. ebuf_tail = NULL;
  248. max_reap_limit = dp_rx_get_loop_pkt_limit(soc);
  249. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  250. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  251. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  252. qdf_mem_zero(head, sizeof(head));
  253. qdf_mem_zero(tail, sizeof(tail));
  254. old_tid = 0xff;
  255. dsf = 0;
  256. peer_ext_stats = 0;
  257. max_ast = 0;
  258. rx_pdev = NULL;
  259. tid_stats = NULL;
  260. dp_pkt_get_timestamp(&current_time);
  261. if (qdf_unlikely(dp_rx_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  262. /*
  263. * Need API to convert from hal_ring pointer to
  264. * Ring Type / Ring Id combo
  265. */
  266. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  267. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  268. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  269. goto done;
  270. }
  271. if (!num_pending)
  272. num_pending = hal_srng_dst_num_valid(hal_soc, hal_ring_hdl, 0);
  273. dp_srng_dst_inv_cached_descs(soc, hal_ring_hdl, num_pending);
  274. if (num_pending > quota)
  275. num_pending = quota;
  276. last_prefetched_hw_desc = dp_srng_dst_prefetch(hal_soc, hal_ring_hdl,
  277. num_pending);
  278. peer_ext_stats = wlan_cfg_is_peer_ext_stats_enabled(soc->wlan_cfg_ctx);
  279. max_ast = wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx);
  280. /*
  281. * start reaping the buffers from reo ring and queue
  282. * them in per vdev queue.
  283. * Process the received pkts in a different per vdev loop.
  284. */
  285. while (qdf_likely(num_pending)) {
  286. ring_desc = dp_srng_dst_get_next(soc, hal_ring_hdl);
  287. if (qdf_unlikely(!ring_desc))
  288. break;
  289. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  290. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  291. dp_rx_err("%pK: HAL RING 0x%pK:error %d",
  292. soc, hal_ring_hdl, error);
  293. DP_STATS_INC(soc, rx.err.hal_reo_error[reo_ring_num],
  294. 1);
  295. /* Don't know how to deal with this -- assert */
  296. qdf_assert(0);
  297. }
  298. dp_rx_ring_record_entry(soc, reo_ring_num, ring_desc);
  299. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  300. status = dp_rx_cookie_check_and_invalidate(ring_desc);
  301. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  302. DP_STATS_INC(soc, rx.err.stale_cookie, 1);
  303. break;
  304. }
  305. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  306. status = dp_rx_desc_sanity(soc, hal_soc, hal_ring_hdl,
  307. ring_desc, rx_desc);
  308. if (QDF_IS_STATUS_ERROR(status)) {
  309. if (qdf_unlikely(rx_desc && rx_desc->nbuf)) {
  310. qdf_assert_always(!rx_desc->unmapped);
  311. dp_rx_nbuf_unmap(soc, rx_desc, reo_ring_num);
  312. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  313. rx_desc->pool_id);
  314. dp_rx_add_to_free_desc_list(
  315. &head[rx_desc->pool_id],
  316. &tail[rx_desc->pool_id],
  317. rx_desc);
  318. }
  319. continue;
  320. }
  321. /*
  322. * this is a unlikely scenario where the host is reaping
  323. * a descriptor which it already reaped just a while ago
  324. * but is yet to replenish it back to HW.
  325. * In this case host will dump the last 128 descriptors
  326. * including the software descriptor rx_desc and assert.
  327. */
  328. if (qdf_unlikely(!rx_desc->in_use)) {
  329. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  330. dp_info_rl("Reaping rx_desc not in use!");
  331. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  332. ring_desc, rx_desc);
  333. /* ignore duplicate RX desc and continue to process */
  334. /* Pop out the descriptor */
  335. continue;
  336. }
  337. status = dp_rx_desc_nbuf_sanity_check(soc, ring_desc, rx_desc);
  338. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  339. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  340. dp_info_rl("Nbuf sanity check failure!");
  341. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  342. ring_desc, rx_desc);
  343. rx_desc->in_err_state = 1;
  344. continue;
  345. }
  346. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  347. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  348. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  349. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  350. ring_desc, rx_desc);
  351. }
  352. /* Get MPDU DESC info */
  353. hal_rx_mpdu_desc_info_get_li(ring_desc, &mpdu_desc_info);
  354. /* Get MSDU DESC info */
  355. hal_rx_msdu_desc_info_get_li(ring_desc, &msdu_desc_info);
  356. if (qdf_unlikely(msdu_desc_info.msdu_flags &
  357. HAL_MSDU_F_MSDU_CONTINUATION)) {
  358. /* previous msdu has end bit set, so current one is
  359. * the new MPDU
  360. */
  361. if (is_prev_msdu_last) {
  362. /* For new MPDU check if we can read complete
  363. * MPDU by comparing the number of buffers
  364. * available and number of buffers needed to
  365. * reap this MPDU
  366. */
  367. if ((msdu_desc_info.msdu_len /
  368. (RX_DATA_BUFFER_SIZE -
  369. soc->rx_pkt_tlv_size) + 1) >
  370. num_pending) {
  371. DP_STATS_INC(soc,
  372. rx.msdu_scatter_wait_break,
  373. 1);
  374. dp_rx_cookie_reset_invalid_bit(
  375. ring_desc);
  376. /* As we are going to break out of the
  377. * loop because of unavailability of
  378. * descs to form complete SG, we need to
  379. * reset the TP in the REO destination
  380. * ring.
  381. */
  382. hal_srng_dst_dec_tp(hal_soc,
  383. hal_ring_hdl);
  384. break;
  385. }
  386. is_prev_msdu_last = false;
  387. }
  388. }
  389. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_RETRY_BIT)
  390. qdf_nbuf_set_rx_retry_flag(rx_desc->nbuf, 1);
  391. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  392. HAL_MPDU_F_RAW_AMPDU))
  393. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  394. if (!is_prev_msdu_last &&
  395. !(msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION))
  396. is_prev_msdu_last = true;
  397. rx_bufs_reaped[rx_desc->pool_id]++;
  398. peer_mdata = mpdu_desc_info.peer_meta_data;
  399. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  400. dp_rx_peer_metadata_peer_id_get_li(soc, peer_mdata);
  401. QDF_NBUF_CB_RX_VDEV_ID(rx_desc->nbuf) =
  402. DP_PEER_METADATA_VDEV_ID_GET_LI(peer_mdata);
  403. /* to indicate whether this msdu is rx offload */
  404. pkt_capture_offload =
  405. DP_PEER_METADATA_OFFLOAD_GET_LI(peer_mdata);
  406. /*
  407. * save msdu flags first, last and continuation msdu in
  408. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  409. * length to nbuf->cb. This ensures the info required for
  410. * per pkt processing is always in the same cache line.
  411. * This helps in improving throughput for smaller pkt
  412. * sizes.
  413. */
  414. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  415. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  416. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  417. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  418. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  419. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  420. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  421. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  422. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  423. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  424. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  425. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  426. qdf_nbuf_set_tid_val(rx_desc->nbuf,
  427. HAL_RX_REO_QUEUE_NUMBER_GET(ring_desc));
  428. /* set reo dest indication */
  429. qdf_nbuf_set_rx_reo_dest_ind_or_sw_excpt(
  430. rx_desc->nbuf,
  431. HAL_RX_REO_MSDU_REO_DST_IND_GET(ring_desc));
  432. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  433. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  434. /*
  435. * move unmap after scattered msdu waiting break logic
  436. * in case double skb unmap happened.
  437. */
  438. dp_rx_nbuf_unmap(soc, rx_desc, reo_ring_num);
  439. DP_RX_PROCESS_NBUF(soc, nbuf_head, nbuf_tail, ebuf_head,
  440. ebuf_tail, rx_desc);
  441. quota -= 1;
  442. num_pending -= 1;
  443. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  444. &tail[rx_desc->pool_id], rx_desc);
  445. num_rx_bufs_reaped++;
  446. dp_rx_prefetch_hw_sw_nbuf_desc(soc, hal_soc, num_pending,
  447. hal_ring_hdl,
  448. &last_prefetched_hw_desc,
  449. &last_prefetched_sw_desc);
  450. /*
  451. * only if complete msdu is received for scatter case,
  452. * then allow break.
  453. */
  454. if (is_prev_msdu_last &&
  455. dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped,
  456. max_reap_limit))
  457. break;
  458. }
  459. done:
  460. dp_rx_srng_access_end(int_ctx, soc, hal_ring_hdl);
  461. dp_rx_per_core_stats_update(soc, reo_ring_num, num_rx_bufs_reaped);
  462. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  463. /*
  464. * continue with next mac_id if no pkts were reaped
  465. * from that pool
  466. */
  467. if (!rx_bufs_reaped[mac_id])
  468. continue;
  469. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  470. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  471. dp_rx_buffers_replenish_simple(soc, mac_id, dp_rxdma_srng,
  472. rx_desc_pool,
  473. rx_bufs_reaped[mac_id],
  474. &head[mac_id], &tail[mac_id]);
  475. }
  476. dp_verbose_debug("replenished %u", rx_bufs_reaped[0]);
  477. /* Peer can be NULL is case of LFR */
  478. if (qdf_likely(txrx_peer))
  479. vdev = NULL;
  480. /*
  481. * BIG loop where each nbuf is dequeued from global queue,
  482. * processed and queued back on a per vdev basis. These nbufs
  483. * are sent to stack as and when we run out of nbufs
  484. * or a new nbuf dequeued from global queue has a different
  485. * vdev when compared to previous nbuf.
  486. */
  487. nbuf = nbuf_head;
  488. while (nbuf) {
  489. next = nbuf->next;
  490. dp_rx_prefetch_nbuf_data(nbuf, next);
  491. if (qdf_unlikely(dp_rx_is_raw_frame_dropped(nbuf))) {
  492. nbuf = next;
  493. DP_STATS_INC(soc, rx.err.raw_frm_drop, 1);
  494. continue;
  495. }
  496. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  497. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  498. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  499. if (dp_rx_is_list_ready(deliver_list_head, vdev, txrx_peer,
  500. peer_id, vdev_id)) {
  501. dp_rx_deliver_to_stack(soc, vdev, txrx_peer,
  502. deliver_list_head,
  503. deliver_list_tail);
  504. deliver_list_head = NULL;
  505. deliver_list_tail = NULL;
  506. }
  507. /* Get TID from struct cb->tid_val, save to tid */
  508. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  509. tid = qdf_nbuf_get_tid_val(nbuf);
  510. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS)) {
  511. DP_STATS_INC(soc, rx.err.rx_invalid_tid_err, 1);
  512. dp_rx_nbuf_free(nbuf);
  513. nbuf = next;
  514. continue;
  515. }
  516. if (qdf_unlikely(!txrx_peer)) {
  517. txrx_peer =
  518. dp_rx_get_txrx_peer_and_vdev(soc, nbuf, peer_id,
  519. &txrx_ref_handle,
  520. pkt_capture_offload,
  521. &vdev,
  522. &rx_pdev, &dsf,
  523. &old_tid);
  524. if (qdf_unlikely(!txrx_peer) || qdf_unlikely(!vdev)) {
  525. nbuf = next;
  526. continue;
  527. }
  528. } else if (txrx_peer && txrx_peer->peer_id != peer_id) {
  529. dp_txrx_peer_unref_delete(txrx_ref_handle,
  530. DP_MOD_ID_RX);
  531. txrx_peer =
  532. dp_rx_get_txrx_peer_and_vdev(soc, nbuf, peer_id,
  533. &txrx_ref_handle,
  534. pkt_capture_offload,
  535. &vdev,
  536. &rx_pdev, &dsf,
  537. &old_tid);
  538. if (qdf_unlikely(!txrx_peer) || qdf_unlikely(!vdev)) {
  539. nbuf = next;
  540. continue;
  541. }
  542. }
  543. if (txrx_peer) {
  544. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  545. qdf_dp_trace_set_track(nbuf, QDF_RX);
  546. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  547. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  548. QDF_NBUF_RX_PKT_DATA_TRACK;
  549. }
  550. rx_bufs_used++;
  551. /* when hlos tid override is enabled, save tid in
  552. * skb->priority
  553. */
  554. if (qdf_unlikely(vdev->skip_sw_tid_classification &
  555. DP_TXRX_HLOS_TID_OVERRIDE_ENABLED))
  556. qdf_nbuf_set_priority(nbuf, tid);
  557. DP_RX_TID_SAVE(nbuf, tid);
  558. if (qdf_unlikely(dsf) || qdf_unlikely(peer_ext_stats) ||
  559. dp_rx_pkt_tracepoints_enabled())
  560. qdf_nbuf_set_timestamp(nbuf);
  561. if (qdf_likely(old_tid != tid)) {
  562. tid_stats =
  563. &rx_pdev->stats.tid_stats.tid_rx_stats[reo_ring_num][tid];
  564. old_tid = tid;
  565. }
  566. /*
  567. * Check if DMA completed -- msdu_done is the last bit
  568. * to be written
  569. */
  570. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(nbuf))) {
  571. if (qdf_unlikely(!hal_rx_attn_msdu_done_get_li(
  572. rx_tlv_hdr))) {
  573. dp_err_rl("MSDU DONE failure");
  574. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  575. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  576. QDF_TRACE_LEVEL_INFO);
  577. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  578. qdf_assert(0);
  579. dp_rx_nbuf_free(nbuf);
  580. nbuf = next;
  581. continue;
  582. } else if (qdf_unlikely(hal_rx_attn_msdu_len_err_get_li(
  583. rx_tlv_hdr))) {
  584. DP_STATS_INC(soc, rx.err.msdu_len_err, 1);
  585. dp_rx_nbuf_free(nbuf);
  586. nbuf = next;
  587. continue;
  588. }
  589. }
  590. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  591. /*
  592. * First IF condition:
  593. * 802.11 Fragmented pkts are reinjected to REO
  594. * HW block as SG pkts and for these pkts we only
  595. * need to pull the RX TLVS header length.
  596. * Second IF condition:
  597. * The below condition happens when an MSDU is spread
  598. * across multiple buffers. This can happen in two cases
  599. * 1. The nbuf size is smaller then the received msdu.
  600. * ex: we have set the nbuf size to 2048 during
  601. * nbuf_alloc. but we received an msdu which is
  602. * 2304 bytes in size then this msdu is spread
  603. * across 2 nbufs.
  604. *
  605. * 2. AMSDUs when RAW mode is enabled.
  606. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  607. * across 1st nbuf and 2nd nbuf and last MSDU is
  608. * spread across 2nd nbuf and 3rd nbuf.
  609. *
  610. * for these scenarios let us create a skb frag_list and
  611. * append these buffers till the last MSDU of the AMSDU
  612. * Third condition:
  613. * This is the most likely case, we receive 802.3 pkts
  614. * decapsulated by HW, here we need to set the pkt length.
  615. */
  616. hal_rx_msdu_metadata_get(hal_soc, rx_tlv_hdr, &msdu_metadata);
  617. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  618. bool is_mcbc, is_sa_vld, is_da_vld;
  619. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  620. rx_tlv_hdr);
  621. is_sa_vld =
  622. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  623. rx_tlv_hdr);
  624. is_da_vld =
  625. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  626. rx_tlv_hdr);
  627. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  628. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  629. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  630. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  631. } else if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  632. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  633. nbuf = dp_rx_sg_create(soc, nbuf);
  634. next = nbuf->next;
  635. if (qdf_nbuf_is_raw_frame(nbuf)) {
  636. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  637. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  638. rx.raw, 1,
  639. msdu_len,
  640. 0);
  641. } else {
  642. DP_STATS_INC(soc, rx.err.scatter_msdu, 1);
  643. if (!dp_rx_is_sg_supported()) {
  644. dp_rx_nbuf_free(nbuf);
  645. dp_info_rl("sg msdu len %d, dropped",
  646. msdu_len);
  647. nbuf = next;
  648. continue;
  649. }
  650. }
  651. } else {
  652. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  653. pkt_len = msdu_len +
  654. msdu_metadata.l3_hdr_pad +
  655. soc->rx_pkt_tlv_size;
  656. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  657. dp_rx_skip_tlvs(soc, nbuf, msdu_metadata.l3_hdr_pad);
  658. }
  659. dp_rx_send_pktlog(soc, rx_pdev, nbuf, QDF_TX_RX_STATUS_OK);
  660. /*
  661. * process frame for mulitpass phrase processing
  662. */
  663. if (qdf_unlikely(vdev->multipass_en)) {
  664. if (dp_rx_multipass_process(txrx_peer, nbuf,
  665. tid) == false) {
  666. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  667. rx.multipass_rx_pkt_drop,
  668. 1, 0);
  669. dp_rx_nbuf_free(nbuf);
  670. nbuf = next;
  671. continue;
  672. }
  673. }
  674. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, txrx_peer)) {
  675. dp_rx_err("%pK: Policy Check Drop pkt", soc);
  676. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  677. rx.policy_check_drop,
  678. 1, 0);
  679. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  680. /* Drop & free packet */
  681. dp_rx_nbuf_free(nbuf);
  682. /* Statistics */
  683. nbuf = next;
  684. continue;
  685. }
  686. if (qdf_unlikely(txrx_peer && (txrx_peer->nawds_enabled) &&
  687. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  688. (hal_rx_get_mpdu_mac_ad4_valid(soc->hal_soc,
  689. rx_tlv_hdr) ==
  690. false))) {
  691. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  692. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  693. rx.nawds_mcast_drop,
  694. 1, 0);
  695. dp_rx_nbuf_free(nbuf);
  696. nbuf = next;
  697. continue;
  698. }
  699. /*
  700. * Drop non-EAPOL frames from unauthorized peer.
  701. */
  702. if (qdf_likely(txrx_peer) &&
  703. qdf_unlikely(!txrx_peer->authorize) &&
  704. !qdf_nbuf_is_raw_frame(nbuf)) {
  705. bool is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  706. qdf_nbuf_is_ipv4_wapi_pkt(nbuf);
  707. if (!is_eapol) {
  708. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  709. rx.peer_unauth_rx_pkt_drop,
  710. 1, 0);
  711. dp_rx_nbuf_free(nbuf);
  712. nbuf = next;
  713. continue;
  714. }
  715. }
  716. if (soc->process_rx_status)
  717. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  718. /* Update the protocol tag in SKB based on CCE metadata */
  719. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  720. reo_ring_num, false, true);
  721. /* Update the flow tag in SKB based on FSE metadata */
  722. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  723. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, txrx_peer,
  724. reo_ring_num, tid_stats, 0);
  725. if (qdf_unlikely(vdev->mesh_vdev)) {
  726. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  727. == QDF_STATUS_SUCCESS) {
  728. dp_rx_info("%pK: mesh pkt filtered", soc);
  729. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  730. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  731. 1);
  732. dp_rx_nbuf_free(nbuf);
  733. nbuf = next;
  734. continue;
  735. }
  736. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr,
  737. txrx_peer);
  738. }
  739. if (qdf_likely(vdev->rx_decap_type ==
  740. htt_cmn_pkt_type_ethernet) &&
  741. qdf_likely(!vdev->mesh_vdev)) {
  742. /* Due to HW issue, sometimes we see that the sa_idx
  743. * and da_idx are invalid with sa_valid and da_valid
  744. * bits set
  745. *
  746. * in this case we also see that value of
  747. * sa_sw_peer_id is set as 0
  748. *
  749. * Drop the packet if sa_idx and da_idx OOB or
  750. * sa_sw_peerid is 0
  751. */
  752. if (!is_sa_da_idx_valid(max_ast, nbuf,
  753. msdu_metadata)) {
  754. dp_rx_nbuf_free(nbuf);
  755. nbuf = next;
  756. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  757. continue;
  758. }
  759. if (qdf_unlikely(dp_rx_mec_check_wrapper(soc,
  760. txrx_peer,
  761. rx_tlv_hdr,
  762. nbuf))) {
  763. /* this is a looped back MCBC pkt,drop it */
  764. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  765. rx.mec_drop, 1,
  766. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  767. 0);
  768. dp_rx_nbuf_free(nbuf);
  769. nbuf = next;
  770. continue;
  771. }
  772. /* WDS Source Port Learning */
  773. if (qdf_likely(vdev->wds_enabled))
  774. dp_rx_wds_srcport_learn(soc,
  775. rx_tlv_hdr,
  776. txrx_peer,
  777. nbuf,
  778. msdu_metadata);
  779. /* Intrabss-fwd */
  780. if (dp_rx_check_ap_bridge(vdev))
  781. if (dp_rx_intrabss_fwd_li(soc, txrx_peer,
  782. rx_tlv_hdr,
  783. nbuf,
  784. msdu_metadata,
  785. tid_stats)) {
  786. nbuf = next;
  787. tid_stats->intrabss_cnt++;
  788. continue; /* Get next desc */
  789. }
  790. }
  791. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  792. dp_rx_mark_first_packet_after_wow_wakeup(vdev->pdev, rx_tlv_hdr,
  793. nbuf);
  794. dp_rx_update_stats(soc, nbuf);
  795. dp_pkt_add_timestamp(txrx_peer->vdev, QDF_PKT_RX_DRIVER_ENTRY,
  796. current_time, nbuf);
  797. DP_RX_LIST_APPEND(deliver_list_head,
  798. deliver_list_tail,
  799. nbuf);
  800. DP_PEER_STATS_FLAT_INC_PKT(txrx_peer, to_stack, 1,
  801. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  802. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  803. rx.rx_success, 1,
  804. QDF_NBUF_CB_RX_PKT_LEN(nbuf), 0);
  805. if (qdf_unlikely(txrx_peer->in_twt))
  806. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  807. rx.to_stack_twt, 1,
  808. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  809. 0);
  810. tid_stats->delivered_to_stack++;
  811. nbuf = next;
  812. }
  813. DP_RX_DELIVER_TO_STACK(soc, vdev, txrx_peer, peer_id,
  814. pkt_capture_offload,
  815. deliver_list_head,
  816. deliver_list_tail);
  817. if (qdf_likely(txrx_peer))
  818. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  819. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  820. if (quota) {
  821. num_pending =
  822. dp_rx_srng_get_num_pending(hal_soc,
  823. hal_ring_hdl,
  824. num_entries,
  825. &near_full);
  826. if (num_pending) {
  827. DP_STATS_INC(soc, rx.hp_oos2, 1);
  828. if (!hif_exec_should_yield(scn, intr_id))
  829. goto more_data;
  830. if (qdf_unlikely(near_full)) {
  831. DP_STATS_INC(soc, rx.near_full, 1);
  832. goto more_data;
  833. }
  834. }
  835. }
  836. if (vdev && vdev->osif_fisa_flush)
  837. vdev->osif_fisa_flush(soc, reo_ring_num);
  838. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  839. vdev->osif_gro_flush(vdev->osif_vdev,
  840. reo_ring_num);
  841. }
  842. }
  843. /* Update histogram statistics by looping through pdev's */
  844. DP_RX_HIST_STATS_PER_PDEV();
  845. return rx_bufs_used; /* Assume no scale factor for now */
  846. }
  847. QDF_STATUS dp_rx_desc_pool_init_li(struct dp_soc *soc,
  848. struct rx_desc_pool *rx_desc_pool,
  849. uint32_t pool_id)
  850. {
  851. return dp_rx_desc_pool_init_generic(soc, rx_desc_pool, pool_id);
  852. }
  853. void dp_rx_desc_pool_deinit_li(struct dp_soc *soc,
  854. struct rx_desc_pool *rx_desc_pool,
  855. uint32_t pool_id)
  856. {
  857. }
  858. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_li(
  859. struct dp_soc *soc,
  860. void *ring_desc,
  861. struct dp_rx_desc **r_rx_desc)
  862. {
  863. struct hal_buf_info buf_info = {0};
  864. hal_soc_handle_t hal_soc = soc->hal_soc;
  865. /* only cookie and rbm will be valid in buf_info */
  866. hal_rx_buf_cookie_rbm_get(hal_soc, (uint32_t *)ring_desc,
  867. &buf_info);
  868. if (qdf_unlikely(buf_info.rbm !=
  869. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id))) {
  870. /* TODO */
  871. /* Call appropriate handler */
  872. DP_STATS_INC(soc, rx.err.invalid_rbm, 1);
  873. dp_rx_err("%pK: Invalid RBM %d", soc, buf_info.rbm);
  874. return QDF_STATUS_E_INVAL;
  875. }
  876. if (!dp_rx_is_sw_cookie_valid(soc, buf_info.sw_cookie)) {
  877. dp_rx_err("invalid sw_cookie 0x%x", buf_info.sw_cookie);
  878. return QDF_STATUS_E_INVAL;
  879. }
  880. *r_rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, buf_info.sw_cookie);
  881. return QDF_STATUS_SUCCESS;
  882. }
  883. bool dp_rx_chain_msdus_li(struct dp_soc *soc, qdf_nbuf_t nbuf,
  884. uint8_t *rx_tlv_hdr, uint8_t mac_id)
  885. {
  886. bool mpdu_done = false;
  887. qdf_nbuf_t curr_nbuf = NULL;
  888. qdf_nbuf_t tmp_nbuf = NULL;
  889. /* TODO: Currently only single radio is supported, hence
  890. * pdev hard coded to '0' index
  891. */
  892. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  893. if (!dp_pdev) {
  894. dp_rx_debug("%pK: pdev is null for mac_id = %d", soc, mac_id);
  895. return mpdu_done;
  896. }
  897. /* if invalid peer SG list has max values free the buffers in list
  898. * and treat current buffer as start of list
  899. *
  900. * current logic to detect the last buffer from attn_tlv is not reliable
  901. * in OFDMA UL scenario hence add max buffers check to avoid list pile
  902. * up
  903. */
  904. if (!dp_pdev->first_nbuf ||
  905. (dp_pdev->invalid_peer_head_msdu &&
  906. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST
  907. (dp_pdev->invalid_peer_head_msdu) >= DP_MAX_INVALID_BUFFERS)) {
  908. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  909. dp_pdev->ppdu_id = hal_rx_get_ppdu_id(soc->hal_soc,
  910. rx_tlv_hdr);
  911. dp_pdev->first_nbuf = true;
  912. /* If the new nbuf received is the first msdu of the
  913. * amsdu and there are msdus in the invalid peer msdu
  914. * list, then let us free all the msdus of the invalid
  915. * peer msdu list.
  916. * This scenario can happen when we start receiving
  917. * new a-msdu even before the previous a-msdu is completely
  918. * received.
  919. */
  920. curr_nbuf = dp_pdev->invalid_peer_head_msdu;
  921. while (curr_nbuf) {
  922. tmp_nbuf = curr_nbuf->next;
  923. dp_rx_nbuf_free(curr_nbuf);
  924. curr_nbuf = tmp_nbuf;
  925. }
  926. dp_pdev->invalid_peer_head_msdu = NULL;
  927. dp_pdev->invalid_peer_tail_msdu = NULL;
  928. dp_monitor_get_mpdu_status(dp_pdev, soc, rx_tlv_hdr);
  929. }
  930. if (dp_pdev->ppdu_id == hal_rx_attn_phy_ppdu_id_get(soc->hal_soc,
  931. rx_tlv_hdr) &&
  932. hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  933. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  934. qdf_assert_always(dp_pdev->first_nbuf);
  935. dp_pdev->first_nbuf = false;
  936. mpdu_done = true;
  937. }
  938. /*
  939. * For MCL, invalid_peer_head_msdu and invalid_peer_tail_msdu
  940. * should be NULL here, add the checking for debugging purpose
  941. * in case some corner case.
  942. */
  943. DP_PDEV_INVALID_PEER_MSDU_CHECK(dp_pdev->invalid_peer_head_msdu,
  944. dp_pdev->invalid_peer_tail_msdu);
  945. DP_RX_LIST_APPEND(dp_pdev->invalid_peer_head_msdu,
  946. dp_pdev->invalid_peer_tail_msdu,
  947. nbuf);
  948. return mpdu_done;
  949. }
  950. static struct dp_soc *dp_rx_replensih_soc_get_li(struct dp_soc *soc,
  951. uint8_t chip_id)
  952. {
  953. return soc;
  954. }
  955. qdf_nbuf_t
  956. dp_rx_wbm_err_reap_desc_li(struct dp_intr *int_ctx, struct dp_soc *soc,
  957. hal_ring_handle_t hal_ring_hdl, uint32_t quota,
  958. uint32_t *rx_bufs_used)
  959. {
  960. hal_ring_desc_t ring_desc;
  961. hal_soc_handle_t hal_soc;
  962. struct dp_rx_desc *rx_desc;
  963. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT] = { NULL };
  964. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT] = { NULL };
  965. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  966. uint8_t buf_type;
  967. uint8_t mac_id;
  968. struct dp_srng *dp_rxdma_srng;
  969. struct rx_desc_pool *rx_desc_pool;
  970. qdf_nbuf_t nbuf_head = NULL;
  971. qdf_nbuf_t nbuf_tail = NULL;
  972. qdf_nbuf_t nbuf;
  973. union hal_wbm_err_info_u wbm_err_info = { 0 };
  974. uint8_t msdu_continuation = 0;
  975. bool process_sg_buf = false;
  976. uint32_t wbm_err_src;
  977. QDF_STATUS status;
  978. struct dp_soc *replenish_soc;
  979. uint8_t chip_id = 0;
  980. struct hal_rx_mpdu_desc_info mpdu_desc_info = { 0 };
  981. uint8_t *rx_tlv_hdr;
  982. uint32_t peer_mdata;
  983. qdf_assert(soc && hal_ring_hdl);
  984. hal_soc = soc->hal_soc;
  985. qdf_assert(hal_soc);
  986. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  987. /* TODO */
  988. /*
  989. * Need API to convert from hal_ring pointer to
  990. * Ring Type / Ring Id combo
  991. */
  992. dp_rx_err_err("%pK: HAL RING Access Failed -- %pK",
  993. soc, hal_ring_hdl);
  994. goto done;
  995. }
  996. while (qdf_likely(quota)) {
  997. ring_desc = hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  998. if (qdf_unlikely(!ring_desc))
  999. break;
  1000. /* XXX */
  1001. buf_type = HAL_RX_WBM_BUF_TYPE_GET(ring_desc);
  1002. if (dp_assert_always_internal_stat(
  1003. buf_type == HAL_RX_WBM_BUF_TYPE_REL_BUF,
  1004. soc, rx.err.wbm_err_buf_rel_type))
  1005. continue;
  1006. wbm_err_src = hal_rx_wbm_err_src_get(hal_soc, ring_desc);
  1007. qdf_assert((wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) ||
  1008. (wbm_err_src == HAL_RX_WBM_ERR_SRC_REO));
  1009. if (soc->arch_ops.dp_wbm_get_rx_desc_from_hal_desc(soc,
  1010. ring_desc,
  1011. &rx_desc)) {
  1012. dp_rx_err_err("get rx desc from hal_desc failed");
  1013. continue;
  1014. }
  1015. if (dp_assert_always_internal_stat(rx_desc, soc,
  1016. rx.err.rx_desc_null))
  1017. continue;
  1018. if (!dp_rx_desc_check_magic(rx_desc)) {
  1019. dp_rx_err_err("%pk: Invalid rx_desc %pk",
  1020. soc, rx_desc);
  1021. continue;
  1022. }
  1023. /*
  1024. * this is a unlikely scenario where the host is reaping
  1025. * a descriptor which it already reaped just a while ago
  1026. * but is yet to replenish it back to HW.
  1027. * In this case host will dump the last 128 descriptors
  1028. * including the software descriptor rx_desc and assert.
  1029. */
  1030. if (qdf_unlikely(!rx_desc->in_use)) {
  1031. DP_STATS_INC(soc, rx.err.hal_wbm_rel_dup, 1);
  1032. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1033. ring_desc, rx_desc);
  1034. continue;
  1035. }
  1036. hal_rx_wbm_err_info_get(ring_desc, &wbm_err_info.info_bit,
  1037. hal_soc);
  1038. nbuf = rx_desc->nbuf;
  1039. status = dp_rx_wbm_desc_nbuf_sanity_check(soc, hal_ring_hdl,
  1040. ring_desc, rx_desc);
  1041. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  1042. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  1043. dp_info_rl("Rx error Nbuf %pk sanity check failure!",
  1044. nbuf);
  1045. rx_desc->in_err_state = 1;
  1046. rx_desc->unmapped = 1;
  1047. rx_bufs_reaped[rx_desc->pool_id]++;
  1048. dp_rx_add_to_free_desc_list(
  1049. &head[rx_desc->pool_id],
  1050. &tail[rx_desc->pool_id],
  1051. rx_desc);
  1052. continue;
  1053. }
  1054. /* Update peer_id in nbuf cb */
  1055. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1056. peer_mdata = hal_rx_tlv_peer_meta_data_get(soc->hal_soc,
  1057. rx_tlv_hdr);
  1058. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  1059. dp_rx_peer_metadata_peer_id_get(soc, peer_mdata);
  1060. /* Get MPDU DESC info */
  1061. hal_rx_mpdu_desc_info_get(hal_soc, ring_desc, &mpdu_desc_info);
  1062. if (qdf_likely(mpdu_desc_info.mpdu_flags &
  1063. HAL_MPDU_F_QOS_CONTROL_VALID))
  1064. qdf_nbuf_set_tid_val(rx_desc->nbuf, mpdu_desc_info.tid);
  1065. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  1066. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  1067. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  1068. rx_desc->unmapped = 1;
  1069. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  1070. if (qdf_unlikely(
  1071. soc->wbm_release_desc_rx_sg_support &&
  1072. dp_rx_is_sg_formation_required(&wbm_err_info.info_bit))) {
  1073. /* SG is detected from continuation bit */
  1074. msdu_continuation =
  1075. hal_rx_wbm_err_msdu_continuation_get(hal_soc,
  1076. ring_desc);
  1077. if (msdu_continuation &&
  1078. !(soc->wbm_sg_param.wbm_is_first_msdu_in_sg)) {
  1079. /* Update length from first buffer in SG */
  1080. soc->wbm_sg_param.wbm_sg_desc_msdu_len =
  1081. hal_rx_msdu_start_msdu_len_get(
  1082. soc->hal_soc,
  1083. qdf_nbuf_data(nbuf));
  1084. soc->wbm_sg_param.wbm_is_first_msdu_in_sg =
  1085. true;
  1086. }
  1087. if (msdu_continuation) {
  1088. /* MSDU continued packets */
  1089. qdf_nbuf_set_rx_chfrag_cont(nbuf, 1);
  1090. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  1091. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  1092. } else {
  1093. /* This is the terminal packet in SG */
  1094. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  1095. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  1096. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  1097. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  1098. process_sg_buf = true;
  1099. }
  1100. }
  1101. /*
  1102. * save the wbm desc info in nbuf CB/TLV. We will need this
  1103. * info when we do the actual nbuf processing
  1104. */
  1105. wbm_err_info.info_bit.pool_id = rx_desc->pool_id;
  1106. dp_rx_set_wbm_err_info_in_nbuf(soc, nbuf, wbm_err_info);
  1107. rx_bufs_reaped[rx_desc->pool_id]++;
  1108. if (qdf_nbuf_is_rx_chfrag_cont(nbuf) || process_sg_buf) {
  1109. DP_RX_LIST_APPEND(soc->wbm_sg_param.wbm_sg_nbuf_head,
  1110. soc->wbm_sg_param.wbm_sg_nbuf_tail,
  1111. nbuf);
  1112. if (process_sg_buf) {
  1113. if (!dp_rx_buffer_pool_refill(
  1114. soc,
  1115. soc->wbm_sg_param.wbm_sg_nbuf_head,
  1116. rx_desc->pool_id))
  1117. DP_RX_MERGE_TWO_LIST(
  1118. nbuf_head, nbuf_tail,
  1119. soc->wbm_sg_param.wbm_sg_nbuf_head,
  1120. soc->wbm_sg_param.wbm_sg_nbuf_tail);
  1121. dp_rx_wbm_sg_list_last_msdu_war(soc);
  1122. dp_rx_wbm_sg_list_reset(soc);
  1123. process_sg_buf = false;
  1124. }
  1125. } else if (!dp_rx_buffer_pool_refill(soc, nbuf,
  1126. rx_desc->pool_id)) {
  1127. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, nbuf);
  1128. }
  1129. dp_rx_add_to_free_desc_list
  1130. (&head[rx_desc->pool_id],
  1131. &tail[rx_desc->pool_id], rx_desc);
  1132. /*
  1133. * if continuation bit is set then we have MSDU spread
  1134. * across multiple buffers, let us not decrement quota
  1135. * till we reap all buffers of that MSDU.
  1136. */
  1137. if (qdf_likely(!msdu_continuation))
  1138. quota -= 1;
  1139. }
  1140. done:
  1141. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1142. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1143. /*
  1144. * continue with next mac_id if no pkts were reaped
  1145. * from that pool
  1146. */
  1147. if (!rx_bufs_reaped[mac_id])
  1148. continue;
  1149. replenish_soc =
  1150. dp_rx_replensih_soc_get_li(soc, chip_id);
  1151. dp_rxdma_srng =
  1152. &replenish_soc->rx_refill_buf_ring[mac_id];
  1153. rx_desc_pool = &replenish_soc->rx_desc_buf[mac_id];
  1154. dp_rx_buffers_replenish_simple(
  1155. replenish_soc, mac_id,
  1156. dp_rxdma_srng,
  1157. rx_desc_pool,
  1158. rx_bufs_reaped[mac_id],
  1159. &head[mac_id],
  1160. &tail[mac_id]);
  1161. *rx_bufs_used += rx_bufs_reaped[mac_id];
  1162. }
  1163. return nbuf_head;
  1164. }
  1165. QDF_STATUS
  1166. dp_rx_null_q_desc_handle_li(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1167. uint8_t *rx_tlv_hdr, uint8_t pool_id,
  1168. struct dp_txrx_peer *txrx_peer,
  1169. bool is_reo_exception,
  1170. uint8_t link_id)
  1171. {
  1172. uint32_t pkt_len;
  1173. uint16_t msdu_len;
  1174. struct dp_vdev *vdev;
  1175. uint8_t tid;
  1176. qdf_ether_header_t *eh;
  1177. struct hal_rx_msdu_metadata msdu_metadata;
  1178. uint16_t sa_idx = 0;
  1179. bool is_eapol = 0;
  1180. bool enh_flag;
  1181. qdf_nbuf_set_rx_chfrag_start(
  1182. nbuf,
  1183. hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1184. rx_tlv_hdr));
  1185. qdf_nbuf_set_rx_chfrag_end(nbuf,
  1186. hal_rx_msdu_end_last_msdu_get(soc->hal_soc,
  1187. rx_tlv_hdr));
  1188. qdf_nbuf_set_da_mcbc(nbuf, hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1189. rx_tlv_hdr));
  1190. qdf_nbuf_set_da_valid(nbuf,
  1191. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  1192. rx_tlv_hdr));
  1193. qdf_nbuf_set_sa_valid(nbuf,
  1194. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  1195. rx_tlv_hdr));
  1196. tid = hal_rx_tid_get(soc->hal_soc, rx_tlv_hdr);
  1197. hal_rx_msdu_metadata_get(soc->hal_soc, rx_tlv_hdr, &msdu_metadata);
  1198. msdu_len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc, rx_tlv_hdr);
  1199. pkt_len = msdu_len + msdu_metadata.l3_hdr_pad + soc->rx_pkt_tlv_size;
  1200. if (qdf_likely(!qdf_nbuf_is_frag(nbuf))) {
  1201. if (dp_rx_check_pkt_len(soc, pkt_len))
  1202. goto drop_nbuf;
  1203. /* Set length in nbuf */
  1204. qdf_nbuf_set_pktlen(
  1205. nbuf, qdf_min(pkt_len, (uint32_t)RX_DATA_BUFFER_SIZE));
  1206. }
  1207. /*
  1208. * Check if DMA completed -- msdu_done is the last bit
  1209. * to be written
  1210. */
  1211. if (!hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1212. dp_err_rl("MSDU DONE failure");
  1213. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1214. QDF_TRACE_LEVEL_INFO);
  1215. qdf_assert(0);
  1216. }
  1217. if (!txrx_peer &&
  1218. dp_rx_null_q_handle_invalid_peer_id_exception(soc, pool_id,
  1219. rx_tlv_hdr, nbuf))
  1220. return QDF_STATUS_E_FAILURE;
  1221. if (!txrx_peer) {
  1222. bool mpdu_done = false;
  1223. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  1224. if (!pdev) {
  1225. dp_err_rl("pdev is null for pool_id = %d", pool_id);
  1226. return QDF_STATUS_E_FAILURE;
  1227. }
  1228. dp_err_rl("txrx_peer is NULL");
  1229. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1230. qdf_nbuf_len(nbuf));
  1231. /* QCN9000 has the support enabled */
  1232. if (qdf_unlikely(soc->wbm_release_desc_rx_sg_support)) {
  1233. mpdu_done = true;
  1234. nbuf->next = NULL;
  1235. /* Trigger invalid peer handler wrapper */
  1236. dp_rx_process_invalid_peer_wrapper(soc,
  1237. nbuf,
  1238. mpdu_done,
  1239. pool_id);
  1240. } else {
  1241. mpdu_done = soc->arch_ops.dp_rx_chain_msdus(soc, nbuf,
  1242. rx_tlv_hdr,
  1243. pool_id);
  1244. /* Trigger invalid peer handler wrapper */
  1245. dp_rx_process_invalid_peer_wrapper(
  1246. soc,
  1247. pdev->invalid_peer_head_msdu,
  1248. mpdu_done, pool_id);
  1249. }
  1250. if (mpdu_done) {
  1251. pdev->invalid_peer_head_msdu = NULL;
  1252. pdev->invalid_peer_tail_msdu = NULL;
  1253. }
  1254. return QDF_STATUS_E_FAILURE;
  1255. }
  1256. vdev = txrx_peer->vdev;
  1257. if (!vdev) {
  1258. dp_err_rl("Null vdev!");
  1259. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1260. goto drop_nbuf;
  1261. }
  1262. /*
  1263. * Advance the packet start pointer by total size of
  1264. * pre-header TLV's
  1265. */
  1266. if (qdf_nbuf_is_frag(nbuf))
  1267. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1268. else
  1269. qdf_nbuf_pull_head(nbuf, (msdu_metadata.l3_hdr_pad +
  1270. soc->rx_pkt_tlv_size));
  1271. DP_STATS_INC_PKT(vdev, rx_i.null_q_desc_pkt, 1, qdf_nbuf_len(nbuf));
  1272. dp_vdev_peer_stats_update_protocol_cnt(vdev, nbuf, NULL, 0, 1);
  1273. if (dp_rx_err_drop_3addr_mcast(vdev, rx_tlv_hdr)) {
  1274. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.mcast_3addr_drop, 1,
  1275. 0);
  1276. goto drop_nbuf;
  1277. }
  1278. if (hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc, rx_tlv_hdr)) {
  1279. sa_idx = hal_rx_msdu_end_sa_idx_get(soc->hal_soc, rx_tlv_hdr);
  1280. if ((sa_idx < 0) ||
  1281. (sa_idx >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) {
  1282. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  1283. goto drop_nbuf;
  1284. }
  1285. }
  1286. if ((!soc->mec_fw_offload) &&
  1287. dp_rx_mcast_echo_check(soc, txrx_peer, rx_tlv_hdr, nbuf)) {
  1288. /* this is a looped back MCBC pkt, drop it */
  1289. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.mec_drop, 1,
  1290. qdf_nbuf_len(nbuf), 0);
  1291. goto drop_nbuf;
  1292. }
  1293. /*
  1294. * In qwrap mode if the received packet matches with any of the vdev
  1295. * mac addresses, drop it. Donot receive multicast packets originated
  1296. * from any proxysta.
  1297. */
  1298. if (check_qwrap_multicast_loopback(vdev, nbuf)) {
  1299. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.mec_drop, 1,
  1300. qdf_nbuf_len(nbuf), 0);
  1301. goto drop_nbuf;
  1302. }
  1303. if (qdf_unlikely(txrx_peer->nawds_enabled &&
  1304. hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1305. rx_tlv_hdr))) {
  1306. dp_err_rl("free buffer for multicast packet");
  1307. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.nawds_mcast_drop, 1,
  1308. 0);
  1309. goto drop_nbuf;
  1310. }
  1311. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, txrx_peer)) {
  1312. dp_err_rl("mcast Policy Check Drop pkt");
  1313. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.policy_check_drop, 1,
  1314. 0);
  1315. goto drop_nbuf;
  1316. }
  1317. /* WDS Source Port Learning */
  1318. if (!soc->ast_offload_support &&
  1319. qdf_likely(vdev->rx_decap_type == htt_cmn_pkt_type_ethernet &&
  1320. vdev->wds_enabled))
  1321. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr, txrx_peer, nbuf,
  1322. msdu_metadata);
  1323. if (hal_rx_is_unicast(soc->hal_soc, rx_tlv_hdr)) {
  1324. struct dp_peer *peer;
  1325. struct dp_rx_tid *rx_tid;
  1326. peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id,
  1327. DP_MOD_ID_RX_ERR);
  1328. if (peer) {
  1329. rx_tid = &peer->rx_tid[tid];
  1330. qdf_spin_lock_bh(&rx_tid->tid_lock);
  1331. if (!peer->rx_tid[tid].hw_qdesc_vaddr_unaligned) {
  1332. /* For Mesh peer, if on one of the mesh AP the
  1333. * mesh peer is not deleted, the new addition of mesh
  1334. * peer on other mesh AP doesn't do BA negotiation
  1335. * leading to mismatch in BA windows.
  1336. * To avoid this send max BA window during init.
  1337. */
  1338. if (qdf_unlikely(vdev->mesh_vdev) ||
  1339. qdf_unlikely(txrx_peer->nawds_enabled))
  1340. dp_rx_tid_setup_wifi3(
  1341. peer, tid,
  1342. hal_get_rx_max_ba_window(soc->hal_soc,tid),
  1343. IEEE80211_SEQ_MAX);
  1344. else
  1345. dp_rx_tid_setup_wifi3(peer, tid, 1,
  1346. IEEE80211_SEQ_MAX);
  1347. }
  1348. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  1349. /* IEEE80211_SEQ_MAX indicates invalid start_seq */
  1350. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  1351. }
  1352. }
  1353. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1354. if (!txrx_peer->authorize) {
  1355. is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf);
  1356. if (is_eapol || qdf_nbuf_is_ipv4_wapi_pkt(nbuf)) {
  1357. if (!dp_rx_err_match_dhost(eh, vdev))
  1358. goto drop_nbuf;
  1359. } else {
  1360. goto drop_nbuf;
  1361. }
  1362. }
  1363. /*
  1364. * Drop packets in this path if cce_match is found. Packets will come
  1365. * in following path depending on whether tidQ is setup.
  1366. * 1. If tidQ is setup: WIFILI_HAL_RX_WBM_REO_PSH_RSN_ROUTE and
  1367. * cce_match = 1
  1368. * Packets with WIFILI_HAL_RX_WBM_REO_PSH_RSN_ROUTE are already
  1369. * dropped.
  1370. * 2. If tidQ is not setup: WIFILI_HAL_RX_WBM_REO_PSH_RSN_ERROR and
  1371. * cce_match = 1
  1372. * These packets need to be dropped and should not get delivered
  1373. * to stack.
  1374. */
  1375. if (qdf_unlikely(dp_rx_err_cce_drop(soc, vdev, nbuf, rx_tlv_hdr)))
  1376. goto drop_nbuf;
  1377. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  1378. qdf_nbuf_set_raw_frame(nbuf, 1);
  1379. qdf_nbuf_set_next(nbuf, NULL);
  1380. dp_rx_deliver_raw(vdev, nbuf, txrx_peer, 0);
  1381. } else {
  1382. enh_flag = vdev->pdev->enhanced_stats_en;
  1383. qdf_nbuf_set_next(nbuf, NULL);
  1384. DP_PEER_TO_STACK_INCC_PKT(txrx_peer, 1, qdf_nbuf_len(nbuf),
  1385. enh_flag);
  1386. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  1387. rx.rx_success, 1,
  1388. qdf_nbuf_len(nbuf), 0);
  1389. /*
  1390. * Update the protocol tag in SKB based on
  1391. * CCE metadata
  1392. */
  1393. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1394. EXCEPTION_DEST_RING_ID,
  1395. true, true);
  1396. /* Update the flow tag in SKB based on FSE metadata */
  1397. dp_rx_update_flow_tag(soc, vdev, nbuf,
  1398. rx_tlv_hdr, true);
  1399. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(
  1400. soc->hal_soc, rx_tlv_hdr) &&
  1401. (vdev->rx_decap_type ==
  1402. htt_cmn_pkt_type_ethernet))) {
  1403. DP_PEER_MC_INCC_PKT(txrx_peer, 1, qdf_nbuf_len(nbuf),
  1404. enh_flag, 0);
  1405. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost))
  1406. DP_PEER_BC_INCC_PKT(txrx_peer, 1,
  1407. qdf_nbuf_len(nbuf),
  1408. enh_flag, 0);
  1409. } else {
  1410. DP_PEER_UC_INCC_PKT(txrx_peer, 1,
  1411. qdf_nbuf_len(nbuf),
  1412. enh_flag,
  1413. 0);
  1414. }
  1415. qdf_nbuf_set_exc_frame(nbuf, 1);
  1416. if (qdf_unlikely(vdev->multipass_en)) {
  1417. if (dp_rx_multipass_process(txrx_peer, nbuf,
  1418. tid) == false) {
  1419. DP_PEER_PER_PKT_STATS_INC
  1420. (txrx_peer,
  1421. rx.multipass_rx_pkt_drop,
  1422. 1, link_id);
  1423. goto drop_nbuf;
  1424. }
  1425. }
  1426. dp_rx_deliver_to_osif_stack(soc, vdev, txrx_peer, nbuf, NULL,
  1427. is_eapol);
  1428. }
  1429. return QDF_STATUS_SUCCESS;
  1430. drop_nbuf:
  1431. dp_rx_nbuf_free(nbuf);
  1432. return QDF_STATUS_E_FAILURE;
  1433. }