wcd937x.c 72 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/module.h>
  6. #include <linux/slab.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/device.h>
  9. #include <linux/delay.h>
  10. #include <linux/kernel.h>
  11. #include <linux/component.h>
  12. #include <linux/regmap.h>
  13. #include <linux/pm_runtime.h>
  14. #include <sound/soc.h>
  15. #include <sound/tlv.h>
  16. #include <soc/soundwire.h>
  17. #include <sound/soc.h>
  18. #include <sound/soc-dapm.h>
  19. #include "internal.h"
  20. #include "wcd937x.h"
  21. #include "../wcdcal-hwdep.h"
  22. #include "wcd937x-registers.h"
  23. #include "../msm-cdc-pinctrl.h"
  24. #include <dt-bindings/sound/audio-codec-port-types.h>
  25. #include "../msm-cdc-supply.h"
  26. #define WCD9370_VARIANT 0
  27. #define WCD9375_VARIANT 5
  28. #define NUM_SWRS_DT_PARAMS 5
  29. #define WCD937X_VERSION_1_0 1
  30. #define WCD937X_VERSION_ENTRY_SIZE 32
  31. enum {
  32. CODEC_TX = 0,
  33. CODEC_RX,
  34. };
  35. enum {
  36. ALLOW_BUCK_DISABLE,
  37. HPH_COMP_DELAY,
  38. HPH_PA_DELAY,
  39. };
  40. static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
  41. static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
  42. static int wcd937x_handle_post_irq(void *data);
  43. static int wcd937x_reset(struct device *dev);
  44. static int wcd937x_reset_low(struct device *dev);
  45. static const struct regmap_irq wcd937x_irqs[WCD937X_NUM_IRQS] = {
  46. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_BUTTON_PRESS_DET, 0, 0x01),
  47. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_BUTTON_RELEASE_DET, 0, 0x02),
  48. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_ELECT_INS_REM_DET, 0, 0x04),
  49. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_ELECT_INS_REM_LEG_DET, 0, 0x08),
  50. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_SW_DET, 0, 0x10),
  51. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_OCP_INT, 0, 0x20),
  52. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_CNP_INT, 0, 0x40),
  53. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_OCP_INT, 0, 0x80),
  54. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_CNP_INT, 1, 0x01),
  55. REGMAP_IRQ_REG(WCD937X_IRQ_EAR_CNP_INT, 1, 0x02),
  56. REGMAP_IRQ_REG(WCD937X_IRQ_EAR_SCD_INT, 1, 0x04),
  57. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_CNP_INT, 1, 0x08),
  58. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_SCD_INT, 1, 0x10),
  59. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_PDM_WD_INT, 1, 0x20),
  60. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_PDM_WD_INT, 1, 0x40),
  61. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_PDM_WD_INT, 1, 0x80),
  62. REGMAP_IRQ_REG(WCD937X_IRQ_LDORT_SCD_INT, 2, 0x01),
  63. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_MOISTURE_INT, 2, 0x02),
  64. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_SURGE_DET_INT, 2, 0x04),
  65. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_SURGE_DET_INT, 2, 0x08),
  66. };
  67. static struct regmap_irq_chip wcd937x_regmap_irq_chip = {
  68. .name = "wcd937x",
  69. .irqs = wcd937x_irqs,
  70. .num_irqs = ARRAY_SIZE(wcd937x_irqs),
  71. .num_regs = 3,
  72. .status_base = WCD937X_DIGITAL_INTR_STATUS_0,
  73. .mask_base = WCD937X_DIGITAL_INTR_MASK_0,
  74. .ack_base = WCD937X_DIGITAL_INTR_CLEAR_0,
  75. .use_ack = 1,
  76. .clear_ack = 1,
  77. .type_base = WCD937X_DIGITAL_INTR_LEVEL_0,
  78. .runtime_pm = false,
  79. .handle_post_irq = wcd937x_handle_post_irq,
  80. .irq_drv_data = NULL,
  81. };
  82. static int wcd937x_handle_post_irq(void *data)
  83. {
  84. struct wcd937x_priv *wcd937x = data;
  85. u32 status1 = 0, status2 = 0, status3 = 0;
  86. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_0, &status1);
  87. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_1, &status2);
  88. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_2, &status3);
  89. wcd937x->tx_swr_dev->slave_irq_pending =
  90. ((status1 || status2 || status3) ? true : false);
  91. return IRQ_HANDLED;
  92. }
  93. static int wcd937x_init_reg(struct snd_soc_codec *codec)
  94. {
  95. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x0E, 0x0E);
  96. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x80, 0x80);
  97. usleep_range(1000, 1010);
  98. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x40, 0x40);
  99. usleep_range(1000, 1010);
  100. snd_soc_update_bits(codec, WCD937X_LDORXTX_CONFIG, 0x10, 0x00);
  101. snd_soc_update_bits(codec, WCD937X_BIAS_VBG_FINE_ADJ, 0xF0, 0x80);
  102. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x80, 0x80);
  103. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x40, 0x40);
  104. usleep_range(10000, 10010);
  105. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x40, 0x00);
  106. snd_soc_update_bits(codec, WCD937X_HPH_OCP_CTL, 0xFF, 0x3A);
  107. snd_soc_update_bits(codec, WCD937X_RX_OCP_CTL, 0x0F, 0x02);
  108. snd_soc_update_bits(codec, WCD937X_HPH_R_TEST, 0x01, 0x01);
  109. snd_soc_update_bits(codec, WCD937X_HPH_L_TEST, 0x01, 0x01);
  110. return 0;
  111. }
  112. static int wcd937x_set_port_params(struct snd_soc_codec *codec, u8 slv_prt_type,
  113. u8 *port_id, u8 *num_ch, u8 *ch_mask, u32 *ch_rate,
  114. u8 *port_type, u8 path)
  115. {
  116. int i, j;
  117. u8 num_ports = 0;
  118. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  119. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  120. switch (path) {
  121. case CODEC_RX:
  122. map = &wcd937x->rx_port_mapping;
  123. num_ports = wcd937x->num_rx_ports;
  124. break;
  125. case CODEC_TX:
  126. map = &wcd937x->tx_port_mapping;
  127. num_ports = wcd937x->num_tx_ports;
  128. break;
  129. }
  130. for (i = 0; i <= num_ports; i++) {
  131. for (j = 0; j < MAX_CH_PER_PORT; j++) {
  132. if ((*map)[i][j].slave_port_type == slv_prt_type)
  133. goto found;
  134. }
  135. }
  136. found:
  137. if (i > num_ports || j == MAX_CH_PER_PORT) {
  138. dev_err(codec->dev, "%s Failed to find slave port for type %u\n",
  139. __func__, slv_prt_type);
  140. return -EINVAL;
  141. }
  142. *port_id = i;
  143. *num_ch = (*map)[i][j].num_ch;
  144. *ch_mask = (*map)[i][j].ch_mask;
  145. *ch_rate = (*map)[i][j].ch_rate;
  146. *port_type = (*map)[i][j].master_port_type;
  147. return 0;
  148. }
  149. static int wcd937x_parse_port_mapping(struct device *dev,
  150. char *prop, u8 path)
  151. {
  152. u32 *dt_array, map_size, map_length;
  153. u32 port_num = 0, ch_mask, ch_rate, old_port_num = 0;
  154. u32 slave_port_type, master_port_type;
  155. u32 i, ch_iter = 0;
  156. int ret = 0;
  157. u8 *num_ports = NULL;
  158. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  159. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  160. switch (path) {
  161. case CODEC_RX:
  162. map = &wcd937x->rx_port_mapping;
  163. num_ports = &wcd937x->num_rx_ports;
  164. break;
  165. case CODEC_TX:
  166. map = &wcd937x->tx_port_mapping;
  167. num_ports = &wcd937x->num_tx_ports;
  168. break;
  169. }
  170. if (!of_find_property(dev->of_node, prop,
  171. &map_size)) {
  172. dev_err(dev, "missing port mapping prop %s\n", prop);
  173. ret = -EINVAL;
  174. goto err;
  175. }
  176. map_length = map_size / (NUM_SWRS_DT_PARAMS * sizeof(u32));
  177. dt_array = kzalloc(map_size, GFP_KERNEL);
  178. if (!dt_array) {
  179. ret = -ENOMEM;
  180. goto err;
  181. }
  182. ret = of_property_read_u32_array(dev->of_node, prop, dt_array,
  183. NUM_SWRS_DT_PARAMS * map_length);
  184. if (ret) {
  185. dev_err(dev, "%s: Failed to read port mapping from prop %s\n",
  186. __func__, prop);
  187. ret = -EINVAL;
  188. goto err_pdata_fail;
  189. }
  190. for (i = 0; i < map_length; i++) {
  191. port_num = dt_array[NUM_SWRS_DT_PARAMS * i];
  192. slave_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 1];
  193. ch_mask = dt_array[NUM_SWRS_DT_PARAMS * i + 2];
  194. ch_rate = dt_array[NUM_SWRS_DT_PARAMS * i + 3];
  195. master_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 4];
  196. if (port_num != old_port_num)
  197. ch_iter = 0;
  198. (*map)[port_num][ch_iter].slave_port_type = slave_port_type;
  199. (*map)[port_num][ch_iter].ch_mask = ch_mask;
  200. (*map)[port_num][ch_iter].master_port_type = master_port_type;
  201. (*map)[port_num][ch_iter].num_ch = __sw_hweight8(ch_mask);
  202. (*map)[port_num][ch_iter++].ch_rate = ch_rate;
  203. old_port_num = port_num;
  204. }
  205. *num_ports = port_num;
  206. kfree(dt_array);
  207. return 0;
  208. err_pdata_fail:
  209. kfree(dt_array);
  210. err:
  211. return ret;
  212. }
  213. static int wcd937x_tx_connect_port(struct snd_soc_codec *codec,
  214. u8 slv_port_type, u8 enable)
  215. {
  216. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  217. u8 port_id;
  218. u8 num_ch;
  219. u8 ch_mask;
  220. u32 ch_rate;
  221. u8 port_type;
  222. u8 num_port = 1;
  223. int ret = 0;
  224. ret = wcd937x_set_port_params(codec, slv_port_type, &port_id,
  225. &num_ch, &ch_mask, &ch_rate,
  226. &port_type, CODEC_TX);
  227. if (ret)
  228. return ret;
  229. if (enable)
  230. ret = swr_connect_port(wcd937x->tx_swr_dev, &port_id,
  231. num_port, &ch_mask, &ch_rate,
  232. &num_ch, &port_type);
  233. else
  234. ret = swr_disconnect_port(wcd937x->tx_swr_dev, &port_id,
  235. num_port, &ch_mask, &port_type);
  236. return ret;
  237. }
  238. static int wcd937x_rx_connect_port(struct snd_soc_codec *codec,
  239. u8 slv_port_type, u8 enable)
  240. {
  241. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  242. u8 port_id;
  243. u8 num_ch;
  244. u8 ch_mask;
  245. u32 ch_rate;
  246. u8 port_type;
  247. u8 num_port = 1;
  248. int ret = 0;
  249. ret = wcd937x_set_port_params(codec, slv_port_type, &port_id,
  250. &num_ch, &ch_mask, &ch_rate,
  251. &port_type, CODEC_RX);
  252. if (ret)
  253. return ret;
  254. if (enable)
  255. ret = swr_connect_port(wcd937x->rx_swr_dev, &port_id,
  256. num_port, &ch_mask, &ch_rate,
  257. &num_ch, &port_type);
  258. else
  259. ret = swr_disconnect_port(wcd937x->rx_swr_dev, &port_id,
  260. num_port, &ch_mask, &port_type);
  261. return ret;
  262. }
  263. static int wcd937x_rx_clk_enable(struct snd_soc_codec *codec)
  264. {
  265. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  266. if (wcd937x->rx_clk_cnt == 0) {
  267. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  268. 0x08, 0x08);
  269. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  270. 0x01, 0x01);
  271. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x01, 0x01);
  272. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_RX0_CTL,
  273. 0x40, 0x00);
  274. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_RX1_CTL,
  275. 0x40, 0x00);
  276. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_RX2_CTL,
  277. 0x40, 0x00);
  278. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  279. 0x02, 0x02);
  280. }
  281. wcd937x->rx_clk_cnt++;
  282. return 0;
  283. }
  284. static int wcd937x_rx_clk_disable(struct snd_soc_codec *codec)
  285. {
  286. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  287. if (wcd937x->rx_clk_cnt == 0) {
  288. dev_dbg(wcd937x->dev, "%s:clk already disabled\n", __func__);
  289. return 0;
  290. }
  291. wcd937x->rx_clk_cnt--;
  292. if (wcd937x->rx_clk_cnt == 0) {
  293. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x01, 0x00);
  294. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  295. 0x02, 0x00);
  296. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  297. 0x01, 0x00);
  298. }
  299. return 0;
  300. }
  301. /*
  302. * wcd937x_soc_get_mbhc: get wcd937x_mbhc handle of corresponding codec
  303. * @codec: handle to snd_soc_codec *
  304. *
  305. * return wcd937x_mbhc handle or error code in case of failure
  306. */
  307. struct wcd937x_mbhc *wcd937x_soc_get_mbhc(struct snd_soc_codec *codec)
  308. {
  309. struct wcd937x_priv *wcd937x;
  310. if (!codec) {
  311. pr_err("%s: Invalid params, NULL codec\n", __func__);
  312. return NULL;
  313. }
  314. wcd937x = snd_soc_codec_get_drvdata(codec);
  315. if (!wcd937x) {
  316. pr_err("%s: Invalid params, NULL tavil\n", __func__);
  317. return NULL;
  318. }
  319. return wcd937x->mbhc;
  320. }
  321. EXPORT_SYMBOL(wcd937x_soc_get_mbhc);
  322. static int wcd937x_codec_hphl_dac_event(struct snd_soc_dapm_widget *w,
  323. struct snd_kcontrol *kcontrol,
  324. int event)
  325. {
  326. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  327. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  328. int hph_mode = wcd937x->hph_mode;
  329. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  330. w->name, event);
  331. switch (event) {
  332. case SND_SOC_DAPM_PRE_PMU:
  333. wcd937x_rx_clk_enable(codec);
  334. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  335. 0x01, 0x01);
  336. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  337. 0x04, 0x04);
  338. snd_soc_update_bits(codec, WCD937X_HPH_RDAC_CLK_CTL1,
  339. 0x80, 0x00);
  340. set_bit(HPH_COMP_DELAY, &wcd937x->status_mask);
  341. break;
  342. case SND_SOC_DAPM_POST_PMU:
  343. if (hph_mode == CLS_AB_HIFI || hph_mode == CLS_H_HIFI)
  344. snd_soc_update_bits(codec,
  345. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  346. 0x0F, 0x02);
  347. else if (hph_mode == CLS_H_LOHIFI)
  348. snd_soc_update_bits(codec,
  349. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  350. 0x0F, 0x06);
  351. if (wcd937x->comp1_enable) {
  352. snd_soc_update_bits(codec,
  353. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  354. 0x02, 0x02);
  355. snd_soc_update_bits(codec,
  356. WCD937X_HPH_L_EN, 0x20, 0x00);
  357. if (wcd937x->comp2_enable) {
  358. snd_soc_update_bits(codec,
  359. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  360. 0x01, 0x01);
  361. snd_soc_update_bits(codec,
  362. WCD937X_HPH_R_EN, 0x20, 0x00);
  363. }
  364. /*
  365. * 5ms sleep is required after COMP is enabled as per
  366. * HW requirement
  367. */
  368. if (test_bit(HPH_COMP_DELAY, &wcd937x->status_mask)) {
  369. usleep_range(5000, 5100);
  370. clear_bit(HPH_COMP_DELAY,
  371. &wcd937x->status_mask);
  372. }
  373. } else {
  374. snd_soc_update_bits(codec,
  375. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  376. 0x02, 0x00);
  377. snd_soc_update_bits(codec,
  378. WCD937X_HPH_L_EN, 0x20, 0x20);
  379. }
  380. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  381. 0x02, 0x00);
  382. break;
  383. case SND_SOC_DAPM_POST_PMD:
  384. snd_soc_update_bits(codec,
  385. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  386. 0x0F, 0x01);
  387. break;
  388. }
  389. return 0;
  390. }
  391. static int wcd937x_codec_hphr_dac_event(struct snd_soc_dapm_widget *w,
  392. struct snd_kcontrol *kcontrol,
  393. int event)
  394. {
  395. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  396. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  397. int hph_mode = wcd937x->hph_mode;
  398. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  399. w->name, event);
  400. switch (event) {
  401. case SND_SOC_DAPM_PRE_PMU:
  402. wcd937x_rx_clk_enable(codec);
  403. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  404. 0x02, 0x02);
  405. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  406. 0x08, 0x08);
  407. snd_soc_update_bits(codec, WCD937X_HPH_RDAC_CLK_CTL1,
  408. 0x80, 0x00);
  409. set_bit(HPH_COMP_DELAY, &wcd937x->status_mask);
  410. break;
  411. case SND_SOC_DAPM_POST_PMU:
  412. if (hph_mode == CLS_AB_HIFI || hph_mode == CLS_H_HIFI)
  413. snd_soc_update_bits(codec,
  414. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_R,
  415. 0x0F, 0x02);
  416. else if (hph_mode == CLS_H_LOHIFI)
  417. snd_soc_update_bits(codec,
  418. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_R,
  419. 0x0F, 0x06);
  420. if (wcd937x->comp2_enable) {
  421. snd_soc_update_bits(codec,
  422. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  423. 0x01, 0x01);
  424. snd_soc_update_bits(codec,
  425. WCD937X_HPH_R_EN, 0x20, 0x00);
  426. if (wcd937x->comp1_enable) {
  427. snd_soc_update_bits(codec,
  428. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  429. 0x02, 0x02);
  430. snd_soc_update_bits(codec,
  431. WCD937X_HPH_L_EN, 0x20, 0x00);
  432. }
  433. /*
  434. * 5ms sleep is required after COMP is enabled as per
  435. * HW requirement
  436. */
  437. if (test_bit(HPH_COMP_DELAY, &wcd937x->status_mask)) {
  438. usleep_range(5000, 5100);
  439. clear_bit(HPH_COMP_DELAY,
  440. &wcd937x->status_mask);
  441. }
  442. } else {
  443. snd_soc_update_bits(codec,
  444. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  445. 0x01, 0x00);
  446. snd_soc_update_bits(codec,
  447. WCD937X_HPH_R_EN, 0x20, 0x20);
  448. }
  449. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  450. 0x02, 0x00);
  451. break;
  452. case SND_SOC_DAPM_POST_PMD:
  453. snd_soc_update_bits(codec,
  454. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_R,
  455. 0x0F, 0x01);
  456. break;
  457. }
  458. return 0;
  459. }
  460. static int wcd937x_codec_ear_dac_event(struct snd_soc_dapm_widget *w,
  461. struct snd_kcontrol *kcontrol,
  462. int event)
  463. {
  464. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  465. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  466. int hph_mode = wcd937x->hph_mode;
  467. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  468. w->name, event);
  469. switch (event) {
  470. case SND_SOC_DAPM_PRE_PMU:
  471. wcd937x_rx_clk_enable(codec);
  472. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  473. 0x04, 0x04);
  474. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  475. 0x01, 0x01);
  476. if (hph_mode == CLS_AB_HIFI || hph_mode == CLS_H_HIFI)
  477. snd_soc_update_bits(codec,
  478. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  479. 0x0F, 0x02);
  480. else if (hph_mode == CLS_H_LOHIFI)
  481. snd_soc_update_bits(codec,
  482. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  483. 0x0F, 0x06);
  484. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_COMP_CTL_0,
  485. 0x02, 0x02);
  486. usleep_range(5000, 5010);
  487. wcd_cls_h_fsm(codec, &wcd937x->clsh_info,
  488. WCD_CLSH_EVENT_PRE_DAC,
  489. WCD_CLSH_STATE_EAR,
  490. hph_mode);
  491. break;
  492. case SND_SOC_DAPM_POST_PMD:
  493. if (hph_mode == CLS_AB_HIFI || hph_mode == CLS_H_LOHIFI ||
  494. hph_mode == CLS_H_HIFI)
  495. snd_soc_update_bits(codec,
  496. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  497. 0x0F, 0x01);
  498. break;
  499. };
  500. return 0;
  501. }
  502. static int wcd937x_codec_aux_dac_event(struct snd_soc_dapm_widget *w,
  503. struct snd_kcontrol *kcontrol,
  504. int event)
  505. {
  506. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  507. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  508. int hph_mode = wcd937x->hph_mode;
  509. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  510. w->name, event);
  511. switch (event) {
  512. case SND_SOC_DAPM_PRE_PMU:
  513. wcd937x_rx_clk_enable(codec);
  514. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  515. 0x04, 0x04);
  516. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  517. 0x04, 0x04);
  518. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_AUX_GAIN_CTL,
  519. 0x01, 0x01);
  520. wcd_cls_h_fsm(codec, &wcd937x->clsh_info,
  521. WCD_CLSH_EVENT_PRE_DAC,
  522. WCD_CLSH_STATE_AUX,
  523. hph_mode);
  524. break;
  525. case SND_SOC_DAPM_POST_PMD:
  526. wcd937x_rx_clk_disable(codec);
  527. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  528. 0x04, 0x00);
  529. break;
  530. };
  531. return 0;
  532. }
  533. static int wcd937x_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
  534. struct snd_kcontrol *kcontrol,
  535. int event)
  536. {
  537. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  538. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  539. int ret = 0;
  540. int hph_mode = wcd937x->hph_mode;
  541. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  542. w->name, event);
  543. switch (event) {
  544. case SND_SOC_DAPM_PRE_PMU:
  545. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  546. wcd937x->rx_swr_dev->dev_num,
  547. true);
  548. wcd_cls_h_fsm(codec, &wcd937x->clsh_info,
  549. WCD_CLSH_EVENT_PRE_DAC,
  550. WCD_CLSH_STATE_HPHR,
  551. hph_mode);
  552. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x10, 0x10);
  553. usleep_range(100, 110);
  554. set_bit(HPH_PA_DELAY, &wcd937x->status_mask);
  555. break;
  556. case SND_SOC_DAPM_POST_PMU:
  557. /*
  558. * 7ms sleep is required after PA is enabled as per
  559. * HW requirement. If compander is disabled, then
  560. * 20ms delay is required.
  561. */
  562. if (test_bit(HPH_PA_DELAY, &wcd937x->status_mask)) {
  563. if (!wcd937x->comp2_enable)
  564. usleep_range(20000, 20100);
  565. else
  566. usleep_range(7000, 7100);
  567. clear_bit(HPH_PA_DELAY, &wcd937x->status_mask);
  568. }
  569. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  570. 0x02, 0x02);
  571. if (hph_mode == CLS_AB || hph_mode == CLS_AB_HIFI)
  572. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  573. 0x02, 0x02);
  574. if (wcd937x->update_wcd_event)
  575. wcd937x->update_wcd_event(wcd937x->handle,
  576. WCD_BOLERO_EVT_RX_MUTE,
  577. (WCD_RX2 << 0x10));
  578. break;
  579. case SND_SOC_DAPM_PRE_PMD:
  580. if (wcd937x->update_wcd_event)
  581. wcd937x->update_wcd_event(wcd937x->handle,
  582. WCD_BOLERO_EVT_RX_MUTE,
  583. (WCD_RX2 << 0x10 | 0x1));
  584. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  585. WCD_EVENT_PRE_HPHR_PA_OFF,
  586. &wcd937x->mbhc->wcd_mbhc);
  587. break;
  588. case SND_SOC_DAPM_POST_PMD:
  589. usleep_range(7000, 7010);
  590. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  591. WCD_EVENT_POST_HPHR_PA_OFF,
  592. &wcd937x->mbhc->wcd_mbhc);
  593. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x10, 0x00);
  594. wcd_cls_h_fsm(codec, &wcd937x->clsh_info,
  595. WCD_CLSH_EVENT_POST_PA,
  596. WCD_CLSH_STATE_HPHR,
  597. hph_mode);
  598. break;
  599. };
  600. return ret;
  601. }
  602. static int wcd937x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
  603. struct snd_kcontrol *kcontrol,
  604. int event)
  605. {
  606. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  607. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  608. int ret = 0;
  609. int hph_mode = wcd937x->hph_mode;
  610. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  611. w->name, event);
  612. switch (event) {
  613. case SND_SOC_DAPM_PRE_PMU:
  614. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  615. wcd937x->rx_swr_dev->dev_num,
  616. true);
  617. wcd_cls_h_fsm(codec, &wcd937x->clsh_info,
  618. WCD_CLSH_EVENT_PRE_DAC,
  619. WCD_CLSH_STATE_HPHL,
  620. hph_mode);
  621. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x20, 0x20);
  622. usleep_range(100, 110);
  623. set_bit(HPH_PA_DELAY, &wcd937x->status_mask);
  624. break;
  625. case SND_SOC_DAPM_POST_PMU:
  626. /*
  627. * 7ms sleep is required after PA is enabled as per
  628. * HW requirement. If compander is disabled, then
  629. * 20ms delay is required.
  630. */
  631. if (test_bit(HPH_PA_DELAY, &wcd937x->status_mask)) {
  632. if (!wcd937x->comp1_enable)
  633. usleep_range(20000, 20100);
  634. else
  635. usleep_range(7000, 7100);
  636. clear_bit(HPH_PA_DELAY, &wcd937x->status_mask);
  637. }
  638. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  639. 0x02, 0x02);
  640. if (hph_mode == CLS_AB || hph_mode == CLS_AB_HIFI)
  641. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  642. 0x02, 0x02);
  643. if (wcd937x->update_wcd_event)
  644. wcd937x->update_wcd_event(wcd937x->handle,
  645. WCD_BOLERO_EVT_RX_MUTE,
  646. (WCD_RX1 << 0x10));
  647. break;
  648. case SND_SOC_DAPM_PRE_PMD:
  649. if (wcd937x->update_wcd_event)
  650. wcd937x->update_wcd_event(wcd937x->handle,
  651. WCD_BOLERO_EVT_RX_MUTE,
  652. (WCD_RX1 << 0x10 | 0x1));
  653. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  654. WCD_EVENT_PRE_HPHL_PA_OFF,
  655. &wcd937x->mbhc->wcd_mbhc);
  656. break;
  657. case SND_SOC_DAPM_POST_PMD:
  658. usleep_range(7000, 7010);
  659. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  660. WCD_EVENT_POST_HPHL_PA_OFF,
  661. &wcd937x->mbhc->wcd_mbhc);
  662. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x20, 0x00);
  663. wcd_cls_h_fsm(codec, &wcd937x->clsh_info,
  664. WCD_CLSH_EVENT_POST_PA,
  665. WCD_CLSH_STATE_HPHL,
  666. hph_mode);
  667. break;
  668. };
  669. return ret;
  670. }
  671. static int wcd937x_codec_enable_aux_pa(struct snd_soc_dapm_widget *w,
  672. struct snd_kcontrol *kcontrol,
  673. int event)
  674. {
  675. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  676. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  677. int hph_mode = wcd937x->hph_mode;
  678. int ret = 0;
  679. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  680. w->name, event);
  681. switch (event) {
  682. case SND_SOC_DAPM_PRE_PMU:
  683. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  684. wcd937x->rx_swr_dev->dev_num,
  685. true);
  686. break;
  687. case SND_SOC_DAPM_POST_PMU:
  688. usleep_range(1000, 1010);
  689. if (hph_mode == CLS_AB || hph_mode == CLS_AB_HIFI)
  690. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  691. 0x02, 0x02);
  692. if (wcd937x->update_wcd_event)
  693. wcd937x->update_wcd_event(wcd937x->handle,
  694. WCD_BOLERO_EVT_RX_MUTE,
  695. (WCD_RX3 << 0x10));
  696. break;
  697. case SND_SOC_DAPM_PRE_PMD:
  698. if (wcd937x->update_wcd_event)
  699. wcd937x->update_wcd_event(wcd937x->handle,
  700. WCD_BOLERO_EVT_RX_MUTE,
  701. (WCD_RX3 << 0x10 | 0x1));
  702. break;
  703. case SND_SOC_DAPM_POST_PMD:
  704. usleep_range(1000, 1010);
  705. usleep_range(1000, 1010);
  706. wcd_cls_h_fsm(codec, &wcd937x->clsh_info,
  707. WCD_CLSH_EVENT_POST_PA,
  708. WCD_CLSH_STATE_AUX,
  709. hph_mode);
  710. break;
  711. };
  712. return ret;
  713. }
  714. static int wcd937x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
  715. struct snd_kcontrol *kcontrol,
  716. int event)
  717. {
  718. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  719. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  720. int hph_mode = wcd937x->hph_mode;
  721. int ret = 0;
  722. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  723. w->name, event);
  724. switch (event) {
  725. case SND_SOC_DAPM_PRE_PMU:
  726. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  727. wcd937x->rx_swr_dev->dev_num,
  728. true);
  729. break;
  730. case SND_SOC_DAPM_POST_PMU:
  731. usleep_range(6000, 6010);
  732. if (hph_mode == CLS_AB || hph_mode == CLS_AB_HIFI)
  733. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  734. 0x02, 0x02);
  735. if (wcd937x->update_wcd_event)
  736. wcd937x->update_wcd_event(wcd937x->handle,
  737. WCD_BOLERO_EVT_RX_MUTE,
  738. (WCD_RX1 << 0x10));
  739. break;
  740. case SND_SOC_DAPM_PRE_PMD:
  741. if (wcd937x->update_wcd_event)
  742. wcd937x->update_wcd_event(wcd937x->handle,
  743. WCD_BOLERO_EVT_RX_MUTE,
  744. (WCD_RX1 << 0x10 | 0x1));
  745. break;
  746. case SND_SOC_DAPM_POST_PMD:
  747. usleep_range(7000, 7010);
  748. wcd_cls_h_fsm(codec, &wcd937x->clsh_info,
  749. WCD_CLSH_EVENT_POST_PA,
  750. WCD_CLSH_STATE_EAR,
  751. hph_mode);
  752. break;
  753. };
  754. return ret;
  755. }
  756. static int wcd937x_enable_clsh(struct snd_soc_dapm_widget *w,
  757. struct snd_kcontrol *kcontrol,
  758. int event)
  759. {
  760. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  761. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  762. int mode = wcd937x->hph_mode;
  763. int ret = 0;
  764. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  765. w->name, event);
  766. if (mode == CLS_H_LOHIFI || mode == CLS_H_ULP ||
  767. mode == CLS_H_HIFI || mode == CLS_H_LP) {
  768. wcd937x_rx_connect_port(codec, CLSH,
  769. SND_SOC_DAPM_EVENT_ON(event));
  770. }
  771. if (SND_SOC_DAPM_EVENT_OFF(event))
  772. ret = swr_slvdev_datapath_control(
  773. wcd937x->rx_swr_dev,
  774. wcd937x->rx_swr_dev->dev_num,
  775. false);
  776. return ret;
  777. }
  778. static int wcd937x_enable_rx1(struct snd_soc_dapm_widget *w,
  779. struct snd_kcontrol *kcontrol,
  780. int event)
  781. {
  782. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  783. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  784. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  785. w->name, event);
  786. switch (event) {
  787. case SND_SOC_DAPM_PRE_PMU:
  788. wcd937x_rx_connect_port(codec, HPH_L, true);
  789. if (wcd937x->comp1_enable)
  790. wcd937x_rx_connect_port(codec, COMP_L, true);
  791. break;
  792. case SND_SOC_DAPM_POST_PMD:
  793. wcd937x_rx_connect_port(codec, HPH_L, false);
  794. if (wcd937x->comp1_enable)
  795. wcd937x_rx_connect_port(codec, COMP_L, false);
  796. wcd937x_rx_clk_disable(codec);
  797. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  798. 0x01, 0x00);
  799. break;
  800. };
  801. return 0;
  802. }
  803. static int wcd937x_enable_rx2(struct snd_soc_dapm_widget *w,
  804. struct snd_kcontrol *kcontrol, int event)
  805. {
  806. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  807. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  808. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  809. w->name, event);
  810. switch (event) {
  811. case SND_SOC_DAPM_PRE_PMU:
  812. wcd937x_rx_connect_port(codec, HPH_R, true);
  813. if (wcd937x->comp2_enable)
  814. wcd937x_rx_connect_port(codec, COMP_R, true);
  815. break;
  816. case SND_SOC_DAPM_POST_PMD:
  817. wcd937x_rx_connect_port(codec, HPH_R, false);
  818. if (wcd937x->comp2_enable)
  819. wcd937x_rx_connect_port(codec, COMP_R, false);
  820. wcd937x_rx_clk_disable(codec);
  821. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  822. 0x02, 0x00);
  823. break;
  824. };
  825. return 0;
  826. }
  827. static int wcd937x_enable_rx3(struct snd_soc_dapm_widget *w,
  828. struct snd_kcontrol *kcontrol,
  829. int event)
  830. {
  831. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  832. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  833. w->name, event);
  834. switch (event) {
  835. case SND_SOC_DAPM_PRE_PMU:
  836. wcd937x_rx_connect_port(codec, LO, true);
  837. break;
  838. case SND_SOC_DAPM_POST_PMD:
  839. wcd937x_rx_connect_port(codec, LO, false);
  840. usleep_range(6000, 6010);
  841. wcd937x_rx_clk_disable(codec);
  842. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  843. 0x04, 0x00);
  844. break;
  845. }
  846. return 0;
  847. }
  848. static int wcd937x_codec_enable_dmic(struct snd_soc_dapm_widget *w,
  849. struct snd_kcontrol *kcontrol,
  850. int event)
  851. {
  852. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  853. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  854. u16 dmic_clk_reg;
  855. s32 *dmic_clk_cnt;
  856. unsigned int dmic;
  857. char *wname;
  858. int ret = 0;
  859. wname = strpbrk(w->name, "012345");
  860. if (!wname) {
  861. dev_err(codec->dev, "%s: widget not found\n", __func__);
  862. return -EINVAL;
  863. }
  864. ret = kstrtouint(wname, 10, &dmic);
  865. if (ret < 0) {
  866. dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
  867. __func__);
  868. return -EINVAL;
  869. }
  870. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  871. w->name, event);
  872. switch (dmic) {
  873. case 0:
  874. case 1:
  875. dmic_clk_cnt = &(wcd937x->dmic_0_1_clk_cnt);
  876. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC0_CTL;
  877. break;
  878. case 2:
  879. case 3:
  880. dmic_clk_cnt = &(wcd937x->dmic_2_3_clk_cnt);
  881. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC1_CTL;
  882. break;
  883. case 4:
  884. case 5:
  885. dmic_clk_cnt = &(wcd937x->dmic_4_5_clk_cnt);
  886. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC2_CTL;
  887. break;
  888. default:
  889. dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
  890. __func__);
  891. return -EINVAL;
  892. };
  893. dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_clk_cnt %d\n",
  894. __func__, event, dmic, *dmic_clk_cnt);
  895. switch (event) {
  896. case SND_SOC_DAPM_PRE_PMU:
  897. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  898. 0x80, 0x80);
  899. snd_soc_update_bits(codec, dmic_clk_reg, 0x07, 0x02);
  900. snd_soc_update_bits(codec, dmic_clk_reg, 0x08, 0x08);
  901. snd_soc_update_bits(codec, dmic_clk_reg, 0x70, 0x20);
  902. wcd937x_tx_connect_port(codec, DMIC0 + (w->shift), true);
  903. break;
  904. case SND_SOC_DAPM_POST_PMD:
  905. wcd937x_tx_connect_port(codec, DMIC0 + (w->shift), false);
  906. break;
  907. };
  908. return 0;
  909. }
  910. /*
  911. * wcd937x_get_micb_vout_ctl_val: converts micbias from volts to register value
  912. * @micb_mv: micbias in mv
  913. *
  914. * return register value converted
  915. */
  916. int wcd937x_get_micb_vout_ctl_val(u32 micb_mv)
  917. {
  918. /* min micbias voltage is 1V and maximum is 2.85V */
  919. if (micb_mv < 1000 || micb_mv > 2850) {
  920. pr_err("%s: unsupported micbias voltage\n", __func__);
  921. return -EINVAL;
  922. }
  923. return (micb_mv - 1000) / 50;
  924. }
  925. EXPORT_SYMBOL(wcd937x_get_micb_vout_ctl_val);
  926. /*
  927. * wcd937x_mbhc_micb_adjust_voltage: adjust specific micbias voltage
  928. * @codec: handle to snd_soc_codec *
  929. * @req_volt: micbias voltage to be set
  930. * @micb_num: micbias to be set, e.g. micbias1 or micbias2
  931. *
  932. * return 0 if adjustment is success or error code in case of failure
  933. */
  934. int wcd937x_mbhc_micb_adjust_voltage(struct snd_soc_codec *codec,
  935. int req_volt, int micb_num)
  936. {
  937. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  938. int cur_vout_ctl, req_vout_ctl;
  939. int micb_reg, micb_val, micb_en;
  940. int ret = 0;
  941. switch (micb_num) {
  942. case MIC_BIAS_1:
  943. micb_reg = WCD937X_ANA_MICB1;
  944. break;
  945. case MIC_BIAS_2:
  946. micb_reg = WCD937X_ANA_MICB2;
  947. break;
  948. case MIC_BIAS_3:
  949. micb_reg = WCD937X_ANA_MICB3;
  950. break;
  951. default:
  952. return -EINVAL;
  953. }
  954. mutex_lock(&wcd937x->micb_lock);
  955. /*
  956. * If requested micbias voltage is same as current micbias
  957. * voltage, then just return. Otherwise, adjust voltage as
  958. * per requested value. If micbias is already enabled, then
  959. * to avoid slow micbias ramp-up or down enable pull-up
  960. * momentarily, change the micbias value and then re-enable
  961. * micbias.
  962. */
  963. micb_val = snd_soc_read(codec, micb_reg);
  964. micb_en = (micb_val & 0xC0) >> 6;
  965. cur_vout_ctl = micb_val & 0x3F;
  966. req_vout_ctl = wcd937x_get_micb_vout_ctl_val(req_volt);
  967. if (req_vout_ctl < 0) {
  968. ret = -EINVAL;
  969. goto exit;
  970. }
  971. if (cur_vout_ctl == req_vout_ctl) {
  972. ret = 0;
  973. goto exit;
  974. }
  975. dev_dbg(codec->dev, "%s: micb_num: %d, cur_mv: %d, req_mv: %d, micb_en: %d\n",
  976. __func__, micb_num, WCD_VOUT_CTL_TO_MICB(cur_vout_ctl),
  977. req_volt, micb_en);
  978. if (micb_en == 0x1)
  979. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  980. snd_soc_update_bits(codec, micb_reg, 0x3F, req_vout_ctl);
  981. if (micb_en == 0x1) {
  982. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x40);
  983. /*
  984. * Add 2ms delay as per HW requirement after enabling
  985. * micbias
  986. */
  987. usleep_range(2000, 2100);
  988. }
  989. exit:
  990. mutex_unlock(&wcd937x->micb_lock);
  991. return ret;
  992. }
  993. EXPORT_SYMBOL(wcd937x_mbhc_micb_adjust_voltage);
  994. static int wcd937x_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
  995. struct snd_kcontrol *kcontrol,
  996. int event)
  997. {
  998. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  999. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1000. int ret = 0;
  1001. switch (event) {
  1002. case SND_SOC_DAPM_PRE_PMU:
  1003. ret = swr_slvdev_datapath_control(wcd937x->tx_swr_dev,
  1004. wcd937x->tx_swr_dev->dev_num,
  1005. true);
  1006. break;
  1007. case SND_SOC_DAPM_POST_PMD:
  1008. ret = swr_slvdev_datapath_control(wcd937x->tx_swr_dev,
  1009. wcd937x->tx_swr_dev->dev_num,
  1010. false);
  1011. break;
  1012. };
  1013. return ret;
  1014. }
  1015. static int wcd937x_codec_enable_adc(struct snd_soc_dapm_widget *w,
  1016. struct snd_kcontrol *kcontrol,
  1017. int event){
  1018. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  1019. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  1020. w->name, event);
  1021. switch (event) {
  1022. case SND_SOC_DAPM_PRE_PMU:
  1023. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  1024. 0x80, 0x80);
  1025. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  1026. 0x08, 0x08);
  1027. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  1028. 0x10, 0x10);
  1029. wcd937x_tx_connect_port(codec, ADC1 + (w->shift), true);
  1030. break;
  1031. case SND_SOC_DAPM_POST_PMD:
  1032. wcd937x_tx_connect_port(codec, ADC1 + (w->shift), false);
  1033. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  1034. 0x08, 0x00);
  1035. break;
  1036. };
  1037. return 0;
  1038. }
  1039. static int wcd937x_enable_req(struct snd_soc_dapm_widget *w,
  1040. struct snd_kcontrol *kcontrol, int event)
  1041. {
  1042. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  1043. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  1044. w->name, event);
  1045. switch (event) {
  1046. case SND_SOC_DAPM_PRE_PMU:
  1047. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_REQ_CTL,
  1048. 0x02, 0x02);
  1049. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_REQ_CTL, 0x01,
  1050. 0x00);
  1051. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x40, 0x40);
  1052. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  1053. 0x30, 0x30);
  1054. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH1, 0x80, 0x80);
  1055. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x40, 0x00);
  1056. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x80, 0x80);
  1057. break;
  1058. case SND_SOC_DAPM_POST_PMD:
  1059. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH1, 0x80, 0x00);
  1060. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x80, 0x00);
  1061. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  1062. 0x10, 0x00);
  1063. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  1064. 0x10, 0x00);
  1065. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  1066. 0x80, 0x00);
  1067. break;
  1068. };
  1069. return 0;
  1070. }
  1071. int wcd937x_micbias_control(struct snd_soc_codec *codec,
  1072. int micb_num, int req, bool is_dapm)
  1073. {
  1074. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1075. int micb_index = micb_num - 1;
  1076. u16 micb_reg;
  1077. int pre_off_event = 0, post_off_event = 0;
  1078. int post_on_event = 0, post_dapm_off = 0;
  1079. int post_dapm_on = 0;
  1080. if ((micb_index < 0) || (micb_index > WCD937X_MAX_MICBIAS - 1)) {
  1081. dev_err(codec->dev, "%s: Invalid micbias index, micb_ind:%d\n",
  1082. __func__, micb_index);
  1083. return -EINVAL;
  1084. }
  1085. switch (micb_num) {
  1086. case MIC_BIAS_1:
  1087. micb_reg = WCD937X_ANA_MICB1;
  1088. break;
  1089. case MIC_BIAS_2:
  1090. micb_reg = WCD937X_ANA_MICB2;
  1091. pre_off_event = WCD_EVENT_PRE_MICBIAS_2_OFF;
  1092. post_off_event = WCD_EVENT_POST_MICBIAS_2_OFF;
  1093. post_on_event = WCD_EVENT_POST_MICBIAS_2_ON;
  1094. post_dapm_on = WCD_EVENT_POST_DAPM_MICBIAS_2_ON;
  1095. post_dapm_off = WCD_EVENT_POST_DAPM_MICBIAS_2_OFF;
  1096. break;
  1097. case MIC_BIAS_3:
  1098. micb_reg = WCD937X_ANA_MICB3;
  1099. break;
  1100. default:
  1101. dev_err(codec->dev, "%s: Invalid micbias number: %d\n",
  1102. __func__, micb_num);
  1103. return -EINVAL;
  1104. };
  1105. mutex_lock(&wcd937x->micb_lock);
  1106. switch (req) {
  1107. case MICB_PULLUP_ENABLE:
  1108. wcd937x->pullup_ref[micb_index]++;
  1109. if ((wcd937x->pullup_ref[micb_index] == 1) &&
  1110. (wcd937x->micb_ref[micb_index] == 0))
  1111. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  1112. break;
  1113. case MICB_PULLUP_DISABLE:
  1114. if (wcd937x->pullup_ref[micb_index] > 0)
  1115. wcd937x->pullup_ref[micb_index]--;
  1116. if ((wcd937x->pullup_ref[micb_index] == 0) &&
  1117. (wcd937x->micb_ref[micb_index] == 0))
  1118. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x00);
  1119. break;
  1120. case MICB_ENABLE:
  1121. wcd937x->micb_ref[micb_index]++;
  1122. if (wcd937x->micb_ref[micb_index] == 1) {
  1123. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0xE0, 0xE0);
  1124. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x10, 0x10);
  1125. snd_soc_update_bits(codec, WCD937X_MICB1_TEST_CTL_2, 0x01, 0x01);
  1126. snd_soc_update_bits(codec, WCD937X_MICB2_TEST_CTL_2, 0x01, 0x01);
  1127. snd_soc_update_bits(codec, WCD937X_MICB3_TEST_CTL_2, 0x01, 0x01);
  1128. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x40);
  1129. if (post_on_event && wcd937x->mbhc)
  1130. blocking_notifier_call_chain(
  1131. &wcd937x->mbhc->notifier, post_on_event,
  1132. &wcd937x->mbhc->wcd_mbhc);
  1133. }
  1134. if (is_dapm && post_dapm_on && wcd937x->mbhc)
  1135. blocking_notifier_call_chain(
  1136. &wcd937x->mbhc->notifier, post_dapm_on,
  1137. &wcd937x->mbhc->wcd_mbhc);
  1138. break;
  1139. case MICB_DISABLE:
  1140. if (wcd937x->micb_ref[micb_index] > 0)
  1141. wcd937x->micb_ref[micb_index]--;
  1142. if ((wcd937x->micb_ref[micb_index] == 0) &&
  1143. (wcd937x->pullup_ref[micb_index] > 0))
  1144. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  1145. else if ((wcd937x->micb_ref[micb_index] == 0) &&
  1146. (wcd937x->pullup_ref[micb_index] == 0)) {
  1147. if (pre_off_event && wcd937x->mbhc)
  1148. blocking_notifier_call_chain(
  1149. &wcd937x->mbhc->notifier, pre_off_event,
  1150. &wcd937x->mbhc->wcd_mbhc);
  1151. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x00);
  1152. if (post_off_event && wcd937x->mbhc)
  1153. blocking_notifier_call_chain(
  1154. &wcd937x->mbhc->notifier,
  1155. post_off_event,
  1156. &wcd937x->mbhc->wcd_mbhc);
  1157. }
  1158. if (is_dapm && post_dapm_off && wcd937x->mbhc)
  1159. blocking_notifier_call_chain(
  1160. &wcd937x->mbhc->notifier, post_dapm_off,
  1161. &wcd937x->mbhc->wcd_mbhc);
  1162. break;
  1163. };
  1164. dev_dbg(codec->dev, "%s: micb_num:%d, micb_ref: %d, pullup_ref: %d\n",
  1165. __func__, micb_num, wcd937x->micb_ref[micb_index],
  1166. wcd937x->pullup_ref[micb_index]);
  1167. mutex_unlock(&wcd937x->micb_lock);
  1168. return 0;
  1169. }
  1170. EXPORT_SYMBOL(wcd937x_micbias_control);
  1171. static int wcd937x_get_logical_addr(struct swr_device *swr_dev)
  1172. {
  1173. int ret = 0;
  1174. uint8_t devnum = 0;
  1175. ret = swr_get_logical_dev_num(swr_dev, swr_dev->addr, &devnum);
  1176. if (ret) {
  1177. dev_err(&swr_dev->dev,
  1178. "%s get devnum %d for dev addr %lx failed\n",
  1179. __func__, devnum, swr_dev->addr);
  1180. swr_remove_device(swr_dev);
  1181. return ret;
  1182. }
  1183. swr_dev->dev_num = devnum;
  1184. return 0;
  1185. }
  1186. static int wcd937x_event_notify(struct notifier_block *block,
  1187. unsigned long val,
  1188. void *data)
  1189. {
  1190. u16 event = (val & 0xffff);
  1191. u16 amic = (val >> 0x10);
  1192. u16 mask = 0x40, reg = 0x0;
  1193. int ret = 0;
  1194. struct wcd937x_priv *wcd937x = dev_get_drvdata((struct device *)data);
  1195. struct snd_soc_codec *codec = wcd937x->codec;
  1196. struct wcd_mbhc *mbhc;
  1197. switch (event) {
  1198. case BOLERO_WCD_EVT_TX_CH_HOLD_CLEAR:
  1199. if (amic == 0x1 || amic == 0x2)
  1200. reg = WCD937X_ANA_TX_CH2;
  1201. else if (amic == 0x3)
  1202. reg = WCD937X_ANA_TX_CH3_HPF;
  1203. else
  1204. return 0;
  1205. if (amic == 0x2)
  1206. mask = 0x20;
  1207. snd_soc_update_bits(codec, reg, mask, 0x00);
  1208. break;
  1209. case BOLERO_WCD_EVT_PA_OFF_PRE_SSR:
  1210. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0xC0, 0x00);
  1211. snd_soc_update_bits(codec, WCD937X_ANA_EAR, 0x80, 0x00);
  1212. snd_soc_update_bits(codec, WCD937X_AUX_AUXPA, 0x80, 0x00);
  1213. break;
  1214. case BOLERO_WCD_EVT_SSR_DOWN:
  1215. wcd937x_reset_low(wcd937x->dev);
  1216. break;
  1217. case BOLERO_WCD_EVT_SSR_UP:
  1218. wcd937x_reset(wcd937x->dev);
  1219. wcd937x_get_logical_addr(wcd937x->tx_swr_dev);
  1220. wcd937x_get_logical_addr(wcd937x->rx_swr_dev);
  1221. regcache_mark_dirty(wcd937x->regmap);
  1222. regcache_sync(wcd937x->regmap);
  1223. /* Initialize MBHC module */
  1224. mbhc = &wcd937x->mbhc->wcd_mbhc;
  1225. ret = wcd937x_mbhc_post_ssr_init(wcd937x->mbhc, codec);
  1226. if (ret) {
  1227. dev_err(codec->dev, "%s: mbhc initialization failed\n",
  1228. __func__);
  1229. } else {
  1230. wcd937x_mbhc_hs_detect(codec, mbhc->mbhc_cfg);
  1231. }
  1232. break;
  1233. default:
  1234. dev_err(codec->dev, "%s: invalid event %d\n", __func__, event);
  1235. break;
  1236. }
  1237. return 0;
  1238. }
  1239. static int __wcd937x_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1240. int event)
  1241. {
  1242. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  1243. int micb_num;
  1244. dev_dbg(codec->dev, "%s: wname: %s, event: %d\n",
  1245. __func__, w->name, event);
  1246. if (strnstr(w->name, "MIC BIAS1", sizeof("MIC BIAS1")))
  1247. micb_num = MIC_BIAS_1;
  1248. else if (strnstr(w->name, "MIC BIAS2", sizeof("MIC BIAS2")))
  1249. micb_num = MIC_BIAS_2;
  1250. else if (strnstr(w->name, "MIC BIAS3", sizeof("MIC BIAS3")))
  1251. micb_num = MIC_BIAS_3;
  1252. else
  1253. return -EINVAL;
  1254. switch (event) {
  1255. case SND_SOC_DAPM_PRE_PMU:
  1256. wcd937x_micbias_control(codec, micb_num, MICB_ENABLE, true);
  1257. break;
  1258. case SND_SOC_DAPM_POST_PMU:
  1259. usleep_range(1000, 1100);
  1260. break;
  1261. case SND_SOC_DAPM_POST_PMD:
  1262. wcd937x_micbias_control(codec, micb_num, MICB_DISABLE, true);
  1263. break;
  1264. };
  1265. return 0;
  1266. }
  1267. static int wcd937x_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1268. struct snd_kcontrol *kcontrol,
  1269. int event)
  1270. {
  1271. return __wcd937x_codec_enable_micbias(w, event);
  1272. }
  1273. static int wcd937x_rx_hph_mode_get(struct snd_kcontrol *kcontrol,
  1274. struct snd_ctl_elem_value *ucontrol)
  1275. {
  1276. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  1277. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1278. ucontrol->value.integer.value[0] = wcd937x->hph_mode;
  1279. return 0;
  1280. }
  1281. static int wcd937x_rx_hph_mode_put(struct snd_kcontrol *kcontrol,
  1282. struct snd_ctl_elem_value *ucontrol)
  1283. {
  1284. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  1285. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1286. u32 mode_val;
  1287. mode_val = ucontrol->value.enumerated.item[0];
  1288. dev_dbg(codec->dev, "%s: mode: %d\n", __func__, mode_val);
  1289. if (mode_val == 0) {
  1290. dev_warn(codec->dev, "%s:Invalid HPH Mode, default to class_AB\n",
  1291. __func__);
  1292. mode_val = 3; /* enum will be updated later */
  1293. }
  1294. wcd937x->hph_mode = mode_val;
  1295. return 0;
  1296. }
  1297. static int wcd937x_get_compander(struct snd_kcontrol *kcontrol,
  1298. struct snd_ctl_elem_value *ucontrol)
  1299. {
  1300. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  1301. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1302. bool hphr;
  1303. struct soc_multi_mixer_control *mc;
  1304. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1305. hphr = mc->shift;
  1306. ucontrol->value.integer.value[0] = hphr ? wcd937x->comp2_enable :
  1307. wcd937x->comp1_enable;
  1308. return 0;
  1309. }
  1310. static int wcd937x_set_compander(struct snd_kcontrol *kcontrol,
  1311. struct snd_ctl_elem_value *ucontrol)
  1312. {
  1313. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  1314. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1315. int value = ucontrol->value.integer.value[0];
  1316. bool hphr;
  1317. struct soc_multi_mixer_control *mc;
  1318. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1319. hphr = mc->shift;
  1320. if (hphr)
  1321. wcd937x->comp2_enable = value;
  1322. else
  1323. wcd937x->comp1_enable = value;
  1324. return 0;
  1325. }
  1326. static int wcd937x_codec_enable_vdd_buck(struct snd_soc_dapm_widget *w,
  1327. struct snd_kcontrol *kcontrol,
  1328. int event)
  1329. {
  1330. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  1331. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1332. struct wcd937x_pdata *pdata = NULL;
  1333. int ret = 0;
  1334. pdata = dev_get_platdata(wcd937x->dev);
  1335. if (!pdata) {
  1336. dev_err(codec->dev, "%s: pdata is NULL\n", __func__);
  1337. return -EINVAL;
  1338. }
  1339. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  1340. w->name, event);
  1341. switch (event) {
  1342. case SND_SOC_DAPM_PRE_PMU:
  1343. if (test_bit(ALLOW_BUCK_DISABLE, &wcd937x->status_mask)) {
  1344. dev_dbg(codec->dev,
  1345. "%s: buck already in enabled state\n",
  1346. __func__);
  1347. return 0;
  1348. }
  1349. ret = msm_cdc_enable_ondemand_supply(wcd937x->dev,
  1350. wcd937x->supplies,
  1351. pdata->regulator,
  1352. pdata->num_supplies,
  1353. "cdc-vdd-buck");
  1354. if (ret == -EINVAL) {
  1355. dev_err(codec->dev, "%s: vdd buck is not enabled\n",
  1356. __func__);
  1357. return ret;
  1358. }
  1359. clear_bit(ALLOW_BUCK_DISABLE, &wcd937x->status_mask);
  1360. /*
  1361. * 200us sleep is required after LDO15 is enabled as per
  1362. * HW requirement
  1363. */
  1364. usleep_range(200, 250);
  1365. break;
  1366. case SND_SOC_DAPM_POST_PMD:
  1367. set_bit(ALLOW_BUCK_DISABLE, &wcd937x->status_mask);
  1368. break;
  1369. }
  1370. return 0;
  1371. }
  1372. static const char * const rx_hph_mode_mux_text[] = {
  1373. "CLS_H_INVALID", "CLS_H_HIFI", "CLS_H_LP", "CLS_AB", "CLS_H_LOHIFI",
  1374. "CLS_H_ULP", "CLS_AB_HIFI",
  1375. };
  1376. static const struct soc_enum rx_hph_mode_mux_enum =
  1377. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(rx_hph_mode_mux_text),
  1378. rx_hph_mode_mux_text);
  1379. static const struct snd_kcontrol_new wcd937x_snd_controls[] = {
  1380. SOC_ENUM_EXT("RX HPH Mode", rx_hph_mode_mux_enum,
  1381. wcd937x_rx_hph_mode_get, wcd937x_rx_hph_mode_put),
  1382. SOC_SINGLE_EXT("HPHL_COMP Switch", SND_SOC_NOPM, 0, 1, 0,
  1383. wcd937x_get_compander, wcd937x_set_compander),
  1384. SOC_SINGLE_EXT("HPHR_COMP Switch", SND_SOC_NOPM, 1, 1, 0,
  1385. wcd937x_get_compander, wcd937x_set_compander),
  1386. SOC_SINGLE_TLV("HPHL Volume", WCD937X_HPH_L_EN, 0, 20, 1, line_gain),
  1387. SOC_SINGLE_TLV("HPHR Volume", WCD937X_HPH_R_EN, 0, 20, 1, line_gain),
  1388. SOC_SINGLE_TLV("ADC1 Volume", WCD937X_ANA_TX_CH1, 0, 20, 0, analog_gain),
  1389. SOC_SINGLE_TLV("ADC2 Volume", WCD937X_ANA_TX_CH2, 0, 20, 0, analog_gain),
  1390. SOC_SINGLE_TLV("ADC3 Volume", WCD937X_ANA_TX_CH3, 0, 20, 0, analog_gain),
  1391. };
  1392. static const struct snd_kcontrol_new adc1_switch[] = {
  1393. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1394. };
  1395. static const struct snd_kcontrol_new adc2_switch[] = {
  1396. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1397. };
  1398. static const struct snd_kcontrol_new adc3_switch[] = {
  1399. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1400. };
  1401. static const struct snd_kcontrol_new dmic1_switch[] = {
  1402. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1403. };
  1404. static const struct snd_kcontrol_new dmic2_switch[] = {
  1405. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1406. };
  1407. static const struct snd_kcontrol_new dmic3_switch[] = {
  1408. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1409. };
  1410. static const struct snd_kcontrol_new dmic4_switch[] = {
  1411. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1412. };
  1413. static const struct snd_kcontrol_new dmic5_switch[] = {
  1414. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1415. };
  1416. static const struct snd_kcontrol_new dmic6_switch[] = {
  1417. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1418. };
  1419. static const struct snd_kcontrol_new ear_rdac_switch[] = {
  1420. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1421. };
  1422. static const struct snd_kcontrol_new aux_rdac_switch[] = {
  1423. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1424. };
  1425. static const struct snd_kcontrol_new hphl_rdac_switch[] = {
  1426. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1427. };
  1428. static const struct snd_kcontrol_new hphr_rdac_switch[] = {
  1429. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1430. };
  1431. static const char * const adc2_mux_text[] = {
  1432. "INP2", "INP3"
  1433. };
  1434. static const char * const rdac3_mux_text[] = {
  1435. "RX1", "RX3"
  1436. };
  1437. static const struct soc_enum adc2_enum =
  1438. SOC_ENUM_SINGLE(WCD937X_TX_NEW_TX_CH2_SEL, 7,
  1439. ARRAY_SIZE(adc2_mux_text), adc2_mux_text);
  1440. static const struct soc_enum rdac3_enum =
  1441. SOC_ENUM_SINGLE(WCD937X_DIGITAL_CDC_EAR_PATH_CTL, 0,
  1442. ARRAY_SIZE(rdac3_mux_text), rdac3_mux_text);
  1443. static const struct snd_kcontrol_new tx_adc2_mux =
  1444. SOC_DAPM_ENUM("ADC2 MUX Mux", adc2_enum);
  1445. static const struct snd_kcontrol_new rx_rdac3_mux =
  1446. SOC_DAPM_ENUM("RDAC3_MUX Mux", rdac3_enum);
  1447. static const struct snd_soc_dapm_widget wcd937x_dapm_widgets[] = {
  1448. /*input widgets*/
  1449. SND_SOC_DAPM_INPUT("AMIC1"),
  1450. SND_SOC_DAPM_INPUT("AMIC2"),
  1451. SND_SOC_DAPM_INPUT("AMIC3"),
  1452. SND_SOC_DAPM_INPUT("IN1_HPHL"),
  1453. SND_SOC_DAPM_INPUT("IN2_HPHR"),
  1454. SND_SOC_DAPM_INPUT("IN3_AUX"),
  1455. /*tx widgets*/
  1456. SND_SOC_DAPM_ADC_E("ADC1", NULL, SND_SOC_NOPM, 0, 0,
  1457. wcd937x_codec_enable_adc,
  1458. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1459. SND_SOC_DAPM_ADC_E("ADC2", NULL, SND_SOC_NOPM, 1, 0,
  1460. wcd937x_codec_enable_adc,
  1461. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1462. SND_SOC_DAPM_MIXER_E("ADC1 REQ", SND_SOC_NOPM, 0, 0,
  1463. NULL, 0, wcd937x_enable_req,
  1464. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1465. SND_SOC_DAPM_MIXER_E("ADC2 REQ", SND_SOC_NOPM, 0, 0,
  1466. NULL, 0, wcd937x_enable_req,
  1467. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1468. SND_SOC_DAPM_MUX("ADC2 MUX", SND_SOC_NOPM, 0, 0,
  1469. &tx_adc2_mux),
  1470. /*tx mixers*/
  1471. SND_SOC_DAPM_MIXER_E("ADC1_MIXER", SND_SOC_NOPM, 0, 0,
  1472. adc1_switch, ARRAY_SIZE(adc1_switch),
  1473. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1474. SND_SOC_DAPM_POST_PMD),
  1475. SND_SOC_DAPM_MIXER_E("ADC2_MIXER", SND_SOC_NOPM, 0, 0,
  1476. adc2_switch, ARRAY_SIZE(adc2_switch),
  1477. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1478. SND_SOC_DAPM_POST_PMD),
  1479. /* micbias widgets*/
  1480. SND_SOC_DAPM_MICBIAS_E("MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1481. wcd937x_codec_enable_micbias,
  1482. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1483. SND_SOC_DAPM_POST_PMD),
  1484. SND_SOC_DAPM_MICBIAS_E("MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1485. wcd937x_codec_enable_micbias,
  1486. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1487. SND_SOC_DAPM_POST_PMD),
  1488. SND_SOC_DAPM_MICBIAS_E("MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1489. wcd937x_codec_enable_micbias,
  1490. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1491. SND_SOC_DAPM_POST_PMD),
  1492. SND_SOC_DAPM_SUPPLY("VDD_BUCK", SND_SOC_NOPM, 0, 0,
  1493. wcd937x_codec_enable_vdd_buck,
  1494. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1495. SND_SOC_DAPM_SUPPLY_S("CLS_H_PORT", 1, SND_SOC_NOPM, 0, 0,
  1496. wcd937x_enable_clsh,
  1497. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1498. /*rx widgets*/
  1499. SND_SOC_DAPM_PGA_E("EAR PGA", WCD937X_ANA_EAR, 7, 0, NULL, 0,
  1500. wcd937x_codec_enable_ear_pa,
  1501. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1502. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1503. SND_SOC_DAPM_PGA_E("AUX PGA", WCD937X_AUX_AUXPA, 7, 0, NULL, 0,
  1504. wcd937x_codec_enable_aux_pa,
  1505. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1506. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1507. SND_SOC_DAPM_PGA_E("HPHL PGA", WCD937X_ANA_HPH, 7, 0, NULL, 0,
  1508. wcd937x_codec_enable_hphl_pa,
  1509. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1510. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1511. SND_SOC_DAPM_PGA_E("HPHR PGA", WCD937X_ANA_HPH, 6, 0, NULL, 0,
  1512. wcd937x_codec_enable_hphr_pa,
  1513. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1514. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1515. SND_SOC_DAPM_DAC_E("RDAC1", NULL, SND_SOC_NOPM, 0, 0,
  1516. wcd937x_codec_hphl_dac_event,
  1517. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1518. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1519. SND_SOC_DAPM_DAC_E("RDAC2", NULL, SND_SOC_NOPM, 0, 0,
  1520. wcd937x_codec_hphr_dac_event,
  1521. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1522. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1523. SND_SOC_DAPM_DAC_E("RDAC3", NULL, SND_SOC_NOPM, 0, 0,
  1524. wcd937x_codec_ear_dac_event,
  1525. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1526. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1527. SND_SOC_DAPM_DAC_E("RDAC4", NULL, SND_SOC_NOPM, 0, 0,
  1528. wcd937x_codec_aux_dac_event,
  1529. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1530. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1531. SND_SOC_DAPM_MUX("RDAC3_MUX", SND_SOC_NOPM, 0, 0, &rx_rdac3_mux),
  1532. SND_SOC_DAPM_MIXER_E("RX1", SND_SOC_NOPM, 0, 0, NULL, 0,
  1533. wcd937x_enable_rx1, SND_SOC_DAPM_PRE_PMU |
  1534. SND_SOC_DAPM_POST_PMD),
  1535. SND_SOC_DAPM_MIXER_E("RX2", SND_SOC_NOPM, 0, 0, NULL, 0,
  1536. wcd937x_enable_rx2, SND_SOC_DAPM_PRE_PMU |
  1537. SND_SOC_DAPM_POST_PMD),
  1538. SND_SOC_DAPM_MIXER_E("RX3", SND_SOC_NOPM, 0, 0, NULL, 0,
  1539. wcd937x_enable_rx3, SND_SOC_DAPM_PRE_PMU |
  1540. SND_SOC_DAPM_POST_PMD),
  1541. /* rx mixer widgets*/
  1542. SND_SOC_DAPM_MIXER("EAR_RDAC", SND_SOC_NOPM, 0, 0,
  1543. ear_rdac_switch, ARRAY_SIZE(ear_rdac_switch)),
  1544. SND_SOC_DAPM_MIXER("AUX_RDAC", SND_SOC_NOPM, 0, 0,
  1545. aux_rdac_switch, ARRAY_SIZE(aux_rdac_switch)),
  1546. SND_SOC_DAPM_MIXER("HPHL_RDAC", SND_SOC_NOPM, 0, 0,
  1547. hphl_rdac_switch, ARRAY_SIZE(hphl_rdac_switch)),
  1548. SND_SOC_DAPM_MIXER("HPHR_RDAC", SND_SOC_NOPM, 0, 0,
  1549. hphr_rdac_switch, ARRAY_SIZE(hphr_rdac_switch)),
  1550. /*output widgets tx*/
  1551. SND_SOC_DAPM_OUTPUT("ADC1_OUTPUT"),
  1552. SND_SOC_DAPM_OUTPUT("ADC2_OUTPUT"),
  1553. /*output widgets rx*/
  1554. SND_SOC_DAPM_OUTPUT("EAR"),
  1555. SND_SOC_DAPM_OUTPUT("AUX"),
  1556. SND_SOC_DAPM_OUTPUT("HPHL"),
  1557. SND_SOC_DAPM_OUTPUT("HPHR"),
  1558. };
  1559. static const struct snd_soc_dapm_widget wcd9375_dapm_widgets[] = {
  1560. /*input widgets*/
  1561. SND_SOC_DAPM_INPUT("AMIC4"),
  1562. /*tx widgets*/
  1563. SND_SOC_DAPM_ADC_E("ADC3", NULL, SND_SOC_NOPM, 2, 0,
  1564. wcd937x_codec_enable_adc,
  1565. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1566. SND_SOC_DAPM_MIXER_E("ADC3 REQ", SND_SOC_NOPM, 0, 0,
  1567. NULL, 0, wcd937x_enable_req,
  1568. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1569. SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
  1570. wcd937x_codec_enable_dmic,
  1571. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1572. SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 1, 0,
  1573. wcd937x_codec_enable_dmic,
  1574. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1575. SND_SOC_DAPM_ADC_E("DMIC3", NULL, SND_SOC_NOPM, 2, 0,
  1576. wcd937x_codec_enable_dmic,
  1577. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1578. SND_SOC_DAPM_ADC_E("DMIC4", NULL, SND_SOC_NOPM, 3, 0,
  1579. wcd937x_codec_enable_dmic,
  1580. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1581. SND_SOC_DAPM_ADC_E("DMIC5", NULL, SND_SOC_NOPM, 4, 0,
  1582. wcd937x_codec_enable_dmic,
  1583. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1584. SND_SOC_DAPM_ADC_E("DMIC6", NULL, SND_SOC_NOPM, 5, 0,
  1585. wcd937x_codec_enable_dmic,
  1586. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1587. /*tx mixer widgets*/
  1588. SND_SOC_DAPM_MIXER_E("DMIC1_MIXER", SND_SOC_NOPM, 0,
  1589. 0, dmic1_switch, ARRAY_SIZE(dmic1_switch),
  1590. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1591. SND_SOC_DAPM_POST_PMD),
  1592. SND_SOC_DAPM_MIXER_E("DMIC2_MIXER", SND_SOC_NOPM, 0,
  1593. 0, dmic2_switch, ARRAY_SIZE(dmic2_switch),
  1594. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1595. SND_SOC_DAPM_POST_PMD),
  1596. SND_SOC_DAPM_MIXER_E("DMIC3_MIXER", SND_SOC_NOPM, 0,
  1597. 0, dmic3_switch, ARRAY_SIZE(dmic3_switch),
  1598. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1599. SND_SOC_DAPM_POST_PMD),
  1600. SND_SOC_DAPM_MIXER_E("DMIC4_MIXER", SND_SOC_NOPM, 0,
  1601. 0, dmic4_switch, ARRAY_SIZE(dmic4_switch),
  1602. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1603. SND_SOC_DAPM_POST_PMD),
  1604. SND_SOC_DAPM_MIXER_E("DMIC5_MIXER", SND_SOC_NOPM, 0,
  1605. 0, dmic5_switch, ARRAY_SIZE(dmic5_switch),
  1606. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1607. SND_SOC_DAPM_POST_PMD),
  1608. SND_SOC_DAPM_MIXER_E("DMIC6_MIXER", SND_SOC_NOPM, 0,
  1609. 0, dmic6_switch, ARRAY_SIZE(dmic6_switch),
  1610. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1611. SND_SOC_DAPM_POST_PMD),
  1612. SND_SOC_DAPM_MIXER_E("ADC3_MIXER", SND_SOC_NOPM, 0, 0, adc3_switch,
  1613. ARRAY_SIZE(adc3_switch), wcd937x_tx_swr_ctrl,
  1614. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1615. /*output widgets*/
  1616. SND_SOC_DAPM_OUTPUT("DMIC1_OUTPUT"),
  1617. SND_SOC_DAPM_OUTPUT("DMIC2_OUTPUT"),
  1618. SND_SOC_DAPM_OUTPUT("DMIC3_OUTPUT"),
  1619. SND_SOC_DAPM_OUTPUT("DMIC4_OUTPUT"),
  1620. SND_SOC_DAPM_OUTPUT("DMIC5_OUTPUT"),
  1621. SND_SOC_DAPM_OUTPUT("DMIC6_OUTPUT"),
  1622. SND_SOC_DAPM_OUTPUT("ADC3_OUTPUT"),
  1623. };
  1624. static const struct snd_soc_dapm_route wcd937x_audio_map[] = {
  1625. {"ADC1_OUTPUT", NULL, "ADC1_MIXER"},
  1626. {"ADC1_MIXER", "Switch", "ADC1 REQ"},
  1627. {"ADC1 REQ", NULL, "ADC1"},
  1628. {"ADC1", NULL, "AMIC1"},
  1629. {"ADC2_OUTPUT", NULL, "ADC2_MIXER"},
  1630. {"ADC2_MIXER", "Switch", "ADC2 REQ"},
  1631. {"ADC2 REQ", NULL, "ADC2"},
  1632. {"ADC2", NULL, "ADC2 MUX"},
  1633. {"ADC2 MUX", "INP3", "AMIC3"},
  1634. {"ADC2 MUX", "INP2", "AMIC2"},
  1635. {"IN1_HPHL", NULL, "VDD_BUCK"},
  1636. {"IN1_HPHL", NULL, "CLS_H_PORT"},
  1637. {"RX1", NULL, "IN1_HPHL"},
  1638. {"RDAC1", NULL, "RX1"},
  1639. {"HPHL_RDAC", "Switch", "RDAC1"},
  1640. {"HPHL PGA", NULL, "HPHL_RDAC"},
  1641. {"HPHL", NULL, "HPHL PGA"},
  1642. {"IN2_HPHR", NULL, "VDD_BUCK"},
  1643. {"IN2_HPHR", NULL, "CLS_H_PORT"},
  1644. {"RX2", NULL, "IN2_HPHR"},
  1645. {"RDAC2", NULL, "RX2"},
  1646. {"HPHR_RDAC", "Switch", "RDAC2"},
  1647. {"HPHR PGA", NULL, "HPHR_RDAC"},
  1648. {"HPHR", NULL, "HPHR PGA"},
  1649. {"IN3_AUX", NULL, "VDD_BUCK"},
  1650. {"IN3_AUX", NULL, "CLS_H_PORT"},
  1651. {"RX3", NULL, "IN3_AUX"},
  1652. {"RDAC4", NULL, "RX3"},
  1653. {"AUX_RDAC", "Switch", "RDAC4"},
  1654. {"AUX PGA", NULL, "AUX_RDAC"},
  1655. {"AUX", NULL, "AUX PGA"},
  1656. {"RDAC3_MUX", "RX3", "RX3"},
  1657. {"RDAC3_MUX", "RX1", "RX1"},
  1658. {"RDAC3", NULL, "RDAC3_MUX"},
  1659. {"EAR_RDAC", "Switch", "RDAC3"},
  1660. {"EAR PGA", NULL, "EAR_RDAC"},
  1661. {"EAR", NULL, "EAR PGA"},
  1662. };
  1663. static const struct snd_soc_dapm_route wcd9375_audio_map[] = {
  1664. {"ADC3_OUTPUT", NULL, "ADC3_MIXER"},
  1665. {"ADC3_MIXER", "Switch", "ADC3 REQ"},
  1666. {"ADC3 REQ", NULL, "ADC3"},
  1667. {"ADC3", NULL, "AMIC4"},
  1668. {"DMIC1_OUTPUT", NULL, "DMIC1_MIXER"},
  1669. {"DMIC1_MIXER", "Switch", "DMIC1"},
  1670. {"DMIC2_OUTPUT", NULL, "DMIC2_MIXER"},
  1671. {"DMIC2_MIXER", "Switch", "DMIC2"},
  1672. {"DMIC3_OUTPUT", NULL, "DMIC3_MIXER"},
  1673. {"DMIC3_MIXER", "Switch", "DMIC3"},
  1674. {"DMIC4_OUTPUT", NULL, "DMIC4_MIXER"},
  1675. {"DMIC4_MIXER", "Switch", "DMIC4"},
  1676. {"DMIC5_OUTPUT", NULL, "DMIC5_MIXER"},
  1677. {"DMIC5_MIXER", "Switch", "DMIC5"},
  1678. {"DMIC6_OUTPUT", NULL, "DMIC6_MIXER"},
  1679. {"DMIC6_MIXER", "Switch", "DMIC6"},
  1680. };
  1681. static ssize_t wcd937x_version_read(struct snd_info_entry *entry,
  1682. void *file_private_data,
  1683. struct file *file,
  1684. char __user *buf, size_t count,
  1685. loff_t pos)
  1686. {
  1687. struct wcd937x_priv *priv;
  1688. char buffer[WCD937X_VERSION_ENTRY_SIZE];
  1689. int len = 0;
  1690. priv = (struct wcd937x_priv *) entry->private_data;
  1691. if (!priv) {
  1692. pr_err("%s: wcd937x priv is null\n", __func__);
  1693. return -EINVAL;
  1694. }
  1695. switch (priv->version) {
  1696. case WCD937X_VERSION_1_0:
  1697. len = snprintf(buffer, sizeof(buffer), "WCD937X_1_0\n");
  1698. break;
  1699. default:
  1700. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  1701. }
  1702. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  1703. }
  1704. static struct snd_info_entry_ops wcd937x_info_ops = {
  1705. .read = wcd937x_version_read,
  1706. };
  1707. /*
  1708. * wcd937x_info_create_codec_entry - creates wcd937x module
  1709. * @codec_root: The parent directory
  1710. * @codec: Codec instance
  1711. *
  1712. * Creates wcd937x module and version entry under the given
  1713. * parent directory.
  1714. *
  1715. * Return: 0 on success or negative error code on failure.
  1716. */
  1717. int wcd937x_info_create_codec_entry(struct snd_info_entry *codec_root,
  1718. struct snd_soc_codec *codec)
  1719. {
  1720. struct snd_info_entry *version_entry;
  1721. struct wcd937x_priv *priv;
  1722. struct snd_soc_card *card;
  1723. if (!codec_root || !codec)
  1724. return -EINVAL;
  1725. priv = snd_soc_codec_get_drvdata(codec);
  1726. if (priv->entry) {
  1727. dev_dbg(priv->dev,
  1728. "%s:wcd937x module already created\n", __func__);
  1729. return 0;
  1730. }
  1731. card = codec->component.card;
  1732. priv->entry = snd_info_create_subdir(codec_root->module,
  1733. "wcd937x", codec_root);
  1734. if (!priv->entry) {
  1735. dev_dbg(codec->dev, "%s: failed to create wcd937x entry\n",
  1736. __func__);
  1737. return -ENOMEM;
  1738. }
  1739. version_entry = snd_info_create_card_entry(card->snd_card,
  1740. "version",
  1741. priv->entry);
  1742. if (!version_entry) {
  1743. dev_dbg(codec->dev, "%s: failed to create wcd937x version entry\n",
  1744. __func__);
  1745. return -ENOMEM;
  1746. }
  1747. version_entry->private_data = priv;
  1748. version_entry->size = WCD937X_VERSION_ENTRY_SIZE;
  1749. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  1750. version_entry->c.ops = &wcd937x_info_ops;
  1751. if (snd_info_register(version_entry) < 0) {
  1752. snd_info_free_entry(version_entry);
  1753. return -ENOMEM;
  1754. }
  1755. priv->version_entry = version_entry;
  1756. return 0;
  1757. }
  1758. EXPORT_SYMBOL(wcd937x_info_create_codec_entry);
  1759. static int wcd937x_soc_codec_probe(struct snd_soc_codec *codec)
  1760. {
  1761. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1762. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  1763. int variant;
  1764. int ret = -EINVAL;
  1765. dev_info(codec->dev, "%s()\n", __func__);
  1766. wcd937x = snd_soc_codec_get_drvdata(codec);
  1767. if (!wcd937x)
  1768. return -EINVAL;
  1769. wcd937x->codec = codec;
  1770. variant = (snd_soc_read(codec, WCD937X_DIGITAL_EFUSE_REG_0) & 0x0E) >> 1;
  1771. wcd937x->variant = variant;
  1772. wcd937x->fw_data = devm_kzalloc(codec->dev,
  1773. sizeof(*(wcd937x->fw_data)),
  1774. GFP_KERNEL);
  1775. if (!wcd937x->fw_data) {
  1776. dev_err(codec->dev, "Failed to allocate fw_data\n");
  1777. ret = -ENOMEM;
  1778. goto err;
  1779. }
  1780. set_bit(WCD9XXX_MBHC_CAL, wcd937x->fw_data->cal_bit);
  1781. ret = wcd_cal_create_hwdep(wcd937x->fw_data,
  1782. WCD9XXX_CODEC_HWDEP_NODE, codec);
  1783. if (ret < 0) {
  1784. dev_err(codec->dev, "%s hwdep failed %d\n", __func__, ret);
  1785. goto err_hwdep;
  1786. }
  1787. ret = wcd937x_mbhc_init(&wcd937x->mbhc, codec, wcd937x->fw_data);
  1788. if (ret) {
  1789. pr_err("%s: mbhc initialization failed\n", __func__);
  1790. goto err_hwdep;
  1791. }
  1792. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  1793. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  1794. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  1795. snd_soc_dapm_ignore_suspend(dapm, "IN1_HPHL");
  1796. snd_soc_dapm_ignore_suspend(dapm, "IN2_HPHR");
  1797. snd_soc_dapm_ignore_suspend(dapm, "IN3_AUX");
  1798. snd_soc_dapm_ignore_suspend(dapm, "ADC1_OUTPUT");
  1799. snd_soc_dapm_ignore_suspend(dapm, "ADC2_OUTPUT");
  1800. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  1801. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  1802. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  1803. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  1804. snd_soc_dapm_sync(dapm);
  1805. wcd_cls_h_init(&wcd937x->clsh_info);
  1806. wcd937x_init_reg(codec);
  1807. if (wcd937x->variant == WCD9375_VARIANT) {
  1808. ret = snd_soc_dapm_new_controls(dapm, wcd9375_dapm_widgets,
  1809. ARRAY_SIZE(wcd9375_dapm_widgets));
  1810. if (ret < 0) {
  1811. dev_err(codec->dev, "%s: Failed to add snd_ctls\n",
  1812. __func__);
  1813. goto err_hwdep;
  1814. }
  1815. ret = snd_soc_dapm_add_routes(dapm, wcd9375_audio_map,
  1816. ARRAY_SIZE(wcd9375_audio_map));
  1817. if (ret < 0) {
  1818. dev_err(codec->dev, "%s: Failed to add routes\n",
  1819. __func__);
  1820. goto err_hwdep;
  1821. }
  1822. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  1823. snd_soc_dapm_ignore_suspend(dapm, "DMIC1_OUTPUT");
  1824. snd_soc_dapm_ignore_suspend(dapm, "DMIC2_OUTPUT");
  1825. snd_soc_dapm_ignore_suspend(dapm, "DMIC3_OUTPUT");
  1826. snd_soc_dapm_ignore_suspend(dapm, "DMIC4_OUTPUT");
  1827. snd_soc_dapm_ignore_suspend(dapm, "DMIC5_OUTPUT");
  1828. snd_soc_dapm_ignore_suspend(dapm, "DMIC6_OUTPUT");
  1829. snd_soc_dapm_ignore_suspend(dapm, "ADC3_OUTPUT");
  1830. snd_soc_dapm_sync(dapm);
  1831. }
  1832. wcd937x->version = WCD937X_VERSION_1_0;
  1833. /* Register event notifier */
  1834. wcd937x->nblock.notifier_call = wcd937x_event_notify;
  1835. if (wcd937x->register_notifier) {
  1836. ret = wcd937x->register_notifier(wcd937x->handle,
  1837. &wcd937x->nblock,
  1838. true);
  1839. if (ret) {
  1840. dev_err(codec->dev,
  1841. "%s: Failed to register notifier %d\n",
  1842. __func__, ret);
  1843. return ret;
  1844. }
  1845. }
  1846. return ret;
  1847. err_hwdep:
  1848. wcd937x->fw_data = NULL;
  1849. err:
  1850. return ret;
  1851. }
  1852. static int wcd937x_soc_codec_remove(struct snd_soc_codec *codec)
  1853. {
  1854. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1855. if (!wcd937x)
  1856. return -EINVAL;
  1857. if (wcd937x->register_notifier)
  1858. return wcd937x->register_notifier(wcd937x->handle,
  1859. &wcd937x->nblock,
  1860. false);
  1861. return 0;
  1862. }
  1863. static struct regmap *wcd937x_get_regmap(struct device *dev)
  1864. {
  1865. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  1866. return wcd937x->regmap;
  1867. }
  1868. static struct snd_soc_codec_driver soc_codec_dev_wcd937x = {
  1869. .probe = wcd937x_soc_codec_probe,
  1870. .remove = wcd937x_soc_codec_remove,
  1871. .get_regmap = wcd937x_get_regmap,
  1872. .component_driver = {
  1873. .controls = wcd937x_snd_controls,
  1874. .num_controls = ARRAY_SIZE(wcd937x_snd_controls),
  1875. .dapm_widgets = wcd937x_dapm_widgets,
  1876. .num_dapm_widgets = ARRAY_SIZE(wcd937x_dapm_widgets),
  1877. .dapm_routes = wcd937x_audio_map,
  1878. .num_dapm_routes = ARRAY_SIZE(wcd937x_audio_map),
  1879. },
  1880. };
  1881. #ifdef CONFIG_PM_SLEEP
  1882. static int wcd937x_suspend(struct device *dev)
  1883. {
  1884. struct wcd937x_priv *wcd937x = NULL;
  1885. int ret = 0;
  1886. struct wcd937x_pdata *pdata = NULL;
  1887. if (!dev)
  1888. return -ENODEV;
  1889. wcd937x = dev_get_drvdata(dev);
  1890. if (!wcd937x)
  1891. return -EINVAL;
  1892. pdata = dev_get_platdata(wcd937x->dev);
  1893. if (!pdata) {
  1894. dev_err(dev, "%s: pdata is NULL\n", __func__);
  1895. return -EINVAL;
  1896. }
  1897. if (test_bit(ALLOW_BUCK_DISABLE, &wcd937x->status_mask)) {
  1898. ret = msm_cdc_disable_ondemand_supply(wcd937x->dev,
  1899. wcd937x->supplies,
  1900. pdata->regulator,
  1901. pdata->num_supplies,
  1902. "cdc-vdd-buck");
  1903. if (ret == -EINVAL) {
  1904. dev_err(dev, "%s: vdd buck is not disabled\n",
  1905. __func__);
  1906. return 0;
  1907. }
  1908. clear_bit(ALLOW_BUCK_DISABLE, &wcd937x->status_mask);
  1909. }
  1910. return 0;
  1911. }
  1912. static int wcd937x_resume(struct device *dev)
  1913. {
  1914. return 0;
  1915. }
  1916. #endif
  1917. static int wcd937x_reset(struct device *dev)
  1918. {
  1919. struct wcd937x_priv *wcd937x = NULL;
  1920. int rc = 0;
  1921. int value = 0;
  1922. if (!dev)
  1923. return -ENODEV;
  1924. wcd937x = dev_get_drvdata(dev);
  1925. if (!wcd937x)
  1926. return -EINVAL;
  1927. if (!wcd937x->rst_np) {
  1928. dev_err(dev, "%s: reset gpio device node not specified\n",
  1929. __func__);
  1930. return -EINVAL;
  1931. }
  1932. value = msm_cdc_pinctrl_get_state(wcd937x->rst_np);
  1933. if (value > 0)
  1934. return 0;
  1935. rc = msm_cdc_pinctrl_select_sleep_state(wcd937x->rst_np);
  1936. if (rc) {
  1937. dev_err(dev, "%s: wcd sleep state request fail!\n",
  1938. __func__);
  1939. return rc;
  1940. }
  1941. /* 20ms sleep required after pulling the reset gpio to LOW */
  1942. usleep_range(20, 30);
  1943. rc = msm_cdc_pinctrl_select_active_state(wcd937x->rst_np);
  1944. if (rc) {
  1945. dev_err(dev, "%s: wcd active state request fail!\n",
  1946. __func__);
  1947. return rc;
  1948. }
  1949. /* 20ms sleep required after pulling the reset gpio to HIGH */
  1950. usleep_range(20, 30);
  1951. return rc;
  1952. }
  1953. static int wcd937x_read_of_property_u32(struct device *dev, const char *name,
  1954. u32 *val)
  1955. {
  1956. int rc = 0;
  1957. rc = of_property_read_u32(dev->of_node, name, val);
  1958. if (rc)
  1959. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  1960. __func__, name, dev->of_node->full_name);
  1961. return rc;
  1962. }
  1963. static void wcd937x_dt_parse_micbias_info(struct device *dev,
  1964. struct wcd937x_micbias_setting *mb)
  1965. {
  1966. u32 prop_val = 0;
  1967. int rc = 0;
  1968. /* MB1 */
  1969. if (of_find_property(dev->of_node, "qcom,cdc-micbias1-mv",
  1970. NULL)) {
  1971. rc = wcd937x_read_of_property_u32(dev,
  1972. "qcom,cdc-micbias1-mv",
  1973. &prop_val);
  1974. if (!rc)
  1975. mb->micb1_mv = prop_val;
  1976. } else {
  1977. dev_info(dev, "%s: Micbias1 DT property not found\n",
  1978. __func__);
  1979. }
  1980. /* MB2 */
  1981. if (of_find_property(dev->of_node, "qcom,cdc-micbias2-mv",
  1982. NULL)) {
  1983. rc = wcd937x_read_of_property_u32(dev,
  1984. "qcom,cdc-micbias2-mv",
  1985. &prop_val);
  1986. if (!rc)
  1987. mb->micb2_mv = prop_val;
  1988. } else {
  1989. dev_info(dev, "%s: Micbias2 DT property not found\n",
  1990. __func__);
  1991. }
  1992. /* MB3 */
  1993. if (of_find_property(dev->of_node, "qcom,cdc-micbias3-mv",
  1994. NULL)) {
  1995. rc = wcd937x_read_of_property_u32(dev,
  1996. "qcom,cdc-micbias3-mv",
  1997. &prop_val);
  1998. if (!rc)
  1999. mb->micb3_mv = prop_val;
  2000. } else {
  2001. dev_info(dev, "%s: Micbias3 DT property not found\n",
  2002. __func__);
  2003. }
  2004. }
  2005. static int wcd937x_reset_low(struct device *dev)
  2006. {
  2007. struct wcd937x_priv *wcd937x = NULL;
  2008. int rc = 0;
  2009. if (!dev)
  2010. return -ENODEV;
  2011. wcd937x = dev_get_drvdata(dev);
  2012. if (!wcd937x)
  2013. return -EINVAL;
  2014. if (!wcd937x->rst_np) {
  2015. dev_err(dev, "%s: reset gpio device node not specified\n",
  2016. __func__);
  2017. return -EINVAL;
  2018. }
  2019. rc = msm_cdc_pinctrl_select_sleep_state(wcd937x->rst_np);
  2020. if (rc) {
  2021. dev_err(dev, "%s: wcd sleep state request fail!\n",
  2022. __func__);
  2023. return rc;
  2024. }
  2025. /* 20ms sleep required after pulling the reset gpio to LOW */
  2026. usleep_range(20, 30);
  2027. return rc;
  2028. }
  2029. struct wcd937x_pdata *wcd937x_populate_dt_data(struct device *dev)
  2030. {
  2031. struct wcd937x_pdata *pdata = NULL;
  2032. pdata = devm_kzalloc(dev, sizeof(struct wcd937x_pdata),
  2033. GFP_KERNEL);
  2034. if (!pdata)
  2035. return NULL;
  2036. pdata->rst_np = of_parse_phandle(dev->of_node,
  2037. "qcom,wcd-rst-gpio-node", 0);
  2038. if (!pdata->rst_np) {
  2039. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  2040. __func__, "qcom,wcd-rst-gpio-node",
  2041. dev->of_node->full_name);
  2042. return NULL;
  2043. }
  2044. /* Parse power supplies */
  2045. msm_cdc_get_power_supplies(dev, &pdata->regulator,
  2046. &pdata->num_supplies);
  2047. if (!pdata->regulator || (pdata->num_supplies <= 0)) {
  2048. dev_err(dev, "%s: no power supplies defined for codec\n",
  2049. __func__);
  2050. return NULL;
  2051. }
  2052. pdata->rx_slave = of_parse_phandle(dev->of_node, "qcom,rx-slave", 0);
  2053. pdata->tx_slave = of_parse_phandle(dev->of_node, "qcom,tx-slave", 0);
  2054. wcd937x_dt_parse_micbias_info(dev, &pdata->micbias);
  2055. return pdata;
  2056. }
  2057. static int wcd937x_bind(struct device *dev)
  2058. {
  2059. int ret = 0, i = 0;
  2060. struct wcd937x_priv *wcd937x = NULL;
  2061. struct wcd937x_pdata *pdata = NULL;
  2062. struct wcd_ctrl_platform_data *plat_data = NULL;
  2063. wcd937x = devm_kzalloc(dev, sizeof(struct wcd937x_priv), GFP_KERNEL);
  2064. if (!wcd937x)
  2065. return -ENOMEM;
  2066. dev_set_drvdata(dev, wcd937x);
  2067. pdata = wcd937x_populate_dt_data(dev);
  2068. if (!pdata) {
  2069. dev_err(dev, "%s: Fail to obtain platform data\n", __func__);
  2070. return -EINVAL;
  2071. }
  2072. wcd937x->dev = dev;
  2073. wcd937x->dev->platform_data = pdata;
  2074. wcd937x->rst_np = pdata->rst_np;
  2075. ret = msm_cdc_init_supplies(dev, &wcd937x->supplies,
  2076. pdata->regulator, pdata->num_supplies);
  2077. if (!wcd937x->supplies) {
  2078. dev_err(dev, "%s: Cannot init wcd supplies\n",
  2079. __func__);
  2080. return ret;
  2081. }
  2082. plat_data = dev_get_platdata(dev->parent);
  2083. if (!plat_data) {
  2084. dev_err(dev, "%s: platform data from parent is NULL\n",
  2085. __func__);
  2086. return -EINVAL;
  2087. }
  2088. wcd937x->handle = (void *)plat_data->handle;
  2089. if (!wcd937x->handle) {
  2090. dev_err(dev, "%s: handle is NULL\n", __func__);
  2091. return -EINVAL;
  2092. }
  2093. wcd937x->update_wcd_event = plat_data->update_wcd_event;
  2094. if (!wcd937x->update_wcd_event) {
  2095. dev_err(dev, "%s: update_wcd_event api is null!\n",
  2096. __func__);
  2097. return -EINVAL;
  2098. }
  2099. wcd937x->register_notifier = plat_data->register_notifier;
  2100. if (!wcd937x->register_notifier) {
  2101. dev_err(dev, "%s: register_notifier api is null!\n",
  2102. __func__);
  2103. return -EINVAL;
  2104. }
  2105. ret = msm_cdc_enable_static_supplies(dev, wcd937x->supplies,
  2106. pdata->regulator,
  2107. pdata->num_supplies);
  2108. if (ret) {
  2109. dev_err(dev, "%s: wcd static supply enable failed!\n",
  2110. __func__);
  2111. return ret;
  2112. }
  2113. wcd937x_reset(dev);
  2114. /*
  2115. * Add 5msec delay to provide sufficient time for
  2116. * soundwire auto enumeration of slave devices as
  2117. * as per HW requirement.
  2118. */
  2119. usleep_range(5000, 5010);
  2120. ret = component_bind_all(dev, wcd937x);
  2121. if (ret) {
  2122. dev_err(dev, "%s: Slave bind failed, ret = %d\n",
  2123. __func__, ret);
  2124. return ret;
  2125. }
  2126. ret = wcd937x_parse_port_mapping(dev, "qcom,rx_swr_ch_map", CODEC_RX);
  2127. ret |= wcd937x_parse_port_mapping(dev, "qcom,tx_swr_ch_map", CODEC_TX);
  2128. if (ret) {
  2129. dev_err(dev, "Failed to read port mapping\n");
  2130. goto err;
  2131. }
  2132. wcd937x->rx_swr_dev = get_matching_swr_slave_device(pdata->rx_slave);
  2133. if (!wcd937x->rx_swr_dev) {
  2134. dev_err(dev, "%s: Could not find RX swr slave device\n",
  2135. __func__);
  2136. ret = -ENODEV;
  2137. goto err;
  2138. }
  2139. wcd937x->tx_swr_dev = get_matching_swr_slave_device(pdata->tx_slave);
  2140. if (!wcd937x->tx_swr_dev) {
  2141. dev_err(dev, "%s: Could not find TX swr slave device\n",
  2142. __func__);
  2143. ret = -ENODEV;
  2144. goto err;
  2145. }
  2146. wcd937x->regmap = devm_regmap_init_swr(wcd937x->tx_swr_dev,
  2147. &wcd937x_regmap_config);
  2148. if (!wcd937x->regmap) {
  2149. dev_err(dev, "%s: Regmap init failed\n",
  2150. __func__);
  2151. goto err;
  2152. }
  2153. /* Set all interupts as edge triggered */
  2154. for (i = 0; i < wcd937x_regmap_irq_chip.num_regs; i++)
  2155. regmap_write(wcd937x->regmap,
  2156. (WCD937X_DIGITAL_INTR_LEVEL_0 + i), 0);
  2157. wcd937x_regmap_irq_chip.irq_drv_data = wcd937x;
  2158. wcd937x->irq_info.wcd_regmap_irq_chip = &wcd937x_regmap_irq_chip;
  2159. wcd937x->irq_info.codec_name = "WCD937X";
  2160. wcd937x->irq_info.regmap = wcd937x->regmap;
  2161. wcd937x->irq_info.dev = dev;
  2162. ret = wcd_irq_init(&wcd937x->irq_info, &wcd937x->virq);
  2163. if (ret) {
  2164. dev_err(dev, "%s: IRQ init failed: %d\n",
  2165. __func__, ret);
  2166. goto err;
  2167. }
  2168. wcd937x->tx_swr_dev->slave_irq = wcd937x->virq;
  2169. mutex_init(&wcd937x->micb_lock);
  2170. ret = snd_soc_register_codec(dev, &soc_codec_dev_wcd937x,
  2171. NULL, 0);
  2172. if (ret) {
  2173. dev_err(dev, "%s: Codec registration failed\n",
  2174. __func__);
  2175. goto err_irq;
  2176. }
  2177. return ret;
  2178. err_irq:
  2179. wcd_irq_exit(&wcd937x->irq_info, wcd937x->virq);
  2180. err:
  2181. component_unbind_all(dev, wcd937x);
  2182. return ret;
  2183. }
  2184. static void wcd937x_unbind(struct device *dev)
  2185. {
  2186. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  2187. wcd_irq_exit(&wcd937x->irq_info, wcd937x->virq);
  2188. snd_soc_unregister_codec(dev);
  2189. component_unbind_all(dev, wcd937x);
  2190. mutex_destroy(&wcd937x->micb_lock);
  2191. }
  2192. static const struct of_device_id wcd937x_dt_match[] = {
  2193. { .compatible = "qcom,wcd937x-codec" },
  2194. {}
  2195. };
  2196. static const struct component_master_ops wcd937x_comp_ops = {
  2197. .bind = wcd937x_bind,
  2198. .unbind = wcd937x_unbind,
  2199. };
  2200. static int wcd937x_compare_of(struct device *dev, void *data)
  2201. {
  2202. return dev->of_node == data;
  2203. }
  2204. static void wcd937x_release_of(struct device *dev, void *data)
  2205. {
  2206. of_node_put(data);
  2207. }
  2208. static int wcd937x_add_slave_components(struct device *dev,
  2209. struct component_match **matchptr)
  2210. {
  2211. struct device_node *np, *rx_node, *tx_node;
  2212. np = dev->of_node;
  2213. rx_node = of_parse_phandle(np, "qcom,rx-slave", 0);
  2214. if (!rx_node) {
  2215. dev_err(dev, "%s: Rx-slave node not defined\n", __func__);
  2216. return -ENODEV;
  2217. }
  2218. of_node_get(rx_node);
  2219. component_match_add_release(dev, matchptr,
  2220. wcd937x_release_of,
  2221. wcd937x_compare_of,
  2222. rx_node);
  2223. tx_node = of_parse_phandle(np, "qcom,tx-slave", 0);
  2224. if (!tx_node) {
  2225. dev_err(dev, "%s: Tx-slave node not defined\n", __func__);
  2226. return -ENODEV;
  2227. }
  2228. of_node_get(tx_node);
  2229. component_match_add_release(dev, matchptr,
  2230. wcd937x_release_of,
  2231. wcd937x_compare_of,
  2232. tx_node);
  2233. return 0;
  2234. }
  2235. static int wcd937x_probe(struct platform_device *pdev)
  2236. {
  2237. struct component_match *match = NULL;
  2238. int ret;
  2239. ret = wcd937x_add_slave_components(&pdev->dev, &match);
  2240. if (ret)
  2241. return ret;
  2242. return component_master_add_with_match(&pdev->dev,
  2243. &wcd937x_comp_ops, match);
  2244. }
  2245. static int wcd937x_remove(struct platform_device *pdev)
  2246. {
  2247. component_master_del(&pdev->dev, &wcd937x_comp_ops);
  2248. return 0;
  2249. }
  2250. #ifdef CONFIG_PM_SLEEP
  2251. static const struct dev_pm_ops wcd937x_dev_pm_ops = {
  2252. SET_SYSTEM_SLEEP_PM_OPS(
  2253. wcd937x_suspend,
  2254. wcd937x_resume
  2255. )
  2256. };
  2257. #endif
  2258. static struct platform_driver wcd937x_codec_driver = {
  2259. .probe = wcd937x_probe,
  2260. .remove = wcd937x_remove,
  2261. .driver = {
  2262. .name = "wcd937x_codec",
  2263. .owner = THIS_MODULE,
  2264. .of_match_table = of_match_ptr(wcd937x_dt_match),
  2265. #ifdef CONFIG_PM_SLEEP
  2266. .pm = &wcd937x_dev_pm_ops,
  2267. #endif
  2268. },
  2269. };
  2270. module_platform_driver(wcd937x_codec_driver);
  2271. MODULE_DESCRIPTION("WCD937X Codec driver");
  2272. MODULE_LICENSE("GPL v2");