aqt1000-mbhc.c 29 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
  3. */
  4. #include <linux/module.h>
  5. #include <linux/init.h>
  6. #include <linux/platform_device.h>
  7. #include <linux/device.h>
  8. #include <linux/printk.h>
  9. #include <linux/ratelimit.h>
  10. #include <linux/kernel.h>
  11. #include <linux/gpio.h>
  12. #include <linux/delay.h>
  13. #include <linux/regmap.h>
  14. #include <sound/pcm.h>
  15. #include <sound/pcm_params.h>
  16. #include <sound/soc.h>
  17. #include <sound/soc-dapm.h>
  18. #include "aqt1000.h"
  19. #include "aqt1000-api.h"
  20. #include "aqt1000-mbhc.h"
  21. #include "aqt1000-registers.h"
  22. #include "aqt1000-irq.h"
  23. #include "pdata.h"
  24. #include "../wcdcal-hwdep.h"
  25. #include "../wcd-mbhc-v2-api.h"
  26. #define AQT_ZDET_SUPPORTED true
  27. /* Z value defined in milliohm */
  28. #define AQT_ZDET_VAL_32 32000
  29. #define AQT_ZDET_VAL_400 400000
  30. #define AQT_ZDET_VAL_1200 1200000
  31. #define AQT_ZDET_VAL_100K 100000000
  32. /* Z floating defined in ohms */
  33. #define AQT_ZDET_FLOATING_IMPEDANCE 0x0FFFFFFE
  34. #define AQT_ZDET_NUM_MEASUREMENTS 900
  35. #define AQT_MBHC_GET_C1(c) ((c & 0xC000) >> 14)
  36. #define AQT_MBHC_GET_X1(x) (x & 0x3FFF)
  37. /* Z value compared in milliOhm */
  38. #define AQT_MBHC_IS_SECOND_RAMP_REQUIRED(z) ((z > 400000) || (z < 32000))
  39. #define AQT_MBHC_ZDET_CONST (86 * 16384)
  40. #define AQT_MBHC_MOISTURE_RREF R_24_KOHM
  41. static struct wcd_mbhc_register
  42. wcd_mbhc_registers[WCD_MBHC_REG_FUNC_MAX] = {
  43. WCD_MBHC_REGISTER("WCD_MBHC_L_DET_EN",
  44. AQT1000_ANA_MBHC_MECH, 0x80, 7, 0),
  45. WCD_MBHC_REGISTER("WCD_MBHC_GND_DET_EN",
  46. AQT1000_ANA_MBHC_MECH, 0x40, 6, 0),
  47. WCD_MBHC_REGISTER("WCD_MBHC_MECH_DETECTION_TYPE",
  48. AQT1000_ANA_MBHC_MECH, 0x20, 5, 0),
  49. WCD_MBHC_REGISTER("WCD_MBHC_MIC_CLAMP_CTL",
  50. AQT1000_MBHC_NEW_PLUG_DETECT_CTL, 0x30, 4, 0),
  51. WCD_MBHC_REGISTER("WCD_MBHC_ELECT_DETECTION_TYPE",
  52. AQT1000_ANA_MBHC_ELECT, 0x08, 3, 0),
  53. WCD_MBHC_REGISTER("WCD_MBHC_HS_L_DET_PULL_UP_CTRL",
  54. AQT1000_MBHC_NEW_INT_MECH_DET_CURRENT, 0x1F, 0, 0),
  55. WCD_MBHC_REGISTER("WCD_MBHC_HS_L_DET_PULL_UP_COMP_CTRL",
  56. AQT1000_ANA_MBHC_MECH, 0x04, 2, 0),
  57. WCD_MBHC_REGISTER("WCD_MBHC_HPHL_PLUG_TYPE",
  58. AQT1000_ANA_MBHC_MECH, 0x10, 4, 0),
  59. WCD_MBHC_REGISTER("WCD_MBHC_GND_PLUG_TYPE",
  60. AQT1000_ANA_MBHC_MECH, 0x08, 3, 0),
  61. WCD_MBHC_REGISTER("WCD_MBHC_SW_HPH_LP_100K_TO_GND",
  62. AQT1000_ANA_MBHC_MECH, 0x01, 0, 0),
  63. WCD_MBHC_REGISTER("WCD_MBHC_ELECT_SCHMT_ISRC",
  64. AQT1000_ANA_MBHC_ELECT, 0x06, 1, 0),
  65. WCD_MBHC_REGISTER("WCD_MBHC_FSM_EN",
  66. AQT1000_ANA_MBHC_ELECT, 0x80, 7, 0),
  67. WCD_MBHC_REGISTER("WCD_MBHC_INSREM_DBNC",
  68. AQT1000_MBHC_NEW_PLUG_DETECT_CTL, 0x0F, 0, 0),
  69. WCD_MBHC_REGISTER("WCD_MBHC_BTN_DBNC",
  70. AQT1000_MBHC_NEW_CTL_1, 0x03, 0, 0),
  71. WCD_MBHC_REGISTER("WCD_MBHC_HS_VREF",
  72. AQT1000_MBHC_NEW_CTL_2, 0x03, 0, 0),
  73. WCD_MBHC_REGISTER("WCD_MBHC_HS_COMP_RESULT",
  74. AQT1000_ANA_MBHC_RESULT_3, 0x08, 3, 0),
  75. WCD_MBHC_REGISTER("WCD_MBHC_MIC_SCHMT_RESULT",
  76. AQT1000_ANA_MBHC_RESULT_3, 0x20, 5, 0),
  77. WCD_MBHC_REGISTER("WCD_MBHC_HPHL_SCHMT_RESULT",
  78. AQT1000_ANA_MBHC_RESULT_3, 0x80, 7, 0),
  79. WCD_MBHC_REGISTER("WCD_MBHC_HPHR_SCHMT_RESULT",
  80. AQT1000_ANA_MBHC_RESULT_3, 0x40, 6, 0),
  81. WCD_MBHC_REGISTER("WCD_MBHC_OCP_FSM_EN",
  82. AQT1000_HPH_OCP_CTL, 0x10, 4, 0),
  83. WCD_MBHC_REGISTER("WCD_MBHC_BTN_RESULT",
  84. AQT1000_ANA_MBHC_RESULT_3, 0x07, 0, 0),
  85. WCD_MBHC_REGISTER("WCD_MBHC_BTN_ISRC_CTL",
  86. AQT1000_ANA_MBHC_ELECT, 0x70, 4, 0),
  87. WCD_MBHC_REGISTER("WCD_MBHC_ELECT_RESULT",
  88. AQT1000_ANA_MBHC_RESULT_3, 0xFF, 0, 0),
  89. WCD_MBHC_REGISTER("WCD_MBHC_MICB_CTRL",
  90. AQT1000_ANA_MICB1, 0xC0, 6, 0),
  91. WCD_MBHC_REGISTER("WCD_MBHC_HPH_CNP_WG_TIME",
  92. AQT1000_HPH_CNP_WG_TIME, 0xFF, 0, 0),
  93. WCD_MBHC_REGISTER("WCD_MBHC_HPHR_PA_EN",
  94. AQT1000_ANA_HPH, 0x40, 6, 0),
  95. WCD_MBHC_REGISTER("WCD_MBHC_HPHL_PA_EN",
  96. AQT1000_ANA_HPH, 0x80, 7, 0),
  97. WCD_MBHC_REGISTER("WCD_MBHC_HPH_PA_EN",
  98. AQT1000_ANA_HPH, 0xC0, 6, 0),
  99. WCD_MBHC_REGISTER("WCD_MBHC_SWCH_LEVEL_REMOVE",
  100. AQT1000_ANA_MBHC_RESULT_3, 0x10, 4, 0),
  101. WCD_MBHC_REGISTER("WCD_MBHC_PULLDOWN_CTRL",
  102. 0, 0, 0, 0),
  103. WCD_MBHC_REGISTER("WCD_MBHC_ANC_DET_EN",
  104. AQT1000_MBHC_CTL_BCS, 0x02, 1, 0),
  105. WCD_MBHC_REGISTER("WCD_MBHC_FSM_STATUS",
  106. AQT1000_MBHC_NEW_FSM_STATUS, 0x01, 0, 0),
  107. WCD_MBHC_REGISTER("WCD_MBHC_MUX_CTL",
  108. AQT1000_MBHC_NEW_CTL_2, 0x70, 4, 0),
  109. WCD_MBHC_REGISTER("WCD_MBHC_HPHL_OCP_DET_EN",
  110. AQT1000_HPH_L_TEST, 0x01, 0, 0),
  111. WCD_MBHC_REGISTER("WCD_MBHC_HPHR_OCP_DET_EN",
  112. AQT1000_HPH_R_TEST, 0x01, 0, 0),
  113. WCD_MBHC_REGISTER("WCD_MBHC_HPHL_OCP_STATUS",
  114. AQT1000_INTR_CTRL_INT_STATUS_2, 0x20, 5, 0),
  115. WCD_MBHC_REGISTER("WCD_MBHC_HPHR_OCP_STATUS",
  116. AQT1000_INTR_CTRL_INT_STATUS_2, 0x40, 6, 0),
  117. WCD_MBHC_REGISTER("WCD_MBHC_ADC_EN",
  118. AQT1000_MBHC_NEW_CTL_1, 0x08, 3, 0),
  119. WCD_MBHC_REGISTER("WCD_MBHC_ADC_COMPLETE", AQT1000_MBHC_NEW_FSM_STATUS,
  120. 0x40, 6, 0),
  121. WCD_MBHC_REGISTER("WCD_MBHC_ADC_TIMEOUT", AQT1000_MBHC_NEW_FSM_STATUS,
  122. 0x80, 7, 0),
  123. WCD_MBHC_REGISTER("WCD_MBHC_ADC_RESULT", AQT1000_MBHC_NEW_ADC_RESULT,
  124. 0xFF, 0, 0),
  125. WCD_MBHC_REGISTER("WCD_MBHC_MICB2_VOUT", AQT1000_ANA_MICB1, 0x3F, 0, 0),
  126. WCD_MBHC_REGISTER("WCD_MBHC_ADC_MODE",
  127. AQT1000_MBHC_NEW_CTL_1, 0x10, 4, 0),
  128. WCD_MBHC_REGISTER("WCD_MBHC_DETECTION_DONE",
  129. AQT1000_MBHC_NEW_CTL_1, 0x04, 2, 0),
  130. WCD_MBHC_REGISTER("WCD_MBHC_ELECT_ISRC_EN",
  131. AQT1000_ANA_MBHC_ZDET, 0x02, 1, 0),
  132. };
  133. static const struct wcd_mbhc_intr intr_ids = {
  134. .mbhc_sw_intr = AQT1000_IRQ_MBHC_SW_DET,
  135. .mbhc_btn_press_intr = AQT1000_IRQ_MBHC_BUTTON_PRESS_DET,
  136. .mbhc_btn_release_intr = AQT1000_IRQ_MBHC_BUTTON_RELEASE_DET,
  137. .mbhc_hs_ins_intr = AQT1000_IRQ_MBHC_ELECT_INS_REM_LEG_DET,
  138. .mbhc_hs_rem_intr = AQT1000_IRQ_MBHC_ELECT_INS_REM_DET,
  139. .hph_left_ocp = AQT1000_IRQ_HPH_PA_OCPL_FAULT,
  140. .hph_right_ocp = AQT1000_IRQ_HPH_PA_OCPR_FAULT,
  141. };
  142. struct aqt_mbhc_zdet_param {
  143. u16 ldo_ctl;
  144. u16 noff;
  145. u16 nshift;
  146. u16 btn5;
  147. u16 btn6;
  148. u16 btn7;
  149. };
  150. static int aqt_mbhc_request_irq(struct snd_soc_codec *codec,
  151. int irq, irq_handler_t handler,
  152. const char *name, void *data)
  153. {
  154. struct aqt1000 *aqt = dev_get_drvdata(codec->dev);
  155. return aqt_request_irq(aqt, irq, name, handler, data);
  156. }
  157. static void aqt_mbhc_irq_control(struct snd_soc_codec *codec,
  158. int irq, bool enable)
  159. {
  160. struct aqt1000 *aqt = dev_get_drvdata(codec->dev);
  161. if (enable)
  162. aqt_enable_irq(aqt, irq);
  163. else
  164. aqt_disable_irq(aqt, irq);
  165. }
  166. static int aqt_mbhc_free_irq(struct snd_soc_codec *codec,
  167. int irq, void *data)
  168. {
  169. struct aqt1000 *aqt = dev_get_drvdata(codec->dev);
  170. aqt_free_irq(aqt, irq, data);
  171. return 0;
  172. }
  173. static void aqt_mbhc_clk_setup(struct snd_soc_codec *codec,
  174. bool enable)
  175. {
  176. if (enable)
  177. snd_soc_update_bits(codec, AQT1000_MBHC_NEW_CTL_1,
  178. 0x80, 0x80);
  179. else
  180. snd_soc_update_bits(codec, AQT1000_MBHC_NEW_CTL_1,
  181. 0x80, 0x00);
  182. }
  183. static int aqt_mbhc_btn_to_num(struct snd_soc_codec *codec)
  184. {
  185. return snd_soc_read(codec, AQT1000_ANA_MBHC_RESULT_3) & 0x7;
  186. }
  187. static void aqt_mbhc_mbhc_bias_control(struct snd_soc_codec *codec,
  188. bool enable)
  189. {
  190. if (enable)
  191. snd_soc_update_bits(codec, AQT1000_ANA_MBHC_ELECT,
  192. 0x01, 0x01);
  193. else
  194. snd_soc_update_bits(codec, AQT1000_ANA_MBHC_ELECT,
  195. 0x01, 0x00);
  196. }
  197. static void aqt_mbhc_program_btn_thr(struct snd_soc_codec *codec,
  198. s16 *btn_low, s16 *btn_high,
  199. int num_btn, bool is_micbias)
  200. {
  201. int i;
  202. int vth;
  203. if (num_btn > WCD_MBHC_DEF_BUTTONS) {
  204. dev_err(codec->dev, "%s: invalid number of buttons: %d\n",
  205. __func__, num_btn);
  206. return;
  207. }
  208. for (i = 0; i < num_btn; i++) {
  209. vth = ((btn_high[i] * 2) / 25) & 0x3F;
  210. snd_soc_update_bits(codec, AQT1000_ANA_MBHC_BTN0 + i,
  211. 0xFC, vth << 2);
  212. dev_dbg(codec->dev, "%s: btn_high[%d]: %d, vth: %d\n",
  213. __func__, i, btn_high[i], vth);
  214. }
  215. }
  216. static bool aqt_mbhc_lock_sleep(struct wcd_mbhc *mbhc, bool lock)
  217. {
  218. struct snd_soc_codec *codec = mbhc->codec;
  219. struct aqt1000 *aqt = dev_get_drvdata(codec->dev);
  220. bool ret = 0;
  221. dev_dbg(aqt->dev, "%s: lock: %d\n", __func__, lock);
  222. return ret;
  223. }
  224. static int aqt_mbhc_register_notifier(struct wcd_mbhc *mbhc,
  225. struct notifier_block *nblock,
  226. bool enable)
  227. {
  228. struct aqt1000_mbhc *aqt_mbhc;
  229. aqt_mbhc = container_of(mbhc, struct aqt1000_mbhc, wcd_mbhc);
  230. if (enable)
  231. return blocking_notifier_chain_register(&aqt_mbhc->notifier,
  232. nblock);
  233. else
  234. return blocking_notifier_chain_unregister(
  235. &aqt_mbhc->notifier, nblock);
  236. }
  237. static bool aqt_mbhc_micb_en_status(struct wcd_mbhc *mbhc, int micb_num)
  238. {
  239. u8 val;
  240. if (micb_num == MIC_BIAS_1) {
  241. val = ((snd_soc_read(mbhc->codec, AQT1000_ANA_MICB1) & 0xC0)
  242. >> 6);
  243. if (val == 0x01)
  244. return true;
  245. }
  246. return false;
  247. }
  248. static bool aqt_mbhc_hph_pa_on_status(struct snd_soc_codec *codec)
  249. {
  250. return (snd_soc_read(codec, AQT1000_ANA_HPH) & 0xC0) ? true : false;
  251. }
  252. static void aqt_mbhc_hph_l_pull_up_control(struct snd_soc_codec *codec,
  253. int pull_up_cur)
  254. {
  255. /* Default pull up current to 2uA */
  256. if (pull_up_cur > HS_PULLUP_I_OFF || pull_up_cur < HS_PULLUP_I_3P0_UA ||
  257. pull_up_cur == HS_PULLUP_I_DEFAULT)
  258. pull_up_cur = HS_PULLUP_I_2P0_UA;
  259. dev_dbg(codec->dev, "%s: HS pull up current:%d\n",
  260. __func__, pull_up_cur);
  261. snd_soc_update_bits(codec, AQT1000_MBHC_NEW_INT_MECH_DET_CURRENT,
  262. 0x1F, pull_up_cur);
  263. }
  264. static int aqt_mbhc_request_micbias(struct snd_soc_codec *codec,
  265. int micb_num, int req)
  266. {
  267. int ret = 0;
  268. /*
  269. * If micbias is requested, make sure that there
  270. * is vote to enable mclk
  271. */
  272. if (req == MICB_ENABLE)
  273. aqt_cdc_mclk_enable(codec, true);
  274. ret = aqt_micbias_control(codec, micb_num, req, false);
  275. /*
  276. * Release vote for mclk while requesting for
  277. * micbias disable
  278. */
  279. if (req == MICB_DISABLE)
  280. aqt_cdc_mclk_enable(codec, false);
  281. return ret;
  282. }
  283. static void aqt_mbhc_micb_ramp_control(struct snd_soc_codec *codec,
  284. bool enable)
  285. {
  286. if (enable) {
  287. snd_soc_update_bits(codec, AQT1000_ANA_MICB1_RAMP,
  288. 0x1C, 0x0C);
  289. snd_soc_update_bits(codec, AQT1000_ANA_MICB1_RAMP,
  290. 0x80, 0x80);
  291. } else {
  292. snd_soc_update_bits(codec, AQT1000_ANA_MICB1_RAMP,
  293. 0x80, 0x00);
  294. snd_soc_update_bits(codec, AQT1000_ANA_MICB1_RAMP,
  295. 0x1C, 0x00);
  296. }
  297. }
  298. static struct firmware_cal *aqt_get_hwdep_fw_cal(struct wcd_mbhc *mbhc,
  299. enum wcd_cal_type type)
  300. {
  301. struct aqt1000_mbhc *aqt_mbhc;
  302. struct firmware_cal *hwdep_cal;
  303. struct snd_soc_codec *codec = mbhc->codec;
  304. aqt_mbhc = container_of(mbhc, struct aqt1000_mbhc, wcd_mbhc);
  305. if (!codec) {
  306. pr_err("%s: NULL codec pointer\n", __func__);
  307. return NULL;
  308. }
  309. hwdep_cal = wcdcal_get_fw_cal(aqt_mbhc->fw_data, type);
  310. if (!hwdep_cal)
  311. dev_err(codec->dev, "%s: cal not sent by %d\n",
  312. __func__, type);
  313. return hwdep_cal;
  314. }
  315. static int aqt_mbhc_micb_ctrl_threshold_mic(struct snd_soc_codec *codec,
  316. int micb_num, bool req_en)
  317. {
  318. struct aqt1000_pdata *pdata = dev_get_platdata(codec->dev);
  319. int rc, micb_mv;
  320. if (micb_num != MIC_BIAS_1)
  321. return -EINVAL;
  322. /*
  323. * If device tree micbias level is already above the minimum
  324. * voltage needed to detect threshold microphone, then do
  325. * not change the micbias, just return.
  326. */
  327. if (pdata->micbias.micb1_mv >= WCD_MBHC_THR_HS_MICB_MV)
  328. return 0;
  329. micb_mv = req_en ? WCD_MBHC_THR_HS_MICB_MV : pdata->micbias.micb1_mv;
  330. rc = aqt_mbhc_micb_adjust_voltage(codec, micb_mv, MIC_BIAS_1);
  331. return rc;
  332. }
  333. static inline void aqt_mbhc_get_result_params(struct aqt1000 *aqt,
  334. s16 *d1_a, u16 noff,
  335. int32_t *zdet)
  336. {
  337. int i;
  338. int val, val1;
  339. s16 c1;
  340. s32 x1, d1;
  341. int32_t denom;
  342. int minCode_param[] = {
  343. 3277, 1639, 820, 410, 205, 103, 52, 26
  344. };
  345. regmap_update_bits(aqt->regmap, AQT1000_ANA_MBHC_ZDET, 0x20, 0x20);
  346. for (i = 0; i < AQT_ZDET_NUM_MEASUREMENTS; i++) {
  347. regmap_read(aqt->regmap, AQT1000_ANA_MBHC_RESULT_2, &val);
  348. if (val & 0x80)
  349. break;
  350. }
  351. val = val << 0x8;
  352. regmap_read(aqt->regmap, AQT1000_ANA_MBHC_RESULT_1, &val1);
  353. val |= val1;
  354. regmap_update_bits(aqt->regmap, AQT1000_ANA_MBHC_ZDET, 0x20, 0x00);
  355. x1 = AQT_MBHC_GET_X1(val);
  356. c1 = AQT_MBHC_GET_C1(val);
  357. /* If ramp is not complete, give additional 5ms */
  358. if ((c1 < 2) && x1)
  359. usleep_range(5000, 5050);
  360. if (!c1 || !x1) {
  361. dev_dbg(aqt->dev,
  362. "%s: Impedance detect ramp error, c1=%d, x1=0x%x\n",
  363. __func__, c1, x1);
  364. goto ramp_down;
  365. }
  366. d1 = d1_a[c1];
  367. denom = (x1 * d1) - (1 << (14 - noff));
  368. if (denom > 0)
  369. *zdet = (AQT_MBHC_ZDET_CONST * 1000) / denom;
  370. else if (x1 < minCode_param[noff])
  371. *zdet = AQT_ZDET_FLOATING_IMPEDANCE;
  372. dev_dbg(aqt->dev, "%s: d1=%d, c1=%d, x1=0x%x, z_val=%d(milliOhm)\n",
  373. __func__, d1, c1, x1, *zdet);
  374. ramp_down:
  375. i = 0;
  376. while (x1) {
  377. regmap_bulk_read(aqt->regmap,
  378. AQT1000_ANA_MBHC_RESULT_1, (u8 *)&val, 2);
  379. x1 = AQT_MBHC_GET_X1(val);
  380. i++;
  381. if (i == AQT_ZDET_NUM_MEASUREMENTS)
  382. break;
  383. }
  384. }
  385. static void aqt_mbhc_zdet_ramp(struct snd_soc_codec *codec,
  386. struct aqt_mbhc_zdet_param *zdet_param,
  387. int32_t *zl, int32_t *zr, s16 *d1_a)
  388. {
  389. struct aqt1000 *aqt = dev_get_drvdata(codec->dev);
  390. int32_t zdet = 0;
  391. snd_soc_update_bits(codec, AQT1000_MBHC_NEW_ZDET_ANA_CTL, 0x70,
  392. zdet_param->ldo_ctl << 4);
  393. snd_soc_update_bits(codec, AQT1000_ANA_MBHC_BTN5, 0xFC,
  394. zdet_param->btn5);
  395. snd_soc_update_bits(codec, AQT1000_ANA_MBHC_BTN6, 0xFC,
  396. zdet_param->btn6);
  397. snd_soc_update_bits(codec, AQT1000_ANA_MBHC_BTN7, 0xFC,
  398. zdet_param->btn7);
  399. snd_soc_update_bits(codec, AQT1000_MBHC_NEW_ZDET_ANA_CTL, 0x0F,
  400. zdet_param->noff);
  401. snd_soc_update_bits(codec, AQT1000_MBHC_NEW_ZDET_RAMP_CTL, 0x0F,
  402. zdet_param->nshift);
  403. if (!zl)
  404. goto z_right;
  405. /* Start impedance measurement for HPH_L */
  406. regmap_update_bits(aqt->regmap,
  407. AQT1000_ANA_MBHC_ZDET, 0x80, 0x80);
  408. dev_dbg(aqt->dev, "%s: ramp for HPH_L, noff = %d\n",
  409. __func__, zdet_param->noff);
  410. aqt_mbhc_get_result_params(aqt, d1_a, zdet_param->noff, &zdet);
  411. regmap_update_bits(aqt->regmap,
  412. AQT1000_ANA_MBHC_ZDET, 0x80, 0x00);
  413. *zl = zdet;
  414. z_right:
  415. if (!zr)
  416. return;
  417. /* Start impedance measurement for HPH_R */
  418. regmap_update_bits(aqt->regmap,
  419. AQT1000_ANA_MBHC_ZDET, 0x40, 0x40);
  420. dev_dbg(aqt->dev, "%s: ramp for HPH_R, noff = %d\n",
  421. __func__, zdet_param->noff);
  422. aqt_mbhc_get_result_params(aqt, d1_a, zdet_param->noff, &zdet);
  423. regmap_update_bits(aqt->regmap,
  424. AQT1000_ANA_MBHC_ZDET, 0x40, 0x00);
  425. *zr = zdet;
  426. }
  427. static inline void aqt_wcd_mbhc_qfuse_cal(struct snd_soc_codec *codec,
  428. int32_t *z_val, int flag_l_r)
  429. {
  430. s16 q1;
  431. int q1_cal;
  432. if (*z_val < (AQT_ZDET_VAL_400/1000))
  433. q1 = snd_soc_read(codec,
  434. AQT1000_CHIP_CFG0_EFUSE_VAL_OUT1 + (2 * flag_l_r));
  435. else
  436. q1 = snd_soc_read(codec,
  437. AQT1000_CHIP_CFG0_EFUSE_VAL_OUT2 + (2 * flag_l_r));
  438. if (q1 & 0x80)
  439. q1_cal = (10000 - ((q1 & 0x7F) * 25));
  440. else
  441. q1_cal = (10000 + (q1 * 25));
  442. if (q1_cal > 0)
  443. *z_val = ((*z_val) * 10000) / q1_cal;
  444. }
  445. static void aqt_wcd_mbhc_calc_impedance(struct wcd_mbhc *mbhc, uint32_t *zl,
  446. uint32_t *zr)
  447. {
  448. struct snd_soc_codec *codec = mbhc->codec;
  449. struct aqt1000 *aqt = dev_get_drvdata(codec->dev);
  450. s16 reg0, reg1, reg2, reg3, reg4;
  451. int32_t z1L, z1R, z1Ls;
  452. int zMono, z_diff1, z_diff2;
  453. bool is_fsm_disable = false;
  454. struct aqt_mbhc_zdet_param zdet_param[] = {
  455. {4, 0, 4, 0x08, 0x14, 0x18}, /* < 32ohm */
  456. {2, 0, 3, 0x18, 0x7C, 0x90}, /* 32ohm < Z < 400ohm */
  457. {1, 4, 5, 0x18, 0x7C, 0x90}, /* 400ohm < Z < 1200ohm */
  458. {1, 6, 7, 0x18, 0x7C, 0x90}, /* >1200ohm */
  459. };
  460. struct aqt_mbhc_zdet_param *zdet_param_ptr = NULL;
  461. s16 d1_a[][4] = {
  462. {0, 30, 90, 30},
  463. {0, 30, 30, 5},
  464. {0, 30, 30, 5},
  465. {0, 30, 30, 5},
  466. };
  467. s16 *d1 = NULL;
  468. WCD_MBHC_RSC_ASSERT_LOCKED(mbhc);
  469. reg0 = snd_soc_read(codec, AQT1000_ANA_MBHC_BTN5);
  470. reg1 = snd_soc_read(codec, AQT1000_ANA_MBHC_BTN6);
  471. reg2 = snd_soc_read(codec, AQT1000_ANA_MBHC_BTN7);
  472. reg3 = snd_soc_read(codec, AQT1000_MBHC_CTL_CLK);
  473. reg4 = snd_soc_read(codec, AQT1000_MBHC_NEW_ZDET_ANA_CTL);
  474. if (snd_soc_read(codec, AQT1000_ANA_MBHC_ELECT) & 0x80) {
  475. is_fsm_disable = true;
  476. regmap_update_bits(aqt->regmap,
  477. AQT1000_ANA_MBHC_ELECT, 0x80, 0x00);
  478. }
  479. /* For NO-jack, disable L_DET_EN before Z-det measurements */
  480. if (mbhc->hphl_swh)
  481. regmap_update_bits(aqt->regmap,
  482. AQT1000_ANA_MBHC_MECH, 0x80, 0x00);
  483. /* Turn off 100k pull down on HPHL */
  484. regmap_update_bits(aqt->regmap,
  485. AQT1000_ANA_MBHC_MECH, 0x01, 0x00);
  486. /* First get impedance on Left */
  487. d1 = d1_a[1];
  488. zdet_param_ptr = &zdet_param[1];
  489. aqt_mbhc_zdet_ramp(codec, zdet_param_ptr, &z1L, NULL, d1);
  490. if (!AQT_MBHC_IS_SECOND_RAMP_REQUIRED(z1L))
  491. goto left_ch_impedance;
  492. /* Second ramp for left ch */
  493. if (z1L < AQT_ZDET_VAL_32) {
  494. zdet_param_ptr = &zdet_param[0];
  495. d1 = d1_a[0];
  496. } else if ((z1L > AQT_ZDET_VAL_400) && (z1L <= AQT_ZDET_VAL_1200)) {
  497. zdet_param_ptr = &zdet_param[2];
  498. d1 = d1_a[2];
  499. } else if (z1L > AQT_ZDET_VAL_1200) {
  500. zdet_param_ptr = &zdet_param[3];
  501. d1 = d1_a[3];
  502. }
  503. aqt_mbhc_zdet_ramp(codec, zdet_param_ptr, &z1L, NULL, d1);
  504. left_ch_impedance:
  505. if ((z1L == AQT_ZDET_FLOATING_IMPEDANCE) ||
  506. (z1L > AQT_ZDET_VAL_100K)) {
  507. *zl = AQT_ZDET_FLOATING_IMPEDANCE;
  508. zdet_param_ptr = &zdet_param[1];
  509. d1 = d1_a[1];
  510. } else {
  511. *zl = z1L/1000;
  512. aqt_wcd_mbhc_qfuse_cal(codec, zl, 0);
  513. }
  514. dev_dbg(codec->dev, "%s: impedance on HPH_L = %d(ohms)\n",
  515. __func__, *zl);
  516. /* Start of right impedance ramp and calculation */
  517. aqt_mbhc_zdet_ramp(codec, zdet_param_ptr, NULL, &z1R, d1);
  518. if (AQT_MBHC_IS_SECOND_RAMP_REQUIRED(z1R)) {
  519. if (((z1R > AQT_ZDET_VAL_1200) &&
  520. (zdet_param_ptr->noff == 0x6)) ||
  521. ((*zl) != AQT_ZDET_FLOATING_IMPEDANCE))
  522. goto right_ch_impedance;
  523. /* Second ramp for right ch */
  524. if (z1R < AQT_ZDET_VAL_32) {
  525. zdet_param_ptr = &zdet_param[0];
  526. d1 = d1_a[0];
  527. } else if ((z1R > AQT_ZDET_VAL_400) &&
  528. (z1R <= AQT_ZDET_VAL_1200)) {
  529. zdet_param_ptr = &zdet_param[2];
  530. d1 = d1_a[2];
  531. } else if (z1R > AQT_ZDET_VAL_1200) {
  532. zdet_param_ptr = &zdet_param[3];
  533. d1 = d1_a[3];
  534. }
  535. aqt_mbhc_zdet_ramp(codec, zdet_param_ptr, NULL, &z1R, d1);
  536. }
  537. right_ch_impedance:
  538. if ((z1R == AQT_ZDET_FLOATING_IMPEDANCE) ||
  539. (z1R > AQT_ZDET_VAL_100K)) {
  540. *zr = AQT_ZDET_FLOATING_IMPEDANCE;
  541. } else {
  542. *zr = z1R/1000;
  543. aqt_wcd_mbhc_qfuse_cal(codec, zr, 1);
  544. }
  545. dev_dbg(codec->dev, "%s: impedance on HPH_R = %d(ohms)\n",
  546. __func__, *zr);
  547. /* Mono/stereo detection */
  548. if ((*zl == AQT_ZDET_FLOATING_IMPEDANCE) &&
  549. (*zr == AQT_ZDET_FLOATING_IMPEDANCE)) {
  550. dev_dbg(codec->dev,
  551. "%s: plug type is invalid or extension cable\n",
  552. __func__);
  553. goto zdet_complete;
  554. }
  555. if ((*zl == AQT_ZDET_FLOATING_IMPEDANCE) ||
  556. (*zr == AQT_ZDET_FLOATING_IMPEDANCE) ||
  557. ((*zl < WCD_MONO_HS_MIN_THR) && (*zr > WCD_MONO_HS_MIN_THR)) ||
  558. ((*zl > WCD_MONO_HS_MIN_THR) && (*zr < WCD_MONO_HS_MIN_THR))) {
  559. dev_dbg(codec->dev,
  560. "%s: Mono plug type with one ch floating or shorted to GND\n",
  561. __func__);
  562. mbhc->hph_type = WCD_MBHC_HPH_MONO;
  563. goto zdet_complete;
  564. }
  565. snd_soc_update_bits(codec, AQT1000_HPH_R_ATEST, 0x02, 0x02);
  566. snd_soc_update_bits(codec, AQT1000_HPH_PA_CTL2, 0x40, 0x01);
  567. if (*zl < (AQT_ZDET_VAL_32/1000))
  568. aqt_mbhc_zdet_ramp(codec, &zdet_param[0], &z1Ls, NULL, d1);
  569. else
  570. aqt_mbhc_zdet_ramp(codec, &zdet_param[1], &z1Ls, NULL, d1);
  571. snd_soc_update_bits(codec, AQT1000_HPH_PA_CTL2, 0x40, 0x00);
  572. snd_soc_update_bits(codec, AQT1000_HPH_R_ATEST, 0x02, 0x00);
  573. z1Ls /= 1000;
  574. aqt_wcd_mbhc_qfuse_cal(codec, &z1Ls, 0);
  575. /* Parallel of left Z and 9 ohm pull down resistor */
  576. zMono = ((*zl) * 9) / ((*zl) + 9);
  577. z_diff1 = (z1Ls > zMono) ? (z1Ls - zMono) : (zMono - z1Ls);
  578. z_diff2 = ((*zl) > z1Ls) ? ((*zl) - z1Ls) : (z1Ls - (*zl));
  579. if ((z_diff1 * (*zl + z1Ls)) > (z_diff2 * (z1Ls + zMono))) {
  580. dev_dbg(codec->dev, "%s: stereo plug type detected\n",
  581. __func__);
  582. mbhc->hph_type = WCD_MBHC_HPH_STEREO;
  583. } else {
  584. dev_dbg(codec->dev, "%s: MONO plug type detected\n",
  585. __func__);
  586. mbhc->hph_type = WCD_MBHC_HPH_MONO;
  587. }
  588. zdet_complete:
  589. snd_soc_write(codec, AQT1000_ANA_MBHC_BTN5, reg0);
  590. snd_soc_write(codec, AQT1000_ANA_MBHC_BTN6, reg1);
  591. snd_soc_write(codec, AQT1000_ANA_MBHC_BTN7, reg2);
  592. /* Turn on 100k pull down on HPHL */
  593. regmap_update_bits(aqt->regmap,
  594. AQT1000_ANA_MBHC_MECH, 0x01, 0x01);
  595. /* For NO-jack, re-enable L_DET_EN after Z-det measurements */
  596. if (mbhc->hphl_swh)
  597. regmap_update_bits(aqt->regmap,
  598. AQT1000_ANA_MBHC_MECH, 0x80, 0x80);
  599. snd_soc_write(codec, AQT1000_MBHC_NEW_ZDET_ANA_CTL, reg4);
  600. snd_soc_write(codec, AQT1000_MBHC_CTL_CLK, reg3);
  601. if (is_fsm_disable)
  602. regmap_update_bits(aqt->regmap,
  603. AQT1000_ANA_MBHC_ELECT, 0x80, 0x80);
  604. }
  605. static void aqt_mbhc_gnd_det_ctrl(struct snd_soc_codec *codec, bool enable)
  606. {
  607. if (enable) {
  608. snd_soc_update_bits(codec, AQT1000_ANA_MBHC_MECH,
  609. 0x02, 0x02);
  610. snd_soc_update_bits(codec, AQT1000_ANA_MBHC_MECH,
  611. 0x40, 0x40);
  612. } else {
  613. snd_soc_update_bits(codec, AQT1000_ANA_MBHC_MECH,
  614. 0x40, 0x00);
  615. snd_soc_update_bits(codec, AQT1000_ANA_MBHC_MECH,
  616. 0x02, 0x00);
  617. }
  618. }
  619. static void aqt_mbhc_hph_pull_down_ctrl(struct snd_soc_codec *codec,
  620. bool enable)
  621. {
  622. if (enable) {
  623. snd_soc_update_bits(codec, AQT1000_HPH_PA_CTL2,
  624. 0x40, 0x40);
  625. snd_soc_update_bits(codec, AQT1000_HPH_PA_CTL2,
  626. 0x10, 0x10);
  627. } else {
  628. snd_soc_update_bits(codec, AQT1000_HPH_PA_CTL2,
  629. 0x40, 0x00);
  630. snd_soc_update_bits(codec, AQT1000_HPH_PA_CTL2,
  631. 0x10, 0x00);
  632. }
  633. }
  634. static void aqt_mbhc_moisture_config(struct wcd_mbhc *mbhc)
  635. {
  636. struct snd_soc_codec *codec = mbhc->codec;
  637. if ((mbhc->moist_rref == R_OFF) ||
  638. (mbhc->mbhc_cfg->enable_usbc_analog)) {
  639. snd_soc_update_bits(codec, AQT1000_MBHC_NEW_CTL_2,
  640. 0x0C, R_OFF << 2);
  641. return;
  642. }
  643. /* Do not enable moisture detection if jack type is NC */
  644. if (!mbhc->hphl_swh) {
  645. dev_dbg(codec->dev, "%s: disable moisture detection for NC\n",
  646. __func__);
  647. snd_soc_update_bits(codec, AQT1000_MBHC_NEW_CTL_2,
  648. 0x0C, R_OFF << 2);
  649. return;
  650. }
  651. snd_soc_update_bits(codec, AQT1000_MBHC_NEW_CTL_2,
  652. 0x0C, mbhc->moist_rref << 2);
  653. }
  654. static void aqt_update_anc_state(struct snd_soc_codec *codec, bool enable,
  655. int anc_num)
  656. {
  657. if (enable)
  658. snd_soc_update_bits(codec, AQT1000_CDC_RX1_RX_PATH_CFG0 +
  659. (20 * anc_num), 0x10, 0x10);
  660. else
  661. snd_soc_update_bits(codec, AQT1000_CDC_RX1_RX_PATH_CFG0 +
  662. (20 * anc_num), 0x10, 0x00);
  663. }
  664. static bool aqt_is_anc_on(struct wcd_mbhc *mbhc)
  665. {
  666. bool anc_on = false;
  667. u16 ancl, ancr;
  668. ancl =
  669. (snd_soc_read(mbhc->codec, AQT1000_CDC_RX1_RX_PATH_CFG0)) & 0x10;
  670. ancr =
  671. (snd_soc_read(mbhc->codec, AQT1000_CDC_RX2_RX_PATH_CFG0)) & 0x10;
  672. anc_on = !!(ancl | ancr);
  673. return anc_on;
  674. }
  675. static const struct wcd_mbhc_cb mbhc_cb = {
  676. .request_irq = aqt_mbhc_request_irq,
  677. .irq_control = aqt_mbhc_irq_control,
  678. .free_irq = aqt_mbhc_free_irq,
  679. .clk_setup = aqt_mbhc_clk_setup,
  680. .map_btn_code_to_num = aqt_mbhc_btn_to_num,
  681. .mbhc_bias = aqt_mbhc_mbhc_bias_control,
  682. .set_btn_thr = aqt_mbhc_program_btn_thr,
  683. .lock_sleep = aqt_mbhc_lock_sleep,
  684. .register_notifier = aqt_mbhc_register_notifier,
  685. .micbias_enable_status = aqt_mbhc_micb_en_status,
  686. .hph_pa_on_status = aqt_mbhc_hph_pa_on_status,
  687. .hph_pull_up_control_v2 = aqt_mbhc_hph_l_pull_up_control,
  688. .mbhc_micbias_control = aqt_mbhc_request_micbias,
  689. .mbhc_micb_ramp_control = aqt_mbhc_micb_ramp_control,
  690. .get_hwdep_fw_cal = aqt_get_hwdep_fw_cal,
  691. .mbhc_micb_ctrl_thr_mic = aqt_mbhc_micb_ctrl_threshold_mic,
  692. .compute_impedance = aqt_wcd_mbhc_calc_impedance,
  693. .mbhc_gnd_det_ctrl = aqt_mbhc_gnd_det_ctrl,
  694. .hph_pull_down_ctrl = aqt_mbhc_hph_pull_down_ctrl,
  695. .mbhc_moisture_config = aqt_mbhc_moisture_config,
  696. .update_anc_state = aqt_update_anc_state,
  697. .is_anc_on = aqt_is_anc_on,
  698. };
  699. static int aqt_get_hph_type(struct snd_kcontrol *kcontrol,
  700. struct snd_ctl_elem_value *ucontrol)
  701. {
  702. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  703. struct aqt1000 *aqt = snd_soc_codec_get_drvdata(codec);
  704. struct aqt1000_mbhc *aqt_mbhc = aqt->mbhc;
  705. struct wcd_mbhc *mbhc;
  706. if (!aqt_mbhc) {
  707. dev_err(codec->dev, "%s: mbhc not initialized!\n", __func__);
  708. return -EINVAL;
  709. }
  710. mbhc = &aqt_mbhc->wcd_mbhc;
  711. ucontrol->value.integer.value[0] = (u32) mbhc->hph_type;
  712. dev_dbg(codec->dev, "%s: hph_type = %u\n", __func__, mbhc->hph_type);
  713. return 0;
  714. }
  715. static int aqt_hph_impedance_get(struct snd_kcontrol *kcontrol,
  716. struct snd_ctl_elem_value *ucontrol)
  717. {
  718. uint32_t zl, zr;
  719. bool hphr;
  720. struct soc_multi_mixer_control *mc;
  721. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  722. struct aqt1000 *aqt = snd_soc_codec_get_drvdata(codec);
  723. struct aqt1000_mbhc *aqt_mbhc = aqt->mbhc;
  724. if (!aqt_mbhc) {
  725. dev_err(codec->dev, "%s: mbhc not initialized!\n", __func__);
  726. return -EINVAL;
  727. }
  728. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  729. hphr = mc->shift;
  730. wcd_mbhc_get_impedance(&aqt_mbhc->wcd_mbhc, &zl, &zr);
  731. dev_dbg(codec->dev, "%s: zl=%u(ohms), zr=%u(ohms)\n", __func__, zl, zr);
  732. ucontrol->value.integer.value[0] = hphr ? zr : zl;
  733. return 0;
  734. }
  735. static const struct snd_kcontrol_new hph_type_detect_controls[] = {
  736. SOC_SINGLE_EXT("HPH Type", 0, 0, UINT_MAX, 0,
  737. aqt_get_hph_type, NULL),
  738. };
  739. static const struct snd_kcontrol_new impedance_detect_controls[] = {
  740. SOC_SINGLE_EXT("HPHL Impedance", 0, 0, UINT_MAX, 0,
  741. aqt_hph_impedance_get, NULL),
  742. SOC_SINGLE_EXT("HPHR Impedance", 0, 1, UINT_MAX, 0,
  743. aqt_hph_impedance_get, NULL),
  744. };
  745. /*
  746. * aqt_mbhc_get_impedance: get impedance of headphone left and right channels
  747. * @aqt_mbhc: handle to struct aqt_mbhc *
  748. * @zl: handle to left-ch impedance
  749. * @zr: handle to right-ch impedance
  750. * return 0 for success or error code in case of failure
  751. */
  752. int aqt_mbhc_get_impedance(struct aqt1000_mbhc *aqt_mbhc,
  753. uint32_t *zl, uint32_t *zr)
  754. {
  755. if (!aqt_mbhc) {
  756. pr_err("%s: mbhc not initialized!\n", __func__);
  757. return -EINVAL;
  758. }
  759. if (!zl || !zr) {
  760. pr_err("%s: zl or zr null!\n", __func__);
  761. return -EINVAL;
  762. }
  763. return wcd_mbhc_get_impedance(&aqt_mbhc->wcd_mbhc, zl, zr);
  764. }
  765. EXPORT_SYMBOL(aqt_mbhc_get_impedance);
  766. /*
  767. * aqt_mbhc_hs_detect: starts mbhc insertion/removal functionality
  768. * @codec: handle to snd_soc_codec *
  769. * @mbhc_cfg: handle to mbhc configuration structure
  770. * return 0 if mbhc_start is success or error code in case of failure
  771. */
  772. int aqt_mbhc_hs_detect(struct snd_soc_codec *codec,
  773. struct wcd_mbhc_config *mbhc_cfg)
  774. {
  775. struct aqt1000 *aqt;
  776. struct aqt1000_mbhc *aqt_mbhc;
  777. if (!codec) {
  778. pr_err("%s: codec is NULL\n", __func__);
  779. return -EINVAL;
  780. }
  781. aqt = snd_soc_codec_get_drvdata(codec);
  782. if (!aqt) {
  783. pr_err("%s: aqt is NULL\n", __func__);
  784. return -EINVAL;
  785. }
  786. aqt_mbhc = aqt->mbhc;
  787. if (!aqt_mbhc) {
  788. dev_err(codec->dev, "%s: mbhc not initialized!\n", __func__);
  789. return -EINVAL;
  790. }
  791. return wcd_mbhc_start(&aqt_mbhc->wcd_mbhc, mbhc_cfg);
  792. }
  793. EXPORT_SYMBOL(aqt_mbhc_hs_detect);
  794. /*
  795. * aqt_mbhc_hs_detect_exit: stop mbhc insertion/removal functionality
  796. * @codec: handle to snd_soc_codec *
  797. */
  798. void aqt_mbhc_hs_detect_exit(struct snd_soc_codec *codec)
  799. {
  800. struct aqt1000 *aqt;
  801. struct aqt1000_mbhc *aqt_mbhc;
  802. if (!codec) {
  803. pr_err("%s: codec is NULL\n", __func__);
  804. return;
  805. }
  806. aqt = snd_soc_codec_get_drvdata(codec);
  807. if (!aqt) {
  808. pr_err("%s: aqt is NULL\n", __func__);
  809. return;
  810. }
  811. aqt_mbhc = aqt->mbhc;
  812. if (!aqt_mbhc) {
  813. dev_err(codec->dev, "%s: mbhc not initialized!\n", __func__);
  814. return;
  815. }
  816. wcd_mbhc_stop(&aqt_mbhc->wcd_mbhc);
  817. }
  818. EXPORT_SYMBOL(aqt_mbhc_hs_detect_exit);
  819. /*
  820. * aqt_mbhc_post_ssr_init: initialize mbhc for aqt post subsystem restart
  821. * @mbhc: poniter to aqt_mbhc structure
  822. * @codec: handle to snd_soc_codec *
  823. *
  824. * return 0 if mbhc_init is success or error code in case of failure
  825. */
  826. int aqt_mbhc_post_ssr_init(struct aqt1000_mbhc *mbhc,
  827. struct snd_soc_codec *codec)
  828. {
  829. int ret;
  830. struct wcd_mbhc *wcd_mbhc;
  831. if (!mbhc || !codec)
  832. return -EINVAL;
  833. wcd_mbhc = &mbhc->wcd_mbhc;
  834. if (wcd_mbhc == NULL) {
  835. pr_err("%s: wcd_mbhc is NULL\n", __func__);
  836. return -EINVAL;
  837. }
  838. wcd_mbhc_deinit(wcd_mbhc);
  839. ret = wcd_mbhc_init(wcd_mbhc, codec, &mbhc_cb, &intr_ids,
  840. wcd_mbhc_registers, AQT_ZDET_SUPPORTED);
  841. if (ret) {
  842. dev_err(codec->dev, "%s: mbhc initialization failed\n",
  843. __func__);
  844. goto done;
  845. }
  846. done:
  847. return ret;
  848. }
  849. EXPORT_SYMBOL(aqt_mbhc_post_ssr_init);
  850. /*
  851. * aqt_mbhc_init: initialize mbhc for aqt
  852. * @mbhc: poniter to aqt_mbhc struct pointer to store the configs
  853. * @codec: handle to snd_soc_codec *
  854. * @fw_data: handle to firmware data
  855. *
  856. * return 0 if mbhc_init is success or error code in case of failure
  857. */
  858. int aqt_mbhc_init(struct aqt1000_mbhc **mbhc, struct snd_soc_codec *codec,
  859. struct fw_info *fw_data)
  860. {
  861. struct aqt1000_mbhc *aqt_mbhc;
  862. struct wcd_mbhc *wcd_mbhc;
  863. int ret;
  864. if (!codec) {
  865. pr_err("%s: codec is NULL\n", __func__);
  866. return -EINVAL;
  867. }
  868. aqt_mbhc = devm_kzalloc(codec->dev, sizeof(struct aqt1000_mbhc),
  869. GFP_KERNEL);
  870. if (!aqt_mbhc)
  871. return -ENOMEM;
  872. aqt_mbhc->aqt = dev_get_drvdata(codec->dev);
  873. aqt_mbhc->fw_data = fw_data;
  874. BLOCKING_INIT_NOTIFIER_HEAD(&aqt_mbhc->notifier);
  875. wcd_mbhc = &aqt_mbhc->wcd_mbhc;
  876. if (wcd_mbhc == NULL) {
  877. pr_err("%s: wcd_mbhc is NULL\n", __func__);
  878. ret = -EINVAL;
  879. goto err;
  880. }
  881. /* Setting default mbhc detection logic to ADC */
  882. wcd_mbhc->mbhc_detection_logic = WCD_DETECTION_ADC;
  883. ret = wcd_mbhc_init(wcd_mbhc, codec, &mbhc_cb,
  884. &intr_ids, wcd_mbhc_registers,
  885. AQT_ZDET_SUPPORTED);
  886. if (ret) {
  887. dev_err(codec->dev, "%s: mbhc initialization failed\n",
  888. __func__);
  889. goto err;
  890. }
  891. (*mbhc) = aqt_mbhc;
  892. snd_soc_add_codec_controls(codec, impedance_detect_controls,
  893. ARRAY_SIZE(impedance_detect_controls));
  894. snd_soc_add_codec_controls(codec, hph_type_detect_controls,
  895. ARRAY_SIZE(hph_type_detect_controls));
  896. return 0;
  897. err:
  898. devm_kfree(codec->dev, aqt_mbhc);
  899. return ret;
  900. }
  901. EXPORT_SYMBOL(aqt_mbhc_init);
  902. /*
  903. * aqt_mbhc_deinit: deinitialize mbhc for aqt
  904. * @codec: handle to snd_soc_codec *
  905. */
  906. void aqt_mbhc_deinit(struct snd_soc_codec *codec)
  907. {
  908. struct aqt1000 *aqt;
  909. struct aqt1000_mbhc *aqt_mbhc;
  910. if (!codec) {
  911. pr_err("%s: codec is NULL\n", __func__);
  912. return;
  913. }
  914. aqt = snd_soc_codec_get_drvdata(codec);
  915. if (!aqt) {
  916. pr_err("%s: aqt is NULL\n", __func__);
  917. return;
  918. }
  919. aqt_mbhc = aqt->mbhc;
  920. if (aqt_mbhc) {
  921. wcd_mbhc_deinit(&aqt_mbhc->wcd_mbhc);
  922. devm_kfree(codec->dev, aqt_mbhc);
  923. }
  924. }
  925. EXPORT_SYMBOL(aqt_mbhc_deinit);