dp_rx_mon_dest.c 41 KB

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  1. /*
  2. * Copyright (c) 2017-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_trace.h"
  25. #include "qdf_nbuf.h"
  26. #include "hal_api_mon.h"
  27. #include "dp_rx_mon.h"
  28. #include "wlan_cfg.h"
  29. #include "dp_internal.h"
  30. /* The maxinum buffer length allocated for radio tap */
  31. #define MAX_MONITOR_HEADER (512)
  32. /*
  33. * PPDU id is from 0 to 64k-1. PPDU id read from status ring and PPDU id
  34. * read from destination ring shall track each other. If the distance of
  35. * two ppdu id is less than 20000. It is assume no wrap around. Otherwise,
  36. * It is assume wrap around.
  37. */
  38. #define NOT_PPDU_ID_WRAP_AROUND 20000
  39. /**
  40. * dp_rx_mon_link_desc_return() - Return a MPDU link descriptor to HW
  41. * (WBM), following error handling
  42. *
  43. * @dp_pdev: core txrx pdev context
  44. * @buf_addr_info: void pointer to monitor link descriptor buf addr info
  45. * Return: QDF_STATUS
  46. */
  47. static QDF_STATUS
  48. dp_rx_mon_link_desc_return(struct dp_pdev *dp_pdev,
  49. void *buf_addr_info, int mac_id)
  50. {
  51. struct dp_srng *dp_srng;
  52. void *hal_srng;
  53. void *hal_soc;
  54. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  55. void *src_srng_desc;
  56. int mac_for_pdev = dp_get_mac_id_for_mac(dp_pdev->soc, mac_id);
  57. hal_soc = dp_pdev->soc->hal_soc;
  58. dp_srng = &dp_pdev->rxdma_mon_desc_ring[mac_for_pdev];
  59. hal_srng = dp_srng->hal_srng;
  60. qdf_assert(hal_srng);
  61. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_srng))) {
  62. /* TODO */
  63. /*
  64. * Need API to convert from hal_ring pointer to
  65. * Ring Type / Ring Id combo
  66. */
  67. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  68. "%s %d : \
  69. HAL RING Access For WBM Release SRNG Failed -- %pK",
  70. __func__, __LINE__, hal_srng);
  71. goto done;
  72. }
  73. src_srng_desc = hal_srng_src_get_next(hal_soc, hal_srng);
  74. if (qdf_likely(src_srng_desc)) {
  75. /* Return link descriptor through WBM ring (SW2WBM)*/
  76. hal_rx_mon_msdu_link_desc_set(hal_soc,
  77. src_srng_desc, buf_addr_info);
  78. status = QDF_STATUS_SUCCESS;
  79. } else {
  80. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  81. "%s %d -- Monitor Link Desc WBM Release Ring Full",
  82. __func__, __LINE__);
  83. }
  84. done:
  85. hal_srng_access_end(hal_soc, hal_srng);
  86. return status;
  87. }
  88. /**
  89. * dp_mon_adjust_frag_len() - MPDU and MSDU may spread across
  90. * multiple nbufs. This function
  91. * is to return data length in
  92. * fragmented buffer
  93. *
  94. * @total_len: pointer to remaining data length.
  95. * @frag_len: pointer to data length in this fragment.
  96. */
  97. static inline void dp_mon_adjust_frag_len(uint32_t *total_len,
  98. uint32_t *frag_len)
  99. {
  100. if (*total_len >= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  101. *frag_len = RX_BUFFER_SIZE - RX_PKT_TLVS_LEN;
  102. *total_len -= *frag_len;
  103. } else {
  104. *frag_len = *total_len;
  105. *total_len = 0;
  106. }
  107. }
  108. /**
  109. * dp_rx_cookie_2_mon_link_desc() - Retrieve Link descriptor based on target
  110. * @pdev: core physical device context
  111. * @hal_buf_info: structure holding the buffer info
  112. * mac_id: mac number
  113. *
  114. * Return: link descriptor address
  115. */
  116. static inline
  117. void *dp_rx_cookie_2_mon_link_desc(struct dp_pdev *pdev,
  118. struct hal_buf_info buf_info,
  119. uint8_t mac_id)
  120. {
  121. if (pdev->soc->wlan_cfg_ctx->rxdma1_enable)
  122. return dp_rx_cookie_2_mon_link_desc_va(pdev, &buf_info,
  123. mac_id);
  124. return dp_rx_cookie_2_link_desc_va(pdev->soc, &buf_info);
  125. }
  126. /**
  127. * dp_rx_monitor_link_desc_return() - Return Link descriptor based on target
  128. * @pdev: core physical device context
  129. * @p_last_buf_addr_info: MPDU Link descriptor
  130. * mac_id: mac number
  131. *
  132. * Return: QDF_STATUS
  133. */
  134. static inline
  135. QDF_STATUS dp_rx_monitor_link_desc_return(struct dp_pdev *pdev,
  136. void *p_last_buf_addr_info,
  137. uint8_t mac_id, uint8_t bm_action)
  138. {
  139. if (pdev->soc->wlan_cfg_ctx->rxdma1_enable)
  140. return dp_rx_mon_link_desc_return(pdev, p_last_buf_addr_info,
  141. mac_id);
  142. return dp_rx_link_desc_return(pdev->soc, p_last_buf_addr_info,
  143. bm_action);
  144. }
  145. /**
  146. * dp_rxdma_get_mon_dst_ring() - Return the pointer to rxdma_err_dst_ring
  147. * or mon_dst_ring based on the target
  148. * @pdev: core physical device context
  149. * @mac_for_pdev: mac_id number
  150. *
  151. * Return: ring address
  152. */
  153. static inline
  154. void *dp_rxdma_get_mon_dst_ring(struct dp_pdev *pdev,
  155. uint8_t mac_for_pdev)
  156. {
  157. if (pdev->soc->wlan_cfg_ctx->rxdma1_enable)
  158. return pdev->rxdma_mon_dst_ring[mac_for_pdev].hal_srng;
  159. return pdev->rxdma_err_dst_ring[mac_for_pdev].hal_srng;
  160. }
  161. /**
  162. * dp_rxdma_get_mon_buf_ring() - Return monitor buf ring address
  163. * based on target
  164. * @pdev: core physical device context
  165. * @mac_for_pdev: mac id number
  166. *
  167. * Return: ring address
  168. */
  169. static inline
  170. struct dp_srng *dp_rxdma_get_mon_buf_ring(struct dp_pdev *pdev,
  171. uint8_t mac_for_pdev)
  172. {
  173. if (pdev->soc->wlan_cfg_ctx->rxdma1_enable)
  174. return &pdev->rxdma_mon_buf_ring[mac_for_pdev];
  175. return &pdev->rx_refill_buf_ring;
  176. }
  177. /**
  178. * dp_rx_get_desc_pool() - Return monitor descriptor pool
  179. * based on target
  180. * @soc: soc handle
  181. * @mac_id: mac id number
  182. *
  183. * Return: descriptor pool address
  184. */
  185. static inline
  186. struct rx_desc_pool *dp_rx_get_desc_pool(struct dp_soc *soc,
  187. uint8_t mac_id)
  188. {
  189. if (soc->wlan_cfg_ctx->rxdma1_enable)
  190. return &soc->rx_desc_mon[mac_id];
  191. return &soc->rx_desc_buf[mac_id];
  192. }
  193. /**
  194. * dp_rx_get_mon_desc() - Return Rx descriptor based on target
  195. * @soc: soc handle
  196. * @cookie: cookie value
  197. *
  198. * Return: Rx descriptor
  199. */
  200. static inline
  201. struct dp_rx_desc *dp_rx_get_mon_desc(struct dp_soc *soc,
  202. uint32_t cookie)
  203. {
  204. if (soc->wlan_cfg_ctx->rxdma1_enable)
  205. return dp_rx_cookie_2_va_mon_buf(soc, cookie);
  206. return dp_rx_cookie_2_va_rxdma_buf(soc, cookie);
  207. }
  208. /**
  209. * dp_rx_mon_mpdu_pop() - Return a MPDU link descriptor to HW
  210. * (WBM), following error handling
  211. *
  212. * @soc: core DP main context
  213. * @mac_id: mac id which is one of 3 mac_ids
  214. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  215. * @head_msdu: head of msdu to be popped
  216. * @tail_msdu: tail of msdu to be popped
  217. * @npackets: number of packet to be popped
  218. * @ppdu_id: ppdu id of processing ppdu
  219. * @head: head of descs list to be freed
  220. * @tail: tail of decs list to be freed
  221. *
  222. * Return: number of msdu in MPDU to be popped
  223. */
  224. static inline uint32_t
  225. dp_rx_mon_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  226. void *rxdma_dst_ring_desc, qdf_nbuf_t *head_msdu,
  227. qdf_nbuf_t *tail_msdu, uint32_t *npackets, uint32_t *ppdu_id,
  228. union dp_rx_desc_list_elem_t **head,
  229. union dp_rx_desc_list_elem_t **tail)
  230. {
  231. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  232. void *rx_desc_tlv;
  233. void *rx_msdu_link_desc;
  234. qdf_nbuf_t msdu;
  235. qdf_nbuf_t last;
  236. struct hal_rx_msdu_list msdu_list;
  237. uint16_t num_msdus;
  238. uint32_t rx_buf_size, rx_pkt_offset;
  239. struct hal_buf_info buf_info;
  240. void *p_buf_addr_info;
  241. void *p_last_buf_addr_info;
  242. uint32_t rx_bufs_used = 0;
  243. uint32_t msdu_ppdu_id, msdu_cnt;
  244. uint8_t *data;
  245. uint32_t i;
  246. uint32_t total_frag_len = 0, frag_len = 0;
  247. bool is_frag, is_first_msdu;
  248. bool drop_mpdu = false;
  249. uint8_t bm_action = HAL_BM_ACTION_PUT_IN_IDLE_LIST;
  250. msdu = 0;
  251. last = NULL;
  252. hal_rx_reo_ent_buf_paddr_get(rxdma_dst_ring_desc, &buf_info,
  253. &p_last_buf_addr_info, &msdu_cnt);
  254. if ((hal_rx_reo_ent_rxdma_push_reason_get(rxdma_dst_ring_desc) ==
  255. HAL_RX_WBM_RXDMA_PSH_RSN_ERROR)) {
  256. uint8_t rxdma_err =
  257. hal_rx_reo_ent_rxdma_error_code_get(
  258. rxdma_dst_ring_desc);
  259. if (qdf_unlikely((rxdma_err == HAL_RXDMA_ERR_FLUSH_REQUEST) ||
  260. (rxdma_err == HAL_RXDMA_ERR_MPDU_LENGTH) ||
  261. (rxdma_err == HAL_RXDMA_ERR_OVERFLOW))) {
  262. drop_mpdu = true;
  263. dp_pdev->rx_mon_stats.dest_mpdu_drop++;
  264. }
  265. }
  266. is_frag = false;
  267. is_first_msdu = true;
  268. do {
  269. /* WAR for duplicate link descriptors received from HW */
  270. if (qdf_unlikely(dp_pdev->mon_last_linkdesc_paddr ==
  271. buf_info.paddr)) {
  272. dp_pdev->rx_mon_stats.dup_mon_linkdesc_cnt++;
  273. return rx_bufs_used;
  274. }
  275. rx_msdu_link_desc =
  276. dp_rx_cookie_2_mon_link_desc(dp_pdev,
  277. buf_info, mac_id);
  278. qdf_assert(rx_msdu_link_desc);
  279. hal_rx_msdu_list_get(soc->hal_soc, rx_msdu_link_desc,
  280. &msdu_list, &num_msdus);
  281. for (i = 0; i < num_msdus; i++) {
  282. uint32_t l2_hdr_offset;
  283. struct dp_rx_desc *rx_desc = NULL;
  284. /* WAR for duplicate buffers received from HW */
  285. if (qdf_unlikely(dp_pdev->mon_last_buf_cookie ==
  286. msdu_list.sw_cookie[i])) {
  287. /* Skip duplicate buffer and drop subsequent
  288. * buffers in this MPDU
  289. */
  290. drop_mpdu = true;
  291. dp_pdev->rx_mon_stats.dup_mon_buf_cnt++;
  292. continue;
  293. }
  294. rx_desc = dp_rx_get_mon_desc(soc,
  295. msdu_list.sw_cookie[i]);
  296. qdf_assert_always(rx_desc);
  297. msdu = rx_desc->nbuf;
  298. if (rx_desc->unmapped == 0) {
  299. qdf_nbuf_unmap_single(soc->osdev, msdu,
  300. QDF_DMA_FROM_DEVICE);
  301. rx_desc->unmapped = 1;
  302. }
  303. if (drop_mpdu) {
  304. qdf_nbuf_free(msdu);
  305. msdu = NULL;
  306. goto next_msdu;
  307. }
  308. data = qdf_nbuf_data(msdu);
  309. rx_desc_tlv = HAL_RX_MON_DEST_GET_DESC(data);
  310. QDF_TRACE(QDF_MODULE_ID_DP,
  311. QDF_TRACE_LEVEL_DEBUG,
  312. "[%s] i=%d, ppdu_id=%x, num_msdus = %u\n",
  313. __func__, i, *ppdu_id,
  314. num_msdus);
  315. if (is_first_msdu) {
  316. if (!HAL_RX_HW_DESC_MPDU_VALID(
  317. rx_desc_tlv)) {
  318. drop_mpdu = true;
  319. qdf_nbuf_free(msdu);
  320. msdu = NULL;
  321. goto next_msdu;
  322. }
  323. msdu_ppdu_id = HAL_RX_HW_DESC_GET_PPDUID_GET(
  324. rx_desc_tlv);
  325. is_first_msdu = false;
  326. QDF_TRACE(QDF_MODULE_ID_DP,
  327. QDF_TRACE_LEVEL_DEBUG,
  328. "[%s] msdu_ppdu_id=%x",
  329. __func__, msdu_ppdu_id);
  330. if (*ppdu_id > msdu_ppdu_id)
  331. QDF_TRACE(QDF_MODULE_ID_DP,
  332. QDF_TRACE_LEVEL_DEBUG,
  333. "[%s][%d] ppdu_id=%d "
  334. "msdu_ppdu_id=%d",
  335. __func__, __LINE__, *ppdu_id,
  336. msdu_ppdu_id);
  337. if ((*ppdu_id < msdu_ppdu_id) && (
  338. (msdu_ppdu_id - *ppdu_id) <
  339. NOT_PPDU_ID_WRAP_AROUND)) {
  340. *ppdu_id = msdu_ppdu_id;
  341. return rx_bufs_used;
  342. } else if ((*ppdu_id > msdu_ppdu_id) && (
  343. (*ppdu_id - msdu_ppdu_id) >
  344. NOT_PPDU_ID_WRAP_AROUND)) {
  345. *ppdu_id = msdu_ppdu_id;
  346. return rx_bufs_used;
  347. }
  348. dp_pdev->mon_last_linkdesc_paddr =
  349. buf_info.paddr;
  350. }
  351. if (hal_rx_desc_is_first_msdu(rx_desc_tlv))
  352. hal_rx_mon_hw_desc_get_mpdu_status(soc->hal_soc,
  353. rx_desc_tlv,
  354. &(dp_pdev->ppdu_info.rx_status));
  355. if (msdu_list.msdu_info[i].msdu_flags &
  356. HAL_MSDU_F_MSDU_CONTINUATION) {
  357. if (!is_frag) {
  358. total_frag_len =
  359. msdu_list.msdu_info[i].msdu_len;
  360. is_frag = true;
  361. }
  362. dp_mon_adjust_frag_len(
  363. &total_frag_len, &frag_len);
  364. } else {
  365. if (is_frag) {
  366. dp_mon_adjust_frag_len(
  367. &total_frag_len, &frag_len);
  368. } else {
  369. frag_len =
  370. msdu_list.msdu_info[i].msdu_len;
  371. }
  372. is_frag = false;
  373. msdu_cnt--;
  374. }
  375. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  376. "%s total_len %u frag_len %u flags %u",
  377. __func__, total_frag_len, frag_len,
  378. msdu_list.msdu_info[i].msdu_flags);
  379. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  380. /*
  381. * HW structures call this L3 header padding
  382. * -- even though this is actually the offset
  383. * from the buffer beginning where the L2
  384. * header begins.
  385. */
  386. l2_hdr_offset =
  387. hal_rx_msdu_end_l3_hdr_padding_get(data);
  388. rx_buf_size = rx_pkt_offset + l2_hdr_offset
  389. + frag_len;
  390. qdf_nbuf_set_pktlen(msdu, rx_buf_size);
  391. #if 0
  392. /* Disble it.see packet on msdu done set to 0 */
  393. /*
  394. * Check if DMA completed -- msdu_done is the
  395. * last bit to be written
  396. */
  397. if (!hal_rx_attn_msdu_done_get(rx_desc_tlv)) {
  398. QDF_TRACE(QDF_MODULE_ID_DP,
  399. QDF_TRACE_LEVEL_ERROR,
  400. "%s:%d: Pkt Desc",
  401. __func__, __LINE__);
  402. QDF_TRACE_HEX_DUMP(QDF_MODULE_ID_DP,
  403. QDF_TRACE_LEVEL_ERROR,
  404. rx_desc_tlv, 128);
  405. qdf_assert_always(0);
  406. }
  407. #endif
  408. QDF_TRACE(QDF_MODULE_ID_DP,
  409. QDF_TRACE_LEVEL_DEBUG,
  410. "%s: rx_pkt_offset=%d, l2_hdr_offset=%d, msdu_len=%d, addr=%pK skb->len %u",
  411. __func__, rx_pkt_offset, l2_hdr_offset,
  412. msdu_list.msdu_info[i].msdu_len,
  413. qdf_nbuf_data(msdu),
  414. (uint32_t)qdf_nbuf_len(msdu));
  415. if (head_msdu && *head_msdu == NULL) {
  416. *head_msdu = msdu;
  417. } else {
  418. if (last)
  419. qdf_nbuf_set_next(last, msdu);
  420. }
  421. last = msdu;
  422. next_msdu:
  423. dp_pdev->mon_last_buf_cookie = msdu_list.sw_cookie[i];
  424. rx_bufs_used++;
  425. dp_rx_add_to_free_desc_list(head,
  426. tail, rx_desc);
  427. }
  428. hal_rx_mon_next_link_desc_get(rx_msdu_link_desc, &buf_info,
  429. &p_buf_addr_info);
  430. if (dp_rx_monitor_link_desc_return(dp_pdev,
  431. p_last_buf_addr_info,
  432. mac_id,
  433. bm_action)
  434. != QDF_STATUS_SUCCESS)
  435. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  436. "dp_rx_monitor_link_desc_return failed");
  437. p_last_buf_addr_info = p_buf_addr_info;
  438. } while (buf_info.paddr && msdu_cnt);
  439. if (last)
  440. qdf_nbuf_set_next(last, NULL);
  441. *tail_msdu = msdu;
  442. return rx_bufs_used;
  443. }
  444. static inline
  445. void dp_rx_msdus_set_payload(qdf_nbuf_t msdu)
  446. {
  447. uint8_t *data;
  448. uint32_t rx_pkt_offset, l2_hdr_offset;
  449. data = qdf_nbuf_data(msdu);
  450. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  451. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(data);
  452. qdf_nbuf_pull_head(msdu, rx_pkt_offset + l2_hdr_offset);
  453. }
  454. static inline
  455. qdf_nbuf_t dp_rx_mon_restitch_mpdu_from_msdus(struct dp_soc *soc,
  456. uint32_t mac_id, qdf_nbuf_t head_msdu, qdf_nbuf_t last_msdu,
  457. struct cdp_mon_status *rx_status)
  458. {
  459. qdf_nbuf_t msdu, mpdu_buf, prev_buf, msdu_orig, head_frag_list;
  460. uint32_t decap_format, wifi_hdr_len, sec_hdr_len, msdu_llc_len,
  461. mpdu_buf_len, decap_hdr_pull_bytes, frag_list_sum_len, dir,
  462. is_amsdu, is_first_frag, amsdu_pad;
  463. void *rx_desc;
  464. char *hdr_desc;
  465. unsigned char *dest;
  466. struct ieee80211_frame *wh;
  467. struct ieee80211_qoscntl *qos;
  468. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  469. head_frag_list = NULL;
  470. mpdu_buf = NULL;
  471. /* The nbuf has been pulled just beyond the status and points to the
  472. * payload
  473. */
  474. if (!head_msdu)
  475. goto mpdu_stitch_fail;
  476. msdu_orig = head_msdu;
  477. rx_desc = qdf_nbuf_data(msdu_orig);
  478. if (HAL_RX_DESC_GET_MPDU_LENGTH_ERR(rx_desc)) {
  479. /* It looks like there is some issue on MPDU len err */
  480. /* Need further investigate if drop the packet */
  481. DP_STATS_INC(dp_pdev, dropped.mon_rx_drop, 1);
  482. return NULL;
  483. }
  484. rx_desc = qdf_nbuf_data(last_msdu);
  485. rx_status->cdp_rs_fcs_err = HAL_RX_DESC_GET_MPDU_FCS_ERR(rx_desc);
  486. dp_pdev->ppdu_info.rx_status.rs_fcs_err =
  487. HAL_RX_DESC_GET_MPDU_FCS_ERR(rx_desc);
  488. /* Fill out the rx_status from the PPDU start and end fields */
  489. /* HAL_RX_GET_PPDU_STATUS(soc, mac_id, rx_status); */
  490. rx_desc = qdf_nbuf_data(head_msdu);
  491. decap_format = HAL_RX_DESC_GET_DECAP_FORMAT(rx_desc);
  492. /* Easy case - The MSDU status indicates that this is a non-decapped
  493. * packet in RAW mode.
  494. */
  495. if (decap_format == HAL_HW_RX_DECAP_FORMAT_RAW) {
  496. /* Note that this path might suffer from headroom unavailabilty
  497. * - but the RX status is usually enough
  498. */
  499. dp_rx_msdus_set_payload(head_msdu);
  500. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  501. "[%s][%d] decap format raw head %pK head->next %pK last_msdu %pK last_msdu->next %pK",
  502. __func__, __LINE__, head_msdu, head_msdu->next,
  503. last_msdu, last_msdu->next);
  504. mpdu_buf = head_msdu;
  505. prev_buf = mpdu_buf;
  506. frag_list_sum_len = 0;
  507. msdu = qdf_nbuf_next(head_msdu);
  508. is_first_frag = 1;
  509. while (msdu) {
  510. dp_rx_msdus_set_payload(msdu);
  511. if (is_first_frag) {
  512. is_first_frag = 0;
  513. head_frag_list = msdu;
  514. }
  515. frag_list_sum_len += qdf_nbuf_len(msdu);
  516. /* Maintain the linking of the cloned MSDUS */
  517. qdf_nbuf_set_next_ext(prev_buf, msdu);
  518. /* Move to the next */
  519. prev_buf = msdu;
  520. msdu = qdf_nbuf_next(msdu);
  521. }
  522. qdf_nbuf_trim_tail(prev_buf, HAL_RX_FCS_LEN);
  523. /* If there were more fragments to this RAW frame */
  524. if (head_frag_list) {
  525. if (frag_list_sum_len <
  526. sizeof(struct ieee80211_frame_min_one)) {
  527. DP_STATS_INC(dp_pdev, dropped.mon_rx_drop, 1);
  528. return NULL;
  529. }
  530. frag_list_sum_len -= HAL_RX_FCS_LEN;
  531. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  532. frag_list_sum_len);
  533. qdf_nbuf_set_next(mpdu_buf, NULL);
  534. }
  535. goto mpdu_stitch_done;
  536. }
  537. /* Decap mode:
  538. * Calculate the amount of header in decapped packet to knock off based
  539. * on the decap type and the corresponding number of raw bytes to copy
  540. * status header
  541. */
  542. rx_desc = qdf_nbuf_data(head_msdu);
  543. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  544. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  545. "[%s][%d] decap format not raw",
  546. __func__, __LINE__);
  547. /* Base size */
  548. wifi_hdr_len = sizeof(struct ieee80211_frame);
  549. wh = (struct ieee80211_frame *)hdr_desc;
  550. dir = wh->i_fc[1] & IEEE80211_FC1_DIR_MASK;
  551. if (dir == IEEE80211_FC1_DIR_DSTODS)
  552. wifi_hdr_len += 6;
  553. is_amsdu = 0;
  554. if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
  555. qos = (struct ieee80211_qoscntl *)
  556. (hdr_desc + wifi_hdr_len);
  557. wifi_hdr_len += 2;
  558. is_amsdu = (qos->i_qos[0] & IEEE80211_QOS_AMSDU);
  559. }
  560. /*Calculate security header length based on 'Protected'
  561. * and 'EXT_IV' flag
  562. * */
  563. if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
  564. char *iv = (char *)wh + wifi_hdr_len;
  565. if (iv[3] & KEY_EXTIV)
  566. sec_hdr_len = 8;
  567. else
  568. sec_hdr_len = 4;
  569. } else {
  570. sec_hdr_len = 0;
  571. }
  572. wifi_hdr_len += sec_hdr_len;
  573. /* MSDU related stuff LLC - AMSDU subframe header etc */
  574. msdu_llc_len = is_amsdu ? (14 + 8) : 8;
  575. mpdu_buf_len = wifi_hdr_len + msdu_llc_len;
  576. /* "Decap" header to remove from MSDU buffer */
  577. decap_hdr_pull_bytes = 14;
  578. /* Allocate a new nbuf for holding the 802.11 header retrieved from the
  579. * status of the now decapped first msdu. Leave enough headroom for
  580. * accomodating any radio-tap /prism like PHY header
  581. */
  582. mpdu_buf = qdf_nbuf_alloc(soc->osdev,
  583. MAX_MONITOR_HEADER + mpdu_buf_len,
  584. MAX_MONITOR_HEADER, 4, FALSE);
  585. if (!mpdu_buf)
  586. goto mpdu_stitch_done;
  587. /* Copy the MPDU related header and enc headers into the first buffer
  588. * - Note that there can be a 2 byte pad between heaader and enc header
  589. */
  590. prev_buf = mpdu_buf;
  591. dest = qdf_nbuf_put_tail(prev_buf, wifi_hdr_len);
  592. if (!dest)
  593. goto mpdu_stitch_fail;
  594. qdf_mem_copy(dest, hdr_desc, wifi_hdr_len);
  595. hdr_desc += wifi_hdr_len;
  596. #if 0
  597. dest = qdf_nbuf_put_tail(prev_buf, sec_hdr_len);
  598. adf_os_mem_copy(dest, hdr_desc, sec_hdr_len);
  599. hdr_desc += sec_hdr_len;
  600. #endif
  601. /* The first LLC len is copied into the MPDU buffer */
  602. frag_list_sum_len = 0;
  603. msdu_orig = head_msdu;
  604. is_first_frag = 1;
  605. amsdu_pad = 0;
  606. while (msdu_orig) {
  607. /* TODO: intra AMSDU padding - do we need it ??? */
  608. msdu = msdu_orig;
  609. if (is_first_frag) {
  610. head_frag_list = msdu;
  611. } else {
  612. /* Reload the hdr ptr only on non-first MSDUs */
  613. rx_desc = qdf_nbuf_data(msdu_orig);
  614. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  615. }
  616. /* Copy this buffers MSDU related status into the prev buffer */
  617. if (is_first_frag) {
  618. is_first_frag = 0;
  619. }
  620. dest = qdf_nbuf_put_tail(prev_buf,
  621. msdu_llc_len + amsdu_pad);
  622. if (!dest)
  623. goto mpdu_stitch_fail;
  624. dest += amsdu_pad;
  625. qdf_mem_copy(dest, hdr_desc, msdu_llc_len);
  626. dp_rx_msdus_set_payload(msdu);
  627. /* Push the MSDU buffer beyond the decap header */
  628. qdf_nbuf_pull_head(msdu, decap_hdr_pull_bytes);
  629. frag_list_sum_len += msdu_llc_len + qdf_nbuf_len(msdu)
  630. + amsdu_pad;
  631. /* Set up intra-AMSDU pad to be added to start of next buffer -
  632. * AMSDU pad is 4 byte pad on AMSDU subframe */
  633. amsdu_pad = (msdu_llc_len + qdf_nbuf_len(msdu)) & 0x3;
  634. amsdu_pad = amsdu_pad ? (4 - amsdu_pad) : 0;
  635. /* TODO FIXME How do we handle MSDUs that have fraglist - Should
  636. * probably iterate all the frags cloning them along the way and
  637. * and also updating the prev_buf pointer
  638. */
  639. /* Move to the next */
  640. prev_buf = msdu;
  641. msdu_orig = qdf_nbuf_next(msdu_orig);
  642. }
  643. #if 0
  644. /* Add in the trailer section - encryption trailer + FCS */
  645. qdf_nbuf_put_tail(prev_buf, HAL_RX_FCS_LEN);
  646. frag_list_sum_len += HAL_RX_FCS_LEN;
  647. #endif
  648. frag_list_sum_len -= msdu_llc_len;
  649. /* TODO: Convert this to suitable adf routines */
  650. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  651. frag_list_sum_len);
  652. mpdu_stitch_done:
  653. /* Check if this buffer contains the PPDU end status for TSF */
  654. /* Need revist this code to see where we can get tsf timestamp */
  655. #if 0
  656. /* PPDU end TLV will be retrieved from monitor status ring */
  657. last_mpdu =
  658. (*(((u_int32_t *)&rx_desc->attention)) &
  659. RX_ATTENTION_0_LAST_MPDU_MASK) >>
  660. RX_ATTENTION_0_LAST_MPDU_LSB;
  661. if (last_mpdu)
  662. rx_status->rs_tstamp.tsf = rx_desc->ppdu_end.tsf_timestamp;
  663. #endif
  664. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  665. "%s %d mpdu_buf %pK mpdu_buf->len %u",
  666. __func__, __LINE__,
  667. mpdu_buf, mpdu_buf->len);
  668. return mpdu_buf;
  669. mpdu_stitch_fail:
  670. if ((mpdu_buf) && (decap_format != HAL_HW_RX_DECAP_FORMAT_RAW)) {
  671. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  672. "%s mpdu_stitch_fail mpdu_buf %pK",
  673. __func__, mpdu_buf);
  674. /* Free the head buffer */
  675. qdf_nbuf_free(mpdu_buf);
  676. }
  677. return NULL;
  678. }
  679. /**
  680. * dp_rx_extract_radiotap_info(): Extract and populate information in
  681. * struct mon_rx_status type
  682. * @rx_status: Receive status
  683. * @mon_rx_status: Monitor mode status
  684. *
  685. * Returns: None
  686. */
  687. static inline
  688. void dp_rx_extract_radiotap_info(struct cdp_mon_status *rx_status,
  689. struct mon_rx_status *rx_mon_status)
  690. {
  691. rx_mon_status->tsft = rx_status->cdp_rs_tstamp.cdp_tsf;
  692. rx_mon_status->chan_freq = rx_status->rs_freq;
  693. rx_mon_status->chan_num = rx_status->rs_channel;
  694. rx_mon_status->chan_flags = rx_status->rs_flags;
  695. rx_mon_status->rate = rx_status->rs_datarate;
  696. /* TODO: rx_mon_status->ant_signal_db */
  697. /* TODO: rx_mon_status->nr_ant */
  698. rx_mon_status->mcs = rx_status->cdf_rs_rate_mcs;
  699. rx_mon_status->is_stbc = rx_status->cdp_rs_stbc;
  700. rx_mon_status->sgi = rx_status->cdp_rs_sgi;
  701. /* TODO: rx_mon_status->ldpc */
  702. /* TODO: rx_mon_status->beamformed */
  703. /* TODO: rx_mon_status->vht_flags */
  704. /* TODO: rx_mon_status->vht_flag_values1 */
  705. }
  706. QDF_STATUS dp_rx_mon_deliver(struct dp_soc *soc, uint32_t mac_id,
  707. qdf_nbuf_t head_msdu, qdf_nbuf_t tail_msdu)
  708. {
  709. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  710. struct cdp_mon_status *rs = &pdev->rx_mon_recv_status;
  711. qdf_nbuf_t mon_skb, skb_next;
  712. qdf_nbuf_t mon_mpdu = NULL;
  713. if ((pdev->monitor_vdev == NULL) ||
  714. (pdev->monitor_vdev->osif_rx_mon == NULL)) {
  715. goto mon_deliver_fail;
  716. }
  717. /* restitch mon MPDU for delivery via monitor interface */
  718. mon_mpdu = dp_rx_mon_restitch_mpdu_from_msdus(soc, mac_id, head_msdu,
  719. tail_msdu, rs);
  720. if (mon_mpdu && pdev->monitor_vdev && pdev->monitor_vdev->osif_vdev) {
  721. pdev->ppdu_info.rx_status.ppdu_id =
  722. pdev->ppdu_info.com_info.ppdu_id;
  723. pdev->ppdu_info.rx_status.device_id = soc->device_id;
  724. pdev->ppdu_info.rx_status.chan_noise_floor =
  725. pdev->chan_noise_floor;
  726. qdf_nbuf_update_radiotap(&(pdev->ppdu_info.rx_status),
  727. mon_mpdu, sizeof(struct rx_pkt_tlvs));
  728. pdev->monitor_vdev->osif_rx_mon(
  729. pdev->monitor_vdev->osif_vdev, mon_mpdu, NULL);
  730. } else {
  731. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  732. "[%s][%d] mon_mpdu=%pK pdev->monitor_vdev %pK osif_vdev %pK",
  733. __func__, __LINE__, mon_mpdu, pdev->monitor_vdev,
  734. pdev->monitor_vdev->osif_vdev);
  735. goto mon_deliver_fail;
  736. }
  737. return QDF_STATUS_SUCCESS;
  738. mon_deliver_fail:
  739. mon_skb = head_msdu;
  740. while (mon_skb) {
  741. skb_next = qdf_nbuf_next(mon_skb);
  742. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  743. "[%s][%d] mon_skb=%pK len %u", __func__,
  744. __LINE__, mon_skb, mon_skb->len);
  745. qdf_nbuf_free(mon_skb);
  746. mon_skb = skb_next;
  747. }
  748. return QDF_STATUS_E_INVAL;
  749. }
  750. /**
  751. * dp_rx_mon_deliver_non_std()
  752. * @soc: core txrx main contex
  753. * @mac_id: MAC ID
  754. *
  755. * This function delivers the radio tap and dummy MSDU
  756. * into user layer application for preamble only PPDU.
  757. *
  758. * Return: QDF_STATUS
  759. */
  760. QDF_STATUS dp_rx_mon_deliver_non_std(struct dp_soc *soc,
  761. uint32_t mac_id)
  762. {
  763. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  764. ol_txrx_rx_mon_fp osif_rx_mon;
  765. qdf_nbuf_t dummy_msdu;
  766. /* Sanity checking */
  767. if ((!pdev->monitor_vdev) || (!pdev->monitor_vdev->osif_rx_mon))
  768. goto mon_deliver_non_std_fail;
  769. /* Generate a dummy skb_buff */
  770. osif_rx_mon = pdev->monitor_vdev->osif_rx_mon;
  771. dummy_msdu = qdf_nbuf_alloc(soc->osdev, MAX_MONITOR_HEADER,
  772. MAX_MONITOR_HEADER, 4, FALSE);
  773. if (!dummy_msdu)
  774. goto allocate_dummy_msdu_fail;
  775. qdf_nbuf_set_pktlen(dummy_msdu, 0);
  776. qdf_nbuf_set_next(dummy_msdu, NULL);
  777. pdev->ppdu_info.rx_status.ppdu_id =
  778. pdev->ppdu_info.com_info.ppdu_id;
  779. /* Apply the radio header to this dummy skb */
  780. qdf_nbuf_update_radiotap(&pdev->ppdu_info.rx_status,
  781. dummy_msdu, MAX_MONITOR_HEADER);
  782. /* deliver to the user layer application */
  783. osif_rx_mon(pdev->monitor_vdev->osif_vdev,
  784. dummy_msdu, NULL);
  785. /* Clear rx_status*/
  786. qdf_mem_zero(&pdev->ppdu_info.rx_status,
  787. sizeof(pdev->ppdu_info.rx_status));
  788. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  789. return QDF_STATUS_SUCCESS;
  790. allocate_dummy_msdu_fail:
  791. QDF_TRACE_DEBUG_RL(QDF_MODULE_ID_DP, "[%s][%d] mon_skb=%pK ",
  792. __func__, __LINE__, dummy_msdu);
  793. mon_deliver_non_std_fail:
  794. return QDF_STATUS_E_INVAL;
  795. }
  796. /**
  797. * dp_rx_mon_dest_process() - Brain of the Rx processing functionality
  798. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  799. * @soc: core txrx main contex
  800. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  801. * @quota: No. of units (packets) that can be serviced in one shot.
  802. *
  803. * This function implements the core of Rx functionality. This is
  804. * expected to handle only non-error frames.
  805. *
  806. * Return: none
  807. */
  808. void dp_rx_mon_dest_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota)
  809. {
  810. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  811. void *hal_soc;
  812. void *rxdma_dst_ring_desc;
  813. void *mon_dst_srng;
  814. union dp_rx_desc_list_elem_t *head = NULL;
  815. union dp_rx_desc_list_elem_t *tail = NULL;
  816. uint32_t ppdu_id;
  817. uint32_t rx_bufs_used;
  818. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  819. struct cdp_pdev_mon_stats *rx_mon_stats;
  820. mon_dst_srng = dp_rxdma_get_mon_dst_ring(pdev, mac_for_pdev);
  821. if (!mon_dst_srng || !hal_srng_initialized(mon_dst_srng)) {
  822. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  823. "%s %d : HAL Monitor Destination Ring Init Failed -- %pK",
  824. __func__, __LINE__, mon_dst_srng);
  825. return;
  826. }
  827. hal_soc = soc->hal_soc;
  828. qdf_assert(hal_soc);
  829. qdf_spin_lock_bh(&pdev->mon_lock);
  830. if (qdf_unlikely(hal_srng_access_start(hal_soc, mon_dst_srng))) {
  831. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  832. "%s %d : HAL Monitor Destination Ring access Failed -- %pK",
  833. __func__, __LINE__, mon_dst_srng);
  834. return;
  835. }
  836. ppdu_id = pdev->ppdu_info.com_info.ppdu_id;
  837. rx_bufs_used = 0;
  838. rx_mon_stats = &pdev->rx_mon_stats;
  839. while (qdf_likely(rxdma_dst_ring_desc =
  840. hal_srng_dst_peek(hal_soc, mon_dst_srng))) {
  841. qdf_nbuf_t head_msdu, tail_msdu;
  842. uint32_t npackets;
  843. head_msdu = (qdf_nbuf_t) NULL;
  844. tail_msdu = (qdf_nbuf_t) NULL;
  845. rx_bufs_used += dp_rx_mon_mpdu_pop(soc, mac_id,
  846. rxdma_dst_ring_desc,
  847. &head_msdu, &tail_msdu,
  848. &npackets, &ppdu_id,
  849. &head, &tail);
  850. if (ppdu_id != pdev->ppdu_info.com_info.ppdu_id) {
  851. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  852. qdf_mem_zero(&(pdev->ppdu_info.rx_status),
  853. sizeof(pdev->ppdu_info.rx_status));
  854. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  855. "%s %d ppdu_id %x != ppdu_info.com_info .ppdu_id %x",
  856. __func__, __LINE__,
  857. ppdu_id, pdev->ppdu_info.com_info.ppdu_id);
  858. break;
  859. }
  860. if (qdf_likely((head_msdu != NULL) && (tail_msdu != NULL))) {
  861. rx_mon_stats->dest_mpdu_done++;
  862. dp_rx_mon_deliver(soc, mac_id, head_msdu, tail_msdu);
  863. }
  864. rxdma_dst_ring_desc = hal_srng_dst_get_next(hal_soc,
  865. mon_dst_srng);
  866. }
  867. hal_srng_access_end(hal_soc, mon_dst_srng);
  868. qdf_spin_unlock_bh(&pdev->mon_lock);
  869. if (rx_bufs_used) {
  870. rx_mon_stats->dest_ppdu_done++;
  871. dp_rx_buffers_replenish(soc, mac_id,
  872. dp_rxdma_get_mon_buf_ring(pdev, mac_for_pdev),
  873. dp_rx_get_desc_pool(soc, mac_id),
  874. rx_bufs_used, &head, &tail);
  875. }
  876. }
  877. #ifndef QCA_WIFI_QCA6390
  878. /**
  879. * dp_rx_pdev_mon_buf_attach() - Allocate the monitor descriptor pool
  880. *
  881. * @pdev: physical device handle
  882. * @mac_id: mac id
  883. *
  884. * Return: QDF_STATUS
  885. */
  886. static QDF_STATUS
  887. dp_rx_pdev_mon_buf_attach(struct dp_pdev *pdev, int mac_id) {
  888. uint8_t pdev_id = pdev->pdev_id;
  889. struct dp_soc *soc = pdev->soc;
  890. union dp_rx_desc_list_elem_t *desc_list = NULL;
  891. union dp_rx_desc_list_elem_t *tail = NULL;
  892. struct dp_srng *rxdma_srng;
  893. uint32_t rxdma_entries;
  894. struct rx_desc_pool *rx_desc_pool;
  895. QDF_STATUS status;
  896. uint8_t mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  897. rxdma_srng = &pdev->rxdma_mon_buf_ring[mac_for_pdev];
  898. rxdma_entries = rxdma_srng->alloc_size/hal_srng_get_entrysize(
  899. soc->hal_soc,
  900. RXDMA_MONITOR_BUF);
  901. rx_desc_pool = &soc->rx_desc_mon[mac_id];
  902. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  903. "%s: Mon RX Desc Pool[%d] allocation size=%d"
  904. , __func__, pdev_id, rxdma_entries*3);
  905. status = dp_rx_desc_pool_alloc(soc, mac_id,
  906. rxdma_entries*3, rx_desc_pool);
  907. if (!QDF_IS_STATUS_SUCCESS(status)) {
  908. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  909. "%s: dp_rx_desc_pool_alloc() failed ", __func__);
  910. return status;
  911. }
  912. rx_desc_pool->owner = HAL_RX_BUF_RBM_SW3_BM;
  913. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  914. "%s: Mon RX Buffers Replenish pdev_id=%d",
  915. __func__, pdev_id);
  916. status = dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool,
  917. rxdma_entries, &desc_list, &tail);
  918. if (!QDF_IS_STATUS_SUCCESS(status)) {
  919. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  920. "%s: dp_rx_buffers_replenish() failed",
  921. __func__);
  922. return status;
  923. }
  924. return QDF_STATUS_SUCCESS;
  925. }
  926. static QDF_STATUS
  927. dp_rx_pdev_mon_buf_detach(struct dp_pdev *pdev, int mac_id)
  928. {
  929. struct dp_soc *soc = pdev->soc;
  930. struct rx_desc_pool *rx_desc_pool;
  931. rx_desc_pool = &soc->rx_desc_mon[mac_id];
  932. if (rx_desc_pool->pool_size != 0)
  933. dp_rx_desc_pool_free(soc, mac_id, rx_desc_pool);
  934. return QDF_STATUS_SUCCESS;
  935. }
  936. /**
  937. * dp_mon_link_desc_pool_setup(): Allocate and setup link descriptor pool
  938. * that will be used by HW for various link
  939. * and queue descriptorsand managed by WBM
  940. *
  941. * @soc: soc handle
  942. * @mac_id: mac id
  943. *
  944. * Return: QDF_STATUS
  945. */
  946. static
  947. QDF_STATUS dp_mon_link_desc_pool_setup(struct dp_soc *soc, uint32_t mac_id)
  948. {
  949. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  950. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  951. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  952. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  953. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  954. uint32_t total_link_descs, total_mem_size;
  955. uint32_t num_link_desc_banks;
  956. uint32_t last_bank_size = 0;
  957. uint32_t entry_size, num_entries;
  958. void *mon_desc_srng;
  959. uint32_t num_replenish_buf;
  960. struct dp_srng *dp_srng;
  961. int i;
  962. qdf_dma_addr_t *baseaddr = NULL;
  963. dp_srng = &dp_pdev->rxdma_mon_desc_ring[mac_for_pdev];
  964. num_entries = dp_srng->alloc_size/hal_srng_get_entrysize(
  965. soc->hal_soc, RXDMA_MONITOR_DESC);
  966. /* Round up to power of 2 */
  967. total_link_descs = 1;
  968. while (total_link_descs < num_entries)
  969. total_link_descs <<= 1;
  970. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  971. "%s: total_link_descs: %u, link_desc_size: %d",
  972. __func__, total_link_descs, link_desc_size);
  973. total_mem_size = total_link_descs * link_desc_size;
  974. total_mem_size += link_desc_align;
  975. if (total_mem_size <= max_alloc_size) {
  976. num_link_desc_banks = 0;
  977. last_bank_size = total_mem_size;
  978. } else {
  979. num_link_desc_banks = (total_mem_size) /
  980. (max_alloc_size - link_desc_align);
  981. last_bank_size = total_mem_size %
  982. (max_alloc_size - link_desc_align);
  983. }
  984. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  985. "%s: total_mem_size: %d, num_link_desc_banks: %u",
  986. __func__, total_mem_size, num_link_desc_banks);
  987. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  988. "%s: max_alloc_size: %d last_bank_size: %d",
  989. __func__, max_alloc_size, last_bank_size);
  990. for (i = 0; i < num_link_desc_banks; i++) {
  991. baseaddr = &dp_pdev->link_desc_banks[mac_for_pdev][i].
  992. base_paddr_unaligned;
  993. if (!soc->dp_soc_reinit) {
  994. dp_pdev->link_desc_banks[mac_for_pdev][i].
  995. base_vaddr_unaligned =
  996. qdf_mem_alloc_consistent(soc->osdev,
  997. soc->osdev->dev,
  998. max_alloc_size,
  999. baseaddr);
  1000. if (!dp_pdev->link_desc_banks[mac_for_pdev][i].
  1001. base_vaddr_unaligned) {
  1002. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1003. QDF_TRACE_LEVEL_ERROR,
  1004. "%s: Link desc mem alloc failed",
  1005. __func__);
  1006. goto fail;
  1007. }
  1008. }
  1009. dp_pdev->link_desc_banks[mac_for_pdev][i].size = max_alloc_size;
  1010. dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr =
  1011. (void *)((unsigned long)
  1012. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1013. base_vaddr_unaligned) +
  1014. ((unsigned long)
  1015. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1016. base_vaddr_unaligned) %
  1017. link_desc_align));
  1018. dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr =
  1019. (unsigned long)
  1020. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1021. base_paddr_unaligned) +
  1022. ((unsigned long)
  1023. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr) -
  1024. (unsigned long)
  1025. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1026. base_vaddr_unaligned));
  1027. }
  1028. if (last_bank_size) {
  1029. /* Allocate last bank in case total memory required is not exact
  1030. * multiple of max_alloc_size
  1031. */
  1032. baseaddr = &dp_pdev->link_desc_banks[mac_for_pdev][i].
  1033. base_paddr_unaligned;
  1034. if (!soc->dp_soc_reinit) {
  1035. dp_pdev->link_desc_banks[mac_for_pdev][i].
  1036. base_vaddr_unaligned =
  1037. qdf_mem_alloc_consistent(soc->osdev,
  1038. soc->osdev->dev,
  1039. last_bank_size,
  1040. baseaddr);
  1041. if (!dp_pdev->link_desc_banks[mac_for_pdev][i].
  1042. base_vaddr_unaligned) {
  1043. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1044. QDF_TRACE_LEVEL_ERROR,
  1045. "%s: alloc fail:mon link desc pool",
  1046. __func__);
  1047. goto fail;
  1048. }
  1049. }
  1050. dp_pdev->link_desc_banks[mac_for_pdev][i].size = last_bank_size;
  1051. dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr =
  1052. (void *)((unsigned long)
  1053. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1054. base_vaddr_unaligned) +
  1055. ((unsigned long)
  1056. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1057. base_vaddr_unaligned) %
  1058. link_desc_align));
  1059. dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr =
  1060. (unsigned long)
  1061. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1062. base_paddr_unaligned) +
  1063. ((unsigned long)
  1064. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr) -
  1065. (unsigned long)
  1066. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1067. base_vaddr_unaligned));
  1068. }
  1069. /* Allocate and setup link descriptor idle list for HW internal use */
  1070. entry_size = hal_srng_get_entrysize(soc->hal_soc, RXDMA_MONITOR_DESC);
  1071. total_mem_size = entry_size * total_link_descs;
  1072. mon_desc_srng = dp_pdev->rxdma_mon_desc_ring[mac_for_pdev].hal_srng;
  1073. num_replenish_buf = 0;
  1074. if (total_mem_size <= max_alloc_size) {
  1075. void *desc;
  1076. for (i = 0;
  1077. i < MAX_MON_LINK_DESC_BANKS &&
  1078. dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr;
  1079. i++) {
  1080. uint32_t num_entries =
  1081. (dp_pdev->link_desc_banks[mac_for_pdev][i].size -
  1082. (unsigned long)
  1083. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr) -
  1084. (unsigned long)
  1085. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1086. base_vaddr_unaligned)) / link_desc_size;
  1087. unsigned long paddr =
  1088. (unsigned long)
  1089. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr);
  1090. unsigned long vaddr =
  1091. (unsigned long)
  1092. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr);
  1093. hal_srng_access_start_unlocked(soc->hal_soc,
  1094. mon_desc_srng);
  1095. while (num_entries && (desc =
  1096. hal_srng_src_get_next(soc->hal_soc,
  1097. mon_desc_srng))) {
  1098. hal_set_link_desc_addr(desc, i, paddr);
  1099. num_entries--;
  1100. num_replenish_buf++;
  1101. paddr += link_desc_size;
  1102. vaddr += link_desc_size;
  1103. }
  1104. hal_srng_access_end_unlocked(soc->hal_soc,
  1105. mon_desc_srng);
  1106. }
  1107. } else {
  1108. qdf_assert(0);
  1109. }
  1110. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  1111. "%s: successfully replenished %d buffer",
  1112. __func__, num_replenish_buf);
  1113. return QDF_STATUS_SUCCESS;
  1114. fail:
  1115. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  1116. if (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1117. base_vaddr_unaligned) {
  1118. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1119. dp_pdev->link_desc_banks[mac_for_pdev][i].size,
  1120. dp_pdev->link_desc_banks[mac_for_pdev][i].
  1121. base_vaddr_unaligned,
  1122. dp_pdev->link_desc_banks[mac_for_pdev][i].
  1123. base_paddr_unaligned, 0);
  1124. dp_pdev->link_desc_banks[mac_for_pdev][i].
  1125. base_vaddr_unaligned = NULL;
  1126. }
  1127. }
  1128. return QDF_STATUS_E_FAILURE;
  1129. }
  1130. /*
  1131. * Free link descriptor pool that was setup HW
  1132. */
  1133. static
  1134. void dp_mon_link_desc_pool_cleanup(struct dp_soc *soc, uint32_t mac_id)
  1135. {
  1136. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  1137. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  1138. int i;
  1139. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  1140. if (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1141. base_vaddr_unaligned) {
  1142. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1143. dp_pdev->link_desc_banks[mac_for_pdev][i].size,
  1144. dp_pdev->link_desc_banks[mac_for_pdev][i].
  1145. base_vaddr_unaligned,
  1146. dp_pdev->link_desc_banks[mac_for_pdev][i].
  1147. base_paddr_unaligned, 0);
  1148. dp_pdev->link_desc_banks[mac_for_pdev][i].
  1149. base_vaddr_unaligned = NULL;
  1150. }
  1151. }
  1152. }
  1153. #else
  1154. static
  1155. QDF_STATUS dp_mon_link_desc_pool_setup(struct dp_soc *soc, uint32_t mac_id)
  1156. {
  1157. return QDF_STATUS_SUCCESS;
  1158. }
  1159. static QDF_STATUS
  1160. dp_rx_pdev_mon_buf_attach(struct dp_pdev *pdev, int mac_id)
  1161. {
  1162. return QDF_STATUS_SUCCESS;
  1163. }
  1164. static
  1165. void dp_mon_link_desc_pool_cleanup(struct dp_soc *soc, uint32_t mac_id)
  1166. {
  1167. }
  1168. static QDF_STATUS
  1169. dp_rx_pdev_mon_buf_detach(struct dp_pdev *pdev, int mac_id)
  1170. {
  1171. return QDF_STATUS_SUCCESS;
  1172. }
  1173. #endif
  1174. /**
  1175. * dp_rx_pdev_mon_attach() - attach DP RX for monitor mode
  1176. * @pdev: core txrx pdev context
  1177. *
  1178. * This function will attach a DP RX for monitor mode instance into
  1179. * the main device (SOC) context. Will allocate dp rx resource and
  1180. * initialize resources.
  1181. *
  1182. * Return: QDF_STATUS_SUCCESS: success
  1183. * QDF_STATUS_E_RESOURCES: Error return
  1184. */
  1185. #ifndef DISABLE_MON_CONFIG
  1186. QDF_STATUS
  1187. dp_rx_pdev_mon_attach(struct dp_pdev *pdev) {
  1188. struct dp_soc *soc = pdev->soc;
  1189. QDF_STATUS status;
  1190. uint8_t pdev_id = pdev->pdev_id;
  1191. int mac_id;
  1192. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1193. "%s: pdev attach id=%d", __func__, pdev_id);
  1194. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1195. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  1196. status = dp_rx_pdev_mon_buf_attach(pdev, mac_for_pdev);
  1197. if (!QDF_IS_STATUS_SUCCESS(status)) {
  1198. QDF_TRACE(QDF_MODULE_ID_DP,
  1199. QDF_TRACE_LEVEL_ERROR,
  1200. "%s: dp_rx_pdev_mon_buf_attach() failed\n",
  1201. __func__);
  1202. return status;
  1203. }
  1204. status = dp_rx_pdev_mon_status_attach(pdev, mac_for_pdev);
  1205. if (!QDF_IS_STATUS_SUCCESS(status)) {
  1206. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1207. "%s: dp_rx_pdev_mon_status_attach() failed",
  1208. __func__);
  1209. return status;
  1210. }
  1211. status = dp_mon_link_desc_pool_setup(soc, mac_for_pdev);
  1212. if (!QDF_IS_STATUS_SUCCESS(status)) {
  1213. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1214. "%s: dp_mon_link_desc_pool_setup() failed",
  1215. __func__);
  1216. return status;
  1217. }
  1218. }
  1219. pdev->mon_last_linkdesc_paddr = 0;
  1220. pdev->mon_last_buf_cookie = DP_RX_DESC_COOKIE_MAX + 1;
  1221. qdf_spinlock_create(&pdev->mon_lock);
  1222. return QDF_STATUS_SUCCESS;
  1223. }
  1224. QDF_STATUS
  1225. dp_mon_link_free(struct dp_pdev *pdev) {
  1226. uint8_t pdev_id = pdev->pdev_id;
  1227. struct dp_soc *soc = pdev->soc;
  1228. int mac_id;
  1229. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1230. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  1231. dp_mon_link_desc_pool_cleanup(soc, mac_for_pdev);
  1232. }
  1233. return QDF_STATUS_SUCCESS;
  1234. }
  1235. /**
  1236. * dp_rx_pdev_mon_detach() - detach dp rx for monitor mode
  1237. * @pdev: core txrx pdev context
  1238. *
  1239. * This function will detach DP RX for monitor mode from
  1240. * main device context. will free DP Rx resources for
  1241. * monitor mode
  1242. *
  1243. * Return: QDF_STATUS_SUCCESS: success
  1244. * QDF_STATUS_E_RESOURCES: Error return
  1245. */
  1246. QDF_STATUS
  1247. dp_rx_pdev_mon_detach(struct dp_pdev *pdev) {
  1248. uint8_t pdev_id = pdev->pdev_id;
  1249. int mac_id;
  1250. qdf_spinlock_destroy(&pdev->mon_lock);
  1251. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1252. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  1253. dp_rx_pdev_mon_status_detach(pdev, mac_for_pdev);
  1254. dp_rx_pdev_mon_buf_detach(pdev, mac_for_pdev);
  1255. }
  1256. return QDF_STATUS_SUCCESS;
  1257. }
  1258. #else
  1259. QDF_STATUS
  1260. dp_rx_pdev_mon_attach(struct dp_pdev *pdev) {
  1261. return QDF_STATUS_SUCCESS;
  1262. }
  1263. QDF_STATUS
  1264. dp_rx_pdev_mon_detach(struct dp_pdev *pdev) {
  1265. return QDF_STATUS_SUCCESS;
  1266. }
  1267. QDF_STATUS
  1268. dp_mon_link_free(struct dp_pdev *pdev) {
  1269. return QDF_STATUS_SUCCESS;
  1270. }
  1271. #endif /* DISABLE_MON_CONFIG */