wcd9xxx-utils.c 29 KB

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  1. /* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/of_gpio.h>
  15. #include <linux/of_irq.h>
  16. #include <linux/of_device.h>
  17. #include <linux/slab.h>
  18. #include <linux/regmap.h>
  19. #include <linux/delay.h>
  20. #include <linux/sched.h>
  21. #include <linux/mfd/core.h>
  22. #include "core.h"
  23. #include "msm-cdc-supply.h"
  24. #include "msm-cdc-pinctrl.h"
  25. #include "pdata.h"
  26. #include "wcd9xxx-irq.h"
  27. #include "wcd9xxx-utils.h"
  28. #define REG_BYTES 2
  29. #define VAL_BYTES 1
  30. /*
  31. * Page Register Address that APP Proc uses to
  32. * access WCD9335 Codec registers is identified
  33. * as 0x00
  34. */
  35. #define PAGE_REG_ADDR 0x00
  36. static enum wcd9xxx_intf_status wcd9xxx_intf = -1;
  37. static struct mfd_cell tavil_devs[] = {
  38. {
  39. .name = "qcom-wcd-pinctrl",
  40. .of_compatible = "qcom,wcd-pinctrl",
  41. },
  42. {
  43. .name = "tavil_codec",
  44. },
  45. };
  46. static struct mfd_cell tasha_devs[] = {
  47. {
  48. .name = "tasha_codec",
  49. },
  50. };
  51. static struct mfd_cell tomtom_devs[] = {
  52. {
  53. .name = "tomtom_codec",
  54. },
  55. };
  56. static int wcd9xxx_read_of_property_u32(struct device *dev, const char *name,
  57. u32 *val)
  58. {
  59. int rc = 0;
  60. rc = of_property_read_u32(dev->of_node, name, val);
  61. if (rc)
  62. dev_err(dev, "%s: Looking up %s property in node %s failed",
  63. __func__, name, dev->of_node->full_name);
  64. return rc;
  65. }
  66. static void wcd9xxx_dt_parse_micbias_info(struct device *dev,
  67. struct wcd9xxx_micbias_setting *mb)
  68. {
  69. u32 prop_val;
  70. int rc;
  71. if (of_find_property(dev->of_node, "qcom,cdc-micbias-ldoh-v", NULL)) {
  72. rc = wcd9xxx_read_of_property_u32(dev,
  73. "qcom,cdc-micbias-ldoh-v",
  74. &prop_val);
  75. if (!rc)
  76. mb->ldoh_v = (u8)prop_val;
  77. }
  78. /* MB1 */
  79. if (of_find_property(dev->of_node, "qcom,cdc-micbias-cfilt1-mv",
  80. NULL)) {
  81. rc = wcd9xxx_read_of_property_u32(dev,
  82. "qcom,cdc-micbias-cfilt1-mv",
  83. &prop_val);
  84. if (!rc)
  85. mb->cfilt1_mv = prop_val;
  86. rc = wcd9xxx_read_of_property_u32(dev,
  87. "qcom,cdc-micbias1-cfilt-sel",
  88. &prop_val);
  89. if (!rc)
  90. mb->bias1_cfilt_sel = (u8)prop_val;
  91. } else if (of_find_property(dev->of_node, "qcom,cdc-micbias1-mv",
  92. NULL)) {
  93. rc = wcd9xxx_read_of_property_u32(dev,
  94. "qcom,cdc-micbias1-mv",
  95. &prop_val);
  96. if (!rc)
  97. mb->micb1_mv = prop_val;
  98. } else {
  99. dev_info(dev, "%s: Micbias1 DT property not found\n",
  100. __func__);
  101. }
  102. /* MB2 */
  103. if (of_find_property(dev->of_node, "qcom,cdc-micbias-cfilt2-mv",
  104. NULL)) {
  105. rc = wcd9xxx_read_of_property_u32(dev,
  106. "qcom,cdc-micbias-cfilt2-mv",
  107. &prop_val);
  108. if (!rc)
  109. mb->cfilt2_mv = prop_val;
  110. rc = wcd9xxx_read_of_property_u32(dev,
  111. "qcom,cdc-micbias2-cfilt-sel",
  112. &prop_val);
  113. if (!rc)
  114. mb->bias2_cfilt_sel = (u8)prop_val;
  115. } else if (of_find_property(dev->of_node, "qcom,cdc-micbias2-mv",
  116. NULL)) {
  117. rc = wcd9xxx_read_of_property_u32(dev,
  118. "qcom,cdc-micbias2-mv",
  119. &prop_val);
  120. if (!rc)
  121. mb->micb2_mv = prop_val;
  122. } else {
  123. dev_info(dev, "%s: Micbias2 DT property not found\n",
  124. __func__);
  125. }
  126. /* MB3 */
  127. if (of_find_property(dev->of_node, "qcom,cdc-micbias-cfilt3-mv",
  128. NULL)) {
  129. rc = wcd9xxx_read_of_property_u32(dev,
  130. "qcom,cdc-micbias-cfilt3-mv",
  131. &prop_val);
  132. if (!rc)
  133. mb->cfilt3_mv = prop_val;
  134. rc = wcd9xxx_read_of_property_u32(dev,
  135. "qcom,cdc-micbias3-cfilt-sel",
  136. &prop_val);
  137. if (!rc)
  138. mb->bias3_cfilt_sel = (u8)prop_val;
  139. } else if (of_find_property(dev->of_node, "qcom,cdc-micbias3-mv",
  140. NULL)) {
  141. rc = wcd9xxx_read_of_property_u32(dev,
  142. "qcom,cdc-micbias3-mv",
  143. &prop_val);
  144. if (!rc)
  145. mb->micb3_mv = prop_val;
  146. } else {
  147. dev_info(dev, "%s: Micbias3 DT property not found\n",
  148. __func__);
  149. }
  150. /* MB4 */
  151. if (of_find_property(dev->of_node, "qcom,cdc-micbias4-cfilt-sel",
  152. NULL)) {
  153. rc = wcd9xxx_read_of_property_u32(dev,
  154. "qcom,cdc-micbias4-cfilt-sel",
  155. &prop_val);
  156. if (!rc)
  157. mb->bias4_cfilt_sel = (u8)prop_val;
  158. } else if (of_find_property(dev->of_node, "qcom,cdc-micbias4-mv",
  159. NULL)) {
  160. rc = wcd9xxx_read_of_property_u32(dev,
  161. "qcom,cdc-micbias4-mv",
  162. &prop_val);
  163. if (!rc)
  164. mb->micb4_mv = prop_val;
  165. } else {
  166. dev_info(dev, "%s: Micbias4 DT property not found\n",
  167. __func__);
  168. }
  169. mb->bias1_cap_mode =
  170. (of_property_read_bool(dev->of_node, "qcom,cdc-micbias1-ext-cap") ?
  171. MICBIAS_EXT_BYP_CAP : MICBIAS_NO_EXT_BYP_CAP);
  172. mb->bias2_cap_mode =
  173. (of_property_read_bool(dev->of_node, "qcom,cdc-micbias2-ext-cap") ?
  174. MICBIAS_EXT_BYP_CAP : MICBIAS_NO_EXT_BYP_CAP);
  175. mb->bias3_cap_mode =
  176. (of_property_read_bool(dev->of_node, "qcom,cdc-micbias3-ext-cap") ?
  177. MICBIAS_EXT_BYP_CAP : MICBIAS_NO_EXT_BYP_CAP);
  178. mb->bias4_cap_mode =
  179. (of_property_read_bool(dev->of_node, "qcom,cdc-micbias4-ext-cap") ?
  180. MICBIAS_EXT_BYP_CAP : MICBIAS_NO_EXT_BYP_CAP);
  181. mb->bias2_is_headset_only =
  182. of_property_read_bool(dev->of_node,
  183. "qcom,cdc-micbias2-headset-only");
  184. /* Print micbias info */
  185. dev_dbg(dev, "%s: ldoh_v %u cfilt1_mv %u cfilt2_mv %u cfilt3_mv %u",
  186. __func__, (u32)mb->ldoh_v, (u32)mb->cfilt1_mv,
  187. (u32)mb->cfilt2_mv, (u32)mb->cfilt3_mv);
  188. dev_dbg(dev, "%s: micb1_mv %u micb2_mv %u micb3_mv %u micb4_mv %u",
  189. __func__, mb->micb1_mv, mb->micb2_mv,
  190. mb->micb3_mv, mb->micb4_mv);
  191. dev_dbg(dev, "%s: bias1_cfilt_sel %u bias2_cfilt_sel %u\n",
  192. __func__, (u32)mb->bias1_cfilt_sel, (u32)mb->bias2_cfilt_sel);
  193. dev_dbg(dev, "%s: bias3_cfilt_sel %u bias4_cfilt_sel %u\n",
  194. __func__, (u32)mb->bias3_cfilt_sel, (u32)mb->bias4_cfilt_sel);
  195. dev_dbg(dev, "%s: bias1_ext_cap %d bias2_ext_cap %d\n",
  196. __func__, mb->bias1_cap_mode, mb->bias2_cap_mode);
  197. dev_dbg(dev, "%s: bias3_ext_cap %d bias4_ext_cap %d\n",
  198. __func__, mb->bias3_cap_mode, mb->bias4_cap_mode);
  199. dev_dbg(dev, "%s: bias2_is_headset_only %d\n",
  200. __func__, mb->bias2_is_headset_only);
  201. }
  202. /*
  203. * wcd9xxx_validate_dmic_sample_rate:
  204. * Given the dmic_sample_rate and mclk rate, validate the
  205. * dmic_sample_rate. If dmic rate is found to be invalid,
  206. * assign the dmic rate as undefined, so individual codec
  207. * drivers can use their own defaults
  208. * @dev: the device for which the dmic is to be configured
  209. * @dmic_sample_rate: The input dmic_sample_rate
  210. * @mclk_rate: The input codec mclk rate
  211. * @dmic_rate_type: String to indicate the type of dmic sample
  212. * rate, used for debug/error logging.
  213. */
  214. static u32 wcd9xxx_validate_dmic_sample_rate(struct device *dev,
  215. u32 dmic_sample_rate, u32 mclk_rate,
  216. const char *dmic_rate_type)
  217. {
  218. u32 div_factor;
  219. if (dmic_sample_rate == WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED ||
  220. mclk_rate % dmic_sample_rate != 0)
  221. goto undefined_rate;
  222. div_factor = mclk_rate / dmic_sample_rate;
  223. switch (div_factor) {
  224. case 2:
  225. case 3:
  226. case 4:
  227. case 8:
  228. case 16:
  229. /* Valid dmic DIV factors */
  230. dev_dbg(dev, "%s: DMIC_DIV = %u, mclk_rate = %u\n",
  231. __func__, div_factor, mclk_rate);
  232. break;
  233. case 6:
  234. /*
  235. * DIV 6 is valid for both 9.6MHz and 12.288MHz
  236. * MCLK on Tavil. Older codecs support DIV6 only
  237. * for 12.288MHz MCLK.
  238. */
  239. if ((mclk_rate == WCD9XXX_MCLK_CLK_9P6HZ) &&
  240. (of_device_is_compatible(dev->of_node,
  241. "qcom,tavil-slim-pgd")))
  242. dev_dbg(dev, "%s: DMIC_DIV = %u, mclk_rate = %u\n",
  243. __func__, div_factor, mclk_rate);
  244. else if (mclk_rate != WCD9XXX_MCLK_CLK_12P288MHZ)
  245. goto undefined_rate;
  246. break;
  247. default:
  248. /* Any other DIV factor is invalid */
  249. goto undefined_rate;
  250. }
  251. return dmic_sample_rate;
  252. undefined_rate:
  253. dev_dbg(dev, "%s: Invalid %s = %d, for mclk %d\n",
  254. __func__, dmic_rate_type, dmic_sample_rate, mclk_rate);
  255. dmic_sample_rate = WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED;
  256. return dmic_sample_rate;
  257. }
  258. /*
  259. * wcd9xxx_populate_dt_data:
  260. * Parse device tree properties for the given codec device
  261. *
  262. * @dev: pointer to codec device
  263. *
  264. * Returns pointer to the platform data resulting from parsing
  265. * device tree.
  266. */
  267. struct wcd9xxx_pdata *wcd9xxx_populate_dt_data(struct device *dev)
  268. {
  269. struct wcd9xxx_pdata *pdata;
  270. u32 dmic_sample_rate = WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED;
  271. u32 mad_dmic_sample_rate = WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED;
  272. u32 ecpp_dmic_sample_rate = WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED;
  273. u32 dmic_clk_drive = WCD9XXX_DMIC_CLK_DRIVE_UNDEFINED;
  274. u32 prop_val;
  275. int rc = 0;
  276. if (!dev || !dev->of_node)
  277. return NULL;
  278. pdata = devm_kzalloc(dev, sizeof(struct wcd9xxx_pdata),
  279. GFP_KERNEL);
  280. if (!pdata)
  281. return NULL;
  282. /* Parse power supplies */
  283. msm_cdc_get_power_supplies(dev, &pdata->regulator,
  284. &pdata->num_supplies);
  285. if (!pdata->regulator || (pdata->num_supplies <= 0)) {
  286. dev_err(dev, "%s: no power supplies defined for codec\n",
  287. __func__);
  288. goto err_power_sup;
  289. }
  290. /* Parse micbias info */
  291. wcd9xxx_dt_parse_micbias_info(dev, &pdata->micbias);
  292. pdata->wcd_rst_np = of_parse_phandle(dev->of_node,
  293. "qcom,wcd-rst-gpio-node", 0);
  294. if (!pdata->wcd_rst_np) {
  295. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  296. __func__, "qcom,wcd-rst-gpio-node",
  297. dev->of_node->full_name);
  298. goto err_parse_dt_prop;
  299. }
  300. if (!(wcd9xxx_read_of_property_u32(dev, "qcom,cdc-mclk-clk-rate",
  301. &prop_val)))
  302. pdata->mclk_rate = prop_val;
  303. if (pdata->mclk_rate != WCD9XXX_MCLK_CLK_9P6HZ &&
  304. pdata->mclk_rate != WCD9XXX_MCLK_CLK_12P288MHZ) {
  305. dev_err(dev, "%s: Invalid mclk_rate = %u\n", __func__,
  306. pdata->mclk_rate);
  307. goto err_parse_dt_prop;
  308. }
  309. if (!(wcd9xxx_read_of_property_u32(dev, "qcom,cdc-dmic-sample-rate",
  310. &prop_val)))
  311. dmic_sample_rate = prop_val;
  312. pdata->dmic_sample_rate = wcd9xxx_validate_dmic_sample_rate(dev,
  313. dmic_sample_rate,
  314. pdata->mclk_rate,
  315. "audio_dmic_rate");
  316. if (!(wcd9xxx_read_of_property_u32(dev, "qcom,cdc-mad-dmic-rate",
  317. &prop_val)))
  318. mad_dmic_sample_rate = prop_val;
  319. pdata->mad_dmic_sample_rate = wcd9xxx_validate_dmic_sample_rate(dev,
  320. mad_dmic_sample_rate,
  321. pdata->mclk_rate,
  322. "mad_dmic_rate");
  323. if (of_find_property(dev->of_node, "qcom,cdc-ecpp-dmic-rate", NULL)) {
  324. rc = wcd9xxx_read_of_property_u32(dev,
  325. "qcom,cdc-ecpp-dmic-rate",
  326. &prop_val);
  327. if (!rc)
  328. ecpp_dmic_sample_rate = prop_val;
  329. }
  330. pdata->ecpp_dmic_sample_rate = wcd9xxx_validate_dmic_sample_rate(dev,
  331. ecpp_dmic_sample_rate,
  332. pdata->mclk_rate,
  333. "ecpp_dmic_rate");
  334. if (!(of_property_read_u32(dev->of_node,
  335. "qcom,cdc-dmic-clk-drv-strength",
  336. &prop_val))) {
  337. dmic_clk_drive = prop_val;
  338. if (dmic_clk_drive != 2 && dmic_clk_drive != 4 &&
  339. dmic_clk_drive != 8 && dmic_clk_drive != 16)
  340. dev_err(dev, "Invalid cdc-dmic-clk-drv-strength %d\n",
  341. dmic_clk_drive);
  342. }
  343. pdata->dmic_clk_drv = dmic_clk_drive;
  344. return pdata;
  345. err_parse_dt_prop:
  346. devm_kfree(dev, pdata->regulator);
  347. pdata->regulator = NULL;
  348. pdata->num_supplies = 0;
  349. err_power_sup:
  350. devm_kfree(dev, pdata);
  351. return NULL;
  352. }
  353. EXPORT_SYMBOL(wcd9xxx_populate_dt_data);
  354. static bool is_wcd9xxx_reg_power_down(struct wcd9xxx *wcd9xxx, u16 rreg)
  355. {
  356. bool ret = false;
  357. int i;
  358. struct wcd9xxx_power_region *wcd9xxx_pwr;
  359. if (!wcd9xxx)
  360. return ret;
  361. for (i = 0; i < WCD9XXX_MAX_PWR_REGIONS; i++) {
  362. wcd9xxx_pwr = wcd9xxx->wcd9xxx_pwr[i];
  363. if (!wcd9xxx_pwr)
  364. continue;
  365. if (((wcd9xxx_pwr->pwr_collapse_reg_min == 0) &&
  366. (wcd9xxx_pwr->pwr_collapse_reg_max == 0)) ||
  367. (wcd9xxx_pwr->power_state ==
  368. WCD_REGION_POWER_COLLAPSE_REMOVE))
  369. ret = false;
  370. else if (((wcd9xxx_pwr->power_state ==
  371. WCD_REGION_POWER_DOWN) ||
  372. (wcd9xxx_pwr->power_state ==
  373. WCD_REGION_POWER_COLLAPSE_BEGIN)) &&
  374. (rreg >= wcd9xxx_pwr->pwr_collapse_reg_min) &&
  375. (rreg <= wcd9xxx_pwr->pwr_collapse_reg_max))
  376. ret = true;
  377. }
  378. return ret;
  379. }
  380. /*
  381. * wcd9xxx_page_write:
  382. * Retrieve page number from register and
  383. * write that page number to the page address.
  384. * Called under io_lock acquisition.
  385. *
  386. * @wcd9xxx: pointer to wcd9xxx
  387. * @reg: Register address from which page number is retrieved
  388. *
  389. * Returns 0 for success and negative error code for failure.
  390. */
  391. int wcd9xxx_page_write(struct wcd9xxx *wcd9xxx, unsigned short *reg)
  392. {
  393. int ret = 0;
  394. unsigned short c_reg, reg_addr;
  395. u8 pg_num, prev_pg_num;
  396. if (wcd9xxx->type != WCD9335 && wcd9xxx->type != WCD934X)
  397. return ret;
  398. c_reg = *reg;
  399. pg_num = c_reg >> 8;
  400. reg_addr = c_reg & 0xff;
  401. if (wcd9xxx->prev_pg_valid) {
  402. prev_pg_num = wcd9xxx->prev_pg;
  403. if (prev_pg_num != pg_num) {
  404. ret = wcd9xxx->write_dev(
  405. wcd9xxx, PAGE_REG_ADDR, 1,
  406. (void *) &pg_num, false);
  407. if (ret < 0)
  408. pr_err("page write error, pg_num: 0x%x\n",
  409. pg_num);
  410. else {
  411. wcd9xxx->prev_pg = pg_num;
  412. dev_dbg(wcd9xxx->dev, "%s: Page 0x%x Write to 0x00\n",
  413. __func__, pg_num);
  414. }
  415. }
  416. } else {
  417. ret = wcd9xxx->write_dev(
  418. wcd9xxx, PAGE_REG_ADDR, 1, (void *) &pg_num,
  419. false);
  420. if (ret < 0)
  421. pr_err("page write error, pg_num: 0x%x\n", pg_num);
  422. else {
  423. wcd9xxx->prev_pg = pg_num;
  424. wcd9xxx->prev_pg_valid = true;
  425. dev_dbg(wcd9xxx->dev, "%s: Page 0x%x Write to 0x00\n",
  426. __func__, pg_num);
  427. }
  428. }
  429. *reg = reg_addr;
  430. return ret;
  431. }
  432. EXPORT_SYMBOL(wcd9xxx_page_write);
  433. static int regmap_bus_read(void *context, const void *reg, size_t reg_size,
  434. void *val, size_t val_size)
  435. {
  436. struct device *dev = context;
  437. struct wcd9xxx *wcd9xxx = dev_get_drvdata(dev);
  438. unsigned short c_reg, rreg;
  439. int ret, i;
  440. if (!wcd9xxx) {
  441. dev_err(dev, "%s: wcd9xxx is NULL\n", __func__);
  442. return -EINVAL;
  443. }
  444. if (!reg || !val) {
  445. dev_err(dev, "%s: reg or val is NULL\n", __func__);
  446. return -EINVAL;
  447. }
  448. if (reg_size != REG_BYTES) {
  449. dev_err(dev, "%s: register size %zd bytes, not supported\n",
  450. __func__, reg_size);
  451. return -EINVAL;
  452. }
  453. mutex_lock(&wcd9xxx->io_lock);
  454. c_reg = *(u16 *)reg;
  455. rreg = c_reg;
  456. if (is_wcd9xxx_reg_power_down(wcd9xxx, rreg)) {
  457. ret = 0;
  458. for (i = 0; i < val_size; i++)
  459. ((u8 *)val)[i] = 0;
  460. goto err;
  461. }
  462. ret = wcd9xxx_page_write(wcd9xxx, &c_reg);
  463. if (ret)
  464. goto err;
  465. ret = wcd9xxx->read_dev(wcd9xxx, c_reg, val_size, val, false);
  466. if (ret < 0)
  467. dev_err(dev, "%s: Codec read failed (%d), reg: 0x%x, size:%zd\n",
  468. __func__, ret, rreg, val_size);
  469. else {
  470. for (i = 0; i < val_size; i++)
  471. dev_dbg(dev, "%s: Read 0x%02x from 0x%x\n",
  472. __func__, ((u8 *)val)[i], rreg + i);
  473. }
  474. err:
  475. mutex_unlock(&wcd9xxx->io_lock);
  476. return ret;
  477. }
  478. static int regmap_bus_gather_write(void *context,
  479. const void *reg, size_t reg_size,
  480. const void *val, size_t val_size)
  481. {
  482. struct device *dev = context;
  483. struct wcd9xxx *wcd9xxx = dev_get_drvdata(dev);
  484. unsigned short c_reg, rreg;
  485. int ret, i;
  486. if (!wcd9xxx) {
  487. dev_err(dev, "%s: wcd9xxx is NULL\n", __func__);
  488. return -EINVAL;
  489. }
  490. if (!reg || !val) {
  491. dev_err(dev, "%s: reg or val is NULL\n", __func__);
  492. return -EINVAL;
  493. }
  494. if (reg_size != REG_BYTES) {
  495. dev_err(dev, "%s: register size %zd bytes, not supported\n",
  496. __func__, reg_size);
  497. return -EINVAL;
  498. }
  499. mutex_lock(&wcd9xxx->io_lock);
  500. c_reg = *(u16 *)reg;
  501. rreg = c_reg;
  502. if (is_wcd9xxx_reg_power_down(wcd9xxx, rreg)) {
  503. ret = 0;
  504. goto err;
  505. }
  506. ret = wcd9xxx_page_write(wcd9xxx, &c_reg);
  507. if (ret)
  508. goto err;
  509. for (i = 0; i < val_size; i++)
  510. dev_dbg(dev, "Write %02x to 0x%x\n", ((u8 *)val)[i],
  511. rreg + i);
  512. ret = wcd9xxx->write_dev(wcd9xxx, c_reg, val_size, (void *) val,
  513. false);
  514. if (ret < 0)
  515. dev_err(dev, "%s: Codec write failed (%d), reg:0x%x, size:%zd\n",
  516. __func__, ret, rreg, val_size);
  517. err:
  518. mutex_unlock(&wcd9xxx->io_lock);
  519. return ret;
  520. }
  521. static int regmap_bus_write(void *context, const void *data, size_t count)
  522. {
  523. struct device *dev = context;
  524. struct wcd9xxx *wcd9xxx = dev_get_drvdata(dev);
  525. if (!wcd9xxx)
  526. return -EINVAL;
  527. WARN_ON(count < REG_BYTES);
  528. if (count > (REG_BYTES + VAL_BYTES)) {
  529. if (wcd9xxx->multi_reg_write)
  530. return wcd9xxx->multi_reg_write(wcd9xxx,
  531. data, count);
  532. } else
  533. return regmap_bus_gather_write(context, data, REG_BYTES,
  534. data + REG_BYTES,
  535. count - REG_BYTES);
  536. dev_err(dev, "%s: bus multi reg write failure\n", __func__);
  537. return -EINVAL;
  538. }
  539. static struct regmap_bus regmap_bus_config = {
  540. .write = regmap_bus_write,
  541. .gather_write = regmap_bus_gather_write,
  542. .read = regmap_bus_read,
  543. .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
  544. .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
  545. };
  546. /*
  547. * wcd9xxx_regmap_init:
  548. * Initialize wcd9xxx register map
  549. *
  550. * @dev: pointer to wcd device
  551. * @config: pointer to register map config
  552. *
  553. * Returns pointer to regmap structure for success
  554. * or NULL in case of failure.
  555. */
  556. struct regmap *wcd9xxx_regmap_init(struct device *dev,
  557. const struct regmap_config *config)
  558. {
  559. return devm_regmap_init(dev, &regmap_bus_config, dev, config);
  560. }
  561. EXPORT_SYMBOL(wcd9xxx_regmap_init);
  562. /*
  563. * wcd9xxx_reset:
  564. * Reset wcd9xxx codec
  565. *
  566. * @dev: pointer to wcd device
  567. *
  568. * Returns 0 for success or negative error code in case of failure
  569. */
  570. int wcd9xxx_reset(struct device *dev)
  571. {
  572. struct wcd9xxx *wcd9xxx;
  573. int rc;
  574. int value;
  575. if (!dev)
  576. return -ENODEV;
  577. wcd9xxx = dev_get_drvdata(dev);
  578. if (!wcd9xxx)
  579. return -EINVAL;
  580. if (!wcd9xxx->wcd_rst_np) {
  581. dev_err(dev, "%s: reset gpio device node not specified\n",
  582. __func__);
  583. return -EINVAL;
  584. }
  585. value = msm_cdc_pinctrl_get_state(wcd9xxx->wcd_rst_np);
  586. if (value > 0) {
  587. wcd9xxx->avoid_cdc_rstlow = 1;
  588. return 0;
  589. }
  590. rc = msm_cdc_pinctrl_select_sleep_state(wcd9xxx->wcd_rst_np);
  591. if (rc) {
  592. dev_err(dev, "%s: wcd sleep state request fail!\n",
  593. __func__);
  594. return rc;
  595. }
  596. /* 20ms sleep required after pulling the reset gpio to LOW */
  597. msleep(20);
  598. rc = msm_cdc_pinctrl_select_active_state(wcd9xxx->wcd_rst_np);
  599. if (rc) {
  600. dev_err(dev, "%s: wcd active state request fail!\n",
  601. __func__);
  602. return rc;
  603. }
  604. msleep(20);
  605. return rc;
  606. }
  607. EXPORT_SYMBOL(wcd9xxx_reset);
  608. /*
  609. * wcd9xxx_reset_low:
  610. * Pull the wcd9xxx codec reset_n to low
  611. *
  612. * @dev: pointer to wcd device
  613. *
  614. * Returns 0 for success or negative error code in case of failure
  615. */
  616. int wcd9xxx_reset_low(struct device *dev)
  617. {
  618. struct wcd9xxx *wcd9xxx;
  619. int rc;
  620. if (!dev)
  621. return -ENODEV;
  622. wcd9xxx = dev_get_drvdata(dev);
  623. if (!wcd9xxx)
  624. return -EINVAL;
  625. if (!wcd9xxx->wcd_rst_np) {
  626. dev_err(dev, "%s: reset gpio device node not specified\n",
  627. __func__);
  628. return -EINVAL;
  629. }
  630. if (wcd9xxx->avoid_cdc_rstlow) {
  631. wcd9xxx->avoid_cdc_rstlow = 0;
  632. dev_dbg(dev, "%s: avoid pull down of reset GPIO\n", __func__);
  633. return 0;
  634. }
  635. rc = msm_cdc_pinctrl_select_sleep_state(wcd9xxx->wcd_rst_np);
  636. if (rc)
  637. dev_err(dev, "%s: wcd sleep state request fail!\n",
  638. __func__);
  639. return rc;
  640. }
  641. EXPORT_SYMBOL(wcd9xxx_reset_low);
  642. /*
  643. * wcd9xxx_bringup:
  644. * Toggle reset analog and digital cores of wcd9xxx codec
  645. *
  646. * @dev: pointer to wcd device
  647. *
  648. * Returns 0 for success or negative error code in case of failure
  649. */
  650. int wcd9xxx_bringup(struct device *dev)
  651. {
  652. struct wcd9xxx *wcd9xxx;
  653. int rc;
  654. codec_bringup_fn cdc_bup_fn;
  655. if (!dev)
  656. return -ENODEV;
  657. wcd9xxx = dev_get_drvdata(dev);
  658. if (!wcd9xxx)
  659. return -EINVAL;
  660. cdc_bup_fn = wcd9xxx_bringup_fn(wcd9xxx->type);
  661. if (!cdc_bup_fn) {
  662. dev_err(dev, "%s: Codec bringup fn NULL!\n",
  663. __func__);
  664. return -EINVAL;
  665. }
  666. rc = cdc_bup_fn(wcd9xxx);
  667. if (rc)
  668. dev_err(dev, "%s: Codec bringup error, rc: %d\n",
  669. __func__, rc);
  670. return rc;
  671. }
  672. EXPORT_SYMBOL(wcd9xxx_bringup);
  673. /*
  674. * wcd9xxx_bringup:
  675. * Set analog and digital cores of wcd9xxx codec in reset state
  676. *
  677. * @dev: pointer to wcd device
  678. *
  679. * Returns 0 for success or negative error code in case of failure
  680. */
  681. int wcd9xxx_bringdown(struct device *dev)
  682. {
  683. struct wcd9xxx *wcd9xxx;
  684. int rc;
  685. codec_bringdown_fn cdc_bdown_fn;
  686. if (!dev)
  687. return -ENODEV;
  688. wcd9xxx = dev_get_drvdata(dev);
  689. if (!wcd9xxx)
  690. return -EINVAL;
  691. cdc_bdown_fn = wcd9xxx_bringdown_fn(wcd9xxx->type);
  692. if (!cdc_bdown_fn) {
  693. dev_err(dev, "%s: Codec bring down fn NULL!\n",
  694. __func__);
  695. return -EINVAL;
  696. }
  697. rc = cdc_bdown_fn(wcd9xxx);
  698. if (rc)
  699. dev_err(dev, "%s: Codec bring down error, rc: %d\n",
  700. __func__, rc);
  701. return rc;
  702. }
  703. EXPORT_SYMBOL(wcd9xxx_bringdown);
  704. /*
  705. * wcd9xxx_get_codec_info:
  706. * Fill codec specific information like interrupts, version
  707. *
  708. * @dev: pointer to wcd device
  709. *
  710. * Returns 0 for success or negative error code in case of failure
  711. */
  712. int wcd9xxx_get_codec_info(struct device *dev)
  713. {
  714. struct wcd9xxx *wcd9xxx;
  715. int rc;
  716. codec_type_fn cdc_type_fn;
  717. struct wcd9xxx_codec_type *cinfo;
  718. if (!dev)
  719. return -ENODEV;
  720. wcd9xxx = dev_get_drvdata(dev);
  721. if (!wcd9xxx)
  722. return -EINVAL;
  723. cdc_type_fn = wcd9xxx_get_codec_info_fn(wcd9xxx->type);
  724. if (!cdc_type_fn) {
  725. dev_err(dev, "%s: Codec fill type fn NULL!\n",
  726. __func__);
  727. return -EINVAL;
  728. }
  729. cinfo = wcd9xxx->codec_type;
  730. if (!cinfo)
  731. return -EINVAL;
  732. rc = cdc_type_fn(wcd9xxx, cinfo);
  733. if (rc) {
  734. dev_err(dev, "%s: Codec type fill failed, rc:%d\n",
  735. __func__, rc);
  736. return rc;
  737. }
  738. switch (wcd9xxx->type) {
  739. case WCD934X:
  740. cinfo->dev = tavil_devs;
  741. cinfo->size = ARRAY_SIZE(tavil_devs);
  742. break;
  743. case WCD9335:
  744. cinfo->dev = tasha_devs;
  745. cinfo->size = ARRAY_SIZE(tasha_devs);
  746. break;
  747. case WCD9330:
  748. cinfo->dev = tomtom_devs;
  749. cinfo->size = ARRAY_SIZE(tomtom_devs);
  750. break;
  751. default:
  752. cinfo->dev = NULL;
  753. cinfo->size = 0;
  754. break;
  755. }
  756. return rc;
  757. }
  758. EXPORT_SYMBOL(wcd9xxx_get_codec_info);
  759. /*
  760. * wcd9xxx_core_irq_init:
  761. * Initialize wcd9xxx codec irq instance
  762. *
  763. * @wcd9xxx_core_res: pointer to wcd core resource
  764. *
  765. * Returns 0 for success or negative error code in case of failure
  766. */
  767. int wcd9xxx_core_irq_init(
  768. struct wcd9xxx_core_resource *wcd9xxx_core_res)
  769. {
  770. int ret = 0;
  771. if (!wcd9xxx_core_res)
  772. return -EINVAL;
  773. if (wcd9xxx_core_res->irq != 1) {
  774. ret = wcd9xxx_irq_init(wcd9xxx_core_res);
  775. if (ret)
  776. pr_err("IRQ initialization failed\n");
  777. }
  778. return ret;
  779. }
  780. EXPORT_SYMBOL(wcd9xxx_core_irq_init);
  781. /*
  782. * wcd9xxx_assign_irq:
  783. * Assign irq and irq_base to wcd9xxx core resource
  784. *
  785. * @wcd9xxx_core_res: pointer to wcd core resource
  786. * @irq: irq number
  787. * @irq_base: base irq number
  788. *
  789. * Returns 0 for success or negative error code in case of failure
  790. */
  791. int wcd9xxx_assign_irq(
  792. struct wcd9xxx_core_resource *wcd9xxx_core_res,
  793. unsigned int irq,
  794. unsigned int irq_base)
  795. {
  796. if (!wcd9xxx_core_res)
  797. return -EINVAL;
  798. wcd9xxx_core_res->irq = irq;
  799. wcd9xxx_core_res->irq_base = irq_base;
  800. return 0;
  801. }
  802. EXPORT_SYMBOL(wcd9xxx_assign_irq);
  803. /*
  804. * wcd9xxx_core_res_init:
  805. * Initialize wcd core resource instance
  806. *
  807. * @wcd9xxx_core_res: pointer to wcd core resource
  808. * @num_irqs: number of irqs for wcd9xxx core
  809. * @num_irq_regs: number of irq registers
  810. * @wcd_regmap: pointer to the wcd register map
  811. *
  812. * Returns 0 for success or negative error code in case of failure
  813. */
  814. int wcd9xxx_core_res_init(
  815. struct wcd9xxx_core_resource *wcd9xxx_core_res,
  816. int num_irqs, int num_irq_regs, struct regmap *wcd_regmap)
  817. {
  818. if (!wcd9xxx_core_res || !wcd_regmap)
  819. return -EINVAL;
  820. mutex_init(&wcd9xxx_core_res->pm_lock);
  821. wcd9xxx_core_res->wlock_holders = 0;
  822. wcd9xxx_core_res->pm_state = WCD9XXX_PM_SLEEPABLE;
  823. init_waitqueue_head(&wcd9xxx_core_res->pm_wq);
  824. pm_qos_add_request(&wcd9xxx_core_res->pm_qos_req,
  825. PM_QOS_CPU_DMA_LATENCY,
  826. PM_QOS_DEFAULT_VALUE);
  827. wcd9xxx_core_res->num_irqs = num_irqs;
  828. wcd9xxx_core_res->num_irq_regs = num_irq_regs;
  829. wcd9xxx_core_res->wcd_core_regmap = wcd_regmap;
  830. pr_info("%s: num_irqs = %d, num_irq_regs = %d\n",
  831. __func__, wcd9xxx_core_res->num_irqs,
  832. wcd9xxx_core_res->num_irq_regs);
  833. return 0;
  834. }
  835. EXPORT_SYMBOL(wcd9xxx_core_res_init);
  836. /*
  837. * wcd9xxx_core_res_deinit:
  838. * Deinit wcd core resource instance
  839. *
  840. * @wcd9xxx_core_res: pointer to wcd core resource
  841. */
  842. void wcd9xxx_core_res_deinit(struct wcd9xxx_core_resource *wcd9xxx_core_res)
  843. {
  844. if (!wcd9xxx_core_res)
  845. return;
  846. pm_qos_remove_request(&wcd9xxx_core_res->pm_qos_req);
  847. mutex_destroy(&wcd9xxx_core_res->pm_lock);
  848. }
  849. EXPORT_SYMBOL(wcd9xxx_core_res_deinit);
  850. /*
  851. * wcd9xxx_pm_cmpxchg:
  852. * Check old state and exchange with pm new state
  853. * if old state matches with current state
  854. *
  855. * @wcd9xxx_core_res: pointer to wcd core resource
  856. * @o: pm old state
  857. * @n: pm new state
  858. *
  859. * Returns old state
  860. */
  861. enum wcd9xxx_pm_state wcd9xxx_pm_cmpxchg(
  862. struct wcd9xxx_core_resource *wcd9xxx_core_res,
  863. enum wcd9xxx_pm_state o,
  864. enum wcd9xxx_pm_state n)
  865. {
  866. enum wcd9xxx_pm_state old;
  867. if (!wcd9xxx_core_res)
  868. return o;
  869. mutex_lock(&wcd9xxx_core_res->pm_lock);
  870. old = wcd9xxx_core_res->pm_state;
  871. if (old == o)
  872. wcd9xxx_core_res->pm_state = n;
  873. mutex_unlock(&wcd9xxx_core_res->pm_lock);
  874. return old;
  875. }
  876. EXPORT_SYMBOL(wcd9xxx_pm_cmpxchg);
  877. /*
  878. * wcd9xxx_core_res_suspend:
  879. * Suspend callback function for wcd9xxx core
  880. *
  881. * @wcd9xxx_core_res: pointer to wcd core resource
  882. * @pm_message_t: pm message
  883. *
  884. * Returns 0 for success or negative error code for failure/busy
  885. */
  886. int wcd9xxx_core_res_suspend(
  887. struct wcd9xxx_core_resource *wcd9xxx_core_res,
  888. pm_message_t pmesg)
  889. {
  890. int ret = 0;
  891. pr_debug("%s: enter\n", __func__);
  892. /*
  893. * pm_qos_update_request() can be called after this suspend chain call
  894. * started. thus suspend can be called while lock is being held
  895. */
  896. mutex_lock(&wcd9xxx_core_res->pm_lock);
  897. if (wcd9xxx_core_res->pm_state == WCD9XXX_PM_SLEEPABLE) {
  898. pr_debug("%s: suspending system, state %d, wlock %d\n",
  899. __func__, wcd9xxx_core_res->pm_state,
  900. wcd9xxx_core_res->wlock_holders);
  901. wcd9xxx_core_res->pm_state = WCD9XXX_PM_ASLEEP;
  902. } else if (wcd9xxx_core_res->pm_state == WCD9XXX_PM_AWAKE) {
  903. /*
  904. * unlock to wait for pm_state == WCD9XXX_PM_SLEEPABLE
  905. * then set to WCD9XXX_PM_ASLEEP
  906. */
  907. pr_debug("%s: waiting to suspend system, state %d, wlock %d\n",
  908. __func__, wcd9xxx_core_res->pm_state,
  909. wcd9xxx_core_res->wlock_holders);
  910. mutex_unlock(&wcd9xxx_core_res->pm_lock);
  911. if (!(wait_event_timeout(wcd9xxx_core_res->pm_wq,
  912. wcd9xxx_pm_cmpxchg(wcd9xxx_core_res,
  913. WCD9XXX_PM_SLEEPABLE,
  914. WCD9XXX_PM_ASLEEP) ==
  915. WCD9XXX_PM_SLEEPABLE,
  916. HZ))) {
  917. pr_debug("%s: suspend failed state %d, wlock %d\n",
  918. __func__, wcd9xxx_core_res->pm_state,
  919. wcd9xxx_core_res->wlock_holders);
  920. ret = -EBUSY;
  921. } else {
  922. pr_debug("%s: done, state %d, wlock %d\n", __func__,
  923. wcd9xxx_core_res->pm_state,
  924. wcd9xxx_core_res->wlock_holders);
  925. }
  926. mutex_lock(&wcd9xxx_core_res->pm_lock);
  927. } else if (wcd9xxx_core_res->pm_state == WCD9XXX_PM_ASLEEP) {
  928. pr_warn("%s: system is already suspended, state %d, wlock %dn",
  929. __func__, wcd9xxx_core_res->pm_state,
  930. wcd9xxx_core_res->wlock_holders);
  931. }
  932. mutex_unlock(&wcd9xxx_core_res->pm_lock);
  933. return ret;
  934. }
  935. EXPORT_SYMBOL(wcd9xxx_core_res_suspend);
  936. /*
  937. * wcd9xxx_core_res_resume:
  938. * Resume callback function for wcd9xxx core
  939. *
  940. * @wcd9xxx_core_res: pointer to wcd core resource
  941. *
  942. * Returns 0 for success or negative error code for failure/busy
  943. */
  944. int wcd9xxx_core_res_resume(
  945. struct wcd9xxx_core_resource *wcd9xxx_core_res)
  946. {
  947. int ret = 0;
  948. pr_debug("%s: enter\n", __func__);
  949. mutex_lock(&wcd9xxx_core_res->pm_lock);
  950. if (wcd9xxx_core_res->pm_state == WCD9XXX_PM_ASLEEP) {
  951. pr_debug("%s: resuming system, state %d, wlock %d\n", __func__,
  952. wcd9xxx_core_res->pm_state,
  953. wcd9xxx_core_res->wlock_holders);
  954. wcd9xxx_core_res->pm_state = WCD9XXX_PM_SLEEPABLE;
  955. } else {
  956. pr_warn("%s: system is already awake, state %d wlock %d\n",
  957. __func__, wcd9xxx_core_res->pm_state,
  958. wcd9xxx_core_res->wlock_holders);
  959. }
  960. mutex_unlock(&wcd9xxx_core_res->pm_lock);
  961. wake_up_all(&wcd9xxx_core_res->pm_wq);
  962. return ret;
  963. }
  964. EXPORT_SYMBOL(wcd9xxx_core_res_resume);
  965. /*
  966. * wcd9xxx_get_intf_type:
  967. * Get interface type of wcd9xxx core
  968. *
  969. * Returns interface type
  970. */
  971. enum wcd9xxx_intf_status wcd9xxx_get_intf_type(void)
  972. {
  973. return wcd9xxx_intf;
  974. }
  975. EXPORT_SYMBOL(wcd9xxx_get_intf_type);
  976. /*
  977. * wcd9xxx_set_intf_type:
  978. * Set interface type of wcd9xxx core
  979. *
  980. */
  981. void wcd9xxx_set_intf_type(enum wcd9xxx_intf_status intf_status)
  982. {
  983. wcd9xxx_intf = intf_status;
  984. }
  985. EXPORT_SYMBOL(wcd9xxx_set_intf_type);
  986. /*
  987. * wcd9xxx_set_power_state: set power state for the region
  988. * @wcd9xxx: handle to wcd core
  989. * @state: power state to be set
  990. * @region: region index
  991. *
  992. * Returns error code in case of failure or 0 for success
  993. */
  994. int wcd9xxx_set_power_state(struct wcd9xxx *wcd9xxx,
  995. enum codec_power_states state,
  996. enum wcd_power_regions region)
  997. {
  998. if (!wcd9xxx) {
  999. pr_err("%s: wcd9xxx is NULL\n", __func__);
  1000. return -EINVAL;
  1001. }
  1002. if ((region < 0) || (region >= WCD9XXX_MAX_PWR_REGIONS)) {
  1003. dev_err(wcd9xxx->dev, "%s: region index %d out of bounds\n",
  1004. __func__, region);
  1005. return -EINVAL;
  1006. }
  1007. if (!wcd9xxx->wcd9xxx_pwr[region]) {
  1008. dev_err(wcd9xxx->dev, "%s: memory not created for region: %d\n",
  1009. __func__, region);
  1010. return -EINVAL;
  1011. }
  1012. mutex_lock(&wcd9xxx->io_lock);
  1013. wcd9xxx->wcd9xxx_pwr[region]->power_state = state;
  1014. mutex_unlock(&wcd9xxx->io_lock);
  1015. return 0;
  1016. }
  1017. EXPORT_SYMBOL(wcd9xxx_set_power_state);
  1018. /*
  1019. * wcd9xxx_get_current_power_state: Get power state of the region
  1020. * @wcd9xxx: handle to wcd core
  1021. * @region: region index
  1022. *
  1023. * Returns current power state of the region or error code for failure
  1024. */
  1025. int wcd9xxx_get_current_power_state(struct wcd9xxx *wcd9xxx,
  1026. enum wcd_power_regions region)
  1027. {
  1028. int state;
  1029. if (!wcd9xxx) {
  1030. pr_err("%s: wcd9xxx is NULL\n", __func__);
  1031. return -EINVAL;
  1032. }
  1033. if ((region < 0) || (region >= WCD9XXX_MAX_PWR_REGIONS)) {
  1034. dev_err(wcd9xxx->dev, "%s: region index %d out of bounds\n",
  1035. __func__, region);
  1036. return -EINVAL;
  1037. }
  1038. if (!wcd9xxx->wcd9xxx_pwr[region]) {
  1039. dev_err(wcd9xxx->dev, "%s: memory not created for region: %d\n",
  1040. __func__, region);
  1041. return -EINVAL;
  1042. }
  1043. mutex_lock(&wcd9xxx->io_lock);
  1044. state = wcd9xxx->wcd9xxx_pwr[region]->power_state;
  1045. mutex_unlock(&wcd9xxx->io_lock);
  1046. return state;
  1047. }
  1048. EXPORT_SYMBOL(wcd9xxx_get_current_power_state);