wcd934x-dsp-cntl.c 35 KB

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  1. /*
  2. * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/slab.h>
  14. #include <linux/delay.h>
  15. #include <linux/component.h>
  16. #include <linux/debugfs.h>
  17. #include <sound/soc.h>
  18. #include <sound/wcd-dsp-mgr.h>
  19. #include <asoc/wcd934x_registers.h>
  20. #include "wcd934x.h"
  21. #include "wcd934x-dsp-cntl.h"
  22. #include "../wcd9xxx-irq.h"
  23. #include "../core.h"
  24. #define WCD_CNTL_DIR_NAME_LEN_MAX 32
  25. #define WCD_CPE_FLL_MAX_RETRIES 5
  26. #define WCD_MEM_ENABLE_MAX_RETRIES 20
  27. #define WCD_DSP_BOOT_TIMEOUT_MS 3000
  28. #define WCD_SYSFS_ENTRY_MAX_LEN 8
  29. #define WCD_PROCFS_ENTRY_MAX_LEN 16
  30. #define WCD_934X_RAMDUMP_START_ADDR 0x20100000
  31. #define WCD_934X_RAMDUMP_SIZE ((1024 * 1024) - 128)
  32. #define WCD_CNTL_MUTEX_LOCK(codec, lock) \
  33. { \
  34. dev_dbg(codec->dev, "%s: mutex_lock(%s)\n", \
  35. __func__, __stringify_1(lock)); \
  36. mutex_lock(&lock); \
  37. }
  38. #define WCD_CNTL_MUTEX_UNLOCK(codec, lock) \
  39. { \
  40. dev_dbg(codec->dev, "%s: mutex_unlock(%s)\n", \
  41. __func__, __stringify_1(lock)); \
  42. mutex_unlock(&lock); \
  43. }
  44. enum wcd_mem_type {
  45. WCD_MEM_TYPE_ALWAYS_ON,
  46. WCD_MEM_TYPE_SWITCHABLE,
  47. };
  48. struct wcd_cntl_attribute {
  49. struct attribute attr;
  50. ssize_t (*show)(struct wcd_dsp_cntl *cntl, char *buf);
  51. ssize_t (*store)(struct wcd_dsp_cntl *cntl, const char *buf,
  52. ssize_t count);
  53. };
  54. #define WCD_CNTL_ATTR(_name, _mode, _show, _store) \
  55. static struct wcd_cntl_attribute cntl_attr_##_name = { \
  56. .attr = {.name = __stringify(_name), .mode = _mode}, \
  57. .show = _show, \
  58. .store = _store, \
  59. }
  60. #define to_wcd_cntl_attr(a) \
  61. container_of((a), struct wcd_cntl_attribute, attr)
  62. #define to_wcd_cntl(kobj) \
  63. container_of((kobj), struct wcd_dsp_cntl, wcd_kobj)
  64. static u8 mem_enable_values[] = {
  65. 0xFE, 0xFC, 0xF8, 0xF0,
  66. 0xE0, 0xC0, 0x80, 0x00,
  67. };
  68. static ssize_t wdsp_boot_show(struct wcd_dsp_cntl *cntl, char *buf)
  69. {
  70. return snprintf(buf, WCD_SYSFS_ENTRY_MAX_LEN,
  71. "%u", cntl->boot_reqs);
  72. }
  73. static ssize_t wdsp_boot_store(struct wcd_dsp_cntl *cntl,
  74. const char *buf, ssize_t count)
  75. {
  76. u32 val;
  77. bool vote;
  78. int ret;
  79. ret = kstrtou32(buf, 10, &val);
  80. if (ret) {
  81. dev_err(cntl->codec->dev,
  82. "%s: Invalid entry, ret = %d\n", __func__, ret);
  83. return -EINVAL;
  84. }
  85. if (val > 0) {
  86. cntl->boot_reqs++;
  87. vote = true;
  88. } else {
  89. cntl->boot_reqs--;
  90. vote = false;
  91. }
  92. if (cntl->m_dev && cntl->m_ops &&
  93. cntl->m_ops->vote_for_dsp)
  94. ret = cntl->m_ops->vote_for_dsp(cntl->m_dev, vote);
  95. else
  96. ret = -EINVAL;
  97. if (ret < 0)
  98. dev_err(cntl->codec->dev,
  99. "%s: failed to %s dsp\n", __func__,
  100. vote ? "enable" : "disable");
  101. return count;
  102. }
  103. WCD_CNTL_ATTR(boot, 0660, wdsp_boot_show, wdsp_boot_store);
  104. static ssize_t wcd_cntl_sysfs_show(struct kobject *kobj,
  105. struct attribute *attr, char *buf)
  106. {
  107. struct wcd_cntl_attribute *wcd_attr = to_wcd_cntl_attr(attr);
  108. struct wcd_dsp_cntl *cntl = to_wcd_cntl(kobj);
  109. ssize_t ret = -EINVAL;
  110. if (cntl && wcd_attr->show)
  111. ret = wcd_attr->show(cntl, buf);
  112. return ret;
  113. }
  114. static ssize_t wcd_cntl_sysfs_store(struct kobject *kobj,
  115. struct attribute *attr, const char *buf,
  116. size_t count)
  117. {
  118. struct wcd_cntl_attribute *wcd_attr = to_wcd_cntl_attr(attr);
  119. struct wcd_dsp_cntl *cntl = to_wcd_cntl(kobj);
  120. ssize_t ret = -EINVAL;
  121. if (cntl && wcd_attr->store)
  122. ret = wcd_attr->store(cntl, buf, count);
  123. return ret;
  124. }
  125. static const struct sysfs_ops wcd_cntl_sysfs_ops = {
  126. .show = wcd_cntl_sysfs_show,
  127. .store = wcd_cntl_sysfs_store,
  128. };
  129. static struct kobj_type wcd_cntl_ktype = {
  130. .sysfs_ops = &wcd_cntl_sysfs_ops,
  131. };
  132. static void wcd_cntl_change_online_state(struct wcd_dsp_cntl *cntl,
  133. u8 online)
  134. {
  135. struct wdsp_ssr_entry *ssr_entry = &cntl->ssr_entry;
  136. unsigned long ret;
  137. WCD_CNTL_MUTEX_LOCK(cntl->codec, cntl->ssr_mutex);
  138. ssr_entry->offline = !online;
  139. /* Make sure the write is complete */
  140. wmb();
  141. ret = xchg(&ssr_entry->offline_change, 1);
  142. wake_up_interruptible(&ssr_entry->offline_poll_wait);
  143. dev_dbg(cntl->codec->dev,
  144. "%s: requested %u, offline %u offline_change %u, ret = %ldn",
  145. __func__, online, ssr_entry->offline,
  146. ssr_entry->offline_change, ret);
  147. WCD_CNTL_MUTEX_UNLOCK(cntl->codec, cntl->ssr_mutex);
  148. }
  149. static ssize_t wdsp_ssr_entry_read(struct snd_info_entry *entry,
  150. void *file_priv_data, struct file *file,
  151. char __user *buf, size_t count, loff_t pos)
  152. {
  153. int len = 0;
  154. char buffer[WCD_PROCFS_ENTRY_MAX_LEN];
  155. struct wcd_dsp_cntl *cntl;
  156. struct wdsp_ssr_entry *ssr_entry;
  157. ssize_t ret;
  158. u8 offline;
  159. cntl = (struct wcd_dsp_cntl *) entry->private_data;
  160. if (!cntl) {
  161. pr_err("%s: Invalid private data for SSR procfs entry\n",
  162. __func__);
  163. return -EINVAL;
  164. }
  165. ssr_entry = &cntl->ssr_entry;
  166. WCD_CNTL_MUTEX_LOCK(cntl->codec, cntl->ssr_mutex);
  167. offline = ssr_entry->offline;
  168. /* Make sure the read is complete */
  169. rmb();
  170. dev_dbg(cntl->codec->dev, "%s: offline = %s\n", __func__,
  171. offline ? "true" : "false");
  172. len = snprintf(buffer, sizeof(buffer), "%s\n",
  173. offline ? "OFFLINE" : "ONLINE");
  174. ret = simple_read_from_buffer(buf, count, &pos, buffer, len);
  175. WCD_CNTL_MUTEX_UNLOCK(cntl->codec, cntl->ssr_mutex);
  176. return ret;
  177. }
  178. static unsigned int wdsp_ssr_entry_poll(struct snd_info_entry *entry,
  179. void *private_data, struct file *file,
  180. poll_table *wait)
  181. {
  182. struct wcd_dsp_cntl *cntl;
  183. struct wdsp_ssr_entry *ssr_entry;
  184. unsigned int ret = 0;
  185. if (!entry || !entry->private_data) {
  186. pr_err("%s: %s is NULL\n", __func__,
  187. (!entry) ? "entry" : "private_data");
  188. return -EINVAL;
  189. }
  190. cntl = (struct wcd_dsp_cntl *) entry->private_data;
  191. ssr_entry = &cntl->ssr_entry;
  192. dev_dbg(cntl->codec->dev, "%s: Poll wait, offline = %u\n",
  193. __func__, ssr_entry->offline);
  194. poll_wait(file, &ssr_entry->offline_poll_wait, wait);
  195. dev_dbg(cntl->codec->dev, "%s: Woken up Poll wait, offline = %u\n",
  196. __func__, ssr_entry->offline);
  197. WCD_CNTL_MUTEX_LOCK(cntl->codec, cntl->ssr_mutex);
  198. if (xchg(&ssr_entry->offline_change, 0))
  199. ret = POLLIN | POLLPRI | POLLRDNORM;
  200. dev_dbg(cntl->codec->dev, "%s: ret (%d) from poll_wait\n",
  201. __func__, ret);
  202. WCD_CNTL_MUTEX_UNLOCK(cntl->codec, cntl->ssr_mutex);
  203. return ret;
  204. }
  205. static struct snd_info_entry_ops wdsp_ssr_entry_ops = {
  206. .read = wdsp_ssr_entry_read,
  207. .poll = wdsp_ssr_entry_poll,
  208. };
  209. static int wcd_cntl_cpe_fll_calibrate(struct wcd_dsp_cntl *cntl)
  210. {
  211. struct snd_soc_codec *codec = cntl->codec;
  212. int ret = 0, retry = 0;
  213. u8 cal_lsb, cal_msb;
  214. u8 lock_det;
  215. /* Make sure clocks are gated */
  216. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPE_CTL,
  217. 0x05, 0x00);
  218. /* Enable CPE FLL reference clock */
  219. snd_soc_update_bits(codec, WCD934X_CLK_SYS_MCLK2_PRG1,
  220. 0x80, 0x80);
  221. snd_soc_update_bits(codec, WCD934X_CPE_FLL_USER_CTL_5,
  222. 0xF3, 0x13);
  223. snd_soc_write(codec, WCD934X_CPE_FLL_L_VAL_CTL_0, 0x50);
  224. /* Disable CPAR reset and Enable CPAR clk */
  225. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPAR_CTL,
  226. 0x02, 0x02);
  227. /* Write calibration l-value based on cdc clk rate */
  228. if (cntl->clk_rate == 9600000) {
  229. cal_lsb = 0x6d;
  230. cal_msb = 0x00;
  231. } else {
  232. cal_lsb = 0x56;
  233. cal_msb = 0x00;
  234. }
  235. snd_soc_write(codec, WCD934X_CPE_FLL_USER_CTL_6, cal_lsb);
  236. snd_soc_write(codec, WCD934X_CPE_FLL_USER_CTL_7, cal_msb);
  237. /* FLL mode to follow power up sequence */
  238. snd_soc_update_bits(codec, WCD934X_CPE_FLL_FLL_MODE,
  239. 0x60, 0x00);
  240. /* HW controlled CPE FLL */
  241. snd_soc_update_bits(codec, WCD934X_CPE_FLL_FLL_MODE,
  242. 0x80, 0x80);
  243. /* Force on CPE FLL */
  244. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPAR_CFG,
  245. 0x04, 0x04);
  246. do {
  247. /* Time for FLL calibration to complete */
  248. usleep_range(1000, 1100);
  249. lock_det = snd_soc_read(codec, WCD934X_CPE_FLL_STATUS_3);
  250. retry++;
  251. } while (!(lock_det & 0x01) &&
  252. retry <= WCD_CPE_FLL_MAX_RETRIES);
  253. if (!(lock_det & 0x01)) {
  254. dev_err(codec->dev, "%s: lock detect not set, 0x%02x\n",
  255. __func__, lock_det);
  256. ret = -EIO;
  257. goto err_lock_det;
  258. }
  259. snd_soc_update_bits(codec, WCD934X_CPE_FLL_FLL_MODE,
  260. 0x60, 0x20);
  261. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPAR_CFG,
  262. 0x04, 0x00);
  263. return ret;
  264. err_lock_det:
  265. /* Undo the register settings */
  266. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPAR_CFG,
  267. 0x04, 0x00);
  268. snd_soc_update_bits(codec, WCD934X_CPE_FLL_FLL_MODE,
  269. 0x80, 0x00);
  270. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPAR_CTL,
  271. 0x02, 0x00);
  272. return ret;
  273. }
  274. static void wcd_cntl_config_cpar(struct wcd_dsp_cntl *cntl)
  275. {
  276. struct snd_soc_codec *codec = cntl->codec;
  277. u8 nom_lo, nom_hi, svs2_lo, svs2_hi;
  278. /* Configure CPAR */
  279. nom_hi = svs2_hi = 0;
  280. if (cntl->clk_rate == 9600000) {
  281. nom_lo = 0x90;
  282. svs2_lo = 0x50;
  283. } else {
  284. nom_lo = 0x70;
  285. svs2_lo = 0x3e;
  286. }
  287. snd_soc_write(codec, WCD934X_TEST_DEBUG_LVAL_NOM_LOW, nom_lo);
  288. snd_soc_write(codec, WCD934X_TEST_DEBUG_LVAL_NOM_HIGH, nom_hi);
  289. snd_soc_write(codec, WCD934X_TEST_DEBUG_LVAL_SVS_SVS2_LOW, svs2_lo);
  290. snd_soc_write(codec, WCD934X_TEST_DEBUG_LVAL_SVS_SVS2_HIGH, svs2_hi);
  291. snd_soc_update_bits(codec, WCD934X_CPE_SS_PWR_CPEFLL_CTL,
  292. 0x03, 0x03);
  293. }
  294. static int wcd_cntl_cpe_fll_ctrl(struct wcd_dsp_cntl *cntl,
  295. bool enable)
  296. {
  297. struct snd_soc_codec *codec = cntl->codec;
  298. int ret = 0;
  299. if (enable) {
  300. ret = wcd_cntl_cpe_fll_calibrate(cntl);
  301. if (ret < 0) {
  302. dev_err(codec->dev,
  303. "%s: cpe_fll_cal failed, err = %d\n",
  304. __func__, ret);
  305. goto done;
  306. }
  307. wcd_cntl_config_cpar(cntl);
  308. /* Enable AHB CLK and CPE CLK*/
  309. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPE_CTL,
  310. 0x05, 0x05);
  311. } else {
  312. /* Disable AHB CLK and CPE CLK */
  313. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPE_CTL,
  314. 0x05, 0x00);
  315. /* Reset the CPAR mode for CPE FLL */
  316. snd_soc_write(codec, WCD934X_CPE_FLL_FLL_MODE, 0x20);
  317. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPAR_CFG,
  318. 0x04, 0x00);
  319. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPAR_CTL,
  320. 0x02, 0x00);
  321. }
  322. done:
  323. return ret;
  324. }
  325. static int wcd_cntl_clocks_enable(struct wcd_dsp_cntl *cntl)
  326. {
  327. struct snd_soc_codec *codec = cntl->codec;
  328. int ret;
  329. WCD_CNTL_MUTEX_LOCK(codec, cntl->clk_mutex);
  330. /* Enable codec clock */
  331. if (cntl->cdc_cb && cntl->cdc_cb->cdc_clk_en)
  332. ret = cntl->cdc_cb->cdc_clk_en(codec, true);
  333. else
  334. ret = -EINVAL;
  335. if (ret < 0) {
  336. dev_err(codec->dev,
  337. "%s: Failed to enable cdc clk, err = %d\n",
  338. __func__, ret);
  339. goto done;
  340. }
  341. /* Pull CPAR out of reset */
  342. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPAR_CTL, 0x04, 0x00);
  343. /* Configure and Enable CPE FLL clock */
  344. ret = wcd_cntl_cpe_fll_ctrl(cntl, true);
  345. if (ret < 0) {
  346. dev_err(codec->dev,
  347. "%s: Failed to enable cpe clk, err = %d\n",
  348. __func__, ret);
  349. goto err_cpe_clk;
  350. }
  351. cntl->is_clk_enabled = true;
  352. /* Ungate the CPR clock */
  353. snd_soc_update_bits(codec, WCD934X_CODEC_RPM_CLK_GATE, 0x10, 0x00);
  354. done:
  355. WCD_CNTL_MUTEX_UNLOCK(codec, cntl->clk_mutex);
  356. return ret;
  357. err_cpe_clk:
  358. if (cntl->cdc_cb && cntl->cdc_cb->cdc_clk_en)
  359. cntl->cdc_cb->cdc_clk_en(codec, false);
  360. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPAR_CTL, 0x04, 0x04);
  361. WCD_CNTL_MUTEX_UNLOCK(codec, cntl->clk_mutex);
  362. return ret;
  363. }
  364. static int wcd_cntl_clocks_disable(struct wcd_dsp_cntl *cntl)
  365. {
  366. struct snd_soc_codec *codec = cntl->codec;
  367. int ret = 0;
  368. WCD_CNTL_MUTEX_LOCK(codec, cntl->clk_mutex);
  369. if (!cntl->is_clk_enabled) {
  370. dev_info(codec->dev, "%s: clocks already disabled\n",
  371. __func__);
  372. goto done;
  373. }
  374. /* Gate the CPR clock */
  375. snd_soc_update_bits(codec, WCD934X_CODEC_RPM_CLK_GATE, 0x10, 0x10);
  376. /* Disable CPE FLL clock */
  377. ret = wcd_cntl_cpe_fll_ctrl(cntl, false);
  378. if (ret < 0)
  379. dev_err(codec->dev,
  380. "%s: Failed to disable cpe clk, err = %d\n",
  381. __func__, ret);
  382. /*
  383. * Even if CPE FLL disable failed, go ahead and disable
  384. * the codec clock
  385. */
  386. if (cntl->cdc_cb && cntl->cdc_cb->cdc_clk_en)
  387. ret = cntl->cdc_cb->cdc_clk_en(codec, false);
  388. else
  389. ret = -EINVAL;
  390. cntl->is_clk_enabled = false;
  391. /* Put CPAR in reset */
  392. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPAR_CTL, 0x04, 0x04);
  393. done:
  394. WCD_CNTL_MUTEX_UNLOCK(codec, cntl->clk_mutex);
  395. return ret;
  396. }
  397. static void wcd_cntl_cpar_ctrl(struct wcd_dsp_cntl *cntl,
  398. bool enable)
  399. {
  400. struct snd_soc_codec *codec = cntl->codec;
  401. if (enable)
  402. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPAR_CTL, 0x03, 0x03);
  403. else
  404. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPAR_CTL, 0x03, 0x00);
  405. }
  406. static int wcd_cntl_enable_memory(struct wcd_dsp_cntl *cntl,
  407. enum wcd_mem_type mem_type)
  408. {
  409. struct snd_soc_codec *codec = cntl->codec;
  410. struct wcd9xxx *wcd9xxx = dev_get_drvdata(codec->dev->parent);
  411. int loop_cnt = 0;
  412. u8 status;
  413. int ret = 0;
  414. switch (mem_type) {
  415. case WCD_MEM_TYPE_ALWAYS_ON:
  416. /* 512KB of always on region */
  417. wcd9xxx_slim_write_repeat(wcd9xxx,
  418. WCD934X_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_0,
  419. ARRAY_SIZE(mem_enable_values),
  420. mem_enable_values);
  421. wcd9xxx_slim_write_repeat(wcd9xxx,
  422. WCD934X_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_1,
  423. ARRAY_SIZE(mem_enable_values),
  424. mem_enable_values);
  425. break;
  426. case WCD_MEM_TYPE_SWITCHABLE:
  427. snd_soc_update_bits(codec, WCD934X_CPE_SS_SOC_SW_COLLAPSE_CTL,
  428. 0x04, 0x00);
  429. snd_soc_update_bits(codec, WCD934X_TEST_DEBUG_MEM_CTRL,
  430. 0x80, 0x80);
  431. snd_soc_update_bits(codec, WCD934X_CPE_SS_SOC_SW_COLLAPSE_CTL,
  432. 0x01, 0x01);
  433. do {
  434. loop_cnt++;
  435. /* Time to enable the power domain for memory */
  436. usleep_range(100, 150);
  437. status = snd_soc_read(codec,
  438. WCD934X_CPE_SS_SOC_SW_COLLAPSE_CTL);
  439. } while ((status & 0x02) != 0x02 &&
  440. loop_cnt != WCD_MEM_ENABLE_MAX_RETRIES);
  441. if ((status & 0x02) != 0x02) {
  442. dev_err(cntl->codec->dev,
  443. "%s: power domain not enabled, status = 0x%02x\n",
  444. __func__, status);
  445. ret = -EIO;
  446. goto done;
  447. }
  448. /* Rest of the memory */
  449. wcd9xxx_slim_write_repeat(wcd9xxx,
  450. WCD934X_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_2,
  451. ARRAY_SIZE(mem_enable_values),
  452. mem_enable_values);
  453. wcd9xxx_slim_write_repeat(wcd9xxx,
  454. WCD934X_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_3,
  455. ARRAY_SIZE(mem_enable_values),
  456. mem_enable_values);
  457. snd_soc_write(codec, WCD934X_CPE_SS_PWR_CPE_DRAM1_SHUTDOWN,
  458. 0x05);
  459. break;
  460. default:
  461. dev_err(cntl->codec->dev, "%s: Invalid mem_type %d\n",
  462. __func__, mem_type);
  463. ret = -EINVAL;
  464. break;
  465. }
  466. done:
  467. /* Make sure Deep sleep of memories is enabled for all banks */
  468. snd_soc_write(codec, WCD934X_CPE_SS_PWR_CPE_SYSMEM_DEEPSLP_0, 0xFF);
  469. snd_soc_write(codec, WCD934X_CPE_SS_PWR_CPE_SYSMEM_DEEPSLP_1, 0x0F);
  470. return ret;
  471. }
  472. static void wcd_cntl_disable_memory(struct wcd_dsp_cntl *cntl,
  473. enum wcd_mem_type mem_type)
  474. {
  475. struct snd_soc_codec *codec = cntl->codec;
  476. u8 val;
  477. switch (mem_type) {
  478. case WCD_MEM_TYPE_ALWAYS_ON:
  479. snd_soc_write(codec, WCD934X_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_1,
  480. 0xFF);
  481. snd_soc_write(codec, WCD934X_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_0,
  482. 0xFF);
  483. break;
  484. case WCD_MEM_TYPE_SWITCHABLE:
  485. snd_soc_write(codec, WCD934X_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_3,
  486. 0xFF);
  487. snd_soc_write(codec, WCD934X_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_2,
  488. 0xFF);
  489. snd_soc_write(codec, WCD934X_CPE_SS_PWR_CPE_DRAM1_SHUTDOWN,
  490. 0x07);
  491. snd_soc_update_bits(codec, WCD934X_CPE_SS_SOC_SW_COLLAPSE_CTL,
  492. 0x01, 0x00);
  493. val = snd_soc_read(codec, WCD934X_CPE_SS_SOC_SW_COLLAPSE_CTL);
  494. if (val & 0x02)
  495. dev_err(codec->dev,
  496. "%s: Disable switchable failed, val = 0x%02x",
  497. __func__, val);
  498. snd_soc_update_bits(codec, WCD934X_TEST_DEBUG_MEM_CTRL,
  499. 0x80, 0x00);
  500. break;
  501. default:
  502. dev_err(cntl->codec->dev, "%s: Invalid mem_type %d\n",
  503. __func__, mem_type);
  504. break;
  505. }
  506. snd_soc_write(codec, WCD934X_CPE_SS_PWR_CPE_SYSMEM_DEEPSLP_0, 0xFF);
  507. snd_soc_write(codec, WCD934X_CPE_SS_PWR_CPE_SYSMEM_DEEPSLP_1, 0x0F);
  508. }
  509. static void wcd_cntl_do_shutdown(struct wcd_dsp_cntl *cntl)
  510. {
  511. struct snd_soc_codec *codec = cntl->codec;
  512. /* Disable WDOG */
  513. snd_soc_update_bits(codec, WCD934X_CPE_SS_WDOG_CFG,
  514. 0x3F, 0x01);
  515. /* Put WDSP in reset state */
  516. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPE_CTL,
  517. 0x02, 0x00);
  518. /* If DSP transitions from boot to shutdown, then vote for SVS */
  519. if (cntl->is_wdsp_booted)
  520. cntl->cdc_cb->cdc_vote_svs(codec, true);
  521. cntl->is_wdsp_booted = false;
  522. }
  523. static int wcd_cntl_do_boot(struct wcd_dsp_cntl *cntl)
  524. {
  525. struct snd_soc_codec *codec = cntl->codec;
  526. int ret = 0;
  527. /*
  528. * Debug mode is set from debugfs file node. If debug_mode
  529. * is set, then do not configure the watchdog timer. This
  530. * will be required for debugging the DSP firmware.
  531. */
  532. if (cntl->debug_mode) {
  533. snd_soc_update_bits(codec, WCD934X_CPE_SS_WDOG_CFG,
  534. 0x3F, 0x01);
  535. } else {
  536. snd_soc_update_bits(codec, WCD934X_CPE_SS_WDOG_CFG,
  537. 0x3F, 0x21);
  538. }
  539. /* Make sure all the error interrupts are cleared */
  540. snd_soc_write(codec, WCD934X_CPE_SS_SS_ERROR_INT_CLEAR_0A, 0xFF);
  541. snd_soc_write(codec, WCD934X_CPE_SS_SS_ERROR_INT_CLEAR_0B, 0xFF);
  542. reinit_completion(&cntl->boot_complete);
  543. /* Remove WDSP out of reset */
  544. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPE_CTL,
  545. 0x02, 0x02);
  546. /*
  547. * In debug mode, DSP may not boot up normally,
  548. * wait indefinitely for DSP to boot.
  549. */
  550. if (cntl->debug_mode) {
  551. wait_for_completion(&cntl->boot_complete);
  552. dev_dbg(codec->dev, "%s: WDSP booted in dbg mode\n", __func__);
  553. cntl->is_wdsp_booted = true;
  554. goto done;
  555. }
  556. /* Boot in normal mode */
  557. ret = wait_for_completion_timeout(&cntl->boot_complete,
  558. msecs_to_jiffies(WCD_DSP_BOOT_TIMEOUT_MS));
  559. if (!ret) {
  560. dev_err(codec->dev, "%s: WDSP boot timed out\n",
  561. __func__);
  562. ret = -ETIMEDOUT;
  563. goto err_boot;
  564. } else {
  565. /*
  566. * Re-initialize the return code to 0, as in success case,
  567. * it will hold the remaining time for completion timeout
  568. */
  569. ret = 0;
  570. }
  571. dev_dbg(codec->dev, "%s: WDSP booted in normal mode\n", __func__);
  572. cntl->is_wdsp_booted = true;
  573. /* Enable WDOG */
  574. snd_soc_update_bits(codec, WCD934X_CPE_SS_WDOG_CFG,
  575. 0x10, 0x10);
  576. done:
  577. /* If dsp booted up, then remove vote on SVS */
  578. if (cntl->is_wdsp_booted)
  579. cntl->cdc_cb->cdc_vote_svs(codec, false);
  580. return ret;
  581. err_boot:
  582. /* call shutdown to perform cleanup */
  583. wcd_cntl_do_shutdown(cntl);
  584. return ret;
  585. }
  586. static irqreturn_t wcd_cntl_ipc_irq(int irq, void *data)
  587. {
  588. struct wcd_dsp_cntl *cntl = data;
  589. int ret;
  590. complete(&cntl->boot_complete);
  591. if (cntl->m_dev && cntl->m_ops &&
  592. cntl->m_ops->signal_handler)
  593. ret = cntl->m_ops->signal_handler(cntl->m_dev, WDSP_IPC1_INTR,
  594. NULL);
  595. else
  596. ret = -EINVAL;
  597. if (ret < 0)
  598. dev_err(cntl->codec->dev,
  599. "%s: Failed to handle irq %d\n", __func__, irq);
  600. return IRQ_HANDLED;
  601. }
  602. static irqreturn_t wcd_cntl_err_irq(int irq, void *data)
  603. {
  604. struct wcd_dsp_cntl *cntl = data;
  605. struct snd_soc_codec *codec = cntl->codec;
  606. struct wdsp_err_signal_arg arg;
  607. u16 status = 0;
  608. u8 reg_val;
  609. int ret = 0;
  610. reg_val = snd_soc_read(codec, WCD934X_CPE_SS_SS_ERROR_INT_STATUS_0A);
  611. status = status | reg_val;
  612. reg_val = snd_soc_read(codec, WCD934X_CPE_SS_SS_ERROR_INT_STATUS_0B);
  613. status = status | (reg_val << 8);
  614. dev_info(codec->dev, "%s: error interrupt status = 0x%x\n",
  615. __func__, status);
  616. if ((status & cntl->irqs.fatal_irqs) &&
  617. (cntl->m_dev && cntl->m_ops && cntl->m_ops->signal_handler)) {
  618. arg.mem_dumps_enabled = cntl->ramdump_enable;
  619. arg.remote_start_addr = WCD_934X_RAMDUMP_START_ADDR;
  620. arg.dump_size = WCD_934X_RAMDUMP_SIZE;
  621. ret = cntl->m_ops->signal_handler(cntl->m_dev, WDSP_ERR_INTR,
  622. &arg);
  623. if (ret < 0)
  624. dev_err(cntl->codec->dev,
  625. "%s: Failed to handle fatal irq 0x%x\n",
  626. __func__, status & cntl->irqs.fatal_irqs);
  627. wcd_cntl_change_online_state(cntl, 0);
  628. } else {
  629. dev_err(cntl->codec->dev, "%s: Invalid signal_handler\n",
  630. __func__);
  631. }
  632. return IRQ_HANDLED;
  633. }
  634. static int wcd_control_handler(struct device *dev, void *priv_data,
  635. enum wdsp_event_type event, void *data)
  636. {
  637. struct wcd_dsp_cntl *cntl = priv_data;
  638. struct snd_soc_codec *codec = cntl->codec;
  639. int ret = 0;
  640. switch (event) {
  641. case WDSP_EVENT_POST_INIT:
  642. case WDSP_EVENT_POST_DLOAD_CODE:
  643. case WDSP_EVENT_DLOAD_FAILED:
  644. case WDSP_EVENT_POST_SHUTDOWN:
  645. if (event == WDSP_EVENT_POST_DLOAD_CODE)
  646. /* Mark DSP online since code download is complete */
  647. wcd_cntl_change_online_state(cntl, 1);
  648. /* Disable CPAR */
  649. wcd_cntl_cpar_ctrl(cntl, false);
  650. /* Disable all the clocks */
  651. ret = wcd_cntl_clocks_disable(cntl);
  652. if (ret < 0)
  653. dev_err(codec->dev,
  654. "%s: Failed to disable clocks, err = %d\n",
  655. __func__, ret);
  656. break;
  657. case WDSP_EVENT_PRE_DLOAD_DATA:
  658. case WDSP_EVENT_PRE_DLOAD_CODE:
  659. /* Enable all the clocks */
  660. ret = wcd_cntl_clocks_enable(cntl);
  661. if (ret < 0) {
  662. dev_err(codec->dev,
  663. "%s: Failed to enable clocks, err = %d\n",
  664. __func__, ret);
  665. goto done;
  666. }
  667. /* Enable CPAR */
  668. wcd_cntl_cpar_ctrl(cntl, true);
  669. if (event == WDSP_EVENT_PRE_DLOAD_CODE)
  670. wcd_cntl_enable_memory(cntl, WCD_MEM_TYPE_ALWAYS_ON);
  671. else if (event == WDSP_EVENT_PRE_DLOAD_DATA)
  672. wcd_cntl_enable_memory(cntl, WCD_MEM_TYPE_SWITCHABLE);
  673. break;
  674. case WDSP_EVENT_DO_BOOT:
  675. ret = wcd_cntl_do_boot(cntl);
  676. if (ret < 0)
  677. dev_err(codec->dev,
  678. "%s: WDSP boot failed, err = %d\n",
  679. __func__, ret);
  680. break;
  681. case WDSP_EVENT_DO_SHUTDOWN:
  682. wcd_cntl_do_shutdown(cntl);
  683. wcd_cntl_disable_memory(cntl, WCD_MEM_TYPE_SWITCHABLE);
  684. break;
  685. default:
  686. dev_dbg(codec->dev, "%s: unhandled event %d\n",
  687. __func__, event);
  688. }
  689. done:
  690. return ret;
  691. }
  692. static int wcd_cntl_sysfs_init(char *dir, struct wcd_dsp_cntl *cntl)
  693. {
  694. struct snd_soc_codec *codec = cntl->codec;
  695. int ret = 0;
  696. ret = kobject_init_and_add(&cntl->wcd_kobj, &wcd_cntl_ktype,
  697. kernel_kobj, dir);
  698. if (ret < 0) {
  699. dev_err(codec->dev,
  700. "%s: Failed to add kobject %s, err = %d\n",
  701. __func__, dir, ret);
  702. goto done;
  703. }
  704. ret = sysfs_create_file(&cntl->wcd_kobj, &cntl_attr_boot.attr);
  705. if (ret < 0) {
  706. dev_err(codec->dev,
  707. "%s: Failed to add wdsp_boot sysfs entry to %s\n",
  708. __func__, dir);
  709. goto fail_create_file;
  710. }
  711. return ret;
  712. fail_create_file:
  713. kobject_put(&cntl->wcd_kobj);
  714. done:
  715. return ret;
  716. }
  717. static void wcd_cntl_sysfs_remove(struct wcd_dsp_cntl *cntl)
  718. {
  719. sysfs_remove_file(&cntl->wcd_kobj, &cntl_attr_boot.attr);
  720. kobject_put(&cntl->wcd_kobj);
  721. }
  722. static void wcd_cntl_debugfs_init(char *dir, struct wcd_dsp_cntl *cntl)
  723. {
  724. struct snd_soc_codec *codec = cntl->codec;
  725. cntl->entry = debugfs_create_dir(dir, NULL);
  726. if (IS_ERR_OR_NULL(dir)) {
  727. dev_err(codec->dev, "%s debugfs_create_dir failed for %s\n",
  728. __func__, dir);
  729. goto done;
  730. }
  731. debugfs_create_u32("debug_mode", 0644,
  732. cntl->entry, &cntl->debug_mode);
  733. debugfs_create_bool("ramdump_enable", 0644,
  734. cntl->entry, &cntl->ramdump_enable);
  735. done:
  736. return;
  737. }
  738. static void wcd_cntl_debugfs_remove(struct wcd_dsp_cntl *cntl)
  739. {
  740. if (cntl)
  741. debugfs_remove(cntl->entry);
  742. }
  743. static int wcd_miscdev_release(struct inode *inode, struct file *filep)
  744. {
  745. struct wcd_dsp_cntl *cntl = container_of(filep->private_data,
  746. struct wcd_dsp_cntl, miscdev);
  747. if (!cntl->m_dev || !cntl->m_ops ||
  748. !cntl->m_ops->vote_for_dsp) {
  749. dev_err(cntl->codec->dev,
  750. "%s: DSP not ready to boot\n", __func__);
  751. return -EINVAL;
  752. }
  753. /* Make sure the DSP users goes to zero upon closing dev node */
  754. while (cntl->boot_reqs > 0) {
  755. cntl->m_ops->vote_for_dsp(cntl->m_dev, false);
  756. cntl->boot_reqs--;
  757. }
  758. return 0;
  759. }
  760. static ssize_t wcd_miscdev_write(struct file *filep, const char __user *ubuf,
  761. size_t count, loff_t *pos)
  762. {
  763. struct wcd_dsp_cntl *cntl = container_of(filep->private_data,
  764. struct wcd_dsp_cntl, miscdev);
  765. char val[count];
  766. bool vote;
  767. int ret = 0;
  768. if (count == 0 || count > 2) {
  769. pr_err("%s: Invalid count = %zd\n", __func__, count);
  770. ret = -EINVAL;
  771. goto done;
  772. }
  773. ret = copy_from_user(val, ubuf, count);
  774. if (ret < 0) {
  775. dev_err(cntl->codec->dev,
  776. "%s: copy_from_user failed, err = %d\n",
  777. __func__, ret);
  778. ret = -EFAULT;
  779. goto done;
  780. }
  781. if (val[0] == '1') {
  782. cntl->boot_reqs++;
  783. vote = true;
  784. } else if (val[0] == '0') {
  785. if (cntl->boot_reqs == 0) {
  786. dev_err(cntl->codec->dev,
  787. "%s: WDSP already disabled\n", __func__);
  788. ret = -EINVAL;
  789. goto done;
  790. }
  791. cntl->boot_reqs--;
  792. vote = false;
  793. } else {
  794. dev_err(cntl->codec->dev, "%s: Invalid value %s\n",
  795. __func__, val);
  796. ret = -EINVAL;
  797. goto done;
  798. }
  799. dev_dbg(cntl->codec->dev,
  800. "%s: booted = %s, ref_cnt = %d, vote = %s\n",
  801. __func__, cntl->is_wdsp_booted ? "true" : "false",
  802. cntl->boot_reqs, vote ? "true" : "false");
  803. if (cntl->m_dev && cntl->m_ops &&
  804. cntl->m_ops->vote_for_dsp)
  805. ret = cntl->m_ops->vote_for_dsp(cntl->m_dev, vote);
  806. else
  807. ret = -EINVAL;
  808. done:
  809. if (ret)
  810. return ret;
  811. else
  812. return count;
  813. }
  814. static const struct file_operations wcd_miscdev_fops = {
  815. .write = wcd_miscdev_write,
  816. .release = wcd_miscdev_release,
  817. };
  818. static int wcd_cntl_miscdev_create(struct wcd_dsp_cntl *cntl)
  819. {
  820. snprintf(cntl->miscdev_name, ARRAY_SIZE(cntl->miscdev_name),
  821. "wcd_dsp%u_control", cntl->dsp_instance);
  822. cntl->miscdev.minor = MISC_DYNAMIC_MINOR;
  823. cntl->miscdev.name = cntl->miscdev_name;
  824. cntl->miscdev.fops = &wcd_miscdev_fops;
  825. cntl->miscdev.parent = cntl->codec->dev;
  826. return misc_register(&cntl->miscdev);
  827. }
  828. static void wcd_cntl_miscdev_destroy(struct wcd_dsp_cntl *cntl)
  829. {
  830. misc_deregister(&cntl->miscdev);
  831. }
  832. static int wcd_control_init(struct device *dev, void *priv_data)
  833. {
  834. struct wcd_dsp_cntl *cntl = priv_data;
  835. struct snd_soc_codec *codec = cntl->codec;
  836. struct wcd9xxx *wcd9xxx = dev_get_drvdata(codec->dev->parent);
  837. struct wcd9xxx_core_resource *core_res = &wcd9xxx->core_res;
  838. int ret;
  839. bool err_irq_requested = false;
  840. ret = wcd9xxx_request_irq(core_res,
  841. cntl->irqs.cpe_ipc1_irq,
  842. wcd_cntl_ipc_irq, "CPE IPC1",
  843. cntl);
  844. if (ret < 0) {
  845. dev_err(codec->dev,
  846. "%s: Failed to request cpe ipc irq, err = %d\n",
  847. __func__, ret);
  848. goto done;
  849. }
  850. /* Unmask the fatal irqs */
  851. snd_soc_write(codec, WCD934X_CPE_SS_SS_ERROR_INT_MASK_0A,
  852. ~(cntl->irqs.fatal_irqs & 0xFF));
  853. snd_soc_write(codec, WCD934X_CPE_SS_SS_ERROR_INT_MASK_0B,
  854. ~((cntl->irqs.fatal_irqs >> 8) & 0xFF));
  855. /*
  856. * CPE ERR irq is used only for error reporting from WCD DSP,
  857. * even if this request fails, DSP can be function normally.
  858. * Continuing with init even if the CPE ERR irq request fails.
  859. */
  860. if (wcd9xxx_request_irq(core_res, cntl->irqs.cpe_err_irq,
  861. wcd_cntl_err_irq, "CPE ERR", cntl))
  862. dev_info(codec->dev, "%s: Failed request_irq(cpe_err_irq)",
  863. __func__);
  864. else
  865. err_irq_requested = true;
  866. /* Enable all the clocks */
  867. ret = wcd_cntl_clocks_enable(cntl);
  868. if (ret < 0) {
  869. dev_err(codec->dev, "%s: Failed to enable clocks, err = %d\n",
  870. __func__, ret);
  871. goto err_clk_enable;
  872. }
  873. wcd_cntl_cpar_ctrl(cntl, true);
  874. return 0;
  875. err_clk_enable:
  876. /* Mask all error interrupts */
  877. snd_soc_write(codec, WCD934X_CPE_SS_SS_ERROR_INT_MASK_0A, 0xFF);
  878. snd_soc_write(codec, WCD934X_CPE_SS_SS_ERROR_INT_MASK_0B, 0xFF);
  879. /* Free the irq's requested */
  880. wcd9xxx_free_irq(core_res, cntl->irqs.cpe_ipc1_irq, cntl);
  881. if (err_irq_requested)
  882. wcd9xxx_free_irq(core_res, cntl->irqs.cpe_err_irq, cntl);
  883. done:
  884. return ret;
  885. }
  886. static int wcd_control_deinit(struct device *dev, void *priv_data)
  887. {
  888. struct wcd_dsp_cntl *cntl = priv_data;
  889. struct snd_soc_codec *codec = cntl->codec;
  890. struct wcd9xxx *wcd9xxx = dev_get_drvdata(codec->dev->parent);
  891. struct wcd9xxx_core_resource *core_res = &wcd9xxx->core_res;
  892. wcd_cntl_clocks_disable(cntl);
  893. wcd_cntl_cpar_ctrl(cntl, false);
  894. /* Mask all error interrupts */
  895. snd_soc_write(codec, WCD934X_CPE_SS_SS_ERROR_INT_MASK_0A, 0xFF);
  896. snd_soc_write(codec, WCD934X_CPE_SS_SS_ERROR_INT_MASK_0B, 0xFF);
  897. /* Free the irq's requested */
  898. wcd9xxx_free_irq(core_res, cntl->irqs.cpe_err_irq, cntl);
  899. wcd9xxx_free_irq(core_res, cntl->irqs.cpe_ipc1_irq, cntl);
  900. return 0;
  901. }
  902. static struct wdsp_cmpnt_ops control_ops = {
  903. .init = wcd_control_init,
  904. .deinit = wcd_control_deinit,
  905. .event_handler = wcd_control_handler,
  906. };
  907. static int wcd_ctrl_component_bind(struct device *dev,
  908. struct device *master,
  909. void *data)
  910. {
  911. struct wcd_dsp_cntl *cntl;
  912. struct snd_soc_codec *codec;
  913. struct snd_card *card;
  914. struct snd_info_entry *entry;
  915. char proc_name[WCD_PROCFS_ENTRY_MAX_LEN];
  916. char wcd_cntl_dir_name[WCD_CNTL_DIR_NAME_LEN_MAX];
  917. int ret = 0;
  918. if (!dev || !master || !data) {
  919. pr_err("%s: Invalid parameters\n", __func__);
  920. return -EINVAL;
  921. }
  922. cntl = tavil_get_wcd_dsp_cntl(dev);
  923. if (!cntl) {
  924. dev_err(dev, "%s: Failed to get cntl reference\n",
  925. __func__);
  926. return -EINVAL;
  927. }
  928. cntl->m_dev = master;
  929. cntl->m_ops = data;
  930. if (!cntl->m_ops->register_cmpnt_ops) {
  931. dev_err(dev, "%s: invalid master callback register_cmpnt_ops\n",
  932. __func__);
  933. ret = -EINVAL;
  934. goto done;
  935. }
  936. ret = cntl->m_ops->register_cmpnt_ops(master, dev, cntl, &control_ops);
  937. if (ret) {
  938. dev_err(dev, "%s: register_cmpnt_ops failed, err = %d\n",
  939. __func__, ret);
  940. goto done;
  941. }
  942. ret = wcd_cntl_miscdev_create(cntl);
  943. if (ret < 0) {
  944. dev_err(dev, "%s: misc dev register failed, err = %d\n",
  945. __func__, ret);
  946. goto done;
  947. }
  948. snprintf(wcd_cntl_dir_name, WCD_CNTL_DIR_NAME_LEN_MAX,
  949. "%s%d", "wdsp", cntl->dsp_instance);
  950. ret = wcd_cntl_sysfs_init(wcd_cntl_dir_name, cntl);
  951. if (ret < 0) {
  952. dev_err(dev, "%s: sysfs_init failed, err = %d\n",
  953. __func__, ret);
  954. goto err_sysfs_init;
  955. }
  956. wcd_cntl_debugfs_init(wcd_cntl_dir_name, cntl);
  957. codec = cntl->codec;
  958. card = codec->component.card->snd_card;
  959. snprintf(proc_name, WCD_PROCFS_ENTRY_MAX_LEN, "%s%d%s", "cpe",
  960. cntl->dsp_instance, "_state");
  961. entry = snd_info_create_card_entry(card, proc_name, card->proc_root);
  962. if (!entry) {
  963. /* Do not treat this as Fatal error */
  964. dev_err(dev, "%s: Failed to create procfs entry %s\n",
  965. __func__, proc_name);
  966. goto err_sysfs_init;
  967. }
  968. cntl->ssr_entry.entry = entry;
  969. cntl->ssr_entry.offline = 1;
  970. entry->size = WCD_PROCFS_ENTRY_MAX_LEN;
  971. entry->content = SNDRV_INFO_CONTENT_DATA;
  972. entry->c.ops = &wdsp_ssr_entry_ops;
  973. entry->private_data = cntl;
  974. ret = snd_info_register(entry);
  975. if (ret < 0) {
  976. dev_err(dev, "%s: Failed to register entry %s, err = %d\n",
  977. __func__, proc_name, ret);
  978. snd_info_free_entry(entry);
  979. /* Let bind still happen even if creating the entry failed */
  980. ret = 0;
  981. }
  982. done:
  983. return ret;
  984. err_sysfs_init:
  985. wcd_cntl_miscdev_destroy(cntl);
  986. return ret;
  987. }
  988. static void wcd_ctrl_component_unbind(struct device *dev,
  989. struct device *master,
  990. void *data)
  991. {
  992. struct wcd_dsp_cntl *cntl;
  993. if (!dev) {
  994. pr_err("%s: Invalid device\n", __func__);
  995. return;
  996. }
  997. cntl = tavil_get_wcd_dsp_cntl(dev);
  998. if (!cntl) {
  999. dev_err(dev, "%s: Failed to get cntl reference\n",
  1000. __func__);
  1001. return;
  1002. }
  1003. cntl->m_dev = NULL;
  1004. cntl->m_ops = NULL;
  1005. /* Remove the sysfs entries */
  1006. wcd_cntl_sysfs_remove(cntl);
  1007. /* Remove the debugfs entries */
  1008. wcd_cntl_debugfs_remove(cntl);
  1009. /* Remove the misc device */
  1010. wcd_cntl_miscdev_destroy(cntl);
  1011. }
  1012. static const struct component_ops wcd_ctrl_component_ops = {
  1013. .bind = wcd_ctrl_component_bind,
  1014. .unbind = wcd_ctrl_component_unbind,
  1015. };
  1016. /*
  1017. * wcd_dsp_ssr_event: handle the SSR event raised by caller.
  1018. * @cntl: Handle to the wcd_dsp_cntl structure
  1019. * @event: The SSR event to be handled
  1020. *
  1021. * Notifies the manager driver about the SSR event.
  1022. * Returns 0 on success and negative error code on error.
  1023. */
  1024. int wcd_dsp_ssr_event(struct wcd_dsp_cntl *cntl, enum cdc_ssr_event event)
  1025. {
  1026. int ret = 0;
  1027. if (!cntl) {
  1028. pr_err("%s: Invalid handle to control\n", __func__);
  1029. return -EINVAL;
  1030. }
  1031. if (!cntl->m_dev || !cntl->m_ops || !cntl->m_ops->signal_handler) {
  1032. dev_err(cntl->codec->dev,
  1033. "%s: Invalid signal_handler callback\n", __func__);
  1034. return -EINVAL;
  1035. }
  1036. switch (event) {
  1037. case WCD_CDC_DOWN_EVENT:
  1038. ret = cntl->m_ops->signal_handler(cntl->m_dev,
  1039. WDSP_CDC_DOWN_SIGNAL,
  1040. NULL);
  1041. if (ret < 0)
  1042. dev_err(cntl->codec->dev,
  1043. "%s: WDSP_CDC_DOWN_SIGNAL failed, err = %d\n",
  1044. __func__, ret);
  1045. wcd_cntl_change_online_state(cntl, 0);
  1046. break;
  1047. case WCD_CDC_UP_EVENT:
  1048. ret = cntl->m_ops->signal_handler(cntl->m_dev,
  1049. WDSP_CDC_UP_SIGNAL,
  1050. NULL);
  1051. if (ret < 0)
  1052. dev_err(cntl->codec->dev,
  1053. "%s: WDSP_CDC_UP_SIGNAL failed, err = %d\n",
  1054. __func__, ret);
  1055. break;
  1056. default:
  1057. dev_err(cntl->codec->dev, "%s: Invalid event %d\n",
  1058. __func__, event);
  1059. ret = -EINVAL;
  1060. break;
  1061. }
  1062. return ret;
  1063. }
  1064. EXPORT_SYMBOL(wcd_dsp_ssr_event);
  1065. /*
  1066. * wcd_dsp_cntl_init: Initialize the wcd-dsp control
  1067. * @codec: pointer to the codec handle
  1068. * @params: Parameters required to initialize wcd-dsp control
  1069. *
  1070. * This API is expected to be invoked by the codec driver and
  1071. * provide information essential for the wcd dsp control to
  1072. * configure and initialize the dsp
  1073. */
  1074. void wcd_dsp_cntl_init(struct snd_soc_codec *codec,
  1075. struct wcd_dsp_params *params,
  1076. struct wcd_dsp_cntl **cntl)
  1077. {
  1078. struct wcd_dsp_cntl *control;
  1079. int ret;
  1080. if (!codec || !params) {
  1081. pr_err("%s: Invalid handle to %s\n", __func__,
  1082. (!codec) ? "codec" : "params");
  1083. *cntl = NULL;
  1084. return;
  1085. }
  1086. if (*cntl) {
  1087. pr_err("%s: cntl is non NULL, maybe already initialized ?\n",
  1088. __func__);
  1089. return;
  1090. }
  1091. if (!params->cb || !params->cb->cdc_clk_en ||
  1092. !params->cb->cdc_vote_svs) {
  1093. dev_err(codec->dev,
  1094. "%s: clk_en and vote_svs callbacks must be provided\n",
  1095. __func__);
  1096. return;
  1097. }
  1098. control = kzalloc(sizeof(*control), GFP_KERNEL);
  1099. if (!(control))
  1100. return;
  1101. control->codec = codec;
  1102. control->clk_rate = params->clk_rate;
  1103. control->cdc_cb = params->cb;
  1104. control->dsp_instance = params->dsp_instance;
  1105. memcpy(&control->irqs, &params->irqs, sizeof(control->irqs));
  1106. init_completion(&control->boot_complete);
  1107. mutex_init(&control->clk_mutex);
  1108. mutex_init(&control->ssr_mutex);
  1109. init_waitqueue_head(&control->ssr_entry.offline_poll_wait);
  1110. /*
  1111. * The default state of WDSP is in SVS mode.
  1112. * Vote for SVS now, the vote will be removed only
  1113. * after DSP is booted up.
  1114. */
  1115. control->cdc_cb->cdc_vote_svs(codec, true);
  1116. /*
  1117. * If this is the last component needed by master to be ready,
  1118. * then component_bind will be called within the component_add.
  1119. * Hence, the data pointer should be assigned before component_add,
  1120. * so that we can access it during this component's bind call.
  1121. */
  1122. *cntl = control;
  1123. ret = component_add(codec->dev, &wcd_ctrl_component_ops);
  1124. if (ret) {
  1125. dev_err(codec->dev, "%s: component_add failed, err = %d\n",
  1126. __func__, ret);
  1127. kfree(*cntl);
  1128. *cntl = NULL;
  1129. }
  1130. }
  1131. EXPORT_SYMBOL(wcd_dsp_cntl_init);
  1132. /*
  1133. * wcd_dsp_cntl_deinit: De-initialize the wcd-dsp control
  1134. * @cntl: The struct wcd_dsp_cntl to de-initialize
  1135. *
  1136. * This API is intended to be invoked by the codec driver
  1137. * to de-initialize the wcd dsp control
  1138. */
  1139. void wcd_dsp_cntl_deinit(struct wcd_dsp_cntl **cntl)
  1140. {
  1141. struct wcd_dsp_cntl *control = *cntl;
  1142. struct snd_soc_codec *codec;
  1143. /* If control is NULL, there is nothing to de-initialize */
  1144. if (!control)
  1145. return;
  1146. codec = control->codec;
  1147. /*
  1148. * Calling shutdown will cleanup all register states,
  1149. * irrespective of DSP was booted up or not.
  1150. */
  1151. wcd_cntl_do_shutdown(control);
  1152. wcd_cntl_disable_memory(control, WCD_MEM_TYPE_SWITCHABLE);
  1153. wcd_cntl_disable_memory(control, WCD_MEM_TYPE_ALWAYS_ON);
  1154. component_del(codec->dev, &wcd_ctrl_component_ops);
  1155. mutex_destroy(&control->clk_mutex);
  1156. mutex_destroy(&control->ssr_mutex);
  1157. kfree(*cntl);
  1158. *cntl = NULL;
  1159. }
  1160. EXPORT_SYMBOL(wcd_dsp_cntl_deinit);