msm_smem.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/dma-buf.h>
  6. #include <linux/dma-heap.h>
  7. #include <linux/dma-direction.h>
  8. #include <linux/iommu.h>
  9. #include <linux/msm_dma_iommu_mapping.h>
  10. #include <linux/ion.h>
  11. #include <linux/msm_ion.h>
  12. #include <soc/qcom/secure_buffer.h>
  13. #include <linux/mem-buf.h>
  14. #include <linux/slab.h>
  15. #include <linux/types.h>
  16. #include "msm_cvp_core.h"
  17. #include "msm_cvp_debug.h"
  18. #include "msm_cvp_resources.h"
  19. #include "cvp_core_hfi.h"
  20. #include "msm_cvp_dsp.h"
  21. static int msm_dma_get_device_address(struct dma_buf *dbuf, u32 align,
  22. dma_addr_t *iova, u32 flags, struct msm_cvp_platform_resources *res,
  23. struct cvp_dma_mapping_info *mapping_info)
  24. {
  25. int rc = 0;
  26. struct dma_buf_attachment *attach;
  27. struct sg_table *table = NULL;
  28. struct context_bank_info *cb = NULL;
  29. if (!dbuf || !iova || !mapping_info) {
  30. dprintk(CVP_ERR, "Invalid params: %pK, %pK, %pK\n",
  31. dbuf, iova, mapping_info);
  32. return -EINVAL;
  33. }
  34. if (is_iommu_present(res)) {
  35. cb = msm_cvp_smem_get_context_bank(res, flags);
  36. if (!cb) {
  37. dprintk(CVP_ERR,
  38. "%s: Failed to get context bank device\n",
  39. __func__);
  40. rc = -EIO;
  41. goto mem_map_failed;
  42. }
  43. /* Prepare a dma buf for dma on the given device */
  44. attach = dma_buf_attach(dbuf, cb->dev);
  45. if (IS_ERR_OR_NULL(attach)) {
  46. rc = PTR_ERR(attach) ?: -ENOMEM;
  47. dprintk(CVP_ERR, "Failed to attach dmabuf\n");
  48. goto mem_buf_attach_failed;
  49. }
  50. /*
  51. * Get the scatterlist for the given attachment
  52. * Mapping of sg is taken care by map attachment
  53. */
  54. attach->dma_map_attrs = DMA_ATTR_DELAYED_UNMAP;
  55. /*
  56. * We do not need dma_map function to perform cache operations
  57. * on the whole buffer size and hence pass skip sync flag.
  58. * We do the required cache operations separately for the
  59. * required buffer size
  60. */
  61. attach->dma_map_attrs |= DMA_ATTR_SKIP_CPU_SYNC;
  62. if (res->sys_cache_present)
  63. attach->dma_map_attrs |=
  64. DMA_ATTR_IOMMU_USE_UPSTREAM_HINT;
  65. table = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);
  66. if (IS_ERR_OR_NULL(table)) {
  67. rc = PTR_ERR(table) ?: -ENOMEM;
  68. dprintk(CVP_ERR, "Failed to map table\n");
  69. goto mem_map_table_failed;
  70. }
  71. if (table->sgl) {
  72. *iova = table->sgl->dma_address;
  73. } else {
  74. dprintk(CVP_ERR, "sgl is NULL\n");
  75. rc = -ENOMEM;
  76. goto mem_map_sg_failed;
  77. }
  78. mapping_info->dev = cb->dev;
  79. mapping_info->domain = cb->domain;
  80. mapping_info->table = table;
  81. mapping_info->attach = attach;
  82. mapping_info->buf = dbuf;
  83. mapping_info->cb_info = (void *)cb;
  84. } else {
  85. dprintk(CVP_MEM, "iommu not present, use phys mem addr\n");
  86. }
  87. return 0;
  88. mem_map_sg_failed:
  89. dma_buf_unmap_attachment(attach, table, DMA_BIDIRECTIONAL);
  90. mem_map_table_failed:
  91. dma_buf_detach(dbuf, attach);
  92. mem_buf_attach_failed:
  93. mem_map_failed:
  94. return rc;
  95. }
  96. static int msm_dma_put_device_address(u32 flags,
  97. struct cvp_dma_mapping_info *mapping_info)
  98. {
  99. int rc = 0;
  100. if (!mapping_info) {
  101. dprintk(CVP_WARN, "Invalid mapping_info\n");
  102. return -EINVAL;
  103. }
  104. if (!mapping_info->dev || !mapping_info->table ||
  105. !mapping_info->buf || !mapping_info->attach ||
  106. !mapping_info->cb_info) {
  107. dprintk(CVP_WARN, "Invalid params\n");
  108. return -EINVAL;
  109. }
  110. dma_buf_unmap_attachment(mapping_info->attach,
  111. mapping_info->table, DMA_BIDIRECTIONAL);
  112. dma_buf_detach(mapping_info->buf, mapping_info->attach);
  113. mapping_info->dev = NULL;
  114. mapping_info->domain = NULL;
  115. mapping_info->table = NULL;
  116. mapping_info->attach = NULL;
  117. mapping_info->buf = NULL;
  118. mapping_info->cb_info = NULL;
  119. return rc;
  120. }
  121. struct dma_buf *msm_cvp_smem_get_dma_buf(int fd)
  122. {
  123. struct dma_buf *dma_buf;
  124. dma_buf = dma_buf_get(fd);
  125. if (IS_ERR_OR_NULL(dma_buf)) {
  126. dprintk(CVP_ERR, "Failed to get dma_buf for %d, error %ld\n",
  127. fd, PTR_ERR(dma_buf));
  128. dma_buf = NULL;
  129. }
  130. return dma_buf;
  131. }
  132. void msm_cvp_smem_put_dma_buf(void *dma_buf)
  133. {
  134. if (!dma_buf) {
  135. dprintk(CVP_ERR, "%s: NULL dma_buf\n", __func__);
  136. return;
  137. }
  138. dma_heap_buffer_free((struct dma_buf *)dma_buf);
  139. }
  140. int msm_cvp_map_smem(struct msm_cvp_inst *inst,
  141. struct msm_cvp_smem *smem,
  142. const char *str)
  143. {
  144. int *vmid_list;
  145. int *perms_list;
  146. int nelems = 0;
  147. int rc = 0;
  148. dma_addr_t iova = 0;
  149. u32 temp = 0;
  150. u32 align = SZ_4K;
  151. struct dma_buf *dma_buf;
  152. if (!inst || !smem) {
  153. dprintk(CVP_ERR, "%s: Invalid params: %pK %pK\n",
  154. __func__, inst, smem);
  155. return -EINVAL;
  156. }
  157. dma_buf = smem->dma_buf;
  158. rc = mem_buf_dma_buf_copy_vmperm(dma_buf,
  159. &vmid_list, &perms_list, &nelems);
  160. if (rc) {
  161. dprintk(CVP_ERR, "%s fail to get vmid and perms %d\n",
  162. __func__, rc);
  163. return rc;
  164. }
  165. for (temp = 0; temp < nelems; temp++) {
  166. if (vmid_list[temp] == VMID_CP_PIXEL)
  167. smem->flags |= (SMEM_SECURE | SMEM_PIXEL);
  168. else if (vmid_list[temp] == VMID_CP_NON_PIXEL)
  169. smem->flags |= (SMEM_SECURE | SMEM_NON_PIXEL);
  170. else if (vmid_list[temp] == VMID_CP_CAMERA)
  171. smem->flags |= (SMEM_SECURE | SMEM_CAMERA);
  172. }
  173. rc = msm_dma_get_device_address(dma_buf, align, &iova, smem->flags,
  174. &(inst->core->resources), &smem->mapping_info);
  175. if (rc) {
  176. dprintk(CVP_ERR, "Failed to get device address: %d\n", rc);
  177. goto exit;
  178. }
  179. temp = (u32)iova;
  180. if ((dma_addr_t)temp != iova) {
  181. dprintk(CVP_ERR, "iova(%pa) truncated to %#x", &iova, temp);
  182. rc = -EINVAL;
  183. goto exit;
  184. }
  185. smem->size = dma_buf->size;
  186. smem->device_addr = (u32)iova;
  187. print_smem(CVP_MEM, str, inst, smem);
  188. goto success;
  189. exit:
  190. smem->device_addr = 0x0;
  191. success:
  192. kfree(vmid_list);
  193. kfree(perms_list);
  194. return rc;
  195. }
  196. int msm_cvp_unmap_smem(struct msm_cvp_inst *inst,
  197. struct msm_cvp_smem *smem,
  198. const char *str)
  199. {
  200. int rc = 0;
  201. if (!smem) {
  202. dprintk(CVP_ERR, "%s: Invalid params: %pK\n", __func__, smem);
  203. rc = -EINVAL;
  204. goto exit;
  205. }
  206. print_smem(CVP_MEM, str, inst, smem);
  207. rc = msm_dma_put_device_address(smem->flags, &smem->mapping_info);
  208. if (rc) {
  209. dprintk(CVP_ERR, "Failed to put device address: %d\n", rc);
  210. goto exit;
  211. }
  212. smem->device_addr = 0x0;
  213. exit:
  214. return rc;
  215. }
  216. static int alloc_dma_mem(size_t size, u32 align, int map_kernel,
  217. struct msm_cvp_platform_resources *res, struct msm_cvp_smem *mem)
  218. {
  219. dma_addr_t iova = 0;
  220. int rc = 0;
  221. struct dma_buf *dbuf = NULL;
  222. struct dma_heap *heap = NULL;
  223. if (!res) {
  224. dprintk(CVP_ERR, "%s: NULL res\n", __func__);
  225. return -EINVAL;
  226. }
  227. align = ALIGN(align, SZ_4K);
  228. size = ALIGN(size, SZ_4K);
  229. if (is_iommu_present(res)) {
  230. heap = dma_heap_find("qcom,system");
  231. dprintk(CVP_MEM, "%s size %zx align %d flag %d\n",
  232. __func__, size, align, mem->flags);
  233. } else {
  234. dprintk(CVP_ERR,
  235. "No IOMMU CB: allocate shared memory heap size %zx align %d\n",
  236. size, align);
  237. }
  238. if (mem->flags & SMEM_NON_PIXEL)
  239. heap = dma_heap_find("qcom,secure-non-pixel");
  240. else if (mem->flags & SMEM_PIXEL)
  241. heap = dma_heap_find("qcom,secure-pixel");
  242. dbuf = dma_heap_buffer_alloc(heap, size, 0, 0);
  243. if (IS_ERR_OR_NULL(dbuf)) {
  244. dprintk(CVP_ERR,
  245. "Failed to allocate shared memory = %x bytes, %x %x\n",
  246. size, mem->flags, PTR_ERR(dbuf));
  247. rc = -ENOMEM;
  248. goto fail_shared_mem_alloc;
  249. }
  250. if (!gfa_cv.dmabuf_f_op)
  251. gfa_cv.dmabuf_f_op = (const struct file_operations *)dbuf->file->f_op;
  252. mem->size = size;
  253. mem->dma_buf = dbuf;
  254. mem->kvaddr = NULL;
  255. rc = msm_dma_get_device_address(dbuf, align, &iova, mem->flags,
  256. res, &mem->mapping_info);
  257. if (rc) {
  258. dprintk(CVP_ERR, "Failed to get device address: %d\n",
  259. rc);
  260. goto fail_device_address;
  261. }
  262. mem->device_addr = (u32)iova;
  263. if ((dma_addr_t)mem->device_addr != iova) {
  264. dprintk(CVP_ERR, "iova(%pa) truncated to %#x",
  265. &iova, mem->device_addr);
  266. goto fail_device_address;
  267. }
  268. if (map_kernel) {
  269. dma_buf_begin_cpu_access(dbuf, DMA_BIDIRECTIONAL);
  270. mem->kvaddr = dma_buf_vmap(dbuf);
  271. if (!mem->kvaddr) {
  272. dprintk(CVP_ERR,
  273. "Failed to map shared mem in kernel\n");
  274. rc = -EIO;
  275. goto fail_map;
  276. }
  277. }
  278. dprintk(CVP_MEM,
  279. "%s: dma_buf=%pK,iova=%x,size=%d,kvaddr=%pK,flags=%#lx\n",
  280. __func__, mem->dma_buf, mem->device_addr, mem->size,
  281. mem->kvaddr, mem->flags);
  282. return rc;
  283. fail_map:
  284. if (map_kernel)
  285. dma_buf_end_cpu_access(dbuf, DMA_BIDIRECTIONAL);
  286. fail_device_address:
  287. dma_heap_buffer_free(dbuf);
  288. fail_shared_mem_alloc:
  289. return rc;
  290. }
  291. static int free_dma_mem(struct msm_cvp_smem *mem)
  292. {
  293. dprintk(CVP_MEM,
  294. "%s: dma_buf = %pK, device_addr = %x, size = %d, kvaddr = %pK\n",
  295. __func__, mem->dma_buf, mem->device_addr, mem->size, mem->kvaddr);
  296. if (mem->device_addr) {
  297. msm_dma_put_device_address(mem->flags, &mem->mapping_info);
  298. mem->device_addr = 0x0;
  299. }
  300. if (mem->kvaddr) {
  301. dma_buf_vunmap(mem->dma_buf, mem->kvaddr);
  302. mem->kvaddr = NULL;
  303. dma_buf_end_cpu_access(mem->dma_buf, DMA_BIDIRECTIONAL);
  304. }
  305. if (mem->dma_buf) {
  306. dma_heap_buffer_free(mem->dma_buf);
  307. mem->dma_buf = NULL;
  308. }
  309. return 0;
  310. }
  311. int msm_cvp_smem_alloc(size_t size, u32 align, int map_kernel,
  312. void *res, struct msm_cvp_smem *smem)
  313. {
  314. int rc = 0;
  315. if (!smem || !size) {
  316. dprintk(CVP_ERR, "%s: NULL smem or %d size\n",
  317. __func__, (u32)size);
  318. return -EINVAL;
  319. }
  320. rc = alloc_dma_mem(size, align, map_kernel,
  321. (struct msm_cvp_platform_resources *)res, smem);
  322. return rc;
  323. }
  324. int msm_cvp_smem_free(struct msm_cvp_smem *smem)
  325. {
  326. int rc = 0;
  327. if (!smem) {
  328. dprintk(CVP_ERR, "NULL smem passed\n");
  329. return -EINVAL;
  330. }
  331. rc = free_dma_mem(smem);
  332. return rc;
  333. };
  334. int msm_cvp_smem_cache_operations(struct dma_buf *dbuf,
  335. enum smem_cache_ops cache_op, unsigned long offset, unsigned long size)
  336. {
  337. int rc = 0;
  338. if (!dbuf) {
  339. dprintk(CVP_ERR, "%s: Invalid params\n", __func__);
  340. return -EINVAL;
  341. }
  342. switch (cache_op) {
  343. case SMEM_CACHE_CLEAN:
  344. case SMEM_CACHE_CLEAN_INVALIDATE:
  345. rc = dma_buf_begin_cpu_access_partial(dbuf, DMA_BIDIRECTIONAL,
  346. offset, size);
  347. if (rc)
  348. break;
  349. rc = dma_buf_end_cpu_access_partial(dbuf, DMA_BIDIRECTIONAL,
  350. offset, size);
  351. break;
  352. case SMEM_CACHE_INVALIDATE:
  353. rc = dma_buf_begin_cpu_access_partial(dbuf, DMA_TO_DEVICE,
  354. offset, size);
  355. if (rc)
  356. break;
  357. rc = dma_buf_end_cpu_access_partial(dbuf, DMA_FROM_DEVICE,
  358. offset, size);
  359. break;
  360. default:
  361. dprintk(CVP_ERR, "%s: cache (%d) operation not supported\n",
  362. __func__, cache_op);
  363. rc = -EINVAL;
  364. break;
  365. }
  366. return rc;
  367. }
  368. struct context_bank_info *msm_cvp_smem_get_context_bank(
  369. struct msm_cvp_platform_resources *res,
  370. unsigned int flags)
  371. {
  372. struct context_bank_info *cb = NULL, *match = NULL;
  373. char *search_str;
  374. char *non_secure_cb = "cvp_hlos";
  375. char *secure_nonpixel_cb = "cvp_sec_nonpixel";
  376. char *secure_pixel_cb = "cvp_sec_pixel";
  377. bool is_secure = (flags & SMEM_SECURE) ? true : false;
  378. if (flags & SMEM_PIXEL)
  379. search_str = secure_pixel_cb;
  380. else if (flags & SMEM_NON_PIXEL)
  381. search_str = secure_nonpixel_cb;
  382. else
  383. search_str = non_secure_cb;
  384. list_for_each_entry(cb, &res->context_banks, list) {
  385. if (cb->is_secure == is_secure &&
  386. !strcmp(search_str, cb->name)) {
  387. match = cb;
  388. break;
  389. }
  390. }
  391. if (!match)
  392. dprintk(CVP_ERR,
  393. "%s: cb not found for flags %x, is_secure %d\n",
  394. __func__, flags, is_secure);
  395. return match;
  396. }
  397. int msm_cvp_map_ipcc_regs(u32 *iova)
  398. {
  399. struct context_bank_info *cb;
  400. struct msm_cvp_core *core;
  401. struct cvp_hfi_device *hfi_ops;
  402. struct iris_hfi_device *dev = NULL;
  403. phys_addr_t paddr;
  404. u32 size;
  405. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  406. if (core) {
  407. hfi_ops = core->device;
  408. if (hfi_ops)
  409. dev = hfi_ops->hfi_device_data;
  410. }
  411. if (!dev)
  412. return -EINVAL;
  413. paddr = dev->res->ipcc_reg_base;
  414. size = dev->res->ipcc_reg_size;
  415. if (!paddr || !size)
  416. return -EINVAL;
  417. cb = msm_cvp_smem_get_context_bank(dev->res, 0);
  418. if (!cb) {
  419. dprintk(CVP_ERR, "%s: fail to get context bank\n", __func__);
  420. return -EINVAL;
  421. }
  422. *iova = dma_map_resource(cb->dev, paddr, size, DMA_BIDIRECTIONAL, 0);
  423. if (*iova == DMA_MAPPING_ERROR) {
  424. dprintk(CVP_WARN, "%s: fail to map IPCC regs\n", __func__);
  425. return -EFAULT;
  426. }
  427. return 0;
  428. }