5fec859ec63c08095870c5ed88ffe36e037eea3b

Clock gating must be disabled at top level initialize hardware routine as VFE is reset after resource level initialize hardware routine. CRs-Fixed: 2590331 Change-Id: I5c51c402a3a6076f056368493b774daa199228aa Signed-off-by: Venkat Chinta <vchinta@codeaurora.org>
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