wcd937x.c 59 KB

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  1. /*
  2. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/slab.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/device.h>
  17. #include <linux/delay.h>
  18. #include <linux/kernel.h>
  19. #include <linux/component.h>
  20. #include <sound/soc.h>
  21. #include <sound/tlv.h>
  22. #include <soc/soundwire.h>
  23. #include <linux/regmap.h>
  24. #include <sound/soc.h>
  25. #include <sound/soc-dapm.h>
  26. #include "internal.h"
  27. #include "../wcdcal-hwdep.h"
  28. #include "wcd937x-registers.h"
  29. #include "../msm-cdc-pinctrl.h"
  30. #include <dt-bindings/sound/audio-codec-port-types.h>
  31. #include "../msm-cdc-supply.h"
  32. #define WCD9370_VARIANT 0
  33. #define WCD9375_VARIANT 5
  34. #define NUM_SWRS_DT_PARAMS 5
  35. #define WCD937X_VERSION_1_0 1
  36. #define WCD937X_VERSION_ENTRY_SIZE 32
  37. enum {
  38. CODEC_TX = 0,
  39. CODEC_RX,
  40. };
  41. static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
  42. static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
  43. static int wcd937x_handle_post_irq(void *data);
  44. static const struct regmap_irq wcd937x_irqs[WCD937X_NUM_IRQS] = {
  45. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_BUTTON_PRESS_DET, 0, 0x01),
  46. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_BUTTON_RELEASE_DET, 0, 0x02),
  47. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_ELECT_INS_REM_DET, 0, 0x04),
  48. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_ELECT_INS_REM_LEG_DET, 0, 0x08),
  49. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_SW_DET, 0, 0x10),
  50. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_OCP_INT, 0, 0x20),
  51. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_CNP_INT, 0, 0x40),
  52. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_OCP_INT, 0, 0x80),
  53. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_CNP_INT, 1, 0x01),
  54. REGMAP_IRQ_REG(WCD937X_IRQ_EAR_CNP_INT, 1, 0x02),
  55. REGMAP_IRQ_REG(WCD937X_IRQ_EAR_SCD_INT, 1, 0x04),
  56. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_CNP_INT, 1, 0x08),
  57. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_SCD_INT, 1, 0x10),
  58. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_PDM_WD_INT, 1, 0x20),
  59. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_PDM_WD_INT, 1, 0x40),
  60. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_PDM_WD_INT, 1, 0x80),
  61. REGMAP_IRQ_REG(WCD937X_IRQ_LDORT_SCD_INT, 2, 0x01),
  62. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_MOISTURE_INT, 2, 0x02),
  63. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_SURGE_DET_INT, 2, 0x04),
  64. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_SURGE_DET_INT, 2, 0x08),
  65. };
  66. static struct regmap_irq_chip wcd937x_regmap_irq_chip = {
  67. .name = "wcd937x",
  68. .irqs = wcd937x_irqs,
  69. .num_irqs = ARRAY_SIZE(wcd937x_irqs),
  70. .num_regs = 3,
  71. .status_base = WCD937X_DIGITAL_INTR_STATUS_0,
  72. .mask_base = WCD937X_DIGITAL_INTR_MASK_0,
  73. .type_base = WCD937X_DIGITAL_INTR_LEVEL_0,
  74. .runtime_pm = false,
  75. .handle_post_irq = wcd937x_handle_post_irq,
  76. .irq_drv_data = NULL,
  77. };
  78. static int wcd937x_handle_post_irq(void *data)
  79. {
  80. struct wcd937x_priv *wcd937x = data;
  81. int val = 0;
  82. struct wcd937x_pdata *pdata = NULL;
  83. pdata = dev_get_platdata(wcd937x->dev);
  84. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_0, &val);
  85. dev_dbg(wcd937x->dev, "%s Clear OCP interupts\n", __func__);
  86. regmap_write(wcd937x->regmap,
  87. WCD937X_DIGITAL_INTR_CLEAR_0, 0xFF);
  88. regmap_write(wcd937x->regmap,
  89. WCD937X_DIGITAL_INTR_CLEAR_0, 0x0);
  90. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_1, &val);
  91. dev_dbg(wcd937x->dev, "%s Clear SCD interupts\n", __func__);
  92. regmap_write(wcd937x->regmap,
  93. WCD937X_DIGITAL_INTR_CLEAR_1, 0xFF);
  94. regmap_write(wcd937x->regmap,
  95. WCD937X_DIGITAL_INTR_CLEAR_1, 0x0);
  96. regmap_write(wcd937x->regmap,
  97. WCD937X_DIGITAL_INTR_CLEAR_2, 0xFF);
  98. regmap_write(wcd937x->regmap,
  99. WCD937X_DIGITAL_INTR_CLEAR_2, 0x0);
  100. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_0, &val);
  101. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_1, &val);
  102. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_2, &val);
  103. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_CLEAR_0, &val);
  104. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_CLEAR_1, &val);
  105. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_CLEAR_2, &val);
  106. return IRQ_HANDLED;
  107. }
  108. static int wcd937x_init_reg(struct snd_soc_codec *codec)
  109. {
  110. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x0E, 0x0E);
  111. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x80, 0x80);
  112. usleep_range(1000, 1010);
  113. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x40, 0x40);
  114. usleep_range(1000, 1010);
  115. snd_soc_update_bits(codec, WCD937X_LDORXTX_CONFIG, 0x10, 0x00);
  116. snd_soc_update_bits(codec, WCD937X_BIAS_VBG_FINE_ADJ, 0xF0, 0x80);
  117. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x80, 0x80);
  118. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x40, 0x40);
  119. usleep_range(10000, 10010);
  120. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x40, 0x00);
  121. return 0;
  122. }
  123. static int wcd937x_set_port_params(struct snd_soc_codec *codec, u8 slv_prt_type,
  124. u8 *port_id, u8 *num_ch, u8 *ch_mask, u32 *ch_rate,
  125. u8 *port_type, u8 path)
  126. {
  127. int i, j;
  128. u8 num_ports;
  129. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT];
  130. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  131. switch (path) {
  132. case CODEC_RX:
  133. map = &wcd937x->rx_port_mapping;
  134. num_ports = wcd937x->num_rx_ports;
  135. break;
  136. case CODEC_TX:
  137. map = &wcd937x->tx_port_mapping;
  138. num_ports = wcd937x->num_tx_ports;
  139. break;
  140. }
  141. for (i = 0; i <= num_ports; i++) {
  142. for (j = 0; j < MAX_CH_PER_PORT; j++) {
  143. if ((*map)[i][j].slave_port_type == slv_prt_type)
  144. goto found;
  145. }
  146. }
  147. found:
  148. if (i > num_ports || j == MAX_CH_PER_PORT) {
  149. dev_err(codec->dev, "%s Failed to find slave port for type %u\n",
  150. __func__, slv_prt_type);
  151. return -EINVAL;
  152. }
  153. *port_id = i;
  154. *num_ch = (*map)[i][j].num_ch;
  155. *ch_mask = (*map)[i][j].ch_mask;
  156. *ch_rate = (*map)[i][j].ch_rate;
  157. *port_type = (*map)[i][j].master_port_type;
  158. return 0;
  159. }
  160. static int wcd937x_parse_port_mapping(struct device *dev,
  161. char *prop, u8 path)
  162. {
  163. u32 *dt_array, map_size, map_length;
  164. u32 port_num, ch_mask, ch_rate, old_port_num = 0;
  165. u32 slave_port_type, master_port_type;
  166. u32 i, ch_iter = 0;
  167. int ret = 0;
  168. u8 *num_ports;
  169. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT];
  170. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  171. switch (path) {
  172. case CODEC_RX:
  173. map = &wcd937x->rx_port_mapping;
  174. num_ports = &wcd937x->num_rx_ports;
  175. break;
  176. case CODEC_TX:
  177. map = &wcd937x->tx_port_mapping;
  178. num_ports = &wcd937x->num_tx_ports;
  179. break;
  180. }
  181. if (!of_find_property(dev->of_node, prop,
  182. &map_size)) {
  183. dev_err(dev, "missing port mapping prop %s\n", prop);
  184. goto err_pdata_fail;
  185. }
  186. map_length = map_size / (NUM_SWRS_DT_PARAMS * sizeof(u32));
  187. dt_array = kzalloc(map_size, GFP_KERNEL);
  188. if (!dt_array) {
  189. ret = -ENOMEM;
  190. goto err_pdata_fail;
  191. }
  192. ret = of_property_read_u32_array(dev->of_node, prop, dt_array,
  193. NUM_SWRS_DT_PARAMS * map_length);
  194. if (ret) {
  195. dev_err(dev, "%s: Failed to read port mapping from prop %s\n",
  196. __func__, prop);
  197. goto err_pdata_fail;
  198. }
  199. for (i = 0; i < map_length; i++) {
  200. port_num = dt_array[NUM_SWRS_DT_PARAMS * i];
  201. slave_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 1];
  202. ch_mask = dt_array[NUM_SWRS_DT_PARAMS * i + 2];
  203. ch_rate = dt_array[NUM_SWRS_DT_PARAMS * i + 3];
  204. master_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 4];
  205. if (port_num != old_port_num)
  206. ch_iter = 0;
  207. (*map)[port_num][ch_iter].slave_port_type = slave_port_type;
  208. (*map)[port_num][ch_iter].ch_mask = ch_mask;
  209. (*map)[port_num][ch_iter].master_port_type = master_port_type;
  210. (*map)[port_num][ch_iter].num_ch = __sw_hweight8(ch_mask);
  211. (*map)[port_num][ch_iter++].ch_rate = ch_rate;
  212. old_port_num = port_num;
  213. }
  214. *num_ports = port_num;
  215. kfree(dt_array);
  216. return 0;
  217. err_pdata_fail:
  218. kfree(dt_array);
  219. return -EINVAL;
  220. }
  221. static int wcd937x_tx_connect_port(struct snd_soc_codec *codec,
  222. u8 slv_port_type, u8 enable)
  223. {
  224. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  225. u8 port_id;
  226. u8 num_ch;
  227. u8 ch_mask;
  228. u32 ch_rate;
  229. u8 port_type;
  230. u8 num_port = 1;
  231. int ret = 0;
  232. ret = wcd937x_set_port_params(codec, slv_port_type, &port_id,
  233. &num_ch, &ch_mask, &ch_rate,
  234. &port_type, CODEC_TX);
  235. if (ret)
  236. return ret;
  237. if (enable)
  238. ret = swr_connect_port(wcd937x->tx_swr_dev, &port_id,
  239. num_port, &ch_mask, &ch_rate,
  240. &num_ch, &port_type);
  241. else
  242. ret = swr_disconnect_port(wcd937x->tx_swr_dev, &port_id,
  243. num_port, &ch_mask, &port_type);
  244. return ret;
  245. }
  246. static int wcd937x_rx_connect_port(struct snd_soc_codec *codec,
  247. u8 slv_port_type, u8 enable)
  248. {
  249. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  250. u8 port_id;
  251. u8 num_ch;
  252. u8 ch_mask;
  253. u32 ch_rate;
  254. u8 port_type;
  255. u8 num_port = 1;
  256. int ret = 0;
  257. ret = wcd937x_set_port_params(codec, slv_port_type, &port_id,
  258. &num_ch, &ch_mask, &ch_rate,
  259. &port_type, CODEC_RX);
  260. if (ret)
  261. return ret;
  262. if (enable)
  263. ret = swr_connect_port(wcd937x->rx_swr_dev, &port_id,
  264. num_port, &ch_mask, &ch_rate,
  265. &num_ch, &port_type);
  266. else
  267. ret = swr_disconnect_port(wcd937x->rx_swr_dev, &port_id,
  268. num_port, &ch_mask, &port_type);
  269. return ret;
  270. }
  271. static int wcd937x_rx_clk_enable(struct snd_soc_codec *codec)
  272. {
  273. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  274. if (wcd937x->rx_clk_cnt == 0) {
  275. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  276. 0x08, 0x08);
  277. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  278. 0x01, 0x01);
  279. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x01, 0x01);
  280. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_RX0_CTL,
  281. 0x40, 0x00);
  282. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_RX1_CTL,
  283. 0x40, 0x00);
  284. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_RX2_CTL,
  285. 0x40, 0x00);
  286. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  287. 0x02, 0x02);
  288. }
  289. wcd937x->rx_clk_cnt++;
  290. return 0;
  291. }
  292. static int wcd937x_rx_clk_disable(struct snd_soc_codec *codec)
  293. {
  294. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  295. wcd937x->rx_clk_cnt--;
  296. if (wcd937x->rx_clk_cnt == 0) {
  297. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x40, 0x00);
  298. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x80, 0x00);
  299. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x01, 0x00);
  300. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  301. 0x02, 0x00);
  302. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  303. 0x01, 0x00);
  304. }
  305. return 0;
  306. }
  307. /*
  308. * wcd937x_soc_get_mbhc: get wcd937x_mbhc handle of corresponding codec
  309. * @codec: handle to snd_soc_codec *
  310. *
  311. * return wcd937x_mbhc handle or error code in case of failure
  312. */
  313. struct wcd937x_mbhc *wcd937x_soc_get_mbhc(struct snd_soc_codec *codec)
  314. {
  315. struct wcd937x_priv *wcd937x;
  316. if (!codec) {
  317. pr_err("%s: Invalid params, NULL codec\n", __func__);
  318. return NULL;
  319. }
  320. wcd937x = snd_soc_codec_get_drvdata(codec);
  321. if (!wcd937x) {
  322. pr_err("%s: Invalid params, NULL tavil\n", __func__);
  323. return NULL;
  324. }
  325. return wcd937x->mbhc;
  326. }
  327. EXPORT_SYMBOL(wcd937x_soc_get_mbhc);
  328. static int wcd937x_codec_hphl_dac_event(struct snd_soc_dapm_widget *w,
  329. struct snd_kcontrol *kcontrol,
  330. int event)
  331. {
  332. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  333. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  334. int ret = 0;
  335. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  336. w->name, event);
  337. switch (event) {
  338. case SND_SOC_DAPM_PRE_PMU:
  339. wcd937x_rx_clk_enable(codec);
  340. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  341. 0x01, 0x01);
  342. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  343. 0x04, 0x04);
  344. snd_soc_update_bits(codec, WCD937X_HPH_RDAC_CLK_CTL1,
  345. 0x80, 0x00);
  346. break;
  347. case SND_SOC_DAPM_POST_PMU:
  348. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  349. 0x0F, 0x02);
  350. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_COMP_CTL_0,
  351. 0x02, 0x02);
  352. usleep_range(5000, 5010);
  353. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  354. 0x02, 0x00);
  355. break;
  356. case SND_SOC_DAPM_POST_PMD:
  357. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  358. wcd937x->rx_swr_dev->dev_num,
  359. false);
  360. break;
  361. }
  362. return ret;
  363. }
  364. static int wcd937x_codec_hphr_dac_event(struct snd_soc_dapm_widget *w,
  365. struct snd_kcontrol *kcontrol,
  366. int event)
  367. {
  368. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  369. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  370. int ret = 0;
  371. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  372. w->name, event);
  373. switch (event) {
  374. case SND_SOC_DAPM_PRE_PMU:
  375. wcd937x_rx_clk_enable(codec);
  376. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  377. 0x02, 0x02);
  378. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  379. 0x08, 0x08);
  380. snd_soc_update_bits(codec, WCD937X_HPH_RDAC_CLK_CTL1,
  381. 0x80, 0x00);
  382. break;
  383. case SND_SOC_DAPM_POST_PMU:
  384. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_R,
  385. 0x0F, 0x02);
  386. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_COMP_CTL_0,
  387. 0x01, 0x01);
  388. usleep_range(5000, 5010);
  389. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  390. 0x02, 0x00);
  391. break;
  392. case SND_SOC_DAPM_POST_PMD:
  393. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  394. wcd937x->rx_swr_dev->dev_num,
  395. false);
  396. break;
  397. }
  398. return ret;
  399. }
  400. static int wcd937x_codec_ear_dac_event(struct snd_soc_dapm_widget *w,
  401. struct snd_kcontrol *kcontrol,
  402. int event)
  403. {
  404. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  405. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  406. int ret = 0;
  407. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  408. w->name, event);
  409. switch (event) {
  410. case SND_SOC_DAPM_PRE_PMU:
  411. wcd937x_rx_clk_enable(codec);
  412. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  413. 0x04, 0x04);
  414. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  415. 0x01, 0x01);
  416. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_COMP_CTL_0,
  417. 0x02, 0x02);
  418. usleep_range(5000, 5010);
  419. break;
  420. case SND_SOC_DAPM_POST_PMD:
  421. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  422. wcd937x->rx_swr_dev->dev_num,
  423. false);
  424. break;
  425. };
  426. return ret;
  427. }
  428. static int wcd937x_codec_aux_dac_event(struct snd_soc_dapm_widget *w,
  429. struct snd_kcontrol *kcontrol,
  430. int event)
  431. {
  432. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  433. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  434. int ret = 0;
  435. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  436. w->name, event);
  437. switch (event) {
  438. case SND_SOC_DAPM_PRE_PMU:
  439. wcd937x_rx_clk_enable(codec);
  440. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  441. 0x04, 0x04);
  442. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  443. 0x04, 0x04);
  444. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_AUX_GAIN_CTL,
  445. 0x01, 0x01);
  446. break;
  447. case SND_SOC_DAPM_POST_PMD:
  448. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  449. wcd937x->rx_swr_dev->dev_num,
  450. false);
  451. wcd937x_rx_clk_disable(codec);
  452. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  453. 0x04, 0x00);
  454. break;
  455. };
  456. return ret;
  457. }
  458. static int wcd937x_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
  459. struct snd_kcontrol *kcontrol,
  460. int event)
  461. {
  462. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  463. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  464. int ret = 0;
  465. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  466. w->name, event);
  467. switch (event) {
  468. case SND_SOC_DAPM_PRE_PMU:
  469. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x10, 0x10);
  470. usleep_range(100, 110);
  471. break;
  472. case SND_SOC_DAPM_POST_PMU:
  473. usleep_range(7000, 7010);
  474. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  475. 0x02, 0x02);
  476. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  477. 0x02, 0x02);
  478. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  479. wcd937x->rx_swr_dev->dev_num,
  480. true);
  481. break;
  482. case SND_SOC_DAPM_POST_PMD:
  483. usleep_range(7000, 7010);
  484. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x10, 0x00);
  485. break;
  486. };
  487. return ret;
  488. }
  489. static int wcd937x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
  490. struct snd_kcontrol *kcontrol,
  491. int event)
  492. {
  493. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  494. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  495. int ret = 0;
  496. switch (event) {
  497. case SND_SOC_DAPM_PRE_PMU:
  498. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x20, 0x20);
  499. usleep_range(100, 110);
  500. break;
  501. case SND_SOC_DAPM_POST_PMU:
  502. usleep_range(7000, 7010);
  503. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  504. 0x02, 0x02);
  505. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  506. 0x02, 0x02);
  507. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  508. wcd937x->rx_swr_dev->dev_num,
  509. true);
  510. break;
  511. case SND_SOC_DAPM_POST_PMD:
  512. usleep_range(7000, 7010);
  513. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x20, 0x00);
  514. break;
  515. };
  516. return ret;
  517. }
  518. static int wcd937x_codec_enable_aux_pa(struct snd_soc_dapm_widget *w,
  519. struct snd_kcontrol *kcontrol,
  520. int event)
  521. {
  522. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  523. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  524. int ret = 0;
  525. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  526. w->name, event);
  527. switch (event) {
  528. case SND_SOC_DAPM_PRE_PMU:
  529. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  530. 0x80, 0x80);
  531. usleep_range(500, 510);
  532. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  533. usleep_range(500, 510);
  534. break;
  535. case SND_SOC_DAPM_POST_PMU:
  536. usleep_range(1000, 1010);
  537. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  538. 0x20, 0x20);
  539. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  540. wcd937x->rx_swr_dev->dev_num,
  541. true);
  542. break;
  543. case SND_SOC_DAPM_POST_PMD:
  544. usleep_range(1000, 1010);
  545. usleep_range(1000, 1010);
  546. break;
  547. };
  548. return ret;
  549. }
  550. static int wcd937x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
  551. struct snd_kcontrol *kcontrol,
  552. int event)
  553. {
  554. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  555. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  556. int ret = 0;
  557. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  558. w->name, event);
  559. switch (event) {
  560. case SND_SOC_DAPM_PRE_PMU:
  561. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  562. 0x08, 0x08);
  563. usleep_range(500, 510);
  564. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  565. usleep_range(500, 510);
  566. break;
  567. case SND_SOC_DAPM_POST_PMU:
  568. usleep_range(6000, 6010);
  569. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  570. 0x02, 0x02);
  571. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  572. wcd937x->rx_swr_dev->dev_num,
  573. true);
  574. break;
  575. case SND_SOC_DAPM_POST_PMD:
  576. usleep_range(7000, 7010);
  577. break;
  578. };
  579. return ret;
  580. }
  581. static int wcd937x_enable_rx1(struct snd_soc_dapm_widget *w,
  582. struct snd_kcontrol *kcontrol,
  583. int event)
  584. {
  585. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  586. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  587. w->name, event);
  588. switch (event) {
  589. case SND_SOC_DAPM_PRE_PMU:
  590. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_4,
  591. 0xF0, 0x80);
  592. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  593. 0xE0, 0xA0);
  594. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_3,
  595. 0x02, 0x02);
  596. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2,
  597. 0xFF, 0x1C);
  598. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  599. 0x40, 0x40);
  600. usleep_range(100, 110);
  601. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  602. 0xE0, 0xE0);
  603. usleep_range(100, 110);
  604. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  605. 0x80, 0x80);
  606. usleep_range(500, 510);
  607. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  608. usleep_range(500, 510);
  609. wcd937x_rx_connect_port(codec, HPH_L, true);
  610. wcd937x_rx_connect_port(codec, COMP_L, true);
  611. break;
  612. case SND_SOC_DAPM_POST_PMD:
  613. wcd937x_rx_connect_port(codec, HPH_L, false);
  614. wcd937x_rx_connect_port(codec, COMP_L, false);
  615. wcd937x_rx_clk_disable(codec);
  616. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  617. 0x01, 0x00);
  618. break;
  619. };
  620. return 0;
  621. }
  622. static int wcd937x_enable_rx2(struct snd_soc_dapm_widget *w,
  623. struct snd_kcontrol *kcontrol, int event)
  624. {
  625. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  626. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  627. w->name, event);
  628. switch (event) {
  629. case SND_SOC_DAPM_PRE_PMU:
  630. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_4,
  631. 0xF0, 0x80);
  632. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  633. 0xE0, 0xA0);
  634. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_3, 0x02, 0x02);
  635. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x1C);
  636. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  637. 0x40, 0x40);
  638. usleep_range(100, 110);
  639. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  640. 0xE0, 0xE0);
  641. usleep_range(100, 110);
  642. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  643. 0x80, 0x80);
  644. usleep_range(500, 510);
  645. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  646. usleep_range(500, 510);
  647. wcd937x_rx_connect_port(codec, HPH_R, true);
  648. wcd937x_rx_connect_port(codec, COMP_R, true);
  649. break;
  650. case SND_SOC_DAPM_POST_PMD:
  651. wcd937x_rx_connect_port(codec, HPH_R, false);
  652. wcd937x_rx_connect_port(codec, COMP_R, false);
  653. wcd937x_rx_clk_disable(codec);
  654. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  655. 0x02, 0x00);
  656. break;
  657. };
  658. return 0;
  659. }
  660. static int wcd937x_enable_rx3(struct snd_soc_dapm_widget *w,
  661. struct snd_kcontrol *kcontrol,
  662. int event)
  663. {
  664. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  665. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  666. w->name, event);
  667. switch (event) {
  668. case SND_SOC_DAPM_PRE_PMU:
  669. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_2,
  670. 0xE0, 0xA0);
  671. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_3, 0x02, 0x02);
  672. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x1C);
  673. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  674. 0x40, 0x40);
  675. usleep_range(100, 110);
  676. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_2,
  677. 0xE0, 0xE0);
  678. usleep_range(100, 110);
  679. wcd937x_rx_connect_port(codec, LO, true);
  680. break;
  681. case SND_SOC_DAPM_POST_PMD:
  682. wcd937x_rx_connect_port(codec, LO, false);
  683. usleep_range(6000, 6010);
  684. wcd937x_rx_clk_disable(codec);
  685. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  686. 0x04, 0x00);
  687. break;
  688. }
  689. return 0;
  690. }
  691. static int wcd937x_codec_enable_dmic(struct snd_soc_dapm_widget *w,
  692. struct snd_kcontrol *kcontrol,
  693. int event)
  694. {
  695. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  696. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  697. u16 dmic_clk_reg;
  698. s32 *dmic_clk_cnt;
  699. unsigned int dmic;
  700. char *wname;
  701. int ret = 0;
  702. wname = strpbrk(w->name, "012345");
  703. if (!wname) {
  704. dev_err(codec->dev, "%s: widget not found\n", __func__);
  705. return -EINVAL;
  706. }
  707. ret = kstrtouint(wname, 10, &dmic);
  708. if (ret < 0) {
  709. dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
  710. __func__);
  711. return -EINVAL;
  712. }
  713. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  714. w->name, event);
  715. switch (dmic) {
  716. case 0:
  717. case 1:
  718. dmic_clk_cnt = &(wcd937x->dmic_0_1_clk_cnt);
  719. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC0_CTL;
  720. break;
  721. case 2:
  722. case 3:
  723. dmic_clk_cnt = &(wcd937x->dmic_2_3_clk_cnt);
  724. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC1_CTL;
  725. break;
  726. case 4:
  727. case 5:
  728. dmic_clk_cnt = &(wcd937x->dmic_4_5_clk_cnt);
  729. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC2_CTL;
  730. break;
  731. default:
  732. dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
  733. __func__);
  734. return -EINVAL;
  735. };
  736. dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_clk_cnt %d\n",
  737. __func__, event, dmic, *dmic_clk_cnt);
  738. switch (event) {
  739. case SND_SOC_DAPM_PRE_PMU:
  740. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  741. 0x80, 0x80);
  742. snd_soc_update_bits(codec, dmic_clk_reg, 0x07, 0x02);
  743. snd_soc_update_bits(codec, dmic_clk_reg, 0x08, 0x08);
  744. snd_soc_update_bits(codec, dmic_clk_reg, 0x70, 0x20);
  745. wcd937x_tx_connect_port(codec, DMIC0 + (w->shift), true);
  746. break;
  747. case SND_SOC_DAPM_POST_PMD:
  748. wcd937x_tx_connect_port(codec, DMIC0 + (w->shift), false);
  749. break;
  750. };
  751. return 0;
  752. }
  753. /*
  754. * wcd937x_get_micb_vout_ctl_val: converts micbias from volts to register value
  755. * @micb_mv: micbias in mv
  756. *
  757. * return register value converted
  758. */
  759. int wcd937x_get_micb_vout_ctl_val(u32 micb_mv)
  760. {
  761. /* min micbias voltage is 1V and maximum is 2.85V */
  762. if (micb_mv < 1000 || micb_mv > 2850) {
  763. pr_err("%s: unsupported micbias voltage\n", __func__);
  764. return -EINVAL;
  765. }
  766. return (micb_mv - 1000) / 50;
  767. }
  768. EXPORT_SYMBOL(wcd937x_get_micb_vout_ctl_val);
  769. /*
  770. * wcd937x_mbhc_micb_adjust_voltage: adjust specific micbias voltage
  771. * @codec: handle to snd_soc_codec *
  772. * @req_volt: micbias voltage to be set
  773. * @micb_num: micbias to be set, e.g. micbias1 or micbias2
  774. *
  775. * return 0 if adjustment is success or error code in case of failure
  776. */
  777. int wcd937x_mbhc_micb_adjust_voltage(struct snd_soc_codec *codec,
  778. int req_volt, int micb_num)
  779. {
  780. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  781. int cur_vout_ctl, req_vout_ctl;
  782. int micb_reg, micb_val, micb_en;
  783. int ret = 0;
  784. switch (micb_num) {
  785. case MIC_BIAS_1:
  786. micb_reg = WCD937X_ANA_MICB1;
  787. break;
  788. case MIC_BIAS_2:
  789. micb_reg = WCD937X_ANA_MICB2;
  790. break;
  791. case MIC_BIAS_3:
  792. micb_reg = WCD937X_ANA_MICB3;
  793. break;
  794. default:
  795. return -EINVAL;
  796. }
  797. mutex_lock(&wcd937x->micb_lock);
  798. /*
  799. * If requested micbias voltage is same as current micbias
  800. * voltage, then just return. Otherwise, adjust voltage as
  801. * per requested value. If micbias is already enabled, then
  802. * to avoid slow micbias ramp-up or down enable pull-up
  803. * momentarily, change the micbias value and then re-enable
  804. * micbias.
  805. */
  806. micb_val = snd_soc_read(codec, micb_reg);
  807. micb_en = (micb_val & 0xC0) >> 6;
  808. cur_vout_ctl = micb_val & 0x3F;
  809. req_vout_ctl = wcd937x_get_micb_vout_ctl_val(req_volt);
  810. if (req_vout_ctl < 0) {
  811. ret = -EINVAL;
  812. goto exit;
  813. }
  814. if (cur_vout_ctl == req_vout_ctl) {
  815. ret = 0;
  816. goto exit;
  817. }
  818. dev_dbg(codec->dev, "%s: micb_num: %d, cur_mv: %d, req_mv: %d, micb_en: %d\n",
  819. __func__, micb_num, WCD_VOUT_CTL_TO_MICB(cur_vout_ctl),
  820. req_volt, micb_en);
  821. if (micb_en == 0x1)
  822. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  823. snd_soc_update_bits(codec, micb_reg, 0x3F, req_vout_ctl);
  824. if (micb_en == 0x1) {
  825. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x40);
  826. /*
  827. * Add 2ms delay as per HW requirement after enabling
  828. * micbias
  829. */
  830. usleep_range(2000, 2100);
  831. }
  832. exit:
  833. mutex_unlock(&wcd937x->micb_lock);
  834. return ret;
  835. }
  836. EXPORT_SYMBOL(wcd937x_mbhc_micb_adjust_voltage);
  837. static int wcd937x_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
  838. struct snd_kcontrol *kcontrol,
  839. int event)
  840. {
  841. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  842. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  843. int ret = 0;
  844. switch (event) {
  845. case SND_SOC_DAPM_PRE_PMU:
  846. ret = swr_slvdev_datapath_control(wcd937x->tx_swr_dev,
  847. wcd937x->tx_swr_dev->dev_num,
  848. true);
  849. break;
  850. case SND_SOC_DAPM_POST_PMD:
  851. ret = swr_slvdev_datapath_control(wcd937x->tx_swr_dev,
  852. wcd937x->tx_swr_dev->dev_num,
  853. false);
  854. break;
  855. };
  856. return ret;
  857. }
  858. static int wcd937x_codec_enable_adc(struct snd_soc_dapm_widget *w,
  859. struct snd_kcontrol *kcontrol,
  860. int event){
  861. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  862. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  863. w->name, event);
  864. switch (event) {
  865. case SND_SOC_DAPM_PRE_PMU:
  866. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  867. 0x80, 0x80);
  868. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  869. 0x08, 0x08);
  870. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  871. 0x10, 0x10);
  872. wcd937x_tx_connect_port(codec, ADC1 + (w->shift), true);
  873. break;
  874. case SND_SOC_DAPM_POST_PMD:
  875. wcd937x_tx_connect_port(codec, ADC1 + (w->shift), false);
  876. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  877. 0x08, 0x00);
  878. break;
  879. };
  880. return 0;
  881. }
  882. static int wcd937x_enable_req(struct snd_soc_dapm_widget *w,
  883. struct snd_kcontrol *kcontrol, int event)
  884. {
  885. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  886. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  887. w->name, event);
  888. switch (event) {
  889. case SND_SOC_DAPM_PRE_PMU:
  890. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_REQ_CTL,
  891. 0x02, 0x02);
  892. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_REQ_CTL, 0x01,
  893. 0x00);
  894. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x40, 0x40);
  895. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  896. 0x30, 0x30);
  897. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH1, 0x80, 0x80);
  898. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x40, 0x00);
  899. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x80, 0x80);
  900. break;
  901. case SND_SOC_DAPM_POST_PMD:
  902. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH1, 0x80, 0x00);
  903. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  904. 0x10, 0x00);
  905. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  906. 0x10, 0x00);
  907. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  908. 0x80, 0x00);
  909. break;
  910. };
  911. return 0;
  912. }
  913. int wcd937x_micbias_control(struct snd_soc_codec *codec,
  914. int micb_num, int req, bool is_dapm)
  915. {
  916. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  917. int micb_index = micb_num - 1;
  918. u16 micb_reg;
  919. int pre_off_event = 0, post_off_event = 0;
  920. int post_on_event = 0, post_dapm_off = 0;
  921. int post_dapm_on = 0;
  922. if ((micb_index < 0) || (micb_index > WCD937X_MAX_MICBIAS - 1)) {
  923. dev_err(codec->dev, "%s: Invalid micbias index, micb_ind:%d\n",
  924. __func__, micb_index);
  925. return -EINVAL;
  926. }
  927. switch (micb_num) {
  928. case MIC_BIAS_1:
  929. micb_reg = WCD937X_ANA_MICB1;
  930. break;
  931. case MIC_BIAS_2:
  932. micb_reg = WCD937X_ANA_MICB2;
  933. pre_off_event = WCD_EVENT_PRE_MICBIAS_2_OFF;
  934. post_off_event = WCD_EVENT_POST_MICBIAS_2_OFF;
  935. post_on_event = WCD_EVENT_POST_MICBIAS_2_ON;
  936. post_dapm_on = WCD_EVENT_POST_DAPM_MICBIAS_2_ON;
  937. post_dapm_off = WCD_EVENT_POST_DAPM_MICBIAS_2_OFF;
  938. break;
  939. case MIC_BIAS_3:
  940. micb_reg = WCD937X_ANA_MICB3;
  941. break;
  942. default:
  943. dev_err(codec->dev, "%s: Invalid micbias number: %d\n",
  944. __func__, micb_num);
  945. return -EINVAL;
  946. };
  947. mutex_lock(&wcd937x->micb_lock);
  948. switch (req) {
  949. case MICB_PULLUP_ENABLE:
  950. wcd937x->pullup_ref[micb_index]++;
  951. if ((wcd937x->pullup_ref[micb_index] == 1) &&
  952. (wcd937x->micb_ref[micb_index] == 0))
  953. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  954. break;
  955. case MICB_PULLUP_DISABLE:
  956. if (wcd937x->pullup_ref[micb_index] > 0)
  957. wcd937x->pullup_ref[micb_index]--;
  958. if ((wcd937x->pullup_ref[micb_index] == 0) &&
  959. (wcd937x->micb_ref[micb_index] == 0))
  960. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x00);
  961. break;
  962. case MICB_ENABLE:
  963. wcd937x->micb_ref[micb_index]++;
  964. if (wcd937x->micb_ref[micb_index] == 1) {
  965. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0xE0, 0xE0);
  966. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x10, 0x10);
  967. snd_soc_update_bits(codec, WCD937X_MICB1_TEST_CTL_2, 0x01, 0x01);
  968. snd_soc_update_bits(codec, WCD937X_MICB2_TEST_CTL_2, 0x01, 0x01);
  969. snd_soc_update_bits(codec, WCD937X_MICB3_TEST_CTL_2, 0x01, 0x01);
  970. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x40);
  971. if (post_on_event)
  972. blocking_notifier_call_chain(&wcd937x->notifier,
  973. post_on_event,
  974. &wcd937x->mbhc);
  975. }
  976. if (is_dapm && post_dapm_on)
  977. blocking_notifier_call_chain(&wcd937x->notifier,
  978. post_dapm_on,
  979. &wcd937x->mbhc);
  980. break;
  981. case MICB_DISABLE:
  982. if (wcd937x->micb_ref[micb_index] > 0)
  983. wcd937x->micb_ref[micb_index]--;
  984. if ((wcd937x->micb_ref[micb_index] == 0) &&
  985. (wcd937x->pullup_ref[micb_index] > 0))
  986. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  987. else if ((wcd937x->micb_ref[micb_index] == 0) &&
  988. (wcd937x->pullup_ref[micb_index] == 0)) {
  989. if (pre_off_event)
  990. blocking_notifier_call_chain(&wcd937x->notifier,
  991. pre_off_event,
  992. &wcd937x->mbhc);
  993. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x00);
  994. if (post_off_event)
  995. blocking_notifier_call_chain(&wcd937x->notifier,
  996. post_off_event,
  997. &wcd937x->mbhc);
  998. }
  999. if (is_dapm && post_dapm_off)
  1000. blocking_notifier_call_chain(&wcd937x->notifier,
  1001. post_dapm_off,
  1002. &wcd937x->mbhc);
  1003. break;
  1004. };
  1005. dev_dbg(codec->dev, "%s: micb_num:%d, micb_ref: %d, pullup_ref: %d\n",
  1006. __func__, micb_num, wcd937x->micb_ref[micb_index],
  1007. wcd937x->pullup_ref[micb_index]);
  1008. mutex_unlock(&wcd937x->micb_lock);
  1009. return 0;
  1010. }
  1011. EXPORT_SYMBOL(wcd937x_micbias_control);
  1012. static int __wcd937x_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1013. int event)
  1014. {
  1015. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  1016. int micb_num;
  1017. dev_dbg(codec->dev, "%s: wname: %s, event: %d\n",
  1018. __func__, w->name, event);
  1019. if (strnstr(w->name, "MIC BIAS1", sizeof("MIC BIAS1")))
  1020. micb_num = MIC_BIAS_1;
  1021. else if (strnstr(w->name, "MIC BIAS2", sizeof("MIC BIAS2")))
  1022. micb_num = MIC_BIAS_2;
  1023. else if (strnstr(w->name, "MIC BIAS3", sizeof("MIC BIAS3")))
  1024. micb_num = MIC_BIAS_3;
  1025. else
  1026. return -EINVAL;
  1027. switch (event) {
  1028. case SND_SOC_DAPM_PRE_PMU:
  1029. wcd937x_micbias_control(codec, micb_num, MICB_ENABLE, true);
  1030. break;
  1031. case SND_SOC_DAPM_POST_PMU:
  1032. usleep_range(1000, 1100);
  1033. break;
  1034. case SND_SOC_DAPM_POST_PMD:
  1035. wcd937x_micbias_control(codec, micb_num, MICB_DISABLE, true);
  1036. break;
  1037. };
  1038. return 0;
  1039. }
  1040. static int wcd937x_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1041. struct snd_kcontrol *kcontrol,
  1042. int event)
  1043. {
  1044. return __wcd937x_codec_enable_micbias(w, event);
  1045. }
  1046. static int wcd937x_rx_hph_mode_get(struct snd_kcontrol *kcontrol,
  1047. struct snd_ctl_elem_value *ucontrol)
  1048. {
  1049. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  1050. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1051. ucontrol->value.integer.value[0] = wcd937x->hph_mode;
  1052. return 0;
  1053. }
  1054. static int wcd937x_rx_hph_mode_put(struct snd_kcontrol *kcontrol,
  1055. struct snd_ctl_elem_value *ucontrol)
  1056. {
  1057. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  1058. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1059. u32 mode_val;
  1060. mode_val = ucontrol->value.enumerated.item[0];
  1061. dev_dbg(codec->dev, "%s: mode: %d\n", __func__, mode_val);
  1062. if (mode_val == 0) {
  1063. dev_warn(codec->dev, "%s:Invalid HPH Mode, default to class_AB\n",
  1064. __func__);
  1065. mode_val = 3; /* enum will be updated later */
  1066. }
  1067. wcd937x->hph_mode = mode_val;
  1068. return 0;
  1069. }
  1070. static const char * const rx_hph_mode_mux_text[] = {
  1071. "CLS_H_INVALID", "CLS_H_HIFI", "CLS_H_LP", "CLS_AB", "CLS_H_LOHIFI",
  1072. "CLS_H_ULP", "CLS_AB_HIFI",
  1073. };
  1074. static const struct soc_enum rx_hph_mode_mux_enum =
  1075. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(rx_hph_mode_mux_text),
  1076. rx_hph_mode_mux_text);
  1077. static const struct snd_kcontrol_new wcd937x_snd_controls[] = {
  1078. SOC_ENUM_EXT("RX HPH Mode", rx_hph_mode_mux_enum,
  1079. wcd937x_rx_hph_mode_get, wcd937x_rx_hph_mode_put),
  1080. SOC_SINGLE_TLV("HPHL Volume", WCD937X_HPH_L_EN, 0, 20, 1, line_gain),
  1081. SOC_SINGLE_TLV("HPHR Volume", WCD937X_HPH_R_EN, 0, 20, 1, line_gain),
  1082. SOC_SINGLE_TLV("ADC1 Volume", WCD937X_ANA_TX_CH1, 0, 20, 0, analog_gain),
  1083. SOC_SINGLE_TLV("ADC2 Volume", WCD937X_ANA_TX_CH2, 0, 20, 0, analog_gain),
  1084. SOC_SINGLE_TLV("ADC3 Volume", WCD937X_ANA_TX_CH3, 0, 20, 0, analog_gain),
  1085. };
  1086. static const struct snd_kcontrol_new adc1_switch[] = {
  1087. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1088. };
  1089. static const struct snd_kcontrol_new adc2_switch[] = {
  1090. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1091. };
  1092. static const struct snd_kcontrol_new adc3_switch[] = {
  1093. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1094. };
  1095. static const struct snd_kcontrol_new dmic1_switch[] = {
  1096. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1097. };
  1098. static const struct snd_kcontrol_new dmic2_switch[] = {
  1099. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1100. };
  1101. static const struct snd_kcontrol_new dmic3_switch[] = {
  1102. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1103. };
  1104. static const struct snd_kcontrol_new dmic4_switch[] = {
  1105. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1106. };
  1107. static const struct snd_kcontrol_new dmic5_switch[] = {
  1108. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1109. };
  1110. static const struct snd_kcontrol_new dmic6_switch[] = {
  1111. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1112. };
  1113. static const struct snd_kcontrol_new ear_rdac_switch[] = {
  1114. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1115. };
  1116. static const struct snd_kcontrol_new aux_rdac_switch[] = {
  1117. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1118. };
  1119. static const struct snd_kcontrol_new hphl_rdac_switch[] = {
  1120. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1121. };
  1122. static const struct snd_kcontrol_new hphr_rdac_switch[] = {
  1123. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1124. };
  1125. static const char * const adc2_mux_text[] = {
  1126. "INP2", "INP3"
  1127. };
  1128. static const char * const rdac3_mux_text[] = {
  1129. "RX1", "RX3"
  1130. };
  1131. static const struct soc_enum adc2_enum =
  1132. SOC_ENUM_SINGLE(WCD937X_TX_NEW_TX_CH2_SEL, 7,
  1133. ARRAY_SIZE(adc2_mux_text), adc2_mux_text);
  1134. static const struct soc_enum rdac3_enum =
  1135. SOC_ENUM_SINGLE(WCD937X_DIGITAL_CDC_EAR_PATH_CTL, 0,
  1136. ARRAY_SIZE(rdac3_mux_text), rdac3_mux_text);
  1137. static const struct snd_kcontrol_new tx_adc2_mux =
  1138. SOC_DAPM_ENUM("ADC2 MUX Mux", adc2_enum);
  1139. static const struct snd_kcontrol_new rx_rdac3_mux =
  1140. SOC_DAPM_ENUM("RDAC3_MUX Mux", rdac3_enum);
  1141. static const struct snd_soc_dapm_widget wcd937x_dapm_widgets[] = {
  1142. /*input widgets*/
  1143. SND_SOC_DAPM_INPUT("AMIC1"),
  1144. SND_SOC_DAPM_INPUT("AMIC2"),
  1145. SND_SOC_DAPM_INPUT("AMIC3"),
  1146. SND_SOC_DAPM_INPUT("IN1_HPHL"),
  1147. SND_SOC_DAPM_INPUT("IN2_HPHR"),
  1148. SND_SOC_DAPM_INPUT("IN3_AUX"),
  1149. /*tx widgets*/
  1150. SND_SOC_DAPM_ADC_E("ADC1", NULL, SND_SOC_NOPM, 0, 0,
  1151. wcd937x_codec_enable_adc,
  1152. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1153. SND_SOC_DAPM_ADC_E("ADC2", NULL, SND_SOC_NOPM, 1, 0,
  1154. wcd937x_codec_enable_adc,
  1155. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1156. SND_SOC_DAPM_MIXER_E("ADC1 REQ", SND_SOC_NOPM, 0, 0,
  1157. NULL, 0, wcd937x_enable_req,
  1158. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1159. SND_SOC_DAPM_MIXER_E("ADC2 REQ", SND_SOC_NOPM, 0, 0,
  1160. NULL, 0, wcd937x_enable_req,
  1161. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1162. SND_SOC_DAPM_MUX("ADC2 MUX", SND_SOC_NOPM, 0, 0,
  1163. &tx_adc2_mux),
  1164. /*tx mixers*/
  1165. SND_SOC_DAPM_MIXER_E("ADC1_MIXER", SND_SOC_NOPM, 0, 0,
  1166. adc1_switch, ARRAY_SIZE(adc1_switch),
  1167. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1168. SND_SOC_DAPM_POST_PMD),
  1169. SND_SOC_DAPM_MIXER_E("ADC2_MIXER", SND_SOC_NOPM, 0, 0,
  1170. adc2_switch, ARRAY_SIZE(adc2_switch),
  1171. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1172. SND_SOC_DAPM_POST_PMD),
  1173. /* micbias widgets*/
  1174. SND_SOC_DAPM_MICBIAS_E("MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1175. wcd937x_codec_enable_micbias,
  1176. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1177. SND_SOC_DAPM_POST_PMD),
  1178. SND_SOC_DAPM_MICBIAS_E("MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1179. wcd937x_codec_enable_micbias,
  1180. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1181. SND_SOC_DAPM_POST_PMD),
  1182. SND_SOC_DAPM_MICBIAS_E("MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1183. wcd937x_codec_enable_micbias,
  1184. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1185. SND_SOC_DAPM_POST_PMD),
  1186. /*rx widgets*/
  1187. SND_SOC_DAPM_PGA_E("EAR PGA", WCD937X_ANA_EAR, 7, 0, NULL, 0,
  1188. wcd937x_codec_enable_ear_pa,
  1189. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1190. SND_SOC_DAPM_POST_PMD),
  1191. SND_SOC_DAPM_PGA_E("AUX PGA", WCD937X_AUX_AUXPA, 7, 0, NULL, 0,
  1192. wcd937x_codec_enable_aux_pa,
  1193. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1194. SND_SOC_DAPM_POST_PMD),
  1195. SND_SOC_DAPM_PGA_E("HPHL PGA", WCD937X_ANA_HPH, 7, 0, NULL, 0,
  1196. wcd937x_codec_enable_hphl_pa,
  1197. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1198. SND_SOC_DAPM_POST_PMD),
  1199. SND_SOC_DAPM_PGA_E("HPHR PGA", WCD937X_ANA_HPH, 6, 0, NULL, 0,
  1200. wcd937x_codec_enable_hphr_pa,
  1201. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1202. SND_SOC_DAPM_POST_PMD),
  1203. SND_SOC_DAPM_DAC_E("RDAC1", NULL, SND_SOC_NOPM, 0, 0,
  1204. wcd937x_codec_hphl_dac_event,
  1205. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1206. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1207. SND_SOC_DAPM_DAC_E("RDAC2", NULL, SND_SOC_NOPM, 0, 0,
  1208. wcd937x_codec_hphr_dac_event,
  1209. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1210. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1211. SND_SOC_DAPM_DAC_E("RDAC3", NULL, SND_SOC_NOPM, 0, 0,
  1212. wcd937x_codec_ear_dac_event,
  1213. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1214. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1215. SND_SOC_DAPM_DAC_E("RDAC4", NULL, SND_SOC_NOPM, 0, 0,
  1216. wcd937x_codec_aux_dac_event,
  1217. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1218. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1219. SND_SOC_DAPM_MUX("RDAC3_MUX", SND_SOC_NOPM, 0, 0, &rx_rdac3_mux),
  1220. SND_SOC_DAPM_MIXER_E("RX1", SND_SOC_NOPM, 0, 0, NULL, 0,
  1221. wcd937x_enable_rx1, SND_SOC_DAPM_PRE_PMU |
  1222. SND_SOC_DAPM_POST_PMD),
  1223. SND_SOC_DAPM_MIXER_E("RX2", SND_SOC_NOPM, 0, 0, NULL, 0,
  1224. wcd937x_enable_rx2, SND_SOC_DAPM_PRE_PMU |
  1225. SND_SOC_DAPM_POST_PMD),
  1226. SND_SOC_DAPM_MIXER_E("RX3", SND_SOC_NOPM, 0, 0, NULL, 0,
  1227. wcd937x_enable_rx3, SND_SOC_DAPM_PRE_PMU |
  1228. SND_SOC_DAPM_POST_PMD),
  1229. /* rx mixer widgets*/
  1230. SND_SOC_DAPM_MIXER("EAR_RDAC", SND_SOC_NOPM, 0, 0,
  1231. ear_rdac_switch, ARRAY_SIZE(ear_rdac_switch)),
  1232. SND_SOC_DAPM_MIXER("AUX_RDAC", SND_SOC_NOPM, 0, 0,
  1233. aux_rdac_switch, ARRAY_SIZE(aux_rdac_switch)),
  1234. SND_SOC_DAPM_MIXER("HPHL_RDAC", SND_SOC_NOPM, 0, 0,
  1235. hphl_rdac_switch, ARRAY_SIZE(hphl_rdac_switch)),
  1236. SND_SOC_DAPM_MIXER("HPHR_RDAC", SND_SOC_NOPM, 0, 0,
  1237. hphr_rdac_switch, ARRAY_SIZE(hphr_rdac_switch)),
  1238. /*output widgets tx*/
  1239. SND_SOC_DAPM_OUTPUT("ADC1_OUTPUT"),
  1240. SND_SOC_DAPM_OUTPUT("ADC2_OUTPUT"),
  1241. /*output widgets rx*/
  1242. SND_SOC_DAPM_OUTPUT("EAR"),
  1243. SND_SOC_DAPM_OUTPUT("AUX"),
  1244. SND_SOC_DAPM_OUTPUT("HPHL"),
  1245. SND_SOC_DAPM_OUTPUT("HPHR"),
  1246. };
  1247. static const struct snd_soc_dapm_widget wcd9375_dapm_widgets[] = {
  1248. /*input widgets*/
  1249. SND_SOC_DAPM_INPUT("AMIC4"),
  1250. /*tx widgets*/
  1251. SND_SOC_DAPM_ADC_E("ADC3", NULL, SND_SOC_NOPM, 2, 0,
  1252. wcd937x_codec_enable_adc,
  1253. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1254. SND_SOC_DAPM_MIXER_E("ADC3 REQ", SND_SOC_NOPM, 0, 0,
  1255. NULL, 0, wcd937x_enable_req,
  1256. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1257. SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
  1258. wcd937x_codec_enable_dmic,
  1259. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1260. SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 1, 0,
  1261. wcd937x_codec_enable_dmic,
  1262. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1263. SND_SOC_DAPM_ADC_E("DMIC3", NULL, SND_SOC_NOPM, 2, 0,
  1264. wcd937x_codec_enable_dmic,
  1265. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1266. SND_SOC_DAPM_ADC_E("DMIC4", NULL, SND_SOC_NOPM, 3, 0,
  1267. wcd937x_codec_enable_dmic,
  1268. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1269. SND_SOC_DAPM_ADC_E("DMIC5", NULL, SND_SOC_NOPM, 4, 0,
  1270. wcd937x_codec_enable_dmic,
  1271. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1272. SND_SOC_DAPM_ADC_E("DMIC6", NULL, SND_SOC_NOPM, 5, 0,
  1273. wcd937x_codec_enable_dmic,
  1274. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1275. /*tx mixer widgets*/
  1276. SND_SOC_DAPM_MIXER_E("DMIC1_MIXER", SND_SOC_NOPM, 0,
  1277. 0, dmic1_switch, ARRAY_SIZE(dmic1_switch),
  1278. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1279. SND_SOC_DAPM_POST_PMD),
  1280. SND_SOC_DAPM_MIXER_E("DMIC2_MIXER", SND_SOC_NOPM, 0,
  1281. 0, dmic2_switch, ARRAY_SIZE(dmic2_switch),
  1282. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1283. SND_SOC_DAPM_POST_PMD),
  1284. SND_SOC_DAPM_MIXER_E("DMIC3_MIXER", SND_SOC_NOPM, 0,
  1285. 0, dmic3_switch, ARRAY_SIZE(dmic3_switch),
  1286. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1287. SND_SOC_DAPM_POST_PMD),
  1288. SND_SOC_DAPM_MIXER_E("DMIC4_MIXER", SND_SOC_NOPM, 0,
  1289. 0, dmic4_switch, ARRAY_SIZE(dmic4_switch),
  1290. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1291. SND_SOC_DAPM_POST_PMD),
  1292. SND_SOC_DAPM_MIXER_E("DMIC5_MIXER", SND_SOC_NOPM, 0,
  1293. 0, dmic5_switch, ARRAY_SIZE(dmic5_switch),
  1294. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1295. SND_SOC_DAPM_POST_PMD),
  1296. SND_SOC_DAPM_MIXER_E("DMIC6_MIXER", SND_SOC_NOPM, 0,
  1297. 0, dmic6_switch, ARRAY_SIZE(dmic6_switch),
  1298. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1299. SND_SOC_DAPM_POST_PMD),
  1300. SND_SOC_DAPM_MIXER_E("ADC3_MIXER", SND_SOC_NOPM, 0, 0, adc3_switch,
  1301. ARRAY_SIZE(adc3_switch), wcd937x_tx_swr_ctrl,
  1302. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1303. /*output widgets*/
  1304. SND_SOC_DAPM_OUTPUT("DMIC1_OUTPUT"),
  1305. SND_SOC_DAPM_OUTPUT("DMIC2_OUTPUT"),
  1306. SND_SOC_DAPM_OUTPUT("DMIC3_OUTPUT"),
  1307. SND_SOC_DAPM_OUTPUT("DMIC4_OUTPUT"),
  1308. SND_SOC_DAPM_OUTPUT("DMIC5_OUTPUT"),
  1309. SND_SOC_DAPM_OUTPUT("DMIC6_OUTPUT"),
  1310. SND_SOC_DAPM_OUTPUT("ADC3_OUTPUT"),
  1311. };
  1312. static const struct snd_soc_dapm_route wcd937x_audio_map[] = {
  1313. {"ADC1_OUTPUT", NULL, "ADC1_MIXER"},
  1314. {"ADC1_MIXER", "Switch", "ADC1 REQ"},
  1315. {"ADC1 REQ", NULL, "ADC1"},
  1316. {"ADC1", NULL, "AMIC1"},
  1317. {"ADC2_OUTPUT", NULL, "ADC2_MIXER"},
  1318. {"ADC2_MIXER", "Switch", "ADC2 REQ"},
  1319. {"ADC2 REQ", NULL, "ADC2"},
  1320. {"ADC2", NULL, "ADC2 MUX"},
  1321. {"ADC2 MUX", "INP3", "AMIC3"},
  1322. {"ADC2 MUX", "INP2", "AMIC2"},
  1323. {"RX1", NULL, "IN1_HPHL"},
  1324. {"RDAC1", NULL, "RX1"},
  1325. {"HPHL_RDAC", "Switch", "RDAC1"},
  1326. {"HPHL PGA", NULL, "HPHL_RDAC"},
  1327. {"HPHL", NULL, "HPHL PGA"},
  1328. {"RX2", NULL, "IN2_HPHR"},
  1329. {"RDAC2", NULL, "RX2"},
  1330. {"HPHR_RDAC", "Switch", "RDAC2"},
  1331. {"HPHR PGA", NULL, "HPHR_RDAC"},
  1332. {"HPHR", NULL, "HPHR PGA"},
  1333. {"RX3", NULL, "IN3_AUX"},
  1334. {"RDAC4", NULL, "RX3"},
  1335. {"AUX_RDAC", "Switch", "RDAC4"},
  1336. {"AUX PGA", NULL, "AUX_RDAC"},
  1337. {"AUX", NULL, "AUX PGA"},
  1338. {"RDAC3_MUX", "RX3", "RX3"},
  1339. {"RDAC3_MUX", "RX1", "RX1"},
  1340. {"RDAC3", NULL, "RDAC3_MUX"},
  1341. {"EAR_RDAC", "Switch", "RDAC3"},
  1342. {"EAR PGA", NULL, "EAR_RDAC"},
  1343. {"EAR", NULL, "EAR PGA"},
  1344. };
  1345. static const struct snd_soc_dapm_route wcd9375_audio_map[] = {
  1346. {"ADC3_OUTPUT", NULL, "ADC3_MIXER"},
  1347. {"ADC3_MIXER", "Switch", "ADC3 REQ"},
  1348. {"ADC3 REQ", NULL, "ADC3"},
  1349. {"ADC3", NULL, "AMIC4"},
  1350. {"DMIC1_OUTPUT", NULL, "DMIC1_MIXER"},
  1351. {"DMIC1_MIXER", "Switch", "DMIC1"},
  1352. {"DMIC2_OUTPUT", NULL, "DMIC2_MIXER"},
  1353. {"DMIC2_MIXER", "Switch", "DMIC2"},
  1354. {"DMIC3_OUTPUT", NULL, "DMIC3_MIXER"},
  1355. {"DMIC3_MIXER", "Switch", "DMIC3"},
  1356. {"DMIC4_OUTPUT", NULL, "DMIC4_MIXER"},
  1357. {"DMIC4_MIXER", "Switch", "DMIC4"},
  1358. {"DMIC5_OUTPUT", NULL, "DMIC5_MIXER"},
  1359. {"DMIC5_MIXER", "Switch", "DMIC5"},
  1360. {"DMIC6_OUTPUT", NULL, "DMIC6_MIXER"},
  1361. {"DMIC6_MIXER", "Switch", "DMIC6"},
  1362. };
  1363. static ssize_t wcd937x_version_read(struct snd_info_entry *entry,
  1364. void *file_private_data,
  1365. struct file *file,
  1366. char __user *buf, size_t count,
  1367. loff_t pos)
  1368. {
  1369. struct wcd937x_priv *priv;
  1370. char buffer[WCD937X_VERSION_ENTRY_SIZE];
  1371. int len = 0;
  1372. priv = (struct wcd937x_priv *) entry->private_data;
  1373. if (!priv) {
  1374. pr_err("%s: wcd937x priv is null\n", __func__);
  1375. return -EINVAL;
  1376. }
  1377. switch (priv->version) {
  1378. case WCD937X_VERSION_1_0:
  1379. len = snprintf(buffer, sizeof(buffer), "WCD937X_1_0\n");
  1380. break;
  1381. default:
  1382. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  1383. }
  1384. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  1385. }
  1386. static struct snd_info_entry_ops wcd937x_info_ops = {
  1387. .read = wcd937x_version_read,
  1388. };
  1389. /*
  1390. * wcd937x_info_create_codec_entry - creates wcd937x module
  1391. * @codec_root: The parent directory
  1392. * @codec: Codec instance
  1393. *
  1394. * Creates wcd937x module and version entry under the given
  1395. * parent directory.
  1396. *
  1397. * Return: 0 on success or negative error code on failure.
  1398. */
  1399. int wcd937x_info_create_codec_entry(struct snd_info_entry *codec_root,
  1400. struct snd_soc_codec *codec)
  1401. {
  1402. struct snd_info_entry *version_entry;
  1403. struct wcd937x_priv *priv;
  1404. struct snd_soc_card *card;
  1405. if (!codec_root || !codec)
  1406. return -EINVAL;
  1407. priv = snd_soc_codec_get_drvdata(codec);
  1408. if (priv->entry) {
  1409. dev_dbg(priv->dev,
  1410. "%s:wcd937x module already created\n", __func__);
  1411. return 0;
  1412. }
  1413. card = codec->component.card;
  1414. priv->entry = snd_info_create_subdir(codec_root->module,
  1415. "wcd937x", codec_root);
  1416. if (!priv->entry) {
  1417. dev_dbg(codec->dev, "%s: failed to create wcd937x entry\n",
  1418. __func__);
  1419. return -ENOMEM;
  1420. }
  1421. version_entry = snd_info_create_card_entry(card->snd_card,
  1422. "version",
  1423. priv->entry);
  1424. if (!version_entry) {
  1425. dev_dbg(codec->dev, "%s: failed to create wcd937x version entry\n",
  1426. __func__);
  1427. return -ENOMEM;
  1428. }
  1429. version_entry->private_data = priv;
  1430. version_entry->size = WCD937X_VERSION_ENTRY_SIZE;
  1431. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  1432. version_entry->c.ops = &wcd937x_info_ops;
  1433. if (snd_info_register(version_entry) < 0) {
  1434. snd_info_free_entry(version_entry);
  1435. return -ENOMEM;
  1436. }
  1437. priv->version_entry = version_entry;
  1438. return 0;
  1439. }
  1440. EXPORT_SYMBOL(wcd937x_info_create_codec_entry);
  1441. static int wcd937x_soc_codec_probe(struct snd_soc_codec *codec)
  1442. {
  1443. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1444. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  1445. int variant;
  1446. int ret = -EINVAL;
  1447. dev_info(codec->dev, "%s()\n", __func__);
  1448. wcd937x = snd_soc_codec_get_drvdata(codec);
  1449. if (!wcd937x)
  1450. return -EINVAL;
  1451. wcd937x->codec = codec;
  1452. variant = (snd_soc_read(codec, WCD937X_DIGITAL_EFUSE_REG_0) & 0x0E) >> 1;
  1453. wcd937x->variant = variant;
  1454. wcd937x->fw_data = devm_kzalloc(codec->dev,
  1455. sizeof(*(wcd937x->fw_data)),
  1456. GFP_KERNEL);
  1457. if (!wcd937x->fw_data) {
  1458. dev_err(codec->dev, "Failed to allocate fw_data\n");
  1459. ret = -ENOMEM;
  1460. goto err;
  1461. }
  1462. set_bit(WCD9XXX_MBHC_CAL, wcd937x->fw_data->cal_bit);
  1463. ret = wcd_cal_create_hwdep(wcd937x->fw_data,
  1464. WCD9XXX_CODEC_HWDEP_NODE, codec);
  1465. if (ret < 0) {
  1466. dev_err(codec->dev, "%s hwdep failed %d\n", __func__, ret);
  1467. goto err_hwdep;
  1468. }
  1469. ret = wcd937x_mbhc_init(&wcd937x->mbhc, codec, wcd937x->fw_data);
  1470. if (ret) {
  1471. pr_err("%s: mbhc initialization failed\n", __func__);
  1472. goto err_hwdep;
  1473. }
  1474. wcd937x_init_reg(codec);
  1475. if (wcd937x->variant == WCD9375_VARIANT) {
  1476. ret = snd_soc_dapm_new_controls(dapm, wcd9375_dapm_widgets,
  1477. ARRAY_SIZE(wcd9375_dapm_widgets));
  1478. if (ret < 0) {
  1479. dev_err(codec->dev, "%s: Failed to add snd_ctls\n",
  1480. __func__);
  1481. goto err_hwdep;
  1482. }
  1483. ret = snd_soc_dapm_add_routes(dapm, wcd9375_audio_map,
  1484. ARRAY_SIZE(wcd9375_audio_map));
  1485. if (ret < 0) {
  1486. dev_err(codec->dev, "%s: Failed to add routes\n",
  1487. __func__);
  1488. goto err_hwdep;
  1489. }
  1490. ret = snd_soc_dapm_new_widgets(dapm->card);
  1491. if (ret < 0) {
  1492. dev_err(codec->dev, "%s: Failed to add widgets\n",
  1493. __func__);
  1494. goto err_hwdep;
  1495. }
  1496. }
  1497. wcd937x->version = WCD937X_VERSION_1_0;
  1498. return ret;
  1499. err_hwdep:
  1500. wcd937x->fw_data = NULL;
  1501. err:
  1502. return ret;
  1503. }
  1504. static int wcd937x_soc_codec_remove(struct snd_soc_codec *codec)
  1505. {
  1506. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1507. if (!wcd937x)
  1508. return -EINVAL;
  1509. return 0;
  1510. }
  1511. static struct regmap *wcd937x_get_regmap(struct device *dev)
  1512. {
  1513. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  1514. return wcd937x->regmap;
  1515. }
  1516. static struct snd_soc_codec_driver soc_codec_dev_wcd937x = {
  1517. .probe = wcd937x_soc_codec_probe,
  1518. .remove = wcd937x_soc_codec_remove,
  1519. .get_regmap = wcd937x_get_regmap,
  1520. .component_driver = {
  1521. .controls = wcd937x_snd_controls,
  1522. .num_controls = ARRAY_SIZE(wcd937x_snd_controls),
  1523. .dapm_widgets = wcd937x_dapm_widgets,
  1524. .num_dapm_widgets = ARRAY_SIZE(wcd937x_dapm_widgets),
  1525. .dapm_routes = wcd937x_audio_map,
  1526. .num_dapm_routes = ARRAY_SIZE(wcd937x_audio_map),
  1527. },
  1528. };
  1529. int wcd937x_reset(struct device *dev)
  1530. {
  1531. struct wcd937x_priv *wcd937x = NULL;
  1532. int rc = 0;
  1533. int value = 0;
  1534. if (!dev)
  1535. return -ENODEV;
  1536. wcd937x = dev_get_drvdata(dev);
  1537. if (!wcd937x)
  1538. return -EINVAL;
  1539. if (!wcd937x->rst_np) {
  1540. dev_err(dev, "%s: reset gpio device node not specified\n",
  1541. __func__);
  1542. return -EINVAL;
  1543. }
  1544. value = msm_cdc_pinctrl_get_state(wcd937x->rst_np);
  1545. if (value > 0)
  1546. return 0;
  1547. rc = msm_cdc_pinctrl_select_sleep_state(wcd937x->rst_np);
  1548. if (rc) {
  1549. dev_err(dev, "%s: wcd sleep state request fail!\n",
  1550. __func__);
  1551. return rc;
  1552. }
  1553. /* 20ms sleep required after pulling the reset gpio to LOW */
  1554. usleep_range(20, 30);
  1555. rc = msm_cdc_pinctrl_select_active_state(wcd937x->rst_np);
  1556. if (rc) {
  1557. dev_err(dev, "%s: wcd active state request fail!\n",
  1558. __func__);
  1559. return rc;
  1560. }
  1561. /* 20ms sleep required after pulling the reset gpio to HIGH */
  1562. usleep_range(20, 30);
  1563. return rc;
  1564. }
  1565. static int wcd937x_read_of_property_u32(struct device *dev, const char *name,
  1566. u32 *val)
  1567. {
  1568. int rc = 0;
  1569. rc = of_property_read_u32(dev->of_node, name, val);
  1570. if (rc)
  1571. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  1572. __func__, name, dev->of_node->full_name);
  1573. return rc;
  1574. }
  1575. static void wcd937x_dt_parse_micbias_info(struct device *dev,
  1576. struct wcd937x_micbias_setting *mb)
  1577. {
  1578. u32 prop_val = 0;
  1579. int rc = 0;
  1580. /* MB1 */
  1581. if (of_find_property(dev->of_node, "qcom,cdc-micbias1-mv",
  1582. NULL)) {
  1583. rc = wcd937x_read_of_property_u32(dev,
  1584. "qcom,cdc-micbias1-mv",
  1585. &prop_val);
  1586. if (!rc)
  1587. mb->micb1_mv = prop_val;
  1588. } else {
  1589. dev_info(dev, "%s: Micbias1 DT property not found\n",
  1590. __func__);
  1591. }
  1592. /* MB2 */
  1593. if (of_find_property(dev->of_node, "qcom,cdc-micbias2-mv",
  1594. NULL)) {
  1595. rc = wcd937x_read_of_property_u32(dev,
  1596. "qcom,cdc-micbias2-mv",
  1597. &prop_val);
  1598. if (!rc)
  1599. mb->micb2_mv = prop_val;
  1600. } else {
  1601. dev_info(dev, "%s: Micbias2 DT property not found\n",
  1602. __func__);
  1603. }
  1604. /* MB3 */
  1605. if (of_find_property(dev->of_node, "qcom,cdc-micbias3-mv",
  1606. NULL)) {
  1607. rc = wcd937x_read_of_property_u32(dev,
  1608. "qcom,cdc-micbias3-mv",
  1609. &prop_val);
  1610. if (!rc)
  1611. mb->micb3_mv = prop_val;
  1612. } else {
  1613. dev_info(dev, "%s: Micbias3 DT property not found\n",
  1614. __func__);
  1615. }
  1616. }
  1617. struct wcd937x_pdata *wcd937x_populate_dt_data(struct device *dev)
  1618. {
  1619. struct wcd937x_pdata *pdata = NULL;
  1620. pdata = devm_kzalloc(dev, sizeof(struct wcd937x_pdata),
  1621. GFP_KERNEL);
  1622. if (!pdata)
  1623. return NULL;
  1624. pdata->rst_np = of_parse_phandle(dev->of_node,
  1625. "qcom,wcd-rst-gpio-node", 0);
  1626. if (!pdata->rst_np) {
  1627. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  1628. __func__, "qcom,wcd-rst-gpio-node",
  1629. dev->of_node->full_name);
  1630. return NULL;
  1631. }
  1632. /* Parse power supplies */
  1633. msm_cdc_get_power_supplies(dev, &pdata->regulator,
  1634. &pdata->num_supplies);
  1635. if (!pdata->regulator || (pdata->num_supplies <= 0)) {
  1636. dev_err(dev, "%s: no power supplies defined for codec\n",
  1637. __func__);
  1638. return NULL;
  1639. }
  1640. pdata->rx_slave = of_parse_phandle(dev->of_node, "qcom,rx-slave", 0);
  1641. pdata->tx_slave = of_parse_phandle(dev->of_node, "qcom,tx-slave", 0);
  1642. wcd937x_dt_parse_micbias_info(dev, &pdata->micbias);
  1643. return pdata;
  1644. }
  1645. static int wcd937x_bind(struct device *dev)
  1646. {
  1647. int ret = 0, i = 0;
  1648. struct wcd937x_priv *wcd937x = NULL;
  1649. struct wcd937x_pdata *pdata = NULL;
  1650. wcd937x = devm_kzalloc(dev, sizeof(struct wcd937x_priv), GFP_KERNEL);
  1651. if (!wcd937x)
  1652. return -ENOMEM;
  1653. dev_set_drvdata(dev, wcd937x);
  1654. pdata = wcd937x_populate_dt_data(dev);
  1655. if (!pdata) {
  1656. dev_err(dev, "%s: Fail to obtain platform data\n", __func__);
  1657. return -EINVAL;
  1658. }
  1659. wcd937x->dev = dev;
  1660. wcd937x->dev->platform_data = pdata;
  1661. wcd937x->rst_np = pdata->rst_np;
  1662. ret = msm_cdc_init_supplies(dev, &wcd937x->supplies,
  1663. pdata->regulator, pdata->num_supplies);
  1664. if (!wcd937x->supplies) {
  1665. dev_err(dev, "%s: Cannot init wcd supplies\n",
  1666. __func__);
  1667. return ret;
  1668. }
  1669. ret = msm_cdc_enable_static_supplies(dev, wcd937x->supplies,
  1670. pdata->regulator,
  1671. pdata->num_supplies);
  1672. if (ret) {
  1673. dev_err(dev, "%s: wcd static supply enable failed!\n",
  1674. __func__);
  1675. return ret;
  1676. }
  1677. wcd937x_reset(dev);
  1678. /*
  1679. * Add 5msec delay to provide sufficient time for
  1680. * soundwire auto enumeration of slave devices as
  1681. * as per HW requirement.
  1682. */
  1683. usleep_range(5000, 5010);
  1684. ret = component_bind_all(dev, wcd937x);
  1685. if (ret) {
  1686. dev_err(dev, "%s: Slave bind failed, ret = %d\n",
  1687. __func__, ret);
  1688. return ret;
  1689. }
  1690. ret = wcd937x_parse_port_mapping(dev, "qcom,rx_swr_ch_map", CODEC_RX);
  1691. ret |= wcd937x_parse_port_mapping(dev, "qcom,tx_swr_ch_map", CODEC_TX);
  1692. if (ret) {
  1693. dev_err(dev, "Failed to read port mapping\n");
  1694. goto err;
  1695. }
  1696. wcd937x->rx_swr_dev = get_matching_swr_slave_device(pdata->rx_slave);
  1697. if (!wcd937x->rx_swr_dev) {
  1698. dev_err(dev, "%s: Could not find RX swr slave device\n",
  1699. __func__);
  1700. ret = -ENODEV;
  1701. goto err;
  1702. }
  1703. wcd937x->tx_swr_dev = get_matching_swr_slave_device(pdata->tx_slave);
  1704. if (!wcd937x->tx_swr_dev) {
  1705. dev_err(dev, "%s: Could not find TX swr slave device\n",
  1706. __func__);
  1707. ret = -ENODEV;
  1708. goto err;
  1709. }
  1710. wcd937x->regmap = devm_regmap_init_swr(wcd937x->tx_swr_dev,
  1711. &wcd937x_regmap_config);
  1712. if (!wcd937x->regmap) {
  1713. dev_err(dev, "%s: Regmap init failed\n",
  1714. __func__);
  1715. goto err;
  1716. }
  1717. /* Set all interupts as edge triggered */
  1718. for (i = 0; i < wcd937x_regmap_irq_chip.num_regs; i++)
  1719. regmap_write(wcd937x->regmap,
  1720. (WCD937X_DIGITAL_INTR_LEVEL_0 + i), 0);
  1721. wcd937x_regmap_irq_chip.irq_drv_data = wcd937x;
  1722. wcd937x->irq_info.wcd_regmap_irq_chip = &wcd937x_regmap_irq_chip;
  1723. wcd937x->irq_info.codec_name = "WCD937X";
  1724. wcd937x->irq_info.regmap = wcd937x->regmap;
  1725. wcd937x->irq_info.dev = dev;
  1726. ret = wcd_irq_init(&wcd937x->irq_info, &wcd937x->virq);
  1727. if (ret) {
  1728. dev_err(dev, "%s: IRQ init failed: %d\n",
  1729. __func__, ret);
  1730. goto err;
  1731. }
  1732. wcd937x->tx_swr_dev->slave_irq = wcd937x->virq;
  1733. ret = snd_soc_register_codec(dev, &soc_codec_dev_wcd937x,
  1734. NULL, 0);
  1735. if (ret) {
  1736. dev_err(dev, "%s: Codec registration failed\n",
  1737. __func__);
  1738. goto err_irq;
  1739. }
  1740. return ret;
  1741. err_irq:
  1742. wcd_irq_exit(&wcd937x->irq_info, wcd937x->virq);
  1743. err:
  1744. component_unbind_all(dev, wcd937x);
  1745. return ret;
  1746. }
  1747. static void wcd937x_unbind(struct device *dev)
  1748. {
  1749. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  1750. wcd_irq_exit(&wcd937x->irq_info, wcd937x->virq);
  1751. snd_soc_unregister_codec(dev);
  1752. component_unbind_all(dev, wcd937x);
  1753. }
  1754. static const struct of_device_id wcd937x_dt_match[] = {
  1755. { .compatible = "qcom,wcd937x-codec" },
  1756. {}
  1757. };
  1758. static const struct component_master_ops wcd937x_comp_ops = {
  1759. .bind = wcd937x_bind,
  1760. .unbind = wcd937x_unbind,
  1761. };
  1762. static int wcd937x_compare_of(struct device *dev, void *data)
  1763. {
  1764. return dev->of_node == data;
  1765. }
  1766. static void wcd937x_release_of(struct device *dev, void *data)
  1767. {
  1768. of_node_put(data);
  1769. }
  1770. static int wcd937x_add_slave_components(struct device *dev,
  1771. struct component_match **matchptr)
  1772. {
  1773. struct device_node *np, *rx_node, *tx_node;
  1774. np = dev->of_node;
  1775. rx_node = of_parse_phandle(np, "qcom,rx-slave", 0);
  1776. if (!rx_node) {
  1777. dev_err(dev, "%s: Rx-slave node not defined\n", __func__);
  1778. return -ENODEV;
  1779. }
  1780. of_node_get(rx_node);
  1781. component_match_add_release(dev, matchptr,
  1782. wcd937x_release_of,
  1783. wcd937x_compare_of,
  1784. rx_node);
  1785. tx_node = of_parse_phandle(np, "qcom,tx-slave", 0);
  1786. if (!tx_node) {
  1787. dev_err(dev, "%s: Tx-slave node not defined\n", __func__);
  1788. return -ENODEV;
  1789. }
  1790. of_node_get(tx_node);
  1791. component_match_add_release(dev, matchptr,
  1792. wcd937x_release_of,
  1793. wcd937x_compare_of,
  1794. tx_node);
  1795. return 0;
  1796. }
  1797. static int wcd937x_probe(struct platform_device *pdev)
  1798. {
  1799. struct component_match *match = NULL;
  1800. int ret;
  1801. ret = wcd937x_add_slave_components(&pdev->dev, &match);
  1802. if (ret)
  1803. return ret;
  1804. return component_master_add_with_match(&pdev->dev,
  1805. &wcd937x_comp_ops, match);
  1806. }
  1807. static int wcd937x_remove(struct platform_device *pdev)
  1808. {
  1809. component_master_del(&pdev->dev, &wcd937x_comp_ops);
  1810. return 0;
  1811. }
  1812. static struct platform_driver wcd937x_codec_driver = {
  1813. .probe = wcd937x_probe,
  1814. .remove = wcd937x_remove,
  1815. .driver = {
  1816. .name = "wcd937x_codec",
  1817. .owner = THIS_MODULE,
  1818. .of_match_table = of_match_ptr(wcd937x_dt_match),
  1819. },
  1820. };
  1821. module_platform_driver(wcd937x_codec_driver);
  1822. MODULE_DESCRIPTION("WCD937X Codec driver");
  1823. MODULE_LICENSE("GPL v2");