wsa884x-reg-shifts.h 8.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2021, The Linux Foundation. All rights reserved.
  4. */
  5. #ifndef WSA884X_REG_SHIFTS_H
  6. #define WSA884X_REG_SHIFTS_H
  7. #include <linux/regmap.h>
  8. #include <linux/device.h>
  9. #include "wsa884x-registers.h"
  10. /*
  11. * Use in conjunction with wsa884x-reg-masks.c for field values.
  12. * field_value = (register_value & field_mask) >> field_shift
  13. */
  14. #define FIELD_SHIFT(register_name, field_name) \
  15. WSA884X_##register_name##_##field_name##_SHIFT
  16. /* WSA884X_VSENSE1 Fields: */
  17. #define WSA884X_VSENSE1_GAIN_VSENSE_FE_SHIFT 0x05
  18. #define WSA884X_VSENSE1_VSENSE_AMP_IQ_CTL_1_SHIFT 0x04
  19. #define WSA884X_VSENSE1_IDLE_MODE_CTL_SHIFT 0x02
  20. #define WSA884X_VSENSE1_VOCM_AMP_CTL_SHIFT 0x00
  21. /* WSA884X_ADC_2 Fields: */
  22. #define WSA884X_ADC_2_ATEST_SEL_CAL_REF_SHIFT 0x07
  23. #define WSA884X_ADC_2_ISNS_LOAD_STORED_SHIFT 0x06
  24. #define WSA884X_ADC_2_EN_DET_SHIFT 0x05
  25. #define WSA884X_ADC_2_EN_ATEST_REF_SHIFT 0x04
  26. #define WSA884X_ADC_2_EN_ATEST_INT_SHIFT 0x01
  27. #define WSA884X_ADC_2_D_ADC_REG_EN_SHIFT 0x00
  28. /* WSA884X_ADC_7 Fields: */
  29. #define WSA884X_ADC_7_CLAMPON_SHIFT 0x07
  30. #define WSA884X_ADC_7_CAL_LOOP_TRIM_SHIFT 0x04
  31. #define WSA884X_ADC_7_REG_TRIM_EN_SHIFT 0x03
  32. #define WSA884X_ADC_7_EN_AZ_REG_SHIFT 0x02
  33. #define WSA884X_ADC_7_EN_SAR_REG_SHIFT 0x01
  34. #define WSA884X_ADC_7_EN_SW_CURRENT_REG_SHIFT 0x00
  35. /* WSA884X_BOP_DEGLITCH_CTL Fields: */
  36. #define WSA884X_BOP_DEGLITCH_CTL_BOP_DEGLITCH_SETTING_SHIFT 0x01
  37. #define WSA884X_BOP_DEGLITCH_CTL_BOP_DEGLITCH_EN_SHIFT 0x00
  38. /* WSA884X_CDC_SPK_DSM_A2_0 Fields: */
  39. #define WSA884X_CDC_SPK_DSM_A2_0_COEF_A2_SHIFT 0x00
  40. /* WSA884X_CDC_SPK_DSM_A2_1 Fields: */
  41. #define WSA884X_CDC_SPK_DSM_A2_1_COEF_A2_SHIFT 0x00
  42. /* WSA884X_CDC_SPK_DSM_A3_0 Fields: */
  43. #define WSA884X_CDC_SPK_DSM_A3_0_COEF_A3_SHIFT 0x00
  44. /* WSA884X_CDC_SPK_DSM_A3_1 Fields: */
  45. #define WSA884X_CDC_SPK_DSM_A3_1_COEF_A3_SHIFT 0x00
  46. /* WSA884X_CDC_SPK_DSM_A4_0 Fields: */
  47. #define WSA884X_CDC_SPK_DSM_A4_0_COEF_A4_SHIFT 0x00
  48. /* WSA884X_CDC_SPK_DSM_A5_0 Fields: */
  49. #define WSA884X_CDC_SPK_DSM_A5_0_COEF_A5_SHIFT 0x00
  50. /* WSA884X_CDC_SPK_DSM_A6_0 Fields: */
  51. #define WSA884X_CDC_SPK_DSM_A6_0_COEF_A6_SHIFT 0x00
  52. /* WSA884X_CDC_SPK_DSM_A7_0 Fields: */
  53. #define WSA884X_CDC_SPK_DSM_A7_0_COEF_A7_SHIFT 0x00
  54. /* WSA884X_CDC_SPK_DSM_C_0 Fields: */
  55. #define WSA884X_CDC_SPK_DSM_C_0_COEF_C3_SHIFT 0x04
  56. #define WSA884X_CDC_SPK_DSM_C_0_COEF_C2_SHIFT 0x00
  57. /* WSA884X_CDC_SPK_DSM_C_2 Fields: */
  58. #define WSA884X_CDC_SPK_DSM_C_2_COEF_C7_SHIFT 0x04
  59. #define WSA884X_CDC_SPK_DSM_C_2_COEF_C6_SHIFT 0x00
  60. /* WSA884X_CDC_SPK_DSM_C_3 Fields: */
  61. #define WSA884X_CDC_SPK_DSM_C_3_COEF_C7_SHIFT 0x00
  62. /* WSA884X_CDC_SPK_DSM_R1 Fields: */
  63. #define WSA884X_CDC_SPK_DSM_R1_SAT_LIMIT_R1_SHIFT 0x00
  64. /* WSA884X_CDC_SPK_DSM_R2 Fields: */
  65. #define WSA884X_CDC_SPK_DSM_R2_SAT_LIMIT_R2_SHIFT 0x00
  66. /* WSA884X_CDC_SPK_DSM_R3 Fields: */
  67. #define WSA884X_CDC_SPK_DSM_R3_SAT_LIMIT_R3_SHIFT 0x00
  68. /* WSA884X_CDC_SPK_DSM_R4 Fields: */
  69. #define WSA884X_CDC_SPK_DSM_R4_SAT_LIMIT_R4_SHIFT 0x00
  70. /* WSA884X_CDC_SPK_DSM_R5 Fields: */
  71. #define WSA884X_CDC_SPK_DSM_R5_SAT_LIMIT_R5_SHIFT 0x00
  72. /* WSA884X_CDC_SPK_DSM_R6 Fields: */
  73. #define WSA884X_CDC_SPK_DSM_R6_SAT_LIMIT_R6_SHIFT 0x00
  74. /* WSA884X_CDC_SPK_DSM_R7 Fields: */
  75. #define WSA884X_CDC_SPK_DSM_R7_SAT_LIMIT_R7_SHIFT 0x00
  76. /* WSA884X_DRE_CTL_0 Fields: */
  77. #define WSA884X_DRE_CTL_0_PROG_DELAY_SHIFT 0x04
  78. #define WSA884X_DRE_CTL_0_OFFSET_SHIFT 0x00
  79. /* WSA884X_GAIN_RAMPING_MIN Fields: */
  80. #define WSA884X_GAIN_RAMPING_MIN_MIN_GAIN_SHIFT 0x00
  81. /* WSA884X_CLSH_SOFT_MAX Fields: */
  82. #define WSA884X_CLSH_SOFT_MAX_SOFT_MAX_SHIFT 0x00
  83. /* WSA884X_CLSH_VTH1 Fields: */
  84. #define WSA884X_CLSH_VTH1_CLSH_VTH1_SHIFT 0x00
  85. /* WSA884X_CLSH_VTH10 Fields: */
  86. #define WSA884X_CLSH_VTH10_CLSH_VTH10_SHIFT 0x00
  87. /* WSA884X_CLSH_VTH11 Fields: */
  88. #define WSA884X_CLSH_VTH11_CLSH_VTH11_SHIFT 0x00
  89. /* WSA884X_CLSH_VTH12 Fields: */
  90. #define WSA884X_CLSH_VTH12_CLSH_VTH12_SHIFT 0x00
  91. /* WSA884X_CLSH_VTH13 Fields: */
  92. #define WSA884X_CLSH_VTH13_CLSH_VTH13_SHIFT 0x00
  93. /* WSA884X_CLSH_VTH14 Fields: */
  94. #define WSA884X_CLSH_VTH14_CLSH_VTH14_SHIFT 0x00
  95. /* WSA884X_CLSH_VTH15 Fields: */
  96. #define WSA884X_CLSH_VTH15_CLSH_VTH15_SHIFT 0x00
  97. /* WSA884X_ANA_WO_CTL_0 Fields: */
  98. #define WSA884X_ANA_WO_CTL_0_VPHX_SYS_EN_SHIFT 0x06
  99. #define WSA884X_ANA_WO_CTL_0_PA_AUX_GAIN_SHIFT 0x02
  100. #define WSA884X_ANA_WO_CTL_0_PA_MIN_GAIN_BYP_SHIFT 0x01
  101. #define WSA884X_ANA_WO_CTL_0_DAC_CM_CLAMP_EN_SHIFT 0x00
  102. /* WSA884X_ANA_WO_CTL_1 Fields: */
  103. #define WSA884X_ANA_WO_CTL_1_BOOST_SHARE_EN_SHIFT 0x03
  104. #define WSA884X_ANA_WO_CTL_1_EXT_VDDSPK_EN_SHIFT 0x00
  105. /* WSA884X_DRE_CTL_1 Fields: */
  106. #define WSA884X_DRE_CTL_1_CSR_GAIN_SHIFT 0x01
  107. #define WSA884X_DRE_CTL_1_CSR_GAIN_EN_SHIFT 0x00
  108. /* WSA884X_VBAT_THRM_FLT_CTL Fields: */
  109. #define WSA884X_VBAT_THRM_FLT_CTL_THRM_COEF_SEL_SHIFT 0x05
  110. #define WSA884X_VBAT_THRM_FLT_CTL_THRM_FLT_EN_SHIFT 0x04
  111. #define WSA884X_VBAT_THRM_FLT_CTL_VBAT_COEF_SEL_SHIFT 0x01
  112. #define WSA884X_VBAT_THRM_FLT_CTL_VBAT_FLT_EN_SHIFT 0x00
  113. /* WSA884X_PDM_WD_CTL Fields: */
  114. #define WSA884X_PDM_WD_CTL_HOLD_OFF_SHIFT 0x02
  115. #define WSA884X_PDM_WD_CTL_TIME_OUT_SEL_SHIFT 0x01
  116. #define WSA884X_PDM_WD_CTL_PDM_WD_EN_SHIFT 0x00
  117. /* WSA884X_PA_FSM_BYP_CTL Fields: */
  118. #define WSA884X_PA_FSM_BYP_CTL_PA_FSM_BYP_SHIFT 0x00
  119. /* WSA884X_TADC_VALUE_CTL Fields: */
  120. #define WSA884X_TADC_VALUE_CTL_VBAT_VALUE_RD_EN_SHIFT 0x01
  121. #define WSA884X_TADC_VALUE_CTL_TEMP_VALUE_RD_EN_SHIFT 0x00
  122. /* WSA884X_PA_FSM_BYP0 Fields: */
  123. #define WSA884X_PA_FSM_BYP0_TSADC_EN_SHIFT 0x07
  124. #define WSA884X_PA_FSM_BYP0_SPKR_PROT_EN_SHIFT 0x06
  125. #define WSA884X_PA_FSM_BYP0_D_UNMUTE_SHIFT 0x05
  126. #define WSA884X_PA_FSM_BYP0_PA_EN_SHIFT 0x04
  127. #define WSA884X_PA_FSM_BYP0_BOOST_EN_SHIFT 0x03
  128. #define WSA884X_PA_FSM_BYP0_BG_EN_SHIFT 0x02
  129. #define WSA884X_PA_FSM_BYP0_CLK_WD_EN_SHIFT 0x01
  130. #define WSA884X_PA_FSM_BYP0_DC_CAL_EN_SHIFT 0x00
  131. /* WSA884X_PA_FSM_BYP1 Fields: */
  132. #define WSA884X_PA_FSM_BYP1_NG_MODE_SHIFT 0x06
  133. #define WSA884X_PA_FSM_BYP1_PWRSAV_CTL_SHIFT 0x05
  134. #define WSA884X_PA_FSM_BYP1_RAMP_DOWN_SHIFT 0x04
  135. #define WSA884X_PA_FSM_BYP1_RAMP_UP_SHIFT 0x03
  136. #define WSA884X_PA_FSM_BYP1_BLEEDER_EN_SHIFT 0x02
  137. #define WSA884X_PA_FSM_BYP1_PA_MAIN_EN_SHIFT 0x01
  138. #define WSA884X_PA_FSM_BYP1_PA_AUX_EN_SHIFT 0x00
  139. /* WSA884X_PA_FSM_EN Fields: */
  140. #define WSA884X_PA_FSM_EN_GLOBAL_PA_EN_SHIFT 0x00
  141. #endif /* WSA884X_REG_SHIFTS_H */