ep92.c 43 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/init.h>
  6. #include <linux/delay.h>
  7. #include <linux/module.h>
  8. #include <linux/kernel.h>
  9. #include <linux/i2c.h>
  10. #include <linux/slab.h>
  11. #include <linux/fs.h>
  12. #include <linux/debugfs.h>
  13. #include <linux/sysfs.h>
  14. #include <linux/kobject.h>
  15. #include <sound/core.h>
  16. #include <sound/pcm.h>
  17. #include <sound/pcm_params.h>
  18. #include <sound/tlv.h>
  19. #include <sound/soc.h>
  20. #include <linux/workqueue.h>
  21. #include "ep92.h"
  22. #define DRV_NAME "ep92_codec"
  23. #define EP92_POLL_INTERVAL_OFF_MSEC 200
  24. #define EP92_POLL_INTERVAL_ON_MSEC 20
  25. #define EP92_SYSFS_ENTRY_MAX_LEN 64
  26. #define EP92_HYST_CNT 5
  27. #define EP92_RATES (SNDRV_PCM_RATE_32000 |\
  28. SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
  29. SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 |\
  30. SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000)
  31. #define EP92_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE)
  32. static const unsigned int ep92_samp_freq_table[8] = {
  33. 32000, 44100, 48000, 88200, 96000, 176400, 192000, 768000
  34. };
  35. static bool ep92_volatile_register(struct device *dev, unsigned int reg)
  36. {
  37. /* do not cache register state in regmap */
  38. return true;
  39. }
  40. static bool ep92_writeable_registers(struct device *dev, unsigned int reg)
  41. {
  42. if (reg >= EP92_ISP_MODE_ENTER_ISP && reg <= EP92_GENERAL_CONTROL_4)
  43. return true;
  44. return false;
  45. }
  46. static bool ep92_readable_registers(struct device *dev, unsigned int reg)
  47. {
  48. if (reg >= EP92_BI_VENDOR_ID_0 && reg <= EP92_MAX_REGISTER_ADDR)
  49. return true;
  50. return false;
  51. }
  52. /* codec private data */
  53. struct ep92_pdata {
  54. struct regmap *regmap;
  55. struct snd_soc_component *component;
  56. struct timer_list timer;
  57. struct work_struct read_status_worker;
  58. int irq;
  59. int hyst_tx_plug;
  60. int hyst_link_on0;
  61. int hyst_link_on1;
  62. int hyst_link_on2;
  63. int filt_tx_plug;
  64. int filt_link_on0;
  65. int filt_link_on1;
  66. int filt_link_on2;
  67. struct {
  68. u8 tx_info;
  69. u8 video_latency;
  70. } gi; /* General Info block */
  71. struct {
  72. u8 ctl;
  73. u8 rx_sel;
  74. u8 ctl2;
  75. u8 cec_volume;
  76. u8 link;
  77. } gc; /* General Control block */
  78. struct {
  79. u8 system_status_0;
  80. u8 system_status_1;
  81. u8 audio_status;
  82. u8 cs[5];
  83. u8 cc;
  84. u8 ca;
  85. } ai; /* Audio Info block */
  86. u8 old_mode;
  87. #if IS_ENABLED(CONFIG_DEBUG_FS)
  88. struct dentry *debugfs_dir;
  89. struct dentry *debugfs_file_wo;
  90. struct dentry *debugfs_file_ro;
  91. #endif /* CONFIG_DEBUG_FS */
  92. };
  93. #if IS_ENABLED(CONFIG_DEBUG_FS)
  94. static int debugfs_codec_open_op(struct inode *inode, struct file *file)
  95. {
  96. file->private_data = inode->i_private;
  97. return 0;
  98. }
  99. static int debugfs_get_parameters(char *buf, u32 *param1, int num_of_par)
  100. {
  101. char *token;
  102. int base, cnt;
  103. token = strsep(&buf, " ");
  104. for (cnt = 0; cnt < num_of_par; cnt++) {
  105. if (token) {
  106. if ((token[1] == 'x') || (token[1] == 'X'))
  107. base = 16;
  108. else
  109. base = 10;
  110. if (kstrtou32(token, base, &param1[cnt]) != 0)
  111. return -EINVAL;
  112. token = strsep(&buf, " ");
  113. } else {
  114. return -EINVAL;
  115. }
  116. }
  117. return 0;
  118. }
  119. static ssize_t debugfs_codec_write_op(struct file *filp,
  120. const char __user *ubuf, size_t cnt, loff_t *ppos)
  121. {
  122. struct ep92_pdata *ep92 = (struct ep92_pdata *) filp->private_data;
  123. struct snd_soc_component *component = ep92->component;
  124. char lbuf[32];
  125. int rc;
  126. u32 param[2];
  127. if (!component)
  128. return -ENODEV;
  129. if (!filp || !ppos || !ubuf)
  130. return -EINVAL;
  131. if (cnt > sizeof(lbuf) - 1)
  132. return -EINVAL;
  133. rc = copy_from_user(lbuf, ubuf, cnt);
  134. if (rc)
  135. return -EFAULT;
  136. lbuf[cnt] = '\0';
  137. rc = debugfs_get_parameters(lbuf, param, 2);
  138. if ((param[0] < EP92_ISP_MODE_ENTER_ISP)
  139. || (param[0] > EP92_GENERAL_CONTROL_4)) {
  140. dev_err(component->dev, "%s: reg address 0x%02X out of range\n",
  141. __func__, param[0]);
  142. return -EINVAL;
  143. }
  144. if ((param[1] < 0) || (param[1] > 255)) {
  145. dev_err(component->dev, "%s: reg data 0x%02X out of range\n",
  146. __func__, param[1]);
  147. return -EINVAL;
  148. }
  149. if (rc == 0) {
  150. rc = cnt;
  151. dev_info(component->dev, "%s: reg[0x%02X]=0x%02X\n",
  152. __func__, param[0], param[1]);
  153. snd_soc_component_write(component, param[0], param[1]);
  154. } else {
  155. dev_err(component->dev, "%s: write to register addr=0x%02X failed\n",
  156. __func__, param[0]);
  157. }
  158. return rc;
  159. }
  160. static ssize_t debugfs_ep92_reg_show(struct snd_soc_component *component,
  161. char __user *ubuf, size_t count, loff_t *ppos)
  162. {
  163. int i, reg_val, len;
  164. ssize_t total = 0;
  165. char tmp_buf[20];
  166. if (!ubuf || !ppos || !component || *ppos < 0)
  167. return -EINVAL;
  168. for (i = (int) *ppos / 11; i <= EP92_MAX_REGISTER_ADDR; i++) {
  169. reg_val = snd_soc_component_read32(component, i);
  170. len = snprintf(tmp_buf, 20, "0x%02X: 0x%02X\n", i,
  171. (reg_val & 0xFF));
  172. if ((total + len) > count)
  173. break;
  174. if (copy_to_user((ubuf + total), tmp_buf, len)) {
  175. dev_err(component->dev, "%s: fail to copy reg dump\n",
  176. __func__);
  177. total = -EFAULT;
  178. goto copy_err;
  179. }
  180. *ppos += len;
  181. total += len;
  182. }
  183. copy_err:
  184. return total;
  185. }
  186. static ssize_t debugfs_codec_read_op(struct file *filp,
  187. char __user *ubuf, size_t cnt, loff_t *ppos)
  188. {
  189. struct ep92_pdata *ep92 = (struct ep92_pdata *) filp->private_data;
  190. struct snd_soc_component *component = ep92->component;
  191. ssize_t ret_cnt;
  192. if (!component)
  193. return -ENODEV;
  194. if (!filp || !ppos || !ubuf || *ppos < 0)
  195. return -EINVAL;
  196. ret_cnt = debugfs_ep92_reg_show(component, ubuf, cnt, ppos);
  197. return ret_cnt;
  198. }
  199. static const struct file_operations debugfs_codec_ops = {
  200. .open = debugfs_codec_open_op,
  201. .write = debugfs_codec_write_op,
  202. .read = debugfs_codec_read_op,
  203. };
  204. #endif /* CONFIG_DEBUG_FS */
  205. static int ep92_send_uevent(struct ep92_pdata *ep92, char *event)
  206. {
  207. char *env[] = { event, NULL };
  208. if (!event || !ep92)
  209. return -EINVAL;
  210. if (!ep92->component)
  211. return -ENODEV;
  212. return kobject_uevent_env(&ep92->component->dev->kobj,
  213. KOBJ_CHANGE, env);
  214. }
  215. static int ep92_startup(struct snd_pcm_substream *substream,
  216. struct snd_soc_dai *dai)
  217. {
  218. return 0;
  219. }
  220. static void ep92_shutdown(struct snd_pcm_substream *substream,
  221. struct snd_soc_dai *dai)
  222. {
  223. }
  224. static int ep92_hw_params(struct snd_pcm_substream *substream,
  225. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  226. {
  227. return 0;
  228. }
  229. static struct snd_soc_dai_ops ep92_dai_ops = {
  230. .startup = ep92_startup,
  231. .shutdown = ep92_shutdown,
  232. .hw_params = ep92_hw_params,
  233. };
  234. static struct snd_soc_dai_driver ep92_dai[] = {
  235. {
  236. .name = "ep92-hdmi",
  237. .id = 1,
  238. .capture = {
  239. .stream_name = "HDMI Capture",
  240. .rate_max = 192000,
  241. .rate_min = 32000,
  242. .channels_min = 1,
  243. .channels_max = 8,
  244. .rates = EP92_RATES,
  245. .formats = EP92_FORMATS,
  246. },
  247. .ops = &ep92_dai_ops, /* callbacks */
  248. },
  249. {
  250. .name = "ep92-arc",
  251. .id = 2,
  252. .capture = {
  253. .stream_name = "ARC Capture",
  254. .rate_max = 192000,
  255. .rate_min = 32000,
  256. .channels_min = 1,
  257. .channels_max = 2,
  258. .rates = EP92_RATES,
  259. .formats = EP92_FORMATS,
  260. },
  261. .ops = &ep92_dai_ops, /* callbacks */
  262. },
  263. };
  264. static void ep92_read_general_control(struct snd_soc_component *component,
  265. struct ep92_pdata *ep92)
  266. {
  267. u8 old, change;
  268. int val;
  269. old = ep92->gi.tx_info;
  270. ep92->gi.tx_info = snd_soc_component_read32(component,
  271. EP92_BI_GENERAL_INFO_0);
  272. if (ep92->gi.tx_info == 0xff) {
  273. dev_dbg(component->dev, "ep92 EP92_BI_GENERAL_INFO_0 read 0xff\n");
  274. ep92->gi.tx_info = old;
  275. }
  276. /* implement hysteresis to prevent events on glitches */
  277. if (ep92->gi.tx_info & EP92_GI_TX_HOT_PLUG_MASK) {
  278. if (ep92->hyst_tx_plug < EP92_HYST_CNT) {
  279. ep92->hyst_tx_plug++;
  280. if ((ep92->hyst_tx_plug == EP92_HYST_CNT) &&
  281. (ep92->filt_tx_plug == 0)) {
  282. ep92->filt_tx_plug = 1;
  283. dev_dbg(component->dev, "ep92 out_plug changed to 1\n");
  284. ep92_send_uevent(ep92,
  285. "EP92EVT_OUT_PLUG=CONNECTED");
  286. }
  287. }
  288. } else {
  289. if (ep92->hyst_tx_plug > 0) {
  290. ep92->hyst_tx_plug--;
  291. if ((ep92->hyst_tx_plug == 0) &&
  292. (ep92->filt_tx_plug == 1)) {
  293. ep92->filt_tx_plug = 0;
  294. dev_dbg(component->dev, "ep92 out_plug changed to 0\n");
  295. ep92_send_uevent(ep92,
  296. "EP92EVT_OUT_PLUG=DISCONNECTED");
  297. }
  298. }
  299. }
  300. old = ep92->gi.video_latency;
  301. ep92->gi.video_latency = snd_soc_component_read32(component,
  302. EP92_BI_GENERAL_INFO_4);
  303. if (ep92->gi.video_latency == 0xff) {
  304. dev_dbg(component->dev, "ep92 EP92_BI_GENERAL_INFO_4 read 0xff\n");
  305. ep92->gi.video_latency = old;
  306. }
  307. change = ep92->gi.video_latency ^ old;
  308. if (change & EP92_GI_VIDEO_LATENCY_MASK) {
  309. val = ep92->gi.video_latency;
  310. if (val > 0)
  311. val = (val - 1) * 2;
  312. dev_dbg(component->dev, "ep92 video latency changed to %d\n", val);
  313. ep92_send_uevent(ep92, "EP92EVT_VIDEO_LATENCY=CHANGED");
  314. }
  315. old = ep92->gc.ctl;
  316. ep92->gc.ctl = snd_soc_component_read32(component,
  317. EP92_GENERAL_CONTROL_0);
  318. if (ep92->gc.ctl == 0xff) {
  319. dev_dbg(component->dev, "ep92 EP92_GENERAL_CONTROL_0 read 0xff\n");
  320. ep92->gc.ctl = old;
  321. }
  322. change = ep92->gc.ctl ^ old;
  323. if (change & EP92_GC_POWER_MASK) {
  324. val = (ep92->gc.ctl >> EP92_GC_POWER_SHIFT) &
  325. EP92_2CHOICE_MASK;
  326. dev_dbg(component->dev, "ep92 power changed to %d\n", val);
  327. if (val)
  328. ep92_send_uevent(ep92, "EP92EVT_POWER=ON");
  329. else
  330. ep92_send_uevent(ep92, "EP92EVT_POWER=OFF");
  331. }
  332. if (change & EP92_GC_AUDIO_PATH_MASK) {
  333. val = (ep92->gc.ctl >> EP92_GC_AUDIO_PATH_SHIFT) &
  334. EP92_2CHOICE_MASK;
  335. dev_dbg(component->dev, "ep92 audio_path changed to %d\n", val);
  336. if (val)
  337. ep92_send_uevent(ep92, "EP92EVT_AUDIO_PATH=TV");
  338. else
  339. ep92_send_uevent(ep92, "EP92EVT_AUDIO_PATH=SPEAKER");
  340. }
  341. if (change & EP92_GC_CEC_MUTE_MASK) {
  342. val = (ep92->gc.ctl >> EP92_GC_CEC_MUTE_SHIFT) &
  343. EP92_2CHOICE_MASK;
  344. dev_dbg(component->dev, "ep92 cec_mute changed to %d\n", val);
  345. if (val)
  346. ep92_send_uevent(ep92, "EP92EVT_CEC_MUTE=NORMAL");
  347. else
  348. ep92_send_uevent(ep92, "EP92EVT_CEC_MUTE=MUTED");
  349. }
  350. if (change & EP92_GC_ARC_EN_MASK) {
  351. val = ep92->gc.ctl & EP92_2CHOICE_MASK;
  352. dev_dbg(component->dev, "ep92 arc_en changed to %d\n", val);
  353. if (val)
  354. ep92_send_uevent(ep92, "EP92EVT_ARC_EN=ON");
  355. else
  356. ep92_send_uevent(ep92, "EP92EVT_ARC_EN=OFF");
  357. }
  358. old = ep92->gc.rx_sel;
  359. ep92->gc.rx_sel = snd_soc_component_read32(component,
  360. EP92_GENERAL_CONTROL_1);
  361. if (ep92->gc.rx_sel == 0xff) {
  362. dev_dbg(component->dev, "ep92 EP92_GENERAL_CONTROL_1 read 0xff\n");
  363. ep92->gc.rx_sel = old;
  364. }
  365. change = ep92->gc.rx_sel ^ old;
  366. if (change & EP92_GC_RX_SEL_MASK) {
  367. val = ep92->gc.rx_sel & EP92_GC_RX_SEL_MASK;
  368. dev_dbg(component->dev, "ep92 rx_sel changed to %d\n", val);
  369. ep92_send_uevent(ep92, "EP92EVT_SRC_SEL=CHANGED");
  370. }
  371. old = ep92->gc.cec_volume;
  372. ep92->gc.cec_volume = snd_soc_component_read32(component,
  373. EP92_GENERAL_CONTROL_3);
  374. if (ep92->gc.cec_volume == 0xff) {
  375. dev_dbg(component->dev, "ep92 EP92_GENERAL_CONTROL_3 read 0xff\n");
  376. ep92->gc.cec_volume = old;
  377. }
  378. change = ep92->gc.cec_volume ^ old;
  379. if (change & EP92_GC_CEC_VOLUME_MASK) {
  380. val = ep92->gc.cec_volume & EP92_GC_CEC_VOLUME_MASK;
  381. dev_dbg(component->dev, "ep92 cec_volume changed to %d\n", val);
  382. ep92_send_uevent(ep92, "EP92EVT_CEC_VOLUME=CHANGED");
  383. }
  384. old = ep92->gc.link;
  385. ep92->gc.link = snd_soc_component_read32(component,
  386. EP92_GENERAL_CONTROL_4);
  387. if (ep92->gc.link == 0xff) {
  388. dev_dbg(component->dev, "ep92 EP92_GENERAL_CONTROL_4 read 0xff\n");
  389. ep92->gc.link = old;
  390. }
  391. /* implement hysteresis to prevent events on glitches */
  392. if (ep92->gc.link & EP92_GC_LINK_ON0_MASK) {
  393. if (ep92->hyst_link_on0 < EP92_HYST_CNT) {
  394. ep92->hyst_link_on0++;
  395. if ((ep92->hyst_link_on0 == EP92_HYST_CNT) &&
  396. (ep92->filt_link_on0 == 0)) {
  397. ep92->filt_link_on0 = 1;
  398. dev_dbg(component->dev, "ep92 link_on0 changed to 1\n");
  399. ep92_send_uevent(ep92,
  400. "EP92EVT_LINK_ON0=CONNECTED");
  401. }
  402. }
  403. } else {
  404. if (ep92->hyst_link_on0 > 0) {
  405. ep92->hyst_link_on0--;
  406. if ((ep92->hyst_link_on0 == 0) &&
  407. (ep92->filt_link_on0 == 1)) {
  408. ep92->filt_link_on0 = 0;
  409. dev_dbg(component->dev, "ep92 link_on0 changed to 0\n");
  410. ep92_send_uevent(ep92,
  411. "EP92EVT_LINK_ON0=DISCONNECTED");
  412. }
  413. }
  414. }
  415. /* implement hysteresis to prevent events on glitches */
  416. if (ep92->gc.link & EP92_GC_LINK_ON1_MASK) {
  417. if (ep92->hyst_link_on1 < EP92_HYST_CNT) {
  418. ep92->hyst_link_on1++;
  419. if ((ep92->hyst_link_on1 == EP92_HYST_CNT) &&
  420. (ep92->filt_link_on1 == 0)) {
  421. ep92->filt_link_on1 = 1;
  422. dev_dbg(component->dev, "ep92 link_on1 changed to 1\n");
  423. ep92_send_uevent(ep92,
  424. "EP92EVT_LINK_ON1=CONNECTED");
  425. }
  426. }
  427. } else {
  428. if (ep92->hyst_link_on1 > 0) {
  429. ep92->hyst_link_on1--;
  430. if ((ep92->hyst_link_on1 == 0) &&
  431. (ep92->filt_link_on1 == 1)) {
  432. ep92->filt_link_on1 = 0;
  433. dev_dbg(component->dev, "ep92 link_on1 changed to 0\n");
  434. ep92_send_uevent(ep92,
  435. "EP92EVT_LINK_ON1=DISCONNECTED");
  436. }
  437. }
  438. }
  439. /* implement hysteresis to prevent events on glitches */
  440. if (ep92->gc.link & EP92_GC_LINK_ON2_MASK) {
  441. if (ep92->hyst_link_on2 < EP92_HYST_CNT) {
  442. ep92->hyst_link_on2++;
  443. if ((ep92->hyst_link_on2 == EP92_HYST_CNT) &&
  444. (ep92->filt_link_on2 == 0)) {
  445. ep92->filt_link_on2 = 1;
  446. dev_dbg(component->dev, "ep92 link_on2 changed to 1\n");
  447. ep92_send_uevent(ep92,
  448. "EP92EVT_LINK_ON2=CONNECTED");
  449. }
  450. }
  451. } else {
  452. if (ep92->hyst_link_on2 > 0) {
  453. ep92->hyst_link_on2--;
  454. if ((ep92->hyst_link_on2 == 0) &&
  455. (ep92->filt_link_on2 == 1)) {
  456. ep92->filt_link_on2 = 0;
  457. dev_dbg(component->dev, "ep92 link_on2 changed to 0\n");
  458. ep92_send_uevent(ep92,
  459. "EP92EVT_LINK_ON2=DISCONNECTED");
  460. }
  461. }
  462. }
  463. }
  464. static void ep92_read_audio_info(struct snd_soc_component *component,
  465. struct ep92_pdata *ep92)
  466. {
  467. u8 old, change;
  468. u8 new_mode;
  469. bool send_uevent = false;
  470. old = ep92->ai.system_status_0;
  471. ep92->ai.system_status_0 = snd_soc_component_read32(component,
  472. EP92_AUDIO_INFO_SYSTEM_STATUS_0);
  473. if (ep92->ai.system_status_0 == 0xff) {
  474. dev_dbg(component->dev, "ep92 EP92_AUDIO_INFO_SYSTEM_STATUS_0 read 0xff\n");
  475. ep92->ai.system_status_0 = old;
  476. }
  477. change = ep92->ai.system_status_0 ^ old;
  478. if (change & EP92_AI_MCLK_ON_MASK) {
  479. dev_dbg(component->dev, "ep92 status changed to %d\n",
  480. (ep92->ai.system_status_0 >> EP92_AI_MCLK_ON_SHIFT) &
  481. EP92_2CHOICE_MASK);
  482. send_uevent = true;
  483. }
  484. if (change & EP92_AI_AVMUTE_MASK) {
  485. dev_dbg(component->dev, "ep92 avmute changed to %d\n",
  486. (ep92->ai.system_status_0 >> EP92_AI_AVMUTE_SHIFT) &
  487. EP92_2CHOICE_MASK);
  488. send_uevent = true;
  489. }
  490. if (change & EP92_AI_LAYOUT_MASK) {
  491. dev_dbg(component->dev, "ep92 layout changed to %d\n",
  492. (ep92->ai.system_status_0) & EP92_2CHOICE_MASK);
  493. send_uevent = true;
  494. }
  495. old = ep92->ai.audio_status;
  496. ep92->ai.audio_status = snd_soc_component_read32(component,
  497. EP92_AUDIO_INFO_AUDIO_STATUS);
  498. if (ep92->ai.audio_status == 0xff) {
  499. dev_dbg(component->dev, "ep92 EP92_AUDIO_INFO_AUDIO_STATUS read 0xff\n");
  500. ep92->ai.audio_status = old;
  501. }
  502. change = ep92->ai.audio_status ^ old;
  503. if (change & EP92_AI_RATE_MASK) {
  504. dev_dbg(component->dev, "ep92 rate changed to %d\n",
  505. ep92_samp_freq_table[(ep92->ai.audio_status) &
  506. EP92_AI_RATE_MASK]);
  507. send_uevent = true;
  508. }
  509. new_mode = ep92->old_mode;
  510. if (ep92->ai.audio_status & EP92_AI_STD_ADO_MASK) {
  511. old = ep92->ai.cs[0];
  512. ep92->ai.cs[0] = snd_soc_component_read32(component,
  513. EP92_AUDIO_INFO_CHANNEL_STATUS_0);
  514. if (ep92->ai.cs[0] == 0xff) {
  515. dev_dbg(component->dev, "ep92 EP92_AUDIO_INFO_CHANNEL_STATUS_0 read 0xff\n");
  516. ep92->ai.cs[0] = old;
  517. }
  518. if (ep92->ai.cs[0] & EP92_AI_NPCM_MASK)
  519. new_mode = 1; /* Compr */
  520. else
  521. new_mode = 0; /* LPCM */
  522. } else if (ep92->ai.audio_status & EP92_AI_HBR_ADO_MASK)
  523. new_mode = 1; /* Compr */
  524. if (ep92->old_mode != new_mode) {
  525. dev_dbg(component->dev, "ep92 mode changed to %d\n", new_mode);
  526. send_uevent = true;
  527. }
  528. ep92->old_mode = new_mode;
  529. old = ep92->ai.cc;
  530. ep92->ai.cc = snd_soc_component_read32(component,
  531. EP92_AUDIO_INFO_ADO_INFO_FRAME_1);
  532. if (ep92->ai.cc == 0xff) {
  533. dev_dbg(component->dev, "ep92 EP92_AUDIO_INFO_ADO_INFO_FRAME_1 read 0xff\n");
  534. ep92->ai.cc = old;
  535. }
  536. change = ep92->ai.cc ^ old;
  537. if (change & EP92_AI_CH_COUNT_MASK) {
  538. dev_dbg(component->dev, "ep92 ch_count changed to %d (%d)\n",
  539. ep92->ai.cc & EP92_AI_CH_COUNT_MASK,
  540. (ep92->ai.cc & EP92_AI_CH_COUNT_MASK) == 0 ? 0 :
  541. (ep92->ai.cc & EP92_AI_CH_COUNT_MASK) + 1);
  542. send_uevent = true;
  543. }
  544. old = ep92->ai.ca;
  545. ep92->ai.ca = snd_soc_component_read32(component,
  546. EP92_AUDIO_INFO_ADO_INFO_FRAME_4);
  547. if (ep92->ai.ca == 0xff) {
  548. dev_dbg(component->dev, "ep92 EP92_AUDIO_INFO_ADO_INFO_FRAME_4 read 0xff\n");
  549. ep92->ai.ca = old;
  550. }
  551. change = ep92->ai.ca ^ old;
  552. if (change & EP92_AI_CH_ALLOC_MASK) {
  553. dev_dbg(component->dev, "ep92 ch_alloc changed to 0x%02x\n",
  554. (ep92->ai.ca) & EP92_AI_CH_ALLOC_MASK);
  555. send_uevent = true;
  556. }
  557. if (send_uevent)
  558. ep92_send_uevent(ep92, "EP92EVT_AUDIO=MEDIA_CONFIG_CHANGE");
  559. }
  560. static void ep92_init(struct snd_soc_component *component,
  561. struct ep92_pdata *ep92)
  562. {
  563. int reg0 = 0;
  564. int reg1 = 0;
  565. int reg2 = 0;
  566. int reg3 = 0;
  567. if (!ep92 || !component)
  568. return;
  569. reg0 = snd_soc_component_read32(component, EP92_BI_VERSION_YEAR);
  570. reg1 = snd_soc_component_read32(component, EP92_BI_VERSION_MONTH);
  571. reg2 = snd_soc_component_read32(component, EP92_BI_VERSION_DATE);
  572. reg3 = snd_soc_component_read32(component, EP92_BI_VERSION_NUM);
  573. dev_info(compoent->dev, "ep92 version info %02d/%02d/%02d %d\n",
  574. reg0, reg1, reg2, reg3);
  575. /* update the format information in mixer controls */
  576. ep92_read_general_control(component, ep92);
  577. ep92_read_audio_info(component, ep92);
  578. }
  579. static int ep92_probe(struct snd_soc_component *component)
  580. {
  581. struct ep92_pdata *ep92 = snd_soc_component_get_drvdata(component);
  582. ep92->component = component;
  583. ep92_init(component, ep92);
  584. /* start polling when codec is registered */
  585. if (ep92->irq == 0) {
  586. mod_timer(&ep92->timer, jiffies +
  587. msecs_to_jiffies(EP92_POLL_INTERVAL_OFF_MSEC));
  588. }
  589. return 0;
  590. }
  591. static void ep92_remove(struct snd_soc_component *component)
  592. {
  593. return;
  594. }
  595. static const struct snd_soc_component_driver soc_codec_drv_ep92 = {
  596. .name = DRV_NAME,
  597. .probe = ep92_probe,
  598. .remove = ep92_remove,
  599. };
  600. static struct regmap_config ep92_regmap_config = {
  601. .reg_bits = 8,
  602. .val_bits = 8,
  603. .cache_type = REGCACHE_RBTREE,
  604. .reg_defaults = ep92_reg_defaults,
  605. .num_reg_defaults = ARRAY_SIZE(ep92_reg_defaults),
  606. .max_register = EP92_MAX_REGISTER_ADDR,
  607. .volatile_reg = ep92_volatile_register,
  608. .writeable_reg = ep92_writeable_registers,
  609. .readable_reg = ep92_readable_registers,
  610. };
  611. void ep92_read_status(struct work_struct *work)
  612. {
  613. struct ep92_pdata *ep92 = container_of(work, struct ep92_pdata,
  614. read_status_worker);
  615. struct snd_soc_component *component = ep92->component;
  616. u8 val;
  617. /* No polling before component is initialized */
  618. if (component == NULL)
  619. return;
  620. /* check ADO_CHF that is set when audio format has changed */
  621. val = snd_soc_component_read32(component, EP92_BI_GENERAL_INFO_1);
  622. if (val == 0xff) {
  623. /* workaround for Nak'ed first read */
  624. val = snd_soc_component_read32(component,
  625. EP92_BI_GENERAL_INFO_1);
  626. if (val == 0xff)
  627. return; /* assume device not present */
  628. }
  629. if (val & EP92_GI_ADO_CHF_MASK)
  630. dev_dbg(component->dev, "ep92 audio mode change trigger.\n");
  631. if (val & EP92_GI_CEC_ECF_MASK)
  632. dev_dbg(component->dev, "ep92 CEC change trigger.\n");
  633. /* check for general control changes */
  634. ep92_read_general_control(component, ep92);
  635. /* update the format information in mixer controls */
  636. ep92_read_audio_info(component, ep92);
  637. }
  638. static irqreturn_t ep92_irq(int irq, void *data)
  639. {
  640. struct ep92_pdata *ep92 = data;
  641. struct snd_soc_component *component = ep92->component;
  642. /* Treat interrupt before component is initialized as spurious */
  643. if (component == NULL)
  644. return IRQ_NONE;
  645. dev_dbg(component->dev, "ep92_interrupt\n");
  646. schedule_work(&ep92->read_status_worker);
  647. return IRQ_HANDLED;
  648. };
  649. void ep92_poll_status(struct timer_list *t)
  650. {
  651. struct ep92_pdata *ep92 = from_timer(ep92, t, timer);
  652. u32 poll_msec;
  653. if ((ep92->gc.ctl & EP92_GC_POWER_MASK) == 0)
  654. poll_msec = EP92_POLL_INTERVAL_OFF_MSEC;
  655. else
  656. poll_msec = EP92_POLL_INTERVAL_ON_MSEC;
  657. mod_timer(&ep92->timer, jiffies + msecs_to_jiffies(poll_msec));
  658. schedule_work(&ep92->read_status_worker);
  659. }
  660. static const struct of_device_id ep92_of_match[] = {
  661. { .compatible = "explore,ep92a6", },
  662. { }
  663. };
  664. MODULE_DEVICE_TABLE(of, ep92_of_match);
  665. static ssize_t ep92_sysfs_rda_chipid(struct device *dev,
  666. struct device_attribute *attr, char *buf)
  667. {
  668. ssize_t ret = 0;
  669. int reg0 = 0;
  670. int reg1 = 0;
  671. int reg2 = 0;
  672. int reg3 = 0;
  673. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  674. if (!ep92 || !ep92->component) {
  675. dev_err(dev, "%s: device error\n", __func__);
  676. return -ENODEV;
  677. }
  678. reg0 = snd_soc_component_read32(ep92->component, EP92_BI_VENDOR_ID_0);
  679. reg1 = snd_soc_component_read32(ep92->component, EP92_BI_VENDOR_ID_1);
  680. reg2 = snd_soc_component_read32(ep92->component, EP92_BI_DEVICE_ID_0);
  681. reg3 = snd_soc_component_read32(ep92->component, EP92_BI_DEVICE_ID_1);
  682. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%02x%02x/%02x%02x\n",
  683. reg0, reg1, reg2, reg3);
  684. dev_dbg(dev, "%s: '%s'\n", __func__, buf);
  685. return ret;
  686. }
  687. static ssize_t ep92_sysfs_rda_version(struct device *dev,
  688. struct device_attribute *attr, char *buf)
  689. {
  690. ssize_t ret = 0;
  691. int reg0 = 0;
  692. int reg1 = 0;
  693. int reg2 = 0;
  694. int reg3 = 0;
  695. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  696. if (!ep92 || !ep92->component) {
  697. dev_err(dev, "%s: device error\n", __func__);
  698. return -ENODEV;
  699. }
  700. reg0 = snd_soc_component_read32(ep92->component,
  701. EP92_BI_VERSION_YEAR);
  702. reg1 = snd_soc_component_read32(ep92->component,
  703. EP92_BI_VERSION_MONTH);
  704. reg2 = snd_soc_component_read32(ep92->component,
  705. EP92_BI_VERSION_DATE);
  706. reg3 = snd_soc_component_read32(ep92->component,
  707. EP92_BI_VERSION_NUM);
  708. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%02d/%02d/%02d %d\n",
  709. reg0, reg1, reg2, reg3);
  710. dev_dbg(dev, "%s: '%s'\n", __func__, buf);
  711. return ret;
  712. }
  713. static ssize_t ep92_sysfs_rda_audio_state(struct device *dev,
  714. struct device_attribute *attr, char *buf)
  715. {
  716. ssize_t ret;
  717. int val;
  718. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  719. if (!ep92 || !ep92->component) {
  720. dev_err(dev, "%s: device error\n", __func__);
  721. return -ENODEV;
  722. }
  723. val = (ep92->ai.system_status_0 & EP92_AI_MCLK_ON_MASK) >>
  724. EP92_AI_MCLK_ON_SHIFT;
  725. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  726. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  727. return ret;
  728. }
  729. static ssize_t ep92_sysfs_rda_audio_format(struct device *dev,
  730. struct device_attribute *attr, char *buf)
  731. {
  732. ssize_t ret;
  733. int val;
  734. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  735. if (!ep92 || !ep92->component) {
  736. dev_err(dev, "%s: device error\n", __func__);
  737. return -ENODEV;
  738. }
  739. val = ep92->old_mode;
  740. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  741. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  742. return ret;
  743. }
  744. static ssize_t ep92_sysfs_rda_audio_rate(struct device *dev,
  745. struct device_attribute *attr, char *buf)
  746. {
  747. ssize_t ret;
  748. int val;
  749. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  750. if (!ep92 || !ep92->component) {
  751. dev_err(dev, "%s: device error\n", __func__);
  752. return -ENODEV;
  753. }
  754. val = ep92_samp_freq_table[(ep92->ai.audio_status) &
  755. EP92_AI_RATE_MASK];
  756. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  757. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  758. return ret;
  759. }
  760. static ssize_t ep92_sysfs_rda_audio_layout(struct device *dev,
  761. struct device_attribute *attr, char *buf)
  762. {
  763. ssize_t ret;
  764. int val;
  765. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  766. if (!ep92 || !ep92->component) {
  767. dev_err(dev, "%s: device error\n", __func__);
  768. return -ENODEV;
  769. }
  770. val = (ep92->ai.system_status_0 & EP92_AI_LAYOUT_MASK) >>
  771. EP92_AI_LAYOUT_SHIFT;
  772. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  773. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  774. return ret;
  775. }
  776. static ssize_t ep92_sysfs_rda_audio_ch_count(struct device *dev,
  777. struct device_attribute *attr, char *buf)
  778. {
  779. ssize_t ret;
  780. int val;
  781. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  782. if (!ep92 || !ep92->component) {
  783. dev_err(dev, "%s: device error\n", __func__);
  784. return -ENODEV;
  785. }
  786. val = ep92->ai.cc & EP92_AI_CH_COUNT_MASK;
  787. /* mapping is ch_count = reg_val + 1, with exception: 0 = unknown */
  788. if (val > 0)
  789. val += 1;
  790. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  791. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  792. return ret;
  793. }
  794. static ssize_t ep92_sysfs_rda_audio_ch_alloc(struct device *dev,
  795. struct device_attribute *attr, char *buf)
  796. {
  797. ssize_t ret;
  798. int val;
  799. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  800. if (!ep92 || !ep92->component) {
  801. dev_err(dev, "%s: device error\n", __func__);
  802. return -ENODEV;
  803. }
  804. val = ep92->ai.ca & EP92_AI_CH_ALLOC_MASK;
  805. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  806. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  807. return ret;
  808. }
  809. static ssize_t ep92_sysfs_rda_avmute(struct device *dev,
  810. struct device_attribute *attr, char *buf)
  811. {
  812. ssize_t ret;
  813. int val;
  814. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  815. if (!ep92 || !ep92->component) {
  816. dev_err(dev, "%s: device error\n", __func__);
  817. return -ENODEV;
  818. }
  819. val = (ep92->ai.system_status_0 >> EP92_AI_AVMUTE_SHIFT) &
  820. EP92_2CHOICE_MASK;
  821. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  822. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  823. return ret;
  824. }
  825. static ssize_t ep92_sysfs_rda_link_on0(struct device *dev,
  826. struct device_attribute *attr, char *buf)
  827. {
  828. ssize_t ret;
  829. int val;
  830. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  831. if (!ep92 || !ep92->component) {
  832. dev_err(dev, "%s: device error\n", __func__);
  833. return -ENODEV;
  834. }
  835. val = ep92->filt_link_on0;
  836. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  837. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  838. return ret;
  839. }
  840. static ssize_t ep92_sysfs_rda_link_on1(struct device *dev,
  841. struct device_attribute *attr, char *buf)
  842. {
  843. ssize_t ret;
  844. int val;
  845. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  846. if (!ep92 || !ep92->component) {
  847. dev_err(dev, "%s: device error\n", __func__);
  848. return -ENODEV;
  849. }
  850. val = ep92->filt_link_on1;
  851. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  852. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  853. return ret;
  854. }
  855. static ssize_t ep92_sysfs_rda_link_on2(struct device *dev,
  856. struct device_attribute *attr, char *buf)
  857. {
  858. ssize_t ret;
  859. int val;
  860. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  861. if (!ep92 || !ep92->component) {
  862. dev_err(dev, "%s: device error\n", __func__);
  863. return -ENODEV;
  864. }
  865. val = ep92->filt_link_on2;
  866. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  867. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  868. return ret;
  869. }
  870. static ssize_t ep92_sysfs_rda_out_plug(struct device *dev,
  871. struct device_attribute *attr, char *buf)
  872. {
  873. ssize_t ret;
  874. int val;
  875. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  876. if (!ep92 || !ep92->component) {
  877. dev_err(dev, "%s: device error\n", __func__);
  878. return -ENODEV;
  879. }
  880. val = ep92->filt_tx_plug;
  881. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  882. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  883. return ret;
  884. }
  885. static ssize_t ep92_sysfs_rda_video_latency(struct device *dev,
  886. struct device_attribute *attr, char *buf)
  887. {
  888. ssize_t ret;
  889. int val;
  890. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  891. if (!ep92 || !ep92->component) {
  892. dev_err(dev, "%s: device error\n", __func__);
  893. return -ENODEV;
  894. }
  895. val = ep92->gi.video_latency & EP92_GI_VIDEO_LATENCY_MASK;
  896. if (val > 0)
  897. val = (val - 1) * 2;
  898. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  899. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  900. return ret;
  901. }
  902. static ssize_t ep92_sysfs_rda_arc_disable(struct device *dev,
  903. struct device_attribute *attr, char *buf)
  904. {
  905. ssize_t ret;
  906. int val;
  907. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  908. if (!ep92 || !ep92->component) {
  909. dev_err(dev, "%s: device error\n", __func__);
  910. return -ENODEV;
  911. }
  912. val = (ep92->gc.ctl2 >> EP92_GC_ARC_DIS_SHIFT) &
  913. EP92_2CHOICE_MASK;
  914. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  915. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  916. return ret;
  917. }
  918. static ssize_t ep92_sysfs_wta_arc_disable(struct device *dev,
  919. struct device_attribute *attr, const char *buf, size_t count)
  920. {
  921. int reg, val, rc;
  922. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  923. if (!ep92 || !ep92->component) {
  924. dev_err(dev, "%s: device error\n", __func__);
  925. return -ENODEV;
  926. }
  927. rc = kstrtoint(buf, 10, &val);
  928. if (rc) {
  929. dev_err(dev, "%s: kstrtoint failed. rc=%d\n", __func__, rc);
  930. goto end;
  931. }
  932. if ((val < 0) || (val > 1)) {
  933. dev_err(dev, "%s: value out of range.\n", __func__);
  934. rc = -EINVAL;
  935. goto end;
  936. }
  937. reg = snd_soc_component_read32(ep92->component,
  938. EP92_GENERAL_CONTROL_2);
  939. reg &= ~EP92_GC_ARC_DIS_MASK;
  940. reg |= ((val << EP92_GC_ARC_DIS_SHIFT) & EP92_GC_ARC_DIS_MASK);
  941. snd_soc_component_write(ep92->component, EP92_GENERAL_CONTROL_2, reg);
  942. ep92->gc.ctl2 &= ~EP92_GC_ARC_DIS_MASK;
  943. ep92->gc.ctl2 |= (val << EP92_GC_ARC_DIS_SHIFT) & EP92_GC_ARC_DIS_MASK;
  944. rc = strnlen(buf, EP92_SYSFS_ENTRY_MAX_LEN);
  945. end:
  946. return rc;
  947. }
  948. static ssize_t ep92_sysfs_rda_power(struct device *dev,
  949. struct device_attribute *attr, char *buf)
  950. {
  951. ssize_t ret;
  952. int val;
  953. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  954. if (!ep92 || !ep92->component) {
  955. dev_err(dev, "%s: device error\n", __func__);
  956. return -ENODEV;
  957. }
  958. val = (ep92->gc.ctl >> EP92_GC_POWER_SHIFT) & EP92_2CHOICE_MASK;
  959. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  960. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  961. return ret;
  962. }
  963. static ssize_t ep92_sysfs_wta_power(struct device *dev,
  964. struct device_attribute *attr, const char *buf, size_t count)
  965. {
  966. int reg, val, rc;
  967. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  968. if (!ep92 || !ep92->component) {
  969. dev_err(dev, "%s: device error\n", __func__);
  970. return -ENODEV;
  971. }
  972. rc = kstrtoint(buf, 10, &val);
  973. if (rc) {
  974. dev_err(dev, "%s: kstrtoint failed. rc=%d\n", __func__, rc);
  975. goto end;
  976. }
  977. if ((val < 0) || (val > 1)) {
  978. dev_err(dev, "%s: value out of range.\n", __func__);
  979. rc = -EINVAL;
  980. goto end;
  981. }
  982. reg = snd_soc_component_read32(ep92->component, EP92_GENERAL_CONTROL_0);
  983. reg &= ~EP92_GC_POWER_MASK;
  984. reg |= (val << EP92_GC_POWER_SHIFT) & EP92_GC_POWER_MASK;
  985. snd_soc_component_write(ep92->component, EP92_GENERAL_CONTROL_0, reg);
  986. ep92->gc.ctl &= ~EP92_GC_POWER_MASK;
  987. ep92->gc.ctl |= (val << EP92_GC_POWER_SHIFT) & EP92_GC_POWER_MASK;
  988. rc = strnlen(buf, EP92_SYSFS_ENTRY_MAX_LEN);
  989. end:
  990. return rc;
  991. }
  992. static ssize_t ep92_sysfs_rda_audio_path(struct device *dev,
  993. struct device_attribute *attr, char *buf)
  994. {
  995. ssize_t ret;
  996. int val;
  997. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  998. if (!ep92 || !ep92->component) {
  999. dev_err(dev, "%s: device error\n", __func__);
  1000. return -ENODEV;
  1001. }
  1002. val = (ep92->gc.ctl >> EP92_GC_AUDIO_PATH_SHIFT) & EP92_2CHOICE_MASK;
  1003. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  1004. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  1005. return ret;
  1006. }
  1007. static ssize_t ep92_sysfs_wta_audio_path(struct device *dev,
  1008. struct device_attribute *attr, const char *buf, size_t count)
  1009. {
  1010. int reg, val, rc;
  1011. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1012. if (!ep92 || !ep92->component) {
  1013. dev_err(dev, "%s: device error\n", __func__);
  1014. return -ENODEV;
  1015. }
  1016. rc = kstrtoint(buf, 10, &val);
  1017. if (rc) {
  1018. dev_err(dev, "%s: kstrtoint failed. rc=%d\n", __func__, rc);
  1019. goto end;
  1020. }
  1021. if ((val < 0) || (val > 1)) {
  1022. dev_err(dev, "%s: value out of range.\n", __func__);
  1023. rc = -EINVAL;
  1024. goto end;
  1025. }
  1026. reg = snd_soc_component_read32(ep92->component,
  1027. EP92_GENERAL_CONTROL_0);
  1028. reg &= ~EP92_GC_AUDIO_PATH_MASK;
  1029. reg |= (val << EP92_GC_AUDIO_PATH_SHIFT) & EP92_GC_AUDIO_PATH_MASK;
  1030. snd_soc_component_write(ep92->component, EP92_GENERAL_CONTROL_0, reg);
  1031. ep92->gc.ctl &= ~EP92_GC_AUDIO_PATH_MASK;
  1032. ep92->gc.ctl |= (val << EP92_GC_AUDIO_PATH_SHIFT) &
  1033. EP92_GC_AUDIO_PATH_MASK;
  1034. rc = strnlen(buf, EP92_SYSFS_ENTRY_MAX_LEN);
  1035. end:
  1036. return rc;
  1037. }
  1038. static ssize_t ep92_sysfs_rda_src_sel(struct device *dev,
  1039. struct device_attribute *attr, char *buf)
  1040. {
  1041. ssize_t ret;
  1042. int val;
  1043. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1044. if (!ep92 || !ep92->component) {
  1045. dev_err(dev, "%s: device error\n", __func__);
  1046. return -ENODEV;
  1047. }
  1048. val = ep92->gc.rx_sel & EP92_GC_RX_SEL_MASK;
  1049. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  1050. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  1051. return ret;
  1052. }
  1053. static ssize_t ep92_sysfs_wta_src_sel(struct device *dev,
  1054. struct device_attribute *attr, const char *buf, size_t count)
  1055. {
  1056. int reg, val, rc;
  1057. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1058. if (!ep92 || !ep92->component) {
  1059. dev_err(dev, "%s: device error\n", __func__);
  1060. return -ENODEV;
  1061. }
  1062. rc = kstrtoint(buf, 10, &val);
  1063. if (rc) {
  1064. dev_err(dev, "%s: kstrtoint failed. rc=%d\n", __func__, rc);
  1065. goto end;
  1066. }
  1067. if ((val < 0) || (val > 7)) {
  1068. dev_err(dev, "%s: value out of range.\n", __func__);
  1069. rc = -EINVAL;
  1070. goto end;
  1071. }
  1072. reg = snd_soc_component_read32(ep92->component,
  1073. EP92_GENERAL_CONTROL_1);
  1074. reg &= ~EP92_GC_RX_SEL_MASK;
  1075. reg |= (val << EP92_GC_RX_SEL_SHIFT) & EP92_GC_RX_SEL_MASK;
  1076. snd_soc_component_write(ep92->component, EP92_GENERAL_CONTROL_1, reg);
  1077. ep92->gc.rx_sel &= ~EP92_GC_RX_SEL_MASK;
  1078. ep92->gc.rx_sel |= (val << EP92_GC_RX_SEL_SHIFT) & EP92_GC_RX_SEL_MASK;
  1079. rc = strnlen(buf, EP92_SYSFS_ENTRY_MAX_LEN);
  1080. end:
  1081. return rc;
  1082. }
  1083. static ssize_t ep92_sysfs_rda_arc_enable(struct device *dev,
  1084. struct device_attribute *attr, char *buf)
  1085. {
  1086. ssize_t ret;
  1087. int val;
  1088. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1089. if (!ep92 || !ep92->component) {
  1090. dev_err(dev, "%s: device error\n", __func__);
  1091. return -ENODEV;
  1092. }
  1093. val = (ep92->gc.ctl >> EP92_GC_ARC_EN_SHIFT) & EP92_2CHOICE_MASK;
  1094. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  1095. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  1096. return ret;
  1097. }
  1098. static ssize_t ep92_sysfs_wta_arc_enable(struct device *dev,
  1099. struct device_attribute *attr, const char *buf, size_t count)
  1100. {
  1101. int reg, val, rc;
  1102. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1103. if (!ep92 || !ep92->component) {
  1104. dev_err(dev, "%s: device error\n", __func__);
  1105. return -ENODEV;
  1106. }
  1107. rc = kstrtoint(buf, 10, &val);
  1108. if (rc) {
  1109. dev_err(dev, "%s: kstrtoint failed. rc=%d\n", __func__, rc);
  1110. goto end;
  1111. }
  1112. if ((val < 0) || (val > 1)) {
  1113. dev_err(dev, "%s: value out of range.\n", __func__);
  1114. rc = -EINVAL;
  1115. goto end;
  1116. }
  1117. reg = snd_soc_component_read32(ep92->component, EP92_GENERAL_CONTROL_0);
  1118. reg &= ~EP92_GC_AUDIO_PATH_MASK;
  1119. reg |= (val << EP92_GC_AUDIO_PATH_SHIFT) & EP92_GC_AUDIO_PATH_MASK;
  1120. snd_soc_component_write(ep92->component, EP92_GENERAL_CONTROL_0, reg);
  1121. ep92->gc.ctl &= ~EP92_GC_AUDIO_PATH_MASK;
  1122. ep92->gc.ctl |= (val << EP92_GC_AUDIO_PATH_SHIFT) &
  1123. EP92_GC_AUDIO_PATH_MASK;
  1124. rc = strnlen(buf, EP92_SYSFS_ENTRY_MAX_LEN);
  1125. end:
  1126. return rc;
  1127. }
  1128. static ssize_t ep92_sysfs_rda_cec_mute(struct device *dev,
  1129. struct device_attribute *attr, char *buf)
  1130. {
  1131. ssize_t ret;
  1132. int val;
  1133. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1134. if (!ep92 || !ep92->component) {
  1135. dev_err(dev, "%s: device error\n", __func__);
  1136. return -ENODEV;
  1137. }
  1138. val = (ep92->gc.ctl >> EP92_GC_CEC_MUTE_SHIFT) & EP92_2CHOICE_MASK;
  1139. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  1140. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  1141. return ret;
  1142. }
  1143. static ssize_t ep92_sysfs_wta_cec_mute(struct device *dev,
  1144. struct device_attribute *attr, const char *buf, size_t count)
  1145. {
  1146. int reg, val, rc;
  1147. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1148. if (!ep92 || !ep92->component) {
  1149. dev_err(dev, "%s: device error\n", __func__);
  1150. return -ENODEV;
  1151. }
  1152. rc = kstrtoint(buf, 10, &val);
  1153. if (rc) {
  1154. dev_err(dev, "%s: kstrtoint failed. rc=%d\n", __func__, rc);
  1155. goto end;
  1156. }
  1157. if ((val < 0) || (val > 1)) {
  1158. dev_err(dev, "%s: value out of range.\n", __func__);
  1159. rc = -EINVAL;
  1160. goto end;
  1161. }
  1162. reg = snd_soc_component_read32(ep92->component, EP92_GENERAL_CONTROL_0);
  1163. reg &= ~EP92_GC_CEC_MUTE_MASK;
  1164. reg |= (val << EP92_GC_CEC_MUTE_SHIFT) & EP92_GC_CEC_MUTE_MASK;
  1165. snd_soc_component_write(ep92->component, EP92_GENERAL_CONTROL_0, reg);
  1166. ep92->gc.ctl &= ~EP92_GC_CEC_MUTE_MASK;
  1167. ep92->gc.ctl |= (val << EP92_GC_CEC_MUTE_SHIFT) &
  1168. EP92_GC_CEC_MUTE_MASK;
  1169. rc = strnlen(buf, EP92_SYSFS_ENTRY_MAX_LEN);
  1170. end:
  1171. return rc;
  1172. }
  1173. static ssize_t ep92_sysfs_rda_cec_volume(struct device *dev,
  1174. struct device_attribute *attr, char *buf)
  1175. {
  1176. ssize_t ret;
  1177. int val;
  1178. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1179. if (!ep92 || !ep92->component) {
  1180. dev_err(dev, "%s: device error\n", __func__);
  1181. return -ENODEV;
  1182. }
  1183. val = (ep92->gc.cec_volume >> EP92_GC_CEC_VOLUME_SHIFT) &
  1184. EP92_GC_CEC_VOLUME_MASK;
  1185. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  1186. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  1187. return ret;
  1188. }
  1189. static ssize_t ep92_sysfs_wta_cec_volume(struct device *dev,
  1190. struct device_attribute *attr, const char *buf, size_t count)
  1191. {
  1192. int reg, val, rc;
  1193. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1194. if (!ep92 || !ep92->component) {
  1195. dev_err(dev, "%s: device error\n", __func__);
  1196. return -ENODEV;
  1197. }
  1198. rc = kstrtoint(buf, 10, &val);
  1199. if (rc) {
  1200. dev_err(dev, "%s: kstrtoint failed. rc=%d\n", __func__, rc);
  1201. goto end;
  1202. }
  1203. if ((val < 0) || (val > EP92_GC_CEC_VOLUME_MAX)) {
  1204. dev_err(dev, "%s: value out of range.\n", __func__);
  1205. rc = -EINVAL;
  1206. goto end;
  1207. }
  1208. reg = val & EP92_GC_CEC_VOLUME_MASK;
  1209. snd_soc_component_write(ep92->component, EP92_GENERAL_CONTROL_3, reg);
  1210. ep92->gc.cec_volume = val & EP92_GC_CEC_VOLUME_MASK;
  1211. rc = strnlen(buf, EP92_SYSFS_ENTRY_MAX_LEN);
  1212. end:
  1213. return rc;
  1214. }
  1215. static DEVICE_ATTR(chipid, 0444, ep92_sysfs_rda_chipid, NULL);
  1216. static DEVICE_ATTR(version, 0444, ep92_sysfs_rda_version, NULL);
  1217. static DEVICE_ATTR(audio_state, 0444, ep92_sysfs_rda_audio_state, NULL);
  1218. static DEVICE_ATTR(audio_format, 0444, ep92_sysfs_rda_audio_format, NULL);
  1219. static DEVICE_ATTR(audio_rate, 0444, ep92_sysfs_rda_audio_rate, NULL);
  1220. static DEVICE_ATTR(audio_layout, 0444, ep92_sysfs_rda_audio_layout, NULL);
  1221. static DEVICE_ATTR(audio_ch_count, 0444, ep92_sysfs_rda_audio_ch_count, NULL);
  1222. static DEVICE_ATTR(audio_ch_alloc, 0444, ep92_sysfs_rda_audio_ch_alloc, NULL);
  1223. static DEVICE_ATTR(audio_avmute, 0444, ep92_sysfs_rda_avmute, NULL);
  1224. static DEVICE_ATTR(link_on0, 0444, ep92_sysfs_rda_link_on0, NULL);
  1225. static DEVICE_ATTR(link_on1, 0444, ep92_sysfs_rda_link_on1, NULL);
  1226. static DEVICE_ATTR(link_on2, 0444, ep92_sysfs_rda_link_on2, NULL);
  1227. static DEVICE_ATTR(out_plug, 0444, ep92_sysfs_rda_out_plug, NULL);
  1228. static DEVICE_ATTR(video_latency, 0444, ep92_sysfs_rda_video_latency, NULL);
  1229. static DEVICE_ATTR(arc_disable, 0644, ep92_sysfs_rda_arc_disable,
  1230. ep92_sysfs_wta_arc_disable);
  1231. static DEVICE_ATTR(power_on, 0644, ep92_sysfs_rda_power, ep92_sysfs_wta_power);
  1232. static DEVICE_ATTR(audio_path, 0644, ep92_sysfs_rda_audio_path,
  1233. ep92_sysfs_wta_audio_path);
  1234. static DEVICE_ATTR(src_sel, 0644, ep92_sysfs_rda_src_sel,
  1235. ep92_sysfs_wta_src_sel);
  1236. static DEVICE_ATTR(arc_enable, 0644, ep92_sysfs_rda_arc_enable,
  1237. ep92_sysfs_wta_arc_enable);
  1238. static DEVICE_ATTR(cec_mute, 0644, ep92_sysfs_rda_cec_mute,
  1239. ep92_sysfs_wta_cec_mute);
  1240. static DEVICE_ATTR(cec_volume, 0644, ep92_sysfs_rda_cec_volume,
  1241. ep92_sysfs_wta_cec_volume);
  1242. static struct attribute *ep92_fs_attrs[] = {
  1243. &dev_attr_chipid.attr,
  1244. &dev_attr_version.attr,
  1245. &dev_attr_audio_state.attr,
  1246. &dev_attr_audio_format.attr,
  1247. &dev_attr_audio_rate.attr,
  1248. &dev_attr_audio_layout.attr,
  1249. &dev_attr_audio_ch_count.attr,
  1250. &dev_attr_audio_ch_alloc.attr,
  1251. &dev_attr_audio_avmute.attr,
  1252. &dev_attr_link_on0.attr,
  1253. &dev_attr_link_on1.attr,
  1254. &dev_attr_link_on2.attr,
  1255. &dev_attr_out_plug.attr,
  1256. &dev_attr_video_latency.attr,
  1257. &dev_attr_arc_disable.attr,
  1258. &dev_attr_power_on.attr,
  1259. &dev_attr_audio_path.attr,
  1260. &dev_attr_src_sel.attr,
  1261. &dev_attr_arc_enable.attr,
  1262. &dev_attr_cec_mute.attr,
  1263. &dev_attr_cec_volume.attr,
  1264. NULL,
  1265. };
  1266. static struct attribute_group ep92_fs_attrs_group = {
  1267. .attrs = ep92_fs_attrs,
  1268. };
  1269. static int ep92_sysfs_create(struct i2c_client *client,
  1270. struct ep92_pdata *ep92)
  1271. {
  1272. int rc;
  1273. rc = sysfs_create_group(&client->dev.kobj, &ep92_fs_attrs_group);
  1274. return rc;
  1275. }
  1276. static void ep92_sysfs_remove(struct i2c_client *client,
  1277. struct ep92_pdata *ep92)
  1278. {
  1279. sysfs_remove_group(&client->dev.kobj, &ep92_fs_attrs_group);
  1280. }
  1281. static int ep92_i2c_probe(struct i2c_client *client,
  1282. const struct i2c_device_id *id)
  1283. {
  1284. struct ep92_pdata *ep92;
  1285. int ret;
  1286. #if IS_ENABLED(CONFIG_DEBUG_FS)
  1287. char debugfs_dir_name[32];
  1288. #endif
  1289. ep92 = devm_kzalloc(&client->dev, sizeof(struct ep92_pdata),
  1290. GFP_KERNEL);
  1291. if (ep92 == NULL)
  1292. return -ENOMEM;
  1293. ep92->regmap = devm_regmap_init_i2c(client, &ep92_regmap_config);
  1294. if (IS_ERR(ep92->regmap)) {
  1295. ret = PTR_ERR(ep92->regmap);
  1296. dev_err(&client->dev,
  1297. "%s: Failed to allocate regmap for I2C device: %d\n",
  1298. __func__, ret);
  1299. return ret;
  1300. }
  1301. i2c_set_clientdata(client, ep92);
  1302. /* register interrupt handler */
  1303. INIT_WORK(&ep92->read_status_worker, ep92_read_status);
  1304. ep92->irq = client->irq;
  1305. if (ep92->irq) {
  1306. ret = devm_request_threaded_irq(&client->dev, ep92->irq,
  1307. NULL, ep92_irq, IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
  1308. "ep92_irq", ep92);
  1309. if (ret) {
  1310. dev_err(&client->dev,
  1311. "%s: Failed to request IRQ %d: %d\n",
  1312. __func__, ep92->irq, ret);
  1313. ep92->irq = 0;
  1314. }
  1315. }
  1316. /* poll status if IRQ is not configured */
  1317. if (ep92->irq == 0)
  1318. timer_setup(&ep92->timer, ep92_poll_status, 0);
  1319. #if IS_ENABLED(CONFIG_DEBUG_FS)
  1320. /* debugfs interface */
  1321. snprintf(debugfs_dir_name, sizeof(debugfs_dir_name), "%s-%s",
  1322. client->name, dev_name(&client->dev));
  1323. ep92->debugfs_dir = debugfs_create_dir(debugfs_dir_name, NULL);
  1324. if (!ep92->debugfs_dir) {
  1325. dev_dbg(&client->dev,
  1326. "%s: Failed to create /sys/kernel/debug/%s for debugfs\n",
  1327. __func__, debugfs_dir_name);
  1328. return -ENOMEM;
  1329. }
  1330. ep92->debugfs_file_wo = debugfs_create_file(
  1331. "write_reg_val", S_IFREG | 0444, ep92->debugfs_dir,
  1332. (void *) ep92,
  1333. &debugfs_codec_ops);
  1334. if (!ep92->debugfs_file_wo) {
  1335. dev_dbg(&client->dev,
  1336. "%s: Failed to create /sys/kernel/debug/%s/write_reg_val\n",
  1337. __func__, debugfs_dir_name);
  1338. return -ENOMEM;
  1339. }
  1340. ep92->debugfs_file_ro = debugfs_create_file(
  1341. "show_reg_dump", S_IFREG | 0444, ep92->debugfs_dir,
  1342. (void *) ep92,
  1343. &debugfs_codec_ops);
  1344. if (!ep92->debugfs_file_ro) {
  1345. dev_dbg(&client->dev,
  1346. "%s: Failed to create /sys/kernel/debug/%s/show_reg_dump\n",
  1347. __func__, debugfs_dir_name);
  1348. return -ENOMEM;
  1349. }
  1350. #endif /* CONFIG_DEBUG_FS */
  1351. /* register component */
  1352. ret = snd_soc_register_component(&client->dev, &soc_codec_drv_ep92,
  1353. ep92_dai, ARRAY_SIZE(ep92_dai));
  1354. if (ret) {
  1355. dev_err(&client->dev, "%s %d: Failed to register CODEC: %d\n",
  1356. __func__, __LINE__, ret);
  1357. goto err_reg;
  1358. }
  1359. ret = ep92_sysfs_create(client, ep92);
  1360. if (ret) {
  1361. dev_err(&client->dev, "%s: sysfs creation failed ret=%d\n",
  1362. __func__, ret);
  1363. goto err_sysfs;
  1364. }
  1365. return 0;
  1366. err_sysfs:
  1367. snd_soc_unregister_component(&client->dev);
  1368. err_reg:
  1369. if (ep92->irq == 0)
  1370. del_timer(&ep92->timer);
  1371. return ret;
  1372. }
  1373. static int ep92_i2c_remove(struct i2c_client *client)
  1374. {
  1375. struct ep92_pdata *ep92;
  1376. ep92 = i2c_get_clientdata(client);
  1377. if (ep92) {
  1378. if (ep92->irq == 0)
  1379. del_timer(&ep92->timer);
  1380. #if IS_ENABLED(CONFIG_DEBUG_FS)
  1381. debugfs_remove_recursive(ep92->debugfs_dir);
  1382. #endif
  1383. }
  1384. snd_soc_unregister_component(&client->dev);
  1385. ep92_sysfs_remove(client, ep92);
  1386. return 0;
  1387. }
  1388. static const struct i2c_device_id ep92_i2c_id[] = {
  1389. { "ep92-dev", 0},
  1390. { }
  1391. };
  1392. MODULE_DEVICE_TABLE(i2c, ep92_i2c_id);
  1393. static struct i2c_driver ep92_i2c_driver = {
  1394. .probe = ep92_i2c_probe,
  1395. .remove = ep92_i2c_remove,
  1396. .id_table = ep92_i2c_id,
  1397. .driver = {
  1398. .name = "ep92",
  1399. .owner = THIS_MODULE,
  1400. .of_match_table = ep92_of_match
  1401. },
  1402. };
  1403. static int __init ep92_codec_init(void)
  1404. {
  1405. int ret = 0;
  1406. ret = i2c_add_driver(&ep92_i2c_driver);
  1407. if (ret)
  1408. pr_err("Failed to register EP92 I2C driver: %d\n", ret);
  1409. return ret;
  1410. }
  1411. module_init(ep92_codec_init);
  1412. static void __exit ep92_codec_exit(void)
  1413. {
  1414. i2c_del_driver(&ep92_i2c_driver);
  1415. }
  1416. module_exit(ep92_codec_exit);
  1417. MODULE_DESCRIPTION("EP92 HDMI repeater/switch driver");
  1418. MODULE_LICENSE("GPL v2");