dp_rh.c 22 KB

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  1. /*
  2. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "dp_types.h"
  19. #include <dp_internal.h>
  20. #include <dp_htt.h>
  21. #include "dp_rh.h"
  22. #include "dp_rh_tx.h"
  23. #include "dp_rh_htt.h"
  24. #include "dp_tx_desc.h"
  25. #include "dp_rh_rx.h"
  26. #include "dp_peer.h"
  27. #include <wlan_utility.h>
  28. #include <dp_rings.h>
  29. #include <ce_api.h>
  30. #include <ce_internal.h>
  31. static QDF_STATUS
  32. dp_srng_init_rh(struct dp_soc *soc, struct dp_srng *srng, int ring_type,
  33. int ring_num, int mac_id)
  34. {
  35. hal_soc_handle_t hal_soc = soc->hal_soc;
  36. struct hal_srng_params ring_params;
  37. if (srng->hal_srng) {
  38. dp_init_err("%pK: Ring type: %d, num:%d is already initialized",
  39. soc, ring_type, ring_num);
  40. return QDF_STATUS_SUCCESS;
  41. }
  42. /* memset the srng ring to zero */
  43. qdf_mem_zero(srng->base_vaddr_unaligned, srng->alloc_size);
  44. qdf_mem_zero(&ring_params, sizeof(struct hal_srng_params));
  45. ring_params.ring_base_paddr = srng->base_paddr_aligned;
  46. ring_params.ring_base_vaddr = srng->base_vaddr_aligned;
  47. ring_params.num_entries = srng->num_entries;
  48. dp_info("Ring type: %d, num:%d vaddr %pK paddr %pK entries %u",
  49. ring_type, ring_num,
  50. (void *)ring_params.ring_base_vaddr,
  51. (void *)ring_params.ring_base_paddr,
  52. ring_params.num_entries);
  53. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  54. mac_id, &ring_params, 0);
  55. if (!srng->hal_srng) {
  56. dp_srng_free(soc, srng);
  57. return QDF_STATUS_E_FAILURE;
  58. }
  59. return QDF_STATUS_SUCCESS;
  60. }
  61. static QDF_STATUS
  62. dp_peer_setup_rh(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  63. uint8_t *peer_mac,
  64. struct cdp_peer_setup_info *setup_info)
  65. {
  66. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  67. struct dp_pdev *pdev;
  68. QDF_STATUS status = QDF_STATUS_SUCCESS;
  69. struct dp_vdev *vdev = NULL;
  70. struct dp_peer *peer =
  71. dp_peer_find_hash_find(soc, peer_mac, 0, vdev_id,
  72. DP_MOD_ID_CDP);
  73. enum wlan_op_mode vdev_opmode;
  74. if (!peer)
  75. return QDF_STATUS_E_FAILURE;
  76. vdev = peer->vdev;
  77. if (!vdev) {
  78. status = QDF_STATUS_E_FAILURE;
  79. goto fail;
  80. }
  81. /* save vdev related member in case vdev freed */
  82. vdev_opmode = vdev->opmode;
  83. pdev = vdev->pdev;
  84. dp_info("pdev: %d vdev :%d opmode:%u",
  85. pdev->pdev_id, vdev->vdev_id, vdev->opmode);
  86. /*
  87. * There are corner cases where the AD1 = AD2 = "VAPs address"
  88. * i.e both the devices have same MAC address. In these
  89. * cases we want such pkts to be processed in NULL Q handler
  90. * which is REO2TCL ring. for this reason we should
  91. * not setup reo_queues and default route for bss_peer.
  92. */
  93. dp_monitor_peer_tx_init(pdev, peer);
  94. if (!setup_info)
  95. if (dp_peer_legacy_setup(soc, peer) !=
  96. QDF_STATUS_SUCCESS) {
  97. status = QDF_STATUS_E_RESOURCES;
  98. goto fail;
  99. }
  100. if (peer->bss_peer && vdev->opmode == wlan_op_mode_ap) {
  101. status = QDF_STATUS_E_FAILURE;
  102. goto fail;
  103. }
  104. if (vdev_opmode != wlan_op_mode_monitor)
  105. dp_peer_rx_init(pdev, peer);
  106. dp_peer_ppdu_delayed_ba_init(peer);
  107. fail:
  108. dp_peer_unref_delete(peer, DP_MOD_ID_CDP);
  109. return status;
  110. }
  111. #ifdef AST_OFFLOAD_ENABLE
  112. static void dp_peer_map_detach_rh(struct dp_soc *soc)
  113. {
  114. dp_soc_wds_detach(soc);
  115. dp_peer_ast_table_detach(soc);
  116. dp_peer_ast_hash_detach(soc);
  117. dp_peer_mec_hash_detach(soc);
  118. }
  119. static QDF_STATUS dp_peer_map_attach_rh(struct dp_soc *soc)
  120. {
  121. QDF_STATUS status;
  122. soc->max_peer_id = soc->max_peers;
  123. status = dp_peer_ast_table_attach(soc);
  124. if (!QDF_IS_STATUS_SUCCESS(status))
  125. return status;
  126. status = dp_peer_ast_hash_attach(soc);
  127. if (!QDF_IS_STATUS_SUCCESS(status))
  128. goto ast_table_detach;
  129. status = dp_peer_mec_hash_attach(soc);
  130. if (!QDF_IS_STATUS_SUCCESS(status))
  131. goto hash_detach;
  132. dp_soc_wds_attach(soc);
  133. return QDF_STATUS_SUCCESS;
  134. hash_detach:
  135. dp_peer_ast_hash_detach(soc);
  136. ast_table_detach:
  137. dp_peer_ast_table_detach(soc);
  138. return status;
  139. }
  140. #else
  141. static void dp_peer_map_detach_rh(struct dp_soc *soc)
  142. {
  143. }
  144. static QDF_STATUS dp_peer_map_attach_rh(struct dp_soc *soc)
  145. {
  146. soc->max_peer_id = soc->max_peers;
  147. return QDF_STATUS_SUCCESS;
  148. }
  149. #endif
  150. /**
  151. * dp_soc_cfg_init_rh() - initialize target specific configuration
  152. * during dp_soc_init
  153. * @soc: dp soc handle
  154. */
  155. static void dp_soc_cfg_init_rh(struct dp_soc *soc)
  156. {
  157. uint32_t target_type;
  158. target_type = hal_get_target_type(soc->hal_soc);
  159. switch (target_type) {
  160. case TARGET_TYPE_WCN6450:
  161. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, true);
  162. soc->ast_override_support = 1;
  163. soc->wlan_cfg_ctx->rxdma1_enable = 0;
  164. break;
  165. default:
  166. qdf_print("%s: Unknown tgt type %d\n", __func__, target_type);
  167. qdf_assert_always(0);
  168. break;
  169. }
  170. }
  171. static void dp_soc_cfg_attach_rh(struct dp_soc *soc)
  172. {
  173. int target_type;
  174. target_type = hal_get_target_type(soc->hal_soc);
  175. switch (target_type) {
  176. case TARGET_TYPE_WCN6450:
  177. soc->wlan_cfg_ctx->rxdma1_enable = 0;
  178. break;
  179. default:
  180. qdf_print("%s: Unknown tgt type %d\n", __func__, target_type);
  181. qdf_assert_always(0);
  182. break;
  183. }
  184. /*
  185. * keeping TCL and completion rings number, this data
  186. * is equivalent number of TX interface rings.
  187. */
  188. soc->num_tx_comp_rings =
  189. wlan_cfg_num_tx_comp_rings(soc->wlan_cfg_ctx);
  190. soc->num_tcl_data_rings =
  191. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  192. }
  193. qdf_size_t dp_get_context_size_rh(enum dp_context_type context_type)
  194. {
  195. switch (context_type) {
  196. case DP_CONTEXT_TYPE_SOC:
  197. return sizeof(struct dp_soc_rh);
  198. case DP_CONTEXT_TYPE_PDEV:
  199. return sizeof(struct dp_pdev_rh);
  200. case DP_CONTEXT_TYPE_VDEV:
  201. return sizeof(struct dp_vdev_rh);
  202. case DP_CONTEXT_TYPE_PEER:
  203. return sizeof(struct dp_peer_rh);
  204. default:
  205. return 0;
  206. }
  207. }
  208. qdf_size_t dp_mon_get_context_size_rh(enum dp_context_type context_type)
  209. {
  210. switch (context_type) {
  211. case DP_CONTEXT_TYPE_MON_PDEV:
  212. return sizeof(struct dp_mon_pdev_rh);
  213. case DP_CONTEXT_TYPE_MON_SOC:
  214. return sizeof(struct dp_mon_soc_rh);
  215. default:
  216. return 0;
  217. }
  218. }
  219. static QDF_STATUS dp_soc_attach_rh(struct dp_soc *soc,
  220. struct cdp_soc_attach_params *params)
  221. {
  222. return QDF_STATUS_SUCCESS;
  223. }
  224. static QDF_STATUS dp_soc_detach_rh(struct dp_soc *soc)
  225. {
  226. return QDF_STATUS_SUCCESS;
  227. }
  228. static QDF_STATUS dp_soc_deinit_rh(struct dp_soc *soc)
  229. {
  230. struct htt_soc *htt_soc = soc->htt_handle;
  231. qdf_atomic_set(&soc->cmn_init_done, 0);
  232. /*Degister RX offload flush handlers*/
  233. hif_offld_flush_cb_deregister(soc->hif_handle);
  234. dp_monitor_soc_deinit(soc);
  235. /* free peer tables & AST tables allocated during peer_map_attach */
  236. if (soc->peer_map_attach_success) {
  237. dp_peer_find_detach(soc);
  238. dp_peer_map_detach_rh(soc);
  239. soc->peer_map_attach_success = FALSE;
  240. }
  241. qdf_flush_work(&soc->htt_stats.work);
  242. qdf_disable_work(&soc->htt_stats.work);
  243. qdf_spinlock_destroy(&soc->htt_stats.lock);
  244. qdf_spinlock_destroy(&soc->ast_lock);
  245. dp_peer_mec_spinlock_destroy(soc);
  246. qdf_nbuf_queue_free(&soc->htt_stats.msg);
  247. qdf_nbuf_queue_free(&soc->invalid_buf_queue);
  248. qdf_spinlock_destroy(&soc->rx.defrag.defrag_lock);
  249. qdf_spinlock_destroy(&soc->vdev_map_lock);
  250. dp_soc_tx_desc_sw_pools_deinit(soc);
  251. dp_soc_srng_deinit(soc);
  252. dp_hw_link_desc_ring_deinit(soc);
  253. dp_soc_print_inactive_objects(soc);
  254. qdf_spinlock_destroy(&soc->inactive_peer_list_lock);
  255. qdf_spinlock_destroy(&soc->inactive_vdev_list_lock);
  256. htt_soc_htc_dealloc(soc->htt_handle);
  257. htt_soc_detach(htt_soc);
  258. wlan_minidump_remove(soc, sizeof(*soc), soc->ctrl_psoc,
  259. WLAN_MD_DP_SOC, "dp_soc");
  260. return QDF_STATUS_SUCCESS;
  261. }
  262. static void *dp_soc_init_rh(struct dp_soc *soc, HTC_HANDLE htc_handle,
  263. struct hif_opaque_softc *hif_handle)
  264. {
  265. struct htt_soc *htt_soc = (struct htt_soc *)soc->htt_handle;
  266. bool is_monitor_mode = false;
  267. uint8_t i;
  268. wlan_minidump_log(soc, sizeof(*soc), soc->ctrl_psoc,
  269. WLAN_MD_DP_SOC, "dp_soc");
  270. soc->hif_handle = hif_handle;
  271. soc->hal_soc = hif_get_hal_handle(soc->hif_handle);
  272. if (!soc->hal_soc)
  273. goto fail1;
  274. htt_soc = htt_soc_attach(soc, htc_handle);
  275. if (!htt_soc)
  276. goto fail1;
  277. soc->htt_handle = htt_soc;
  278. if (htt_soc_htc_prealloc(htt_soc) != QDF_STATUS_SUCCESS)
  279. goto fail2;
  280. htt_set_htc_handle(htt_soc, htc_handle);
  281. dp_soc_cfg_init_rh(soc);
  282. dp_monitor_soc_cfg_init(soc);
  283. /* Note: Any SRNG ring initialization should happen only after
  284. * Interrupt mode is set and followed by filling up the
  285. * interrupt mask. IT SHOULD ALWAYS BE IN THIS ORDER.
  286. */
  287. dp_soc_set_interrupt_mode(soc);
  288. if (soc->cdp_soc.ol_ops->get_con_mode &&
  289. soc->cdp_soc.ol_ops->get_con_mode() ==
  290. QDF_GLOBAL_MONITOR_MODE)
  291. is_monitor_mode = true;
  292. if (dp_soc_srng_init(soc)) {
  293. dp_init_err("%pK: dp_soc_srng_init failed", soc);
  294. goto fail3;
  295. }
  296. if (dp_htt_soc_initialize_rh(soc->htt_handle, soc->ctrl_psoc,
  297. htt_get_htc_handle(htt_soc),
  298. soc->hal_soc, soc->osdev) == NULL)
  299. goto fail4;
  300. /* Initialize descriptors in TCL Rings */
  301. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  302. hal_tx_init_data_ring(soc->hal_soc,
  303. soc->tcl_data_ring[i].hal_srng);
  304. }
  305. if (dp_soc_tx_desc_sw_pools_init(soc)) {
  306. dp_init_err("%pK: dp_tx_soc_attach failed", soc);
  307. goto fail5;
  308. }
  309. wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx,
  310. cfg_get(soc->ctrl_psoc, CFG_DP_RX_HASH));
  311. soc->cce_disable = false;
  312. soc->max_ast_ageout_count = MAX_AST_AGEOUT_COUNT;
  313. soc->sta_mode_search_policy = DP_TX_ADDR_SEARCH_ADDR_POLICY;
  314. qdf_mem_zero(&soc->vdev_id_map, sizeof(soc->vdev_id_map));
  315. qdf_spinlock_create(&soc->vdev_map_lock);
  316. qdf_atomic_init(&soc->num_tx_outstanding);
  317. qdf_atomic_init(&soc->num_tx_exception);
  318. soc->num_tx_allowed =
  319. wlan_cfg_get_dp_soc_tx_device_limit(soc->wlan_cfg_ctx);
  320. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  321. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  322. CDP_CFG_MAX_PEER_ID);
  323. if (ret != -EINVAL)
  324. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  325. ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  326. CDP_CFG_CCE_DISABLE);
  327. if (ret == 1)
  328. soc->cce_disable = true;
  329. }
  330. /* setup the global rx defrag waitlist */
  331. TAILQ_INIT(&soc->rx.defrag.waitlist);
  332. soc->rx.defrag.timeout_ms =
  333. wlan_cfg_get_rx_defrag_min_timeout(soc->wlan_cfg_ctx);
  334. soc->rx.defrag.next_flush_ms = 0;
  335. soc->rx.flags.defrag_timeout_check =
  336. wlan_cfg_get_defrag_timeout_check(soc->wlan_cfg_ctx);
  337. qdf_spinlock_create(&soc->rx.defrag.defrag_lock);
  338. dp_monitor_soc_init(soc);
  339. qdf_atomic_set(&soc->cmn_init_done, 1);
  340. qdf_nbuf_queue_init(&soc->htt_stats.msg);
  341. qdf_spinlock_create(&soc->ast_lock);
  342. dp_peer_mec_spinlock_create(soc);
  343. qdf_nbuf_queue_init(&soc->invalid_buf_queue);
  344. TAILQ_INIT(&soc->inactive_peer_list);
  345. qdf_spinlock_create(&soc->inactive_peer_list_lock);
  346. TAILQ_INIT(&soc->inactive_vdev_list);
  347. qdf_spinlock_create(&soc->inactive_vdev_list_lock);
  348. qdf_spinlock_create(&soc->htt_stats.lock);
  349. /* initialize work queue for stats processing */
  350. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  351. /*Register RX offload flush handlers*/
  352. hif_offld_flush_cb_register(soc->hif_handle, dp_rx_data_flush);
  353. dp_info("Mem stats: DMA = %u HEAP = %u SKB = %u",
  354. qdf_dma_mem_stats_read(),
  355. qdf_heap_mem_stats_read(),
  356. qdf_skb_total_mem_stats_read());
  357. soc->vdev_stats_id_map = 0;
  358. return soc;
  359. fail5:
  360. htt_soc_htc_dealloc(soc->htt_handle);
  361. fail4:
  362. dp_soc_srng_deinit(soc);
  363. fail3:
  364. htt_htc_pkt_pool_free(htt_soc);
  365. fail2:
  366. htt_soc_detach(htt_soc);
  367. fail1:
  368. return NULL;
  369. }
  370. /**
  371. * dp_pdev_fill_tx_endpoint_info_rh() - Prefill fixed TX endpoint information
  372. * that is used during packet transmit
  373. * @pdev: Handle to DP pdev struct
  374. *
  375. * Return: QDF_STATUS_SUCCESS/QDF_STATUS_E_NOENT
  376. */
  377. static QDF_STATUS dp_pdev_fill_tx_endpoint_info_rh(struct dp_pdev *pdev)
  378. {
  379. struct dp_pdev_rh *rh_pdev = dp_get_rh_pdev_from_dp_pdev(pdev);
  380. struct dp_soc_rh *rh_soc = dp_get_rh_soc_from_dp_soc(pdev->soc);
  381. struct dp_tx_ep_info_rh *tx_ep_info = &rh_pdev->tx_ep_info;
  382. struct hif_opaque_softc *hif_handle = pdev->soc->hif_handle;
  383. int ul_is_polled, dl_is_polled;
  384. uint8_t ul_pipe, dl_pipe;
  385. int status;
  386. status = hif_map_service_to_pipe(hif_handle, HTT_DATA2_MSG_SVC,
  387. &ul_pipe, &dl_pipe,
  388. &ul_is_polled, &dl_is_polled);
  389. if (status) {
  390. hif_err("Failed to map tx pipe: %d", status);
  391. return QDF_STATUS_E_NOENT;
  392. }
  393. tx_ep_info->ce_tx_hdl = hif_get_ce_handle(hif_handle, ul_pipe);
  394. tx_ep_info->download_len = HAL_TX_DESC_LEN_BYTES +
  395. sizeof(struct tlv_32_hdr) +
  396. DP_RH_TX_HDR_SIZE_OUTER_HDR_MAX +
  397. DP_RH_TX_HDR_SIZE_802_1Q +
  398. DP_RH_TX_HDR_SIZE_LLC_SNAP +
  399. DP_RH_TX_HDR_SIZE_IP;
  400. tx_ep_info->tx_endpoint = rh_soc->tx_endpoint;
  401. return QDF_STATUS_SUCCESS;
  402. }
  403. static QDF_STATUS dp_pdev_attach_rh(struct dp_pdev *pdev,
  404. struct cdp_pdev_attach_params *params)
  405. {
  406. return dp_pdev_fill_tx_endpoint_info_rh(pdev);
  407. }
  408. static QDF_STATUS dp_pdev_detach_rh(struct dp_pdev *pdev)
  409. {
  410. return QDF_STATUS_SUCCESS;
  411. }
  412. static QDF_STATUS dp_vdev_attach_rh(struct dp_soc *soc, struct dp_vdev *vdev)
  413. {
  414. return QDF_STATUS_SUCCESS;
  415. }
  416. static QDF_STATUS dp_vdev_detach_rh(struct dp_soc *soc, struct dp_vdev *vdev)
  417. {
  418. return QDF_STATUS_SUCCESS;
  419. }
  420. qdf_size_t dp_get_soc_context_size_rh(void)
  421. {
  422. return sizeof(struct dp_soc_rh);
  423. }
  424. #ifdef NO_RX_PKT_HDR_TLV
  425. /**
  426. * dp_rxdma_ring_sel_cfg_rh() - Setup RXDMA ring config
  427. * @soc: Common DP soc handle
  428. *
  429. * Return: QDF_STATUS
  430. */
  431. static QDF_STATUS
  432. dp_rxdma_ring_sel_cfg_rh(struct dp_soc *soc)
  433. {
  434. int i;
  435. int mac_id;
  436. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  437. struct dp_srng *rx_mac_srng;
  438. QDF_STATUS status = QDF_STATUS_SUCCESS;
  439. htt_tlv_filter.mpdu_start = 1;
  440. htt_tlv_filter.msdu_start = 1;
  441. htt_tlv_filter.mpdu_end = 1;
  442. htt_tlv_filter.msdu_end = 1;
  443. htt_tlv_filter.attention = 1;
  444. htt_tlv_filter.packet = 1;
  445. htt_tlv_filter.packet_header = 0;
  446. htt_tlv_filter.ppdu_start = 0;
  447. htt_tlv_filter.ppdu_end = 0;
  448. htt_tlv_filter.ppdu_end_user_stats = 0;
  449. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  450. htt_tlv_filter.ppdu_end_status_done = 0;
  451. htt_tlv_filter.enable_fp = 1;
  452. htt_tlv_filter.enable_md = 0;
  453. htt_tlv_filter.enable_md = 0;
  454. htt_tlv_filter.enable_mo = 0;
  455. htt_tlv_filter.fp_mgmt_filter = 0;
  456. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_BA_REQ;
  457. htt_tlv_filter.fp_data_filter = (FILTER_DATA_UCAST |
  458. FILTER_DATA_MCAST |
  459. FILTER_DATA_DATA);
  460. htt_tlv_filter.mo_mgmt_filter = 0;
  461. htt_tlv_filter.mo_ctrl_filter = 0;
  462. htt_tlv_filter.mo_data_filter = 0;
  463. htt_tlv_filter.md_data_filter = 0;
  464. htt_tlv_filter.offset_valid = true;
  465. htt_tlv_filter.rx_packet_offset = soc->rx_pkt_tlv_size;
  466. /*Not subscribing rx_pkt_header*/
  467. htt_tlv_filter.rx_header_offset = 0;
  468. htt_tlv_filter.rx_mpdu_start_offset =
  469. hal_rx_mpdu_start_offset_get(soc->hal_soc);
  470. htt_tlv_filter.rx_mpdu_end_offset =
  471. hal_rx_mpdu_end_offset_get(soc->hal_soc);
  472. htt_tlv_filter.rx_msdu_start_offset =
  473. hal_rx_msdu_start_offset_get(soc->hal_soc);
  474. htt_tlv_filter.rx_msdu_end_offset =
  475. hal_rx_msdu_end_offset_get(soc->hal_soc);
  476. htt_tlv_filter.rx_attn_offset =
  477. hal_rx_attn_offset_get(soc->hal_soc);
  478. for (i = 0; i < MAX_PDEV_CNT; i++) {
  479. struct dp_pdev *pdev = soc->pdev_list[i];
  480. if (!pdev)
  481. continue;
  482. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  483. int mac_for_pdev =
  484. dp_get_mac_id_for_pdev(mac_id, pdev->pdev_id);
  485. /*
  486. * Obtain lmac id from pdev to access the LMAC ring
  487. * in soc context
  488. */
  489. int lmac_id =
  490. dp_get_lmac_id_for_pdev_id(soc, mac_id,
  491. pdev->pdev_id);
  492. rx_mac_srng = dp_get_rxdma_ring(pdev, lmac_id);
  493. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  494. rx_mac_srng->hal_srng,
  495. RXDMA_BUF, RX_DATA_BUFFER_SIZE,
  496. &htt_tlv_filter);
  497. }
  498. }
  499. if (QDF_IS_STATUS_SUCCESS(status))
  500. status = dp_htt_h2t_rx_ring_rfs_cfg(soc->htt_handle);
  501. return status;
  502. }
  503. #else
  504. static QDF_STATUS
  505. dp_rxdma_ring_sel_cfg_rh(struct dp_soc *soc)
  506. {
  507. int i;
  508. int mac_id;
  509. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  510. struct dp_srng *rx_mac_srng;
  511. QDF_STATUS status = QDF_STATUS_SUCCESS;
  512. htt_tlv_filter.mpdu_start = 1;
  513. htt_tlv_filter.msdu_start = 1;
  514. htt_tlv_filter.mpdu_end = 1;
  515. htt_tlv_filter.msdu_end = 1;
  516. htt_tlv_filter.attention = 1;
  517. htt_tlv_filter.packet = 1;
  518. htt_tlv_filter.packet_header = 1;
  519. htt_tlv_filter.ppdu_start = 0;
  520. htt_tlv_filter.ppdu_end = 0;
  521. htt_tlv_filter.ppdu_end_user_stats = 0;
  522. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  523. htt_tlv_filter.ppdu_end_status_done = 0;
  524. htt_tlv_filter.enable_fp = 1;
  525. htt_tlv_filter.enable_md = 0;
  526. htt_tlv_filter.enable_md = 0;
  527. htt_tlv_filter.enable_mo = 0;
  528. htt_tlv_filter.fp_mgmt_filter = 0;
  529. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_BA_REQ;
  530. htt_tlv_filter.fp_data_filter = (FILTER_DATA_UCAST |
  531. FILTER_DATA_MCAST |
  532. FILTER_DATA_DATA);
  533. htt_tlv_filter.mo_mgmt_filter = 0;
  534. htt_tlv_filter.mo_ctrl_filter = 0;
  535. htt_tlv_filter.mo_data_filter = 0;
  536. htt_tlv_filter.md_data_filter = 0;
  537. htt_tlv_filter.offset_valid = true;
  538. htt_tlv_filter.rx_packet_offset = soc->rx_pkt_tlv_size;
  539. htt_tlv_filter.rx_header_offset =
  540. hal_rx_pkt_tlv_offset_get(soc->hal_soc);
  541. htt_tlv_filter.rx_mpdu_start_offset =
  542. hal_rx_mpdu_start_offset_get(soc->hal_soc);
  543. htt_tlv_filter.rx_mpdu_end_offset =
  544. hal_rx_mpdu_end_offset_get(soc->hal_soc);
  545. htt_tlv_filter.rx_msdu_start_offset =
  546. hal_rx_msdu_start_offset_get(soc->hal_soc);
  547. htt_tlv_filter.rx_msdu_end_offset =
  548. hal_rx_msdu_end_offset_get(soc->hal_soc);
  549. htt_tlv_filter.rx_attn_offset =
  550. hal_rx_attn_offset_get(soc->hal_soc);
  551. for (i = 0; i < MAX_PDEV_CNT; i++) {
  552. struct dp_pdev *pdev = soc->pdev_list[i];
  553. if (!pdev)
  554. continue;
  555. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  556. int mac_for_pdev =
  557. dp_get_mac_id_for_pdev(mac_id, pdev->pdev_id);
  558. /*
  559. * Obtain lmac id from pdev to access the LMAC ring
  560. * in soc context
  561. */
  562. int lmac_id =
  563. dp_get_lmac_id_for_pdev_id(soc, mac_id,
  564. pdev->pdev_id);
  565. rx_mac_srng = dp_get_rxdma_ring(pdev, lmac_id);
  566. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  567. rx_mac_srng->hal_srng,
  568. RXDMA_BUF, RX_DATA_BUFFER_SIZE,
  569. &htt_tlv_filter);
  570. }
  571. }
  572. if (QDF_IS_STATUS_SUCCESS(status))
  573. status = dp_htt_h2t_rx_ring_rfs_cfg(soc->htt_handle);
  574. return status;
  575. }
  576. #endif
  577. static void dp_soc_srng_deinit_rh(struct dp_soc *soc)
  578. {
  579. }
  580. static void dp_soc_srng_free_rh(struct dp_soc *soc)
  581. {
  582. }
  583. static QDF_STATUS dp_soc_srng_alloc_rh(struct dp_soc *soc)
  584. {
  585. return QDF_STATUS_SUCCESS;
  586. }
  587. static QDF_STATUS dp_soc_srng_init_rh(struct dp_soc *soc)
  588. {
  589. return QDF_STATUS_SUCCESS;
  590. }
  591. static void dp_tx_implicit_rbm_set_rh(struct dp_soc *soc,
  592. uint8_t tx_ring_id,
  593. uint8_t bm_id)
  594. {
  595. }
  596. static QDF_STATUS dp_txrx_set_vdev_param_rh(struct dp_soc *soc,
  597. struct dp_vdev *vdev,
  598. enum cdp_vdev_param_type param,
  599. cdp_config_param_type val)
  600. {
  601. return QDF_STATUS_SUCCESS;
  602. }
  603. static void dp_get_rx_hash_key_rh(struct dp_soc *soc,
  604. struct cdp_lro_hash_config *lro_hash)
  605. {
  606. dp_get_rx_hash_key_bytes(lro_hash);
  607. }
  608. #if defined(DP_POWER_SAVE) || defined(FEATURE_RUNTIME_PM)
  609. static void dp_update_ring_hptp_rh(struct dp_soc *soc, bool force_flush)
  610. {
  611. struct dp_pdev_rh *rh_pdev =
  612. dp_get_rh_pdev_from_dp_pdev(soc->pdev_list[0]);
  613. struct dp_tx_ep_info_rh *tx_ep_info = &rh_pdev->tx_ep_info;
  614. ce_flush_tx_ring_write_idx(tx_ep_info->ce_tx_hdl, force_flush);
  615. }
  616. #endif
  617. void dp_initialize_arch_ops_rh(struct dp_arch_ops *arch_ops)
  618. {
  619. arch_ops->tx_hw_enqueue = dp_tx_hw_enqueue_rh;
  620. arch_ops->tx_comp_get_params_from_hal_desc =
  621. dp_tx_comp_get_params_from_hal_desc_rh;
  622. arch_ops->dp_tx_process_htt_completion =
  623. dp_tx_process_htt_completion_rh;
  624. arch_ops->dp_wbm_get_rx_desc_from_hal_desc =
  625. dp_wbm_get_rx_desc_from_hal_desc_rh;
  626. arch_ops->dp_tx_desc_pool_alloc = dp_tx_desc_pool_alloc_rh;
  627. arch_ops->dp_tx_desc_pool_free = dp_tx_desc_pool_free_rh;
  628. arch_ops->dp_tx_desc_pool_init = dp_tx_desc_pool_init_rh;
  629. arch_ops->dp_tx_desc_pool_deinit = dp_tx_desc_pool_deinit_rh;
  630. arch_ops->dp_rx_desc_pool_init = dp_rx_desc_pool_init_rh;
  631. arch_ops->dp_rx_desc_pool_deinit = dp_rx_desc_pool_deinit_rh;
  632. arch_ops->dp_tx_compute_hw_delay = dp_tx_compute_tx_delay_rh;
  633. arch_ops->txrx_get_context_size = dp_get_context_size_rh;
  634. arch_ops->txrx_get_mon_context_size = dp_mon_get_context_size_rh;
  635. arch_ops->txrx_soc_attach = dp_soc_attach_rh;
  636. arch_ops->txrx_soc_detach = dp_soc_detach_rh;
  637. arch_ops->txrx_soc_init = dp_soc_init_rh;
  638. arch_ops->txrx_soc_deinit = dp_soc_deinit_rh;
  639. arch_ops->txrx_soc_srng_alloc = dp_soc_srng_alloc_rh;
  640. arch_ops->txrx_soc_srng_init = dp_soc_srng_init_rh;
  641. arch_ops->txrx_soc_srng_deinit = dp_soc_srng_deinit_rh;
  642. arch_ops->txrx_soc_srng_free = dp_soc_srng_free_rh;
  643. arch_ops->txrx_pdev_attach = dp_pdev_attach_rh;
  644. arch_ops->txrx_pdev_detach = dp_pdev_detach_rh;
  645. arch_ops->txrx_vdev_attach = dp_vdev_attach_rh;
  646. arch_ops->txrx_vdev_detach = dp_vdev_detach_rh;
  647. arch_ops->txrx_peer_map_attach = dp_peer_map_attach_rh;
  648. arch_ops->txrx_peer_map_detach = dp_peer_map_detach_rh;
  649. arch_ops->get_rx_hash_key = dp_get_rx_hash_key_rh;
  650. arch_ops->dp_rx_desc_cookie_2_va =
  651. dp_rx_desc_cookie_2_va_rh;
  652. arch_ops->dp_rx_intrabss_mcast_handler =
  653. dp_rx_intrabss_handle_nawds_rh;
  654. arch_ops->dp_rx_word_mask_subscribe = dp_rx_word_mask_subscribe_rh;
  655. arch_ops->dp_rxdma_ring_sel_cfg = dp_rxdma_ring_sel_cfg_rh;
  656. arch_ops->dp_rx_peer_metadata_peer_id_get =
  657. dp_rx_peer_metadata_peer_id_get_rh;
  658. arch_ops->soc_cfg_attach = dp_soc_cfg_attach_rh;
  659. arch_ops->tx_implicit_rbm_set = dp_tx_implicit_rbm_set_rh;
  660. arch_ops->txrx_set_vdev_param = dp_txrx_set_vdev_param_rh;
  661. arch_ops->txrx_print_peer_stats = dp_print_peer_txrx_stats_rh;
  662. arch_ops->dp_peer_rx_reorder_queue_setup =
  663. dp_peer_rx_reorder_queue_setup_rh;
  664. arch_ops->peer_get_reo_hash = dp_peer_get_reo_hash_rh;
  665. arch_ops->reo_remap_config = dp_reo_remap_config_rh;
  666. arch_ops->txrx_peer_setup = dp_peer_setup_rh;
  667. arch_ops->txrx_srng_init = dp_srng_init_rh;
  668. #if defined(DP_POWER_SAVE) || defined(FEATURE_RUNTIME_PM)
  669. arch_ops->dp_update_ring_hptp = dp_update_ring_hptp_rh;
  670. #endif
  671. arch_ops->dp_flush_tx_ring = dp_flush_tx_ring_rh;
  672. }