kona.c 161 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/clk.h>
  6. #include <linux/delay.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/slab.h>
  11. #include <linux/io.h>
  12. #include <linux/module.h>
  13. #include <linux/input.h>
  14. #include <linux/of_device.h>
  15. #include <linux/soc/qcom/fsa4480-i2c.h>
  16. #include <sound/core.h>
  17. #include <sound/soc.h>
  18. #include <sound/soc-dapm.h>
  19. #include <sound/pcm.h>
  20. #include <sound/pcm_params.h>
  21. #include <sound/info.h>
  22. #include <soc/snd_event.h>
  23. #include <dsp/audio_notifier.h>
  24. #include <soc/swr-common.h>
  25. #include <dsp/q6afe-v2.h>
  26. #include <dsp/q6core.h>
  27. #include "device_event.h"
  28. #include "msm-pcm-routing-v2.h"
  29. #include "asoc/msm-cdc-pinctrl.h"
  30. #include "asoc/wcd-mbhc-v2.h"
  31. #include "codecs/wcd938x/wcd938x-mbhc.h"
  32. #include "codecs/wsa881x.h"
  33. #include "codecs/wcd938x/wcd938x.h"
  34. #include "codecs/bolero/bolero-cdc.h"
  35. #include <dt-bindings/sound/audio-codec-port-types.h>
  36. #include "codecs/bolero/wsa-macro.h"
  37. #include "sm8250-port-config.h"
  38. #define DRV_NAME "kona-asoc-snd"
  39. #define __CHIPSET__ "KONA "
  40. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  41. #define SAMPLING_RATE_8KHZ 8000
  42. #define SAMPLING_RATE_11P025KHZ 11025
  43. #define SAMPLING_RATE_16KHZ 16000
  44. #define SAMPLING_RATE_22P05KHZ 22050
  45. #define SAMPLING_RATE_32KHZ 32000
  46. #define SAMPLING_RATE_44P1KHZ 44100
  47. #define SAMPLING_RATE_48KHZ 48000
  48. #define SAMPLING_RATE_88P2KHZ 88200
  49. #define SAMPLING_RATE_96KHZ 96000
  50. #define SAMPLING_RATE_176P4KHZ 176400
  51. #define SAMPLING_RATE_192KHZ 192000
  52. #define SAMPLING_RATE_352P8KHZ 352800
  53. #define SAMPLING_RATE_384KHZ 384000
  54. #define WCD9XXX_MBHC_DEF_RLOADS 5
  55. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  56. #define CODEC_EXT_CLK_RATE 9600000
  57. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  58. #define DEV_NAME_STR_LEN 32
  59. #define WCD_MBHC_HS_V_MAX 1600
  60. #define TDM_CHANNEL_MAX 8
  61. #define DEV_NAME_STR_LEN 32
  62. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  63. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  64. #define WSA8810_NAME_1 "wsa881x.20170211"
  65. #define WSA8810_NAME_2 "wsa881x.20170212"
  66. enum {
  67. TDM_0 = 0,
  68. TDM_1,
  69. TDM_2,
  70. TDM_3,
  71. TDM_4,
  72. TDM_5,
  73. TDM_6,
  74. TDM_7,
  75. TDM_PORT_MAX,
  76. };
  77. enum {
  78. TDM_PRI = 0,
  79. TDM_SEC,
  80. TDM_TERT,
  81. TDM_INTERFACE_MAX,
  82. };
  83. enum {
  84. PRIM_AUX_PCM = 0,
  85. SEC_AUX_PCM,
  86. TERT_AUX_PCM,
  87. AUX_PCM_MAX,
  88. };
  89. enum {
  90. PRIM_MI2S = 0,
  91. SEC_MI2S,
  92. TERT_MI2S,
  93. MI2S_MAX,
  94. };
  95. enum {
  96. WSA_CDC_DMA_RX_0 = 0,
  97. WSA_CDC_DMA_RX_1,
  98. RX_CDC_DMA_RX_0,
  99. RX_CDC_DMA_RX_1,
  100. RX_CDC_DMA_RX_2,
  101. RX_CDC_DMA_RX_3,
  102. RX_CDC_DMA_RX_5,
  103. CDC_DMA_RX_MAX,
  104. };
  105. enum {
  106. WSA_CDC_DMA_TX_0 = 0,
  107. WSA_CDC_DMA_TX_1,
  108. WSA_CDC_DMA_TX_2,
  109. TX_CDC_DMA_TX_0,
  110. TX_CDC_DMA_TX_3,
  111. TX_CDC_DMA_TX_4,
  112. VA_CDC_DMA_TX_0,
  113. VA_CDC_DMA_TX_1,
  114. VA_CDC_DMA_TX_2,
  115. CDC_DMA_TX_MAX,
  116. };
  117. struct msm_asoc_mach_data {
  118. struct snd_info_entry *codec_root;
  119. int usbc_en2_gpio; /* used by gpio driver API */
  120. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  121. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  122. struct device_node *dmic45_gpio_p; /* used by pinctrl API */
  123. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  124. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  125. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  126. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  127. bool is_afe_config_done;
  128. struct device_node *fsa_handle;
  129. };
  130. struct tdm_port {
  131. u32 mode;
  132. u32 channel;
  133. };
  134. struct msm_wsa881x_dev_info {
  135. struct device_node *of_node;
  136. u32 index;
  137. };
  138. struct aux_codec_dev_info {
  139. struct device_node *of_node;
  140. u32 index;
  141. };
  142. struct dev_config {
  143. u32 sample_rate;
  144. u32 bit_format;
  145. u32 channels;
  146. };
  147. static struct dev_config usb_rx_cfg = {
  148. .sample_rate = SAMPLING_RATE_48KHZ,
  149. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  150. .channels = 2,
  151. };
  152. static struct dev_config usb_tx_cfg = {
  153. .sample_rate = SAMPLING_RATE_48KHZ,
  154. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  155. .channels = 1,
  156. };
  157. static struct dev_config proxy_rx_cfg = {
  158. .sample_rate = SAMPLING_RATE_48KHZ,
  159. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  160. .channels = 2,
  161. };
  162. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  163. {
  164. AFE_API_VERSION_I2S_CONFIG,
  165. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  166. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  167. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  168. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  169. 0,
  170. },
  171. {
  172. AFE_API_VERSION_I2S_CONFIG,
  173. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  174. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  175. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  176. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  177. 0,
  178. },
  179. {
  180. AFE_API_VERSION_I2S_CONFIG,
  181. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  182. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  183. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  184. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  185. 0,
  186. },
  187. };
  188. struct mi2s_conf {
  189. struct mutex lock;
  190. u32 ref_cnt;
  191. u32 msm_is_mi2s_master;
  192. };
  193. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  194. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  195. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  196. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  197. };
  198. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  199. /* Default configuration of TDM channels */
  200. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  201. { /* PRI TDM */
  202. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  203. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  204. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  205. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  206. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  207. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  208. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  209. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  210. },
  211. { /* SEC TDM */
  212. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  213. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  214. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  215. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  216. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  217. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  218. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  219. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  220. },
  221. { /* TERT TDM */
  222. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  223. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  224. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  225. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  226. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  227. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  228. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  229. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  230. },
  231. };
  232. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  233. { /* PRI TDM */
  234. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  235. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  236. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  237. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  240. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  242. },
  243. { /* SEC TDM */
  244. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  246. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  247. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  249. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  250. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  252. },
  253. { /* TERT TDM */
  254. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  255. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  256. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  257. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  258. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  259. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  260. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  261. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  262. },
  263. };
  264. /* Default configuration of AUX PCM channels */
  265. static struct dev_config aux_pcm_rx_cfg[] = {
  266. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  267. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  268. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  269. };
  270. static struct dev_config aux_pcm_tx_cfg[] = {
  271. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  272. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  273. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  274. };
  275. /* Default configuration of MI2S channels */
  276. static struct dev_config mi2s_rx_cfg[] = {
  277. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  278. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  279. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  280. };
  281. static struct dev_config mi2s_tx_cfg[] = {
  282. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  283. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  284. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  285. };
  286. /* Default configuration of Codec DMA Interface RX */
  287. static struct dev_config cdc_dma_rx_cfg[] = {
  288. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  289. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  290. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  291. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  292. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  293. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  294. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  295. };
  296. /* Default configuration of Codec DMA Interface TX */
  297. static struct dev_config cdc_dma_tx_cfg[] = {
  298. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  299. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  300. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  301. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  302. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  303. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  304. [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  305. [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  306. [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  307. };
  308. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  309. "S32_LE"};
  310. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  311. "Six", "Seven", "Eight"};
  312. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  313. "KHZ_16", "KHZ_22P05",
  314. "KHZ_32", "KHZ_44P1", "KHZ_48",
  315. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  316. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  317. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  318. "Five", "Six", "Seven",
  319. "Eight"};
  320. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  321. "KHZ_48", "KHZ_176P4",
  322. "KHZ_352P8"};
  323. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  324. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  325. "Five", "Six", "Seven", "Eight"};
  326. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  327. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  328. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  329. "KHZ_48", "KHZ_96", "KHZ_192"};
  330. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  331. "Five", "Six", "Seven",
  332. "Eight"};
  333. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  334. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  335. "Five", "Six", "Seven",
  336. "Eight"};
  337. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  338. "KHZ_16", "KHZ_22P05",
  339. "KHZ_32", "KHZ_44P1", "KHZ_48",
  340. "KHZ_88P2", "KHZ_96",
  341. "KHZ_176P4", "KHZ_192",
  342. "KHZ_352P8", "KHZ_384"};
  343. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  344. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  345. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  346. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  347. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  348. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  349. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  350. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  351. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  352. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  353. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  354. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  355. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  356. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  357. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  358. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  359. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  360. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  361. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  362. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  363. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  364. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  365. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  366. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  367. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  368. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  369. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  370. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  371. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  372. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  373. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  374. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  375. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  376. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  377. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  378. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  379. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  380. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  381. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  382. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  383. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  384. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  385. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  386. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  387. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  388. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  389. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  390. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  391. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  392. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  393. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  394. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  395. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  396. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  397. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  398. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  399. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  400. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  401. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  402. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  403. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  404. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  405. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  406. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
  407. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
  408. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
  409. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  410. cdc_dma_sample_rate_text);
  411. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  412. cdc_dma_sample_rate_text);
  413. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  414. cdc_dma_sample_rate_text);
  415. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  416. cdc_dma_sample_rate_text);
  417. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  418. cdc_dma_sample_rate_text);
  419. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  420. cdc_dma_sample_rate_text);
  421. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  422. cdc_dma_sample_rate_text);
  423. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  424. cdc_dma_sample_rate_text);
  425. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  426. cdc_dma_sample_rate_text);
  427. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  428. cdc_dma_sample_rate_text);
  429. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  430. cdc_dma_sample_rate_text);
  431. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  432. cdc_dma_sample_rate_text);
  433. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  434. cdc_dma_sample_rate_text);
  435. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
  436. cdc_dma_sample_rate_text);
  437. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
  438. cdc_dma_sample_rate_text);
  439. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
  440. cdc_dma_sample_rate_text);
  441. static bool is_initial_boot;
  442. static bool codec_reg_done;
  443. static struct snd_soc_aux_dev *msm_aux_dev;
  444. static struct snd_soc_codec_conf *msm_codec_conf;
  445. static struct snd_soc_card snd_soc_card_kona_msm;
  446. static int dmic_0_1_gpio_cnt;
  447. static int dmic_2_3_gpio_cnt;
  448. static int dmic_4_5_gpio_cnt;
  449. static int msm_vi_feed_tx_ch = 2;
  450. static void *def_wcd_mbhc_cal(void);
  451. /*
  452. * Need to report LINEIN
  453. * if R/L channel impedance is larger than 5K ohm
  454. */
  455. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  456. .read_fw_bin = false,
  457. .calibration = NULL,
  458. .detect_extn_cable = true,
  459. .mono_stero_detection = false,
  460. .swap_gnd_mic = NULL,
  461. .hs_ext_micbias = true,
  462. .key_code[0] = KEY_MEDIA,
  463. .key_code[1] = KEY_VOICECOMMAND,
  464. .key_code[2] = KEY_VOLUMEUP,
  465. .key_code[3] = KEY_VOLUMEDOWN,
  466. .key_code[4] = 0,
  467. .key_code[5] = 0,
  468. .key_code[6] = 0,
  469. .key_code[7] = 0,
  470. .linein_th = 5000,
  471. .moisture_en = true,
  472. .mbhc_micbias = MIC_BIAS_2,
  473. .anc_micbias = MIC_BIAS_2,
  474. .enable_anc_mic_detect = false,
  475. };
  476. static inline int param_is_mask(int p)
  477. {
  478. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  479. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  480. }
  481. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  482. int n)
  483. {
  484. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  485. }
  486. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  487. unsigned int bit)
  488. {
  489. if (bit >= SNDRV_MASK_MAX)
  490. return;
  491. if (param_is_mask(n)) {
  492. struct snd_mask *m = param_to_mask(p, n);
  493. m->bits[0] = 0;
  494. m->bits[1] = 0;
  495. m->bits[bit >> 5] |= (1 << (bit & 31));
  496. }
  497. }
  498. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  499. struct snd_ctl_elem_value *ucontrol)
  500. {
  501. int sample_rate_val = 0;
  502. switch (usb_rx_cfg.sample_rate) {
  503. case SAMPLING_RATE_384KHZ:
  504. sample_rate_val = 12;
  505. break;
  506. case SAMPLING_RATE_352P8KHZ:
  507. sample_rate_val = 11;
  508. break;
  509. case SAMPLING_RATE_192KHZ:
  510. sample_rate_val = 10;
  511. break;
  512. case SAMPLING_RATE_176P4KHZ:
  513. sample_rate_val = 9;
  514. break;
  515. case SAMPLING_RATE_96KHZ:
  516. sample_rate_val = 8;
  517. break;
  518. case SAMPLING_RATE_88P2KHZ:
  519. sample_rate_val = 7;
  520. break;
  521. case SAMPLING_RATE_48KHZ:
  522. sample_rate_val = 6;
  523. break;
  524. case SAMPLING_RATE_44P1KHZ:
  525. sample_rate_val = 5;
  526. break;
  527. case SAMPLING_RATE_32KHZ:
  528. sample_rate_val = 4;
  529. break;
  530. case SAMPLING_RATE_22P05KHZ:
  531. sample_rate_val = 3;
  532. break;
  533. case SAMPLING_RATE_16KHZ:
  534. sample_rate_val = 2;
  535. break;
  536. case SAMPLING_RATE_11P025KHZ:
  537. sample_rate_val = 1;
  538. break;
  539. case SAMPLING_RATE_8KHZ:
  540. default:
  541. sample_rate_val = 0;
  542. break;
  543. }
  544. ucontrol->value.integer.value[0] = sample_rate_val;
  545. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  546. usb_rx_cfg.sample_rate);
  547. return 0;
  548. }
  549. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  550. struct snd_ctl_elem_value *ucontrol)
  551. {
  552. switch (ucontrol->value.integer.value[0]) {
  553. case 12:
  554. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  555. break;
  556. case 11:
  557. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  558. break;
  559. case 10:
  560. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  561. break;
  562. case 9:
  563. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  564. break;
  565. case 8:
  566. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  567. break;
  568. case 7:
  569. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  570. break;
  571. case 6:
  572. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  573. break;
  574. case 5:
  575. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  576. break;
  577. case 4:
  578. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  579. break;
  580. case 3:
  581. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  582. break;
  583. case 2:
  584. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  585. break;
  586. case 1:
  587. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  588. break;
  589. case 0:
  590. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  591. break;
  592. default:
  593. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  594. break;
  595. }
  596. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  597. __func__, ucontrol->value.integer.value[0],
  598. usb_rx_cfg.sample_rate);
  599. return 0;
  600. }
  601. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  602. struct snd_ctl_elem_value *ucontrol)
  603. {
  604. int sample_rate_val = 0;
  605. switch (usb_tx_cfg.sample_rate) {
  606. case SAMPLING_RATE_384KHZ:
  607. sample_rate_val = 12;
  608. break;
  609. case SAMPLING_RATE_352P8KHZ:
  610. sample_rate_val = 11;
  611. break;
  612. case SAMPLING_RATE_192KHZ:
  613. sample_rate_val = 10;
  614. break;
  615. case SAMPLING_RATE_176P4KHZ:
  616. sample_rate_val = 9;
  617. break;
  618. case SAMPLING_RATE_96KHZ:
  619. sample_rate_val = 8;
  620. break;
  621. case SAMPLING_RATE_88P2KHZ:
  622. sample_rate_val = 7;
  623. break;
  624. case SAMPLING_RATE_48KHZ:
  625. sample_rate_val = 6;
  626. break;
  627. case SAMPLING_RATE_44P1KHZ:
  628. sample_rate_val = 5;
  629. break;
  630. case SAMPLING_RATE_32KHZ:
  631. sample_rate_val = 4;
  632. break;
  633. case SAMPLING_RATE_22P05KHZ:
  634. sample_rate_val = 3;
  635. break;
  636. case SAMPLING_RATE_16KHZ:
  637. sample_rate_val = 2;
  638. break;
  639. case SAMPLING_RATE_11P025KHZ:
  640. sample_rate_val = 1;
  641. break;
  642. case SAMPLING_RATE_8KHZ:
  643. sample_rate_val = 0;
  644. break;
  645. default:
  646. sample_rate_val = 6;
  647. break;
  648. }
  649. ucontrol->value.integer.value[0] = sample_rate_val;
  650. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  651. usb_tx_cfg.sample_rate);
  652. return 0;
  653. }
  654. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  655. struct snd_ctl_elem_value *ucontrol)
  656. {
  657. switch (ucontrol->value.integer.value[0]) {
  658. case 12:
  659. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  660. break;
  661. case 11:
  662. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  663. break;
  664. case 10:
  665. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  666. break;
  667. case 9:
  668. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  669. break;
  670. case 8:
  671. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  672. break;
  673. case 7:
  674. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  675. break;
  676. case 6:
  677. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  678. break;
  679. case 5:
  680. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  681. break;
  682. case 4:
  683. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  684. break;
  685. case 3:
  686. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  687. break;
  688. case 2:
  689. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  690. break;
  691. case 1:
  692. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  693. break;
  694. case 0:
  695. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  696. break;
  697. default:
  698. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  699. break;
  700. }
  701. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  702. __func__, ucontrol->value.integer.value[0],
  703. usb_tx_cfg.sample_rate);
  704. return 0;
  705. }
  706. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  707. struct snd_ctl_elem_value *ucontrol)
  708. {
  709. switch (usb_rx_cfg.bit_format) {
  710. case SNDRV_PCM_FORMAT_S32_LE:
  711. ucontrol->value.integer.value[0] = 3;
  712. break;
  713. case SNDRV_PCM_FORMAT_S24_3LE:
  714. ucontrol->value.integer.value[0] = 2;
  715. break;
  716. case SNDRV_PCM_FORMAT_S24_LE:
  717. ucontrol->value.integer.value[0] = 1;
  718. break;
  719. case SNDRV_PCM_FORMAT_S16_LE:
  720. default:
  721. ucontrol->value.integer.value[0] = 0;
  722. break;
  723. }
  724. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  725. __func__, usb_rx_cfg.bit_format,
  726. ucontrol->value.integer.value[0]);
  727. return 0;
  728. }
  729. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  730. struct snd_ctl_elem_value *ucontrol)
  731. {
  732. int rc = 0;
  733. switch (ucontrol->value.integer.value[0]) {
  734. case 3:
  735. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  736. break;
  737. case 2:
  738. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  739. break;
  740. case 1:
  741. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  742. break;
  743. case 0:
  744. default:
  745. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  746. break;
  747. }
  748. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  749. __func__, usb_rx_cfg.bit_format,
  750. ucontrol->value.integer.value[0]);
  751. return rc;
  752. }
  753. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  754. struct snd_ctl_elem_value *ucontrol)
  755. {
  756. switch (usb_tx_cfg.bit_format) {
  757. case SNDRV_PCM_FORMAT_S32_LE:
  758. ucontrol->value.integer.value[0] = 3;
  759. break;
  760. case SNDRV_PCM_FORMAT_S24_3LE:
  761. ucontrol->value.integer.value[0] = 2;
  762. break;
  763. case SNDRV_PCM_FORMAT_S24_LE:
  764. ucontrol->value.integer.value[0] = 1;
  765. break;
  766. case SNDRV_PCM_FORMAT_S16_LE:
  767. default:
  768. ucontrol->value.integer.value[0] = 0;
  769. break;
  770. }
  771. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  772. __func__, usb_tx_cfg.bit_format,
  773. ucontrol->value.integer.value[0]);
  774. return 0;
  775. }
  776. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  777. struct snd_ctl_elem_value *ucontrol)
  778. {
  779. int rc = 0;
  780. switch (ucontrol->value.integer.value[0]) {
  781. case 3:
  782. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  783. break;
  784. case 2:
  785. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  786. break;
  787. case 1:
  788. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  789. break;
  790. case 0:
  791. default:
  792. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  793. break;
  794. }
  795. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  796. __func__, usb_tx_cfg.bit_format,
  797. ucontrol->value.integer.value[0]);
  798. return rc;
  799. }
  800. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  801. struct snd_ctl_elem_value *ucontrol)
  802. {
  803. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  804. usb_rx_cfg.channels);
  805. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  806. return 0;
  807. }
  808. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  809. struct snd_ctl_elem_value *ucontrol)
  810. {
  811. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  812. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  813. return 1;
  814. }
  815. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  816. struct snd_ctl_elem_value *ucontrol)
  817. {
  818. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  819. usb_tx_cfg.channels);
  820. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  821. return 0;
  822. }
  823. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  824. struct snd_ctl_elem_value *ucontrol)
  825. {
  826. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  827. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  828. return 1;
  829. }
  830. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  831. struct snd_ctl_elem_value *ucontrol)
  832. {
  833. pr_debug("%s: proxy_rx channels = %d\n",
  834. __func__, proxy_rx_cfg.channels);
  835. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  836. return 0;
  837. }
  838. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  839. struct snd_ctl_elem_value *ucontrol)
  840. {
  841. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  842. pr_debug("%s: proxy_rx channels = %d\n",
  843. __func__, proxy_rx_cfg.channels);
  844. return 1;
  845. }
  846. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  847. struct tdm_port *port)
  848. {
  849. if (port) {
  850. if (strnstr(kcontrol->id.name, "PRI",
  851. sizeof(kcontrol->id.name))) {
  852. port->mode = TDM_PRI;
  853. } else if (strnstr(kcontrol->id.name, "SEC",
  854. sizeof(kcontrol->id.name))) {
  855. port->mode = TDM_SEC;
  856. } else if (strnstr(kcontrol->id.name, "TERT",
  857. sizeof(kcontrol->id.name))) {
  858. port->mode = TDM_TERT;
  859. } else {
  860. pr_err("%s: unsupported mode in: %s\n",
  861. __func__, kcontrol->id.name);
  862. return -EINVAL;
  863. }
  864. if (strnstr(kcontrol->id.name, "RX_0",
  865. sizeof(kcontrol->id.name)) ||
  866. strnstr(kcontrol->id.name, "TX_0",
  867. sizeof(kcontrol->id.name))) {
  868. port->channel = TDM_0;
  869. } else if (strnstr(kcontrol->id.name, "RX_1",
  870. sizeof(kcontrol->id.name)) ||
  871. strnstr(kcontrol->id.name, "TX_1",
  872. sizeof(kcontrol->id.name))) {
  873. port->channel = TDM_1;
  874. } else if (strnstr(kcontrol->id.name, "RX_2",
  875. sizeof(kcontrol->id.name)) ||
  876. strnstr(kcontrol->id.name, "TX_2",
  877. sizeof(kcontrol->id.name))) {
  878. port->channel = TDM_2;
  879. } else if (strnstr(kcontrol->id.name, "RX_3",
  880. sizeof(kcontrol->id.name)) ||
  881. strnstr(kcontrol->id.name, "TX_3",
  882. sizeof(kcontrol->id.name))) {
  883. port->channel = TDM_3;
  884. } else if (strnstr(kcontrol->id.name, "RX_4",
  885. sizeof(kcontrol->id.name)) ||
  886. strnstr(kcontrol->id.name, "TX_4",
  887. sizeof(kcontrol->id.name))) {
  888. port->channel = TDM_4;
  889. } else if (strnstr(kcontrol->id.name, "RX_5",
  890. sizeof(kcontrol->id.name)) ||
  891. strnstr(kcontrol->id.name, "TX_5",
  892. sizeof(kcontrol->id.name))) {
  893. port->channel = TDM_5;
  894. } else if (strnstr(kcontrol->id.name, "RX_6",
  895. sizeof(kcontrol->id.name)) ||
  896. strnstr(kcontrol->id.name, "TX_6",
  897. sizeof(kcontrol->id.name))) {
  898. port->channel = TDM_6;
  899. } else if (strnstr(kcontrol->id.name, "RX_7",
  900. sizeof(kcontrol->id.name)) ||
  901. strnstr(kcontrol->id.name, "TX_7",
  902. sizeof(kcontrol->id.name))) {
  903. port->channel = TDM_7;
  904. } else {
  905. pr_err("%s: unsupported channel in: %s\n",
  906. __func__, kcontrol->id.name);
  907. return -EINVAL;
  908. }
  909. } else {
  910. return -EINVAL;
  911. }
  912. return 0;
  913. }
  914. static int tdm_get_sample_rate(int value)
  915. {
  916. int sample_rate = 0;
  917. switch (value) {
  918. case 0:
  919. sample_rate = SAMPLING_RATE_8KHZ;
  920. break;
  921. case 1:
  922. sample_rate = SAMPLING_RATE_16KHZ;
  923. break;
  924. case 2:
  925. sample_rate = SAMPLING_RATE_32KHZ;
  926. break;
  927. case 3:
  928. sample_rate = SAMPLING_RATE_48KHZ;
  929. break;
  930. case 4:
  931. sample_rate = SAMPLING_RATE_176P4KHZ;
  932. break;
  933. case 5:
  934. sample_rate = SAMPLING_RATE_352P8KHZ;
  935. break;
  936. default:
  937. sample_rate = SAMPLING_RATE_48KHZ;
  938. break;
  939. }
  940. return sample_rate;
  941. }
  942. static int tdm_get_sample_rate_val(int sample_rate)
  943. {
  944. int sample_rate_val = 0;
  945. switch (sample_rate) {
  946. case SAMPLING_RATE_8KHZ:
  947. sample_rate_val = 0;
  948. break;
  949. case SAMPLING_RATE_16KHZ:
  950. sample_rate_val = 1;
  951. break;
  952. case SAMPLING_RATE_32KHZ:
  953. sample_rate_val = 2;
  954. break;
  955. case SAMPLING_RATE_48KHZ:
  956. sample_rate_val = 3;
  957. break;
  958. case SAMPLING_RATE_176P4KHZ:
  959. sample_rate_val = 4;
  960. break;
  961. case SAMPLING_RATE_352P8KHZ:
  962. sample_rate_val = 5;
  963. break;
  964. default:
  965. sample_rate_val = 3;
  966. break;
  967. }
  968. return sample_rate_val;
  969. }
  970. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  971. struct snd_ctl_elem_value *ucontrol)
  972. {
  973. struct tdm_port port;
  974. int ret = tdm_get_port_idx(kcontrol, &port);
  975. if (ret) {
  976. pr_err("%s: unsupported control: %s\n",
  977. __func__, kcontrol->id.name);
  978. } else {
  979. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  980. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  981. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  982. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  983. ucontrol->value.enumerated.item[0]);
  984. }
  985. return ret;
  986. }
  987. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  988. struct snd_ctl_elem_value *ucontrol)
  989. {
  990. struct tdm_port port;
  991. int ret = tdm_get_port_idx(kcontrol, &port);
  992. if (ret) {
  993. pr_err("%s: unsupported control: %s\n",
  994. __func__, kcontrol->id.name);
  995. } else {
  996. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  997. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  998. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  999. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  1000. ucontrol->value.enumerated.item[0]);
  1001. }
  1002. return ret;
  1003. }
  1004. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1005. struct snd_ctl_elem_value *ucontrol)
  1006. {
  1007. struct tdm_port port;
  1008. int ret = tdm_get_port_idx(kcontrol, &port);
  1009. if (ret) {
  1010. pr_err("%s: unsupported control: %s\n",
  1011. __func__, kcontrol->id.name);
  1012. } else {
  1013. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  1014. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  1015. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1016. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1017. ucontrol->value.enumerated.item[0]);
  1018. }
  1019. return ret;
  1020. }
  1021. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1022. struct snd_ctl_elem_value *ucontrol)
  1023. {
  1024. struct tdm_port port;
  1025. int ret = tdm_get_port_idx(kcontrol, &port);
  1026. if (ret) {
  1027. pr_err("%s: unsupported control: %s\n",
  1028. __func__, kcontrol->id.name);
  1029. } else {
  1030. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  1031. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1032. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1033. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1034. ucontrol->value.enumerated.item[0]);
  1035. }
  1036. return ret;
  1037. }
  1038. static int tdm_get_format(int value)
  1039. {
  1040. int format = 0;
  1041. switch (value) {
  1042. case 0:
  1043. format = SNDRV_PCM_FORMAT_S16_LE;
  1044. break;
  1045. case 1:
  1046. format = SNDRV_PCM_FORMAT_S24_LE;
  1047. break;
  1048. case 2:
  1049. format = SNDRV_PCM_FORMAT_S32_LE;
  1050. break;
  1051. default:
  1052. format = SNDRV_PCM_FORMAT_S16_LE;
  1053. break;
  1054. }
  1055. return format;
  1056. }
  1057. static int tdm_get_format_val(int format)
  1058. {
  1059. int value = 0;
  1060. switch (format) {
  1061. case SNDRV_PCM_FORMAT_S16_LE:
  1062. value = 0;
  1063. break;
  1064. case SNDRV_PCM_FORMAT_S24_LE:
  1065. value = 1;
  1066. break;
  1067. case SNDRV_PCM_FORMAT_S32_LE:
  1068. value = 2;
  1069. break;
  1070. default:
  1071. value = 0;
  1072. break;
  1073. }
  1074. return value;
  1075. }
  1076. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  1077. struct snd_ctl_elem_value *ucontrol)
  1078. {
  1079. struct tdm_port port;
  1080. int ret = tdm_get_port_idx(kcontrol, &port);
  1081. if (ret) {
  1082. pr_err("%s: unsupported control: %s\n",
  1083. __func__, kcontrol->id.name);
  1084. } else {
  1085. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1086. tdm_rx_cfg[port.mode][port.channel].bit_format);
  1087. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1088. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1089. ucontrol->value.enumerated.item[0]);
  1090. }
  1091. return ret;
  1092. }
  1093. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  1094. struct snd_ctl_elem_value *ucontrol)
  1095. {
  1096. struct tdm_port port;
  1097. int ret = tdm_get_port_idx(kcontrol, &port);
  1098. if (ret) {
  1099. pr_err("%s: unsupported control: %s\n",
  1100. __func__, kcontrol->id.name);
  1101. } else {
  1102. tdm_rx_cfg[port.mode][port.channel].bit_format =
  1103. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1104. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1105. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1106. ucontrol->value.enumerated.item[0]);
  1107. }
  1108. return ret;
  1109. }
  1110. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  1111. struct snd_ctl_elem_value *ucontrol)
  1112. {
  1113. struct tdm_port port;
  1114. int ret = tdm_get_port_idx(kcontrol, &port);
  1115. if (ret) {
  1116. pr_err("%s: unsupported control: %s\n",
  1117. __func__, kcontrol->id.name);
  1118. } else {
  1119. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1120. tdm_tx_cfg[port.mode][port.channel].bit_format);
  1121. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  1122. tdm_tx_cfg[port.mode][port.channel].bit_format,
  1123. ucontrol->value.enumerated.item[0]);
  1124. }
  1125. return ret;
  1126. }
  1127. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  1128. struct snd_ctl_elem_value *ucontrol)
  1129. {
  1130. struct tdm_port port;
  1131. int ret = tdm_get_port_idx(kcontrol, &port);
  1132. if (ret) {
  1133. pr_err("%s: unsupported control: %s\n",
  1134. __func__, kcontrol->id.name);
  1135. } else {
  1136. tdm_tx_cfg[port.mode][port.channel].bit_format =
  1137. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1138. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  1139. tdm_tx_cfg[port.mode][port.channel].bit_format,
  1140. ucontrol->value.enumerated.item[0]);
  1141. }
  1142. return ret;
  1143. }
  1144. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  1145. struct snd_ctl_elem_value *ucontrol)
  1146. {
  1147. struct tdm_port port;
  1148. int ret = tdm_get_port_idx(kcontrol, &port);
  1149. if (ret) {
  1150. pr_err("%s: unsupported control: %s\n",
  1151. __func__, kcontrol->id.name);
  1152. } else {
  1153. ucontrol->value.enumerated.item[0] =
  1154. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  1155. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  1156. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  1157. ucontrol->value.enumerated.item[0]);
  1158. }
  1159. return ret;
  1160. }
  1161. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  1162. struct snd_ctl_elem_value *ucontrol)
  1163. {
  1164. struct tdm_port port;
  1165. int ret = tdm_get_port_idx(kcontrol, &port);
  1166. if (ret) {
  1167. pr_err("%s: unsupported control: %s\n",
  1168. __func__, kcontrol->id.name);
  1169. } else {
  1170. tdm_rx_cfg[port.mode][port.channel].channels =
  1171. ucontrol->value.enumerated.item[0] + 1;
  1172. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  1173. tdm_rx_cfg[port.mode][port.channel].channels,
  1174. ucontrol->value.enumerated.item[0] + 1);
  1175. }
  1176. return ret;
  1177. }
  1178. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  1179. struct snd_ctl_elem_value *ucontrol)
  1180. {
  1181. struct tdm_port port;
  1182. int ret = tdm_get_port_idx(kcontrol, &port);
  1183. if (ret) {
  1184. pr_err("%s: unsupported control: %s\n",
  1185. __func__, kcontrol->id.name);
  1186. } else {
  1187. ucontrol->value.enumerated.item[0] =
  1188. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  1189. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  1190. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  1191. ucontrol->value.enumerated.item[0]);
  1192. }
  1193. return ret;
  1194. }
  1195. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  1196. struct snd_ctl_elem_value *ucontrol)
  1197. {
  1198. struct tdm_port port;
  1199. int ret = tdm_get_port_idx(kcontrol, &port);
  1200. if (ret) {
  1201. pr_err("%s: unsupported control: %s\n",
  1202. __func__, kcontrol->id.name);
  1203. } else {
  1204. tdm_tx_cfg[port.mode][port.channel].channels =
  1205. ucontrol->value.enumerated.item[0] + 1;
  1206. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  1207. tdm_tx_cfg[port.mode][port.channel].channels,
  1208. ucontrol->value.enumerated.item[0] + 1);
  1209. }
  1210. return ret;
  1211. }
  1212. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  1213. {
  1214. int idx = 0;
  1215. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  1216. sizeof("PRIM_AUX_PCM"))) {
  1217. idx = PRIM_AUX_PCM;
  1218. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  1219. sizeof("SEC_AUX_PCM"))) {
  1220. idx = SEC_AUX_PCM;
  1221. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  1222. sizeof("TERT_AUX_PCM"))) {
  1223. idx = TERT_AUX_PCM;
  1224. } else {
  1225. pr_err("%s: unsupported port: %s\n",
  1226. __func__, kcontrol->id.name);
  1227. idx = -EINVAL;
  1228. }
  1229. return idx;
  1230. }
  1231. static int aux_pcm_get_sample_rate(int value)
  1232. {
  1233. int sample_rate = 0;
  1234. switch (value) {
  1235. case 1:
  1236. sample_rate = SAMPLING_RATE_16KHZ;
  1237. break;
  1238. case 0:
  1239. default:
  1240. sample_rate = SAMPLING_RATE_8KHZ;
  1241. break;
  1242. }
  1243. return sample_rate;
  1244. }
  1245. static int aux_pcm_get_sample_rate_val(int sample_rate)
  1246. {
  1247. int sample_rate_val = 0;
  1248. switch (sample_rate) {
  1249. case SAMPLING_RATE_16KHZ:
  1250. sample_rate_val = 1;
  1251. break;
  1252. case SAMPLING_RATE_8KHZ:
  1253. default:
  1254. sample_rate_val = 0;
  1255. break;
  1256. }
  1257. return sample_rate_val;
  1258. }
  1259. static int mi2s_auxpcm_get_format(int value)
  1260. {
  1261. int format = 0;
  1262. switch (value) {
  1263. case 0:
  1264. format = SNDRV_PCM_FORMAT_S16_LE;
  1265. break;
  1266. case 1:
  1267. format = SNDRV_PCM_FORMAT_S24_LE;
  1268. break;
  1269. case 2:
  1270. format = SNDRV_PCM_FORMAT_S24_3LE;
  1271. break;
  1272. case 3:
  1273. format = SNDRV_PCM_FORMAT_S32_LE;
  1274. break;
  1275. default:
  1276. format = SNDRV_PCM_FORMAT_S16_LE;
  1277. break;
  1278. }
  1279. return format;
  1280. }
  1281. static int mi2s_auxpcm_get_format_value(int format)
  1282. {
  1283. int value = 0;
  1284. switch (format) {
  1285. case SNDRV_PCM_FORMAT_S16_LE:
  1286. value = 0;
  1287. break;
  1288. case SNDRV_PCM_FORMAT_S24_LE:
  1289. value = 1;
  1290. break;
  1291. case SNDRV_PCM_FORMAT_S24_3LE:
  1292. value = 2;
  1293. break;
  1294. case SNDRV_PCM_FORMAT_S32_LE:
  1295. value = 3;
  1296. break;
  1297. default:
  1298. value = 0;
  1299. break;
  1300. }
  1301. return value;
  1302. }
  1303. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1304. struct snd_ctl_elem_value *ucontrol)
  1305. {
  1306. int idx = aux_pcm_get_port_idx(kcontrol);
  1307. if (idx < 0)
  1308. return idx;
  1309. ucontrol->value.enumerated.item[0] =
  1310. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  1311. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1312. idx, aux_pcm_rx_cfg[idx].sample_rate,
  1313. ucontrol->value.enumerated.item[0]);
  1314. return 0;
  1315. }
  1316. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1317. struct snd_ctl_elem_value *ucontrol)
  1318. {
  1319. int idx = aux_pcm_get_port_idx(kcontrol);
  1320. if (idx < 0)
  1321. return idx;
  1322. aux_pcm_rx_cfg[idx].sample_rate =
  1323. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1324. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1325. idx, aux_pcm_rx_cfg[idx].sample_rate,
  1326. ucontrol->value.enumerated.item[0]);
  1327. return 0;
  1328. }
  1329. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1330. struct snd_ctl_elem_value *ucontrol)
  1331. {
  1332. int idx = aux_pcm_get_port_idx(kcontrol);
  1333. if (idx < 0)
  1334. return idx;
  1335. ucontrol->value.enumerated.item[0] =
  1336. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  1337. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1338. idx, aux_pcm_tx_cfg[idx].sample_rate,
  1339. ucontrol->value.enumerated.item[0]);
  1340. return 0;
  1341. }
  1342. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1343. struct snd_ctl_elem_value *ucontrol)
  1344. {
  1345. int idx = aux_pcm_get_port_idx(kcontrol);
  1346. if (idx < 0)
  1347. return idx;
  1348. aux_pcm_tx_cfg[idx].sample_rate =
  1349. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1350. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1351. idx, aux_pcm_tx_cfg[idx].sample_rate,
  1352. ucontrol->value.enumerated.item[0]);
  1353. return 0;
  1354. }
  1355. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  1356. struct snd_ctl_elem_value *ucontrol)
  1357. {
  1358. int idx = aux_pcm_get_port_idx(kcontrol);
  1359. if (idx < 0)
  1360. return idx;
  1361. ucontrol->value.enumerated.item[0] =
  1362. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  1363. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1364. idx, aux_pcm_rx_cfg[idx].bit_format,
  1365. ucontrol->value.enumerated.item[0]);
  1366. return 0;
  1367. }
  1368. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  1369. struct snd_ctl_elem_value *ucontrol)
  1370. {
  1371. int idx = aux_pcm_get_port_idx(kcontrol);
  1372. if (idx < 0)
  1373. return idx;
  1374. aux_pcm_rx_cfg[idx].bit_format =
  1375. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1376. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1377. idx, aux_pcm_rx_cfg[idx].bit_format,
  1378. ucontrol->value.enumerated.item[0]);
  1379. return 0;
  1380. }
  1381. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  1382. struct snd_ctl_elem_value *ucontrol)
  1383. {
  1384. int idx = aux_pcm_get_port_idx(kcontrol);
  1385. if (idx < 0)
  1386. return idx;
  1387. ucontrol->value.enumerated.item[0] =
  1388. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  1389. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1390. idx, aux_pcm_tx_cfg[idx].bit_format,
  1391. ucontrol->value.enumerated.item[0]);
  1392. return 0;
  1393. }
  1394. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  1395. struct snd_ctl_elem_value *ucontrol)
  1396. {
  1397. int idx = aux_pcm_get_port_idx(kcontrol);
  1398. if (idx < 0)
  1399. return idx;
  1400. aux_pcm_tx_cfg[idx].bit_format =
  1401. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1402. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1403. idx, aux_pcm_tx_cfg[idx].bit_format,
  1404. ucontrol->value.enumerated.item[0]);
  1405. return 0;
  1406. }
  1407. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  1408. {
  1409. int idx = 0;
  1410. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  1411. sizeof("PRIM_MI2S_RX"))) {
  1412. idx = PRIM_MI2S;
  1413. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  1414. sizeof("SEC_MI2S_RX"))) {
  1415. idx = SEC_MI2S;
  1416. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  1417. sizeof("TERT_MI2S_RX"))) {
  1418. idx = TERT_MI2S;
  1419. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  1420. sizeof("PRIM_MI2S_TX"))) {
  1421. idx = PRIM_MI2S;
  1422. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  1423. sizeof("SEC_MI2S_TX"))) {
  1424. idx = SEC_MI2S;
  1425. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  1426. sizeof("TERT_MI2S_TX"))) {
  1427. idx = TERT_MI2S;
  1428. } else {
  1429. pr_err("%s: unsupported channel: %s\n",
  1430. __func__, kcontrol->id.name);
  1431. idx = -EINVAL;
  1432. }
  1433. return idx;
  1434. }
  1435. static int mi2s_get_sample_rate(int value)
  1436. {
  1437. int sample_rate = 0;
  1438. switch (value) {
  1439. case 0:
  1440. sample_rate = SAMPLING_RATE_8KHZ;
  1441. break;
  1442. case 1:
  1443. sample_rate = SAMPLING_RATE_11P025KHZ;
  1444. break;
  1445. case 2:
  1446. sample_rate = SAMPLING_RATE_16KHZ;
  1447. break;
  1448. case 3:
  1449. sample_rate = SAMPLING_RATE_22P05KHZ;
  1450. break;
  1451. case 4:
  1452. sample_rate = SAMPLING_RATE_32KHZ;
  1453. break;
  1454. case 5:
  1455. sample_rate = SAMPLING_RATE_44P1KHZ;
  1456. break;
  1457. case 6:
  1458. sample_rate = SAMPLING_RATE_48KHZ;
  1459. break;
  1460. case 7:
  1461. sample_rate = SAMPLING_RATE_96KHZ;
  1462. break;
  1463. case 8:
  1464. sample_rate = SAMPLING_RATE_192KHZ;
  1465. break;
  1466. default:
  1467. sample_rate = SAMPLING_RATE_48KHZ;
  1468. break;
  1469. }
  1470. return sample_rate;
  1471. }
  1472. static int mi2s_get_sample_rate_val(int sample_rate)
  1473. {
  1474. int sample_rate_val = 0;
  1475. switch (sample_rate) {
  1476. case SAMPLING_RATE_8KHZ:
  1477. sample_rate_val = 0;
  1478. break;
  1479. case SAMPLING_RATE_11P025KHZ:
  1480. sample_rate_val = 1;
  1481. break;
  1482. case SAMPLING_RATE_16KHZ:
  1483. sample_rate_val = 2;
  1484. break;
  1485. case SAMPLING_RATE_22P05KHZ:
  1486. sample_rate_val = 3;
  1487. break;
  1488. case SAMPLING_RATE_32KHZ:
  1489. sample_rate_val = 4;
  1490. break;
  1491. case SAMPLING_RATE_44P1KHZ:
  1492. sample_rate_val = 5;
  1493. break;
  1494. case SAMPLING_RATE_48KHZ:
  1495. sample_rate_val = 6;
  1496. break;
  1497. case SAMPLING_RATE_96KHZ:
  1498. sample_rate_val = 7;
  1499. break;
  1500. case SAMPLING_RATE_192KHZ:
  1501. sample_rate_val = 8;
  1502. break;
  1503. default:
  1504. sample_rate_val = 6;
  1505. break;
  1506. }
  1507. return sample_rate_val;
  1508. }
  1509. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1510. struct snd_ctl_elem_value *ucontrol)
  1511. {
  1512. int idx = mi2s_get_port_idx(kcontrol);
  1513. if (idx < 0)
  1514. return idx;
  1515. ucontrol->value.enumerated.item[0] =
  1516. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  1517. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1518. idx, mi2s_rx_cfg[idx].sample_rate,
  1519. ucontrol->value.enumerated.item[0]);
  1520. return 0;
  1521. }
  1522. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1523. struct snd_ctl_elem_value *ucontrol)
  1524. {
  1525. int idx = mi2s_get_port_idx(kcontrol);
  1526. if (idx < 0)
  1527. return idx;
  1528. mi2s_rx_cfg[idx].sample_rate =
  1529. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1530. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1531. idx, mi2s_rx_cfg[idx].sample_rate,
  1532. ucontrol->value.enumerated.item[0]);
  1533. return 0;
  1534. }
  1535. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1536. struct snd_ctl_elem_value *ucontrol)
  1537. {
  1538. int idx = mi2s_get_port_idx(kcontrol);
  1539. if (idx < 0)
  1540. return idx;
  1541. ucontrol->value.enumerated.item[0] =
  1542. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  1543. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1544. idx, mi2s_tx_cfg[idx].sample_rate,
  1545. ucontrol->value.enumerated.item[0]);
  1546. return 0;
  1547. }
  1548. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1549. struct snd_ctl_elem_value *ucontrol)
  1550. {
  1551. int idx = mi2s_get_port_idx(kcontrol);
  1552. if (idx < 0)
  1553. return idx;
  1554. mi2s_tx_cfg[idx].sample_rate =
  1555. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1556. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1557. idx, mi2s_tx_cfg[idx].sample_rate,
  1558. ucontrol->value.enumerated.item[0]);
  1559. return 0;
  1560. }
  1561. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  1562. struct snd_ctl_elem_value *ucontrol)
  1563. {
  1564. int idx = mi2s_get_port_idx(kcontrol);
  1565. if (idx < 0)
  1566. return idx;
  1567. ucontrol->value.enumerated.item[0] =
  1568. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  1569. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1570. idx, mi2s_rx_cfg[idx].bit_format,
  1571. ucontrol->value.enumerated.item[0]);
  1572. return 0;
  1573. }
  1574. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  1575. struct snd_ctl_elem_value *ucontrol)
  1576. {
  1577. int idx = mi2s_get_port_idx(kcontrol);
  1578. if (idx < 0)
  1579. return idx;
  1580. mi2s_rx_cfg[idx].bit_format =
  1581. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1582. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1583. idx, mi2s_rx_cfg[idx].bit_format,
  1584. ucontrol->value.enumerated.item[0]);
  1585. return 0;
  1586. }
  1587. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  1588. struct snd_ctl_elem_value *ucontrol)
  1589. {
  1590. int idx = mi2s_get_port_idx(kcontrol);
  1591. if (idx < 0)
  1592. return idx;
  1593. ucontrol->value.enumerated.item[0] =
  1594. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  1595. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1596. idx, mi2s_tx_cfg[idx].bit_format,
  1597. ucontrol->value.enumerated.item[0]);
  1598. return 0;
  1599. }
  1600. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  1601. struct snd_ctl_elem_value *ucontrol)
  1602. {
  1603. int idx = mi2s_get_port_idx(kcontrol);
  1604. if (idx < 0)
  1605. return idx;
  1606. mi2s_tx_cfg[idx].bit_format =
  1607. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1608. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1609. idx, mi2s_tx_cfg[idx].bit_format,
  1610. ucontrol->value.enumerated.item[0]);
  1611. return 0;
  1612. }
  1613. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  1614. struct snd_ctl_elem_value *ucontrol)
  1615. {
  1616. int idx = mi2s_get_port_idx(kcontrol);
  1617. if (idx < 0)
  1618. return idx;
  1619. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  1620. idx, mi2s_rx_cfg[idx].channels);
  1621. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  1622. return 0;
  1623. }
  1624. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  1625. struct snd_ctl_elem_value *ucontrol)
  1626. {
  1627. int idx = mi2s_get_port_idx(kcontrol);
  1628. if (idx < 0)
  1629. return idx;
  1630. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  1631. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  1632. idx, mi2s_rx_cfg[idx].channels);
  1633. return 1;
  1634. }
  1635. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  1636. struct snd_ctl_elem_value *ucontrol)
  1637. {
  1638. int idx = mi2s_get_port_idx(kcontrol);
  1639. if (idx < 0)
  1640. return idx;
  1641. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  1642. idx, mi2s_tx_cfg[idx].channels);
  1643. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  1644. return 0;
  1645. }
  1646. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  1647. struct snd_ctl_elem_value *ucontrol)
  1648. {
  1649. int idx = mi2s_get_port_idx(kcontrol);
  1650. if (idx < 0)
  1651. return idx;
  1652. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  1653. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  1654. idx, mi2s_tx_cfg[idx].channels);
  1655. return 1;
  1656. }
  1657. static int msm_get_port_id(int be_id)
  1658. {
  1659. int afe_port_id = 0;
  1660. switch (be_id) {
  1661. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  1662. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  1663. break;
  1664. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  1665. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  1666. break;
  1667. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  1668. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  1669. break;
  1670. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  1671. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  1672. break;
  1673. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  1674. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  1675. break;
  1676. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  1677. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  1678. break;
  1679. default:
  1680. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  1681. afe_port_id = -EINVAL;
  1682. }
  1683. return afe_port_id;
  1684. }
  1685. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  1686. {
  1687. u32 bit_per_sample = 0;
  1688. switch (bit_format) {
  1689. case SNDRV_PCM_FORMAT_S32_LE:
  1690. case SNDRV_PCM_FORMAT_S24_3LE:
  1691. case SNDRV_PCM_FORMAT_S24_LE:
  1692. bit_per_sample = 32;
  1693. break;
  1694. case SNDRV_PCM_FORMAT_S16_LE:
  1695. default:
  1696. bit_per_sample = 16;
  1697. break;
  1698. }
  1699. return bit_per_sample;
  1700. }
  1701. static void update_mi2s_clk_val(int dai_id, int stream)
  1702. {
  1703. u32 bit_per_sample = 0;
  1704. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  1705. bit_per_sample =
  1706. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  1707. mi2s_clk[dai_id].clk_freq_in_hz =
  1708. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  1709. } else {
  1710. bit_per_sample =
  1711. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  1712. mi2s_clk[dai_id].clk_freq_in_hz =
  1713. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  1714. }
  1715. }
  1716. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  1717. {
  1718. int ret = 0;
  1719. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1720. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  1721. int port_id = 0;
  1722. int index = cpu_dai->id;
  1723. port_id = msm_get_port_id(rtd->dai_link->id);
  1724. if (port_id < 0) {
  1725. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  1726. ret = port_id;
  1727. goto err;
  1728. }
  1729. if (enable) {
  1730. update_mi2s_clk_val(index, substream->stream);
  1731. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  1732. mi2s_clk[index].clk_freq_in_hz);
  1733. }
  1734. mi2s_clk[index].enable = enable;
  1735. ret = afe_set_lpass_clock_v2(port_id,
  1736. &mi2s_clk[index]);
  1737. if (ret < 0) {
  1738. dev_err(rtd->card->dev,
  1739. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  1740. __func__, port_id, ret);
  1741. goto err;
  1742. }
  1743. err:
  1744. return ret;
  1745. }
  1746. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1747. {
  1748. int idx = 0;
  1749. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  1750. sizeof("WSA_CDC_DMA_RX_0")))
  1751. idx = WSA_CDC_DMA_RX_0;
  1752. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  1753. sizeof("WSA_CDC_DMA_RX_0")))
  1754. idx = WSA_CDC_DMA_RX_1;
  1755. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1756. sizeof("RX_CDC_DMA_RX_0")))
  1757. idx = RX_CDC_DMA_RX_0;
  1758. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1759. sizeof("RX_CDC_DMA_RX_1")))
  1760. idx = RX_CDC_DMA_RX_1;
  1761. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1762. sizeof("RX_CDC_DMA_RX_2")))
  1763. idx = RX_CDC_DMA_RX_2;
  1764. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1765. sizeof("RX_CDC_DMA_RX_3")))
  1766. idx = RX_CDC_DMA_RX_3;
  1767. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1768. sizeof("RX_CDC_DMA_RX_5")))
  1769. idx = RX_CDC_DMA_RX_5;
  1770. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  1771. sizeof("WSA_CDC_DMA_TX_0")))
  1772. idx = WSA_CDC_DMA_TX_0;
  1773. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  1774. sizeof("WSA_CDC_DMA_TX_1")))
  1775. idx = WSA_CDC_DMA_TX_1;
  1776. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  1777. sizeof("WSA_CDC_DMA_TX_2")))
  1778. idx = WSA_CDC_DMA_TX_2;
  1779. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  1780. sizeof("TX_CDC_DMA_TX_0")))
  1781. idx = TX_CDC_DMA_TX_0;
  1782. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  1783. sizeof("TX_CDC_DMA_TX_3")))
  1784. idx = TX_CDC_DMA_TX_3;
  1785. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  1786. sizeof("TX_CDC_DMA_TX_4")))
  1787. idx = TX_CDC_DMA_TX_4;
  1788. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
  1789. sizeof("VA_CDC_DMA_TX_0")))
  1790. idx = VA_CDC_DMA_TX_0;
  1791. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
  1792. sizeof("VA_CDC_DMA_TX_1")))
  1793. idx = VA_CDC_DMA_TX_1;
  1794. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
  1795. sizeof("VA_CDC_DMA_TX_2")))
  1796. idx = VA_CDC_DMA_TX_2;
  1797. else {
  1798. pr_err("%s: unsupported channel: %s\n",
  1799. __func__, kcontrol->id.name);
  1800. return -EINVAL;
  1801. }
  1802. return idx;
  1803. }
  1804. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  1805. struct snd_ctl_elem_value *ucontrol)
  1806. {
  1807. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1808. if (ch_num < 0) {
  1809. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1810. return ch_num;
  1811. }
  1812. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1813. cdc_dma_rx_cfg[ch_num].channels - 1);
  1814. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1815. return 0;
  1816. }
  1817. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1818. struct snd_ctl_elem_value *ucontrol)
  1819. {
  1820. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1821. if (ch_num < 0) {
  1822. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1823. return ch_num;
  1824. }
  1825. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1826. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1827. cdc_dma_rx_cfg[ch_num].channels);
  1828. return 1;
  1829. }
  1830. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  1831. struct snd_ctl_elem_value *ucontrol)
  1832. {
  1833. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1834. if (ch_num < 0) {
  1835. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1836. return ch_num;
  1837. }
  1838. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  1839. case SNDRV_PCM_FORMAT_S32_LE:
  1840. ucontrol->value.integer.value[0] = 3;
  1841. break;
  1842. case SNDRV_PCM_FORMAT_S24_3LE:
  1843. ucontrol->value.integer.value[0] = 2;
  1844. break;
  1845. case SNDRV_PCM_FORMAT_S24_LE:
  1846. ucontrol->value.integer.value[0] = 1;
  1847. break;
  1848. case SNDRV_PCM_FORMAT_S16_LE:
  1849. default:
  1850. ucontrol->value.integer.value[0] = 0;
  1851. break;
  1852. }
  1853. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1854. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1855. ucontrol->value.integer.value[0]);
  1856. return 0;
  1857. }
  1858. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  1859. struct snd_ctl_elem_value *ucontrol)
  1860. {
  1861. int rc = 0;
  1862. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1863. if (ch_num < 0) {
  1864. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1865. return ch_num;
  1866. }
  1867. switch (ucontrol->value.integer.value[0]) {
  1868. case 3:
  1869. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1870. break;
  1871. case 2:
  1872. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1873. break;
  1874. case 1:
  1875. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1876. break;
  1877. case 0:
  1878. default:
  1879. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1880. break;
  1881. }
  1882. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1883. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1884. ucontrol->value.integer.value[0]);
  1885. return rc;
  1886. }
  1887. static int cdc_dma_get_sample_rate_val(int sample_rate)
  1888. {
  1889. int sample_rate_val = 0;
  1890. switch (sample_rate) {
  1891. case SAMPLING_RATE_8KHZ:
  1892. sample_rate_val = 0;
  1893. break;
  1894. case SAMPLING_RATE_11P025KHZ:
  1895. sample_rate_val = 1;
  1896. break;
  1897. case SAMPLING_RATE_16KHZ:
  1898. sample_rate_val = 2;
  1899. break;
  1900. case SAMPLING_RATE_22P05KHZ:
  1901. sample_rate_val = 3;
  1902. break;
  1903. case SAMPLING_RATE_32KHZ:
  1904. sample_rate_val = 4;
  1905. break;
  1906. case SAMPLING_RATE_44P1KHZ:
  1907. sample_rate_val = 5;
  1908. break;
  1909. case SAMPLING_RATE_48KHZ:
  1910. sample_rate_val = 6;
  1911. break;
  1912. case SAMPLING_RATE_88P2KHZ:
  1913. sample_rate_val = 7;
  1914. break;
  1915. case SAMPLING_RATE_96KHZ:
  1916. sample_rate_val = 8;
  1917. break;
  1918. case SAMPLING_RATE_176P4KHZ:
  1919. sample_rate_val = 9;
  1920. break;
  1921. case SAMPLING_RATE_192KHZ:
  1922. sample_rate_val = 10;
  1923. break;
  1924. case SAMPLING_RATE_352P8KHZ:
  1925. sample_rate_val = 11;
  1926. break;
  1927. case SAMPLING_RATE_384KHZ:
  1928. sample_rate_val = 12;
  1929. break;
  1930. default:
  1931. sample_rate_val = 6;
  1932. break;
  1933. }
  1934. return sample_rate_val;
  1935. }
  1936. static int cdc_dma_get_sample_rate(int value)
  1937. {
  1938. int sample_rate = 0;
  1939. switch (value) {
  1940. case 0:
  1941. sample_rate = SAMPLING_RATE_8KHZ;
  1942. break;
  1943. case 1:
  1944. sample_rate = SAMPLING_RATE_11P025KHZ;
  1945. break;
  1946. case 2:
  1947. sample_rate = SAMPLING_RATE_16KHZ;
  1948. break;
  1949. case 3:
  1950. sample_rate = SAMPLING_RATE_22P05KHZ;
  1951. break;
  1952. case 4:
  1953. sample_rate = SAMPLING_RATE_32KHZ;
  1954. break;
  1955. case 5:
  1956. sample_rate = SAMPLING_RATE_44P1KHZ;
  1957. break;
  1958. case 6:
  1959. sample_rate = SAMPLING_RATE_48KHZ;
  1960. break;
  1961. case 7:
  1962. sample_rate = SAMPLING_RATE_88P2KHZ;
  1963. break;
  1964. case 8:
  1965. sample_rate = SAMPLING_RATE_96KHZ;
  1966. break;
  1967. case 9:
  1968. sample_rate = SAMPLING_RATE_176P4KHZ;
  1969. break;
  1970. case 10:
  1971. sample_rate = SAMPLING_RATE_192KHZ;
  1972. break;
  1973. case 11:
  1974. sample_rate = SAMPLING_RATE_352P8KHZ;
  1975. break;
  1976. case 12:
  1977. sample_rate = SAMPLING_RATE_384KHZ;
  1978. break;
  1979. default:
  1980. sample_rate = SAMPLING_RATE_48KHZ;
  1981. break;
  1982. }
  1983. return sample_rate;
  1984. }
  1985. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1986. struct snd_ctl_elem_value *ucontrol)
  1987. {
  1988. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1989. if (ch_num < 0) {
  1990. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1991. return ch_num;
  1992. }
  1993. ucontrol->value.enumerated.item[0] =
  1994. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  1995. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  1996. cdc_dma_rx_cfg[ch_num].sample_rate);
  1997. return 0;
  1998. }
  1999. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2000. struct snd_ctl_elem_value *ucontrol)
  2001. {
  2002. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2003. if (ch_num < 0) {
  2004. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2005. return ch_num;
  2006. }
  2007. cdc_dma_rx_cfg[ch_num].sample_rate =
  2008. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2009. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  2010. __func__, ucontrol->value.enumerated.item[0],
  2011. cdc_dma_rx_cfg[ch_num].sample_rate);
  2012. return 0;
  2013. }
  2014. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  2015. struct snd_ctl_elem_value *ucontrol)
  2016. {
  2017. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2018. if (ch_num < 0) {
  2019. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2020. return ch_num;
  2021. }
  2022. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  2023. cdc_dma_tx_cfg[ch_num].channels);
  2024. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  2025. return 0;
  2026. }
  2027. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  2028. struct snd_ctl_elem_value *ucontrol)
  2029. {
  2030. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2031. if (ch_num < 0) {
  2032. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2033. return ch_num;
  2034. }
  2035. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  2036. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  2037. cdc_dma_tx_cfg[ch_num].channels);
  2038. return 1;
  2039. }
  2040. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2041. struct snd_ctl_elem_value *ucontrol)
  2042. {
  2043. int sample_rate_val;
  2044. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2045. if (ch_num < 0) {
  2046. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2047. return ch_num;
  2048. }
  2049. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  2050. case SAMPLING_RATE_384KHZ:
  2051. sample_rate_val = 12;
  2052. break;
  2053. case SAMPLING_RATE_352P8KHZ:
  2054. sample_rate_val = 11;
  2055. break;
  2056. case SAMPLING_RATE_192KHZ:
  2057. sample_rate_val = 10;
  2058. break;
  2059. case SAMPLING_RATE_176P4KHZ:
  2060. sample_rate_val = 9;
  2061. break;
  2062. case SAMPLING_RATE_96KHZ:
  2063. sample_rate_val = 8;
  2064. break;
  2065. case SAMPLING_RATE_88P2KHZ:
  2066. sample_rate_val = 7;
  2067. break;
  2068. case SAMPLING_RATE_48KHZ:
  2069. sample_rate_val = 6;
  2070. break;
  2071. case SAMPLING_RATE_44P1KHZ:
  2072. sample_rate_val = 5;
  2073. break;
  2074. case SAMPLING_RATE_32KHZ:
  2075. sample_rate_val = 4;
  2076. break;
  2077. case SAMPLING_RATE_22P05KHZ:
  2078. sample_rate_val = 3;
  2079. break;
  2080. case SAMPLING_RATE_16KHZ:
  2081. sample_rate_val = 2;
  2082. break;
  2083. case SAMPLING_RATE_11P025KHZ:
  2084. sample_rate_val = 1;
  2085. break;
  2086. case SAMPLING_RATE_8KHZ:
  2087. sample_rate_val = 0;
  2088. break;
  2089. default:
  2090. sample_rate_val = 6;
  2091. break;
  2092. }
  2093. ucontrol->value.integer.value[0] = sample_rate_val;
  2094. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  2095. cdc_dma_tx_cfg[ch_num].sample_rate);
  2096. return 0;
  2097. }
  2098. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2099. struct snd_ctl_elem_value *ucontrol)
  2100. {
  2101. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2102. if (ch_num < 0) {
  2103. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2104. return ch_num;
  2105. }
  2106. switch (ucontrol->value.integer.value[0]) {
  2107. case 12:
  2108. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  2109. break;
  2110. case 11:
  2111. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  2112. break;
  2113. case 10:
  2114. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  2115. break;
  2116. case 9:
  2117. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  2118. break;
  2119. case 8:
  2120. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  2121. break;
  2122. case 7:
  2123. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  2124. break;
  2125. case 6:
  2126. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  2127. break;
  2128. case 5:
  2129. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  2130. break;
  2131. case 4:
  2132. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  2133. break;
  2134. case 3:
  2135. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  2136. break;
  2137. case 2:
  2138. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  2139. break;
  2140. case 1:
  2141. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  2142. break;
  2143. case 0:
  2144. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  2145. break;
  2146. default:
  2147. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  2148. break;
  2149. }
  2150. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  2151. __func__, ucontrol->value.integer.value[0],
  2152. cdc_dma_tx_cfg[ch_num].sample_rate);
  2153. return 0;
  2154. }
  2155. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  2156. struct snd_ctl_elem_value *ucontrol)
  2157. {
  2158. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2159. if (ch_num < 0) {
  2160. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2161. return ch_num;
  2162. }
  2163. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  2164. case SNDRV_PCM_FORMAT_S32_LE:
  2165. ucontrol->value.integer.value[0] = 3;
  2166. break;
  2167. case SNDRV_PCM_FORMAT_S24_3LE:
  2168. ucontrol->value.integer.value[0] = 2;
  2169. break;
  2170. case SNDRV_PCM_FORMAT_S24_LE:
  2171. ucontrol->value.integer.value[0] = 1;
  2172. break;
  2173. case SNDRV_PCM_FORMAT_S16_LE:
  2174. default:
  2175. ucontrol->value.integer.value[0] = 0;
  2176. break;
  2177. }
  2178. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  2179. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  2180. ucontrol->value.integer.value[0]);
  2181. return 0;
  2182. }
  2183. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  2184. struct snd_ctl_elem_value *ucontrol)
  2185. {
  2186. int rc = 0;
  2187. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2188. if (ch_num < 0) {
  2189. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2190. return ch_num;
  2191. }
  2192. switch (ucontrol->value.integer.value[0]) {
  2193. case 3:
  2194. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  2195. break;
  2196. case 2:
  2197. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  2198. break;
  2199. case 1:
  2200. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  2201. break;
  2202. case 0:
  2203. default:
  2204. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  2205. break;
  2206. }
  2207. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  2208. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  2209. ucontrol->value.integer.value[0]);
  2210. return rc;
  2211. }
  2212. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  2213. {
  2214. int idx = 0;
  2215. switch (be_id) {
  2216. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  2217. idx = WSA_CDC_DMA_RX_0;
  2218. break;
  2219. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  2220. idx = WSA_CDC_DMA_TX_0;
  2221. break;
  2222. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  2223. idx = WSA_CDC_DMA_RX_1;
  2224. break;
  2225. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  2226. idx = WSA_CDC_DMA_TX_1;
  2227. break;
  2228. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  2229. idx = WSA_CDC_DMA_TX_2;
  2230. break;
  2231. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  2232. idx = RX_CDC_DMA_RX_0;
  2233. break;
  2234. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  2235. idx = RX_CDC_DMA_RX_1;
  2236. break;
  2237. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  2238. idx = RX_CDC_DMA_RX_2;
  2239. break;
  2240. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  2241. idx = RX_CDC_DMA_RX_3;
  2242. break;
  2243. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  2244. idx = RX_CDC_DMA_RX_5;
  2245. break;
  2246. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  2247. idx = TX_CDC_DMA_TX_0;
  2248. break;
  2249. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  2250. idx = TX_CDC_DMA_TX_3;
  2251. break;
  2252. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  2253. idx = TX_CDC_DMA_TX_4;
  2254. break;
  2255. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  2256. idx = VA_CDC_DMA_TX_0;
  2257. break;
  2258. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  2259. idx = VA_CDC_DMA_TX_1;
  2260. break;
  2261. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  2262. idx = VA_CDC_DMA_TX_2;
  2263. break;
  2264. default:
  2265. idx = RX_CDC_DMA_RX_0;
  2266. break;
  2267. }
  2268. return idx;
  2269. }
  2270. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  2271. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  2272. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2273. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  2274. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2275. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  2276. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2277. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  2278. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2279. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  2280. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2281. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  2282. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2283. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  2284. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2285. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  2286. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2287. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  2288. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2289. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  2290. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2291. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  2292. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2293. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  2294. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2295. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  2296. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2297. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
  2298. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2299. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
  2300. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2301. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
  2302. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2303. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  2304. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2305. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  2306. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2307. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  2308. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2309. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  2310. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2311. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  2312. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2313. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  2314. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2315. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  2316. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2317. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  2318. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2319. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  2320. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2321. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  2322. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2323. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  2324. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2325. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  2326. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2327. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
  2328. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2329. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
  2330. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2331. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
  2332. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2333. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  2334. wsa_cdc_dma_rx_0_sample_rate,
  2335. cdc_dma_rx_sample_rate_get,
  2336. cdc_dma_rx_sample_rate_put),
  2337. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  2338. wsa_cdc_dma_rx_1_sample_rate,
  2339. cdc_dma_rx_sample_rate_get,
  2340. cdc_dma_rx_sample_rate_put),
  2341. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  2342. rx_cdc_dma_rx_0_sample_rate,
  2343. cdc_dma_rx_sample_rate_get,
  2344. cdc_dma_rx_sample_rate_put),
  2345. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  2346. rx_cdc_dma_rx_1_sample_rate,
  2347. cdc_dma_rx_sample_rate_get,
  2348. cdc_dma_rx_sample_rate_put),
  2349. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  2350. rx_cdc_dma_rx_2_sample_rate,
  2351. cdc_dma_rx_sample_rate_get,
  2352. cdc_dma_rx_sample_rate_put),
  2353. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  2354. rx_cdc_dma_rx_3_sample_rate,
  2355. cdc_dma_rx_sample_rate_get,
  2356. cdc_dma_rx_sample_rate_put),
  2357. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  2358. rx_cdc_dma_rx_5_sample_rate,
  2359. cdc_dma_rx_sample_rate_get,
  2360. cdc_dma_rx_sample_rate_put),
  2361. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  2362. wsa_cdc_dma_tx_0_sample_rate,
  2363. cdc_dma_tx_sample_rate_get,
  2364. cdc_dma_tx_sample_rate_put),
  2365. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  2366. wsa_cdc_dma_tx_1_sample_rate,
  2367. cdc_dma_tx_sample_rate_get,
  2368. cdc_dma_tx_sample_rate_put),
  2369. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  2370. wsa_cdc_dma_tx_2_sample_rate,
  2371. cdc_dma_tx_sample_rate_get,
  2372. cdc_dma_tx_sample_rate_put),
  2373. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  2374. tx_cdc_dma_tx_0_sample_rate,
  2375. cdc_dma_tx_sample_rate_get,
  2376. cdc_dma_tx_sample_rate_put),
  2377. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  2378. tx_cdc_dma_tx_3_sample_rate,
  2379. cdc_dma_tx_sample_rate_get,
  2380. cdc_dma_tx_sample_rate_put),
  2381. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  2382. tx_cdc_dma_tx_4_sample_rate,
  2383. cdc_dma_tx_sample_rate_get,
  2384. cdc_dma_tx_sample_rate_put),
  2385. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
  2386. va_cdc_dma_tx_0_sample_rate,
  2387. cdc_dma_tx_sample_rate_get,
  2388. cdc_dma_tx_sample_rate_put),
  2389. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
  2390. va_cdc_dma_tx_1_sample_rate,
  2391. cdc_dma_tx_sample_rate_get,
  2392. cdc_dma_tx_sample_rate_put),
  2393. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
  2394. va_cdc_dma_tx_2_sample_rate,
  2395. cdc_dma_tx_sample_rate_get,
  2396. cdc_dma_tx_sample_rate_put),
  2397. };
  2398. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  2399. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  2400. usb_audio_rx_sample_rate_get,
  2401. usb_audio_rx_sample_rate_put),
  2402. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  2403. usb_audio_tx_sample_rate_get,
  2404. usb_audio_tx_sample_rate_put),
  2405. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2406. tdm_rx_sample_rate_get,
  2407. tdm_rx_sample_rate_put),
  2408. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2409. tdm_rx_sample_rate_get,
  2410. tdm_rx_sample_rate_put),
  2411. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2412. tdm_rx_sample_rate_get,
  2413. tdm_rx_sample_rate_put),
  2414. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2415. tdm_tx_sample_rate_get,
  2416. tdm_tx_sample_rate_put),
  2417. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2418. tdm_tx_sample_rate_get,
  2419. tdm_tx_sample_rate_put),
  2420. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2421. tdm_tx_sample_rate_get,
  2422. tdm_tx_sample_rate_put),
  2423. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  2424. aux_pcm_rx_sample_rate_get,
  2425. aux_pcm_rx_sample_rate_put),
  2426. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  2427. aux_pcm_rx_sample_rate_get,
  2428. aux_pcm_rx_sample_rate_put),
  2429. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  2430. aux_pcm_rx_sample_rate_get,
  2431. aux_pcm_rx_sample_rate_put),
  2432. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  2433. aux_pcm_tx_sample_rate_get,
  2434. aux_pcm_tx_sample_rate_put),
  2435. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  2436. aux_pcm_tx_sample_rate_get,
  2437. aux_pcm_tx_sample_rate_put),
  2438. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  2439. aux_pcm_tx_sample_rate_get,
  2440. aux_pcm_tx_sample_rate_put),
  2441. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  2442. mi2s_rx_sample_rate_get,
  2443. mi2s_rx_sample_rate_put),
  2444. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  2445. mi2s_rx_sample_rate_get,
  2446. mi2s_rx_sample_rate_put),
  2447. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  2448. mi2s_rx_sample_rate_get,
  2449. mi2s_rx_sample_rate_put),
  2450. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  2451. mi2s_tx_sample_rate_get,
  2452. mi2s_tx_sample_rate_put),
  2453. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  2454. mi2s_tx_sample_rate_get,
  2455. mi2s_tx_sample_rate_put),
  2456. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  2457. mi2s_tx_sample_rate_get,
  2458. mi2s_tx_sample_rate_put),
  2459. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  2460. usb_audio_rx_format_get, usb_audio_rx_format_put),
  2461. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  2462. usb_audio_tx_format_get, usb_audio_tx_format_put),
  2463. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  2464. tdm_rx_format_get,
  2465. tdm_rx_format_put),
  2466. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  2467. tdm_rx_format_get,
  2468. tdm_rx_format_put),
  2469. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  2470. tdm_rx_format_get,
  2471. tdm_rx_format_put),
  2472. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  2473. tdm_tx_format_get,
  2474. tdm_tx_format_put),
  2475. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  2476. tdm_tx_format_get,
  2477. tdm_tx_format_put),
  2478. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  2479. tdm_tx_format_get,
  2480. tdm_tx_format_put),
  2481. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  2482. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2483. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  2484. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2485. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  2486. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2487. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  2488. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2489. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  2490. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2491. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  2492. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2493. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  2494. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2495. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  2496. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2497. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  2498. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2499. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  2500. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2501. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  2502. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2503. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  2504. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2505. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  2506. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  2507. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  2508. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  2509. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  2510. proxy_rx_ch_get, proxy_rx_ch_put),
  2511. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  2512. tdm_rx_ch_get,
  2513. tdm_rx_ch_put),
  2514. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  2515. tdm_rx_ch_get,
  2516. tdm_rx_ch_put),
  2517. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  2518. tdm_rx_ch_get,
  2519. tdm_rx_ch_put),
  2520. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  2521. tdm_tx_ch_get,
  2522. tdm_tx_ch_put),
  2523. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  2524. tdm_tx_ch_get,
  2525. tdm_tx_ch_put),
  2526. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  2527. tdm_tx_ch_get,
  2528. tdm_tx_ch_put),
  2529. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  2530. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2531. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  2532. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2533. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  2534. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2535. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  2536. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2537. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  2538. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2539. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  2540. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2541. };
  2542. static const struct snd_kcontrol_new msm_snd_controls[] = {
  2543. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  2544. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2545. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  2546. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2547. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  2548. aux_pcm_rx_sample_rate_get,
  2549. aux_pcm_rx_sample_rate_put),
  2550. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  2551. aux_pcm_tx_sample_rate_get,
  2552. aux_pcm_tx_sample_rate_put),
  2553. };
  2554. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  2555. struct snd_pcm_hw_params *params)
  2556. {
  2557. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  2558. struct snd_interval *rate = hw_param_interval(params,
  2559. SNDRV_PCM_HW_PARAM_RATE);
  2560. struct snd_interval *channels = hw_param_interval(params,
  2561. SNDRV_PCM_HW_PARAM_CHANNELS);
  2562. int idx, rc = 0;
  2563. pr_debug("%s: format = %d, rate = %d\n",
  2564. __func__, params_format(params), params_rate(params));
  2565. switch (dai_link->id) {
  2566. case MSM_BACKEND_DAI_USB_RX:
  2567. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2568. usb_rx_cfg.bit_format);
  2569. rate->min = rate->max = usb_rx_cfg.sample_rate;
  2570. channels->min = channels->max = usb_rx_cfg.channels;
  2571. break;
  2572. case MSM_BACKEND_DAI_USB_TX:
  2573. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2574. usb_tx_cfg.bit_format);
  2575. rate->min = rate->max = usb_tx_cfg.sample_rate;
  2576. channels->min = channels->max = usb_tx_cfg.channels;
  2577. break;
  2578. case MSM_BACKEND_DAI_AFE_PCM_RX:
  2579. channels->min = channels->max = proxy_rx_cfg.channels;
  2580. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  2581. break;
  2582. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  2583. channels->min = channels->max =
  2584. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  2585. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2586. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  2587. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  2588. break;
  2589. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  2590. channels->min = channels->max =
  2591. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  2592. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2593. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  2594. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  2595. break;
  2596. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  2597. channels->min = channels->max =
  2598. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  2599. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2600. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  2601. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  2602. break;
  2603. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  2604. channels->min = channels->max =
  2605. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  2606. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2607. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  2608. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  2609. break;
  2610. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  2611. channels->min = channels->max =
  2612. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  2613. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2614. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  2615. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  2616. break;
  2617. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  2618. channels->min = channels->max =
  2619. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  2620. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2621. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  2622. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  2623. break;
  2624. case MSM_BACKEND_DAI_AUXPCM_RX:
  2625. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2626. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  2627. rate->min = rate->max =
  2628. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  2629. channels->min = channels->max =
  2630. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  2631. break;
  2632. case MSM_BACKEND_DAI_AUXPCM_TX:
  2633. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2634. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  2635. rate->min = rate->max =
  2636. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  2637. channels->min = channels->max =
  2638. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  2639. break;
  2640. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  2641. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2642. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  2643. rate->min = rate->max =
  2644. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  2645. channels->min = channels->max =
  2646. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  2647. break;
  2648. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  2649. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2650. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  2651. rate->min = rate->max =
  2652. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  2653. channels->min = channels->max =
  2654. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  2655. break;
  2656. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  2657. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2658. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  2659. rate->min = rate->max =
  2660. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  2661. channels->min = channels->max =
  2662. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  2663. break;
  2664. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  2665. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2666. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  2667. rate->min = rate->max =
  2668. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  2669. channels->min = channels->max =
  2670. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  2671. break;
  2672. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  2673. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2674. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  2675. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  2676. channels->min = channels->max =
  2677. mi2s_rx_cfg[PRIM_MI2S].channels;
  2678. break;
  2679. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  2680. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2681. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  2682. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  2683. channels->min = channels->max =
  2684. mi2s_tx_cfg[PRIM_MI2S].channels;
  2685. break;
  2686. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  2687. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2688. mi2s_rx_cfg[SEC_MI2S].bit_format);
  2689. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  2690. channels->min = channels->max =
  2691. mi2s_rx_cfg[SEC_MI2S].channels;
  2692. break;
  2693. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  2694. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2695. mi2s_tx_cfg[SEC_MI2S].bit_format);
  2696. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  2697. channels->min = channels->max =
  2698. mi2s_tx_cfg[SEC_MI2S].channels;
  2699. break;
  2700. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  2701. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2702. mi2s_rx_cfg[TERT_MI2S].bit_format);
  2703. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  2704. channels->min = channels->max =
  2705. mi2s_rx_cfg[TERT_MI2S].channels;
  2706. break;
  2707. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  2708. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2709. mi2s_tx_cfg[TERT_MI2S].bit_format);
  2710. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  2711. channels->min = channels->max =
  2712. mi2s_tx_cfg[TERT_MI2S].channels;
  2713. break;
  2714. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  2715. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  2716. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  2717. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  2718. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2719. cdc_dma_tx_cfg[idx].bit_format);
  2720. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  2721. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  2722. break;
  2723. default:
  2724. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  2725. break;
  2726. }
  2727. return rc;
  2728. }
  2729. static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component, bool active)
  2730. {
  2731. struct snd_soc_card *card = component->card;
  2732. struct msm_asoc_mach_data *pdata =
  2733. snd_soc_card_get_drvdata(card);
  2734. if (!pdata->fsa_handle)
  2735. return false;
  2736. return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
  2737. }
  2738. static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
  2739. {
  2740. int value = 0;
  2741. bool ret = false;
  2742. struct snd_soc_card *card;
  2743. struct msm_asoc_mach_data *pdata;
  2744. if (!component) {
  2745. pr_err("%s component is NULL\n", __func__);
  2746. return false;
  2747. }
  2748. card = component->card;
  2749. pdata = snd_soc_card_get_drvdata(card);
  2750. if (!pdata)
  2751. return false;
  2752. if (wcd_mbhc_cfg.enable_usbc_analog)
  2753. return msm_usbc_swap_gnd_mic(component, active);
  2754. /* if usbc is not defined, swap using us_euro_gpio_p */
  2755. if (pdata->us_euro_gpio_p) {
  2756. value = msm_cdc_pinctrl_get_state(
  2757. pdata->us_euro_gpio_p);
  2758. if (value)
  2759. msm_cdc_pinctrl_select_sleep_state(
  2760. pdata->us_euro_gpio_p);
  2761. else
  2762. msm_cdc_pinctrl_select_active_state(
  2763. pdata->us_euro_gpio_p);
  2764. dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
  2765. __func__, value, !value);
  2766. ret = true;
  2767. }
  2768. return ret;
  2769. }
  2770. static int kona_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  2771. struct snd_pcm_hw_params *params)
  2772. {
  2773. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  2774. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  2775. int ret = 0;
  2776. int slot_width = 32;
  2777. int channels, slots;
  2778. unsigned int slot_mask, rate, clk_freq;
  2779. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  2780. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  2781. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  2782. switch (cpu_dai->id) {
  2783. case AFE_PORT_ID_PRIMARY_TDM_RX:
  2784. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  2785. break;
  2786. case AFE_PORT_ID_SECONDARY_TDM_RX:
  2787. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  2788. break;
  2789. case AFE_PORT_ID_TERTIARY_TDM_RX:
  2790. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  2791. break;
  2792. case AFE_PORT_ID_PRIMARY_TDM_TX:
  2793. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  2794. break;
  2795. case AFE_PORT_ID_SECONDARY_TDM_TX:
  2796. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  2797. break;
  2798. case AFE_PORT_ID_TERTIARY_TDM_TX:
  2799. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  2800. break;
  2801. default:
  2802. pr_err("%s: dai id 0x%x not supported\n",
  2803. __func__, cpu_dai->id);
  2804. return -EINVAL;
  2805. }
  2806. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  2807. /*2 slot config - bits 0 and 1 set for the first two slots */
  2808. slot_mask = 0x0000FFFF >> (16 - slots);
  2809. channels = slots;
  2810. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  2811. __func__, slot_width, slots);
  2812. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  2813. slots, slot_width);
  2814. if (ret < 0) {
  2815. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  2816. __func__, ret);
  2817. goto end;
  2818. }
  2819. ret = snd_soc_dai_set_channel_map(cpu_dai,
  2820. 0, NULL, channels, slot_offset);
  2821. if (ret < 0) {
  2822. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  2823. __func__, ret);
  2824. goto end;
  2825. }
  2826. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  2827. /*2 slot config - bits 0 and 1 set for the first two slots */
  2828. slot_mask = 0x0000FFFF >> (16 - slots);
  2829. channels = slots;
  2830. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  2831. __func__, slot_width, slots);
  2832. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  2833. slots, slot_width);
  2834. if (ret < 0) {
  2835. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  2836. __func__, ret);
  2837. goto end;
  2838. }
  2839. ret = snd_soc_dai_set_channel_map(cpu_dai,
  2840. channels, slot_offset, 0, NULL);
  2841. if (ret < 0) {
  2842. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  2843. __func__, ret);
  2844. goto end;
  2845. }
  2846. } else {
  2847. ret = -EINVAL;
  2848. pr_err("%s: invalid use case, err:%d\n",
  2849. __func__, ret);
  2850. goto end;
  2851. }
  2852. rate = params_rate(params);
  2853. clk_freq = rate * slot_width * slots;
  2854. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  2855. if (ret < 0)
  2856. pr_err("%s: failed to set tdm clk, err:%d\n",
  2857. __func__, ret);
  2858. end:
  2859. return ret;
  2860. }
  2861. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  2862. struct snd_pcm_hw_params *params)
  2863. {
  2864. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  2865. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  2866. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  2867. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  2868. int ret = 0;
  2869. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  2870. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  2871. u32 user_set_tx_ch = 0;
  2872. u32 user_set_rx_ch = 0;
  2873. u32 ch_id;
  2874. ret = snd_soc_dai_get_channel_map(codec_dai,
  2875. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  2876. &rx_ch_cdc_dma);
  2877. if (ret < 0) {
  2878. pr_err("%s: failed to get codec chan map, err:%d\n",
  2879. __func__, ret);
  2880. goto err;
  2881. }
  2882. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  2883. switch (dai_link->id) {
  2884. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  2885. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  2886. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  2887. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  2888. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  2889. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  2890. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  2891. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  2892. {
  2893. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  2894. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  2895. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  2896. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  2897. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  2898. user_set_rx_ch, &rx_ch_cdc_dma);
  2899. if (ret < 0) {
  2900. pr_err("%s: failed to set cpu chan map, err:%d\n",
  2901. __func__, ret);
  2902. goto err;
  2903. }
  2904. }
  2905. break;
  2906. }
  2907. } else {
  2908. switch (dai_link->id) {
  2909. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  2910. {
  2911. user_set_tx_ch = msm_vi_feed_tx_ch;
  2912. }
  2913. break;
  2914. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  2915. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  2916. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  2917. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  2918. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  2919. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  2920. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  2921. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  2922. {
  2923. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  2924. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  2925. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  2926. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  2927. }
  2928. break;
  2929. }
  2930. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  2931. &tx_ch_cdc_dma, 0, 0);
  2932. if (ret < 0) {
  2933. pr_err("%s: failed to set cpu chan map, err:%d\n",
  2934. __func__, ret);
  2935. goto err;
  2936. }
  2937. }
  2938. err:
  2939. return ret;
  2940. }
  2941. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  2942. {
  2943. cpumask_t mask;
  2944. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  2945. pm_qos_remove_request(&substream->latency_pm_qos_req);
  2946. cpumask_clear(&mask);
  2947. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  2948. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  2949. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  2950. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  2951. pm_qos_add_request(&substream->latency_pm_qos_req,
  2952. PM_QOS_CPU_DMA_LATENCY,
  2953. MSM_LL_QOS_VALUE);
  2954. return 0;
  2955. }
  2956. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  2957. {
  2958. int ret = 0;
  2959. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  2960. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  2961. int index = cpu_dai->id;
  2962. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  2963. dev_dbg(rtd->card->dev,
  2964. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  2965. __func__, substream->name, substream->stream,
  2966. cpu_dai->name, cpu_dai->id);
  2967. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  2968. ret = -EINVAL;
  2969. dev_err(rtd->card->dev,
  2970. "%s: CPU DAI id (%d) out of range\n",
  2971. __func__, cpu_dai->id);
  2972. goto err;
  2973. }
  2974. /*
  2975. * Mutex protection in case the same MI2S
  2976. * interface using for both TX and RX so
  2977. * that the same clock won't be enable twice.
  2978. */
  2979. mutex_lock(&mi2s_intf_conf[index].lock);
  2980. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  2981. /* Check if msm needs to provide the clock to the interface */
  2982. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  2983. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  2984. fmt = SND_SOC_DAIFMT_CBM_CFM;
  2985. }
  2986. ret = msm_mi2s_set_sclk(substream, true);
  2987. if (ret < 0) {
  2988. dev_err(rtd->card->dev,
  2989. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  2990. __func__, ret);
  2991. goto clean_up;
  2992. }
  2993. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  2994. if (ret < 0) {
  2995. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  2996. __func__, index, ret);
  2997. goto clk_off;
  2998. }
  2999. }
  3000. clk_off:
  3001. if (ret < 0)
  3002. msm_mi2s_set_sclk(substream, false);
  3003. clean_up:
  3004. if (ret < 0)
  3005. mi2s_intf_conf[index].ref_cnt--;
  3006. mutex_unlock(&mi2s_intf_conf[index].lock);
  3007. err:
  3008. return ret;
  3009. }
  3010. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  3011. {
  3012. int ret = 0;
  3013. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3014. int index = rtd->cpu_dai->id;
  3015. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  3016. substream->name, substream->stream);
  3017. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  3018. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  3019. return;
  3020. }
  3021. mutex_lock(&mi2s_intf_conf[index].lock);
  3022. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  3023. ret = msm_mi2s_set_sclk(substream, false);
  3024. if (ret < 0)
  3025. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  3026. __func__, index, ret);
  3027. }
  3028. mutex_unlock(&mi2s_intf_conf[index].lock);
  3029. }
  3030. static struct snd_soc_ops kona_tdm_be_ops = {
  3031. .hw_params = kona_tdm_snd_hw_params,
  3032. };
  3033. static struct snd_soc_ops msm_mi2s_be_ops = {
  3034. .startup = msm_mi2s_snd_startup,
  3035. .shutdown = msm_mi2s_snd_shutdown,
  3036. };
  3037. static struct snd_soc_ops msm_fe_qos_ops = {
  3038. .prepare = msm_fe_qos_prepare,
  3039. };
  3040. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  3041. .hw_params = msm_snd_cdc_dma_hw_params,
  3042. };
  3043. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  3044. struct snd_kcontrol *kcontrol, int event)
  3045. {
  3046. struct msm_asoc_mach_data *pdata = NULL;
  3047. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  3048. int ret = 0;
  3049. u32 dmic_idx;
  3050. int *dmic_gpio_cnt;
  3051. struct device_node *dmic_gpio;
  3052. char *wname;
  3053. wname = strpbrk(w->name, "012345");
  3054. if (!wname) {
  3055. dev_err(component->dev, "%s: widget not found\n", __func__);
  3056. return -EINVAL;
  3057. }
  3058. ret = kstrtouint(wname, 10, &dmic_idx);
  3059. if (ret < 0) {
  3060. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  3061. __func__);
  3062. return -EINVAL;
  3063. }
  3064. pdata = snd_soc_card_get_drvdata(component->card);
  3065. switch (dmic_idx) {
  3066. case 0:
  3067. case 1:
  3068. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3069. dmic_gpio = pdata->dmic01_gpio_p;
  3070. break;
  3071. case 2:
  3072. case 3:
  3073. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3074. dmic_gpio = pdata->dmic23_gpio_p;
  3075. break;
  3076. case 4:
  3077. case 5:
  3078. dmic_gpio_cnt = &dmic_4_5_gpio_cnt;
  3079. dmic_gpio = pdata->dmic45_gpio_p;
  3080. break;
  3081. default:
  3082. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  3083. __func__);
  3084. return -EINVAL;
  3085. }
  3086. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3087. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3088. switch (event) {
  3089. case SND_SOC_DAPM_PRE_PMU:
  3090. (*dmic_gpio_cnt)++;
  3091. if (*dmic_gpio_cnt == 1) {
  3092. ret = msm_cdc_pinctrl_select_active_state(
  3093. dmic_gpio);
  3094. if (ret < 0) {
  3095. pr_err("%s: gpio set cannot be activated %sd",
  3096. __func__, "dmic_gpio");
  3097. return ret;
  3098. }
  3099. }
  3100. break;
  3101. case SND_SOC_DAPM_POST_PMD:
  3102. (*dmic_gpio_cnt)--;
  3103. if (*dmic_gpio_cnt == 0) {
  3104. ret = msm_cdc_pinctrl_select_sleep_state(
  3105. dmic_gpio);
  3106. if (ret < 0) {
  3107. pr_err("%s: gpio set cannot be de-activated %sd",
  3108. __func__, "dmic_gpio");
  3109. return ret;
  3110. }
  3111. }
  3112. break;
  3113. default:
  3114. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3115. return -EINVAL;
  3116. }
  3117. return 0;
  3118. }
  3119. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3120. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3121. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3122. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3123. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3124. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3125. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3126. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3127. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3128. SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
  3129. SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
  3130. };
  3131. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  3132. {
  3133. int ret = -EINVAL;
  3134. struct snd_soc_component *component;
  3135. struct snd_soc_dapm_context *dapm;
  3136. struct snd_card *card;
  3137. struct snd_info_entry *entry;
  3138. struct snd_soc_component *aux_comp;
  3139. struct msm_asoc_mach_data *pdata =
  3140. snd_soc_card_get_drvdata(rtd->card);
  3141. component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
  3142. if (!component) {
  3143. pr_err("%s: could not find component for bolero_codec\n",
  3144. __func__);
  3145. return ret;
  3146. }
  3147. dapm = snd_soc_component_get_dapm(component);
  3148. ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
  3149. ARRAY_SIZE(msm_int_snd_controls));
  3150. if (ret < 0) {
  3151. pr_err("%s: add_component_controls failed: %d\n",
  3152. __func__, ret);
  3153. return ret;
  3154. }
  3155. ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
  3156. ARRAY_SIZE(msm_common_snd_controls));
  3157. if (ret < 0) {
  3158. pr_err("%s: add common snd controls failed: %d\n",
  3159. __func__, ret);
  3160. return ret;
  3161. }
  3162. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  3163. ARRAY_SIZE(msm_int_dapm_widgets));
  3164. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  3165. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  3166. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  3167. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  3168. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  3169. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  3170. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  3171. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  3172. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  3173. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  3174. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  3175. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  3176. snd_soc_dapm_sync(dapm);
  3177. /*
  3178. * Send speaker configuration only for WSA8810.
  3179. * Default configuration is for WSA8815.
  3180. */
  3181. dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
  3182. __func__, rtd->card->num_aux_devs);
  3183. if (rtd->card->num_aux_devs &&
  3184. !list_empty(&rtd->card->component_dev_list)) {
  3185. aux_comp = list_first_entry(
  3186. &rtd->card->component_dev_list,
  3187. struct snd_soc_component,
  3188. card_aux_list);
  3189. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  3190. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  3191. wsa_macro_set_spkr_mode(component,
  3192. WSA_MACRO_SPKR_MODE_1);
  3193. wsa_macro_set_spkr_gain_offset(component,
  3194. WSA_MACRO_GAIN_OFFSET_M1P5_DB);
  3195. }
  3196. bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
  3197. sm_port_map);
  3198. }
  3199. card = rtd->card->snd_card;
  3200. if (!pdata->codec_root) {
  3201. entry = snd_info_create_subdir(card->module, "codecs",
  3202. card->proc_root);
  3203. if (!entry) {
  3204. pr_debug("%s: Cannot create codecs module entry\n",
  3205. __func__);
  3206. ret = 0;
  3207. goto err;
  3208. }
  3209. pdata->codec_root = entry;
  3210. }
  3211. bolero_info_create_codec_entry(pdata->codec_root, component);
  3212. codec_reg_done = true;
  3213. return 0;
  3214. err:
  3215. return ret;
  3216. }
  3217. static void *def_wcd_mbhc_cal(void)
  3218. {
  3219. void *wcd_mbhc_cal;
  3220. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  3221. u16 *btn_high;
  3222. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  3223. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  3224. if (!wcd_mbhc_cal)
  3225. return NULL;
  3226. WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
  3227. WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
  3228. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  3229. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  3230. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  3231. btn_high[0] = 75;
  3232. btn_high[1] = 150;
  3233. btn_high[2] = 237;
  3234. btn_high[3] = 500;
  3235. btn_high[4] = 500;
  3236. btn_high[5] = 500;
  3237. btn_high[6] = 500;
  3238. btn_high[7] = 500;
  3239. return wcd_mbhc_cal;
  3240. }
  3241. /* Digital audio interface glue - connects codec <---> CPU */
  3242. static struct snd_soc_dai_link msm_common_dai_links[] = {
  3243. /* FrontEnd DAI Links */
  3244. {/* hw:x,0 */
  3245. .name = MSM_DAILINK_NAME(Media1),
  3246. .stream_name = "MultiMedia1",
  3247. .cpu_dai_name = "MultiMedia1",
  3248. .platform_name = "msm-pcm-dsp.0",
  3249. .dynamic = 1,
  3250. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3251. .dpcm_playback = 1,
  3252. .dpcm_capture = 1,
  3253. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3254. SND_SOC_DPCM_TRIGGER_POST},
  3255. .codec_dai_name = "snd-soc-dummy-dai",
  3256. .codec_name = "snd-soc-dummy",
  3257. .ignore_suspend = 1,
  3258. /* this dainlink has playback support */
  3259. .ignore_pmdown_time = 1,
  3260. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  3261. },
  3262. {/* hw:x,1 */
  3263. .name = MSM_DAILINK_NAME(Media2),
  3264. .stream_name = "MultiMedia2",
  3265. .cpu_dai_name = "MultiMedia2",
  3266. .platform_name = "msm-pcm-dsp.0",
  3267. .dynamic = 1,
  3268. .dpcm_playback = 1,
  3269. .dpcm_capture = 1,
  3270. .codec_dai_name = "snd-soc-dummy-dai",
  3271. .codec_name = "snd-soc-dummy",
  3272. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3273. SND_SOC_DPCM_TRIGGER_POST},
  3274. .ignore_suspend = 1,
  3275. /* this dainlink has playback support */
  3276. .ignore_pmdown_time = 1,
  3277. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  3278. },
  3279. {/* hw:x,2 */
  3280. .name = "VoiceMMode1",
  3281. .stream_name = "VoiceMMode1",
  3282. .cpu_dai_name = "VoiceMMode1",
  3283. .platform_name = "msm-pcm-voice",
  3284. .dynamic = 1,
  3285. .dpcm_playback = 1,
  3286. .dpcm_capture = 1,
  3287. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3288. SND_SOC_DPCM_TRIGGER_POST},
  3289. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3290. .ignore_suspend = 1,
  3291. .ignore_pmdown_time = 1,
  3292. .codec_dai_name = "snd-soc-dummy-dai",
  3293. .codec_name = "snd-soc-dummy",
  3294. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  3295. },
  3296. {/* hw:x,3 */
  3297. .name = "MSM VoIP",
  3298. .stream_name = "VoIP",
  3299. .cpu_dai_name = "VoIP",
  3300. .platform_name = "msm-voip-dsp",
  3301. .dynamic = 1,
  3302. .dpcm_playback = 1,
  3303. .dpcm_capture = 1,
  3304. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3305. SND_SOC_DPCM_TRIGGER_POST},
  3306. .codec_dai_name = "snd-soc-dummy-dai",
  3307. .codec_name = "snd-soc-dummy",
  3308. .ignore_suspend = 1,
  3309. /* this dainlink has playback support */
  3310. .ignore_pmdown_time = 1,
  3311. .id = MSM_FRONTEND_DAI_VOIP,
  3312. },
  3313. {/* hw:x,4 */
  3314. .name = MSM_DAILINK_NAME(ULL),
  3315. .stream_name = "MultiMedia3",
  3316. .cpu_dai_name = "MultiMedia3",
  3317. .platform_name = "msm-pcm-dsp.2",
  3318. .dynamic = 1,
  3319. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3320. .dpcm_playback = 1,
  3321. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3322. SND_SOC_DPCM_TRIGGER_POST},
  3323. .codec_dai_name = "snd-soc-dummy-dai",
  3324. .codec_name = "snd-soc-dummy",
  3325. .ignore_suspend = 1,
  3326. /* this dainlink has playback support */
  3327. .ignore_pmdown_time = 1,
  3328. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  3329. },
  3330. /* Hostless PCM purpose */
  3331. {/* hw:x,5 */
  3332. .name = "MSM AFE-PCM RX",
  3333. .stream_name = "AFE-PROXY RX",
  3334. .cpu_dai_name = "msm-dai-q6-dev.241",
  3335. .codec_name = "msm-stub-codec.1",
  3336. .codec_dai_name = "msm-stub-rx",
  3337. .platform_name = "msm-pcm-afe",
  3338. .dpcm_playback = 1,
  3339. .ignore_suspend = 1,
  3340. /* this dainlink has playback support */
  3341. .ignore_pmdown_time = 1,
  3342. },
  3343. {/* hw:x,6 */
  3344. .name = "MSM AFE-PCM TX",
  3345. .stream_name = "AFE-PROXY TX",
  3346. .cpu_dai_name = "msm-dai-q6-dev.240",
  3347. .codec_name = "msm-stub-codec.1",
  3348. .codec_dai_name = "msm-stub-tx",
  3349. .platform_name = "msm-pcm-afe",
  3350. .dpcm_capture = 1,
  3351. .ignore_suspend = 1,
  3352. },
  3353. {/* hw:x,7 */
  3354. .name = MSM_DAILINK_NAME(Compress1),
  3355. .stream_name = "Compress1",
  3356. .cpu_dai_name = "MultiMedia4",
  3357. .platform_name = "msm-compress-dsp",
  3358. .dynamic = 1,
  3359. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  3360. .dpcm_playback = 1,
  3361. .dpcm_capture = 1,
  3362. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3363. SND_SOC_DPCM_TRIGGER_POST},
  3364. .codec_dai_name = "snd-soc-dummy-dai",
  3365. .codec_name = "snd-soc-dummy",
  3366. .ignore_suspend = 1,
  3367. .ignore_pmdown_time = 1,
  3368. /* this dainlink has playback support */
  3369. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  3370. },
  3371. {/* hw:x,8 */
  3372. .name = "AUXPCM Hostless",
  3373. .stream_name = "AUXPCM Hostless",
  3374. .cpu_dai_name = "AUXPCM_HOSTLESS",
  3375. .platform_name = "msm-pcm-hostless",
  3376. .dynamic = 1,
  3377. .dpcm_playback = 1,
  3378. .dpcm_capture = 1,
  3379. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3380. SND_SOC_DPCM_TRIGGER_POST},
  3381. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3382. .ignore_suspend = 1,
  3383. /* this dainlink has playback support */
  3384. .ignore_pmdown_time = 1,
  3385. .codec_dai_name = "snd-soc-dummy-dai",
  3386. .codec_name = "snd-soc-dummy",
  3387. },
  3388. {/* hw:x,9 */
  3389. .name = MSM_DAILINK_NAME(LowLatency),
  3390. .stream_name = "MultiMedia5",
  3391. .cpu_dai_name = "MultiMedia5",
  3392. .platform_name = "msm-pcm-dsp.1",
  3393. .dynamic = 1,
  3394. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3395. .dpcm_playback = 1,
  3396. .dpcm_capture = 1,
  3397. .codec_dai_name = "snd-soc-dummy-dai",
  3398. .codec_name = "snd-soc-dummy",
  3399. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3400. SND_SOC_DPCM_TRIGGER_POST},
  3401. .ignore_suspend = 1,
  3402. /* this dainlink has playback support */
  3403. .ignore_pmdown_time = 1,
  3404. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  3405. .ops = &msm_fe_qos_ops,
  3406. },
  3407. {/* hw:x,10 */
  3408. .name = "Listen 1 Audio Service",
  3409. .stream_name = "Listen 1 Audio Service",
  3410. .cpu_dai_name = "LSM1",
  3411. .platform_name = "msm-lsm-client",
  3412. .dynamic = 1,
  3413. .dpcm_capture = 1,
  3414. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3415. SND_SOC_DPCM_TRIGGER_POST },
  3416. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3417. .ignore_suspend = 1,
  3418. .codec_dai_name = "snd-soc-dummy-dai",
  3419. .codec_name = "snd-soc-dummy",
  3420. .id = MSM_FRONTEND_DAI_LSM1,
  3421. },
  3422. /* Multiple Tunnel instances */
  3423. {/* hw:x,11 */
  3424. .name = MSM_DAILINK_NAME(Compress2),
  3425. .stream_name = "Compress2",
  3426. .cpu_dai_name = "MultiMedia7",
  3427. .platform_name = "msm-compress-dsp",
  3428. .dynamic = 1,
  3429. .dpcm_playback = 1,
  3430. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3431. SND_SOC_DPCM_TRIGGER_POST},
  3432. .codec_dai_name = "snd-soc-dummy-dai",
  3433. .codec_name = "snd-soc-dummy",
  3434. .ignore_suspend = 1,
  3435. .ignore_pmdown_time = 1,
  3436. /* this dainlink has playback support */
  3437. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  3438. },
  3439. {/* hw:x,12 */
  3440. .name = MSM_DAILINK_NAME(MultiMedia10),
  3441. .stream_name = "MultiMedia10",
  3442. .cpu_dai_name = "MultiMedia10",
  3443. .platform_name = "msm-pcm-dsp.1",
  3444. .dynamic = 1,
  3445. .dpcm_playback = 1,
  3446. .dpcm_capture = 1,
  3447. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3448. SND_SOC_DPCM_TRIGGER_POST},
  3449. .codec_dai_name = "snd-soc-dummy-dai",
  3450. .codec_name = "snd-soc-dummy",
  3451. .ignore_suspend = 1,
  3452. .ignore_pmdown_time = 1,
  3453. /* this dainlink has playback support */
  3454. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  3455. },
  3456. {/* hw:x,13 */
  3457. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  3458. .stream_name = "MM_NOIRQ",
  3459. .cpu_dai_name = "MultiMedia8",
  3460. .platform_name = "msm-pcm-dsp-noirq",
  3461. .dynamic = 1,
  3462. .dpcm_playback = 1,
  3463. .dpcm_capture = 1,
  3464. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3465. SND_SOC_DPCM_TRIGGER_POST},
  3466. .codec_dai_name = "snd-soc-dummy-dai",
  3467. .codec_name = "snd-soc-dummy",
  3468. .ignore_suspend = 1,
  3469. .ignore_pmdown_time = 1,
  3470. /* this dainlink has playback support */
  3471. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  3472. .ops = &msm_fe_qos_ops,
  3473. },
  3474. /* HDMI Hostless */
  3475. {/* hw:x,14 */
  3476. .name = "HDMI_RX_HOSTLESS",
  3477. .stream_name = "HDMI_RX_HOSTLESS",
  3478. .cpu_dai_name = "HDMI_HOSTLESS",
  3479. .platform_name = "msm-pcm-hostless",
  3480. .dynamic = 1,
  3481. .dpcm_playback = 1,
  3482. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3483. SND_SOC_DPCM_TRIGGER_POST},
  3484. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3485. .ignore_suspend = 1,
  3486. .ignore_pmdown_time = 1,
  3487. .codec_dai_name = "snd-soc-dummy-dai",
  3488. .codec_name = "snd-soc-dummy",
  3489. },
  3490. {/* hw:x,15 */
  3491. .name = "VoiceMMode2",
  3492. .stream_name = "VoiceMMode2",
  3493. .cpu_dai_name = "VoiceMMode2",
  3494. .platform_name = "msm-pcm-voice",
  3495. .dynamic = 1,
  3496. .dpcm_playback = 1,
  3497. .dpcm_capture = 1,
  3498. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3499. SND_SOC_DPCM_TRIGGER_POST},
  3500. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3501. .ignore_suspend = 1,
  3502. .ignore_pmdown_time = 1,
  3503. .codec_dai_name = "snd-soc-dummy-dai",
  3504. .codec_name = "snd-soc-dummy",
  3505. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  3506. },
  3507. /* LSM FE */
  3508. {/* hw:x,16 */
  3509. .name = "Listen 2 Audio Service",
  3510. .stream_name = "Listen 2 Audio Service",
  3511. .cpu_dai_name = "LSM2",
  3512. .platform_name = "msm-lsm-client",
  3513. .dynamic = 1,
  3514. .dpcm_capture = 1,
  3515. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3516. SND_SOC_DPCM_TRIGGER_POST },
  3517. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3518. .ignore_suspend = 1,
  3519. .codec_dai_name = "snd-soc-dummy-dai",
  3520. .codec_name = "snd-soc-dummy",
  3521. .id = MSM_FRONTEND_DAI_LSM2,
  3522. },
  3523. {/* hw:x,17 */
  3524. .name = "Listen 3 Audio Service",
  3525. .stream_name = "Listen 3 Audio Service",
  3526. .cpu_dai_name = "LSM3",
  3527. .platform_name = "msm-lsm-client",
  3528. .dynamic = 1,
  3529. .dpcm_capture = 1,
  3530. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3531. SND_SOC_DPCM_TRIGGER_POST },
  3532. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3533. .ignore_suspend = 1,
  3534. .codec_dai_name = "snd-soc-dummy-dai",
  3535. .codec_name = "snd-soc-dummy",
  3536. .id = MSM_FRONTEND_DAI_LSM3,
  3537. },
  3538. {/* hw:x,18 */
  3539. .name = "Listen 4 Audio Service",
  3540. .stream_name = "Listen 4 Audio Service",
  3541. .cpu_dai_name = "LSM4",
  3542. .platform_name = "msm-lsm-client",
  3543. .dynamic = 1,
  3544. .dpcm_capture = 1,
  3545. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3546. SND_SOC_DPCM_TRIGGER_POST },
  3547. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3548. .ignore_suspend = 1,
  3549. .codec_dai_name = "snd-soc-dummy-dai",
  3550. .codec_name = "snd-soc-dummy",
  3551. .id = MSM_FRONTEND_DAI_LSM4,
  3552. },
  3553. {/* hw:x,19 */
  3554. .name = "Listen 5 Audio Service",
  3555. .stream_name = "Listen 5 Audio Service",
  3556. .cpu_dai_name = "LSM5",
  3557. .platform_name = "msm-lsm-client",
  3558. .dynamic = 1,
  3559. .dpcm_capture = 1,
  3560. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3561. SND_SOC_DPCM_TRIGGER_POST },
  3562. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3563. .ignore_suspend = 1,
  3564. .codec_dai_name = "snd-soc-dummy-dai",
  3565. .codec_name = "snd-soc-dummy",
  3566. .id = MSM_FRONTEND_DAI_LSM5,
  3567. },
  3568. {/* hw:x,20 */
  3569. .name = "Listen 6 Audio Service",
  3570. .stream_name = "Listen 6 Audio Service",
  3571. .cpu_dai_name = "LSM6",
  3572. .platform_name = "msm-lsm-client",
  3573. .dynamic = 1,
  3574. .dpcm_capture = 1,
  3575. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3576. SND_SOC_DPCM_TRIGGER_POST },
  3577. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3578. .ignore_suspend = 1,
  3579. .codec_dai_name = "snd-soc-dummy-dai",
  3580. .codec_name = "snd-soc-dummy",
  3581. .id = MSM_FRONTEND_DAI_LSM6,
  3582. },
  3583. {/* hw:x,21 */
  3584. .name = "Listen 7 Audio Service",
  3585. .stream_name = "Listen 7 Audio Service",
  3586. .cpu_dai_name = "LSM7",
  3587. .platform_name = "msm-lsm-client",
  3588. .dynamic = 1,
  3589. .dpcm_capture = 1,
  3590. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3591. SND_SOC_DPCM_TRIGGER_POST },
  3592. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3593. .ignore_suspend = 1,
  3594. .codec_dai_name = "snd-soc-dummy-dai",
  3595. .codec_name = "snd-soc-dummy",
  3596. .id = MSM_FRONTEND_DAI_LSM7,
  3597. },
  3598. {/* hw:x,22 */
  3599. .name = "Listen 8 Audio Service",
  3600. .stream_name = "Listen 8 Audio Service",
  3601. .cpu_dai_name = "LSM8",
  3602. .platform_name = "msm-lsm-client",
  3603. .dynamic = 1,
  3604. .dpcm_capture = 1,
  3605. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3606. SND_SOC_DPCM_TRIGGER_POST },
  3607. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3608. .ignore_suspend = 1,
  3609. .codec_dai_name = "snd-soc-dummy-dai",
  3610. .codec_name = "snd-soc-dummy",
  3611. .id = MSM_FRONTEND_DAI_LSM8,
  3612. },
  3613. {/* hw:x,23 */
  3614. .name = MSM_DAILINK_NAME(Media9),
  3615. .stream_name = "MultiMedia9",
  3616. .cpu_dai_name = "MultiMedia9",
  3617. .platform_name = "msm-pcm-dsp.0",
  3618. .dynamic = 1,
  3619. .dpcm_playback = 1,
  3620. .dpcm_capture = 1,
  3621. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3622. SND_SOC_DPCM_TRIGGER_POST},
  3623. .codec_dai_name = "snd-soc-dummy-dai",
  3624. .codec_name = "snd-soc-dummy",
  3625. .ignore_suspend = 1,
  3626. /* this dainlink has playback support */
  3627. .ignore_pmdown_time = 1,
  3628. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  3629. },
  3630. {/* hw:x,24 */
  3631. .name = MSM_DAILINK_NAME(Compress4),
  3632. .stream_name = "Compress4",
  3633. .cpu_dai_name = "MultiMedia11",
  3634. .platform_name = "msm-compress-dsp",
  3635. .dynamic = 1,
  3636. .dpcm_playback = 1,
  3637. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3638. SND_SOC_DPCM_TRIGGER_POST},
  3639. .codec_dai_name = "snd-soc-dummy-dai",
  3640. .codec_name = "snd-soc-dummy",
  3641. .ignore_suspend = 1,
  3642. .ignore_pmdown_time = 1,
  3643. /* this dainlink has playback support */
  3644. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  3645. },
  3646. {/* hw:x,25 */
  3647. .name = MSM_DAILINK_NAME(Compress5),
  3648. .stream_name = "Compress5",
  3649. .cpu_dai_name = "MultiMedia12",
  3650. .platform_name = "msm-compress-dsp",
  3651. .dynamic = 1,
  3652. .dpcm_playback = 1,
  3653. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3654. SND_SOC_DPCM_TRIGGER_POST},
  3655. .codec_dai_name = "snd-soc-dummy-dai",
  3656. .codec_name = "snd-soc-dummy",
  3657. .ignore_suspend = 1,
  3658. .ignore_pmdown_time = 1,
  3659. /* this dainlink has playback support */
  3660. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  3661. },
  3662. {/* hw:x,26 */
  3663. .name = MSM_DAILINK_NAME(Compress6),
  3664. .stream_name = "Compress6",
  3665. .cpu_dai_name = "MultiMedia13",
  3666. .platform_name = "msm-compress-dsp",
  3667. .dynamic = 1,
  3668. .dpcm_playback = 1,
  3669. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3670. SND_SOC_DPCM_TRIGGER_POST},
  3671. .codec_dai_name = "snd-soc-dummy-dai",
  3672. .codec_name = "snd-soc-dummy",
  3673. .ignore_suspend = 1,
  3674. .ignore_pmdown_time = 1,
  3675. /* this dainlink has playback support */
  3676. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  3677. },
  3678. {/* hw:x,27 */
  3679. .name = MSM_DAILINK_NAME(Compress7),
  3680. .stream_name = "Compress7",
  3681. .cpu_dai_name = "MultiMedia14",
  3682. .platform_name = "msm-compress-dsp",
  3683. .dynamic = 1,
  3684. .dpcm_playback = 1,
  3685. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3686. SND_SOC_DPCM_TRIGGER_POST},
  3687. .codec_dai_name = "snd-soc-dummy-dai",
  3688. .codec_name = "snd-soc-dummy",
  3689. .ignore_suspend = 1,
  3690. .ignore_pmdown_time = 1,
  3691. /* this dainlink has playback support */
  3692. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  3693. },
  3694. {/* hw:x,28 */
  3695. .name = MSM_DAILINK_NAME(Compress8),
  3696. .stream_name = "Compress8",
  3697. .cpu_dai_name = "MultiMedia15",
  3698. .platform_name = "msm-compress-dsp",
  3699. .dynamic = 1,
  3700. .dpcm_playback = 1,
  3701. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3702. SND_SOC_DPCM_TRIGGER_POST},
  3703. .codec_dai_name = "snd-soc-dummy-dai",
  3704. .codec_name = "snd-soc-dummy",
  3705. .ignore_suspend = 1,
  3706. .ignore_pmdown_time = 1,
  3707. /* this dainlink has playback support */
  3708. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  3709. },
  3710. {/* hw:x,29 */
  3711. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  3712. .stream_name = "MM_NOIRQ_2",
  3713. .cpu_dai_name = "MultiMedia16",
  3714. .platform_name = "msm-pcm-dsp-noirq",
  3715. .dynamic = 1,
  3716. .dpcm_playback = 1,
  3717. .dpcm_capture = 1,
  3718. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3719. SND_SOC_DPCM_TRIGGER_POST},
  3720. .codec_dai_name = "snd-soc-dummy-dai",
  3721. .codec_name = "snd-soc-dummy",
  3722. .ignore_suspend = 1,
  3723. .ignore_pmdown_time = 1,
  3724. /* this dainlink has playback support */
  3725. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  3726. },
  3727. {/* hw:x,30 */
  3728. .name = "CDC_DMA Hostless",
  3729. .stream_name = "CDC_DMA Hostless",
  3730. .cpu_dai_name = "CDC_DMA_HOSTLESS",
  3731. .platform_name = "msm-pcm-hostless",
  3732. .dynamic = 1,
  3733. .dpcm_playback = 1,
  3734. .dpcm_capture = 1,
  3735. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3736. SND_SOC_DPCM_TRIGGER_POST},
  3737. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3738. .ignore_suspend = 1,
  3739. /* this dailink has playback support */
  3740. .ignore_pmdown_time = 1,
  3741. .codec_dai_name = "snd-soc-dummy-dai",
  3742. .codec_name = "snd-soc-dummy",
  3743. },
  3744. {/* hw:x,31 */
  3745. .name = "TX3_CDC_DMA Hostless",
  3746. .stream_name = "TX3_CDC_DMA Hostless",
  3747. .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
  3748. .platform_name = "msm-pcm-hostless",
  3749. .dynamic = 1,
  3750. .dpcm_capture = 1,
  3751. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3752. SND_SOC_DPCM_TRIGGER_POST},
  3753. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3754. .ignore_suspend = 1,
  3755. .codec_dai_name = "snd-soc-dummy-dai",
  3756. .codec_name = "snd-soc-dummy",
  3757. },
  3758. };
  3759. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  3760. {/* hw:x,37 */
  3761. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  3762. .stream_name = "WSA CDC DMA0 Capture",
  3763. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  3764. .platform_name = "msm-pcm-hostless",
  3765. .codec_name = "bolero_codec",
  3766. .codec_dai_name = "wsa_macro_vifeedback",
  3767. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  3768. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3769. .ignore_suspend = 1,
  3770. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3771. .ops = &msm_cdc_dma_be_ops,
  3772. },
  3773. };
  3774. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  3775. {
  3776. .name = MSM_DAILINK_NAME(ASM Loopback),
  3777. .stream_name = "MultiMedia6",
  3778. .cpu_dai_name = "MultiMedia6",
  3779. .platform_name = "msm-pcm-loopback",
  3780. .dynamic = 1,
  3781. .dpcm_playback = 1,
  3782. .dpcm_capture = 1,
  3783. .codec_dai_name = "snd-soc-dummy-dai",
  3784. .codec_name = "snd-soc-dummy",
  3785. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3786. SND_SOC_DPCM_TRIGGER_POST},
  3787. .ignore_suspend = 1,
  3788. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3789. .ignore_pmdown_time = 1,
  3790. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  3791. },
  3792. {
  3793. .name = "USB Audio Hostless",
  3794. .stream_name = "USB Audio Hostless",
  3795. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  3796. .platform_name = "msm-pcm-hostless",
  3797. .dynamic = 1,
  3798. .dpcm_playback = 1,
  3799. .dpcm_capture = 1,
  3800. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3801. SND_SOC_DPCM_TRIGGER_POST},
  3802. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3803. .ignore_suspend = 1,
  3804. .ignore_pmdown_time = 1,
  3805. .codec_dai_name = "snd-soc-dummy-dai",
  3806. .codec_name = "snd-soc-dummy",
  3807. },
  3808. {
  3809. .name = "SLIMBUS_7 Hostless",
  3810. .stream_name = "SLIMBUS_7 Hostless",
  3811. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  3812. .platform_name = "msm-pcm-hostless",
  3813. .dynamic = 1,
  3814. .dpcm_capture = 1,
  3815. .dpcm_playback = 1,
  3816. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3817. SND_SOC_DPCM_TRIGGER_POST},
  3818. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3819. .ignore_suspend = 1,
  3820. .ignore_pmdown_time = 1,
  3821. .codec_dai_name = "snd-soc-dummy-dai",
  3822. .codec_name = "snd-soc-dummy",
  3823. },
  3824. };
  3825. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  3826. /* Backend AFE DAI Links */
  3827. {
  3828. .name = LPASS_BE_AFE_PCM_RX,
  3829. .stream_name = "AFE Playback",
  3830. .cpu_dai_name = "msm-dai-q6-dev.224",
  3831. .platform_name = "msm-pcm-routing",
  3832. .codec_name = "msm-stub-codec.1",
  3833. .codec_dai_name = "msm-stub-rx",
  3834. .no_pcm = 1,
  3835. .dpcm_playback = 1,
  3836. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  3837. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3838. /* this dainlink has playback support */
  3839. .ignore_pmdown_time = 1,
  3840. .ignore_suspend = 1,
  3841. },
  3842. {
  3843. .name = LPASS_BE_AFE_PCM_TX,
  3844. .stream_name = "AFE Capture",
  3845. .cpu_dai_name = "msm-dai-q6-dev.225",
  3846. .platform_name = "msm-pcm-routing",
  3847. .codec_name = "msm-stub-codec.1",
  3848. .codec_dai_name = "msm-stub-tx",
  3849. .no_pcm = 1,
  3850. .dpcm_capture = 1,
  3851. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  3852. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3853. .ignore_suspend = 1,
  3854. },
  3855. /* Incall Record Uplink BACK END DAI Link */
  3856. {
  3857. .name = LPASS_BE_INCALL_RECORD_TX,
  3858. .stream_name = "Voice Uplink Capture",
  3859. .cpu_dai_name = "msm-dai-q6-dev.32772",
  3860. .platform_name = "msm-pcm-routing",
  3861. .codec_name = "msm-stub-codec.1",
  3862. .codec_dai_name = "msm-stub-tx",
  3863. .no_pcm = 1,
  3864. .dpcm_capture = 1,
  3865. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  3866. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3867. .ignore_suspend = 1,
  3868. },
  3869. /* Incall Record Downlink BACK END DAI Link */
  3870. {
  3871. .name = LPASS_BE_INCALL_RECORD_RX,
  3872. .stream_name = "Voice Downlink Capture",
  3873. .cpu_dai_name = "msm-dai-q6-dev.32771",
  3874. .platform_name = "msm-pcm-routing",
  3875. .codec_name = "msm-stub-codec.1",
  3876. .codec_dai_name = "msm-stub-tx",
  3877. .no_pcm = 1,
  3878. .dpcm_capture = 1,
  3879. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  3880. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3881. .ignore_suspend = 1,
  3882. },
  3883. /* Incall Music BACK END DAI Link */
  3884. {
  3885. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  3886. .stream_name = "Voice Farend Playback",
  3887. .cpu_dai_name = "msm-dai-q6-dev.32773",
  3888. .platform_name = "msm-pcm-routing",
  3889. .codec_name = "msm-stub-codec.1",
  3890. .codec_dai_name = "msm-stub-rx",
  3891. .no_pcm = 1,
  3892. .dpcm_playback = 1,
  3893. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  3894. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3895. .ignore_suspend = 1,
  3896. .ignore_pmdown_time = 1,
  3897. },
  3898. /* Incall Music 2 BACK END DAI Link */
  3899. {
  3900. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  3901. .stream_name = "Voice2 Farend Playback",
  3902. .cpu_dai_name = "msm-dai-q6-dev.32770",
  3903. .platform_name = "msm-pcm-routing",
  3904. .codec_name = "msm-stub-codec.1",
  3905. .codec_dai_name = "msm-stub-rx",
  3906. .no_pcm = 1,
  3907. .dpcm_playback = 1,
  3908. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  3909. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3910. .ignore_suspend = 1,
  3911. .ignore_pmdown_time = 1,
  3912. },
  3913. {
  3914. .name = LPASS_BE_USB_AUDIO_RX,
  3915. .stream_name = "USB Audio Playback",
  3916. .cpu_dai_name = "msm-dai-q6-dev.28672",
  3917. .platform_name = "msm-pcm-routing",
  3918. .codec_name = "msm-stub-codec.1",
  3919. .codec_dai_name = "msm-stub-rx",
  3920. .no_pcm = 1,
  3921. .dpcm_playback = 1,
  3922. .id = MSM_BACKEND_DAI_USB_RX,
  3923. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3924. .ignore_pmdown_time = 1,
  3925. .ignore_suspend = 1,
  3926. },
  3927. {
  3928. .name = LPASS_BE_USB_AUDIO_TX,
  3929. .stream_name = "USB Audio Capture",
  3930. .cpu_dai_name = "msm-dai-q6-dev.28673",
  3931. .platform_name = "msm-pcm-routing",
  3932. .codec_name = "msm-stub-codec.1",
  3933. .codec_dai_name = "msm-stub-tx",
  3934. .no_pcm = 1,
  3935. .dpcm_capture = 1,
  3936. .id = MSM_BACKEND_DAI_USB_TX,
  3937. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3938. .ignore_suspend = 1,
  3939. },
  3940. {
  3941. .name = LPASS_BE_PRI_TDM_RX_0,
  3942. .stream_name = "Primary TDM0 Playback",
  3943. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  3944. .platform_name = "msm-pcm-routing",
  3945. .codec_name = "msm-stub-codec.1",
  3946. .codec_dai_name = "msm-stub-rx",
  3947. .no_pcm = 1,
  3948. .dpcm_playback = 1,
  3949. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  3950. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3951. .ops = &kona_tdm_be_ops,
  3952. .ignore_suspend = 1,
  3953. .ignore_pmdown_time = 1,
  3954. },
  3955. {
  3956. .name = LPASS_BE_PRI_TDM_TX_0,
  3957. .stream_name = "Primary TDM0 Capture",
  3958. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  3959. .platform_name = "msm-pcm-routing",
  3960. .codec_name = "msm-stub-codec.1",
  3961. .codec_dai_name = "msm-stub-tx",
  3962. .no_pcm = 1,
  3963. .dpcm_capture = 1,
  3964. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  3965. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3966. .ops = &kona_tdm_be_ops,
  3967. .ignore_suspend = 1,
  3968. },
  3969. {
  3970. .name = LPASS_BE_SEC_TDM_RX_0,
  3971. .stream_name = "Secondary TDM0 Playback",
  3972. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  3973. .platform_name = "msm-pcm-routing",
  3974. .codec_name = "msm-stub-codec.1",
  3975. .codec_dai_name = "msm-stub-rx",
  3976. .no_pcm = 1,
  3977. .dpcm_playback = 1,
  3978. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  3979. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3980. .ops = &kona_tdm_be_ops,
  3981. .ignore_suspend = 1,
  3982. .ignore_pmdown_time = 1,
  3983. },
  3984. {
  3985. .name = LPASS_BE_SEC_TDM_TX_0,
  3986. .stream_name = "Secondary TDM0 Capture",
  3987. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  3988. .platform_name = "msm-pcm-routing",
  3989. .codec_name = "msm-stub-codec.1",
  3990. .codec_dai_name = "msm-stub-tx",
  3991. .no_pcm = 1,
  3992. .dpcm_capture = 1,
  3993. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  3994. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3995. .ops = &kona_tdm_be_ops,
  3996. .ignore_suspend = 1,
  3997. },
  3998. {
  3999. .name = LPASS_BE_TERT_TDM_RX_0,
  4000. .stream_name = "Tertiary TDM0 Playback",
  4001. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  4002. .platform_name = "msm-pcm-routing",
  4003. .codec_name = "msm-stub-codec.1",
  4004. .codec_dai_name = "msm-stub-rx",
  4005. .no_pcm = 1,
  4006. .dpcm_playback = 1,
  4007. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  4008. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4009. .ops = &kona_tdm_be_ops,
  4010. .ignore_suspend = 1,
  4011. .ignore_pmdown_time = 1,
  4012. },
  4013. {
  4014. .name = LPASS_BE_TERT_TDM_TX_0,
  4015. .stream_name = "Tertiary TDM0 Capture",
  4016. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  4017. .platform_name = "msm-pcm-routing",
  4018. .codec_name = "msm-stub-codec.1",
  4019. .codec_dai_name = "msm-stub-tx",
  4020. .no_pcm = 1,
  4021. .dpcm_capture = 1,
  4022. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  4023. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4024. .ops = &kona_tdm_be_ops,
  4025. .ignore_suspend = 1,
  4026. },
  4027. };
  4028. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  4029. {
  4030. .name = LPASS_BE_PRI_MI2S_RX,
  4031. .stream_name = "Primary MI2S Playback",
  4032. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  4033. .platform_name = "msm-pcm-routing",
  4034. .codec_name = "msm-stub-codec.1",
  4035. .codec_dai_name = "msm-stub-rx",
  4036. .no_pcm = 1,
  4037. .dpcm_playback = 1,
  4038. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  4039. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4040. .ops = &msm_mi2s_be_ops,
  4041. .ignore_suspend = 1,
  4042. .ignore_pmdown_time = 1,
  4043. },
  4044. {
  4045. .name = LPASS_BE_PRI_MI2S_TX,
  4046. .stream_name = "Primary MI2S Capture",
  4047. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  4048. .platform_name = "msm-pcm-routing",
  4049. .codec_name = "msm-stub-codec.1",
  4050. .codec_dai_name = "msm-stub-tx",
  4051. .no_pcm = 1,
  4052. .dpcm_capture = 1,
  4053. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  4054. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4055. .ops = &msm_mi2s_be_ops,
  4056. .ignore_suspend = 1,
  4057. },
  4058. {
  4059. .name = LPASS_BE_SEC_MI2S_RX,
  4060. .stream_name = "Secondary MI2S Playback",
  4061. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  4062. .platform_name = "msm-pcm-routing",
  4063. .codec_name = "msm-stub-codec.1",
  4064. .codec_dai_name = "msm-stub-rx",
  4065. .no_pcm = 1,
  4066. .dpcm_playback = 1,
  4067. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  4068. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4069. .ops = &msm_mi2s_be_ops,
  4070. .ignore_suspend = 1,
  4071. .ignore_pmdown_time = 1,
  4072. },
  4073. {
  4074. .name = LPASS_BE_SEC_MI2S_TX,
  4075. .stream_name = "Secondary MI2S Capture",
  4076. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  4077. .platform_name = "msm-pcm-routing",
  4078. .codec_name = "msm-stub-codec.1",
  4079. .codec_dai_name = "msm-stub-tx",
  4080. .no_pcm = 1,
  4081. .dpcm_capture = 1,
  4082. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  4083. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4084. .ops = &msm_mi2s_be_ops,
  4085. .ignore_suspend = 1,
  4086. },
  4087. {
  4088. .name = LPASS_BE_TERT_MI2S_RX,
  4089. .stream_name = "Tertiary MI2S Playback",
  4090. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  4091. .platform_name = "msm-pcm-routing",
  4092. .codec_name = "msm-stub-codec.1",
  4093. .codec_dai_name = "msm-stub-rx",
  4094. .no_pcm = 1,
  4095. .dpcm_playback = 1,
  4096. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  4097. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4098. .ops = &msm_mi2s_be_ops,
  4099. .ignore_suspend = 1,
  4100. .ignore_pmdown_time = 1,
  4101. },
  4102. {
  4103. .name = LPASS_BE_TERT_MI2S_TX,
  4104. .stream_name = "Tertiary MI2S Capture",
  4105. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  4106. .platform_name = "msm-pcm-routing",
  4107. .codec_name = "msm-stub-codec.1",
  4108. .codec_dai_name = "msm-stub-tx",
  4109. .no_pcm = 1,
  4110. .dpcm_capture = 1,
  4111. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  4112. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4113. .ops = &msm_mi2s_be_ops,
  4114. .ignore_suspend = 1,
  4115. },
  4116. };
  4117. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  4118. /* Primary AUX PCM Backend DAI Links */
  4119. {
  4120. .name = LPASS_BE_AUXPCM_RX,
  4121. .stream_name = "AUX PCM Playback",
  4122. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4123. .platform_name = "msm-pcm-routing",
  4124. .codec_name = "msm-stub-codec.1",
  4125. .codec_dai_name = "msm-stub-rx",
  4126. .no_pcm = 1,
  4127. .dpcm_playback = 1,
  4128. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  4129. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4130. .ignore_pmdown_time = 1,
  4131. .ignore_suspend = 1,
  4132. },
  4133. {
  4134. .name = LPASS_BE_AUXPCM_TX,
  4135. .stream_name = "AUX PCM Capture",
  4136. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4137. .platform_name = "msm-pcm-routing",
  4138. .codec_name = "msm-stub-codec.1",
  4139. .codec_dai_name = "msm-stub-tx",
  4140. .no_pcm = 1,
  4141. .dpcm_capture = 1,
  4142. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  4143. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4144. .ignore_suspend = 1,
  4145. },
  4146. /* Secondary AUX PCM Backend DAI Links */
  4147. {
  4148. .name = LPASS_BE_SEC_AUXPCM_RX,
  4149. .stream_name = "Sec AUX PCM Playback",
  4150. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  4151. .platform_name = "msm-pcm-routing",
  4152. .codec_name = "msm-stub-codec.1",
  4153. .codec_dai_name = "msm-stub-rx",
  4154. .no_pcm = 1,
  4155. .dpcm_playback = 1,
  4156. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  4157. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4158. .ignore_pmdown_time = 1,
  4159. .ignore_suspend = 1,
  4160. },
  4161. {
  4162. .name = LPASS_BE_SEC_AUXPCM_TX,
  4163. .stream_name = "Sec AUX PCM Capture",
  4164. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  4165. .platform_name = "msm-pcm-routing",
  4166. .codec_name = "msm-stub-codec.1",
  4167. .codec_dai_name = "msm-stub-tx",
  4168. .no_pcm = 1,
  4169. .dpcm_capture = 1,
  4170. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  4171. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4172. .ignore_suspend = 1,
  4173. },
  4174. /* Tertiary AUX PCM Backend DAI Links */
  4175. {
  4176. .name = LPASS_BE_TERT_AUXPCM_RX,
  4177. .stream_name = "Tert AUX PCM Playback",
  4178. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  4179. .platform_name = "msm-pcm-routing",
  4180. .codec_name = "msm-stub-codec.1",
  4181. .codec_dai_name = "msm-stub-rx",
  4182. .no_pcm = 1,
  4183. .dpcm_playback = 1,
  4184. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  4185. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4186. .ignore_suspend = 1,
  4187. },
  4188. {
  4189. .name = LPASS_BE_TERT_AUXPCM_TX,
  4190. .stream_name = "Tert AUX PCM Capture",
  4191. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  4192. .platform_name = "msm-pcm-routing",
  4193. .codec_name = "msm-stub-codec.1",
  4194. .codec_dai_name = "msm-stub-tx",
  4195. .no_pcm = 1,
  4196. .dpcm_capture = 1,
  4197. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  4198. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4199. .ignore_suspend = 1,
  4200. },
  4201. };
  4202. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  4203. /* WSA CDC DMA Backend DAI Links */
  4204. {
  4205. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  4206. .stream_name = "WSA CDC DMA0 Playback",
  4207. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  4208. .platform_name = "msm-pcm-routing",
  4209. .codec_name = "bolero_codec",
  4210. .codec_dai_name = "wsa_macro_rx1",
  4211. .no_pcm = 1,
  4212. .dpcm_playback = 1,
  4213. .init = &msm_int_audrx_init,
  4214. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  4215. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4216. .ignore_pmdown_time = 1,
  4217. .ignore_suspend = 1,
  4218. .ops = &msm_cdc_dma_be_ops,
  4219. },
  4220. {
  4221. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  4222. .stream_name = "WSA CDC DMA1 Playback",
  4223. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  4224. .platform_name = "msm-pcm-routing",
  4225. .codec_name = "bolero_codec",
  4226. .codec_dai_name = "wsa_macro_rx_mix",
  4227. .no_pcm = 1,
  4228. .dpcm_playback = 1,
  4229. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  4230. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4231. .ignore_pmdown_time = 1,
  4232. .ignore_suspend = 1,
  4233. .ops = &msm_cdc_dma_be_ops,
  4234. },
  4235. {
  4236. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  4237. .stream_name = "WSA CDC DMA1 Capture",
  4238. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  4239. .platform_name = "msm-pcm-routing",
  4240. .codec_name = "bolero_codec",
  4241. .codec_dai_name = "wsa_macro_echo",
  4242. .no_pcm = 1,
  4243. .dpcm_capture = 1,
  4244. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  4245. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4246. .ignore_suspend = 1,
  4247. .ops = &msm_cdc_dma_be_ops,
  4248. },
  4249. };
  4250. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  4251. /* RX CDC DMA Backend DAI Links */
  4252. {
  4253. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  4254. .stream_name = "RX CDC DMA0 Playback",
  4255. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  4256. .platform_name = "msm-pcm-routing",
  4257. .codec_name = "bolero_codec",
  4258. .codec_dai_name = "rx_macro_rx1",
  4259. .no_pcm = 1,
  4260. .dpcm_playback = 1,
  4261. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  4262. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4263. .ignore_pmdown_time = 1,
  4264. .ignore_suspend = 1,
  4265. .ops = &msm_cdc_dma_be_ops,
  4266. },
  4267. {
  4268. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  4269. .stream_name = "RX CDC DMA1 Playback",
  4270. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  4271. .platform_name = "msm-pcm-routing",
  4272. .codec_name = "bolero_codec",
  4273. .codec_dai_name = "rx_macro_rx2",
  4274. .no_pcm = 1,
  4275. .dpcm_playback = 1,
  4276. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  4277. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4278. .ignore_pmdown_time = 1,
  4279. .ignore_suspend = 1,
  4280. .ops = &msm_cdc_dma_be_ops,
  4281. },
  4282. {
  4283. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  4284. .stream_name = "RX CDC DMA2 Playback",
  4285. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  4286. .platform_name = "msm-pcm-routing",
  4287. .codec_name = "bolero_codec",
  4288. .codec_dai_name = "rx_macro_rx3",
  4289. .no_pcm = 1,
  4290. .dpcm_playback = 1,
  4291. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  4292. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4293. .ignore_pmdown_time = 1,
  4294. .ignore_suspend = 1,
  4295. .ops = &msm_cdc_dma_be_ops,
  4296. },
  4297. {
  4298. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  4299. .stream_name = "RX CDC DMA3 Playback",
  4300. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  4301. .platform_name = "msm-pcm-routing",
  4302. .codec_name = "bolero_codec",
  4303. .codec_dai_name = "rx_macro_rx4",
  4304. .no_pcm = 1,
  4305. .dpcm_playback = 1,
  4306. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  4307. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4308. .ignore_pmdown_time = 1,
  4309. .ignore_suspend = 1,
  4310. .ops = &msm_cdc_dma_be_ops,
  4311. },
  4312. /* TX CDC DMA Backend DAI Links */
  4313. {
  4314. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  4315. .stream_name = "TX CDC DMA3 Capture",
  4316. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  4317. .platform_name = "msm-pcm-routing",
  4318. .codec_name = "bolero_codec",
  4319. .codec_dai_name = "tx_macro_tx1",
  4320. .no_pcm = 1,
  4321. .dpcm_capture = 1,
  4322. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  4323. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4324. .ignore_suspend = 1,
  4325. .ops = &msm_cdc_dma_be_ops,
  4326. },
  4327. {
  4328. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  4329. .stream_name = "TX CDC DMA4 Capture",
  4330. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  4331. .platform_name = "msm-pcm-routing",
  4332. .codec_name = "bolero_codec",
  4333. .codec_dai_name = "tx_macro_tx2",
  4334. .no_pcm = 1,
  4335. .dpcm_capture = 1,
  4336. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  4337. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4338. .ignore_suspend = 1,
  4339. .ops = &msm_cdc_dma_be_ops,
  4340. },
  4341. };
  4342. static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
  4343. {
  4344. .name = LPASS_BE_VA_CDC_DMA_TX_0,
  4345. .stream_name = "VA CDC DMA0 Capture",
  4346. .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
  4347. .platform_name = "msm-pcm-routing",
  4348. .codec_name = "bolero_codec",
  4349. .codec_dai_name = "va_macro_tx1",
  4350. .no_pcm = 1,
  4351. .dpcm_capture = 1,
  4352. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
  4353. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4354. .ignore_suspend = 1,
  4355. .ops = &msm_cdc_dma_be_ops,
  4356. },
  4357. {
  4358. .name = LPASS_BE_VA_CDC_DMA_TX_1,
  4359. .stream_name = "VA CDC DMA1 Capture",
  4360. .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
  4361. .platform_name = "msm-pcm-routing",
  4362. .codec_name = "bolero_codec",
  4363. .codec_dai_name = "va_macro_tx2",
  4364. .no_pcm = 1,
  4365. .dpcm_capture = 1,
  4366. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
  4367. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4368. .ignore_suspend = 1,
  4369. .ops = &msm_cdc_dma_be_ops,
  4370. },
  4371. {
  4372. .name = LPASS_BE_VA_CDC_DMA_TX_2,
  4373. .stream_name = "VA CDC DMA2 Capture",
  4374. .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
  4375. .platform_name = "msm-pcm-routing",
  4376. .codec_name = "bolero_codec",
  4377. .codec_dai_name = "va_macro_tx3",
  4378. .no_pcm = 1,
  4379. .dpcm_capture = 1,
  4380. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
  4381. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4382. .ignore_suspend = 1,
  4383. .ops = &msm_cdc_dma_be_ops,
  4384. },
  4385. };
  4386. static struct snd_soc_dai_link msm_kona_dai_links[
  4387. ARRAY_SIZE(msm_common_dai_links) +
  4388. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  4389. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  4390. ARRAY_SIZE(msm_common_be_dai_links) +
  4391. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  4392. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  4393. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  4394. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
  4395. ARRAY_SIZE(msm_va_cdc_dma_be_dai_links)];
  4396. static int msm_populate_dai_link_component_of_node(
  4397. struct snd_soc_card *card)
  4398. {
  4399. int i, index, ret = 0;
  4400. struct device *cdev = card->dev;
  4401. struct snd_soc_dai_link *dai_link = card->dai_link;
  4402. struct device_node *np;
  4403. if (!cdev) {
  4404. dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
  4405. return -ENODEV;
  4406. }
  4407. for (i = 0; i < card->num_links; i++) {
  4408. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  4409. continue;
  4410. /* populate platform_of_node for snd card dai links */
  4411. if (dai_link[i].platform_name &&
  4412. !dai_link[i].platform_of_node) {
  4413. index = of_property_match_string(cdev->of_node,
  4414. "asoc-platform-names",
  4415. dai_link[i].platform_name);
  4416. if (index < 0) {
  4417. dev_err(cdev, "%s: No match found for platform name: %s\n",
  4418. __func__, dai_link[i].platform_name);
  4419. ret = index;
  4420. goto err;
  4421. }
  4422. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  4423. index);
  4424. if (!np) {
  4425. dev_err(cdev, "%s: retrieving phandle for platform %s, index %d failed\n",
  4426. __func__, dai_link[i].platform_name,
  4427. index);
  4428. ret = -ENODEV;
  4429. goto err;
  4430. }
  4431. dai_link[i].platform_of_node = np;
  4432. dai_link[i].platform_name = NULL;
  4433. }
  4434. /* populate cpu_of_node for snd card dai links */
  4435. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  4436. index = of_property_match_string(cdev->of_node,
  4437. "asoc-cpu-names",
  4438. dai_link[i].cpu_dai_name);
  4439. if (index >= 0) {
  4440. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  4441. index);
  4442. if (!np) {
  4443. dev_err(cdev, "%s: retrieving phandle for cpu dai %s failed\n",
  4444. __func__,
  4445. dai_link[i].cpu_dai_name);
  4446. ret = -ENODEV;
  4447. goto err;
  4448. }
  4449. dai_link[i].cpu_of_node = np;
  4450. dai_link[i].cpu_dai_name = NULL;
  4451. }
  4452. }
  4453. /* populate codec_of_node for snd card dai links */
  4454. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  4455. index = of_property_match_string(cdev->of_node,
  4456. "asoc-codec-names",
  4457. dai_link[i].codec_name);
  4458. if (index < 0)
  4459. continue;
  4460. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  4461. index);
  4462. if (!np) {
  4463. dev_err(cdev, "%s: retrieving phandle for codec %s failed\n",
  4464. __func__, dai_link[i].codec_name);
  4465. ret = -ENODEV;
  4466. goto err;
  4467. }
  4468. dai_link[i].codec_of_node = np;
  4469. dai_link[i].codec_name = NULL;
  4470. }
  4471. }
  4472. err:
  4473. return ret;
  4474. }
  4475. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  4476. {
  4477. int ret = -EINVAL;
  4478. struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
  4479. if (!component) {
  4480. pr_err("* %s: No match for msm-stub-codec component\n", __func__);
  4481. return ret;
  4482. }
  4483. ret = snd_soc_add_component_controls(component, msm_snd_controls,
  4484. ARRAY_SIZE(msm_snd_controls));
  4485. if (ret < 0) {
  4486. dev_err(component->dev,
  4487. "%s: add_codec_controls failed, err = %d\n",
  4488. __func__, ret);
  4489. return ret;
  4490. }
  4491. return ret;
  4492. }
  4493. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  4494. struct snd_pcm_hw_params *params)
  4495. {
  4496. return 0;
  4497. }
  4498. static struct snd_soc_ops msm_stub_be_ops = {
  4499. .hw_params = msm_snd_stub_hw_params,
  4500. };
  4501. struct snd_soc_card snd_soc_card_stub_msm = {
  4502. .name = "kona-stub-snd-card",
  4503. };
  4504. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  4505. /* FrontEnd DAI Links */
  4506. {
  4507. .name = "MSMSTUB Media1",
  4508. .stream_name = "MultiMedia1",
  4509. .cpu_dai_name = "MultiMedia1",
  4510. .platform_name = "msm-pcm-dsp.0",
  4511. .dynamic = 1,
  4512. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  4513. .dpcm_playback = 1,
  4514. .dpcm_capture = 1,
  4515. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4516. SND_SOC_DPCM_TRIGGER_POST},
  4517. .codec_dai_name = "snd-soc-dummy-dai",
  4518. .codec_name = "snd-soc-dummy",
  4519. .ignore_suspend = 1,
  4520. /* this dainlink has playback support */
  4521. .ignore_pmdown_time = 1,
  4522. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  4523. },
  4524. };
  4525. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  4526. /* Backend DAI Links */
  4527. {
  4528. .name = LPASS_BE_AUXPCM_RX,
  4529. .stream_name = "AUX PCM Playback",
  4530. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4531. .platform_name = "msm-pcm-routing",
  4532. .codec_name = "msm-stub-codec.1",
  4533. .codec_dai_name = "msm-stub-rx",
  4534. .no_pcm = 1,
  4535. .dpcm_playback = 1,
  4536. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  4537. .init = &msm_audrx_stub_init,
  4538. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4539. .ignore_pmdown_time = 1,
  4540. .ignore_suspend = 1,
  4541. .ops = &msm_stub_be_ops,
  4542. },
  4543. {
  4544. .name = LPASS_BE_AUXPCM_TX,
  4545. .stream_name = "AUX PCM Capture",
  4546. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4547. .platform_name = "msm-pcm-routing",
  4548. .codec_name = "msm-stub-codec.1",
  4549. .codec_dai_name = "msm-stub-tx",
  4550. .no_pcm = 1,
  4551. .dpcm_capture = 1,
  4552. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  4553. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4554. .ignore_suspend = 1,
  4555. .ops = &msm_stub_be_ops,
  4556. },
  4557. };
  4558. static struct snd_soc_dai_link msm_stub_dai_links[
  4559. ARRAY_SIZE(msm_stub_fe_dai_links) +
  4560. ARRAY_SIZE(msm_stub_be_dai_links)];
  4561. static const struct of_device_id kona_asoc_machine_of_match[] = {
  4562. { .compatible = "qcom,kona-asoc-snd",
  4563. .data = "codec"},
  4564. { .compatible = "qcom,kona-asoc-snd-stub",
  4565. .data = "stub_codec"},
  4566. {},
  4567. };
  4568. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  4569. {
  4570. struct snd_soc_card *card = NULL;
  4571. struct snd_soc_dai_link *dailink = NULL;
  4572. int len_1 = 0;
  4573. int len_2 = 0;
  4574. int total_links = 0;
  4575. int rc = 0;
  4576. u32 mi2s_audio_intf = 0;
  4577. u32 auxpcm_audio_intf = 0;
  4578. const struct of_device_id *match;
  4579. match = of_match_node(kona_asoc_machine_of_match, dev->of_node);
  4580. if (!match) {
  4581. dev_err(dev, "%s: No DT match found for sound card\n",
  4582. __func__);
  4583. return NULL;
  4584. }
  4585. if (!strcmp(match->data, "codec")) {
  4586. card = &snd_soc_card_kona_msm;
  4587. memcpy(msm_kona_dai_links + total_links,
  4588. msm_common_dai_links,
  4589. sizeof(msm_common_dai_links));
  4590. total_links += ARRAY_SIZE(msm_common_dai_links);
  4591. memcpy(msm_kona_dai_links + total_links,
  4592. msm_bolero_fe_dai_links,
  4593. sizeof(msm_bolero_fe_dai_links));
  4594. total_links +=
  4595. ARRAY_SIZE(msm_bolero_fe_dai_links);
  4596. memcpy(msm_kona_dai_links + total_links,
  4597. msm_common_misc_fe_dai_links,
  4598. sizeof(msm_common_misc_fe_dai_links));
  4599. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  4600. memcpy(msm_kona_dai_links + total_links,
  4601. msm_common_be_dai_links,
  4602. sizeof(msm_common_be_dai_links));
  4603. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  4604. memcpy(msm_kona_dai_links + total_links,
  4605. msm_wsa_cdc_dma_be_dai_links,
  4606. sizeof(msm_wsa_cdc_dma_be_dai_links));
  4607. total_links +=
  4608. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  4609. memcpy(msm_kona_dai_links + total_links,
  4610. msm_rx_tx_cdc_dma_be_dai_links,
  4611. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  4612. total_links +=
  4613. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  4614. memcpy(msm_kona_dai_links + total_links,
  4615. msm_va_cdc_dma_be_dai_links,
  4616. sizeof(msm_va_cdc_dma_be_dai_links));
  4617. total_links +=
  4618. ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
  4619. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  4620. &mi2s_audio_intf);
  4621. if (rc) {
  4622. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  4623. __func__);
  4624. } else {
  4625. if (mi2s_audio_intf) {
  4626. memcpy(msm_kona_dai_links + total_links,
  4627. msm_mi2s_be_dai_links,
  4628. sizeof(msm_mi2s_be_dai_links));
  4629. total_links +=
  4630. ARRAY_SIZE(msm_mi2s_be_dai_links);
  4631. }
  4632. }
  4633. rc = of_property_read_u32(dev->of_node,
  4634. "qcom,auxpcm-audio-intf",
  4635. &auxpcm_audio_intf);
  4636. if (rc) {
  4637. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  4638. __func__);
  4639. } else {
  4640. if (auxpcm_audio_intf) {
  4641. memcpy(msm_kona_dai_links + total_links,
  4642. msm_auxpcm_be_dai_links,
  4643. sizeof(msm_auxpcm_be_dai_links));
  4644. total_links +=
  4645. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  4646. }
  4647. }
  4648. dailink = msm_kona_dai_links;
  4649. } else if(!strcmp(match->data, "stub_codec")) {
  4650. card = &snd_soc_card_stub_msm;
  4651. len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
  4652. len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
  4653. memcpy(msm_stub_dai_links,
  4654. msm_stub_fe_dai_links,
  4655. sizeof(msm_stub_fe_dai_links));
  4656. memcpy(msm_stub_dai_links + len_1,
  4657. msm_stub_be_dai_links,
  4658. sizeof(msm_stub_be_dai_links));
  4659. dailink = msm_stub_dai_links;
  4660. total_links = len_2;
  4661. }
  4662. if (card) {
  4663. card->dai_link = dailink;
  4664. card->num_links = total_links;
  4665. }
  4666. return card;
  4667. }
  4668. static int msm_wsa881x_init(struct snd_soc_component *component)
  4669. {
  4670. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  4671. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  4672. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  4673. SPKR_L_BOOST, SPKR_L_VI};
  4674. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  4675. SPKR_R_BOOST, SPKR_R_VI};
  4676. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  4677. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  4678. struct msm_asoc_mach_data *pdata;
  4679. struct snd_soc_dapm_context *dapm;
  4680. struct snd_card *card;
  4681. struct snd_info_entry *entry;
  4682. int ret = 0;
  4683. if (!component) {
  4684. pr_err("%s component is NULL\n", __func__);
  4685. return -EINVAL;
  4686. }
  4687. card = component->card->snd_card;
  4688. dapm = snd_soc_component_get_dapm(component);
  4689. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  4690. dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
  4691. __func__, component->name);
  4692. wsa881x_set_channel_map(component, &spkleft_ports[0],
  4693. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  4694. &ch_rate[0], &spkleft_port_types[0]);
  4695. if (dapm->component) {
  4696. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  4697. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  4698. }
  4699. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  4700. dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
  4701. __func__, component->name);
  4702. wsa881x_set_channel_map(component, &spkright_ports[0],
  4703. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  4704. &ch_rate[0], &spkright_port_types[0]);
  4705. if (dapm->component) {
  4706. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  4707. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  4708. }
  4709. } else {
  4710. dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
  4711. component->name);
  4712. ret = -EINVAL;
  4713. goto err;
  4714. }
  4715. pdata = snd_soc_card_get_drvdata(component->card);
  4716. if (!pdata->codec_root) {
  4717. entry = snd_info_create_subdir(card->module, "codecs",
  4718. card->proc_root);
  4719. if (!entry) {
  4720. pr_err("%s: Cannot create codecs module entry\n",
  4721. __func__);
  4722. ret = 0;
  4723. goto err;
  4724. }
  4725. pdata->codec_root = entry;
  4726. }
  4727. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  4728. component);
  4729. err:
  4730. return ret;
  4731. }
  4732. static int msm_aux_codec_init(struct snd_soc_component *component)
  4733. {
  4734. struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
  4735. int ret = 0;
  4736. void *mbhc_calibration;
  4737. struct snd_info_entry *entry;
  4738. struct snd_card *card = component->card->snd_card;
  4739. struct msm_asoc_mach_data *pdata;
  4740. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  4741. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  4742. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  4743. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  4744. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  4745. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  4746. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  4747. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  4748. snd_soc_dapm_sync(dapm);
  4749. pdata = snd_soc_card_get_drvdata(component->card);
  4750. if (!pdata->codec_root) {
  4751. entry = snd_info_create_subdir(card->module, "codecs",
  4752. card->proc_root);
  4753. if (!entry) {
  4754. dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
  4755. __func__);
  4756. ret = 0;
  4757. goto mbhc_cfg_cal;
  4758. }
  4759. pdata->codec_root = entry;
  4760. }
  4761. wcd938x_info_create_codec_entry(pdata->codec_root, component);
  4762. mbhc_cfg_cal:
  4763. mbhc_calibration = def_wcd_mbhc_cal();
  4764. if (!mbhc_calibration)
  4765. return -ENOMEM;
  4766. wcd_mbhc_cfg.calibration = mbhc_calibration;
  4767. ret = wcd938x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
  4768. if (ret) {
  4769. dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
  4770. __func__, ret);
  4771. goto err_hs_detect;
  4772. }
  4773. return 0;
  4774. err_hs_detect:
  4775. kfree(mbhc_calibration);
  4776. return ret;
  4777. }
  4778. static int msm_init_aux_dev(struct platform_device *pdev,
  4779. struct snd_soc_card *card)
  4780. {
  4781. struct device_node *wsa_of_node;
  4782. struct device_node *aux_codec_of_node;
  4783. u32 wsa_max_devs;
  4784. u32 wsa_dev_cnt;
  4785. u32 codec_aux_dev_cnt = 0;
  4786. u32 bolero_codec = 0;
  4787. int i;
  4788. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  4789. struct aux_codec_dev_info *aux_cdc_dev_info;
  4790. const char *auxdev_name_prefix[1];
  4791. char *dev_name_str = NULL;
  4792. int found = 0;
  4793. int codecs_found = 0;
  4794. int ret = 0;
  4795. /* Get maximum WSA device count for this platform */
  4796. ret = of_property_read_u32(pdev->dev.of_node,
  4797. "qcom,wsa-max-devs", &wsa_max_devs);
  4798. if (ret) {
  4799. dev_info(&pdev->dev,
  4800. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  4801. __func__, pdev->dev.of_node->full_name, ret);
  4802. wsa_max_devs = 0;
  4803. goto codec_aux_dev;
  4804. }
  4805. if (wsa_max_devs == 0) {
  4806. dev_warn(&pdev->dev,
  4807. "%s: Max WSA devices is 0 for this target?\n",
  4808. __func__);
  4809. goto codec_aux_dev;
  4810. }
  4811. /* Get count of WSA device phandles for this platform */
  4812. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  4813. "qcom,wsa-devs", NULL);
  4814. if (wsa_dev_cnt == -ENOENT) {
  4815. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  4816. __func__);
  4817. goto err;
  4818. } else if (wsa_dev_cnt <= 0) {
  4819. dev_err(&pdev->dev,
  4820. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  4821. __func__, wsa_dev_cnt);
  4822. ret = -EINVAL;
  4823. goto err;
  4824. }
  4825. /*
  4826. * Expect total phandles count to be NOT less than maximum possible
  4827. * WSA count. However, if it is less, then assign same value to
  4828. * max count as well.
  4829. */
  4830. if (wsa_dev_cnt < wsa_max_devs) {
  4831. dev_dbg(&pdev->dev,
  4832. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  4833. __func__, wsa_max_devs, wsa_dev_cnt);
  4834. wsa_max_devs = wsa_dev_cnt;
  4835. }
  4836. /* Make sure prefix string passed for each WSA device */
  4837. ret = of_property_count_strings(pdev->dev.of_node,
  4838. "qcom,wsa-aux-dev-prefix");
  4839. if (ret != wsa_dev_cnt) {
  4840. dev_err(&pdev->dev,
  4841. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  4842. __func__, wsa_dev_cnt, ret);
  4843. ret = -EINVAL;
  4844. goto err;
  4845. }
  4846. /*
  4847. * Alloc mem to store phandle and index info of WSA device, if already
  4848. * registered with ALSA core
  4849. */
  4850. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  4851. sizeof(struct msm_wsa881x_dev_info),
  4852. GFP_KERNEL);
  4853. if (!wsa881x_dev_info) {
  4854. ret = -ENOMEM;
  4855. goto err;
  4856. }
  4857. /*
  4858. * search and check whether all WSA devices are already
  4859. * registered with ALSA core or not. If found a node, store
  4860. * the node and the index in a local array of struct for later
  4861. * use.
  4862. */
  4863. for (i = 0; i < wsa_dev_cnt; i++) {
  4864. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  4865. "qcom,wsa-devs", i);
  4866. if (unlikely(!wsa_of_node)) {
  4867. /* we should not be here */
  4868. dev_err(&pdev->dev,
  4869. "%s: wsa dev node is not present\n",
  4870. __func__);
  4871. ret = -EINVAL;
  4872. goto err;
  4873. }
  4874. if (soc_find_component(wsa_of_node, NULL)) {
  4875. /* WSA device registered with ALSA core */
  4876. wsa881x_dev_info[found].of_node = wsa_of_node;
  4877. wsa881x_dev_info[found].index = i;
  4878. found++;
  4879. if (found == wsa_max_devs)
  4880. break;
  4881. }
  4882. }
  4883. if (found < wsa_max_devs) {
  4884. dev_dbg(&pdev->dev,
  4885. "%s: failed to find %d components. Found only %d\n",
  4886. __func__, wsa_max_devs, found);
  4887. return -EPROBE_DEFER;
  4888. }
  4889. dev_info(&pdev->dev,
  4890. "%s: found %d wsa881x devices registered with ALSA core\n",
  4891. __func__, found);
  4892. codec_aux_dev:
  4893. ret = of_property_read_u32(pdev->dev.of_node, "qcom,bolero-codec", &bolero_codec);
  4894. if (ret)
  4895. dev_dbg(&pdev->dev, "%s: No DT match for bolero codec\n", __func__);
  4896. if (bolero_codec) {
  4897. /* Get count of aux codec device phandles for this platform */
  4898. codec_aux_dev_cnt = of_count_phandle_with_args(
  4899. pdev->dev.of_node,
  4900. "qcom,codec-aux-devs", NULL);
  4901. if (codec_aux_dev_cnt == -ENOENT) {
  4902. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  4903. __func__);
  4904. goto err;
  4905. } else if (codec_aux_dev_cnt <= 0) {
  4906. dev_err(&pdev->dev,
  4907. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  4908. __func__, codec_aux_dev_cnt);
  4909. ret = -EINVAL;
  4910. goto err;
  4911. }
  4912. /*
  4913. * Alloc mem to store phandle and index info of aux codec
  4914. * if already registered with ALSA core
  4915. */
  4916. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
  4917. sizeof(struct aux_codec_dev_info),
  4918. GFP_KERNEL);
  4919. if (!aux_cdc_dev_info) {
  4920. ret = -ENOMEM;
  4921. goto err;
  4922. }
  4923. /*
  4924. * search and check whether all aux codecs are already
  4925. * registered with ALSA core or not. If found a node, store
  4926. * the node and the index in a local array of struct for later
  4927. * use.
  4928. */
  4929. for (i = 0; i < codec_aux_dev_cnt; i++) {
  4930. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  4931. "qcom,codec-aux-devs", i);
  4932. if (unlikely(!aux_codec_of_node)) {
  4933. /* we should not be here */
  4934. dev_err(&pdev->dev,
  4935. "%s: aux codec dev node is not present\n",
  4936. __func__);
  4937. ret = -EINVAL;
  4938. goto err;
  4939. }
  4940. if (soc_find_component(aux_codec_of_node, NULL)) {
  4941. /* AUX codec registered with ALSA core */
  4942. aux_cdc_dev_info[codecs_found].of_node =
  4943. aux_codec_of_node;
  4944. aux_cdc_dev_info[codecs_found].index = i;
  4945. codecs_found++;
  4946. }
  4947. }
  4948. if (codecs_found < codec_aux_dev_cnt) {
  4949. dev_dbg(&pdev->dev,
  4950. "%s: failed to find %d components. Found only %d\n",
  4951. __func__, codec_aux_dev_cnt, codecs_found);
  4952. return -EPROBE_DEFER;
  4953. }
  4954. dev_info(&pdev->dev,
  4955. "%s: found %d AUX codecs registered with ALSA core\n",
  4956. __func__, codecs_found);
  4957. }
  4958. card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
  4959. card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
  4960. /* Alloc array of AUX devs struct */
  4961. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  4962. sizeof(struct snd_soc_aux_dev),
  4963. GFP_KERNEL);
  4964. if (!msm_aux_dev) {
  4965. ret = -ENOMEM;
  4966. goto err;
  4967. }
  4968. /* Alloc array of codec conf struct */
  4969. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  4970. sizeof(struct snd_soc_codec_conf),
  4971. GFP_KERNEL);
  4972. if (!msm_codec_conf) {
  4973. ret = -ENOMEM;
  4974. goto err;
  4975. }
  4976. for (i = 0; i < wsa_max_devs; i++) {
  4977. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  4978. GFP_KERNEL);
  4979. if (!dev_name_str) {
  4980. ret = -ENOMEM;
  4981. goto err;
  4982. }
  4983. ret = of_property_read_string_index(pdev->dev.of_node,
  4984. "qcom,wsa-aux-dev-prefix",
  4985. wsa881x_dev_info[i].index,
  4986. auxdev_name_prefix);
  4987. if (ret) {
  4988. dev_err(&pdev->dev,
  4989. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  4990. __func__, ret);
  4991. ret = -EINVAL;
  4992. goto err;
  4993. }
  4994. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  4995. msm_aux_dev[i].name = dev_name_str;
  4996. msm_aux_dev[i].codec_name = NULL;
  4997. msm_aux_dev[i].codec_of_node =
  4998. wsa881x_dev_info[i].of_node;
  4999. msm_aux_dev[i].init = msm_wsa881x_init;
  5000. msm_codec_conf[i].dev_name = NULL;
  5001. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  5002. msm_codec_conf[i].of_node =
  5003. wsa881x_dev_info[i].of_node;
  5004. }
  5005. for (i = 0; i < codec_aux_dev_cnt; i++) {
  5006. msm_aux_dev[wsa_max_devs + i].name = NULL;
  5007. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  5008. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  5009. aux_cdc_dev_info[i].of_node;
  5010. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  5011. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  5012. msm_codec_conf[wsa_max_devs + i].name_prefix =
  5013. NULL;
  5014. msm_codec_conf[wsa_max_devs + i].of_node =
  5015. aux_cdc_dev_info[i].of_node;
  5016. }
  5017. card->codec_conf = msm_codec_conf;
  5018. card->aux_dev = msm_aux_dev;
  5019. err:
  5020. return ret;
  5021. }
  5022. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  5023. {
  5024. int count = 0;
  5025. u32 mi2s_master_slave[MI2S_MAX];
  5026. int ret = 0;
  5027. for (count = 0; count < MI2S_MAX; count++) {
  5028. mutex_init(&mi2s_intf_conf[count].lock);
  5029. mi2s_intf_conf[count].ref_cnt = 0;
  5030. }
  5031. ret = of_property_read_u32_array(pdev->dev.of_node,
  5032. "qcom,msm-mi2s-master",
  5033. mi2s_master_slave, MI2S_MAX);
  5034. if (ret) {
  5035. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  5036. __func__);
  5037. } else {
  5038. for (count = 0; count < MI2S_MAX; count++) {
  5039. mi2s_intf_conf[count].msm_is_mi2s_master =
  5040. mi2s_master_slave[count];
  5041. }
  5042. }
  5043. }
  5044. static void msm_i2s_auxpcm_deinit(void)
  5045. {
  5046. int count = 0;
  5047. for (count = 0; count < MI2S_MAX; count++) {
  5048. mutex_destroy(&mi2s_intf_conf[count].lock);
  5049. mi2s_intf_conf[count].ref_cnt = 0;
  5050. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  5051. }
  5052. }
  5053. static int kona_ssr_enable(struct device *dev, void *data)
  5054. {
  5055. struct platform_device *pdev = to_platform_device(dev);
  5056. struct snd_soc_card *card = platform_get_drvdata(pdev);
  5057. int ret = 0;
  5058. if (!card) {
  5059. dev_err(dev, "%s: card is NULL\n", __func__);
  5060. ret = -EINVAL;
  5061. goto err;
  5062. }
  5063. if (!strcmp(card->name, "kona-stub-snd-card")) {
  5064. /* TODO */
  5065. dev_dbg(dev, "%s: TODO \n", __func__);
  5066. }
  5067. snd_soc_card_change_online_state(card, 1);
  5068. dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
  5069. err:
  5070. return ret;
  5071. }
  5072. static void kona_ssr_disable(struct device *dev, void *data)
  5073. {
  5074. struct platform_device *pdev = to_platform_device(dev);
  5075. struct snd_soc_card *card = platform_get_drvdata(pdev);
  5076. if (!card) {
  5077. dev_err(dev, "%s: card is NULL\n", __func__);
  5078. return;
  5079. }
  5080. dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
  5081. snd_soc_card_change_online_state(card, 0);
  5082. if (!strcmp(card->name, "kona-stub-snd-card")) {
  5083. /* TODO */
  5084. dev_dbg(dev, "%s: TODO \n", __func__);
  5085. }
  5086. }
  5087. static const struct snd_event_ops kona_ssr_ops = {
  5088. .enable = kona_ssr_enable,
  5089. .disable = kona_ssr_disable,
  5090. };
  5091. static int msm_audio_ssr_compare(struct device *dev, void *data)
  5092. {
  5093. struct device_node *node = data;
  5094. dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
  5095. __func__, dev->of_node, node);
  5096. return (dev->of_node && dev->of_node == node);
  5097. }
  5098. static int msm_audio_ssr_register(struct device *dev)
  5099. {
  5100. struct device_node *np = dev->of_node;
  5101. struct snd_event_clients *ssr_clients = NULL;
  5102. struct device_node *node = NULL;
  5103. int ret = 0;
  5104. int i = 0;
  5105. for (i = 0; ; i++) {
  5106. node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
  5107. if (!node)
  5108. break;
  5109. snd_event_mstr_add_client(&ssr_clients,
  5110. msm_audio_ssr_compare, node);
  5111. }
  5112. ret = snd_event_master_register(dev, &kona_ssr_ops,
  5113. ssr_clients, NULL);
  5114. if (!ret)
  5115. snd_event_notify(dev, SND_EVENT_UP);
  5116. return ret;
  5117. }
  5118. static int msm_asoc_machine_probe(struct platform_device *pdev)
  5119. {
  5120. struct snd_soc_card *card = NULL;
  5121. struct msm_asoc_mach_data *pdata = NULL;
  5122. const char *mbhc_audio_jack_type = NULL;
  5123. int ret = 0;
  5124. if (!pdev->dev.of_node) {
  5125. dev_err(&pdev->dev, "%s: No platform supplied from device tree\n", __func__);
  5126. return -EINVAL;
  5127. }
  5128. pdata = devm_kzalloc(&pdev->dev,
  5129. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  5130. if (!pdata)
  5131. return -ENOMEM;
  5132. card = populate_snd_card_dailinks(&pdev->dev);
  5133. if (!card) {
  5134. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  5135. ret = -EINVAL;
  5136. goto err;
  5137. }
  5138. card->dev = &pdev->dev;
  5139. platform_set_drvdata(pdev, card);
  5140. snd_soc_card_set_drvdata(card, pdata);
  5141. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  5142. if (ret) {
  5143. dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
  5144. __func__, ret);
  5145. goto err;
  5146. }
  5147. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  5148. if (ret) {
  5149. dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
  5150. __func__, ret);
  5151. goto err;
  5152. }
  5153. ret = msm_populate_dai_link_component_of_node(card);
  5154. if (ret) {
  5155. ret = -EPROBE_DEFER;
  5156. goto err;
  5157. }
  5158. ret = msm_init_aux_dev(pdev, card);
  5159. if (ret)
  5160. goto err;
  5161. ret = devm_snd_soc_register_card(&pdev->dev, card);
  5162. if (ret == -EPROBE_DEFER) {
  5163. if (codec_reg_done)
  5164. ret = -EINVAL;
  5165. goto err;
  5166. } else if (ret) {
  5167. dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
  5168. __func__, ret);
  5169. goto err;
  5170. }
  5171. dev_info(&pdev->dev, "%s: Sound card %s registered\n",
  5172. __func__, card->name);
  5173. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5174. "qcom,hph-en1-gpio", 0);
  5175. if (!pdata->hph_en1_gpio_p) {
  5176. dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
  5177. __func__, "qcom,hph-en1-gpio",
  5178. pdev->dev.of_node->full_name);
  5179. }
  5180. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5181. "qcom,hph-en0-gpio", 0);
  5182. if (!pdata->hph_en0_gpio_p) {
  5183. dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
  5184. __func__, "qcom,hph-en0-gpio",
  5185. pdev->dev.of_node->full_name);
  5186. }
  5187. ret = of_property_read_string(pdev->dev.of_node,
  5188. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  5189. if (ret) {
  5190. dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
  5191. __func__, "qcom,mbhc-audio-jack-type",
  5192. pdev->dev.of_node->full_name);
  5193. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  5194. } else {
  5195. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  5196. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  5197. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  5198. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  5199. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  5200. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  5201. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  5202. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  5203. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  5204. } else {
  5205. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  5206. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  5207. }
  5208. }
  5209. /*
  5210. * Parse US-Euro gpio info from DT. Report no error if us-euro
  5211. * entry is not found in DT file as some targets do not support
  5212. * US-Euro detection
  5213. */
  5214. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5215. "qcom,us-euro-gpios", 0);
  5216. if (!pdata->us_euro_gpio_p) {
  5217. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  5218. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  5219. } else {
  5220. dev_dbg(&pdev->dev, "%s detected\n",
  5221. "qcom,us-euro-gpios");
  5222. wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  5223. }
  5224. msm_i2s_auxpcm_init(pdev);
  5225. if (strcmp(card->name, "kona-mtp-snd-card")) {
  5226. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5227. "qcom,cdc-dmic01-gpios",
  5228. 0);
  5229. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5230. "qcom,cdc-dmic23-gpios",
  5231. 0);
  5232. pdata->dmic45_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5233. "qcom,cdc-dmic45-gpios",
  5234. 0);
  5235. }
  5236. ret = msm_audio_ssr_register(&pdev->dev);
  5237. if (ret)
  5238. pr_err("%s: Registration with SND event FWK failed ret = %d\n",
  5239. __func__, ret);
  5240. is_initial_boot = true;
  5241. return 0;
  5242. err:
  5243. devm_kfree(&pdev->dev, pdata);
  5244. return ret;
  5245. }
  5246. static int msm_asoc_machine_remove(struct platform_device *pdev)
  5247. {
  5248. struct snd_soc_card *card = platform_get_drvdata(pdev);
  5249. snd_event_master_deregister(&pdev->dev);
  5250. snd_soc_unregister_card(card);
  5251. msm_i2s_auxpcm_deinit();
  5252. return 0;
  5253. }
  5254. static struct platform_driver kona_asoc_machine_driver = {
  5255. .driver = {
  5256. .name = DRV_NAME,
  5257. .owner = THIS_MODULE,
  5258. .pm = &snd_soc_pm_ops,
  5259. .of_match_table = kona_asoc_machine_of_match,
  5260. },
  5261. .probe = msm_asoc_machine_probe,
  5262. .remove = msm_asoc_machine_remove,
  5263. };
  5264. module_platform_driver(kona_asoc_machine_driver);
  5265. MODULE_DESCRIPTION("ALSA SoC msm");
  5266. MODULE_LICENSE("GPL v2");
  5267. MODULE_ALIAS("platform:" DRV_NAME);
  5268. MODULE_DEVICE_TABLE(of, kona_asoc_machine_of_match);