dsi_panel.c 106 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. #include "sde_dsc_helper.h"
  15. #include "sde_vdc_helper.h"
  16. /**
  17. * topology is currently defined by a set of following 3 values:
  18. * 1. num of layer mixers
  19. * 2. num of compression encoders
  20. * 3. num of interfaces
  21. */
  22. #define TOPOLOGY_SET_LEN 3
  23. #define MAX_TOPOLOGY 5
  24. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  25. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  26. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  27. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  28. #define MAX_PANEL_JITTER 10
  29. #define DEFAULT_PANEL_PREFILL_LINES 25
  30. #define MIN_PREFILL_LINES 35
  31. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  32. {
  33. char *bp;
  34. bp = buf;
  35. /* First 7 bytes are cmd header */
  36. *bp++ = 0x0A;
  37. *bp++ = 1;
  38. *bp++ = 0;
  39. *bp++ = 0;
  40. *bp++ = pps_delay_ms;
  41. *bp++ = 0;
  42. *bp++ = 128;
  43. }
  44. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  45. char *buf, int pps_id, u32 size)
  46. {
  47. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  48. buf += DSI_CMD_PPS_HDR_SIZE;
  49. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  50. size);
  51. }
  52. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  53. char *buf, int pps_id, u32 size)
  54. {
  55. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  56. buf += DSI_CMD_PPS_HDR_SIZE;
  57. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  58. size);
  59. }
  60. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  61. {
  62. int rc = 0;
  63. int i;
  64. struct regulator *vreg = NULL;
  65. for (i = 0; i < panel->power_info.count; i++) {
  66. vreg = devm_regulator_get(panel->parent,
  67. panel->power_info.vregs[i].vreg_name);
  68. rc = PTR_RET(vreg);
  69. if (rc) {
  70. DSI_ERR("failed to get %s regulator\n",
  71. panel->power_info.vregs[i].vreg_name);
  72. goto error_put;
  73. }
  74. panel->power_info.vregs[i].vreg = vreg;
  75. }
  76. return rc;
  77. error_put:
  78. for (i = i - 1; i >= 0; i--) {
  79. devm_regulator_put(panel->power_info.vregs[i].vreg);
  80. panel->power_info.vregs[i].vreg = NULL;
  81. }
  82. return rc;
  83. }
  84. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  85. {
  86. int rc = 0;
  87. int i;
  88. for (i = panel->power_info.count - 1; i >= 0; i--)
  89. devm_regulator_put(panel->power_info.vregs[i].vreg);
  90. return rc;
  91. }
  92. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  93. {
  94. int rc = 0;
  95. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  96. if (gpio_is_valid(r_config->reset_gpio)) {
  97. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  98. if (rc) {
  99. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  100. goto error;
  101. }
  102. }
  103. if (gpio_is_valid(r_config->disp_en_gpio)) {
  104. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  105. if (rc) {
  106. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  107. goto error_release_reset;
  108. }
  109. }
  110. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  111. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  112. if (rc) {
  113. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  114. goto error_release_disp_en;
  115. }
  116. }
  117. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  118. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  119. if (rc) {
  120. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  121. goto error_release_mode_sel;
  122. }
  123. }
  124. if (gpio_is_valid(panel->panel_test_gpio)) {
  125. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  126. if (rc) {
  127. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  128. rc);
  129. panel->panel_test_gpio = -1;
  130. rc = 0;
  131. }
  132. }
  133. goto error;
  134. error_release_mode_sel:
  135. if (gpio_is_valid(panel->bl_config.en_gpio))
  136. gpio_free(panel->bl_config.en_gpio);
  137. error_release_disp_en:
  138. if (gpio_is_valid(r_config->disp_en_gpio))
  139. gpio_free(r_config->disp_en_gpio);
  140. error_release_reset:
  141. if (gpio_is_valid(r_config->reset_gpio))
  142. gpio_free(r_config->reset_gpio);
  143. error:
  144. return rc;
  145. }
  146. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  147. {
  148. int rc = 0;
  149. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  150. if (gpio_is_valid(r_config->reset_gpio))
  151. gpio_free(r_config->reset_gpio);
  152. if (gpio_is_valid(r_config->disp_en_gpio))
  153. gpio_free(r_config->disp_en_gpio);
  154. if (gpio_is_valid(panel->bl_config.en_gpio))
  155. gpio_free(panel->bl_config.en_gpio);
  156. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  157. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  158. if (gpio_is_valid(panel->panel_test_gpio))
  159. gpio_free(panel->panel_test_gpio);
  160. return rc;
  161. }
  162. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  163. {
  164. struct dsi_panel_reset_config *r_config;
  165. if (!panel) {
  166. DSI_ERR("Invalid panel param\n");
  167. return -EINVAL;
  168. }
  169. r_config = &panel->reset_config;
  170. if (!r_config) {
  171. DSI_ERR("Invalid panel reset configuration\n");
  172. return -EINVAL;
  173. }
  174. if (gpio_is_valid(r_config->reset_gpio)) {
  175. gpio_set_value(r_config->reset_gpio, 0);
  176. DSI_INFO("GPIO pulled low to simulate ESD\n");
  177. return 0;
  178. }
  179. DSI_ERR("failed to pull down gpio\n");
  180. return -EINVAL;
  181. }
  182. static int dsi_panel_reset(struct dsi_panel *panel)
  183. {
  184. int rc = 0;
  185. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  186. int i;
  187. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  188. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  189. if (rc) {
  190. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  191. goto exit;
  192. }
  193. }
  194. if (r_config->count) {
  195. rc = gpio_direction_output(r_config->reset_gpio,
  196. r_config->sequence[0].level);
  197. if (rc) {
  198. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  199. goto exit;
  200. }
  201. }
  202. for (i = 0; i < r_config->count; i++) {
  203. gpio_set_value(r_config->reset_gpio,
  204. r_config->sequence[i].level);
  205. if (r_config->sequence[i].sleep_ms)
  206. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  207. (r_config->sequence[i].sleep_ms * 1000) + 100);
  208. }
  209. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  210. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  211. if (rc)
  212. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  213. }
  214. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  215. bool out = true;
  216. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  217. || (panel->reset_config.mode_sel_state
  218. == MODE_GPIO_LOW))
  219. out = false;
  220. else if ((panel->reset_config.mode_sel_state
  221. == MODE_SEL_SINGLE_PORT) ||
  222. (panel->reset_config.mode_sel_state
  223. == MODE_GPIO_HIGH))
  224. out = true;
  225. rc = gpio_direction_output(
  226. panel->reset_config.lcd_mode_sel_gpio, out);
  227. if (rc)
  228. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  229. }
  230. if (gpio_is_valid(panel->panel_test_gpio)) {
  231. rc = gpio_direction_input(panel->panel_test_gpio);
  232. if (rc)
  233. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  234. rc);
  235. }
  236. exit:
  237. return rc;
  238. }
  239. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  240. {
  241. int rc = 0;
  242. struct pinctrl_state *state;
  243. if (panel->host_config.ext_bridge_mode)
  244. return 0;
  245. if (enable)
  246. state = panel->pinctrl.active;
  247. else
  248. state = panel->pinctrl.suspend;
  249. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  250. if (rc)
  251. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  252. panel->name, rc);
  253. return rc;
  254. }
  255. static int dsi_panel_power_on(struct dsi_panel *panel)
  256. {
  257. int rc = 0;
  258. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  259. if (rc) {
  260. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  261. panel->name, rc);
  262. goto exit;
  263. }
  264. rc = dsi_panel_set_pinctrl_state(panel, true);
  265. if (rc) {
  266. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  267. goto error_disable_vregs;
  268. }
  269. rc = dsi_panel_reset(panel);
  270. if (rc) {
  271. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  272. goto error_disable_gpio;
  273. }
  274. goto exit;
  275. error_disable_gpio:
  276. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  277. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  278. if (gpio_is_valid(panel->bl_config.en_gpio))
  279. gpio_set_value(panel->bl_config.en_gpio, 0);
  280. (void)dsi_panel_set_pinctrl_state(panel, false);
  281. error_disable_vregs:
  282. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  283. exit:
  284. return rc;
  285. }
  286. static int dsi_panel_power_off(struct dsi_panel *panel)
  287. {
  288. int rc = 0;
  289. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  290. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  291. if (gpio_is_valid(panel->reset_config.reset_gpio))
  292. gpio_set_value(panel->reset_config.reset_gpio, 0);
  293. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  294. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  295. if (gpio_is_valid(panel->panel_test_gpio)) {
  296. rc = gpio_direction_input(panel->panel_test_gpio);
  297. if (rc)
  298. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  299. rc);
  300. }
  301. rc = dsi_panel_set_pinctrl_state(panel, false);
  302. if (rc) {
  303. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  304. rc);
  305. }
  306. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  307. if (rc)
  308. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  309. panel->name, rc);
  310. return rc;
  311. }
  312. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  313. enum dsi_cmd_set_type type)
  314. {
  315. int rc = 0, i = 0;
  316. ssize_t len;
  317. struct dsi_cmd_desc *cmds;
  318. u32 count;
  319. enum dsi_cmd_set_state state;
  320. struct dsi_display_mode *mode;
  321. const struct mipi_dsi_host_ops *ops = panel->host->ops;
  322. if (!panel || !panel->cur_mode)
  323. return -EINVAL;
  324. mode = panel->cur_mode;
  325. cmds = mode->priv_info->cmd_sets[type].cmds;
  326. count = mode->priv_info->cmd_sets[type].count;
  327. state = mode->priv_info->cmd_sets[type].state;
  328. if (count == 0) {
  329. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  330. panel->name, type);
  331. goto error;
  332. }
  333. for (i = 0; i < count; i++) {
  334. if (state == DSI_CMD_SET_STATE_LP)
  335. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  336. if (cmds->last_command)
  337. cmds->msg.flags |= MIPI_DSI_MSG_LASTCOMMAND;
  338. len = ops->transfer(panel->host, &cmds->msg);
  339. if (len < 0) {
  340. rc = len;
  341. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  342. goto error;
  343. }
  344. if (cmds->post_wait_ms)
  345. usleep_range(cmds->post_wait_ms*1000,
  346. ((cmds->post_wait_ms*1000)+10));
  347. cmds++;
  348. }
  349. error:
  350. return rc;
  351. }
  352. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  353. {
  354. int rc = 0;
  355. if (panel->host_config.ext_bridge_mode)
  356. return 0;
  357. devm_pinctrl_put(panel->pinctrl.pinctrl);
  358. return rc;
  359. }
  360. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  361. {
  362. int rc = 0;
  363. if (panel->host_config.ext_bridge_mode)
  364. return 0;
  365. /* TODO: pinctrl is defined in dsi dt node */
  366. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  367. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  368. rc = PTR_ERR(panel->pinctrl.pinctrl);
  369. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  370. goto error;
  371. }
  372. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  373. "panel_active");
  374. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  375. rc = PTR_ERR(panel->pinctrl.active);
  376. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  377. goto error;
  378. }
  379. panel->pinctrl.suspend =
  380. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  381. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  382. rc = PTR_ERR(panel->pinctrl.suspend);
  383. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  384. goto error;
  385. }
  386. error:
  387. return rc;
  388. }
  389. static int dsi_panel_wled_register(struct dsi_panel *panel,
  390. struct dsi_backlight_config *bl)
  391. {
  392. struct backlight_device *bd;
  393. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  394. if (!bd) {
  395. DSI_ERR("[%s] fail raw backlight register\n", panel->name);
  396. return -EPROBE_DEFER;
  397. }
  398. bl->raw_bd = bd;
  399. return 0;
  400. }
  401. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  402. u32 bl_lvl)
  403. {
  404. int rc = 0;
  405. struct mipi_dsi_device *dsi;
  406. if (!panel || (bl_lvl > 0xffff)) {
  407. DSI_ERR("invalid params\n");
  408. return -EINVAL;
  409. }
  410. dsi = &panel->mipi_device;
  411. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  412. if (rc < 0)
  413. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  414. return rc;
  415. }
  416. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  417. u32 bl_lvl)
  418. {
  419. int rc = 0;
  420. u32 duty = 0;
  421. u32 period_ns = 0;
  422. struct dsi_backlight_config *bl;
  423. if (!panel) {
  424. DSI_ERR("Invalid Params\n");
  425. return -EINVAL;
  426. }
  427. bl = &panel->bl_config;
  428. if (!bl->pwm_bl) {
  429. DSI_ERR("pwm device not found\n");
  430. return -EINVAL;
  431. }
  432. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  433. duty = bl_lvl * period_ns;
  434. duty /= bl->bl_max_level;
  435. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  436. if (rc) {
  437. DSI_ERR("[%s] failed to change pwm config, rc=\n", panel->name,
  438. rc);
  439. goto error;
  440. }
  441. if (bl_lvl == 0 && bl->pwm_enabled) {
  442. pwm_disable(bl->pwm_bl);
  443. bl->pwm_enabled = false;
  444. return 0;
  445. }
  446. if (!bl->pwm_enabled) {
  447. rc = pwm_enable(bl->pwm_bl);
  448. if (rc) {
  449. DSI_ERR("[%s] failed to enable pwm, rc=\n", panel->name,
  450. rc);
  451. goto error;
  452. }
  453. bl->pwm_enabled = true;
  454. }
  455. error:
  456. return rc;
  457. }
  458. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  459. {
  460. int rc = 0;
  461. struct dsi_backlight_config *bl = &panel->bl_config;
  462. if (panel->host_config.ext_bridge_mode)
  463. return 0;
  464. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  465. switch (bl->type) {
  466. case DSI_BACKLIGHT_WLED:
  467. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  468. break;
  469. case DSI_BACKLIGHT_DCS:
  470. rc = dsi_panel_update_backlight(panel, bl_lvl);
  471. break;
  472. case DSI_BACKLIGHT_EXTERNAL:
  473. break;
  474. case DSI_BACKLIGHT_PWM:
  475. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  476. break;
  477. default:
  478. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  479. rc = -ENOTSUPP;
  480. }
  481. return rc;
  482. }
  483. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  484. {
  485. u32 cur_bl_level;
  486. struct backlight_device *bd = bl->raw_bd;
  487. /* default the brightness level to 50% */
  488. cur_bl_level = bl->bl_max_level >> 1;
  489. switch (bl->type) {
  490. case DSI_BACKLIGHT_WLED:
  491. /* Try to query the backlight level from the backlight device */
  492. if (bd->ops && bd->ops->get_brightness)
  493. cur_bl_level = bd->ops->get_brightness(bd);
  494. break;
  495. case DSI_BACKLIGHT_DCS:
  496. case DSI_BACKLIGHT_EXTERNAL:
  497. case DSI_BACKLIGHT_PWM:
  498. default:
  499. /*
  500. * Ideally, we should read the backlight level from the
  501. * panel. For now, just set it default value.
  502. */
  503. break;
  504. }
  505. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  506. return cur_bl_level;
  507. }
  508. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  509. {
  510. struct dsi_backlight_config *bl = &panel->bl_config;
  511. bl->bl_level = dsi_panel_get_brightness(bl);
  512. }
  513. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  514. {
  515. int rc = 0;
  516. struct dsi_backlight_config *bl = &panel->bl_config;
  517. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  518. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  519. rc = PTR_ERR(bl->pwm_bl);
  520. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  521. rc);
  522. return rc;
  523. }
  524. return 0;
  525. }
  526. static int dsi_panel_bl_register(struct dsi_panel *panel)
  527. {
  528. int rc = 0;
  529. struct dsi_backlight_config *bl = &panel->bl_config;
  530. if (panel->host_config.ext_bridge_mode)
  531. return 0;
  532. switch (bl->type) {
  533. case DSI_BACKLIGHT_WLED:
  534. rc = dsi_panel_wled_register(panel, bl);
  535. break;
  536. case DSI_BACKLIGHT_DCS:
  537. break;
  538. case DSI_BACKLIGHT_EXTERNAL:
  539. break;
  540. case DSI_BACKLIGHT_PWM:
  541. rc = dsi_panel_pwm_register(panel);
  542. break;
  543. default:
  544. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  545. rc = -ENOTSUPP;
  546. goto error;
  547. }
  548. error:
  549. return rc;
  550. }
  551. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  552. {
  553. struct dsi_backlight_config *bl = &panel->bl_config;
  554. devm_pwm_put(panel->parent, bl->pwm_bl);
  555. }
  556. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  557. {
  558. int rc = 0;
  559. struct dsi_backlight_config *bl = &panel->bl_config;
  560. if (panel->host_config.ext_bridge_mode)
  561. return 0;
  562. switch (bl->type) {
  563. case DSI_BACKLIGHT_WLED:
  564. break;
  565. case DSI_BACKLIGHT_DCS:
  566. break;
  567. case DSI_BACKLIGHT_EXTERNAL:
  568. break;
  569. case DSI_BACKLIGHT_PWM:
  570. dsi_panel_pwm_unregister(panel);
  571. break;
  572. default:
  573. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  574. rc = -ENOTSUPP;
  575. goto error;
  576. }
  577. error:
  578. return rc;
  579. }
  580. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  581. struct dsi_parser_utils *utils)
  582. {
  583. int rc = 0;
  584. u64 tmp64 = 0;
  585. struct dsi_display_mode *display_mode;
  586. struct dsi_display_mode_priv_info *priv_info;
  587. display_mode = container_of(mode, struct dsi_display_mode, timing);
  588. priv_info = display_mode->priv_info;
  589. rc = utils->read_u64(utils->data,
  590. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  591. if (rc == -EOVERFLOW) {
  592. tmp64 = 0;
  593. rc = utils->read_u32(utils->data,
  594. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  595. }
  596. mode->clk_rate_hz = !rc ? tmp64 : 0;
  597. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  598. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  599. &mode->mdp_transfer_time_us);
  600. if (!rc)
  601. display_mode->priv_info->mdp_transfer_time_us =
  602. mode->mdp_transfer_time_us;
  603. else
  604. display_mode->priv_info->mdp_transfer_time_us = 0;
  605. rc = utils->read_u32(utils->data,
  606. "qcom,mdss-dsi-panel-framerate",
  607. &mode->refresh_rate);
  608. if (rc) {
  609. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  610. rc);
  611. goto error;
  612. }
  613. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  614. &mode->h_active);
  615. if (rc) {
  616. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  617. rc);
  618. goto error;
  619. }
  620. rc = utils->read_u32(utils->data,
  621. "qcom,mdss-dsi-h-front-porch",
  622. &mode->h_front_porch);
  623. if (rc) {
  624. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  625. rc);
  626. goto error;
  627. }
  628. rc = utils->read_u32(utils->data,
  629. "qcom,mdss-dsi-h-back-porch",
  630. &mode->h_back_porch);
  631. if (rc) {
  632. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  633. rc);
  634. goto error;
  635. }
  636. rc = utils->read_u32(utils->data,
  637. "qcom,mdss-dsi-h-pulse-width",
  638. &mode->h_sync_width);
  639. if (rc) {
  640. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  641. rc);
  642. goto error;
  643. }
  644. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  645. &mode->h_skew);
  646. if (rc)
  647. DSI_ERR("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  648. rc);
  649. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  650. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  651. mode->h_sync_width);
  652. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  653. &mode->v_active);
  654. if (rc) {
  655. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  656. rc);
  657. goto error;
  658. }
  659. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  660. &mode->v_back_porch);
  661. if (rc) {
  662. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  663. rc);
  664. goto error;
  665. }
  666. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  667. &mode->v_front_porch);
  668. if (rc) {
  669. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  670. rc);
  671. goto error;
  672. }
  673. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  674. &mode->v_sync_width);
  675. if (rc) {
  676. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  677. rc);
  678. goto error;
  679. }
  680. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  681. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  682. mode->v_sync_width);
  683. error:
  684. return rc;
  685. }
  686. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  687. struct dsi_parser_utils *utils,
  688. const char *name)
  689. {
  690. int rc = 0;
  691. u32 bpp = 0;
  692. enum dsi_pixel_format fmt;
  693. const char *packing;
  694. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  695. if (rc) {
  696. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  697. name, rc);
  698. return rc;
  699. }
  700. host->bpp = bpp;
  701. switch (bpp) {
  702. case 3:
  703. fmt = DSI_PIXEL_FORMAT_RGB111;
  704. break;
  705. case 8:
  706. fmt = DSI_PIXEL_FORMAT_RGB332;
  707. break;
  708. case 12:
  709. fmt = DSI_PIXEL_FORMAT_RGB444;
  710. break;
  711. case 16:
  712. fmt = DSI_PIXEL_FORMAT_RGB565;
  713. break;
  714. case 18:
  715. fmt = DSI_PIXEL_FORMAT_RGB666;
  716. break;
  717. case 24:
  718. default:
  719. fmt = DSI_PIXEL_FORMAT_RGB888;
  720. break;
  721. }
  722. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  723. packing = utils->get_property(utils->data,
  724. "qcom,mdss-dsi-pixel-packing",
  725. NULL);
  726. if (packing && !strcmp(packing, "loose"))
  727. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  728. }
  729. host->dst_format = fmt;
  730. return rc;
  731. }
  732. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  733. struct dsi_parser_utils *utils,
  734. const char *name)
  735. {
  736. int rc = 0;
  737. bool lane_enabled;
  738. u32 num_of_lanes = 0;
  739. lane_enabled = utils->read_bool(utils->data,
  740. "qcom,mdss-dsi-lane-0-state");
  741. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  742. lane_enabled = utils->read_bool(utils->data,
  743. "qcom,mdss-dsi-lane-1-state");
  744. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  745. lane_enabled = utils->read_bool(utils->data,
  746. "qcom,mdss-dsi-lane-2-state");
  747. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  748. lane_enabled = utils->read_bool(utils->data,
  749. "qcom,mdss-dsi-lane-3-state");
  750. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  751. if (host->data_lanes & DSI_DATA_LANE_0)
  752. num_of_lanes++;
  753. if (host->data_lanes & DSI_DATA_LANE_1)
  754. num_of_lanes++;
  755. if (host->data_lanes & DSI_DATA_LANE_2)
  756. num_of_lanes++;
  757. if (host->data_lanes & DSI_DATA_LANE_3)
  758. num_of_lanes++;
  759. host->num_data_lanes = num_of_lanes;
  760. if (host->data_lanes == 0) {
  761. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  762. rc = -EINVAL;
  763. }
  764. return rc;
  765. }
  766. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  767. struct dsi_parser_utils *utils,
  768. const char *name)
  769. {
  770. int rc = 0;
  771. const char *swap_mode;
  772. swap_mode = utils->get_property(utils->data,
  773. "qcom,mdss-dsi-color-order", NULL);
  774. if (swap_mode) {
  775. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  776. host->swap_mode = DSI_COLOR_SWAP_RGB;
  777. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  778. host->swap_mode = DSI_COLOR_SWAP_RBG;
  779. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  780. host->swap_mode = DSI_COLOR_SWAP_BRG;
  781. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  782. host->swap_mode = DSI_COLOR_SWAP_GRB;
  783. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  784. host->swap_mode = DSI_COLOR_SWAP_GBR;
  785. } else {
  786. DSI_ERR("[%s] Unrecognized color order-%s\n",
  787. name, swap_mode);
  788. rc = -EINVAL;
  789. }
  790. } else {
  791. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  792. host->swap_mode = DSI_COLOR_SWAP_RGB;
  793. }
  794. /* bit swap on color channel is not defined in dt */
  795. host->bit_swap_red = false;
  796. host->bit_swap_green = false;
  797. host->bit_swap_blue = false;
  798. return rc;
  799. }
  800. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  801. struct dsi_parser_utils *utils,
  802. const char *name)
  803. {
  804. const char *trig;
  805. int rc = 0;
  806. trig = utils->get_property(utils->data,
  807. "qcom,mdss-dsi-mdp-trigger", NULL);
  808. if (trig) {
  809. if (!strcmp(trig, "none")) {
  810. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  811. } else if (!strcmp(trig, "trigger_te")) {
  812. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  813. } else if (!strcmp(trig, "trigger_sw")) {
  814. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  815. } else if (!strcmp(trig, "trigger_sw_te")) {
  816. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  817. } else {
  818. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  819. name, trig);
  820. rc = -EINVAL;
  821. }
  822. } else {
  823. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  824. name);
  825. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  826. }
  827. trig = utils->get_property(utils->data,
  828. "qcom,mdss-dsi-dma-trigger", NULL);
  829. if (trig) {
  830. if (!strcmp(trig, "none")) {
  831. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  832. } else if (!strcmp(trig, "trigger_te")) {
  833. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  834. } else if (!strcmp(trig, "trigger_sw")) {
  835. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  836. } else if (!strcmp(trig, "trigger_sw_seof")) {
  837. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  838. } else if (!strcmp(trig, "trigger_sw_te")) {
  839. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  840. } else {
  841. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  842. name, trig);
  843. rc = -EINVAL;
  844. }
  845. } else {
  846. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  847. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  848. }
  849. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  850. &host->te_mode);
  851. if (rc) {
  852. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  853. host->te_mode = 1;
  854. rc = 0;
  855. }
  856. return rc;
  857. }
  858. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  859. struct dsi_parser_utils *utils,
  860. const char *name)
  861. {
  862. u32 val = 0;
  863. int rc = 0;
  864. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  865. if (!rc) {
  866. host->t_clk_post = val;
  867. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  868. }
  869. val = 0;
  870. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  871. if (!rc) {
  872. host->t_clk_pre = val;
  873. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  874. }
  875. host->ignore_rx_eot = utils->read_bool(utils->data,
  876. "qcom,mdss-dsi-rx-eot-ignore");
  877. host->append_tx_eot = utils->read_bool(utils->data,
  878. "qcom,mdss-dsi-tx-eot-append");
  879. host->ext_bridge_mode = utils->read_bool(utils->data,
  880. "qcom,mdss-dsi-ext-bridge-mode");
  881. host->force_hs_clk_lane = utils->read_bool(utils->data,
  882. "qcom,mdss-dsi-force-clock-lane-hs");
  883. return 0;
  884. }
  885. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  886. struct dsi_parser_utils *utils,
  887. const char *name)
  888. {
  889. int rc = 0;
  890. u32 val = 0;
  891. bool supported = false;
  892. struct dsi_split_link_config *split_link = &host->split_link;
  893. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  894. if (!supported) {
  895. DSI_DEBUG("[%s] Split link is not supported\n", name);
  896. split_link->split_link_enabled = false;
  897. return;
  898. }
  899. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  900. if (rc || val < 1) {
  901. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  902. split_link->num_sublinks = 2;
  903. } else {
  904. split_link->num_sublinks = val;
  905. }
  906. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  907. if (rc || val < 1) {
  908. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  909. split_link->lanes_per_sublink = 2;
  910. } else {
  911. split_link->lanes_per_sublink = val;
  912. }
  913. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  914. split_link->num_sublinks, split_link->lanes_per_sublink);
  915. split_link->split_link_enabled = true;
  916. }
  917. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  918. {
  919. int rc = 0;
  920. struct dsi_parser_utils *utils = &panel->utils;
  921. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  922. panel->name);
  923. if (rc) {
  924. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  925. panel->name, rc);
  926. goto error;
  927. }
  928. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  929. panel->name);
  930. if (rc) {
  931. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  932. panel->name, rc);
  933. goto error;
  934. }
  935. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  936. panel->name);
  937. if (rc) {
  938. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  939. panel->name, rc);
  940. goto error;
  941. }
  942. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  943. panel->name);
  944. if (rc) {
  945. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  946. panel->name, rc);
  947. goto error;
  948. }
  949. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  950. panel->name);
  951. if (rc) {
  952. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  953. panel->name, rc);
  954. goto error;
  955. }
  956. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  957. panel->name);
  958. error:
  959. return rc;
  960. }
  961. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  962. struct device_node *of_node)
  963. {
  964. int rc = 0;
  965. u32 val = 0;
  966. rc = of_property_read_u32(of_node,
  967. "qcom,mdss-dsi-qsync-min-refresh-rate",
  968. &val);
  969. if (rc)
  970. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  971. panel->name, rc);
  972. panel->qsync_min_fps = val;
  973. return rc;
  974. }
  975. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  976. {
  977. int rc = 0;
  978. bool supported = false;
  979. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  980. struct dsi_parser_utils *utils = &panel->utils;
  981. const char *name = panel->name;
  982. const char *type;
  983. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  984. if (!supported) {
  985. dyn_clk_caps->dyn_clk_support = false;
  986. return rc;
  987. }
  988. dyn_clk_caps->bit_clk_list_len = utils->count_u32_elems(utils->data,
  989. "qcom,dsi-dyn-clk-list");
  990. if (dyn_clk_caps->bit_clk_list_len < 1) {
  991. DSI_ERR("[%s] failed to get supported bit clk list\n", name);
  992. return -EINVAL;
  993. }
  994. dyn_clk_caps->bit_clk_list = kcalloc(dyn_clk_caps->bit_clk_list_len,
  995. sizeof(u32), GFP_KERNEL);
  996. if (!dyn_clk_caps->bit_clk_list)
  997. return -ENOMEM;
  998. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  999. dyn_clk_caps->bit_clk_list,
  1000. dyn_clk_caps->bit_clk_list_len);
  1001. if (rc) {
  1002. DSI_ERR("[%s] failed to parse supported bit clk list\n", name);
  1003. return -EINVAL;
  1004. }
  1005. dyn_clk_caps->dyn_clk_support = true;
  1006. type = utils->get_property(utils->data,
  1007. "qcom,dsi-dyn-clk-type", NULL);
  1008. if (!type) {
  1009. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1010. dyn_clk_caps->maintain_const_fps = false;
  1011. return 0;
  1012. }
  1013. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1014. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1015. dyn_clk_caps->maintain_const_fps = true;
  1016. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1017. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1018. dyn_clk_caps->maintain_const_fps = true;
  1019. } else {
  1020. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1021. dyn_clk_caps->maintain_const_fps = false;
  1022. }
  1023. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1024. return 0;
  1025. }
  1026. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1027. {
  1028. int rc = 0;
  1029. bool supported = false;
  1030. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1031. struct dsi_parser_utils *utils = &panel->utils;
  1032. const char *name = panel->name;
  1033. const char *type;
  1034. u32 i;
  1035. supported = utils->read_bool(utils->data,
  1036. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1037. if (!supported) {
  1038. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1039. dfps_caps->dfps_support = false;
  1040. return rc;
  1041. }
  1042. type = utils->get_property(utils->data,
  1043. "qcom,mdss-dsi-pan-fps-update", NULL);
  1044. if (!type) {
  1045. DSI_ERR("[%s] dfps type not defined\n", name);
  1046. rc = -EINVAL;
  1047. goto error;
  1048. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1049. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1050. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1051. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1052. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1053. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1054. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1055. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1056. } else {
  1057. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1058. rc = -EINVAL;
  1059. goto error;
  1060. }
  1061. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1062. "qcom,dsi-supported-dfps-list");
  1063. if (dfps_caps->dfps_list_len < 1) {
  1064. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1065. rc = -EINVAL;
  1066. goto error;
  1067. }
  1068. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1069. GFP_KERNEL);
  1070. if (!dfps_caps->dfps_list) {
  1071. rc = -ENOMEM;
  1072. goto error;
  1073. }
  1074. rc = utils->read_u32_array(utils->data,
  1075. "qcom,dsi-supported-dfps-list",
  1076. dfps_caps->dfps_list,
  1077. dfps_caps->dfps_list_len);
  1078. if (rc) {
  1079. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1080. rc = -EINVAL;
  1081. goto error;
  1082. }
  1083. dfps_caps->dfps_support = true;
  1084. /* calculate max and min fps */
  1085. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1086. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1087. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1088. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1089. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1090. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1091. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1092. }
  1093. error:
  1094. return rc;
  1095. }
  1096. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1097. struct dsi_parser_utils *utils,
  1098. const char *name)
  1099. {
  1100. int rc = 0;
  1101. const char *traffic_mode;
  1102. u32 vc_id = 0;
  1103. u32 val = 0;
  1104. u32 line_no = 0;
  1105. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1106. if (rc) {
  1107. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1108. cfg->pulse_mode_hsa_he = false;
  1109. } else if (val == 1) {
  1110. cfg->pulse_mode_hsa_he = true;
  1111. } else if (val == 0) {
  1112. cfg->pulse_mode_hsa_he = false;
  1113. } else {
  1114. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1115. name);
  1116. rc = -EINVAL;
  1117. goto error;
  1118. }
  1119. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1120. "qcom,mdss-dsi-hfp-power-mode");
  1121. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1122. "qcom,mdss-dsi-hbp-power-mode");
  1123. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1124. "qcom,mdss-dsi-hsa-power-mode");
  1125. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1126. "qcom,mdss-dsi-last-line-interleave");
  1127. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1128. "qcom,mdss-dsi-bllp-eof-power-mode");
  1129. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1130. "qcom,mdss-dsi-bllp-power-mode");
  1131. cfg->force_clk_lane_hs = of_property_read_bool(utils->data,
  1132. "qcom,mdss-dsi-force-clock-lane-hs");
  1133. traffic_mode = utils->get_property(utils->data,
  1134. "qcom,mdss-dsi-traffic-mode",
  1135. NULL);
  1136. if (!traffic_mode) {
  1137. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1138. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1139. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1140. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1141. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1142. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1143. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1144. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1145. } else {
  1146. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1147. traffic_mode);
  1148. rc = -EINVAL;
  1149. goto error;
  1150. }
  1151. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1152. &vc_id);
  1153. if (rc) {
  1154. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1155. cfg->vc_id = 0;
  1156. } else {
  1157. cfg->vc_id = vc_id;
  1158. }
  1159. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  1160. &line_no);
  1161. if (rc) {
  1162. DSI_DEBUG("[%s] set default dma scheduling line no\n", name);
  1163. cfg->dma_sched_line = 0x1;
  1164. /* do not fail since we have default value */
  1165. rc = 0;
  1166. } else {
  1167. cfg->dma_sched_line = line_no;
  1168. }
  1169. error:
  1170. return rc;
  1171. }
  1172. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1173. struct dsi_parser_utils *utils,
  1174. const char *name)
  1175. {
  1176. u32 val = 0;
  1177. int rc = 0;
  1178. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1179. if (rc) {
  1180. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1181. cfg->wr_mem_start = 0x2C;
  1182. } else {
  1183. cfg->wr_mem_start = val;
  1184. }
  1185. val = 0;
  1186. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1187. &val);
  1188. if (rc) {
  1189. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1190. cfg->wr_mem_continue = 0x3C;
  1191. } else {
  1192. cfg->wr_mem_continue = val;
  1193. }
  1194. /* TODO: fix following */
  1195. cfg->max_cmd_packets_interleave = 0;
  1196. val = 0;
  1197. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1198. &val);
  1199. if (rc) {
  1200. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1201. cfg->insert_dcs_command = true;
  1202. } else if (val == 1) {
  1203. cfg->insert_dcs_command = true;
  1204. } else if (val == 0) {
  1205. cfg->insert_dcs_command = false;
  1206. } else {
  1207. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1208. name);
  1209. rc = -EINVAL;
  1210. goto error;
  1211. }
  1212. error:
  1213. return rc;
  1214. }
  1215. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1216. {
  1217. int rc = 0;
  1218. struct dsi_parser_utils *utils = &panel->utils;
  1219. bool panel_mode_switch_enabled;
  1220. enum dsi_op_mode panel_mode;
  1221. const char *mode;
  1222. mode = utils->get_property(utils->data,
  1223. "qcom,mdss-dsi-panel-type", NULL);
  1224. if (!mode) {
  1225. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1226. panel_mode = DSI_OP_VIDEO_MODE;
  1227. } else if (!strcmp(mode, "dsi_video_mode")) {
  1228. panel_mode = DSI_OP_VIDEO_MODE;
  1229. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1230. panel_mode = DSI_OP_CMD_MODE;
  1231. } else {
  1232. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1233. rc = -EINVAL;
  1234. goto error;
  1235. }
  1236. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1237. "qcom,mdss-dsi-panel-mode-switch");
  1238. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1239. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1240. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1241. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1242. utils,
  1243. panel->name);
  1244. if (rc) {
  1245. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1246. panel->name, rc);
  1247. goto error;
  1248. }
  1249. }
  1250. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1251. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1252. utils,
  1253. panel->name);
  1254. if (rc) {
  1255. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1256. panel->name, rc);
  1257. goto error;
  1258. }
  1259. }
  1260. panel->poms_align_vsync = utils->read_bool(utils->data,
  1261. "qcom,poms-align-panel-vsync");
  1262. panel->panel_mode = panel_mode;
  1263. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1264. error:
  1265. return rc;
  1266. }
  1267. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1268. {
  1269. int rc = 0;
  1270. u32 val = 0;
  1271. const char *str;
  1272. struct dsi_panel_phy_props *props = &panel->phy_props;
  1273. struct dsi_parser_utils *utils = &panel->utils;
  1274. const char *name = panel->name;
  1275. rc = utils->read_u32(utils->data,
  1276. "qcom,mdss-pan-physical-width-dimension", &val);
  1277. if (rc) {
  1278. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1279. props->panel_width_mm = 0;
  1280. rc = 0;
  1281. } else {
  1282. props->panel_width_mm = val;
  1283. }
  1284. rc = utils->read_u32(utils->data,
  1285. "qcom,mdss-pan-physical-height-dimension",
  1286. &val);
  1287. if (rc) {
  1288. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1289. props->panel_height_mm = 0;
  1290. rc = 0;
  1291. } else {
  1292. props->panel_height_mm = val;
  1293. }
  1294. str = utils->get_property(utils->data,
  1295. "qcom,mdss-dsi-panel-orientation", NULL);
  1296. if (!str) {
  1297. props->rotation = DSI_PANEL_ROTATE_NONE;
  1298. } else if (!strcmp(str, "180")) {
  1299. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1300. } else if (!strcmp(str, "hflip")) {
  1301. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1302. } else if (!strcmp(str, "vflip")) {
  1303. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1304. } else {
  1305. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1306. rc = -EINVAL;
  1307. goto error;
  1308. }
  1309. error:
  1310. return rc;
  1311. }
  1312. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1313. "qcom,mdss-dsi-pre-on-command",
  1314. "qcom,mdss-dsi-on-command",
  1315. "qcom,mdss-dsi-post-panel-on-command",
  1316. "qcom,mdss-dsi-pre-off-command",
  1317. "qcom,mdss-dsi-off-command",
  1318. "qcom,mdss-dsi-post-off-command",
  1319. "qcom,mdss-dsi-pre-res-switch",
  1320. "qcom,mdss-dsi-res-switch",
  1321. "qcom,mdss-dsi-post-res-switch",
  1322. "qcom,cmd-to-video-mode-switch-commands",
  1323. "qcom,cmd-to-video-mode-post-switch-commands",
  1324. "qcom,video-to-cmd-mode-switch-commands",
  1325. "qcom,video-to-cmd-mode-post-switch-commands",
  1326. "qcom,mdss-dsi-panel-status-command",
  1327. "qcom,mdss-dsi-lp1-command",
  1328. "qcom,mdss-dsi-lp2-command",
  1329. "qcom,mdss-dsi-nolp-command",
  1330. "PPS not parsed from DTSI, generated dynamically",
  1331. "ROI not parsed from DTSI, generated dynamically",
  1332. "qcom,mdss-dsi-timing-switch-command",
  1333. "qcom,mdss-dsi-post-mode-switch-on-command",
  1334. "qcom,mdss-dsi-qsync-on-commands",
  1335. "qcom,mdss-dsi-qsync-off-commands",
  1336. };
  1337. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1338. "qcom,mdss-dsi-pre-on-command-state",
  1339. "qcom,mdss-dsi-on-command-state",
  1340. "qcom,mdss-dsi-post-on-command-state",
  1341. "qcom,mdss-dsi-pre-off-command-state",
  1342. "qcom,mdss-dsi-off-command-state",
  1343. "qcom,mdss-dsi-post-off-command-state",
  1344. "qcom,mdss-dsi-pre-res-switch-state",
  1345. "qcom,mdss-dsi-res-switch-state",
  1346. "qcom,mdss-dsi-post-res-switch-state",
  1347. "qcom,cmd-to-video-mode-switch-commands-state",
  1348. "qcom,cmd-to-video-mode-post-switch-commands-state",
  1349. "qcom,video-to-cmd-mode-switch-commands-state",
  1350. "qcom,video-to-cmd-mode-post-switch-commands-state",
  1351. "qcom,mdss-dsi-panel-status-command-state",
  1352. "qcom,mdss-dsi-lp1-command-state",
  1353. "qcom,mdss-dsi-lp2-command-state",
  1354. "qcom,mdss-dsi-nolp-command-state",
  1355. "PPS not parsed from DTSI, generated dynamically",
  1356. "ROI not parsed from DTSI, generated dynamically",
  1357. "qcom,mdss-dsi-timing-switch-command-state",
  1358. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1359. "qcom,mdss-dsi-qsync-on-commands-state",
  1360. "qcom,mdss-dsi-qsync-off-commands-state",
  1361. };
  1362. static int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1363. {
  1364. const u32 cmd_set_min_size = 7;
  1365. u32 count = 0;
  1366. u32 packet_length;
  1367. u32 tmp;
  1368. while (length >= cmd_set_min_size) {
  1369. packet_length = cmd_set_min_size;
  1370. tmp = ((data[5] << 8) | (data[6]));
  1371. packet_length += tmp;
  1372. if (packet_length > length) {
  1373. DSI_ERR("format error\n");
  1374. return -EINVAL;
  1375. }
  1376. length -= packet_length;
  1377. data += packet_length;
  1378. count++;
  1379. }
  1380. *cnt = count;
  1381. return 0;
  1382. }
  1383. static int dsi_panel_create_cmd_packets(const char *data,
  1384. u32 length,
  1385. u32 count,
  1386. struct dsi_cmd_desc *cmd)
  1387. {
  1388. int rc = 0;
  1389. int i, j;
  1390. u8 *payload;
  1391. for (i = 0; i < count; i++) {
  1392. u32 size;
  1393. cmd[i].msg.type = data[0];
  1394. cmd[i].last_command = (data[1] == 1);
  1395. cmd[i].msg.channel = data[2];
  1396. cmd[i].msg.flags |= (data[3] == 1 ? MIPI_DSI_MSG_REQ_ACK : 0);
  1397. cmd[i].msg.ctrl = 0;
  1398. cmd[i].post_wait_ms = cmd[i].msg.wait_ms = data[4];
  1399. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1400. size = cmd[i].msg.tx_len * sizeof(u8);
  1401. payload = kzalloc(size, GFP_KERNEL);
  1402. if (!payload) {
  1403. rc = -ENOMEM;
  1404. goto error_free_payloads;
  1405. }
  1406. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1407. payload[j] = data[7 + j];
  1408. cmd[i].msg.tx_buf = payload;
  1409. data += (7 + cmd[i].msg.tx_len);
  1410. }
  1411. return rc;
  1412. error_free_payloads:
  1413. for (i = i - 1; i >= 0; i--) {
  1414. cmd--;
  1415. kfree(cmd->msg.tx_buf);
  1416. }
  1417. return rc;
  1418. }
  1419. static void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1420. {
  1421. u32 i = 0;
  1422. struct dsi_cmd_desc *cmd;
  1423. for (i = 0; i < set->count; i++) {
  1424. cmd = &set->cmds[i];
  1425. kfree(cmd->msg.tx_buf);
  1426. }
  1427. }
  1428. static void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1429. {
  1430. kfree(set->cmds);
  1431. }
  1432. static int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1433. u32 packet_count)
  1434. {
  1435. u32 size;
  1436. size = packet_count * sizeof(*cmd->cmds);
  1437. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1438. if (!cmd->cmds)
  1439. return -ENOMEM;
  1440. cmd->count = packet_count;
  1441. return 0;
  1442. }
  1443. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1444. enum dsi_cmd_set_type type,
  1445. struct dsi_parser_utils *utils)
  1446. {
  1447. int rc = 0;
  1448. u32 length = 0;
  1449. const char *data;
  1450. const char *state;
  1451. u32 packet_count = 0;
  1452. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1453. &length);
  1454. if (!data) {
  1455. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1456. rc = -ENOTSUPP;
  1457. goto error;
  1458. }
  1459. DSI_DEBUG("type=%d, name=%s, length=%d\n", type,
  1460. cmd_set_prop_map[type], length);
  1461. print_hex_dump_debug("", DUMP_PREFIX_NONE,
  1462. 8, 1, data, length, false);
  1463. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1464. if (rc) {
  1465. DSI_ERR("commands failed, rc=%d\n", rc);
  1466. goto error;
  1467. }
  1468. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1469. packet_count, length);
  1470. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1471. if (rc) {
  1472. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1473. goto error;
  1474. }
  1475. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1476. cmd->cmds);
  1477. if (rc) {
  1478. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1479. goto error_free_mem;
  1480. }
  1481. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1482. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1483. cmd->state = DSI_CMD_SET_STATE_LP;
  1484. } else if (!strcmp(state, "dsi_hs_mode")) {
  1485. cmd->state = DSI_CMD_SET_STATE_HS;
  1486. } else {
  1487. DSI_ERR("[%s] command state unrecognized-%s\n",
  1488. cmd_set_state_map[type], state);
  1489. goto error_free_mem;
  1490. }
  1491. return rc;
  1492. error_free_mem:
  1493. kfree(cmd->cmds);
  1494. cmd->cmds = NULL;
  1495. error:
  1496. return rc;
  1497. }
  1498. static int dsi_panel_parse_cmd_sets(
  1499. struct dsi_display_mode_priv_info *priv_info,
  1500. struct dsi_parser_utils *utils)
  1501. {
  1502. int rc = 0;
  1503. struct dsi_panel_cmd_set *set;
  1504. u32 i;
  1505. if (!priv_info) {
  1506. DSI_ERR("invalid mode priv info\n");
  1507. return -EINVAL;
  1508. }
  1509. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1510. set = &priv_info->cmd_sets[i];
  1511. set->type = i;
  1512. set->count = 0;
  1513. if (i == DSI_CMD_SET_PPS) {
  1514. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1515. if (rc)
  1516. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1517. i, rc);
  1518. set->state = DSI_CMD_SET_STATE_LP;
  1519. } else {
  1520. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1521. if (rc)
  1522. DSI_DEBUG("failed to parse set %d\n", i);
  1523. }
  1524. }
  1525. rc = 0;
  1526. return rc;
  1527. }
  1528. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1529. {
  1530. int rc = 0;
  1531. int i;
  1532. u32 length = 0;
  1533. u32 count = 0;
  1534. u32 size = 0;
  1535. u32 *arr_32 = NULL;
  1536. const u32 *arr;
  1537. struct dsi_parser_utils *utils = &panel->utils;
  1538. struct dsi_reset_seq *seq;
  1539. if (panel->host_config.ext_bridge_mode)
  1540. return 0;
  1541. arr = utils->get_property(utils->data,
  1542. "qcom,mdss-dsi-reset-sequence", &length);
  1543. if (!arr) {
  1544. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1545. rc = -EINVAL;
  1546. goto error;
  1547. }
  1548. if (length & 0x1) {
  1549. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1550. panel->name);
  1551. rc = -EINVAL;
  1552. goto error;
  1553. }
  1554. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1555. length = length / sizeof(u32);
  1556. size = length * sizeof(u32);
  1557. arr_32 = kzalloc(size, GFP_KERNEL);
  1558. if (!arr_32) {
  1559. rc = -ENOMEM;
  1560. goto error;
  1561. }
  1562. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1563. arr_32, length);
  1564. if (rc) {
  1565. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1566. goto error_free_arr_32;
  1567. }
  1568. count = length / 2;
  1569. size = count * sizeof(*seq);
  1570. seq = kzalloc(size, GFP_KERNEL);
  1571. if (!seq) {
  1572. rc = -ENOMEM;
  1573. goto error_free_arr_32;
  1574. }
  1575. panel->reset_config.sequence = seq;
  1576. panel->reset_config.count = count;
  1577. for (i = 0; i < length; i += 2) {
  1578. seq->level = arr_32[i];
  1579. seq->sleep_ms = arr_32[i + 1];
  1580. seq++;
  1581. }
  1582. error_free_arr_32:
  1583. kfree(arr_32);
  1584. error:
  1585. return rc;
  1586. }
  1587. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1588. {
  1589. struct dsi_parser_utils *utils = &panel->utils;
  1590. panel->ulps_feature_enabled =
  1591. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1592. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1593. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1594. panel->ulps_suspend_enabled =
  1595. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1596. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1597. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1598. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1599. "qcom,mdss-dsi-te-using-wd");
  1600. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1601. "qcom,cmd-sync-wait-broadcast");
  1602. panel->lp11_init = utils->read_bool(utils->data,
  1603. "qcom,mdss-dsi-lp11-init");
  1604. return 0;
  1605. }
  1606. static int dsi_panel_parse_jitter_config(
  1607. struct dsi_display_mode *mode,
  1608. struct dsi_parser_utils *utils)
  1609. {
  1610. int rc;
  1611. struct dsi_display_mode_priv_info *priv_info;
  1612. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1613. u64 jitter_val = 0;
  1614. priv_info = mode->priv_info;
  1615. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1616. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1617. if (rc) {
  1618. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1619. } else {
  1620. jitter_val = jitter[0];
  1621. jitter_val = div_u64(jitter_val, jitter[1]);
  1622. }
  1623. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1624. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1625. priv_info->panel_jitter_denom =
  1626. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1627. } else {
  1628. priv_info->panel_jitter_numer = jitter[0];
  1629. priv_info->panel_jitter_denom = jitter[1];
  1630. }
  1631. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1632. &priv_info->panel_prefill_lines);
  1633. if (rc) {
  1634. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1635. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1636. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1637. } else if (priv_info->panel_prefill_lines >=
  1638. DSI_V_TOTAL(&mode->timing)) {
  1639. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1640. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1641. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1642. }
  1643. return 0;
  1644. }
  1645. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1646. {
  1647. int rc = 0;
  1648. char *supply_name;
  1649. if (panel->host_config.ext_bridge_mode)
  1650. return 0;
  1651. if (!strcmp(panel->type, "primary"))
  1652. supply_name = "qcom,panel-supply-entries";
  1653. else
  1654. supply_name = "qcom,panel-sec-supply-entries";
  1655. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1656. &panel->power_info, supply_name);
  1657. if (rc) {
  1658. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1659. goto error;
  1660. }
  1661. error:
  1662. return rc;
  1663. }
  1664. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1665. {
  1666. int rc = 0;
  1667. const char *data;
  1668. struct dsi_parser_utils *utils = &panel->utils;
  1669. char *reset_gpio_name, *mode_set_gpio_name;
  1670. if (!strcmp(panel->type, "primary")) {
  1671. reset_gpio_name = "qcom,platform-reset-gpio";
  1672. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1673. } else {
  1674. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1675. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1676. }
  1677. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1678. reset_gpio_name, 0);
  1679. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1680. !panel->host_config.ext_bridge_mode) {
  1681. rc = panel->reset_config.reset_gpio;
  1682. DSI_ERR("[%s] failed get reset gpio, rc=%d\n", panel->name, rc);
  1683. goto error;
  1684. }
  1685. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1686. "qcom,5v-boost-gpio",
  1687. 0);
  1688. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1689. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1690. panel->name, rc);
  1691. panel->reset_config.disp_en_gpio =
  1692. utils->get_named_gpio(utils->data,
  1693. "qcom,platform-en-gpio", 0);
  1694. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1695. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1696. panel->name, rc);
  1697. }
  1698. }
  1699. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1700. utils->data, mode_set_gpio_name, 0);
  1701. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1702. DSI_DEBUG("mode gpio not specified\n");
  1703. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1704. data = utils->get_property(utils->data,
  1705. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1706. if (data) {
  1707. if (!strcmp(data, "single_port"))
  1708. panel->reset_config.mode_sel_state =
  1709. MODE_SEL_SINGLE_PORT;
  1710. else if (!strcmp(data, "dual_port"))
  1711. panel->reset_config.mode_sel_state =
  1712. MODE_SEL_DUAL_PORT;
  1713. else if (!strcmp(data, "high"))
  1714. panel->reset_config.mode_sel_state =
  1715. MODE_GPIO_HIGH;
  1716. else if (!strcmp(data, "low"))
  1717. panel->reset_config.mode_sel_state =
  1718. MODE_GPIO_LOW;
  1719. } else {
  1720. /* Set default mode as SPLIT mode */
  1721. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1722. }
  1723. /* TODO: release memory */
  1724. rc = dsi_panel_parse_reset_sequence(panel);
  1725. if (rc) {
  1726. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1727. panel->name, rc);
  1728. goto error;
  1729. }
  1730. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1731. "qcom,mdss-dsi-panel-test-pin",
  1732. 0);
  1733. if (!gpio_is_valid(panel->panel_test_gpio))
  1734. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1735. __LINE__);
  1736. error:
  1737. return rc;
  1738. }
  1739. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1740. {
  1741. int rc = 0;
  1742. u32 val;
  1743. struct dsi_backlight_config *config = &panel->bl_config;
  1744. struct dsi_parser_utils *utils = &panel->utils;
  1745. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  1746. &val);
  1747. if (rc) {
  1748. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  1749. goto error;
  1750. }
  1751. config->pwm_period_usecs = val;
  1752. error:
  1753. return rc;
  1754. }
  1755. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  1756. {
  1757. int rc = 0;
  1758. u32 val = 0;
  1759. const char *bl_type;
  1760. const char *data;
  1761. struct dsi_parser_utils *utils = &panel->utils;
  1762. char *bl_name;
  1763. if (!strcmp(panel->type, "primary"))
  1764. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  1765. else
  1766. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  1767. bl_type = utils->get_property(utils->data, bl_name, NULL);
  1768. if (!bl_type) {
  1769. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1770. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  1771. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  1772. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  1773. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  1774. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  1775. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  1776. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  1777. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  1778. } else {
  1779. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  1780. panel->name, bl_type);
  1781. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1782. }
  1783. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  1784. if (!data) {
  1785. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1786. } else if (!strcmp(data, "delay_until_first_frame")) {
  1787. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  1788. } else {
  1789. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  1790. panel->name, data);
  1791. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1792. }
  1793. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  1794. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  1795. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  1796. if (rc) {
  1797. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  1798. panel->name);
  1799. panel->bl_config.bl_min_level = 0;
  1800. } else {
  1801. panel->bl_config.bl_min_level = val;
  1802. }
  1803. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  1804. if (rc) {
  1805. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  1806. panel->name);
  1807. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  1808. } else {
  1809. panel->bl_config.bl_max_level = val;
  1810. }
  1811. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  1812. &val);
  1813. if (rc) {
  1814. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  1815. panel->name);
  1816. panel->bl_config.brightness_max_level = 255;
  1817. } else {
  1818. panel->bl_config.brightness_max_level = val;
  1819. }
  1820. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  1821. rc = dsi_panel_parse_bl_pwm_config(panel);
  1822. if (rc) {
  1823. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  1824. panel->name, rc);
  1825. goto error;
  1826. }
  1827. }
  1828. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  1829. "qcom,platform-bklight-en-gpio",
  1830. 0);
  1831. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  1832. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  1833. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1834. panel->name, rc);
  1835. rc = -EPROBE_DEFER;
  1836. goto error;
  1837. } else {
  1838. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1839. panel->name, rc);
  1840. rc = 0;
  1841. goto error;
  1842. }
  1843. }
  1844. error:
  1845. return rc;
  1846. }
  1847. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  1848. struct dsi_parser_utils *utils)
  1849. {
  1850. const char *data;
  1851. u32 len, i;
  1852. int rc = 0;
  1853. struct dsi_display_mode_priv_info *priv_info;
  1854. u64 pixel_clk_khz;
  1855. if (!mode || !mode->priv_info)
  1856. return -EINVAL;
  1857. priv_info = mode->priv_info;
  1858. data = utils->get_property(utils->data,
  1859. "qcom,mdss-dsi-panel-phy-timings", &len);
  1860. if (!data) {
  1861. DSI_DEBUG("Unable to read Phy timing settings\n");
  1862. } else {
  1863. priv_info->phy_timing_val =
  1864. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  1865. if (!priv_info->phy_timing_val)
  1866. return -EINVAL;
  1867. for (i = 0; i < len; i++)
  1868. priv_info->phy_timing_val[i] = data[i];
  1869. priv_info->phy_timing_len = len;
  1870. }
  1871. if (mode->panel_mode == DSI_OP_VIDEO_MODE) {
  1872. /*
  1873. * For command mode we update the pclk as part of
  1874. * function dsi_panel_calc_dsi_transfer_time( )
  1875. * as we set it based on dsi clock or mdp transfer time.
  1876. */
  1877. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  1878. DSI_V_TOTAL(&mode->timing) *
  1879. mode->timing.refresh_rate);
  1880. do_div(pixel_clk_khz, 1000);
  1881. mode->pixel_clk_khz = pixel_clk_khz;
  1882. }
  1883. return rc;
  1884. }
  1885. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  1886. struct dsi_parser_utils *utils)
  1887. {
  1888. u32 data;
  1889. int rc = -EINVAL;
  1890. int intf_width;
  1891. const char *compression;
  1892. struct dsi_display_mode_priv_info *priv_info;
  1893. if (!mode || !mode->priv_info)
  1894. return -EINVAL;
  1895. priv_info = mode->priv_info;
  1896. priv_info->dsc_enabled = false;
  1897. compression = utils->get_property(utils->data,
  1898. "qcom,compression-mode", NULL);
  1899. if (compression && !strcmp(compression, "dsc"))
  1900. priv_info->dsc_enabled = true;
  1901. if (!priv_info->dsc_enabled) {
  1902. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  1903. return 0;
  1904. }
  1905. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  1906. if (rc) {
  1907. priv_info->dsc.config.dsc_version_major = 0x1;
  1908. priv_info->dsc.config.dsc_version_minor = 0x1;
  1909. rc = 0;
  1910. } else {
  1911. /* BITS[0..3] provides minor version and BITS[4..7] provide
  1912. * major version information
  1913. */
  1914. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  1915. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  1916. if ((priv_info->dsc.config.dsc_version_major != 0x1) &&
  1917. ((priv_info->dsc.config.dsc_version_minor
  1918. != 0x1) ||
  1919. (priv_info->dsc.config.dsc_version_minor
  1920. != 0x2))) {
  1921. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  1922. __func__,
  1923. priv_info->dsc.config.dsc_version_major,
  1924. priv_info->dsc.config.dsc_version_minor
  1925. );
  1926. rc = -EINVAL;
  1927. goto error;
  1928. }
  1929. }
  1930. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  1931. if (rc) {
  1932. priv_info->dsc.scr_rev = 0x0;
  1933. rc = 0;
  1934. } else {
  1935. priv_info->dsc.scr_rev = data & 0xff;
  1936. /* only one scr rev supported */
  1937. if (priv_info->dsc.scr_rev > 0x1) {
  1938. DSI_ERR("%s: DSC scr version:%d not supported\n",
  1939. __func__, priv_info->dsc.scr_rev);
  1940. rc = -EINVAL;
  1941. goto error;
  1942. }
  1943. }
  1944. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  1945. if (rc) {
  1946. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  1947. goto error;
  1948. }
  1949. priv_info->dsc.config.slice_height = data;
  1950. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  1951. if (rc) {
  1952. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  1953. goto error;
  1954. }
  1955. priv_info->dsc.config.slice_width = data;
  1956. intf_width = mode->timing.h_active;
  1957. if (intf_width % priv_info->dsc.config.slice_width) {
  1958. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  1959. intf_width, priv_info->dsc.config.slice_width);
  1960. rc = -EINVAL;
  1961. goto error;
  1962. }
  1963. priv_info->dsc.config.pic_width = mode->timing.h_active;
  1964. priv_info->dsc.config.pic_height = mode->timing.v_active;
  1965. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  1966. if (rc) {
  1967. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  1968. goto error;
  1969. } else if (!data || (data > 2)) {
  1970. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  1971. goto error;
  1972. }
  1973. priv_info->dsc.slice_per_pkt = data;
  1974. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  1975. &data);
  1976. if (rc) {
  1977. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  1978. goto error;
  1979. }
  1980. priv_info->dsc.config.bits_per_component = data;
  1981. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  1982. if (rc) {
  1983. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  1984. data = 0;
  1985. }
  1986. priv_info->dsc.pps_delay_ms = data;
  1987. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  1988. &data);
  1989. if (rc) {
  1990. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  1991. goto error;
  1992. }
  1993. priv_info->dsc.config.bits_per_pixel = data << 4;
  1994. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  1995. &data);
  1996. if (rc) {
  1997. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  1998. rc = 0;
  1999. data = MSM_CHROMA_444;
  2000. }
  2001. priv_info->dsc.chroma_format = data;
  2002. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2003. &data);
  2004. if (rc) {
  2005. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2006. rc = 0;
  2007. data = MSM_RGB;
  2008. }
  2009. priv_info->dsc.source_color_space = data;
  2010. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2011. "qcom,mdss-dsc-block-prediction-enable");
  2012. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2013. priv_info->dsc.config.slice_width);
  2014. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2015. priv_info->dsc.scr_rev);
  2016. if (rc) {
  2017. DSI_DEBUG("failed populating dsc params \n");
  2018. rc = -EINVAL;
  2019. goto error;
  2020. }
  2021. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2022. if (rc) {
  2023. DSI_DEBUG("failed populating other dsc params \n");
  2024. rc = -EINVAL;
  2025. goto error;
  2026. }
  2027. mode->timing.dsc_enabled = true;
  2028. mode->timing.dsc = &priv_info->dsc;
  2029. error:
  2030. return rc;
  2031. }
  2032. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2033. struct dsi_parser_utils *utils, int traffic_mode, int panel_mode)
  2034. {
  2035. u32 data;
  2036. int rc = -EINVAL;
  2037. const char *compression;
  2038. struct dsi_display_mode_priv_info *priv_info;
  2039. int intf_width;
  2040. if (!mode || !mode->priv_info)
  2041. return -EINVAL;
  2042. priv_info = mode->priv_info;
  2043. priv_info->vdc_enabled = false;
  2044. compression = utils->get_property(utils->data,
  2045. "qcom,compression-mode", NULL);
  2046. if (compression && !strcmp(compression, "vdc"))
  2047. priv_info->vdc_enabled = true;
  2048. if (!priv_info->vdc_enabled) {
  2049. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2050. return 0;
  2051. }
  2052. priv_info->vdc.panel_mode = panel_mode;
  2053. priv_info->vdc.traffic_mode = traffic_mode;
  2054. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2055. if (rc) {
  2056. priv_info->vdc.version_major = 0x1;
  2057. priv_info->vdc.version_minor = 0x1;
  2058. priv_info->vdc.version_release = 0x0;
  2059. rc = 0;
  2060. } else {
  2061. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2062. * major version information
  2063. */
  2064. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2065. priv_info->vdc.version_minor = data & 0x0F;
  2066. if ((priv_info->vdc.version_major != 0x1) &&
  2067. ((priv_info->vdc.version_minor
  2068. != 0x1))) {
  2069. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2070. __func__,
  2071. priv_info->vdc.version_major,
  2072. priv_info->vdc.version_minor
  2073. );
  2074. rc = -EINVAL;
  2075. goto error;
  2076. }
  2077. }
  2078. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2079. if (rc) {
  2080. priv_info->vdc.version_release = 0x0;
  2081. rc = 0;
  2082. } else {
  2083. priv_info->vdc.version_release = data & 0xff;
  2084. /* only one release version is supported */
  2085. if (priv_info->vdc.version_release != 0x0) {
  2086. DSI_ERR("unsupported vdc release version %d\n",
  2087. priv_info->vdc.version_release);
  2088. rc = -EINVAL;
  2089. goto error;
  2090. }
  2091. }
  2092. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2093. priv_info->vdc.version_major,
  2094. priv_info->vdc.version_minor,
  2095. priv_info->vdc.version_release);
  2096. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2097. if (rc) {
  2098. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2099. goto error;
  2100. }
  2101. priv_info->vdc.slice_height = data;
  2102. /* slice height should be atleast 16 lines */
  2103. if (priv_info->vdc.slice_height < 16) {
  2104. DSI_ERR("invalid slice height %d\n",
  2105. priv_info->vdc.slice_height);
  2106. rc = -EINVAL;
  2107. goto error;
  2108. }
  2109. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2110. if (rc) {
  2111. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2112. goto error;
  2113. }
  2114. priv_info->vdc.slice_width = data;
  2115. /*
  2116. * slide-width should be multiple of 8
  2117. * slice-width should be atlease 64 pixels
  2118. */
  2119. if ((priv_info->vdc.slice_width & 7) ||
  2120. (priv_info->vdc.slice_width < 64)) {
  2121. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2122. rc = -EINVAL;
  2123. goto error;
  2124. }
  2125. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2126. if (rc) {
  2127. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2128. goto error;
  2129. } else if (!data || (data > 2)) {
  2130. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2131. rc = -EINVAL;
  2132. goto error;
  2133. }
  2134. intf_width = mode->timing.h_active;
  2135. priv_info->vdc.slice_per_pkt = data;
  2136. priv_info->vdc.frame_width = mode->timing.h_active;
  2137. priv_info->vdc.frame_height = mode->timing.v_active;
  2138. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2139. &data);
  2140. if (rc) {
  2141. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2142. goto error;
  2143. }
  2144. priv_info->vdc.bits_per_component = data;
  2145. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2146. if (rc) {
  2147. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2148. data = 0;
  2149. }
  2150. priv_info->vdc.pps_delay_ms = data;
  2151. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2152. &data);
  2153. if (rc) {
  2154. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2155. goto error;
  2156. }
  2157. priv_info->vdc.bits_per_pixel = data << 4;
  2158. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2159. &data);
  2160. if (rc) {
  2161. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2162. rc = 0;
  2163. data = MSM_CHROMA_444;
  2164. }
  2165. priv_info->vdc.chroma_format = data;
  2166. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2167. &data);
  2168. if (rc) {
  2169. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2170. rc = 0;
  2171. data = MSM_RGB;
  2172. }
  2173. priv_info->vdc.source_color_space = data;
  2174. rc = sde_vdc_populate_config(&priv_info->vdc,
  2175. intf_width, traffic_mode);
  2176. if (rc) {
  2177. DSI_DEBUG("failed populating vdc config\n");
  2178. rc = -EINVAL;
  2179. goto error;
  2180. }
  2181. mode->timing.vdc_enabled = true;
  2182. mode->timing.vdc = &priv_info->vdc;
  2183. error:
  2184. return rc;
  2185. }
  2186. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2187. {
  2188. int rc = 0;
  2189. struct drm_panel_hdr_properties *hdr_prop;
  2190. struct dsi_parser_utils *utils = &panel->utils;
  2191. hdr_prop = &panel->hdr_props;
  2192. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2193. "qcom,mdss-dsi-panel-hdr-enabled");
  2194. if (hdr_prop->hdr_enabled) {
  2195. rc = utils->read_u32_array(utils->data,
  2196. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2197. hdr_prop->display_primaries,
  2198. DISPLAY_PRIMARIES_MAX);
  2199. if (rc) {
  2200. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2201. __func__, __LINE__, rc);
  2202. hdr_prop->hdr_enabled = false;
  2203. return rc;
  2204. }
  2205. rc = utils->read_u32(utils->data,
  2206. "qcom,mdss-dsi-panel-peak-brightness",
  2207. &(hdr_prop->peak_brightness));
  2208. if (rc) {
  2209. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2210. __func__, __LINE__, rc);
  2211. hdr_prop->hdr_enabled = false;
  2212. return rc;
  2213. }
  2214. rc = utils->read_u32(utils->data,
  2215. "qcom,mdss-dsi-panel-blackness-level",
  2216. &(hdr_prop->blackness_level));
  2217. if (rc) {
  2218. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2219. __func__, __LINE__, rc);
  2220. hdr_prop->hdr_enabled = false;
  2221. return rc;
  2222. }
  2223. }
  2224. return 0;
  2225. }
  2226. static int dsi_panel_parse_topology(
  2227. struct dsi_display_mode_priv_info *priv_info,
  2228. struct dsi_parser_utils *utils,
  2229. int topology_override)
  2230. {
  2231. struct msm_display_topology *topology;
  2232. u32 top_count, top_sel, *array = NULL;
  2233. int i, len = 0;
  2234. int rc = -EINVAL;
  2235. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2236. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2237. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2238. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2239. return rc;
  2240. }
  2241. top_count = len / TOPOLOGY_SET_LEN;
  2242. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2243. if (!array)
  2244. return -ENOMEM;
  2245. rc = utils->read_u32_array(utils->data,
  2246. "qcom,display-topology", array, len);
  2247. if (rc) {
  2248. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2249. goto read_fail;
  2250. }
  2251. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2252. if (!topology) {
  2253. rc = -ENOMEM;
  2254. goto read_fail;
  2255. }
  2256. for (i = 0; i < top_count; i++) {
  2257. struct msm_display_topology *top = &topology[i];
  2258. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2259. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2260. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2261. }
  2262. if (topology_override >= 0 && topology_override < top_count) {
  2263. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2264. topology_override,
  2265. topology[topology_override].num_lm,
  2266. topology[topology_override].num_enc,
  2267. topology[topology_override].num_intf);
  2268. top_sel = topology_override;
  2269. goto parse_done;
  2270. }
  2271. rc = utils->read_u32(utils->data,
  2272. "qcom,default-topology-index", &top_sel);
  2273. if (rc) {
  2274. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2275. goto parse_fail;
  2276. }
  2277. if (top_sel >= top_count) {
  2278. rc = -EINVAL;
  2279. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2280. rc);
  2281. goto parse_fail;
  2282. }
  2283. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2284. topology[top_sel].num_lm,
  2285. topology[top_sel].num_enc,
  2286. topology[top_sel].num_intf);
  2287. parse_done:
  2288. memcpy(&priv_info->topology, &topology[top_sel],
  2289. sizeof(struct msm_display_topology));
  2290. parse_fail:
  2291. kfree(topology);
  2292. read_fail:
  2293. kfree(array);
  2294. return rc;
  2295. }
  2296. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2297. struct msm_roi_alignment *align)
  2298. {
  2299. int len = 0, rc = 0;
  2300. u32 value[6];
  2301. struct property *data;
  2302. if (!align)
  2303. return -EINVAL;
  2304. memset(align, 0, sizeof(*align));
  2305. data = utils->find_property(utils->data,
  2306. "qcom,panel-roi-alignment", &len);
  2307. len /= sizeof(u32);
  2308. if (!data) {
  2309. DSI_ERR("panel roi alignment not found\n");
  2310. rc = -EINVAL;
  2311. } else if (len != 6) {
  2312. DSI_ERR("incorrect roi alignment len %d\n", len);
  2313. rc = -EINVAL;
  2314. } else {
  2315. rc = utils->read_u32_array(utils->data,
  2316. "qcom,panel-roi-alignment", value, len);
  2317. if (rc)
  2318. DSI_DEBUG("error reading panel roi alignment values\n");
  2319. else {
  2320. align->xstart_pix_align = value[0];
  2321. align->ystart_pix_align = value[1];
  2322. align->width_pix_align = value[2];
  2323. align->height_pix_align = value[3];
  2324. align->min_width = value[4];
  2325. align->min_height = value[5];
  2326. }
  2327. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2328. align->xstart_pix_align,
  2329. align->width_pix_align,
  2330. align->ystart_pix_align,
  2331. align->height_pix_align,
  2332. align->min_width,
  2333. align->min_height);
  2334. }
  2335. return rc;
  2336. }
  2337. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2338. struct dsi_parser_utils *utils)
  2339. {
  2340. struct msm_roi_caps *roi_caps = NULL;
  2341. const char *data;
  2342. int rc = 0;
  2343. if (!mode || !mode->priv_info) {
  2344. DSI_ERR("invalid arguments\n");
  2345. return -EINVAL;
  2346. }
  2347. roi_caps = &mode->priv_info->roi_caps;
  2348. memset(roi_caps, 0, sizeof(*roi_caps));
  2349. data = utils->get_property(utils->data,
  2350. "qcom,partial-update-enabled", NULL);
  2351. if (data) {
  2352. if (!strcmp(data, "dual_roi"))
  2353. roi_caps->num_roi = 2;
  2354. else if (!strcmp(data, "single_roi"))
  2355. roi_caps->num_roi = 1;
  2356. else {
  2357. DSI_INFO(
  2358. "invalid value for qcom,partial-update-enabled: %s\n",
  2359. data);
  2360. return 0;
  2361. }
  2362. } else {
  2363. DSI_DEBUG("partial update disabled as the property is not set\n");
  2364. return 0;
  2365. }
  2366. roi_caps->merge_rois = utils->read_bool(utils->data,
  2367. "qcom,partial-update-roi-merge");
  2368. roi_caps->enabled = roi_caps->num_roi > 0;
  2369. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2370. roi_caps->enabled);
  2371. if (roi_caps->enabled)
  2372. rc = dsi_panel_parse_roi_alignment(utils,
  2373. &roi_caps->align);
  2374. if (rc)
  2375. memset(roi_caps, 0, sizeof(*roi_caps));
  2376. return rc;
  2377. }
  2378. static int dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2379. struct dsi_parser_utils *utils)
  2380. {
  2381. bool vid_mode_support, cmd_mode_support;
  2382. if (!mode || !mode->priv_info) {
  2383. DSI_ERR("invalid arguments\n");
  2384. return -EINVAL;
  2385. }
  2386. vid_mode_support = utils->read_bool(utils->data,
  2387. "qcom,mdss-dsi-video-mode");
  2388. cmd_mode_support = utils->read_bool(utils->data,
  2389. "qcom,mdss-dsi-cmd-mode");
  2390. if (cmd_mode_support)
  2391. mode->panel_mode = DSI_OP_CMD_MODE;
  2392. else if (vid_mode_support)
  2393. mode->panel_mode = DSI_OP_VIDEO_MODE;
  2394. else
  2395. return -EINVAL;
  2396. return 0;
  2397. };
  2398. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2399. {
  2400. int dms_enabled;
  2401. const char *data;
  2402. struct dsi_parser_utils *utils = &panel->utils;
  2403. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2404. dms_enabled = utils->read_bool(utils->data,
  2405. "qcom,dynamic-mode-switch-enabled");
  2406. if (!dms_enabled)
  2407. return 0;
  2408. data = utils->get_property(utils->data,
  2409. "qcom,dynamic-mode-switch-type", NULL);
  2410. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2411. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2412. } else {
  2413. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2414. panel->name, data);
  2415. return -EINVAL;
  2416. }
  2417. return 0;
  2418. };
  2419. /*
  2420. * The length of all the valid values to be checked should not be greater
  2421. * than the length of returned data from read command.
  2422. */
  2423. static bool
  2424. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2425. {
  2426. int i;
  2427. struct drm_panel_esd_config *config = &panel->esd_config;
  2428. for (i = 0; i < count; ++i) {
  2429. if (config->status_valid_params[i] >
  2430. config->status_cmds_rlen[i]) {
  2431. DSI_DEBUG("ignore valid params\n");
  2432. return false;
  2433. }
  2434. }
  2435. return true;
  2436. }
  2437. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2438. char *prop_key, u32 **target, u32 cmd_cnt)
  2439. {
  2440. int tmp;
  2441. if (!utils->find_property(utils->data, prop_key, &tmp))
  2442. return false;
  2443. tmp /= sizeof(u32);
  2444. if (tmp != cmd_cnt) {
  2445. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2446. tmp, cmd_cnt);
  2447. return false;
  2448. }
  2449. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2450. if (IS_ERR_OR_NULL(*target)) {
  2451. DSI_ERR("Error allocating memory for property\n");
  2452. return false;
  2453. }
  2454. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2455. DSI_ERR("cannot get values from dts\n");
  2456. kfree(*target);
  2457. *target = NULL;
  2458. return false;
  2459. }
  2460. return true;
  2461. }
  2462. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2463. {
  2464. kfree(esd_config->status_buf);
  2465. kfree(esd_config->return_buf);
  2466. kfree(esd_config->status_value);
  2467. kfree(esd_config->status_valid_params);
  2468. kfree(esd_config->status_cmds_rlen);
  2469. kfree(esd_config->status_cmd.cmds);
  2470. }
  2471. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2472. {
  2473. struct drm_panel_esd_config *esd_config;
  2474. int rc = 0;
  2475. u32 tmp;
  2476. u32 i, status_len, *lenp;
  2477. struct property *data;
  2478. struct dsi_parser_utils *utils = &panel->utils;
  2479. if (!panel) {
  2480. DSI_ERR("Invalid Params\n");
  2481. return -EINVAL;
  2482. }
  2483. esd_config = &panel->esd_config;
  2484. if (!esd_config)
  2485. return -EINVAL;
  2486. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2487. DSI_CMD_SET_PANEL_STATUS, utils);
  2488. if (!esd_config->status_cmd.count) {
  2489. DSI_ERR("panel status command parsing failed\n");
  2490. rc = -EINVAL;
  2491. goto error;
  2492. }
  2493. if (!dsi_panel_parse_esd_status_len(utils,
  2494. "qcom,mdss-dsi-panel-status-read-length",
  2495. &panel->esd_config.status_cmds_rlen,
  2496. esd_config->status_cmd.count)) {
  2497. DSI_ERR("Invalid status read length\n");
  2498. rc = -EINVAL;
  2499. goto error1;
  2500. }
  2501. if (dsi_panel_parse_esd_status_len(utils,
  2502. "qcom,mdss-dsi-panel-status-valid-params",
  2503. &panel->esd_config.status_valid_params,
  2504. esd_config->status_cmd.count)) {
  2505. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2506. esd_config->status_cmd.count)) {
  2507. rc = -EINVAL;
  2508. goto error2;
  2509. }
  2510. }
  2511. status_len = 0;
  2512. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2513. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2514. status_len += lenp[i];
  2515. if (!status_len) {
  2516. rc = -EINVAL;
  2517. goto error2;
  2518. }
  2519. /*
  2520. * Some panel may need multiple read commands to properly
  2521. * check panel status. Do a sanity check for proper status
  2522. * value which will be compared with the value read by dsi
  2523. * controller during ESD check. Also check if multiple read
  2524. * commands are there then, there should be corresponding
  2525. * status check values for each read command.
  2526. */
  2527. data = utils->find_property(utils->data,
  2528. "qcom,mdss-dsi-panel-status-value", &tmp);
  2529. tmp /= sizeof(u32);
  2530. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2531. esd_config->groups = tmp / status_len;
  2532. } else {
  2533. DSI_ERR("error parse panel-status-value\n");
  2534. rc = -EINVAL;
  2535. goto error2;
  2536. }
  2537. esd_config->status_value =
  2538. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2539. GFP_KERNEL);
  2540. if (!esd_config->status_value) {
  2541. rc = -ENOMEM;
  2542. goto error2;
  2543. }
  2544. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2545. sizeof(unsigned char), GFP_KERNEL);
  2546. if (!esd_config->return_buf) {
  2547. rc = -ENOMEM;
  2548. goto error3;
  2549. }
  2550. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2551. if (!esd_config->status_buf) {
  2552. rc = -ENOMEM;
  2553. goto error4;
  2554. }
  2555. rc = utils->read_u32_array(utils->data,
  2556. "qcom,mdss-dsi-panel-status-value",
  2557. esd_config->status_value, esd_config->groups * status_len);
  2558. if (rc) {
  2559. DSI_DEBUG("error reading panel status values\n");
  2560. memset(esd_config->status_value, 0,
  2561. esd_config->groups * status_len);
  2562. }
  2563. return 0;
  2564. error4:
  2565. kfree(esd_config->return_buf);
  2566. error3:
  2567. kfree(esd_config->status_value);
  2568. error2:
  2569. kfree(esd_config->status_valid_params);
  2570. kfree(esd_config->status_cmds_rlen);
  2571. error1:
  2572. kfree(esd_config->status_cmd.cmds);
  2573. error:
  2574. return rc;
  2575. }
  2576. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2577. {
  2578. int rc = 0;
  2579. const char *string;
  2580. struct drm_panel_esd_config *esd_config;
  2581. struct dsi_parser_utils *utils = &panel->utils;
  2582. u8 *esd_mode = NULL;
  2583. esd_config = &panel->esd_config;
  2584. esd_config->status_mode = ESD_MODE_MAX;
  2585. esd_config->esd_enabled = utils->read_bool(utils->data,
  2586. "qcom,esd-check-enabled");
  2587. if (!esd_config->esd_enabled)
  2588. return 0;
  2589. rc = utils->read_string(utils->data,
  2590. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2591. if (!rc) {
  2592. if (!strcmp(string, "bta_check")) {
  2593. esd_config->status_mode = ESD_MODE_SW_BTA;
  2594. } else if (!strcmp(string, "reg_read")) {
  2595. esd_config->status_mode = ESD_MODE_REG_READ;
  2596. } else if (!strcmp(string, "te_signal_check")) {
  2597. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2598. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2599. } else {
  2600. DSI_ERR("TE-ESD not valid for video mode\n");
  2601. rc = -EINVAL;
  2602. goto error;
  2603. }
  2604. } else {
  2605. DSI_ERR("No valid panel-status-check-mode string\n");
  2606. rc = -EINVAL;
  2607. goto error;
  2608. }
  2609. } else {
  2610. DSI_DEBUG("status check method not defined!\n");
  2611. rc = -EINVAL;
  2612. goto error;
  2613. }
  2614. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2615. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2616. if (rc) {
  2617. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2618. rc);
  2619. goto error;
  2620. }
  2621. esd_mode = "register_read";
  2622. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2623. esd_mode = "bta_trigger";
  2624. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2625. esd_mode = "te_check";
  2626. }
  2627. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2628. return 0;
  2629. error:
  2630. panel->esd_config.esd_enabled = false;
  2631. return rc;
  2632. }
  2633. static void dsi_panel_update_util(struct dsi_panel *panel,
  2634. struct device_node *parser_node)
  2635. {
  2636. struct dsi_parser_utils *utils = &panel->utils;
  2637. if (parser_node) {
  2638. *utils = *dsi_parser_get_parser_utils();
  2639. utils->data = parser_node;
  2640. DSI_DEBUG("switching to parser APIs\n");
  2641. goto end;
  2642. }
  2643. *utils = *dsi_parser_get_of_utils();
  2644. utils->data = panel->panel_of_node;
  2645. end:
  2646. utils->node = panel->panel_of_node;
  2647. }
  2648. struct dsi_panel *dsi_panel_get(struct device *parent,
  2649. struct device_node *of_node,
  2650. struct device_node *parser_node,
  2651. const char *type,
  2652. int topology_override)
  2653. {
  2654. struct dsi_panel *panel;
  2655. struct dsi_parser_utils *utils;
  2656. const char *panel_physical_type;
  2657. int rc = 0;
  2658. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2659. if (!panel)
  2660. return ERR_PTR(-ENOMEM);
  2661. panel->panel_of_node = of_node;
  2662. panel->parent = parent;
  2663. panel->type = type;
  2664. dsi_panel_update_util(panel, parser_node);
  2665. utils = &panel->utils;
  2666. panel->name = utils->get_property(utils->data,
  2667. "qcom,mdss-dsi-panel-name", NULL);
  2668. if (!panel->name)
  2669. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2670. /*
  2671. * Set panel type to LCD as default.
  2672. */
  2673. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  2674. panel_physical_type = utils->get_property(utils->data,
  2675. "qcom,mdss-dsi-panel-physical-type", NULL);
  2676. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  2677. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  2678. rc = dsi_panel_parse_host_config(panel);
  2679. if (rc) {
  2680. DSI_ERR("failed to parse host configuration, rc=%d\n",
  2681. rc);
  2682. goto error;
  2683. }
  2684. rc = dsi_panel_parse_panel_mode(panel);
  2685. if (rc) {
  2686. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  2687. rc);
  2688. goto error;
  2689. }
  2690. rc = dsi_panel_parse_dfps_caps(panel);
  2691. if (rc)
  2692. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  2693. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2694. if (rc)
  2695. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  2696. /* allow qsync support only if DFPS is with VFP approach */
  2697. if ((panel->dfps_caps.dfps_support) &&
  2698. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP))
  2699. panel->qsync_min_fps = 0;
  2700. rc = dsi_panel_parse_dyn_clk_caps(panel);
  2701. if (rc)
  2702. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  2703. rc = dsi_panel_parse_phy_props(panel);
  2704. if (rc) {
  2705. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  2706. rc);
  2707. goto error;
  2708. }
  2709. rc = dsi_panel_parse_gpios(panel);
  2710. if (rc) {
  2711. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  2712. goto error;
  2713. }
  2714. rc = dsi_panel_parse_power_cfg(panel);
  2715. if (rc)
  2716. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  2717. rc = dsi_panel_parse_bl_config(panel);
  2718. if (rc) {
  2719. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  2720. if (rc == -EPROBE_DEFER)
  2721. goto error;
  2722. }
  2723. rc = dsi_panel_parse_misc_features(panel);
  2724. if (rc)
  2725. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  2726. rc = dsi_panel_parse_hdr_config(panel);
  2727. if (rc)
  2728. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  2729. rc = dsi_panel_get_mode_count(panel);
  2730. if (rc) {
  2731. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  2732. goto error;
  2733. }
  2734. rc = dsi_panel_parse_dms_info(panel);
  2735. if (rc)
  2736. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  2737. rc = dsi_panel_parse_esd_config(panel);
  2738. if (rc)
  2739. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  2740. panel->power_mode = SDE_MODE_DPMS_OFF;
  2741. drm_panel_init(&panel->drm_panel);
  2742. panel->drm_panel.dev = &panel->mipi_device.dev;
  2743. panel->mipi_device.dev.of_node = of_node;
  2744. rc = drm_panel_add(&panel->drm_panel);
  2745. if (rc)
  2746. goto error;
  2747. mutex_init(&panel->panel_lock);
  2748. return panel;
  2749. error:
  2750. kfree(panel);
  2751. return ERR_PTR(rc);
  2752. }
  2753. void dsi_panel_put(struct dsi_panel *panel)
  2754. {
  2755. drm_panel_remove(&panel->drm_panel);
  2756. /* free resources allocated for ESD check */
  2757. dsi_panel_esd_config_deinit(&panel->esd_config);
  2758. kfree(panel);
  2759. }
  2760. int dsi_panel_drv_init(struct dsi_panel *panel,
  2761. struct mipi_dsi_host *host)
  2762. {
  2763. int rc = 0;
  2764. struct mipi_dsi_device *dev;
  2765. if (!panel || !host) {
  2766. DSI_ERR("invalid params\n");
  2767. return -EINVAL;
  2768. }
  2769. mutex_lock(&panel->panel_lock);
  2770. dev = &panel->mipi_device;
  2771. dev->host = host;
  2772. /*
  2773. * We dont have device structure since panel is not a device node.
  2774. * When using drm panel framework, the device is probed when the host is
  2775. * create.
  2776. */
  2777. dev->channel = 0;
  2778. dev->lanes = 4;
  2779. panel->host = host;
  2780. rc = dsi_panel_vreg_get(panel);
  2781. if (rc) {
  2782. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  2783. panel->name, rc);
  2784. goto exit;
  2785. }
  2786. rc = dsi_panel_pinctrl_init(panel);
  2787. if (rc) {
  2788. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  2789. panel->name, rc);
  2790. goto error_vreg_put;
  2791. }
  2792. rc = dsi_panel_gpio_request(panel);
  2793. if (rc) {
  2794. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  2795. rc);
  2796. goto error_pinctrl_deinit;
  2797. }
  2798. rc = dsi_panel_bl_register(panel);
  2799. if (rc) {
  2800. if (rc != -EPROBE_DEFER)
  2801. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  2802. panel->name, rc);
  2803. goto error_gpio_release;
  2804. }
  2805. goto exit;
  2806. error_gpio_release:
  2807. (void)dsi_panel_gpio_release(panel);
  2808. error_pinctrl_deinit:
  2809. (void)dsi_panel_pinctrl_deinit(panel);
  2810. error_vreg_put:
  2811. (void)dsi_panel_vreg_put(panel);
  2812. exit:
  2813. mutex_unlock(&panel->panel_lock);
  2814. return rc;
  2815. }
  2816. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  2817. {
  2818. int rc = 0;
  2819. if (!panel) {
  2820. DSI_ERR("invalid params\n");
  2821. return -EINVAL;
  2822. }
  2823. mutex_lock(&panel->panel_lock);
  2824. rc = dsi_panel_bl_unregister(panel);
  2825. if (rc)
  2826. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  2827. panel->name, rc);
  2828. rc = dsi_panel_gpio_release(panel);
  2829. if (rc)
  2830. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  2831. rc);
  2832. rc = dsi_panel_pinctrl_deinit(panel);
  2833. if (rc)
  2834. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  2835. rc);
  2836. rc = dsi_panel_vreg_put(panel);
  2837. if (rc)
  2838. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  2839. panel->host = NULL;
  2840. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  2841. mutex_unlock(&panel->panel_lock);
  2842. return rc;
  2843. }
  2844. int dsi_panel_validate_mode(struct dsi_panel *panel,
  2845. struct dsi_display_mode *mode)
  2846. {
  2847. return 0;
  2848. }
  2849. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  2850. {
  2851. const u32 SINGLE_MODE_SUPPORT = 1;
  2852. struct dsi_parser_utils *utils;
  2853. struct device_node *timings_np, *child_np;
  2854. int num_dfps_rates, num_bit_clks;
  2855. int num_video_modes = 0, num_cmd_modes = 0;
  2856. int count, rc = 0;
  2857. void *utils_data = NULL;
  2858. if (!panel) {
  2859. DSI_ERR("invalid params\n");
  2860. return -EINVAL;
  2861. }
  2862. utils = &panel->utils;
  2863. panel->num_timing_nodes = 0;
  2864. timings_np = utils->get_child_by_name(utils->data,
  2865. "qcom,mdss-dsi-display-timings");
  2866. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  2867. DSI_ERR("no display timing nodes defined\n");
  2868. rc = -EINVAL;
  2869. goto error;
  2870. }
  2871. count = utils->get_child_count(timings_np);
  2872. if ((!count && !panel->host_config.ext_bridge_mode) ||
  2873. count > DSI_MODE_MAX) {
  2874. DSI_ERR("invalid count of timing nodes: %d\n", count);
  2875. rc = -EINVAL;
  2876. goto error;
  2877. }
  2878. /* No multiresolution support is available for video mode panels.
  2879. * Multi-mode is supported for video mode during POMS is enabled.
  2880. */
  2881. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  2882. !panel->host_config.ext_bridge_mode &&
  2883. !panel->panel_mode_switch_enabled)
  2884. count = SINGLE_MODE_SUPPORT;
  2885. panel->num_timing_nodes = count;
  2886. dsi_for_each_child_node(timings_np, child_np) {
  2887. utils_data = child_np;
  2888. if (utils->read_bool(utils->data, "qcom,mdss-dsi-video-mode"))
  2889. num_video_modes++;
  2890. else if (utils->read_bool(utils->data,
  2891. "qcom,mdss-dsi-cmd-mode"))
  2892. num_cmd_modes++;
  2893. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  2894. num_video_modes++;
  2895. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  2896. num_cmd_modes++;
  2897. }
  2898. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  2899. panel->dfps_caps.dfps_list_len;
  2900. num_bit_clks = !panel->dyn_clk_caps.dyn_clk_support ? 1 :
  2901. panel->dyn_clk_caps.bit_clk_list_len;
  2902. /* Inflate num_of_modes by fps and bit clks in dfps */
  2903. panel->num_display_modes = (num_cmd_modes * num_bit_clks) +
  2904. (num_video_modes * num_bit_clks * num_dfps_rates);
  2905. error:
  2906. return rc;
  2907. }
  2908. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  2909. struct dsi_panel_phy_props *phy_props)
  2910. {
  2911. int rc = 0;
  2912. if (!panel || !phy_props) {
  2913. DSI_ERR("invalid params\n");
  2914. return -EINVAL;
  2915. }
  2916. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  2917. return rc;
  2918. }
  2919. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  2920. struct dsi_dfps_capabilities *dfps_caps)
  2921. {
  2922. int rc = 0;
  2923. if (!panel || !dfps_caps) {
  2924. DSI_ERR("invalid params\n");
  2925. return -EINVAL;
  2926. }
  2927. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  2928. return rc;
  2929. }
  2930. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  2931. {
  2932. int i;
  2933. if (!mode->priv_info)
  2934. return;
  2935. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  2936. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2937. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2938. }
  2939. kfree(mode->priv_info);
  2940. }
  2941. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  2942. struct dsi_display_mode *mode, u32 frame_threshold_us)
  2943. {
  2944. u32 frame_time_us,nslices;
  2945. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  2946. dsi_transfer_time_us, pixel_clk_khz;
  2947. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  2948. struct dsi_mode_info *timing = &mode->timing;
  2949. struct dsi_display_mode *display_mode;
  2950. u32 jitter_numer, jitter_denom, prefill_lines;
  2951. u32 min_threshold_us, prefill_time_us;
  2952. u16 bpp;
  2953. /* Packet overlead in bits,2 bytes header + 2 bytes checksum
  2954. * + 1 byte dcs data command.
  2955. */
  2956. const u32 packet_overhead = 56;
  2957. display_mode = container_of(timing, struct dsi_display_mode, timing);
  2958. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  2959. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  2960. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  2961. if (timing->dsc_enabled) {
  2962. nslices = (timing->h_active)/(dsc->config.slice_width);
  2963. /* (slice width x bit-per-pixel + packet overhead) x
  2964. * number of slices x height x fps / lane
  2965. */
  2966. bpp = DSC_BPP(dsc->config);
  2967. bits_per_line = ((dsc->config.slice_width * bpp) +
  2968. packet_overhead) * nslices;
  2969. bits_per_line = bits_per_line / (config->num_data_lanes);
  2970. min_bitclk_hz = (bits_per_line * timing->v_active *
  2971. timing->refresh_rate);
  2972. } else {
  2973. total_active_pixels = ((dsi_h_active_dce(timing)
  2974. * timing->v_active));
  2975. /* calculate the actual bitclk needed to transfer the frame */
  2976. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  2977. (config->bpp));
  2978. do_div(min_bitclk_hz, config->num_data_lanes);
  2979. }
  2980. timing->min_dsi_clk_hz = min_bitclk_hz;
  2981. if (timing->clk_rate_hz) {
  2982. /* adjust the transfer time proportionately for bit clk*/
  2983. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  2984. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  2985. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  2986. } else if (mode->priv_info->mdp_transfer_time_us) {
  2987. timing->dsi_transfer_time_us =
  2988. mode->priv_info->mdp_transfer_time_us;
  2989. } else {
  2990. min_threshold_us = mult_frac(frame_time_us,
  2991. jitter_numer, (jitter_denom * 100));
  2992. /*
  2993. * Increase the prefill_lines proportionately as recommended
  2994. * 35lines for 60fps, 52 for 90fps, 70lines for 120fps.
  2995. */
  2996. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  2997. timing->refresh_rate, 60);
  2998. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  2999. (timing->v_active));
  3000. /*
  3001. * Threshold is sum of panel jitter time, prefill line time
  3002. * plus 100usec buffer time.
  3003. */
  3004. min_threshold_us = min_threshold_us + 100 + prefill_time_us;
  3005. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3006. if (min_threshold_us > frame_threshold_us)
  3007. frame_threshold_us = min_threshold_us;
  3008. timing->dsi_transfer_time_us = frame_time_us -
  3009. frame_threshold_us;
  3010. }
  3011. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3012. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3013. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3014. timing->mdp_transfer_time_us =
  3015. mode->priv_info->mdp_transfer_time_us;
  3016. }
  3017. /* Calculate pclk_khz to update modeinfo */
  3018. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3019. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3020. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3021. do_div(pixel_clk_khz, config->bpp);
  3022. display_mode->pixel_clk_khz = pixel_clk_khz;
  3023. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3024. }
  3025. int dsi_panel_get_mode(struct dsi_panel *panel,
  3026. u32 index, struct dsi_display_mode *mode,
  3027. int topology_override)
  3028. {
  3029. struct device_node *timings_np, *child_np;
  3030. struct dsi_parser_utils *utils;
  3031. struct dsi_display_mode_priv_info *prv_info;
  3032. u32 child_idx = 0;
  3033. int rc = 0, num_timings;
  3034. int traffic_mode;
  3035. int panel_mode;
  3036. void *utils_data = NULL;
  3037. if (!panel || !mode) {
  3038. DSI_ERR("invalid params\n");
  3039. return -EINVAL;
  3040. }
  3041. mutex_lock(&panel->panel_lock);
  3042. utils = &panel->utils;
  3043. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3044. if (!mode->priv_info) {
  3045. rc = -ENOMEM;
  3046. goto done;
  3047. }
  3048. prv_info = mode->priv_info;
  3049. timings_np = utils->get_child_by_name(utils->data,
  3050. "qcom,mdss-dsi-display-timings");
  3051. if (!timings_np) {
  3052. DSI_ERR("no display timing nodes defined\n");
  3053. rc = -EINVAL;
  3054. goto parse_fail;
  3055. }
  3056. num_timings = utils->get_child_count(timings_np);
  3057. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3058. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3059. rc = -EINVAL;
  3060. goto parse_fail;
  3061. }
  3062. utils_data = utils->data;
  3063. traffic_mode = panel->video_config.traffic_mode;
  3064. panel_mode = panel->panel_mode;
  3065. dsi_for_each_child_node(timings_np, child_np) {
  3066. if (index != child_idx++)
  3067. continue;
  3068. utils->data = child_np;
  3069. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3070. if (rc) {
  3071. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3072. goto parse_fail;
  3073. }
  3074. rc = dsi_panel_parse_dsc_params(mode, utils);
  3075. if (rc) {
  3076. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3077. goto parse_fail;
  3078. }
  3079. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode,
  3080. panel_mode);
  3081. if (rc) {
  3082. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3083. goto parse_fail;
  3084. }
  3085. rc = dsi_panel_parse_topology(prv_info, utils,
  3086. topology_override);
  3087. if (rc) {
  3088. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3089. goto parse_fail;
  3090. }
  3091. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3092. if (rc) {
  3093. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3094. goto parse_fail;
  3095. }
  3096. rc = dsi_panel_parse_jitter_config(mode, utils);
  3097. if (rc)
  3098. DSI_ERR(
  3099. "failed to parse panel jitter config, rc=%d\n", rc);
  3100. rc = dsi_panel_parse_phy_timing(mode, utils);
  3101. if (rc) {
  3102. DSI_ERR(
  3103. "failed to parse panel phy timings, rc=%d\n", rc);
  3104. goto parse_fail;
  3105. }
  3106. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3107. if (rc)
  3108. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3109. if (panel->panel_mode_switch_enabled) {
  3110. rc = dsi_panel_parse_panel_mode_caps(mode, utils);
  3111. if (rc) {
  3112. DSI_ERR("PMS: failed to parse panel mode\n");
  3113. rc = 0;
  3114. mode->panel_mode = panel->panel_mode;
  3115. }
  3116. } else {
  3117. mode->panel_mode = panel->panel_mode;
  3118. }
  3119. }
  3120. goto done;
  3121. parse_fail:
  3122. kfree(mode->priv_info);
  3123. mode->priv_info = NULL;
  3124. done:
  3125. utils->data = utils_data;
  3126. mutex_unlock(&panel->panel_lock);
  3127. return rc;
  3128. }
  3129. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3130. struct dsi_display_mode *mode,
  3131. struct dsi_host_config *config)
  3132. {
  3133. int rc = 0;
  3134. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3135. if (!panel || !mode || !config) {
  3136. DSI_ERR("invalid params\n");
  3137. return -EINVAL;
  3138. }
  3139. mutex_lock(&panel->panel_lock);
  3140. config->panel_mode = panel->panel_mode;
  3141. memcpy(&config->common_config, &panel->host_config,
  3142. sizeof(config->common_config));
  3143. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3144. memcpy(&config->u.video_engine, &panel->video_config,
  3145. sizeof(config->u.video_engine));
  3146. } else {
  3147. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3148. sizeof(config->u.cmd_engine));
  3149. }
  3150. memcpy(&config->video_timing, &mode->timing,
  3151. sizeof(config->video_timing));
  3152. config->video_timing.mdp_transfer_time_us =
  3153. mode->priv_info->mdp_transfer_time_us;
  3154. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3155. config->video_timing.dsc = &mode->priv_info->dsc;
  3156. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3157. config->video_timing.vdc = &mode->priv_info->vdc;
  3158. if (dyn_clk_caps->dyn_clk_support)
  3159. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3160. else
  3161. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3162. config->esc_clk_rate_hz = 19200000;
  3163. mutex_unlock(&panel->panel_lock);
  3164. return rc;
  3165. }
  3166. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3167. {
  3168. int rc = 0;
  3169. if (!panel) {
  3170. DSI_ERR("invalid params\n");
  3171. return -EINVAL;
  3172. }
  3173. mutex_lock(&panel->panel_lock);
  3174. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3175. if (panel->lp11_init)
  3176. goto error;
  3177. rc = dsi_panel_power_on(panel);
  3178. if (rc) {
  3179. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3180. goto error;
  3181. }
  3182. error:
  3183. mutex_unlock(&panel->panel_lock);
  3184. return rc;
  3185. }
  3186. int dsi_panel_update_pps(struct dsi_panel *panel)
  3187. {
  3188. int rc = 0;
  3189. struct dsi_panel_cmd_set *set = NULL;
  3190. struct dsi_display_mode_priv_info *priv_info = NULL;
  3191. if (!panel || !panel->cur_mode) {
  3192. DSI_ERR("invalid params\n");
  3193. return -EINVAL;
  3194. }
  3195. mutex_lock(&panel->panel_lock);
  3196. priv_info = panel->cur_mode->priv_info;
  3197. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3198. if (priv_info->dsc_enabled)
  3199. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3200. panel->dce_pps_cmd, 0,
  3201. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3202. else if (priv_info->vdc_enabled)
  3203. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3204. panel->dce_pps_cmd, 0,
  3205. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3206. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3207. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3208. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3209. if (rc) {
  3210. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3211. goto error;
  3212. }
  3213. }
  3214. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3215. if (rc) {
  3216. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3217. panel->name, rc);
  3218. }
  3219. dsi_panel_destroy_cmd_packets(set);
  3220. error:
  3221. mutex_unlock(&panel->panel_lock);
  3222. return rc;
  3223. }
  3224. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3225. {
  3226. int rc = 0;
  3227. if (!panel) {
  3228. DSI_ERR("invalid params\n");
  3229. return -EINVAL;
  3230. }
  3231. mutex_lock(&panel->panel_lock);
  3232. if (!panel->panel_initialized)
  3233. goto exit;
  3234. /*
  3235. * Consider LP1->LP2->LP1.
  3236. * If the panel is already in LP mode, do not need to
  3237. * set the regulator.
  3238. * IBB and AB power mode would be set at the same time
  3239. * in PMIC driver, so we only call ibb setting that is enough.
  3240. */
  3241. if (dsi_panel_is_type_oled(panel) &&
  3242. panel->power_mode != SDE_MODE_DPMS_LP2)
  3243. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3244. "ibb", REGULATOR_MODE_IDLE);
  3245. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3246. if (rc)
  3247. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3248. panel->name, rc);
  3249. exit:
  3250. mutex_unlock(&panel->panel_lock);
  3251. return rc;
  3252. }
  3253. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3254. {
  3255. int rc = 0;
  3256. if (!panel) {
  3257. DSI_ERR("invalid params\n");
  3258. return -EINVAL;
  3259. }
  3260. mutex_lock(&panel->panel_lock);
  3261. if (!panel->panel_initialized)
  3262. goto exit;
  3263. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3264. if (rc)
  3265. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3266. panel->name, rc);
  3267. exit:
  3268. mutex_unlock(&panel->panel_lock);
  3269. return rc;
  3270. }
  3271. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3272. {
  3273. int rc = 0;
  3274. if (!panel) {
  3275. DSI_ERR("invalid params\n");
  3276. return -EINVAL;
  3277. }
  3278. mutex_lock(&panel->panel_lock);
  3279. if (!panel->panel_initialized)
  3280. goto exit;
  3281. /*
  3282. * Consider about LP1->LP2->NOLP.
  3283. */
  3284. if (dsi_panel_is_type_oled(panel) &&
  3285. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3286. panel->power_mode == SDE_MODE_DPMS_LP2))
  3287. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3288. "ibb", REGULATOR_MODE_NORMAL);
  3289. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3290. if (rc)
  3291. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3292. panel->name, rc);
  3293. exit:
  3294. mutex_unlock(&panel->panel_lock);
  3295. return rc;
  3296. }
  3297. int dsi_panel_prepare(struct dsi_panel *panel)
  3298. {
  3299. int rc = 0;
  3300. if (!panel) {
  3301. DSI_ERR("invalid params\n");
  3302. return -EINVAL;
  3303. }
  3304. mutex_lock(&panel->panel_lock);
  3305. if (panel->lp11_init) {
  3306. rc = dsi_panel_power_on(panel);
  3307. if (rc) {
  3308. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3309. panel->name, rc);
  3310. goto error;
  3311. }
  3312. }
  3313. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3314. if (rc) {
  3315. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3316. panel->name, rc);
  3317. goto error;
  3318. }
  3319. error:
  3320. mutex_unlock(&panel->panel_lock);
  3321. return rc;
  3322. }
  3323. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3324. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3325. {
  3326. static const int ROI_CMD_LEN = 5;
  3327. int rc = 0;
  3328. /* DTYPE_DCS_LWRITE */
  3329. char *caset, *paset;
  3330. set->cmds = NULL;
  3331. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3332. if (!caset) {
  3333. rc = -ENOMEM;
  3334. goto exit;
  3335. }
  3336. caset[0] = 0x2a;
  3337. caset[1] = (roi->x & 0xFF00) >> 8;
  3338. caset[2] = roi->x & 0xFF;
  3339. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3340. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3341. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3342. if (!paset) {
  3343. rc = -ENOMEM;
  3344. goto error_free_mem;
  3345. }
  3346. paset[0] = 0x2b;
  3347. paset[1] = (roi->y & 0xFF00) >> 8;
  3348. paset[2] = roi->y & 0xFF;
  3349. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3350. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3351. set->type = DSI_CMD_SET_ROI;
  3352. set->state = DSI_CMD_SET_STATE_LP;
  3353. set->count = 2; /* send caset + paset together */
  3354. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3355. if (!set->cmds) {
  3356. rc = -ENOMEM;
  3357. goto error_free_mem;
  3358. }
  3359. set->cmds[0].msg.channel = 0;
  3360. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3361. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3362. set->cmds[0].msg.ctrl = unicast ? ctrl_idx : 0;
  3363. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3364. set->cmds[0].msg.tx_buf = caset;
  3365. set->cmds[0].msg.rx_len = 0;
  3366. set->cmds[0].msg.rx_buf = 0;
  3367. set->cmds[0].msg.wait_ms = 0;
  3368. set->cmds[0].last_command = 0;
  3369. set->cmds[0].post_wait_ms = 0;
  3370. set->cmds[1].msg.channel = 0;
  3371. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3372. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3373. set->cmds[1].msg.ctrl = unicast ? ctrl_idx : 0;
  3374. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3375. set->cmds[1].msg.tx_buf = paset;
  3376. set->cmds[1].msg.rx_len = 0;
  3377. set->cmds[1].msg.rx_buf = 0;
  3378. set->cmds[1].msg.wait_ms = 0;
  3379. set->cmds[1].last_command = 1;
  3380. set->cmds[1].post_wait_ms = 0;
  3381. goto exit;
  3382. error_free_mem:
  3383. kfree(caset);
  3384. kfree(paset);
  3385. kfree(set->cmds);
  3386. exit:
  3387. return rc;
  3388. }
  3389. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3390. int ctrl_idx)
  3391. {
  3392. int rc = 0;
  3393. if (!panel) {
  3394. DSI_ERR("invalid params\n");
  3395. return -EINVAL;
  3396. }
  3397. mutex_lock(&panel->panel_lock);
  3398. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3399. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3400. if (rc)
  3401. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3402. panel->name, rc);
  3403. mutex_unlock(&panel->panel_lock);
  3404. return rc;
  3405. }
  3406. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3407. int ctrl_idx)
  3408. {
  3409. int rc = 0;
  3410. if (!panel) {
  3411. DSI_ERR("invalid params\n");
  3412. return -EINVAL;
  3413. }
  3414. mutex_lock(&panel->panel_lock);
  3415. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3416. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3417. if (rc)
  3418. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3419. panel->name, rc);
  3420. mutex_unlock(&panel->panel_lock);
  3421. return rc;
  3422. }
  3423. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3424. struct dsi_rect *roi)
  3425. {
  3426. int rc = 0;
  3427. struct dsi_panel_cmd_set *set;
  3428. struct dsi_display_mode_priv_info *priv_info;
  3429. if (!panel || !panel->cur_mode) {
  3430. DSI_ERR("Invalid params\n");
  3431. return -EINVAL;
  3432. }
  3433. priv_info = panel->cur_mode->priv_info;
  3434. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3435. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3436. if (rc) {
  3437. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3438. panel->name, rc);
  3439. return rc;
  3440. }
  3441. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3442. roi->x, roi->y, roi->w, roi->h);
  3443. mutex_lock(&panel->panel_lock);
  3444. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3445. if (rc)
  3446. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3447. panel->name, rc);
  3448. mutex_unlock(&panel->panel_lock);
  3449. dsi_panel_destroy_cmd_packets(set);
  3450. dsi_panel_dealloc_cmd_packets(set);
  3451. return rc;
  3452. }
  3453. int dsi_panel_pre_mode_switch_to_video(struct dsi_panel *panel)
  3454. {
  3455. int rc = 0;
  3456. if (!panel) {
  3457. DSI_ERR("Invalid params\n");
  3458. return -EINVAL;
  3459. }
  3460. mutex_lock(&panel->panel_lock);
  3461. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_TO_VID_SWITCH);
  3462. if (rc)
  3463. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3464. panel->name, rc);
  3465. mutex_unlock(&panel->panel_lock);
  3466. return rc;
  3467. }
  3468. int dsi_panel_pre_mode_switch_to_cmd(struct dsi_panel *panel)
  3469. {
  3470. int rc = 0;
  3471. if (!panel) {
  3472. DSI_ERR("Invalid params\n");
  3473. return -EINVAL;
  3474. }
  3475. mutex_lock(&panel->panel_lock);
  3476. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_TO_CMD_SWITCH);
  3477. if (rc)
  3478. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3479. panel->name, rc);
  3480. mutex_unlock(&panel->panel_lock);
  3481. return rc;
  3482. }
  3483. int dsi_panel_mode_switch_to_cmd(struct dsi_panel *panel)
  3484. {
  3485. int rc = 0;
  3486. if (!panel) {
  3487. DSI_ERR("Invalid params\n");
  3488. return -EINVAL;
  3489. }
  3490. mutex_lock(&panel->panel_lock);
  3491. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_VID_TO_CMD_SWITCH);
  3492. if (rc)
  3493. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3494. panel->name, rc);
  3495. mutex_unlock(&panel->panel_lock);
  3496. return rc;
  3497. }
  3498. int dsi_panel_mode_switch_to_vid(struct dsi_panel *panel)
  3499. {
  3500. int rc = 0;
  3501. if (!panel) {
  3502. DSI_ERR("Invalid params\n");
  3503. return -EINVAL;
  3504. }
  3505. mutex_lock(&panel->panel_lock);
  3506. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_CMD_TO_VID_SWITCH);
  3507. if (rc)
  3508. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3509. panel->name, rc);
  3510. mutex_unlock(&panel->panel_lock);
  3511. return rc;
  3512. }
  3513. int dsi_panel_switch(struct dsi_panel *panel)
  3514. {
  3515. int rc = 0;
  3516. if (!panel) {
  3517. DSI_ERR("Invalid params\n");
  3518. return -EINVAL;
  3519. }
  3520. mutex_lock(&panel->panel_lock);
  3521. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3522. if (rc)
  3523. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3524. panel->name, rc);
  3525. mutex_unlock(&panel->panel_lock);
  3526. return rc;
  3527. }
  3528. int dsi_panel_post_switch(struct dsi_panel *panel)
  3529. {
  3530. int rc = 0;
  3531. if (!panel) {
  3532. DSI_ERR("Invalid params\n");
  3533. return -EINVAL;
  3534. }
  3535. mutex_lock(&panel->panel_lock);
  3536. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3537. if (rc)
  3538. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3539. panel->name, rc);
  3540. mutex_unlock(&panel->panel_lock);
  3541. return rc;
  3542. }
  3543. int dsi_panel_enable(struct dsi_panel *panel)
  3544. {
  3545. int rc = 0;
  3546. if (!panel) {
  3547. DSI_ERR("Invalid params\n");
  3548. return -EINVAL;
  3549. }
  3550. mutex_lock(&panel->panel_lock);
  3551. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3552. if (rc)
  3553. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3554. panel->name, rc);
  3555. else
  3556. panel->panel_initialized = true;
  3557. mutex_unlock(&panel->panel_lock);
  3558. return rc;
  3559. }
  3560. int dsi_panel_post_enable(struct dsi_panel *panel)
  3561. {
  3562. int rc = 0;
  3563. if (!panel) {
  3564. DSI_ERR("invalid params\n");
  3565. return -EINVAL;
  3566. }
  3567. mutex_lock(&panel->panel_lock);
  3568. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3569. if (rc) {
  3570. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3571. panel->name, rc);
  3572. goto error;
  3573. }
  3574. error:
  3575. mutex_unlock(&panel->panel_lock);
  3576. return rc;
  3577. }
  3578. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3579. {
  3580. int rc = 0;
  3581. if (!panel) {
  3582. DSI_ERR("invalid params\n");
  3583. return -EINVAL;
  3584. }
  3585. mutex_lock(&panel->panel_lock);
  3586. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3587. if (rc) {
  3588. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3589. panel->name, rc);
  3590. goto error;
  3591. }
  3592. error:
  3593. mutex_unlock(&panel->panel_lock);
  3594. return rc;
  3595. }
  3596. int dsi_panel_disable(struct dsi_panel *panel)
  3597. {
  3598. int rc = 0;
  3599. if (!panel) {
  3600. DSI_ERR("invalid params\n");
  3601. return -EINVAL;
  3602. }
  3603. mutex_lock(&panel->panel_lock);
  3604. /* Avoid sending panel off commands when ESD recovery is underway */
  3605. if (!atomic_read(&panel->esd_recovery_pending)) {
  3606. /*
  3607. * Need to set IBB/AB regulator mode to STANDBY,
  3608. * if panel is going off from AOD mode.
  3609. */
  3610. if (dsi_panel_is_type_oled(panel) &&
  3611. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3612. panel->power_mode == SDE_MODE_DPMS_LP2))
  3613. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3614. "ibb", REGULATOR_MODE_STANDBY);
  3615. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3616. if (rc) {
  3617. /*
  3618. * Sending panel off commands may fail when DSI
  3619. * controller is in a bad state. These failures can be
  3620. * ignored since controller will go for full reset on
  3621. * subsequent display enable anyway.
  3622. */
  3623. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  3624. panel->name, rc);
  3625. rc = 0;
  3626. }
  3627. }
  3628. panel->panel_initialized = false;
  3629. panel->power_mode = SDE_MODE_DPMS_OFF;
  3630. mutex_unlock(&panel->panel_lock);
  3631. return rc;
  3632. }
  3633. int dsi_panel_unprepare(struct dsi_panel *panel)
  3634. {
  3635. int rc = 0;
  3636. if (!panel) {
  3637. DSI_ERR("invalid params\n");
  3638. return -EINVAL;
  3639. }
  3640. mutex_lock(&panel->panel_lock);
  3641. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  3642. if (rc) {
  3643. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  3644. panel->name, rc);
  3645. goto error;
  3646. }
  3647. error:
  3648. mutex_unlock(&panel->panel_lock);
  3649. return rc;
  3650. }
  3651. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  3652. {
  3653. int rc = 0;
  3654. if (!panel) {
  3655. DSI_ERR("invalid params\n");
  3656. return -EINVAL;
  3657. }
  3658. mutex_lock(&panel->panel_lock);
  3659. rc = dsi_panel_power_off(panel);
  3660. if (rc) {
  3661. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  3662. panel->name, rc);
  3663. goto error;
  3664. }
  3665. error:
  3666. mutex_unlock(&panel->panel_lock);
  3667. return rc;
  3668. }