main.c 110 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/version.h>
  20. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  21. #include <linux/panic_notifier.h>
  22. #endif
  23. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  24. #include <soc/qcom/minidump.h>
  25. #endif
  26. #include "cnss_plat_ipc_qmi.h"
  27. #include "cnss_utils.h"
  28. #include "main.h"
  29. #include "bus.h"
  30. #include "debug.h"
  31. #include "genl.h"
  32. #include "reg.h"
  33. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  34. #include "smcinvoke.h"
  35. #include "smcinvoke_object.h"
  36. #include "IClientEnv.h"
  37. #define HW_STATE_UID 0x108
  38. #define HW_OP_GET_STATE 1
  39. #define HW_WIFI_UID 0x508
  40. #define FEATURE_NOT_SUPPORTED 12
  41. #define PERIPHERAL_NOT_FOUND 10
  42. #endif
  43. #define CNSS_DUMP_FORMAT_VER 0x11
  44. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  45. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  46. #define CNSS_DUMP_NAME "CNSS_WLAN"
  47. #define CNSS_DUMP_DESC_SIZE 0x1000
  48. #define CNSS_DUMP_SEG_VER 0x1
  49. #define FILE_SYSTEM_READY 1
  50. #define FW_READY_TIMEOUT 20000
  51. #define FW_ASSERT_TIMEOUT 5000
  52. #define CNSS_EVENT_PENDING 2989
  53. #define POWER_RESET_MIN_DELAY_MS 100
  54. #define CNSS_QUIRKS_DEFAULT 0
  55. #ifdef CONFIG_CNSS_EMULATION
  56. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  57. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  58. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  59. #else
  60. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  61. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  62. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  63. #endif
  64. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  65. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  66. #define CNSS_MIN_TIME_SYNC_PERIOD 2000
  67. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  68. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  69. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  70. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  71. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  72. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  73. enum cnss_cal_db_op {
  74. CNSS_CAL_DB_UPLOAD,
  75. CNSS_CAL_DB_DOWNLOAD,
  76. CNSS_CAL_DB_INVALID_OP,
  77. };
  78. enum cnss_recovery_type {
  79. CNSS_WLAN_RECOVERY = 0x1,
  80. CNSS_PCSS_RECOVERY = 0x2,
  81. };
  82. static struct cnss_plat_data *plat_env;
  83. static bool cnss_allow_driver_loading;
  84. static DECLARE_RWSEM(cnss_pm_sem);
  85. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  86. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  87. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  88. };
  89. static struct cnss_fw_files FW_FILES_DEFAULT = {
  90. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  91. "utfbd.bin", "epping.bin", "evicted.bin"
  92. };
  93. struct cnss_driver_event {
  94. struct list_head list;
  95. enum cnss_driver_event_type type;
  96. bool sync;
  97. struct completion complete;
  98. int ret;
  99. void *data;
  100. };
  101. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  102. struct cnss_plat_data *plat_priv)
  103. {
  104. plat_env = plat_priv;
  105. }
  106. bool cnss_check_driver_loading_allowed(void)
  107. {
  108. return cnss_allow_driver_loading;
  109. }
  110. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  111. {
  112. return plat_env;
  113. }
  114. /**
  115. * cnss_get_mem_seg_count - Get segment count of memory
  116. * @type: memory type
  117. * @seg: segment count
  118. *
  119. * Return: 0 on success, negative value on failure
  120. */
  121. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  122. {
  123. struct cnss_plat_data *plat_priv;
  124. plat_priv = cnss_get_plat_priv(NULL);
  125. if (!plat_priv)
  126. return -ENODEV;
  127. switch (type) {
  128. case CNSS_REMOTE_MEM_TYPE_FW:
  129. *seg = plat_priv->fw_mem_seg_len;
  130. break;
  131. case CNSS_REMOTE_MEM_TYPE_QDSS:
  132. *seg = plat_priv->qdss_mem_seg_len;
  133. break;
  134. default:
  135. return -EINVAL;
  136. }
  137. return 0;
  138. }
  139. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  140. /**
  141. * cnss_get_wifi_kobject -return wifi kobject
  142. * Return: Null, to maintain driver comnpatibilty
  143. */
  144. struct kobject *cnss_get_wifi_kobj(struct device *dev)
  145. {
  146. struct cnss_plat_data *plat_priv;
  147. plat_priv = cnss_get_plat_priv(NULL);
  148. if (!plat_priv)
  149. return NULL;
  150. return plat_priv->wifi_kobj;
  151. }
  152. EXPORT_SYMBOL(cnss_get_wifi_kobj);
  153. /**
  154. * cnss_get_mem_segment_info - Get memory info of different type
  155. * @type: memory type
  156. * @segment: array to save the segment info
  157. * @seg: segment count
  158. *
  159. * Return: 0 on success, negative value on failure
  160. */
  161. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  162. struct cnss_mem_segment segment[],
  163. u32 segment_count)
  164. {
  165. struct cnss_plat_data *plat_priv;
  166. u32 i;
  167. plat_priv = cnss_get_plat_priv(NULL);
  168. if (!plat_priv)
  169. return -ENODEV;
  170. switch (type) {
  171. case CNSS_REMOTE_MEM_TYPE_FW:
  172. if (segment_count > plat_priv->fw_mem_seg_len)
  173. segment_count = plat_priv->fw_mem_seg_len;
  174. for (i = 0; i < segment_count; i++) {
  175. segment[i].size = plat_priv->fw_mem[i].size;
  176. segment[i].va = plat_priv->fw_mem[i].va;
  177. segment[i].pa = plat_priv->fw_mem[i].pa;
  178. }
  179. break;
  180. case CNSS_REMOTE_MEM_TYPE_QDSS:
  181. if (segment_count > plat_priv->qdss_mem_seg_len)
  182. segment_count = plat_priv->qdss_mem_seg_len;
  183. for (i = 0; i < segment_count; i++) {
  184. segment[i].size = plat_priv->qdss_mem[i].size;
  185. segment[i].va = plat_priv->qdss_mem[i].va;
  186. segment[i].pa = plat_priv->qdss_mem[i].pa;
  187. }
  188. break;
  189. default:
  190. return -EINVAL;
  191. }
  192. return 0;
  193. }
  194. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  195. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  196. enum cnss_feature_v01 feature)
  197. {
  198. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  199. return -EINVAL;
  200. plat_priv->feature_list |= 1 << feature;
  201. return 0;
  202. }
  203. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  204. enum cnss_feature_v01 feature)
  205. {
  206. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  207. return -EINVAL;
  208. plat_priv->feature_list &= ~(1 << feature);
  209. return 0;
  210. }
  211. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  212. u64 *feature_list)
  213. {
  214. if (unlikely(!plat_priv))
  215. return -EINVAL;
  216. *feature_list = plat_priv->feature_list;
  217. return 0;
  218. }
  219. static int cnss_pm_notify(struct notifier_block *b,
  220. unsigned long event, void *p)
  221. {
  222. switch (event) {
  223. case PM_SUSPEND_PREPARE:
  224. down_write(&cnss_pm_sem);
  225. break;
  226. case PM_POST_SUSPEND:
  227. up_write(&cnss_pm_sem);
  228. break;
  229. }
  230. return NOTIFY_DONE;
  231. }
  232. static struct notifier_block cnss_pm_notifier = {
  233. .notifier_call = cnss_pm_notify,
  234. };
  235. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  236. {
  237. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  238. return;
  239. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  240. plat_priv->driver_state,
  241. atomic_read(&plat_priv->pm_count));
  242. pm_stay_awake(&plat_priv->plat_dev->dev);
  243. }
  244. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  245. {
  246. int r = atomic_dec_return(&plat_priv->pm_count);
  247. WARN_ON(r < 0);
  248. if (r != 0)
  249. return;
  250. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  251. plat_priv->driver_state,
  252. atomic_read(&plat_priv->pm_count));
  253. pm_relax(&plat_priv->plat_dev->dev);
  254. }
  255. void cnss_lock_pm_sem(struct device *dev)
  256. {
  257. down_read(&cnss_pm_sem);
  258. }
  259. EXPORT_SYMBOL(cnss_lock_pm_sem);
  260. void cnss_release_pm_sem(struct device *dev)
  261. {
  262. up_read(&cnss_pm_sem);
  263. }
  264. EXPORT_SYMBOL(cnss_release_pm_sem);
  265. int cnss_get_fw_files_for_target(struct device *dev,
  266. struct cnss_fw_files *pfw_files,
  267. u32 target_type, u32 target_version)
  268. {
  269. if (!pfw_files)
  270. return -ENODEV;
  271. switch (target_version) {
  272. case QCA6174_REV3_VERSION:
  273. case QCA6174_REV3_2_VERSION:
  274. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  275. break;
  276. default:
  277. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  278. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  279. target_type, target_version);
  280. break;
  281. }
  282. return 0;
  283. }
  284. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  285. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  286. {
  287. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  288. if (!plat_priv)
  289. return -ENODEV;
  290. if (!cap)
  291. return -EINVAL;
  292. *cap = plat_priv->cap;
  293. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  294. return 0;
  295. }
  296. EXPORT_SYMBOL(cnss_get_platform_cap);
  297. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  298. {
  299. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  300. if (!plat_priv)
  301. return;
  302. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  303. }
  304. EXPORT_SYMBOL(cnss_request_pm_qos);
  305. void cnss_remove_pm_qos(struct device *dev)
  306. {
  307. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  308. if (!plat_priv)
  309. return;
  310. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  311. }
  312. EXPORT_SYMBOL(cnss_remove_pm_qos);
  313. int cnss_wlan_enable(struct device *dev,
  314. struct cnss_wlan_enable_cfg *config,
  315. enum cnss_driver_mode mode,
  316. const char *host_version)
  317. {
  318. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  319. int ret = 0;
  320. if (!plat_priv)
  321. return -ENODEV;
  322. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  323. return 0;
  324. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  325. return 0;
  326. if (!config || !host_version) {
  327. cnss_pr_err("Invalid config or host_version pointer\n");
  328. return -EINVAL;
  329. }
  330. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  331. mode, config, host_version);
  332. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  333. goto skip_cfg;
  334. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  335. if (ret)
  336. goto out;
  337. skip_cfg:
  338. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  339. out:
  340. return ret;
  341. }
  342. EXPORT_SYMBOL(cnss_wlan_enable);
  343. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  344. {
  345. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  346. int ret = 0;
  347. if (!plat_priv)
  348. return -ENODEV;
  349. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  350. return 0;
  351. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  352. return 0;
  353. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  354. cnss_bus_free_qdss_mem(plat_priv);
  355. return ret;
  356. }
  357. EXPORT_SYMBOL(cnss_wlan_disable);
  358. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  359. u32 data_len, u8 *output)
  360. {
  361. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  362. int ret = 0;
  363. if (!plat_priv) {
  364. cnss_pr_err("plat_priv is NULL!\n");
  365. return -EINVAL;
  366. }
  367. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  368. return 0;
  369. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  370. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  371. plat_priv->driver_state);
  372. ret = -EINVAL;
  373. goto out;
  374. }
  375. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  376. data_len, output);
  377. out:
  378. return ret;
  379. }
  380. EXPORT_SYMBOL(cnss_athdiag_read);
  381. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  382. u32 data_len, u8 *input)
  383. {
  384. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  385. int ret = 0;
  386. if (!plat_priv) {
  387. cnss_pr_err("plat_priv is NULL!\n");
  388. return -EINVAL;
  389. }
  390. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  391. return 0;
  392. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  393. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  394. plat_priv->driver_state);
  395. ret = -EINVAL;
  396. goto out;
  397. }
  398. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  399. data_len, input);
  400. out:
  401. return ret;
  402. }
  403. EXPORT_SYMBOL(cnss_athdiag_write);
  404. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  405. {
  406. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  407. if (!plat_priv)
  408. return -ENODEV;
  409. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  410. return 0;
  411. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  412. }
  413. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  414. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  415. {
  416. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  417. if (!plat_priv)
  418. return -EINVAL;
  419. if (!plat_priv->fw_pcie_gen_switch) {
  420. cnss_pr_err("Firmware does not support PCIe gen switch\n");
  421. return -EOPNOTSUPP;
  422. }
  423. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  424. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  425. return -EINVAL;
  426. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  427. plat_priv->pcie_gen_speed = pcie_gen_speed;
  428. return 0;
  429. }
  430. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  431. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  432. {
  433. int ret = 0;
  434. if (!plat_priv)
  435. return -ENODEV;
  436. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  437. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  438. if (ret)
  439. goto out;
  440. if (plat_priv->hds_enabled)
  441. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  442. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  443. cnss_wlfw_ini_file_send_sync(plat_priv, WLFW_CONN_ROAM_INI_V01);
  444. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  445. plat_priv->ctrl_params.bdf_type);
  446. if (ret)
  447. goto out;
  448. ret = cnss_bus_load_m3(plat_priv);
  449. if (ret)
  450. goto out;
  451. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  452. if (ret)
  453. goto out;
  454. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  455. return 0;
  456. out:
  457. return ret;
  458. }
  459. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  460. {
  461. int ret = 0;
  462. if (!plat_priv->antenna) {
  463. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  464. if (ret)
  465. goto out;
  466. }
  467. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  468. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  469. if (ret)
  470. goto out;
  471. }
  472. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  473. if (ret)
  474. goto out;
  475. return 0;
  476. out:
  477. return ret;
  478. }
  479. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  480. {
  481. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  482. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  483. }
  484. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  485. {
  486. u32 i;
  487. int ret = 0;
  488. struct cnss_plat_ipc_daemon_config *cfg;
  489. ret = cnss_qmi_get_dms_mac(plat_priv);
  490. if (ret == 0 && plat_priv->dms.mac_valid)
  491. goto qmi_send;
  492. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  493. * Thus assert on failure to get MAC from DMS even after retries
  494. */
  495. if (plat_priv->use_nv_mac) {
  496. /* Check if Daemon says platform support DMS MAC provisioning */
  497. cfg = cnss_plat_ipc_qmi_daemon_config();
  498. if (cfg) {
  499. if (!cfg->dms_mac_addr_supported) {
  500. cnss_pr_err("DMS MAC address not supported\n");
  501. CNSS_ASSERT(0);
  502. return -EINVAL;
  503. }
  504. }
  505. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  506. if (plat_priv->dms.mac_valid)
  507. break;
  508. ret = cnss_qmi_get_dms_mac(plat_priv);
  509. if (ret == 0)
  510. break;
  511. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  512. }
  513. if (!plat_priv->dms.mac_valid) {
  514. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  515. CNSS_ASSERT(0);
  516. return -EINVAL;
  517. }
  518. }
  519. qmi_send:
  520. if (plat_priv->dms.mac_valid)
  521. ret =
  522. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  523. ARRAY_SIZE(plat_priv->dms.mac));
  524. return ret;
  525. }
  526. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  527. enum cnss_cal_db_op op, u32 *size)
  528. {
  529. int ret = 0;
  530. u32 timeout = cnss_get_timeout(plat_priv,
  531. CNSS_TIMEOUT_DAEMON_CONNECTION);
  532. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  533. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  534. if (op >= CNSS_CAL_DB_INVALID_OP)
  535. return -EINVAL;
  536. if (!plat_priv->cbc_file_download) {
  537. cnss_pr_info("CAL DB file not required as per BDF\n");
  538. return 0;
  539. }
  540. if (*size == 0) {
  541. cnss_pr_err("Invalid cal file size\n");
  542. return -EINVAL;
  543. }
  544. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  545. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  546. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  547. msecs_to_jiffies(timeout));
  548. if (!ret) {
  549. cnss_pr_err("Daemon not yet connected\n");
  550. CNSS_ASSERT(0);
  551. return ret;
  552. }
  553. }
  554. if (!plat_priv->cal_mem->va) {
  555. cnss_pr_err("CAL DB Memory not setup for FW\n");
  556. return -EINVAL;
  557. }
  558. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  559. if (op == CNSS_CAL_DB_DOWNLOAD) {
  560. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  561. ret = cnss_plat_ipc_qmi_file_download(client_id,
  562. CNSS_CAL_DB_FILE_NAME,
  563. plat_priv->cal_mem->va,
  564. size);
  565. } else {
  566. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  567. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  568. CNSS_CAL_DB_FILE_NAME,
  569. plat_priv->cal_mem->va,
  570. *size);
  571. }
  572. if (ret)
  573. cnss_pr_err("Cal DB file %s %s failure\n",
  574. CNSS_CAL_DB_FILE_NAME,
  575. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  576. else
  577. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  578. CNSS_CAL_DB_FILE_NAME,
  579. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  580. *size);
  581. return ret;
  582. }
  583. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  584. {
  585. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  586. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  587. return -EINVAL;
  588. }
  589. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  590. &plat_priv->cal_file_size);
  591. }
  592. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  593. u32 *cal_file_size)
  594. {
  595. /* To download pass the total size of cal DB mem allocated.
  596. * After cal file is download to mem, its size is updated in
  597. * return pointer
  598. */
  599. *cal_file_size = plat_priv->cal_mem->size;
  600. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  601. cal_file_size);
  602. }
  603. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  604. {
  605. int ret = 0;
  606. u32 cal_file_size = 0;
  607. if (!plat_priv)
  608. return -ENODEV;
  609. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  610. cnss_pr_err("Reboot is in progress, ignore FW ready\n");
  611. return -EINVAL;
  612. }
  613. cnss_pr_dbg("Processing FW Init Done..\n");
  614. del_timer(&plat_priv->fw_boot_timer);
  615. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  616. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  617. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  618. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  619. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  620. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  621. }
  622. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  623. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  624. CNSS_WALTEST);
  625. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  626. cnss_request_antenna_sharing(plat_priv);
  627. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  628. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  629. plat_priv->cal_time = jiffies;
  630. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  631. CNSS_CALIBRATION);
  632. } else {
  633. ret = cnss_setup_dms_mac(plat_priv);
  634. ret = cnss_bus_call_driver_probe(plat_priv);
  635. }
  636. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  637. goto out;
  638. else if (ret)
  639. goto shutdown;
  640. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  641. return 0;
  642. shutdown:
  643. cnss_bus_dev_shutdown(plat_priv);
  644. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  645. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  646. out:
  647. return ret;
  648. }
  649. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  650. {
  651. switch (type) {
  652. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  653. return "SERVER_ARRIVE";
  654. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  655. return "SERVER_EXIT";
  656. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  657. return "REQUEST_MEM";
  658. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  659. return "FW_MEM_READY";
  660. case CNSS_DRIVER_EVENT_FW_READY:
  661. return "FW_READY";
  662. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  663. return "COLD_BOOT_CAL_START";
  664. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  665. return "COLD_BOOT_CAL_DONE";
  666. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  667. return "REGISTER_DRIVER";
  668. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  669. return "UNREGISTER_DRIVER";
  670. case CNSS_DRIVER_EVENT_RECOVERY:
  671. return "RECOVERY";
  672. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  673. return "FORCE_FW_ASSERT";
  674. case CNSS_DRIVER_EVENT_POWER_UP:
  675. return "POWER_UP";
  676. case CNSS_DRIVER_EVENT_POWER_DOWN:
  677. return "POWER_DOWN";
  678. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  679. return "IDLE_RESTART";
  680. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  681. return "IDLE_SHUTDOWN";
  682. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  683. return "IMS_WFC_CALL_IND";
  684. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  685. return "WLFW_TWC_CFG_IND";
  686. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  687. return "QDSS_TRACE_REQ_MEM";
  688. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  689. return "FW_MEM_FILE_SAVE";
  690. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  691. return "QDSS_TRACE_FREE";
  692. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  693. return "QDSS_TRACE_REQ_DATA";
  694. case CNSS_DRIVER_EVENT_MAX:
  695. return "EVENT_MAX";
  696. }
  697. return "UNKNOWN";
  698. };
  699. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  700. enum cnss_driver_event_type type,
  701. u32 flags, void *data)
  702. {
  703. struct cnss_driver_event *event;
  704. unsigned long irq_flags;
  705. int gfp = GFP_KERNEL;
  706. int ret = 0;
  707. if (!plat_priv)
  708. return -ENODEV;
  709. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  710. cnss_driver_event_to_str(type), type,
  711. flags ? "-sync" : "", plat_priv->driver_state, flags);
  712. if (type >= CNSS_DRIVER_EVENT_MAX) {
  713. cnss_pr_err("Invalid Event type: %d, can't post", type);
  714. return -EINVAL;
  715. }
  716. if (in_interrupt() || irqs_disabled())
  717. gfp = GFP_ATOMIC;
  718. event = kzalloc(sizeof(*event), gfp);
  719. if (!event)
  720. return -ENOMEM;
  721. cnss_pm_stay_awake(plat_priv);
  722. event->type = type;
  723. event->data = data;
  724. init_completion(&event->complete);
  725. event->ret = CNSS_EVENT_PENDING;
  726. event->sync = !!(flags & CNSS_EVENT_SYNC);
  727. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  728. list_add_tail(&event->list, &plat_priv->event_list);
  729. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  730. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  731. if (!(flags & CNSS_EVENT_SYNC))
  732. goto out;
  733. if (flags & CNSS_EVENT_UNKILLABLE)
  734. wait_for_completion(&event->complete);
  735. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  736. ret = wait_for_completion_killable(&event->complete);
  737. else
  738. ret = wait_for_completion_interruptible(&event->complete);
  739. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  740. cnss_driver_event_to_str(type), type,
  741. plat_priv->driver_state, ret, event->ret);
  742. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  743. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  744. event->sync = false;
  745. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  746. ret = -EINTR;
  747. goto out;
  748. }
  749. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  750. ret = event->ret;
  751. kfree(event);
  752. out:
  753. cnss_pm_relax(plat_priv);
  754. return ret;
  755. }
  756. /**
  757. * cnss_get_timeout - Get timeout for corresponding type.
  758. * @plat_priv: Pointer to platform driver context.
  759. * @cnss_timeout_type: Timeout type.
  760. *
  761. * Return: Timeout in milliseconds.
  762. */
  763. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  764. enum cnss_timeout_type timeout_type)
  765. {
  766. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  767. switch (timeout_type) {
  768. case CNSS_TIMEOUT_QMI:
  769. return qmi_timeout;
  770. case CNSS_TIMEOUT_POWER_UP:
  771. return (qmi_timeout << 2);
  772. case CNSS_TIMEOUT_IDLE_RESTART:
  773. /* In idle restart power up sequence, we have fw_boot_timer to
  774. * handle FW initialization failure.
  775. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  776. * account for FW dump collection and FW re-initialization on
  777. * retry.
  778. */
  779. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  780. case CNSS_TIMEOUT_CALIBRATION:
  781. /* Similar to mission mode, in CBC if FW init fails
  782. * fw recovery is tried. Thus return 2x the CBC timeout.
  783. */
  784. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  785. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  786. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  787. case CNSS_TIMEOUT_RDDM:
  788. return CNSS_RDDM_TIMEOUT_MS;
  789. case CNSS_TIMEOUT_RECOVERY:
  790. return RECOVERY_TIMEOUT;
  791. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  792. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  793. default:
  794. return qmi_timeout;
  795. }
  796. }
  797. unsigned int cnss_get_boot_timeout(struct device *dev)
  798. {
  799. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  800. if (!plat_priv) {
  801. cnss_pr_err("plat_priv is NULL\n");
  802. return 0;
  803. }
  804. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  805. }
  806. EXPORT_SYMBOL(cnss_get_boot_timeout);
  807. int cnss_power_up(struct device *dev)
  808. {
  809. int ret = 0;
  810. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  811. unsigned int timeout;
  812. if (!plat_priv) {
  813. cnss_pr_err("plat_priv is NULL\n");
  814. return -ENODEV;
  815. }
  816. cnss_pr_dbg("Powering up device\n");
  817. ret = cnss_driver_event_post(plat_priv,
  818. CNSS_DRIVER_EVENT_POWER_UP,
  819. CNSS_EVENT_SYNC, NULL);
  820. if (ret)
  821. goto out;
  822. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  823. goto out;
  824. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  825. reinit_completion(&plat_priv->power_up_complete);
  826. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  827. msecs_to_jiffies(timeout));
  828. if (!ret) {
  829. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  830. timeout);
  831. ret = -EAGAIN;
  832. goto out;
  833. }
  834. return 0;
  835. out:
  836. return ret;
  837. }
  838. EXPORT_SYMBOL(cnss_power_up);
  839. int cnss_power_down(struct device *dev)
  840. {
  841. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  842. if (!plat_priv) {
  843. cnss_pr_err("plat_priv is NULL\n");
  844. return -ENODEV;
  845. }
  846. cnss_pr_dbg("Powering down device\n");
  847. return cnss_driver_event_post(plat_priv,
  848. CNSS_DRIVER_EVENT_POWER_DOWN,
  849. CNSS_EVENT_SYNC, NULL);
  850. }
  851. EXPORT_SYMBOL(cnss_power_down);
  852. int cnss_idle_restart(struct device *dev)
  853. {
  854. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  855. unsigned int timeout;
  856. int ret = 0;
  857. if (!plat_priv) {
  858. cnss_pr_err("plat_priv is NULL\n");
  859. return -ENODEV;
  860. }
  861. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  862. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  863. return -EBUSY;
  864. }
  865. cnss_pr_dbg("Doing idle restart\n");
  866. reinit_completion(&plat_priv->power_up_complete);
  867. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  868. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  869. ret = -EINVAL;
  870. goto out;
  871. }
  872. ret = cnss_driver_event_post(plat_priv,
  873. CNSS_DRIVER_EVENT_IDLE_RESTART,
  874. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  875. if (ret)
  876. goto out;
  877. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  878. ret = cnss_bus_call_driver_probe(plat_priv);
  879. goto out;
  880. }
  881. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  882. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  883. msecs_to_jiffies(timeout));
  884. if (plat_priv->power_up_error) {
  885. ret = plat_priv->power_up_error;
  886. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  887. cnss_pr_dbg("Power up error:%d, exiting\n",
  888. plat_priv->power_up_error);
  889. goto out;
  890. }
  891. if (!ret) {
  892. /* This exception occurs after attempting retry of FW recovery.
  893. * Thus we can safely power off the device.
  894. */
  895. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  896. timeout);
  897. ret = -ETIMEDOUT;
  898. cnss_power_down(dev);
  899. CNSS_ASSERT(0);
  900. goto out;
  901. }
  902. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  903. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  904. del_timer(&plat_priv->fw_boot_timer);
  905. ret = -EINVAL;
  906. goto out;
  907. }
  908. /* In non-DRV mode, remove MHI satellite configuration. Switching to
  909. * non-DRV is supported only once after device reboots and before wifi
  910. * is turned on. We do not allow switching back to DRV.
  911. * To bring device back into DRV, user needs to reboot device.
  912. */
  913. if (test_bit(DISABLE_DRV, &plat_priv->ctrl_params.quirks)) {
  914. cnss_pr_dbg("DRV is disabled\n");
  915. cnss_bus_disable_mhi_satellite_cfg(plat_priv);
  916. }
  917. mutex_unlock(&plat_priv->driver_ops_lock);
  918. return 0;
  919. out:
  920. mutex_unlock(&plat_priv->driver_ops_lock);
  921. return ret;
  922. }
  923. EXPORT_SYMBOL(cnss_idle_restart);
  924. int cnss_idle_shutdown(struct device *dev)
  925. {
  926. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  927. unsigned int timeout;
  928. int ret;
  929. if (!plat_priv) {
  930. cnss_pr_err("plat_priv is NULL\n");
  931. return -ENODEV;
  932. }
  933. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  934. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  935. return -EAGAIN;
  936. }
  937. cnss_pr_dbg("Doing idle shutdown\n");
  938. if (!test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) &&
  939. !test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  940. goto skip_wait;
  941. reinit_completion(&plat_priv->recovery_complete);
  942. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY);
  943. ret = wait_for_completion_timeout(&plat_priv->recovery_complete,
  944. msecs_to_jiffies(timeout));
  945. if (!ret) {
  946. cnss_pr_err("Timeout (%ums) waiting for recovery to complete\n",
  947. timeout);
  948. CNSS_ASSERT(0);
  949. }
  950. skip_wait:
  951. return cnss_driver_event_post(plat_priv,
  952. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  953. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  954. }
  955. EXPORT_SYMBOL(cnss_idle_shutdown);
  956. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  957. {
  958. int ret = 0;
  959. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  960. if (ret) {
  961. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  962. goto out;
  963. }
  964. ret = cnss_get_clk(plat_priv);
  965. if (ret) {
  966. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  967. goto put_vreg;
  968. }
  969. ret = cnss_get_pinctrl(plat_priv);
  970. if (ret) {
  971. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  972. goto put_clk;
  973. }
  974. return 0;
  975. put_clk:
  976. cnss_put_clk(plat_priv);
  977. put_vreg:
  978. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  979. out:
  980. return ret;
  981. }
  982. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  983. {
  984. cnss_put_clk(plat_priv);
  985. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  986. }
  987. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  988. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  989. unsigned long code,
  990. void *ss_handle)
  991. {
  992. struct cnss_plat_data *plat_priv =
  993. container_of(nb, struct cnss_plat_data, modem_nb);
  994. struct cnss_esoc_info *esoc_info;
  995. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  996. if (!plat_priv)
  997. return NOTIFY_DONE;
  998. esoc_info = &plat_priv->esoc_info;
  999. if (code == SUBSYS_AFTER_POWERUP)
  1000. esoc_info->modem_current_status = 1;
  1001. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  1002. esoc_info->modem_current_status = 0;
  1003. else
  1004. return NOTIFY_DONE;
  1005. if (!cnss_bus_call_driver_modem_status(plat_priv,
  1006. esoc_info->modem_current_status))
  1007. return NOTIFY_DONE;
  1008. return NOTIFY_OK;
  1009. }
  1010. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1011. {
  1012. int ret = 0;
  1013. struct device *dev;
  1014. struct cnss_esoc_info *esoc_info;
  1015. struct esoc_desc *esoc_desc;
  1016. const char *client_desc;
  1017. dev = &plat_priv->plat_dev->dev;
  1018. esoc_info = &plat_priv->esoc_info;
  1019. esoc_info->notify_modem_status =
  1020. of_property_read_bool(dev->of_node,
  1021. "qcom,notify-modem-status");
  1022. if (!esoc_info->notify_modem_status)
  1023. goto out;
  1024. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  1025. &client_desc);
  1026. if (ret) {
  1027. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  1028. } else {
  1029. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1030. if (IS_ERR_OR_NULL(esoc_desc)) {
  1031. ret = PTR_RET(esoc_desc);
  1032. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1033. ret);
  1034. goto out;
  1035. }
  1036. esoc_info->esoc_desc = esoc_desc;
  1037. }
  1038. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1039. esoc_info->modem_current_status = 0;
  1040. esoc_info->modem_notify_handler =
  1041. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1042. esoc_info->esoc_desc->name :
  1043. "modem", &plat_priv->modem_nb);
  1044. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1045. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1046. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1047. ret);
  1048. goto unreg_esoc;
  1049. }
  1050. return 0;
  1051. unreg_esoc:
  1052. if (esoc_info->esoc_desc)
  1053. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1054. out:
  1055. return ret;
  1056. }
  1057. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1058. {
  1059. struct device *dev;
  1060. struct cnss_esoc_info *esoc_info;
  1061. dev = &plat_priv->plat_dev->dev;
  1062. esoc_info = &plat_priv->esoc_info;
  1063. if (esoc_info->notify_modem_status)
  1064. subsys_notif_unregister_notifier
  1065. (esoc_info->modem_notify_handler,
  1066. &plat_priv->modem_nb);
  1067. if (esoc_info->esoc_desc)
  1068. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1069. }
  1070. #else
  1071. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1072. {
  1073. return 0;
  1074. }
  1075. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1076. #endif
  1077. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1078. {
  1079. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1080. int ret = 0;
  1081. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1082. return 0;
  1083. enable_irq(sol_gpio->dev_sol_irq);
  1084. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1085. if (ret)
  1086. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1087. ret);
  1088. return ret;
  1089. }
  1090. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1091. {
  1092. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1093. int ret = 0;
  1094. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1095. return 0;
  1096. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1097. if (ret)
  1098. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1099. ret);
  1100. disable_irq(sol_gpio->dev_sol_irq);
  1101. return ret;
  1102. }
  1103. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1104. {
  1105. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1106. if (sol_gpio->dev_sol_gpio < 0)
  1107. return -EINVAL;
  1108. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1109. }
  1110. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1111. {
  1112. struct cnss_plat_data *plat_priv = data;
  1113. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1114. sol_gpio->dev_sol_counter++;
  1115. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1116. irq, sol_gpio->dev_sol_counter);
  1117. /* Make sure abort current suspend */
  1118. cnss_pm_stay_awake(plat_priv);
  1119. cnss_pm_relax(plat_priv);
  1120. pm_system_wakeup();
  1121. cnss_bus_handle_dev_sol_irq(plat_priv);
  1122. return IRQ_HANDLED;
  1123. }
  1124. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1125. {
  1126. struct device *dev = &plat_priv->plat_dev->dev;
  1127. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1128. int ret = 0;
  1129. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1130. "wlan-dev-sol-gpio", 0);
  1131. if (sol_gpio->dev_sol_gpio < 0)
  1132. goto out;
  1133. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1134. sol_gpio->dev_sol_gpio);
  1135. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1136. if (ret) {
  1137. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1138. ret);
  1139. goto out;
  1140. }
  1141. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1142. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1143. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1144. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1145. if (ret) {
  1146. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1147. goto free_gpio;
  1148. }
  1149. return 0;
  1150. free_gpio:
  1151. gpio_free(sol_gpio->dev_sol_gpio);
  1152. out:
  1153. return ret;
  1154. }
  1155. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1156. {
  1157. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1158. if (sol_gpio->dev_sol_gpio < 0)
  1159. return;
  1160. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1161. gpio_free(sol_gpio->dev_sol_gpio);
  1162. }
  1163. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1164. {
  1165. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1166. if (sol_gpio->host_sol_gpio < 0)
  1167. return -EINVAL;
  1168. if (value)
  1169. cnss_pr_dbg("Assert host SOL GPIO\n");
  1170. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1171. return 0;
  1172. }
  1173. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1174. {
  1175. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1176. if (sol_gpio->host_sol_gpio < 0)
  1177. return -EINVAL;
  1178. return gpio_get_value(sol_gpio->host_sol_gpio);
  1179. }
  1180. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1181. {
  1182. struct device *dev = &plat_priv->plat_dev->dev;
  1183. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1184. int ret = 0;
  1185. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1186. "wlan-host-sol-gpio", 0);
  1187. if (sol_gpio->host_sol_gpio < 0)
  1188. goto out;
  1189. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1190. sol_gpio->host_sol_gpio);
  1191. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1192. if (ret) {
  1193. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1194. ret);
  1195. goto out;
  1196. }
  1197. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1198. return 0;
  1199. out:
  1200. return ret;
  1201. }
  1202. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1203. {
  1204. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1205. if (sol_gpio->host_sol_gpio < 0)
  1206. return;
  1207. gpio_free(sol_gpio->host_sol_gpio);
  1208. }
  1209. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1210. {
  1211. int ret;
  1212. ret = cnss_init_dev_sol_gpio(plat_priv);
  1213. if (ret)
  1214. goto out;
  1215. ret = cnss_init_host_sol_gpio(plat_priv);
  1216. if (ret)
  1217. goto deinit_dev_sol;
  1218. return 0;
  1219. deinit_dev_sol:
  1220. cnss_deinit_dev_sol_gpio(plat_priv);
  1221. out:
  1222. return ret;
  1223. }
  1224. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1225. {
  1226. cnss_deinit_host_sol_gpio(plat_priv);
  1227. cnss_deinit_dev_sol_gpio(plat_priv);
  1228. }
  1229. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1230. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1231. {
  1232. struct cnss_plat_data *plat_priv;
  1233. int ret = 0;
  1234. if (!subsys_desc->dev) {
  1235. cnss_pr_err("dev from subsys_desc is NULL\n");
  1236. return -ENODEV;
  1237. }
  1238. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1239. if (!plat_priv) {
  1240. cnss_pr_err("plat_priv is NULL\n");
  1241. return -ENODEV;
  1242. }
  1243. if (!plat_priv->driver_state) {
  1244. cnss_pr_dbg("Powerup is ignored\n");
  1245. return 0;
  1246. }
  1247. ret = cnss_bus_dev_powerup(plat_priv);
  1248. if (ret)
  1249. __pm_relax(plat_priv->recovery_ws);
  1250. return ret;
  1251. }
  1252. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1253. bool force_stop)
  1254. {
  1255. struct cnss_plat_data *plat_priv;
  1256. if (!subsys_desc->dev) {
  1257. cnss_pr_err("dev from subsys_desc is NULL\n");
  1258. return -ENODEV;
  1259. }
  1260. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1261. if (!plat_priv) {
  1262. cnss_pr_err("plat_priv is NULL\n");
  1263. return -ENODEV;
  1264. }
  1265. if (!plat_priv->driver_state) {
  1266. cnss_pr_dbg("shutdown is ignored\n");
  1267. return 0;
  1268. }
  1269. return cnss_bus_dev_shutdown(plat_priv);
  1270. }
  1271. void cnss_device_crashed(struct device *dev)
  1272. {
  1273. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1274. struct cnss_subsys_info *subsys_info;
  1275. if (!plat_priv)
  1276. return;
  1277. subsys_info = &plat_priv->subsys_info;
  1278. if (subsys_info->subsys_device) {
  1279. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1280. subsys_set_crash_status(subsys_info->subsys_device, true);
  1281. subsystem_restart_dev(subsys_info->subsys_device);
  1282. }
  1283. }
  1284. EXPORT_SYMBOL(cnss_device_crashed);
  1285. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1286. {
  1287. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1288. if (!plat_priv) {
  1289. cnss_pr_err("plat_priv is NULL\n");
  1290. return;
  1291. }
  1292. cnss_bus_dev_crash_shutdown(plat_priv);
  1293. }
  1294. static int cnss_subsys_ramdump(int enable,
  1295. const struct subsys_desc *subsys_desc)
  1296. {
  1297. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1298. if (!plat_priv) {
  1299. cnss_pr_err("plat_priv is NULL\n");
  1300. return -ENODEV;
  1301. }
  1302. if (!enable)
  1303. return 0;
  1304. return cnss_bus_dev_ramdump(plat_priv);
  1305. }
  1306. static void cnss_recovery_work_handler(struct work_struct *work)
  1307. {
  1308. }
  1309. #else
  1310. static void cnss_recovery_work_handler(struct work_struct *work)
  1311. {
  1312. int ret;
  1313. struct cnss_plat_data *plat_priv =
  1314. container_of(work, struct cnss_plat_data, recovery_work);
  1315. if (!plat_priv->recovery_enabled)
  1316. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1317. cnss_bus_dev_shutdown(plat_priv);
  1318. cnss_bus_dev_ramdump(plat_priv);
  1319. msleep(POWER_RESET_MIN_DELAY_MS);
  1320. ret = cnss_bus_dev_powerup(plat_priv);
  1321. if (ret)
  1322. __pm_relax(plat_priv->recovery_ws);
  1323. return;
  1324. }
  1325. void cnss_device_crashed(struct device *dev)
  1326. {
  1327. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1328. if (!plat_priv)
  1329. return;
  1330. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1331. schedule_work(&plat_priv->recovery_work);
  1332. }
  1333. EXPORT_SYMBOL(cnss_device_crashed);
  1334. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1335. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1336. {
  1337. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1338. struct cnss_ramdump_info *ramdump_info;
  1339. if (!plat_priv)
  1340. return NULL;
  1341. ramdump_info = &plat_priv->ramdump_info;
  1342. *size = ramdump_info->ramdump_size;
  1343. return ramdump_info->ramdump_va;
  1344. }
  1345. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1346. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1347. {
  1348. switch (reason) {
  1349. case CNSS_REASON_DEFAULT:
  1350. return "DEFAULT";
  1351. case CNSS_REASON_LINK_DOWN:
  1352. return "LINK_DOWN";
  1353. case CNSS_REASON_RDDM:
  1354. return "RDDM";
  1355. case CNSS_REASON_TIMEOUT:
  1356. return "TIMEOUT";
  1357. }
  1358. return "UNKNOWN";
  1359. };
  1360. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1361. enum cnss_recovery_reason reason)
  1362. {
  1363. plat_priv->recovery_count++;
  1364. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1365. goto self_recovery;
  1366. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1367. cnss_pr_dbg("Skip device recovery\n");
  1368. return 0;
  1369. }
  1370. /* FW recovery sequence has multiple steps and firmware load requires
  1371. * linux PM in awake state. Thus hold the cnss wake source until
  1372. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1373. * time taken in this process.
  1374. */
  1375. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1376. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1377. true);
  1378. switch (reason) {
  1379. case CNSS_REASON_LINK_DOWN:
  1380. if (!cnss_bus_check_link_status(plat_priv)) {
  1381. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1382. return 0;
  1383. }
  1384. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1385. &plat_priv->ctrl_params.quirks))
  1386. goto self_recovery;
  1387. if (!cnss_bus_recover_link_down(plat_priv)) {
  1388. /* clear recovery bit here to avoid skipping
  1389. * the recovery work for RDDM later
  1390. */
  1391. clear_bit(CNSS_DRIVER_RECOVERY,
  1392. &plat_priv->driver_state);
  1393. return 0;
  1394. }
  1395. break;
  1396. case CNSS_REASON_RDDM:
  1397. cnss_bus_collect_dump_info(plat_priv, false);
  1398. break;
  1399. case CNSS_REASON_DEFAULT:
  1400. case CNSS_REASON_TIMEOUT:
  1401. break;
  1402. default:
  1403. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1404. cnss_recovery_reason_to_str(reason), reason);
  1405. break;
  1406. }
  1407. cnss_bus_device_crashed(plat_priv);
  1408. return 0;
  1409. self_recovery:
  1410. cnss_pr_dbg("Going for self recovery\n");
  1411. cnss_bus_dev_shutdown(plat_priv);
  1412. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1413. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1414. &plat_priv->ctrl_params.quirks);
  1415. cnss_bus_dev_powerup(plat_priv);
  1416. return 0;
  1417. }
  1418. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1419. void *data)
  1420. {
  1421. struct cnss_recovery_data *recovery_data = data;
  1422. int ret = 0;
  1423. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1424. cnss_recovery_reason_to_str(recovery_data->reason),
  1425. recovery_data->reason);
  1426. if (!plat_priv->driver_state) {
  1427. cnss_pr_err("Improper driver state, ignore recovery\n");
  1428. ret = -EINVAL;
  1429. goto out;
  1430. }
  1431. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1432. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1433. ret = -EINVAL;
  1434. goto out;
  1435. }
  1436. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1437. cnss_pr_err("Recovery is already in progress\n");
  1438. CNSS_ASSERT(0);
  1439. ret = -EINVAL;
  1440. goto out;
  1441. }
  1442. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1443. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1444. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1445. ret = -EINVAL;
  1446. goto out;
  1447. }
  1448. switch (plat_priv->device_id) {
  1449. case QCA6174_DEVICE_ID:
  1450. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1451. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1452. &plat_priv->driver_state)) {
  1453. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1454. ret = -EINVAL;
  1455. goto out;
  1456. }
  1457. break;
  1458. default:
  1459. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1460. set_bit(CNSS_FW_BOOT_RECOVERY,
  1461. &plat_priv->driver_state);
  1462. }
  1463. break;
  1464. }
  1465. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1466. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1467. out:
  1468. kfree(data);
  1469. return ret;
  1470. }
  1471. int cnss_self_recovery(struct device *dev,
  1472. enum cnss_recovery_reason reason)
  1473. {
  1474. cnss_schedule_recovery(dev, reason);
  1475. return 0;
  1476. }
  1477. EXPORT_SYMBOL(cnss_self_recovery);
  1478. void cnss_schedule_recovery(struct device *dev,
  1479. enum cnss_recovery_reason reason)
  1480. {
  1481. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1482. struct cnss_recovery_data *data;
  1483. int gfp = GFP_KERNEL;
  1484. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1485. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1486. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1487. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1488. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1489. return;
  1490. }
  1491. if (in_interrupt() || irqs_disabled())
  1492. gfp = GFP_ATOMIC;
  1493. data = kzalloc(sizeof(*data), gfp);
  1494. if (!data)
  1495. return;
  1496. data->reason = reason;
  1497. cnss_driver_event_post(plat_priv,
  1498. CNSS_DRIVER_EVENT_RECOVERY,
  1499. 0, data);
  1500. }
  1501. EXPORT_SYMBOL(cnss_schedule_recovery);
  1502. int cnss_force_fw_assert(struct device *dev)
  1503. {
  1504. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1505. if (!plat_priv) {
  1506. cnss_pr_err("plat_priv is NULL\n");
  1507. return -ENODEV;
  1508. }
  1509. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1510. cnss_pr_info("Forced FW assert is not supported\n");
  1511. return -EOPNOTSUPP;
  1512. }
  1513. if (cnss_bus_is_device_down(plat_priv)) {
  1514. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1515. return 0;
  1516. }
  1517. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1518. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1519. return 0;
  1520. }
  1521. if (in_interrupt() || irqs_disabled())
  1522. cnss_driver_event_post(plat_priv,
  1523. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1524. 0, NULL);
  1525. else
  1526. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1527. return 0;
  1528. }
  1529. EXPORT_SYMBOL(cnss_force_fw_assert);
  1530. int cnss_force_collect_rddm(struct device *dev)
  1531. {
  1532. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1533. unsigned int timeout;
  1534. int ret = 0;
  1535. if (!plat_priv) {
  1536. cnss_pr_err("plat_priv is NULL\n");
  1537. return -ENODEV;
  1538. }
  1539. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1540. cnss_pr_info("Force collect rddm is not supported\n");
  1541. return -EOPNOTSUPP;
  1542. }
  1543. if (cnss_bus_is_device_down(plat_priv)) {
  1544. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1545. goto wait_rddm;
  1546. }
  1547. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1548. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1549. goto wait_rddm;
  1550. }
  1551. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1552. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1553. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1554. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1555. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1556. return 0;
  1557. }
  1558. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1559. if (ret)
  1560. return ret;
  1561. wait_rddm:
  1562. reinit_completion(&plat_priv->rddm_complete);
  1563. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1564. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1565. msecs_to_jiffies(timeout));
  1566. if (!ret) {
  1567. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1568. timeout);
  1569. ret = -ETIMEDOUT;
  1570. } else if (ret > 0) {
  1571. ret = 0;
  1572. }
  1573. return ret;
  1574. }
  1575. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1576. int cnss_qmi_send_get(struct device *dev)
  1577. {
  1578. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1579. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1580. return 0;
  1581. return cnss_bus_qmi_send_get(plat_priv);
  1582. }
  1583. EXPORT_SYMBOL(cnss_qmi_send_get);
  1584. int cnss_qmi_send_put(struct device *dev)
  1585. {
  1586. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1587. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1588. return 0;
  1589. return cnss_bus_qmi_send_put(plat_priv);
  1590. }
  1591. EXPORT_SYMBOL(cnss_qmi_send_put);
  1592. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1593. int cmd_len, void *cb_ctx,
  1594. int (*cb)(void *ctx, void *event, int event_len))
  1595. {
  1596. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1597. int ret;
  1598. if (!plat_priv)
  1599. return -ENODEV;
  1600. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1601. return -EINVAL;
  1602. plat_priv->get_info_cb = cb;
  1603. plat_priv->get_info_cb_ctx = cb_ctx;
  1604. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1605. if (ret) {
  1606. plat_priv->get_info_cb = NULL;
  1607. plat_priv->get_info_cb_ctx = NULL;
  1608. }
  1609. return ret;
  1610. }
  1611. EXPORT_SYMBOL(cnss_qmi_send);
  1612. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1613. {
  1614. int ret = 0;
  1615. u32 retry = 0, timeout;
  1616. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1617. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1618. goto out;
  1619. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1620. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1621. goto out;
  1622. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  1623. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  1624. goto out;
  1625. }
  1626. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1627. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1628. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1629. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1630. CNSS_ASSERT(0);
  1631. return -EINVAL;
  1632. }
  1633. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1634. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1635. break;
  1636. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1637. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1638. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1639. CNSS_ASSERT(0);
  1640. ret = -EINVAL;
  1641. goto mark_cal_fail;
  1642. }
  1643. }
  1644. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1645. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  1646. timeout = cnss_get_timeout(plat_priv,
  1647. CNSS_TIMEOUT_CALIBRATION);
  1648. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  1649. timeout / 1000);
  1650. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1651. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1652. msecs_to_jiffies(timeout));
  1653. }
  1654. reinit_completion(&plat_priv->cal_complete);
  1655. ret = cnss_bus_dev_powerup(plat_priv);
  1656. mark_cal_fail:
  1657. if (ret) {
  1658. complete(&plat_priv->cal_complete);
  1659. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1660. /* Set CBC done in driver state to mark attempt and note error
  1661. * since calibration cannot be retried at boot.
  1662. */
  1663. plat_priv->cal_done = CNSS_CAL_FAILURE;
  1664. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1665. }
  1666. out:
  1667. return ret;
  1668. }
  1669. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  1670. void *data)
  1671. {
  1672. struct cnss_cal_info *cal_info = data;
  1673. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  1674. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  1675. goto out;
  1676. switch (cal_info->cal_status) {
  1677. case CNSS_CAL_DONE:
  1678. cnss_pr_dbg("Calibration completed successfully\n");
  1679. plat_priv->cal_done = true;
  1680. break;
  1681. case CNSS_CAL_TIMEOUT:
  1682. case CNSS_CAL_FAILURE:
  1683. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  1684. cal_info->cal_status);
  1685. break;
  1686. default:
  1687. cnss_pr_err("Unknown calibration status: %u\n",
  1688. cal_info->cal_status);
  1689. break;
  1690. }
  1691. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  1692. cnss_bus_free_qdss_mem(plat_priv);
  1693. cnss_release_antenna_sharing(plat_priv);
  1694. cnss_bus_dev_shutdown(plat_priv);
  1695. msleep(POWER_RESET_MIN_DELAY_MS);
  1696. complete(&plat_priv->cal_complete);
  1697. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1698. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1699. if (cal_info->cal_status == CNSS_CAL_DONE) {
  1700. cnss_cal_mem_upload_to_file(plat_priv);
  1701. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1702. goto out;
  1703. cnss_pr_dbg("Schedule WLAN driver load\n");
  1704. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1705. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1706. 0);
  1707. }
  1708. out:
  1709. kfree(data);
  1710. return 0;
  1711. }
  1712. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  1713. {
  1714. int ret;
  1715. ret = cnss_bus_dev_powerup(plat_priv);
  1716. if (ret)
  1717. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1718. return ret;
  1719. }
  1720. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  1721. {
  1722. cnss_bus_dev_shutdown(plat_priv);
  1723. return 0;
  1724. }
  1725. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  1726. {
  1727. int ret = 0;
  1728. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  1729. if (ret < 0)
  1730. return ret;
  1731. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  1732. }
  1733. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  1734. u32 mem_seg_len, u64 pa, u32 size)
  1735. {
  1736. int i = 0;
  1737. u64 offset = 0;
  1738. void *va = NULL;
  1739. u64 local_pa;
  1740. u32 local_size;
  1741. for (i = 0; i < mem_seg_len; i++) {
  1742. local_pa = (u64)fw_mem[i].pa;
  1743. local_size = (u32)fw_mem[i].size;
  1744. if (pa == local_pa && size <= local_size) {
  1745. va = fw_mem[i].va;
  1746. break;
  1747. }
  1748. if (pa > local_pa &&
  1749. pa < local_pa + local_size &&
  1750. pa + size <= local_pa + local_size) {
  1751. offset = pa - local_pa;
  1752. va = fw_mem[i].va + offset;
  1753. break;
  1754. }
  1755. }
  1756. return va;
  1757. }
  1758. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  1759. void *data)
  1760. {
  1761. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1762. struct cnss_fw_mem *fw_mem_seg;
  1763. int ret = 0L;
  1764. void *va = NULL;
  1765. u32 i, fw_mem_seg_len;
  1766. switch (event_data->mem_type) {
  1767. case QMI_WLFW_MEM_TYPE_DDR_V01:
  1768. if (!plat_priv->fw_mem_seg_len)
  1769. goto invalid_mem_save;
  1770. fw_mem_seg = plat_priv->fw_mem;
  1771. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  1772. break;
  1773. case QMI_WLFW_MEM_QDSS_V01:
  1774. if (!plat_priv->qdss_mem_seg_len)
  1775. goto invalid_mem_save;
  1776. fw_mem_seg = plat_priv->qdss_mem;
  1777. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  1778. break;
  1779. default:
  1780. goto invalid_mem_save;
  1781. }
  1782. for (i = 0; i < event_data->mem_seg_len; i++) {
  1783. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  1784. event_data->mem_seg[i].addr,
  1785. event_data->mem_seg[i].size);
  1786. if (!va) {
  1787. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  1788. &event_data->mem_seg[i].addr,
  1789. event_data->mem_type);
  1790. ret = -EINVAL;
  1791. break;
  1792. }
  1793. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  1794. event_data->file_name,
  1795. event_data->mem_seg[i].size);
  1796. if (ret < 0) {
  1797. cnss_pr_err("Fail to save fw mem data: %d\n",
  1798. ret);
  1799. break;
  1800. }
  1801. }
  1802. kfree(data);
  1803. return ret;
  1804. invalid_mem_save:
  1805. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  1806. event_data->mem_type);
  1807. kfree(data);
  1808. return -EINVAL;
  1809. }
  1810. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  1811. {
  1812. cnss_bus_free_qdss_mem(plat_priv);
  1813. return 0;
  1814. }
  1815. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  1816. void *data)
  1817. {
  1818. int ret = 0;
  1819. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1820. if (!plat_priv)
  1821. return -ENODEV;
  1822. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  1823. event_data->total_size);
  1824. kfree(data);
  1825. return ret;
  1826. }
  1827. static void cnss_driver_event_work(struct work_struct *work)
  1828. {
  1829. struct cnss_plat_data *plat_priv =
  1830. container_of(work, struct cnss_plat_data, event_work);
  1831. struct cnss_driver_event *event;
  1832. unsigned long flags;
  1833. int ret = 0;
  1834. if (!plat_priv) {
  1835. cnss_pr_err("plat_priv is NULL!\n");
  1836. return;
  1837. }
  1838. cnss_pm_stay_awake(plat_priv);
  1839. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1840. while (!list_empty(&plat_priv->event_list)) {
  1841. event = list_first_entry(&plat_priv->event_list,
  1842. struct cnss_driver_event, list);
  1843. list_del(&event->list);
  1844. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1845. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  1846. cnss_driver_event_to_str(event->type),
  1847. event->sync ? "-sync" : "", event->type,
  1848. plat_priv->driver_state);
  1849. switch (event->type) {
  1850. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1851. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  1852. break;
  1853. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  1854. ret = cnss_wlfw_server_exit(plat_priv);
  1855. break;
  1856. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  1857. ret = cnss_bus_alloc_fw_mem(plat_priv);
  1858. if (ret)
  1859. break;
  1860. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  1861. break;
  1862. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  1863. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  1864. break;
  1865. case CNSS_DRIVER_EVENT_FW_READY:
  1866. ret = cnss_fw_ready_hdlr(plat_priv);
  1867. break;
  1868. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  1869. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  1870. break;
  1871. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  1872. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  1873. event->data);
  1874. break;
  1875. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1876. ret = cnss_bus_register_driver_hdlr(plat_priv,
  1877. event->data);
  1878. break;
  1879. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1880. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  1881. break;
  1882. case CNSS_DRIVER_EVENT_RECOVERY:
  1883. ret = cnss_driver_recovery_hdlr(plat_priv,
  1884. event->data);
  1885. break;
  1886. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  1887. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1888. break;
  1889. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  1890. set_bit(CNSS_DRIVER_IDLE_RESTART,
  1891. &plat_priv->driver_state);
  1892. fallthrough;
  1893. case CNSS_DRIVER_EVENT_POWER_UP:
  1894. ret = cnss_power_up_hdlr(plat_priv);
  1895. break;
  1896. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1897. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  1898. &plat_priv->driver_state);
  1899. fallthrough;
  1900. case CNSS_DRIVER_EVENT_POWER_DOWN:
  1901. ret = cnss_power_down_hdlr(plat_priv);
  1902. break;
  1903. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  1904. ret = cnss_process_wfc_call_ind_event(plat_priv,
  1905. event->data);
  1906. break;
  1907. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  1908. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  1909. event->data);
  1910. break;
  1911. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1912. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  1913. break;
  1914. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  1915. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  1916. event->data);
  1917. break;
  1918. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1919. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  1920. break;
  1921. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1922. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  1923. event->data);
  1924. break;
  1925. default:
  1926. cnss_pr_err("Invalid driver event type: %d",
  1927. event->type);
  1928. kfree(event);
  1929. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1930. continue;
  1931. }
  1932. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1933. if (event->sync) {
  1934. event->ret = ret;
  1935. complete(&event->complete);
  1936. continue;
  1937. }
  1938. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1939. kfree(event);
  1940. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1941. }
  1942. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1943. cnss_pm_relax(plat_priv);
  1944. }
  1945. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1946. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  1947. {
  1948. int ret = 0;
  1949. struct cnss_subsys_info *subsys_info;
  1950. subsys_info = &plat_priv->subsys_info;
  1951. subsys_info->subsys_desc.name = "wlan";
  1952. subsys_info->subsys_desc.owner = THIS_MODULE;
  1953. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  1954. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  1955. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  1956. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  1957. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  1958. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  1959. if (IS_ERR(subsys_info->subsys_device)) {
  1960. ret = PTR_ERR(subsys_info->subsys_device);
  1961. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  1962. goto out;
  1963. }
  1964. subsys_info->subsys_handle =
  1965. subsystem_get(subsys_info->subsys_desc.name);
  1966. if (!subsys_info->subsys_handle) {
  1967. cnss_pr_err("Failed to get subsys_handle!\n");
  1968. ret = -EINVAL;
  1969. goto unregister_subsys;
  1970. } else if (IS_ERR(subsys_info->subsys_handle)) {
  1971. ret = PTR_ERR(subsys_info->subsys_handle);
  1972. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  1973. goto unregister_subsys;
  1974. }
  1975. return 0;
  1976. unregister_subsys:
  1977. subsys_unregister(subsys_info->subsys_device);
  1978. out:
  1979. return ret;
  1980. }
  1981. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  1982. {
  1983. struct cnss_subsys_info *subsys_info;
  1984. subsys_info = &plat_priv->subsys_info;
  1985. subsystem_put(subsys_info->subsys_handle);
  1986. subsys_unregister(subsys_info->subsys_device);
  1987. }
  1988. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  1989. {
  1990. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  1991. return create_ramdump_device(subsys_info->subsys_desc.name,
  1992. subsys_info->subsys_desc.dev);
  1993. }
  1994. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  1995. void *ramdump_dev)
  1996. {
  1997. destroy_ramdump_device(ramdump_dev);
  1998. }
  1999. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2000. {
  2001. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2002. struct ramdump_segment segment;
  2003. memset(&segment, 0, sizeof(segment));
  2004. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  2005. segment.size = ramdump_info->ramdump_size;
  2006. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  2007. }
  2008. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2009. {
  2010. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2011. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2012. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2013. struct ramdump_segment *ramdump_segs, *s;
  2014. struct cnss_dump_meta_info meta_info = {0};
  2015. int i, ret = 0;
  2016. ramdump_segs = kcalloc(dump_data->nentries + 1,
  2017. sizeof(*ramdump_segs),
  2018. GFP_KERNEL);
  2019. if (!ramdump_segs)
  2020. return -ENOMEM;
  2021. s = ramdump_segs + 1;
  2022. for (i = 0; i < dump_data->nentries; i++) {
  2023. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2024. cnss_pr_err("Unsupported dump type: %d",
  2025. dump_seg->type);
  2026. continue;
  2027. }
  2028. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2029. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2030. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2031. }
  2032. meta_info.entry[dump_seg->type].entry_num++;
  2033. s->address = dump_seg->address;
  2034. s->v_address = (void __iomem *)dump_seg->v_address;
  2035. s->size = dump_seg->size;
  2036. s++;
  2037. dump_seg++;
  2038. }
  2039. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2040. meta_info.version = CNSS_RAMDUMP_VERSION;
  2041. meta_info.chipset = plat_priv->device_id;
  2042. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2043. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2044. ramdump_segs->size = sizeof(meta_info);
  2045. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2046. dump_data->nentries + 1);
  2047. kfree(ramdump_segs);
  2048. return ret;
  2049. }
  2050. #else
  2051. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2052. void *data)
  2053. {
  2054. struct cnss_plat_data *plat_priv =
  2055. container_of(nb, struct cnss_plat_data, panic_nb);
  2056. cnss_bus_dev_crash_shutdown(plat_priv);
  2057. return NOTIFY_DONE;
  2058. }
  2059. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2060. {
  2061. int ret;
  2062. if (!plat_priv)
  2063. return -ENODEV;
  2064. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2065. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2066. &plat_priv->panic_nb);
  2067. if (ret) {
  2068. cnss_pr_err("Failed to register panic handler\n");
  2069. return -EINVAL;
  2070. }
  2071. return 0;
  2072. }
  2073. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2074. {
  2075. int ret;
  2076. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2077. &plat_priv->panic_nb);
  2078. if (ret)
  2079. cnss_pr_err("Failed to unregister panic handler\n");
  2080. }
  2081. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2082. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2083. {
  2084. return &plat_priv->plat_dev->dev;
  2085. }
  2086. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2087. void *ramdump_dev)
  2088. {
  2089. }
  2090. #endif
  2091. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2092. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2093. {
  2094. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2095. struct qcom_dump_segment segment;
  2096. struct list_head head;
  2097. INIT_LIST_HEAD(&head);
  2098. memset(&segment, 0, sizeof(segment));
  2099. segment.va = ramdump_info->ramdump_va;
  2100. segment.size = ramdump_info->ramdump_size;
  2101. list_add(&segment.node, &head);
  2102. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2103. }
  2104. #else
  2105. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2106. {
  2107. return 0;
  2108. }
  2109. /* Using completion event inside dynamically allocated ramdump_desc
  2110. * may result a race between freeing the event after setting it to
  2111. * complete inside dev coredump free callback and the thread that is
  2112. * waiting for completion.
  2113. */
  2114. DECLARE_COMPLETION(dump_done);
  2115. #define TIMEOUT_SAVE_DUMP_MS 30000
  2116. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2117. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2118. { \
  2119. if (class == ELFCLASS32) \
  2120. return sizeof(struct elf32_##__xhdr); \
  2121. else \
  2122. return sizeof(struct elf64_##__xhdr); \
  2123. }
  2124. SIZEOF_ELF_STRUCT(phdr)
  2125. SIZEOF_ELF_STRUCT(hdr)
  2126. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2127. do { \
  2128. if (class == ELFCLASS32) \
  2129. ((struct elf32_##__xhdr *)arg)->member = value; \
  2130. else \
  2131. ((struct elf64_##__xhdr *)arg)->member = value; \
  2132. } while (0)
  2133. #define set_ehdr_property(arg, class, member, value) \
  2134. set_xhdr_property(hdr, arg, class, member, value)
  2135. #define set_phdr_property(arg, class, member, value) \
  2136. set_xhdr_property(phdr, arg, class, member, value)
  2137. /* These replace qcom_ramdump driver APIs called from common API
  2138. * cnss_do_elf_dump() by the ones defined here.
  2139. */
  2140. #define qcom_dump_segment cnss_qcom_dump_segment
  2141. #define qcom_elf_dump cnss_qcom_elf_dump
  2142. #define dump_enabled cnss_dump_enabled
  2143. struct cnss_qcom_dump_segment {
  2144. struct list_head node;
  2145. dma_addr_t da;
  2146. void *va;
  2147. size_t size;
  2148. };
  2149. struct cnss_qcom_ramdump_desc {
  2150. void *data;
  2151. struct completion dump_done;
  2152. };
  2153. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2154. void *data, size_t datalen)
  2155. {
  2156. struct cnss_qcom_ramdump_desc *desc = data;
  2157. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2158. datalen);
  2159. }
  2160. static void cnss_qcom_devcd_freev(void *data)
  2161. {
  2162. struct cnss_qcom_ramdump_desc *desc = data;
  2163. cnss_pr_dbg("Free dump data for dev coredump\n");
  2164. complete(&dump_done);
  2165. vfree(desc->data);
  2166. kfree(desc);
  2167. }
  2168. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2169. gfp_t gfp)
  2170. {
  2171. struct cnss_qcom_ramdump_desc *desc;
  2172. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2173. int ret;
  2174. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2175. if (!desc)
  2176. return -ENOMEM;
  2177. desc->data = data;
  2178. reinit_completion(&dump_done);
  2179. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2180. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2181. ret = wait_for_completion_timeout(&dump_done,
  2182. msecs_to_jiffies(timeout));
  2183. if (!ret)
  2184. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2185. timeout);
  2186. return ret ? 0 : -ETIMEDOUT;
  2187. }
  2188. /* Since the elf32 and elf64 identification is identical apart from
  2189. * the class, use elf32 by default.
  2190. */
  2191. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2192. {
  2193. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2194. ehdr->e_ident[EI_CLASS] = class;
  2195. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2196. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2197. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2198. }
  2199. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2200. unsigned char class)
  2201. {
  2202. struct cnss_qcom_dump_segment *segment;
  2203. void *phdr, *ehdr;
  2204. size_t data_size, offset;
  2205. int phnum = 0;
  2206. void *data;
  2207. void __iomem *ptr;
  2208. if (!segs || list_empty(segs))
  2209. return -EINVAL;
  2210. data_size = sizeof_elf_hdr(class);
  2211. list_for_each_entry(segment, segs, node) {
  2212. data_size += sizeof_elf_phdr(class) + segment->size;
  2213. phnum++;
  2214. }
  2215. data = vmalloc(data_size);
  2216. if (!data)
  2217. return -ENOMEM;
  2218. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2219. ehdr = data;
  2220. memset(ehdr, 0, sizeof_elf_hdr(class));
  2221. init_elf_identification(ehdr, class);
  2222. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2223. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2224. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2225. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2226. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2227. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2228. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2229. phdr = data + sizeof_elf_hdr(class);
  2230. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2231. list_for_each_entry(segment, segs, node) {
  2232. memset(phdr, 0, sizeof_elf_phdr(class));
  2233. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2234. set_phdr_property(phdr, class, p_offset, offset);
  2235. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2236. set_phdr_property(phdr, class, p_paddr, segment->da);
  2237. set_phdr_property(phdr, class, p_filesz, segment->size);
  2238. set_phdr_property(phdr, class, p_memsz, segment->size);
  2239. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2240. set_phdr_property(phdr, class, p_align, 0);
  2241. if (segment->va) {
  2242. memcpy(data + offset, segment->va, segment->size);
  2243. } else {
  2244. ptr = devm_ioremap(dev, segment->da, segment->size);
  2245. if (!ptr) {
  2246. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2247. &segment->da, segment->size);
  2248. memset(data + offset, 0xff, segment->size);
  2249. } else {
  2250. memcpy_fromio(data + offset, ptr,
  2251. segment->size);
  2252. }
  2253. }
  2254. offset += segment->size;
  2255. phdr += sizeof_elf_phdr(class);
  2256. }
  2257. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2258. }
  2259. /* Saving dump to file system is always needed in this case. */
  2260. static bool cnss_dump_enabled(void)
  2261. {
  2262. return true;
  2263. }
  2264. #endif /* CONFIG_QCOM_RAMDUMP */
  2265. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2266. {
  2267. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2268. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2269. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2270. struct qcom_dump_segment *seg;
  2271. struct cnss_dump_meta_info meta_info = {0};
  2272. struct list_head head;
  2273. int i, ret = 0;
  2274. if (!dump_enabled()) {
  2275. cnss_pr_info("Dump collection is not enabled\n");
  2276. return ret;
  2277. }
  2278. INIT_LIST_HEAD(&head);
  2279. for (i = 0; i < dump_data->nentries; i++) {
  2280. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2281. cnss_pr_err("Unsupported dump type: %d",
  2282. dump_seg->type);
  2283. continue;
  2284. }
  2285. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2286. if (!seg)
  2287. continue;
  2288. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2289. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2290. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2291. }
  2292. meta_info.entry[dump_seg->type].entry_num++;
  2293. seg->da = dump_seg->address;
  2294. seg->va = dump_seg->v_address;
  2295. seg->size = dump_seg->size;
  2296. list_add_tail(&seg->node, &head);
  2297. dump_seg++;
  2298. }
  2299. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2300. if (!seg)
  2301. goto do_elf_dump;
  2302. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2303. meta_info.version = CNSS_RAMDUMP_VERSION;
  2304. meta_info.chipset = plat_priv->device_id;
  2305. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2306. seg->va = &meta_info;
  2307. seg->size = sizeof(meta_info);
  2308. list_add(&seg->node, &head);
  2309. do_elf_dump:
  2310. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2311. while (!list_empty(&head)) {
  2312. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2313. list_del(&seg->node);
  2314. kfree(seg);
  2315. }
  2316. return ret;
  2317. }
  2318. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2319. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2320. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2321. {
  2322. struct cnss_ramdump_info *ramdump_info;
  2323. struct msm_dump_entry dump_entry;
  2324. ramdump_info = &plat_priv->ramdump_info;
  2325. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2326. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2327. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2328. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2329. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2330. sizeof(ramdump_info->dump_data.name));
  2331. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2332. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2333. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2334. &dump_entry);
  2335. }
  2336. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2337. {
  2338. int ret = 0;
  2339. struct device *dev;
  2340. struct cnss_ramdump_info *ramdump_info;
  2341. u32 ramdump_size = 0;
  2342. dev = &plat_priv->plat_dev->dev;
  2343. ramdump_info = &plat_priv->ramdump_info;
  2344. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2345. &ramdump_size) == 0) {
  2346. ramdump_info->ramdump_va =
  2347. dma_alloc_coherent(dev, ramdump_size,
  2348. &ramdump_info->ramdump_pa,
  2349. GFP_KERNEL);
  2350. if (ramdump_info->ramdump_va)
  2351. ramdump_info->ramdump_size = ramdump_size;
  2352. }
  2353. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2354. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2355. if (ramdump_info->ramdump_size == 0) {
  2356. cnss_pr_info("Ramdump will not be collected");
  2357. goto out;
  2358. }
  2359. ret = cnss_init_dump_entry(plat_priv);
  2360. if (ret) {
  2361. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2362. goto free_ramdump;
  2363. }
  2364. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2365. if (!ramdump_info->ramdump_dev) {
  2366. cnss_pr_err("Failed to create ramdump device!");
  2367. ret = -ENOMEM;
  2368. goto free_ramdump;
  2369. }
  2370. return 0;
  2371. free_ramdump:
  2372. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2373. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2374. out:
  2375. return ret;
  2376. }
  2377. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2378. {
  2379. struct device *dev;
  2380. struct cnss_ramdump_info *ramdump_info;
  2381. dev = &plat_priv->plat_dev->dev;
  2382. ramdump_info = &plat_priv->ramdump_info;
  2383. if (ramdump_info->ramdump_dev)
  2384. cnss_destroy_ramdump_device(plat_priv,
  2385. ramdump_info->ramdump_dev);
  2386. if (ramdump_info->ramdump_va)
  2387. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2388. ramdump_info->ramdump_va,
  2389. ramdump_info->ramdump_pa);
  2390. }
  2391. /**
  2392. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2393. * @ret: Error returned by msm_dump_data_register_nominidump
  2394. *
  2395. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2396. * ignore failure.
  2397. *
  2398. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2399. */
  2400. static int cnss_ignore_dump_data_reg_fail(int ret)
  2401. {
  2402. return ret;
  2403. }
  2404. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2405. {
  2406. int ret = 0;
  2407. struct cnss_ramdump_info_v2 *info_v2;
  2408. struct cnss_dump_data *dump_data;
  2409. struct msm_dump_entry dump_entry;
  2410. struct device *dev = &plat_priv->plat_dev->dev;
  2411. u32 ramdump_size = 0;
  2412. info_v2 = &plat_priv->ramdump_info_v2;
  2413. dump_data = &info_v2->dump_data;
  2414. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2415. &ramdump_size) == 0)
  2416. info_v2->ramdump_size = ramdump_size;
  2417. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2418. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2419. if (!info_v2->dump_data_vaddr)
  2420. return -ENOMEM;
  2421. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2422. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2423. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2424. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2425. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2426. sizeof(dump_data->name));
  2427. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2428. dump_entry.addr = virt_to_phys(dump_data);
  2429. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2430. &dump_entry);
  2431. if (ret) {
  2432. ret = cnss_ignore_dump_data_reg_fail(ret);
  2433. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  2434. ret ? "Error" : "Ignoring", ret);
  2435. goto free_ramdump;
  2436. }
  2437. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2438. if (!info_v2->ramdump_dev) {
  2439. cnss_pr_err("Failed to create ramdump device!\n");
  2440. ret = -ENOMEM;
  2441. goto free_ramdump;
  2442. }
  2443. return 0;
  2444. free_ramdump:
  2445. kfree(info_v2->dump_data_vaddr);
  2446. info_v2->dump_data_vaddr = NULL;
  2447. return ret;
  2448. }
  2449. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  2450. {
  2451. struct cnss_ramdump_info_v2 *info_v2;
  2452. info_v2 = &plat_priv->ramdump_info_v2;
  2453. if (info_v2->ramdump_dev)
  2454. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  2455. kfree(info_v2->dump_data_vaddr);
  2456. info_v2->dump_data_vaddr = NULL;
  2457. info_v2->dump_data_valid = false;
  2458. }
  2459. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2460. {
  2461. int ret = 0;
  2462. switch (plat_priv->device_id) {
  2463. case QCA6174_DEVICE_ID:
  2464. ret = cnss_register_ramdump_v1(plat_priv);
  2465. break;
  2466. case QCA6290_DEVICE_ID:
  2467. case QCA6390_DEVICE_ID:
  2468. case QCA6490_DEVICE_ID:
  2469. case KIWI_DEVICE_ID:
  2470. case MANGO_DEVICE_ID:
  2471. ret = cnss_register_ramdump_v2(plat_priv);
  2472. break;
  2473. default:
  2474. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2475. ret = -ENODEV;
  2476. break;
  2477. }
  2478. return ret;
  2479. }
  2480. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2481. {
  2482. switch (plat_priv->device_id) {
  2483. case QCA6174_DEVICE_ID:
  2484. cnss_unregister_ramdump_v1(plat_priv);
  2485. break;
  2486. case QCA6290_DEVICE_ID:
  2487. case QCA6390_DEVICE_ID:
  2488. case QCA6490_DEVICE_ID:
  2489. case KIWI_DEVICE_ID:
  2490. case MANGO_DEVICE_ID:
  2491. cnss_unregister_ramdump_v2(plat_priv);
  2492. break;
  2493. default:
  2494. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2495. break;
  2496. }
  2497. }
  2498. #else
  2499. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2500. {
  2501. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2502. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  2503. struct device *dev = &plat_priv->plat_dev->dev;
  2504. u32 ramdump_size = 0;
  2505. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2506. &ramdump_size) == 0)
  2507. info_v2->ramdump_size = ramdump_size;
  2508. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2509. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2510. if (!info_v2->dump_data_vaddr)
  2511. return -ENOMEM;
  2512. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2513. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2514. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2515. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2516. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2517. sizeof(dump_data->name));
  2518. info_v2->ramdump_dev = dev;
  2519. return 0;
  2520. }
  2521. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2522. {
  2523. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2524. info_v2->ramdump_dev = NULL;
  2525. kfree(info_v2->dump_data_vaddr);
  2526. info_v2->dump_data_vaddr = NULL;
  2527. info_v2->dump_data_valid = false;
  2528. }
  2529. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  2530. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  2531. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2532. phys_addr_t *pa, unsigned long attrs)
  2533. {
  2534. struct sg_table sgt;
  2535. int ret;
  2536. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  2537. if (ret) {
  2538. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  2539. va, &dma, size, attrs);
  2540. return -EINVAL;
  2541. }
  2542. *pa = page_to_phys(sg_page(sgt.sgl));
  2543. sg_free_table(&sgt);
  2544. return 0;
  2545. }
  2546. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2547. enum cnss_fw_dump_type type, int seg_no,
  2548. void *va, phys_addr_t pa, size_t size)
  2549. {
  2550. struct md_region md_entry;
  2551. int ret;
  2552. switch (type) {
  2553. case CNSS_FW_IMAGE:
  2554. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2555. seg_no);
  2556. break;
  2557. case CNSS_FW_RDDM:
  2558. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2559. seg_no);
  2560. break;
  2561. case CNSS_FW_REMOTE_HEAP:
  2562. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2563. seg_no);
  2564. break;
  2565. default:
  2566. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2567. return -EINVAL;
  2568. }
  2569. md_entry.phys_addr = pa;
  2570. md_entry.virt_addr = (uintptr_t)va;
  2571. md_entry.size = size;
  2572. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2573. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2574. md_entry.name, va, &pa, size);
  2575. ret = msm_minidump_add_region(&md_entry);
  2576. if (ret < 0)
  2577. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  2578. return ret;
  2579. }
  2580. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2581. enum cnss_fw_dump_type type, int seg_no,
  2582. void *va, phys_addr_t pa, size_t size)
  2583. {
  2584. struct md_region md_entry;
  2585. int ret;
  2586. switch (type) {
  2587. case CNSS_FW_IMAGE:
  2588. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2589. seg_no);
  2590. break;
  2591. case CNSS_FW_RDDM:
  2592. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2593. seg_no);
  2594. break;
  2595. case CNSS_FW_REMOTE_HEAP:
  2596. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2597. seg_no);
  2598. break;
  2599. default:
  2600. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2601. return -EINVAL;
  2602. }
  2603. md_entry.phys_addr = pa;
  2604. md_entry.virt_addr = (uintptr_t)va;
  2605. md_entry.size = size;
  2606. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2607. cnss_pr_dbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2608. md_entry.name, va, &pa, size);
  2609. ret = msm_minidump_remove_region(&md_entry);
  2610. if (ret)
  2611. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  2612. ret);
  2613. return ret;
  2614. }
  2615. #else
  2616. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2617. phys_addr_t *pa, unsigned long attrs)
  2618. {
  2619. return 0;
  2620. }
  2621. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2622. enum cnss_fw_dump_type type, int seg_no,
  2623. void *va, phys_addr_t pa, size_t size)
  2624. {
  2625. return 0;
  2626. }
  2627. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2628. enum cnss_fw_dump_type type, int seg_no,
  2629. void *va, phys_addr_t pa, size_t size)
  2630. {
  2631. return 0;
  2632. }
  2633. #endif /* CONFIG_QCOM_MINIDUMP */
  2634. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  2635. const struct firmware **fw_entry,
  2636. const char *filename)
  2637. {
  2638. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  2639. return request_firmware_direct(fw_entry, filename,
  2640. &plat_priv->plat_dev->dev);
  2641. else
  2642. return firmware_request_nowarn(fw_entry, filename,
  2643. &plat_priv->plat_dev->dev);
  2644. }
  2645. #if IS_ENABLED(CONFIG_INTERCONNECT)
  2646. /**
  2647. * cnss_register_bus_scale() - Setup interconnect voting data
  2648. * @plat_priv: Platform data structure
  2649. *
  2650. * For different interconnect path configured in device tree setup voting data
  2651. * for list of bandwidth requirements.
  2652. *
  2653. * Result: 0 for success. -EINVAL if not configured
  2654. */
  2655. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2656. {
  2657. int ret = -EINVAL;
  2658. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  2659. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2660. struct device *dev = &plat_priv->plat_dev->dev;
  2661. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  2662. ret = of_property_read_u32(dev->of_node,
  2663. "qcom,icc-path-count",
  2664. &plat_priv->icc.path_count);
  2665. if (ret) {
  2666. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  2667. return 0;
  2668. }
  2669. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  2670. "qcom,bus-bw-cfg-count",
  2671. &plat_priv->icc.bus_bw_cfg_count);
  2672. if (ret) {
  2673. cnss_pr_err("Failed to get Bus BW Config table size\n");
  2674. goto cleanup;
  2675. }
  2676. cfg_arr_size = plat_priv->icc.path_count *
  2677. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  2678. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  2679. if (!cfg_arr) {
  2680. cnss_pr_err("Failed to alloc cfg table mem\n");
  2681. ret = -ENOMEM;
  2682. goto cleanup;
  2683. }
  2684. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  2685. "qcom,bus-bw-cfg", cfg_arr,
  2686. cfg_arr_size);
  2687. if (ret) {
  2688. cnss_pr_err("Invalid Bus BW Config Table\n");
  2689. goto cleanup;
  2690. }
  2691. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  2692. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  2693. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  2694. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  2695. GFP_KERNEL);
  2696. if (!bus_bw_info) {
  2697. ret = -ENOMEM;
  2698. goto out;
  2699. }
  2700. ret = of_property_read_string_index(dev->of_node,
  2701. "interconnect-names", idx,
  2702. &bus_bw_info->icc_name);
  2703. if (ret)
  2704. goto out;
  2705. bus_bw_info->icc_path =
  2706. of_icc_get(&plat_priv->plat_dev->dev,
  2707. bus_bw_info->icc_name);
  2708. if (IS_ERR(bus_bw_info->icc_path)) {
  2709. ret = PTR_ERR(bus_bw_info->icc_path);
  2710. if (ret != -EPROBE_DEFER) {
  2711. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  2712. bus_bw_info->icc_name, ret);
  2713. goto out;
  2714. }
  2715. }
  2716. bus_bw_info->cfg_table =
  2717. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  2718. sizeof(*bus_bw_info->cfg_table),
  2719. GFP_KERNEL);
  2720. if (!bus_bw_info->cfg_table) {
  2721. ret = -ENOMEM;
  2722. goto out;
  2723. }
  2724. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  2725. bus_bw_info->icc_name);
  2726. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  2727. CNSS_ICC_VOTE_MAX);
  2728. i < plat_priv->icc.bus_bw_cfg_count;
  2729. i++, j += 2) {
  2730. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  2731. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  2732. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  2733. i, bus_bw_info->cfg_table[i].avg_bw,
  2734. bus_bw_info->cfg_table[i].peak_bw);
  2735. }
  2736. list_add_tail(&bus_bw_info->list,
  2737. &plat_priv->icc.list_head);
  2738. }
  2739. kfree(cfg_arr);
  2740. return 0;
  2741. out:
  2742. list_for_each_entry_safe(bus_bw_info, tmp,
  2743. &plat_priv->icc.list_head, list) {
  2744. list_del(&bus_bw_info->list);
  2745. }
  2746. cleanup:
  2747. kfree(cfg_arr);
  2748. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2749. return ret;
  2750. }
  2751. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  2752. {
  2753. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2754. list_for_each_entry_safe(bus_bw_info, tmp,
  2755. &plat_priv->icc.list_head, list) {
  2756. list_del(&bus_bw_info->list);
  2757. if (bus_bw_info->icc_path)
  2758. icc_put(bus_bw_info->icc_path);
  2759. }
  2760. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2761. }
  2762. #else
  2763. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2764. {
  2765. return 0;
  2766. }
  2767. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  2768. #endif /* CONFIG_INTERCONNECT */
  2769. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  2770. {
  2771. struct cnss_plat_data *plat_priv = cb_ctx;
  2772. if (!plat_priv) {
  2773. cnss_pr_err("%s: Invalid context\n", __func__);
  2774. return;
  2775. }
  2776. if (status) {
  2777. cnss_pr_info("CNSS Daemon connected\n");
  2778. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2779. complete(&plat_priv->daemon_connected);
  2780. } else {
  2781. cnss_pr_info("CNSS Daemon disconnected\n");
  2782. reinit_completion(&plat_priv->daemon_connected);
  2783. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2784. }
  2785. }
  2786. static ssize_t enable_hds_store(struct device *dev,
  2787. struct device_attribute *attr,
  2788. const char *buf, size_t count)
  2789. {
  2790. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2791. unsigned int enable_hds = 0;
  2792. if (!plat_priv)
  2793. return -ENODEV;
  2794. if (sscanf(buf, "%du", &enable_hds) != 1) {
  2795. cnss_pr_err("Invalid enable_hds sysfs command\n");
  2796. return -EINVAL;
  2797. }
  2798. if (enable_hds)
  2799. plat_priv->hds_enabled = true;
  2800. else
  2801. plat_priv->hds_enabled = false;
  2802. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  2803. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  2804. return count;
  2805. }
  2806. static ssize_t recovery_show(struct device *dev,
  2807. struct device_attribute *attr,
  2808. char *buf)
  2809. {
  2810. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2811. u32 buf_size = PAGE_SIZE;
  2812. u32 curr_len = 0;
  2813. u32 buf_written = 0;
  2814. if (!plat_priv)
  2815. return -ENODEV;
  2816. buf_written = scnprintf(buf, buf_size,
  2817. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  2818. "BIT0 -- wlan fw recovery\n"
  2819. "BIT1 -- wlan pcss recovery\n"
  2820. "---------------------------------\n");
  2821. curr_len += buf_written;
  2822. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  2823. "WLAN recovery %s[%d]\n",
  2824. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  2825. plat_priv->recovery_enabled);
  2826. curr_len += buf_written;
  2827. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  2828. "WLAN PCSS recovery %s[%d]\n",
  2829. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  2830. plat_priv->recovery_pcss_enabled);
  2831. curr_len += buf_written;
  2832. /*
  2833. * Now size of curr_len is not over page size for sure,
  2834. * later if new item or none-fixed size item added, need
  2835. * add check to make sure curr_len is not over page size.
  2836. */
  2837. return curr_len;
  2838. }
  2839. static ssize_t time_sync_period_show(struct device *dev,
  2840. struct device_attribute *attr,
  2841. char *buf)
  2842. {
  2843. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2844. return scnprintf(buf, PAGE_SIZE, "%u ms\n",
  2845. plat_priv->ctrl_params.time_sync_period);
  2846. }
  2847. static ssize_t time_sync_period_store(struct device *dev,
  2848. struct device_attribute *attr,
  2849. const char *buf, size_t count)
  2850. {
  2851. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2852. unsigned int time_sync_period = 0;
  2853. if (!plat_priv)
  2854. return -ENODEV;
  2855. if (sscanf(buf, "%du", &time_sync_period) != 1) {
  2856. cnss_pr_err("Invalid time sync sysfs command\n");
  2857. return -EINVAL;
  2858. }
  2859. if (time_sync_period >= CNSS_MIN_TIME_SYNC_PERIOD)
  2860. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  2861. return count;
  2862. }
  2863. static ssize_t recovery_store(struct device *dev,
  2864. struct device_attribute *attr,
  2865. const char *buf, size_t count)
  2866. {
  2867. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2868. unsigned int recovery = 0;
  2869. int ret;
  2870. if (!plat_priv)
  2871. return -ENODEV;
  2872. if (sscanf(buf, "%du", &recovery) != 1) {
  2873. cnss_pr_err("Invalid recovery sysfs command\n");
  2874. return -EINVAL;
  2875. }
  2876. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  2877. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  2878. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  2879. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  2880. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  2881. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  2882. ret = cnss_send_subsys_restart_level_msg(plat_priv);
  2883. if (ret < 0) {
  2884. cnss_pr_err("pcss recovery setting failed with ret %d\n", ret);
  2885. plat_priv->recovery_pcss_enabled = false;
  2886. return -EINVAL;
  2887. }
  2888. return count;
  2889. }
  2890. static ssize_t shutdown_store(struct device *dev,
  2891. struct device_attribute *attr,
  2892. const char *buf, size_t count)
  2893. {
  2894. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2895. if (plat_priv) {
  2896. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  2897. del_timer(&plat_priv->fw_boot_timer);
  2898. complete_all(&plat_priv->power_up_complete);
  2899. complete_all(&plat_priv->cal_complete);
  2900. }
  2901. cnss_pr_dbg("Received shutdown notification\n");
  2902. return count;
  2903. }
  2904. static ssize_t fs_ready_store(struct device *dev,
  2905. struct device_attribute *attr,
  2906. const char *buf, size_t count)
  2907. {
  2908. int fs_ready = 0;
  2909. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2910. if (sscanf(buf, "%du", &fs_ready) != 1)
  2911. return -EINVAL;
  2912. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  2913. fs_ready, count);
  2914. if (!plat_priv) {
  2915. cnss_pr_err("plat_priv is NULL\n");
  2916. return count;
  2917. }
  2918. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  2919. cnss_pr_dbg("QMI is bypassed\n");
  2920. return count;
  2921. }
  2922. switch (plat_priv->device_id) {
  2923. case QCA6290_DEVICE_ID:
  2924. case QCA6390_DEVICE_ID:
  2925. case QCA6490_DEVICE_ID:
  2926. case KIWI_DEVICE_ID:
  2927. case MANGO_DEVICE_ID:
  2928. break;
  2929. default:
  2930. cnss_pr_err("Not supported for device ID 0x%lx\n",
  2931. plat_priv->device_id);
  2932. return count;
  2933. }
  2934. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  2935. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  2936. cnss_driver_event_post(plat_priv,
  2937. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  2938. 0, NULL);
  2939. }
  2940. return count;
  2941. }
  2942. static ssize_t qdss_trace_start_store(struct device *dev,
  2943. struct device_attribute *attr,
  2944. const char *buf, size_t count)
  2945. {
  2946. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2947. wlfw_qdss_trace_start(plat_priv);
  2948. cnss_pr_dbg("Received QDSS start command\n");
  2949. return count;
  2950. }
  2951. static ssize_t qdss_trace_stop_store(struct device *dev,
  2952. struct device_attribute *attr,
  2953. const char *buf, size_t count)
  2954. {
  2955. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2956. u32 option = 0;
  2957. if (sscanf(buf, "%du", &option) != 1)
  2958. return -EINVAL;
  2959. wlfw_qdss_trace_stop(plat_priv, option);
  2960. cnss_pr_dbg("Received QDSS stop command\n");
  2961. return count;
  2962. }
  2963. static ssize_t qdss_conf_download_store(struct device *dev,
  2964. struct device_attribute *attr,
  2965. const char *buf, size_t count)
  2966. {
  2967. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2968. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  2969. cnss_pr_dbg("Received QDSS download config command\n");
  2970. return count;
  2971. }
  2972. static ssize_t hw_trace_override_store(struct device *dev,
  2973. struct device_attribute *attr,
  2974. const char *buf, size_t count)
  2975. {
  2976. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2977. int tmp = 0;
  2978. if (sscanf(buf, "%du", &tmp) != 1)
  2979. return -EINVAL;
  2980. plat_priv->hw_trc_override = tmp;
  2981. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  2982. return count;
  2983. }
  2984. static ssize_t charger_mode_store(struct device *dev,
  2985. struct device_attribute *attr,
  2986. const char *buf, size_t count)
  2987. {
  2988. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2989. int tmp = 0;
  2990. if (sscanf(buf, "%du", &tmp) != 1)
  2991. return -EINVAL;
  2992. plat_priv->charger_mode = tmp;
  2993. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  2994. return count;
  2995. }
  2996. static DEVICE_ATTR_WO(fs_ready);
  2997. static DEVICE_ATTR_WO(shutdown);
  2998. static DEVICE_ATTR_RW(recovery);
  2999. static DEVICE_ATTR_WO(enable_hds);
  3000. static DEVICE_ATTR_WO(qdss_trace_start);
  3001. static DEVICE_ATTR_WO(qdss_trace_stop);
  3002. static DEVICE_ATTR_WO(qdss_conf_download);
  3003. static DEVICE_ATTR_WO(hw_trace_override);
  3004. static DEVICE_ATTR_WO(charger_mode);
  3005. static DEVICE_ATTR_RW(time_sync_period);
  3006. static struct attribute *cnss_attrs[] = {
  3007. &dev_attr_fs_ready.attr,
  3008. &dev_attr_shutdown.attr,
  3009. &dev_attr_recovery.attr,
  3010. &dev_attr_enable_hds.attr,
  3011. &dev_attr_qdss_trace_start.attr,
  3012. &dev_attr_qdss_trace_stop.attr,
  3013. &dev_attr_qdss_conf_download.attr,
  3014. &dev_attr_hw_trace_override.attr,
  3015. &dev_attr_charger_mode.attr,
  3016. &dev_attr_time_sync_period.attr,
  3017. NULL,
  3018. };
  3019. static struct attribute_group cnss_attr_group = {
  3020. .attrs = cnss_attrs,
  3021. };
  3022. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  3023. {
  3024. struct device *dev = &plat_priv->plat_dev->dev;
  3025. int ret;
  3026. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "cnss");
  3027. if (ret) {
  3028. cnss_pr_err("Failed to create cnss link, err = %d\n",
  3029. ret);
  3030. goto out;
  3031. }
  3032. /* This is only for backward compatibility. */
  3033. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "shutdown_wlan");
  3034. if (ret) {
  3035. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  3036. ret);
  3037. goto rm_cnss_link;
  3038. }
  3039. return 0;
  3040. rm_cnss_link:
  3041. sysfs_remove_link(kernel_kobj, "cnss");
  3042. out:
  3043. return ret;
  3044. }
  3045. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  3046. {
  3047. sysfs_remove_link(kernel_kobj, "shutdown_wlan");
  3048. sysfs_remove_link(kernel_kobj, "cnss");
  3049. }
  3050. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  3051. {
  3052. int ret = 0;
  3053. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  3054. &cnss_attr_group);
  3055. if (ret) {
  3056. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  3057. ret);
  3058. goto out;
  3059. }
  3060. cnss_create_sysfs_link(plat_priv);
  3061. return 0;
  3062. out:
  3063. return ret;
  3064. }
  3065. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3066. {
  3067. cnss_remove_sysfs_link(plat_priv);
  3068. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3069. }
  3070. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3071. {
  3072. spin_lock_init(&plat_priv->event_lock);
  3073. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3074. WQ_UNBOUND, 1);
  3075. if (!plat_priv->event_wq) {
  3076. cnss_pr_err("Failed to create event workqueue!\n");
  3077. return -EFAULT;
  3078. }
  3079. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3080. INIT_LIST_HEAD(&plat_priv->event_list);
  3081. return 0;
  3082. }
  3083. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3084. {
  3085. destroy_workqueue(plat_priv->event_wq);
  3086. }
  3087. static int cnss_reboot_notifier(struct notifier_block *nb,
  3088. unsigned long action,
  3089. void *data)
  3090. {
  3091. struct cnss_plat_data *plat_priv =
  3092. container_of(nb, struct cnss_plat_data, reboot_nb);
  3093. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3094. del_timer(&plat_priv->fw_boot_timer);
  3095. complete_all(&plat_priv->power_up_complete);
  3096. complete_all(&plat_priv->cal_complete);
  3097. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3098. return NOTIFY_DONE;
  3099. }
  3100. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3101. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3102. {
  3103. struct Object client_env;
  3104. struct Object app_object;
  3105. u32 wifi_uid = HW_WIFI_UID;
  3106. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3107. int ret;
  3108. u8 state = 0;
  3109. /* Once this flag is set, secure peripheral feature
  3110. * will not be supported till next reboot
  3111. */
  3112. if (plat_priv->sec_peri_feature_disable)
  3113. return 0;
  3114. /* get rootObj */
  3115. ret = get_client_env_object(&client_env);
  3116. if (ret) {
  3117. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  3118. goto end;
  3119. }
  3120. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  3121. if (ret) {
  3122. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  3123. if (ret == FEATURE_NOT_SUPPORTED) {
  3124. ret = 0; /* Do not Assert */
  3125. plat_priv->sec_peri_feature_disable = true;
  3126. cnss_pr_dbg("Secure HW feature not supported\n");
  3127. }
  3128. goto exit_release_clientenv;
  3129. }
  3130. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  3131. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  3132. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  3133. ObjectCounts_pack(1, 1, 0, 0));
  3134. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  3135. if (ret) {
  3136. if (ret == PERIPHERAL_NOT_FOUND) {
  3137. ret = 0; /* Do not Assert */
  3138. plat_priv->sec_peri_feature_disable = true;
  3139. cnss_pr_dbg("Secure HW mode is not updated. Peripheral not found\n");
  3140. }
  3141. goto exit_release_app_obj;
  3142. }
  3143. if (state == 1)
  3144. set_bit(CNSS_WLAN_HW_DISABLED,
  3145. &plat_priv->driver_state);
  3146. else
  3147. clear_bit(CNSS_WLAN_HW_DISABLED,
  3148. &plat_priv->driver_state);
  3149. exit_release_app_obj:
  3150. Object_release(app_object);
  3151. exit_release_clientenv:
  3152. Object_release(client_env);
  3153. end:
  3154. if (ret) {
  3155. cnss_pr_err("Unable to get HW disable status\n");
  3156. CNSS_ASSERT(0);
  3157. }
  3158. return ret;
  3159. }
  3160. #else
  3161. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3162. {
  3163. return 0;
  3164. }
  3165. #endif
  3166. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  3167. {
  3168. int ret;
  3169. ret = cnss_init_sol_gpio(plat_priv);
  3170. if (ret)
  3171. return ret;
  3172. timer_setup(&plat_priv->fw_boot_timer,
  3173. cnss_bus_fw_boot_timeout_hdlr, 0);
  3174. ret = register_pm_notifier(&cnss_pm_notifier);
  3175. if (ret)
  3176. cnss_pr_err("Failed to register PM notifier, err = %d\n", ret);
  3177. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  3178. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  3179. if (ret)
  3180. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  3181. ret);
  3182. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  3183. if (ret)
  3184. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3185. ret);
  3186. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  3187. init_completion(&plat_priv->power_up_complete);
  3188. init_completion(&plat_priv->cal_complete);
  3189. init_completion(&plat_priv->rddm_complete);
  3190. init_completion(&plat_priv->recovery_complete);
  3191. init_completion(&plat_priv->daemon_connected);
  3192. mutex_init(&plat_priv->dev_lock);
  3193. mutex_init(&plat_priv->driver_ops_lock);
  3194. plat_priv->recovery_ws =
  3195. wakeup_source_register(&plat_priv->plat_dev->dev,
  3196. "CNSS_FW_RECOVERY");
  3197. if (!plat_priv->recovery_ws)
  3198. cnss_pr_err("Failed to setup FW recovery wake source\n");
  3199. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3200. cnss_daemon_connection_update_cb,
  3201. plat_priv);
  3202. if (ret)
  3203. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  3204. ret);
  3205. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3206. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3207. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3208. return 0;
  3209. }
  3210. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  3211. {
  3212. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3213. plat_priv);
  3214. complete_all(&plat_priv->recovery_complete);
  3215. complete_all(&plat_priv->rddm_complete);
  3216. complete_all(&plat_priv->cal_complete);
  3217. complete_all(&plat_priv->power_up_complete);
  3218. complete_all(&plat_priv->daemon_connected);
  3219. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  3220. unregister_reboot_notifier(&plat_priv->reboot_nb);
  3221. unregister_pm_notifier(&cnss_pm_notifier);
  3222. del_timer(&plat_priv->fw_boot_timer);
  3223. wakeup_source_unregister(plat_priv->recovery_ws);
  3224. cnss_deinit_sol_gpio(plat_priv);
  3225. kfree(plat_priv->sram_dump);
  3226. }
  3227. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  3228. {
  3229. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  3230. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  3231. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3232. "qcom,wlan-cbc-enabled");
  3233. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  3234. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  3235. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  3236. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  3237. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3238. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  3239. * enabled by default
  3240. */
  3241. plat_priv->adsp_pc_enabled = true;
  3242. }
  3243. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  3244. {
  3245. struct device *dev = &plat_priv->plat_dev->dev;
  3246. plat_priv->use_pm_domain =
  3247. of_property_read_bool(dev->of_node, "use-pm-domain");
  3248. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  3249. }
  3250. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  3251. {
  3252. struct device *dev = &plat_priv->plat_dev->dev;
  3253. plat_priv->set_wlaon_pwr_ctrl =
  3254. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  3255. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  3256. plat_priv->set_wlaon_pwr_ctrl);
  3257. }
  3258. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  3259. {
  3260. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3261. "qcom,converged-dt") ||
  3262. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3263. "qcom,same-dt-multi-dev") ||
  3264. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3265. "qcom,multi-wlan-exchg"));
  3266. }
  3267. static const struct platform_device_id cnss_platform_id_table[] = {
  3268. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  3269. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  3270. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  3271. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  3272. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  3273. { .name = "mango", .driver_data = MANGO_DEVICE_ID, },
  3274. { .name = "qcaconv", .driver_data = 0, },
  3275. { },
  3276. };
  3277. static const struct of_device_id cnss_of_match_table[] = {
  3278. {
  3279. .compatible = "qcom,cnss",
  3280. .data = (void *)&cnss_platform_id_table[0]},
  3281. {
  3282. .compatible = "qcom,cnss-qca6290",
  3283. .data = (void *)&cnss_platform_id_table[1]},
  3284. {
  3285. .compatible = "qcom,cnss-qca6390",
  3286. .data = (void *)&cnss_platform_id_table[2]},
  3287. {
  3288. .compatible = "qcom,cnss-qca6490",
  3289. .data = (void *)&cnss_platform_id_table[3]},
  3290. {
  3291. .compatible = "qcom,cnss-kiwi",
  3292. .data = (void *)&cnss_platform_id_table[4]},
  3293. {
  3294. .compatible = "qcom,cnss-mango",
  3295. .data = (void *)&cnss_platform_id_table[5]},
  3296. {
  3297. .compatible = "qcom,cnss-qca-converged",
  3298. .data = (void *)&cnss_platform_id_table[6]},
  3299. { },
  3300. };
  3301. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  3302. static inline bool
  3303. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  3304. {
  3305. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3306. "use-nv-mac");
  3307. }
  3308. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  3309. {
  3310. struct device_node *child;
  3311. u32 id, i;
  3312. int id_n, device_identifier_gpio, ret;
  3313. u8 gpio_value;
  3314. if (!plat_priv->is_converged_dt)
  3315. return 0;
  3316. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  3317. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  3318. if (ret) {
  3319. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  3320. return ret;
  3321. }
  3322. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  3323. gpio_value = gpio_get_value(device_identifier_gpio);
  3324. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  3325. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  3326. child) {
  3327. if (strcmp(child->name, "chip_cfg"))
  3328. continue;
  3329. id_n = of_property_count_u32_elems(child, "supported-ids");
  3330. if (id_n <= 0) {
  3331. cnss_pr_err("Device id is NOT set\n");
  3332. return -EINVAL;
  3333. }
  3334. for (i = 0; i < id_n; i++) {
  3335. ret = of_property_read_u32_index(child,
  3336. "supported-ids",
  3337. i, &id);
  3338. if (ret) {
  3339. cnss_pr_err("Failed to read supported ids\n");
  3340. return -EINVAL;
  3341. }
  3342. if (gpio_value && id == QCA6490_DEVICE_ID) {
  3343. plat_priv->plat_dev->dev.of_node = child;
  3344. plat_priv->device_id = QCA6490_DEVICE_ID;
  3345. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  3346. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3347. child->name, i, id);
  3348. return 0;
  3349. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  3350. plat_priv->plat_dev->dev.of_node = child;
  3351. plat_priv->device_id = KIWI_DEVICE_ID;
  3352. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  3353. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3354. child->name, i, id);
  3355. return 0;
  3356. }
  3357. }
  3358. }
  3359. return -EINVAL;
  3360. }
  3361. static inline bool
  3362. cnss_is_converged_dt(struct cnss_plat_data *plat_priv)
  3363. {
  3364. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3365. "qcom,converged-dt");
  3366. }
  3367. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  3368. {
  3369. int ret = 0;
  3370. int retry = 0;
  3371. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  3372. return 0;
  3373. retry:
  3374. ret = cnss_power_on_device(plat_priv);
  3375. if (ret)
  3376. goto end;
  3377. ret = cnss_bus_init(plat_priv);
  3378. if (ret) {
  3379. if ((ret != -EPROBE_DEFER) &&
  3380. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  3381. cnss_power_off_device(plat_priv);
  3382. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  3383. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  3384. goto retry;
  3385. }
  3386. goto power_off;
  3387. }
  3388. return 0;
  3389. power_off:
  3390. cnss_power_off_device(plat_priv);
  3391. end:
  3392. return ret;
  3393. }
  3394. int cnss_wlan_hw_enable(void)
  3395. {
  3396. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  3397. int ret = 0;
  3398. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  3399. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  3400. goto register_driver;
  3401. ret = cnss_wlan_device_init(plat_priv);
  3402. if (ret) {
  3403. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state))
  3404. CNSS_ASSERT(0);
  3405. return ret;
  3406. }
  3407. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  3408. cnss_driver_event_post(plat_priv,
  3409. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3410. 0, NULL);
  3411. register_driver:
  3412. if (plat_priv->driver_ops)
  3413. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  3414. return ret;
  3415. }
  3416. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  3417. static int cnss_probe(struct platform_device *plat_dev)
  3418. {
  3419. int ret = 0;
  3420. struct cnss_plat_data *plat_priv;
  3421. const struct of_device_id *of_id;
  3422. const struct platform_device_id *device_id;
  3423. if (cnss_get_plat_priv(plat_dev)) {
  3424. cnss_pr_err("Driver is already initialized!\n");
  3425. ret = -EEXIST;
  3426. goto out;
  3427. }
  3428. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  3429. if (!of_id || !of_id->data) {
  3430. cnss_pr_err("Failed to find of match device!\n");
  3431. ret = -ENODEV;
  3432. goto out;
  3433. }
  3434. device_id = of_id->data;
  3435. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  3436. GFP_KERNEL);
  3437. if (!plat_priv) {
  3438. ret = -ENOMEM;
  3439. goto out;
  3440. }
  3441. plat_priv->plat_dev = plat_dev;
  3442. plat_priv->device_id = device_id->driver_data;
  3443. plat_priv->is_converged_dt = cnss_is_converged_dt(plat_priv);
  3444. plat_priv->use_fw_path_with_prefix =
  3445. cnss_use_fw_path_with_prefix(plat_priv);
  3446. ret = cnss_get_dev_cfg_node(plat_priv);
  3447. if (ret) {
  3448. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  3449. goto reset_plat_dev;
  3450. }
  3451. plat_priv->bus_type = cnss_get_bus_type(plat_priv->device_id);
  3452. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  3453. plat_priv->driver_mode = CNSS_DRIVER_MODE_MAX;
  3454. cnss_set_plat_priv(plat_dev, plat_priv);
  3455. platform_set_drvdata(plat_dev, plat_priv);
  3456. INIT_LIST_HEAD(&plat_priv->vreg_list);
  3457. INIT_LIST_HEAD(&plat_priv->clk_list);
  3458. cnss_get_pm_domain_info(plat_priv);
  3459. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  3460. cnss_power_misc_params_init(plat_priv);
  3461. cnss_get_tcs_info(plat_priv);
  3462. cnss_get_cpr_info(plat_priv);
  3463. cnss_aop_mbox_init(plat_priv);
  3464. cnss_init_control_params(plat_priv);
  3465. ret = cnss_get_resources(plat_priv);
  3466. if (ret)
  3467. goto reset_ctx;
  3468. ret = cnss_register_esoc(plat_priv);
  3469. if (ret)
  3470. goto free_res;
  3471. ret = cnss_register_bus_scale(plat_priv);
  3472. if (ret)
  3473. goto unreg_esoc;
  3474. ret = cnss_create_sysfs(plat_priv);
  3475. if (ret)
  3476. goto unreg_bus_scale;
  3477. ret = cnss_event_work_init(plat_priv);
  3478. if (ret)
  3479. goto remove_sysfs;
  3480. ret = cnss_qmi_init(plat_priv);
  3481. if (ret)
  3482. goto deinit_event_work;
  3483. ret = cnss_dms_init(plat_priv);
  3484. if (ret)
  3485. goto deinit_qmi;
  3486. ret = cnss_debugfs_create(plat_priv);
  3487. if (ret)
  3488. goto deinit_dms;
  3489. ret = cnss_misc_init(plat_priv);
  3490. if (ret)
  3491. goto destroy_debugfs;
  3492. ret = cnss_wlan_hw_disable_check(plat_priv);
  3493. if (ret)
  3494. goto deinit_misc;
  3495. /* Make sure all platform related init are done before
  3496. * device power on and bus init.
  3497. */
  3498. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  3499. ret = cnss_wlan_device_init(plat_priv);
  3500. if (ret)
  3501. goto deinit_misc;
  3502. } else {
  3503. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  3504. }
  3505. cnss_register_coex_service(plat_priv);
  3506. cnss_register_ims_service(plat_priv);
  3507. ret = cnss_genl_init();
  3508. if (ret < 0)
  3509. cnss_pr_err("CNSS genl init failed %d\n", ret);
  3510. cnss_pr_info("Platform driver probed successfully.\n");
  3511. return 0;
  3512. deinit_misc:
  3513. cnss_misc_deinit(plat_priv);
  3514. destroy_debugfs:
  3515. cnss_debugfs_destroy(plat_priv);
  3516. deinit_dms:
  3517. cnss_dms_deinit(plat_priv);
  3518. deinit_qmi:
  3519. cnss_qmi_deinit(plat_priv);
  3520. deinit_event_work:
  3521. cnss_event_work_deinit(plat_priv);
  3522. remove_sysfs:
  3523. cnss_remove_sysfs(plat_priv);
  3524. unreg_bus_scale:
  3525. cnss_unregister_bus_scale(plat_priv);
  3526. unreg_esoc:
  3527. cnss_unregister_esoc(plat_priv);
  3528. free_res:
  3529. cnss_put_resources(plat_priv);
  3530. reset_ctx:
  3531. platform_set_drvdata(plat_dev, NULL);
  3532. reset_plat_dev:
  3533. cnss_set_plat_priv(plat_dev, NULL);
  3534. out:
  3535. return ret;
  3536. }
  3537. static int cnss_remove(struct platform_device *plat_dev)
  3538. {
  3539. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  3540. cnss_genl_exit();
  3541. cnss_unregister_ims_service(plat_priv);
  3542. cnss_unregister_coex_service(plat_priv);
  3543. cnss_bus_deinit(plat_priv);
  3544. cnss_misc_deinit(plat_priv);
  3545. cnss_debugfs_destroy(plat_priv);
  3546. cnss_dms_deinit(plat_priv);
  3547. cnss_qmi_deinit(plat_priv);
  3548. cnss_event_work_deinit(plat_priv);
  3549. cnss_cancel_dms_work();
  3550. cnss_remove_sysfs(plat_priv);
  3551. cnss_unregister_bus_scale(plat_priv);
  3552. cnss_unregister_esoc(plat_priv);
  3553. cnss_put_resources(plat_priv);
  3554. if (!IS_ERR_OR_NULL(plat_priv->mbox_chan))
  3555. mbox_free_channel(plat_priv->mbox_chan);
  3556. platform_set_drvdata(plat_dev, NULL);
  3557. plat_env = NULL;
  3558. return 0;
  3559. }
  3560. static struct platform_driver cnss_platform_driver = {
  3561. .probe = cnss_probe,
  3562. .remove = cnss_remove,
  3563. .driver = {
  3564. .name = "cnss2",
  3565. .of_match_table = cnss_of_match_table,
  3566. #ifdef CONFIG_CNSS_ASYNC
  3567. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3568. #endif
  3569. },
  3570. };
  3571. static bool cnss_check_compatible_node(void)
  3572. {
  3573. struct device_node *dn = NULL;
  3574. for_each_matching_node(dn, cnss_of_match_table) {
  3575. if (of_device_is_available(dn)) {
  3576. cnss_allow_driver_loading = true;
  3577. return true;
  3578. }
  3579. }
  3580. return false;
  3581. }
  3582. /**
  3583. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  3584. *
  3585. * Valid device tree node means a node with "compatible" property from the
  3586. * device match table and "status" property is not disabled.
  3587. *
  3588. * Return: true if valid device tree node found, false if not found
  3589. */
  3590. static bool cnss_is_valid_dt_node_found(void)
  3591. {
  3592. struct device_node *dn = NULL;
  3593. for_each_matching_node(dn, cnss_of_match_table) {
  3594. if (of_device_is_available(dn))
  3595. break;
  3596. }
  3597. if (dn)
  3598. return true;
  3599. return false;
  3600. }
  3601. static int __init cnss_initialize(void)
  3602. {
  3603. int ret = 0;
  3604. if (!cnss_is_valid_dt_node_found())
  3605. return -ENODEV;
  3606. if (!cnss_check_compatible_node())
  3607. return ret;
  3608. cnss_debug_init();
  3609. ret = platform_driver_register(&cnss_platform_driver);
  3610. if (ret)
  3611. cnss_debug_deinit();
  3612. return ret;
  3613. }
  3614. static void __exit cnss_exit(void)
  3615. {
  3616. platform_driver_unregister(&cnss_platform_driver);
  3617. cnss_debug_deinit();
  3618. }
  3619. module_init(cnss_initialize);
  3620. module_exit(cnss_exit);
  3621. MODULE_LICENSE("GPL v2");
  3622. MODULE_DESCRIPTION("CNSS2 Platform Driver");