dp_tx.h 36 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #ifndef __DP_TX_H
  20. #define __DP_TX_H
  21. #include <qdf_types.h>
  22. #include <qdf_nbuf.h>
  23. #include "dp_types.h"
  24. #ifdef FEATURE_PERPKT_INFO
  25. #if defined(QCA_SUPPORT_LATENCY_CAPTURE) || \
  26. defined(QCA_TX_CAPTURE_SUPPORT) || \
  27. defined(QCA_MCOPY_SUPPORT)
  28. #include "if_meta_hdr.h"
  29. #endif
  30. #endif
  31. #include "dp_internal.h"
  32. #include "hal_tx.h"
  33. #include <qdf_tracepoint.h>
  34. #ifdef CONFIG_SAWF
  35. #include "dp_sawf.h"
  36. #endif
  37. #include <qdf_pkt_add_timestamp.h>
  38. #define DP_INVALID_VDEV_ID 0xFF
  39. #define DP_TX_MAX_NUM_FRAGS 6
  40. /*
  41. * DP_TX_DESC_FLAG_FRAG flags should always be defined to 0x1
  42. * please do not change this flag's definition
  43. */
  44. #define DP_TX_DESC_FLAG_FRAG 0x1
  45. #define DP_TX_DESC_FLAG_TO_FW 0x2
  46. #define DP_TX_DESC_FLAG_SIMPLE 0x4
  47. #define DP_TX_DESC_FLAG_RAW 0x8
  48. #define DP_TX_DESC_FLAG_MESH 0x10
  49. #define DP_TX_DESC_FLAG_QUEUED_TX 0x20
  50. #define DP_TX_DESC_FLAG_COMPLETED_TX 0x40
  51. #define DP_TX_DESC_FLAG_ME 0x80
  52. #define DP_TX_DESC_FLAG_TDLS_FRAME 0x100
  53. #define DP_TX_DESC_FLAG_ALLOCATED 0x200
  54. #define DP_TX_DESC_FLAG_MESH_MODE 0x400
  55. #define DP_TX_DESC_FLAG_UNMAP_DONE 0x800
  56. #define DP_TX_DESC_FLAG_TX_COMP_ERR 0x1000
  57. #define DP_TX_DESC_FLAG_FLUSH 0x2000
  58. #define DP_TX_DESC_FLAG_TRAFFIC_END_IND 0x4000
  59. #define DP_TX_DESC_FLAG_RMNET 0x8000
  60. /*
  61. * Since the Tx descriptor flag is of only 16-bit and no more bit is free for
  62. * any new flag, therefore for time being overloading PPEDS flag with that of
  63. * FLUSH flag and FLAG_FAST with TDLS which is not enabled for WIN.
  64. */
  65. #define DP_TX_DESC_FLAG_PPEDS 0x2000
  66. #define DP_TX_DESC_FLAG_FAST 0x100
  67. #define DP_TX_EXT_DESC_FLAG_METADATA_VALID 0x1
  68. #define DP_TX_FREE_SINGLE_BUF(soc, buf) \
  69. do { \
  70. qdf_nbuf_unmap(soc->osdev, buf, QDF_DMA_TO_DEVICE); \
  71. qdf_nbuf_free(buf); \
  72. } while (0)
  73. #define OCB_HEADER_VERSION 1
  74. #ifdef TX_PER_PDEV_DESC_POOL
  75. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  76. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->vdev_id)
  77. #else /* QCA_LL_TX_FLOW_CONTROL_V2 */
  78. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->pdev->pdev_id)
  79. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  80. #define DP_TX_GET_RING_ID(vdev) (vdev->pdev->pdev_id)
  81. #else
  82. #ifdef TX_PER_VDEV_DESC_POOL
  83. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->vdev_id)
  84. #define DP_TX_GET_RING_ID(vdev) (vdev->pdev->pdev_id)
  85. #endif /* TX_PER_VDEV_DESC_POOL */
  86. #endif /* TX_PER_PDEV_DESC_POOL */
  87. #define DP_TX_QUEUE_MASK 0x3
  88. #define MAX_CDP_SEC_TYPE 12
  89. /* number of dwords for htt_tx_msdu_desc_ext2_t */
  90. #define DP_TX_MSDU_INFO_META_DATA_DWORDS 7
  91. #define dp_tx_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_TX, params)
  92. #define dp_tx_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_TX, params)
  93. #define dp_tx_err_rl(params...) QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP_TX, params)
  94. #define dp_tx_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_TX, params)
  95. #define dp_tx_info(params...) \
  96. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_TX, ## params)
  97. #define dp_tx_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_TX, params)
  98. #define dp_tx_comp_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_TX_COMP, params)
  99. #define dp_tx_comp_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_TX_COMP, params)
  100. #define dp_tx_comp_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_TX_COMP, params)
  101. #define dp_tx_comp_info(params...) \
  102. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_TX_COMP, ## params)
  103. #define dp_tx_comp_info_rl(params...) \
  104. __QDF_TRACE_RL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_TX_COMP, ## params)
  105. #define dp_tx_comp_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_TX_COMP, params)
  106. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  107. /**
  108. * struct dp_tx_frag_info_s
  109. * @vaddr: hlos virtual address for buffer
  110. * @paddr_lo: physical address lower 32bits
  111. * @paddr_hi: physical address higher bits
  112. * @len: length of the buffer
  113. */
  114. struct dp_tx_frag_info_s {
  115. uint8_t *vaddr;
  116. uint32_t paddr_lo;
  117. uint16_t paddr_hi;
  118. uint16_t len;
  119. };
  120. /**
  121. * struct dp_tx_seg_info_s - Segmentation Descriptor
  122. * @nbuf: NBUF pointer if segment corresponds to separate nbuf
  123. * @frag_cnt: Fragment count in this segment
  124. * @total_len: Total length of segment
  125. * @frags: per-Fragment information
  126. * @next: pointer to next MSDU segment
  127. */
  128. struct dp_tx_seg_info_s {
  129. qdf_nbuf_t nbuf;
  130. uint16_t frag_cnt;
  131. uint16_t total_len;
  132. struct dp_tx_frag_info_s frags[DP_TX_MAX_NUM_FRAGS];
  133. struct dp_tx_seg_info_s *next;
  134. };
  135. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  136. /**
  137. * struct dp_tx_sg_info_s - Scatter Gather Descriptor
  138. * @num_segs: Number of segments (TSO/ME) in the frame
  139. * @total_len: Total length of the frame
  140. * @curr_seg: Points to current segment descriptor to be processed. Chain of
  141. * descriptors for SG frames/multicast-unicast converted packets.
  142. *
  143. * Used for SG (802.3 or Raw) frames and Multicast-Unicast converted frames to
  144. * carry fragmentation information
  145. * Raw Frames will be handed over to driver as an SKB chain with MPDU boundaries
  146. * indicated through flags in SKB CB (first_msdu and last_msdu). This will be
  147. * converted into set of skb sg (nr_frags) structures.
  148. */
  149. struct dp_tx_sg_info_s {
  150. uint32_t num_segs;
  151. uint32_t total_len;
  152. struct dp_tx_seg_info_s *curr_seg;
  153. };
  154. /**
  155. * struct dp_tx_queue - Tx queue
  156. * @desc_pool_id: Descriptor Pool to be used for the tx queue
  157. * @ring_id: TCL descriptor ring ID corresponding to the tx queue
  158. *
  159. * Tx queue contains information of the software (Descriptor pool)
  160. * and hardware resources (TCL ring id) to be used for a particular
  161. * transmit queue (obtained from skb_queue_mapping in case of linux)
  162. */
  163. struct dp_tx_queue {
  164. uint8_t desc_pool_id;
  165. uint8_t ring_id;
  166. };
  167. /**
  168. * struct dp_tx_msdu_info_s - MSDU Descriptor
  169. * @frm_type: Frame type - Regular/TSO/SG/Multicast enhancement
  170. * @tx_queue: Tx queue on which this MSDU should be transmitted
  171. * @num_seg: Number of segments (TSO)
  172. * @tid: TID (override) that is sent from HLOS
  173. * @u.tso_info: TSO information for TSO frame types
  174. * (chain of the TSO segments, number of segments)
  175. * @u.sg_info: Scatter Gather information for non-TSO SG frames
  176. * @meta_data: Mesh meta header information
  177. * @exception_fw: Duplicate frame to be sent to firmware
  178. * @ppdu_cookie: 16-bit ppdu_cookie that has to be replayed back in completions
  179. * @ix_tx_sniffer: Indicates if the packet has to be sniffed
  180. * @gsn: global sequence for reinjected mcast packets
  181. * @vdev_id : vdev_id for reinjected mcast packets
  182. * @skip_hp_update : Skip HP update for TSO segments and update in last segment
  183. *
  184. * This structure holds the complete MSDU information needed to program the
  185. * Hardware TCL and MSDU extension descriptors for different frame types
  186. *
  187. */
  188. struct dp_tx_msdu_info_s {
  189. enum dp_tx_frm_type frm_type;
  190. struct dp_tx_queue tx_queue;
  191. uint32_t num_seg;
  192. uint8_t tid;
  193. uint8_t exception_fw;
  194. uint8_t is_tx_sniffer;
  195. union {
  196. struct qdf_tso_info_t tso_info;
  197. struct dp_tx_sg_info_s sg_info;
  198. } u;
  199. uint32_t meta_data[DP_TX_MSDU_INFO_META_DATA_DWORDS];
  200. uint16_t ppdu_cookie;
  201. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP)
  202. #ifdef WLAN_MCAST_MLO
  203. uint16_t gsn;
  204. uint8_t vdev_id;
  205. #endif
  206. #endif
  207. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  208. uint8_t skip_hp_update;
  209. #endif
  210. #ifdef QCA_DP_TX_RMNET_OPTIMIZATION
  211. uint16_t buf_len;
  212. uint8_t *payload_addr;
  213. #endif
  214. };
  215. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  216. /**
  217. * dp_tx_deinit_pair_by_index() - Deinit TX rings based on index
  218. * @soc: core txrx context
  219. * @index: index of ring to deinit
  220. *
  221. * Deinit 1 TCL and 1 WBM2SW release ring on as needed basis using
  222. * index of the respective TCL/WBM2SW release in soc structure.
  223. * For example, if the index is 2 then &soc->tcl_data_ring[2]
  224. * and &soc->tx_comp_ring[2] will be deinitialized.
  225. *
  226. * Return: none
  227. */
  228. void dp_tx_deinit_pair_by_index(struct dp_soc *soc, int index);
  229. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  230. void
  231. dp_tx_comp_process_desc_list(struct dp_soc *soc,
  232. struct dp_tx_desc_s *comp_head, uint8_t ring_id);
  233. void dp_tx_tso_cmn_desc_pool_deinit(struct dp_soc *soc, uint8_t num_pool);
  234. void dp_tx_tso_cmn_desc_pool_free(struct dp_soc *soc, uint8_t num_pool);
  235. void dp_tx_tso_cmn_desc_pool_deinit(struct dp_soc *soc, uint8_t num_pool);
  236. void dp_tx_tso_cmn_desc_pool_free(struct dp_soc *soc, uint8_t num_pool);
  237. QDF_STATUS dp_tx_tso_cmn_desc_pool_alloc(struct dp_soc *soc,
  238. uint8_t num_pool,
  239. uint32_t num_desc);
  240. QDF_STATUS dp_tx_tso_cmn_desc_pool_init(struct dp_soc *soc,
  241. uint8_t num_pool,
  242. uint32_t num_desc);
  243. qdf_nbuf_t dp_tx_comp_free_buf(struct dp_soc *soc, struct dp_tx_desc_s *desc,
  244. bool delayed_free);
  245. void dp_tx_desc_release(struct dp_tx_desc_s *tx_desc, uint8_t desc_pool_id);
  246. void dp_tx_compute_delay(struct dp_vdev *vdev, struct dp_tx_desc_s *tx_desc,
  247. uint8_t tid, uint8_t ring_id);
  248. void dp_tx_comp_process_tx_status(struct dp_soc *soc,
  249. struct dp_tx_desc_s *tx_desc,
  250. struct hal_tx_completion_status *ts,
  251. struct dp_txrx_peer *txrx_peer,
  252. uint8_t ring_id);
  253. void dp_tx_comp_process_desc(struct dp_soc *soc,
  254. struct dp_tx_desc_s *desc,
  255. struct hal_tx_completion_status *ts,
  256. struct dp_txrx_peer *txrx_peer);
  257. void dp_tx_reinject_handler(struct dp_soc *soc,
  258. struct dp_vdev *vdev,
  259. struct dp_tx_desc_s *tx_desc,
  260. uint8_t *status,
  261. uint8_t reinject_reason);
  262. void dp_tx_inspect_handler(struct dp_soc *soc,
  263. struct dp_vdev *vdev,
  264. struct dp_tx_desc_s *tx_desc,
  265. uint8_t *status);
  266. void dp_tx_update_peer_basic_stats(struct dp_txrx_peer *txrx_peer,
  267. uint32_t length, uint8_t tx_status,
  268. bool update);
  269. #ifdef DP_UMAC_HW_RESET_SUPPORT
  270. qdf_nbuf_t dp_tx_drop(struct cdp_soc_t *soc, uint8_t vdev_id, qdf_nbuf_t nbuf);
  271. qdf_nbuf_t dp_tx_exc_drop(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  272. qdf_nbuf_t nbuf,
  273. struct cdp_tx_exception_metadata *tx_exc_metadata);
  274. #endif
  275. #ifdef WLAN_SUPPORT_PPEDS
  276. void dp_ppeds_tx_desc_free(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc);
  277. #else
  278. static inline
  279. void dp_ppeds_tx_desc_free(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc)
  280. {
  281. }
  282. #endif
  283. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  284. /**
  285. * dp_tso_attach() - TSO Attach handler
  286. * @txrx_soc: Opaque Dp handle
  287. *
  288. * Reserve TSO descriptor buffers
  289. *
  290. * Return: QDF_STATUS_E_FAILURE on failure or
  291. * QDF_STATUS_SUCCESS on success
  292. */
  293. QDF_STATUS dp_tso_soc_attach(struct cdp_soc_t *txrx_soc);
  294. /**
  295. * dp_tso_detach() - TSO Detach handler
  296. * @txrx_soc: Opaque Dp handle
  297. *
  298. * Deallocate TSO descriptor buffers
  299. *
  300. * Return: QDF_STATUS_E_FAILURE on failure or
  301. * QDF_STATUS_SUCCESS on success
  302. */
  303. QDF_STATUS dp_tso_soc_detach(struct cdp_soc_t *txrx_soc);
  304. qdf_nbuf_t dp_tx_send(struct cdp_soc_t *soc, uint8_t vdev_id, qdf_nbuf_t nbuf);
  305. qdf_nbuf_t dp_tx_send_vdev_id_check(struct cdp_soc_t *soc, uint8_t vdev_id,
  306. qdf_nbuf_t nbuf);
  307. qdf_nbuf_t dp_tx_send_exception(struct cdp_soc_t *soc, uint8_t vdev_id,
  308. qdf_nbuf_t nbuf,
  309. struct cdp_tx_exception_metadata *tx_exc);
  310. qdf_nbuf_t dp_tx_send_exception_vdev_id_check(struct cdp_soc_t *soc,
  311. uint8_t vdev_id,
  312. qdf_nbuf_t nbuf,
  313. struct cdp_tx_exception_metadata *tx_exc);
  314. qdf_nbuf_t dp_tx_send_mesh(struct cdp_soc_t *soc, uint8_t vdev_id,
  315. qdf_nbuf_t nbuf);
  316. qdf_nbuf_t
  317. dp_tx_send_msdu_single(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  318. struct dp_tx_msdu_info_s *msdu_info, uint16_t peer_id,
  319. struct cdp_tx_exception_metadata *tx_exc_metadata);
  320. #if QDF_LOCK_STATS
  321. noinline qdf_nbuf_t
  322. dp_tx_send_msdu_multiple(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  323. struct dp_tx_msdu_info_s *msdu_info);
  324. #else
  325. qdf_nbuf_t dp_tx_send_msdu_multiple(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  326. struct dp_tx_msdu_info_s *msdu_info);
  327. #endif
  328. #ifdef FEATURE_WLAN_TDLS
  329. /**
  330. * dp_tx_non_std() - Allow the control-path SW to send data frames
  331. * @soc_hdl: Datapath soc handle
  332. * @vdev_id: id of vdev
  333. * @tx_spec: what non-standard handling to apply to the tx data frames
  334. * @msdu_list: NULL-terminated list of tx MSDUs
  335. *
  336. * Return: NULL on success,
  337. * nbuf when it fails to send
  338. */
  339. qdf_nbuf_t dp_tx_non_std(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  340. enum ol_tx_spec tx_spec, qdf_nbuf_t msdu_list);
  341. #endif
  342. int dp_tx_frame_is_drop(struct dp_vdev *vdev, uint8_t *srcmac, uint8_t *dstmac);
  343. /**
  344. * dp_tx_comp_handler() - Tx completion handler
  345. * @int_ctx: pointer to DP interrupt context
  346. * @soc: core txrx main context
  347. * @hal_srng: Opaque HAL SRNG pointer
  348. * @ring_id: completion ring id
  349. * @quota: No. of packets/descriptors that can be serviced in one loop
  350. *
  351. * This function will collect hardware release ring element contents and
  352. * handle descriptor contents. Based on contents, free packet or handle error
  353. * conditions
  354. *
  355. * Return: Number of TX completions processed
  356. */
  357. uint32_t dp_tx_comp_handler(struct dp_intr *int_ctx, struct dp_soc *soc,
  358. hal_ring_handle_t hal_srng, uint8_t ring_id,
  359. uint32_t quota);
  360. QDF_STATUS
  361. dp_tx_prepare_send_me(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  362. QDF_STATUS
  363. dp_tx_prepare_send_igmp_me(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  364. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  365. #if defined(QCA_HOST_MODE_WIFI_DISABLED) || !defined(ATH_SUPPORT_IQUE)
  366. static inline void dp_tx_me_exit(struct dp_pdev *pdev)
  367. {
  368. return;
  369. }
  370. #endif
  371. /**
  372. * dp_tx_pdev_init() - dp tx pdev init
  373. * @pdev: physical device instance
  374. *
  375. * Return: QDF_STATUS_SUCCESS: success
  376. * QDF_STATUS_E_RESOURCES: Error return
  377. */
  378. static inline QDF_STATUS dp_tx_pdev_init(struct dp_pdev *pdev)
  379. {
  380. struct dp_soc *soc = pdev->soc;
  381. /* Initialize Flow control counters */
  382. qdf_atomic_init(&pdev->num_tx_outstanding);
  383. pdev->tx_descs_max = 0;
  384. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  385. /* Initialize descriptors in TCL Ring */
  386. hal_tx_init_data_ring(soc->hal_soc,
  387. soc->tcl_data_ring[pdev->pdev_id].hal_srng);
  388. }
  389. return QDF_STATUS_SUCCESS;
  390. }
  391. /**
  392. * dp_tx_prefetch_hw_sw_nbuf_desc() - function to prefetch HW and SW desc
  393. * @soc: Handle to HAL Soc structure
  394. * @hal_soc: HAL SOC handle
  395. * @num_avail_for_reap: descriptors available for reap
  396. * @hal_ring_hdl: ring pointer
  397. * @last_prefetched_hw_desc: pointer to the last prefetched HW descriptor
  398. * @last_prefetched_sw_desc: pointer to last prefetch SW desc
  399. *
  400. * Return: None
  401. */
  402. #ifdef QCA_DP_TX_HW_SW_NBUF_DESC_PREFETCH
  403. static inline
  404. void dp_tx_prefetch_hw_sw_nbuf_desc(struct dp_soc *soc,
  405. hal_soc_handle_t hal_soc,
  406. uint32_t num_avail_for_reap,
  407. hal_ring_handle_t hal_ring_hdl,
  408. void **last_prefetched_hw_desc,
  409. struct dp_tx_desc_s
  410. **last_prefetched_sw_desc)
  411. {
  412. if (*last_prefetched_sw_desc) {
  413. qdf_prefetch((uint8_t *)(*last_prefetched_sw_desc)->nbuf);
  414. qdf_prefetch((uint8_t *)(*last_prefetched_sw_desc)->nbuf + 64);
  415. }
  416. if (num_avail_for_reap && *last_prefetched_hw_desc) {
  417. soc->arch_ops.tx_comp_get_params_from_hal_desc(soc,
  418. *last_prefetched_hw_desc,
  419. last_prefetched_sw_desc);
  420. if ((uintptr_t)*last_prefetched_hw_desc & 0x3f)
  421. *last_prefetched_hw_desc =
  422. hal_srng_dst_prefetch_next_cached_desc(
  423. hal_soc,
  424. hal_ring_hdl,
  425. (uint8_t *)*last_prefetched_hw_desc);
  426. else
  427. *last_prefetched_hw_desc =
  428. hal_srng_dst_get_next_32_byte_desc(hal_soc,
  429. hal_ring_hdl,
  430. (uint8_t *)*last_prefetched_hw_desc);
  431. }
  432. }
  433. #else
  434. static inline
  435. void dp_tx_prefetch_hw_sw_nbuf_desc(struct dp_soc *soc,
  436. hal_soc_handle_t hal_soc,
  437. uint32_t num_avail_for_reap,
  438. hal_ring_handle_t hal_ring_hdl,
  439. void **last_prefetched_hw_desc,
  440. struct dp_tx_desc_s
  441. **last_prefetched_sw_desc)
  442. {
  443. }
  444. #endif
  445. #ifndef FEATURE_WDS
  446. static inline void dp_tx_mec_handler(struct dp_vdev *vdev, uint8_t *status)
  447. {
  448. return;
  449. }
  450. #endif
  451. #ifndef QCA_MULTIPASS_SUPPORT
  452. static inline
  453. bool dp_tx_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  454. qdf_nbuf_t nbuf,
  455. struct dp_tx_msdu_info_s *msdu_info)
  456. {
  457. return true;
  458. }
  459. static inline
  460. void dp_tx_vdev_multipass_deinit(struct dp_vdev *vdev)
  461. {
  462. }
  463. #else
  464. bool dp_tx_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  465. qdf_nbuf_t nbuf,
  466. struct dp_tx_msdu_info_s *msdu_info);
  467. void dp_tx_vdev_multipass_deinit(struct dp_vdev *vdev);
  468. void dp_tx_remove_vlan_tag(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  469. void dp_tx_add_groupkey_metadata(struct dp_vdev *vdev,
  470. struct dp_tx_msdu_info_s *msdu_info,
  471. uint16_t group_key);
  472. #endif
  473. /**
  474. * dp_tx_hw_to_qdf()- convert hw status to qdf status
  475. * @status: hw status
  476. *
  477. * Return: qdf tx rx status
  478. */
  479. static inline enum qdf_dp_tx_rx_status dp_tx_hw_to_qdf(uint16_t status)
  480. {
  481. switch (status) {
  482. case HAL_TX_TQM_RR_FRAME_ACKED:
  483. return QDF_TX_RX_STATUS_OK;
  484. case HAL_TX_TQM_RR_REM_CMD_TX:
  485. return QDF_TX_RX_STATUS_NO_ACK;
  486. case HAL_TX_TQM_RR_REM_CMD_REM:
  487. case HAL_TX_TQM_RR_REM_CMD_NOTX:
  488. case HAL_TX_TQM_RR_REM_CMD_AGED:
  489. return QDF_TX_RX_STATUS_FW_DISCARD;
  490. default:
  491. return QDF_TX_RX_STATUS_DEFAULT;
  492. }
  493. }
  494. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  495. /**
  496. * dp_tx_get_queue() - Returns Tx queue IDs to be used for this Tx frame
  497. * @vdev: DP Virtual device handle
  498. * @nbuf: Buffer pointer
  499. * @queue: queue ids container for nbuf
  500. *
  501. * TX packet queue has 2 instances, software descriptors id and dma ring id
  502. * Based on tx feature and hardware configuration queue id combination could be
  503. * different.
  504. * For example -
  505. * With XPS enabled,all TX descriptor pools and dma ring are assigned per cpu id
  506. * With no XPS,lock based resource protection, Descriptor pool ids are different
  507. * for each vdev, dma ring id will be same as single pdev id
  508. *
  509. * Return: None
  510. */
  511. #ifdef QCA_OL_TX_MULTIQ_SUPPORT
  512. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  513. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  514. {
  515. queue->ring_id = qdf_get_cpu();
  516. queue->desc_pool_id = queue->ring_id;
  517. }
  518. /*
  519. * dp_tx_get_hal_ring_hdl()- Get the hal_tx_ring_hdl for data transmission
  520. * @dp_soc - DP soc structure pointer
  521. * @ring_id - Transmit Queue/ring_id to be used when XPS is enabled
  522. *
  523. * Return - HAL ring handle
  524. */
  525. static inline hal_ring_handle_t dp_tx_get_hal_ring_hdl(struct dp_soc *soc,
  526. uint8_t ring_id)
  527. {
  528. if (ring_id == soc->num_tcl_data_rings)
  529. return soc->tcl_cmd_credit_ring.hal_srng;
  530. return soc->tcl_data_ring[ring_id].hal_srng;
  531. }
  532. #else /* QCA_OL_TX_MULTIQ_SUPPORT */
  533. #ifdef TX_MULTI_TCL
  534. #ifdef IPA_OFFLOAD
  535. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  536. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  537. {
  538. /* get flow id */
  539. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  540. if (vdev->pdev->soc->wlan_cfg_ctx->ipa_enabled)
  541. queue->ring_id = DP_TX_GET_RING_ID(vdev);
  542. else
  543. queue->ring_id = (qdf_nbuf_get_queue_mapping(nbuf) %
  544. vdev->pdev->soc->num_tcl_data_rings);
  545. }
  546. #else
  547. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  548. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  549. {
  550. /* get flow id */
  551. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  552. queue->ring_id = (qdf_nbuf_get_queue_mapping(nbuf) %
  553. vdev->pdev->soc->num_tcl_data_rings);
  554. }
  555. #endif
  556. #else
  557. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  558. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  559. {
  560. /* get flow id */
  561. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  562. queue->ring_id = DP_TX_GET_RING_ID(vdev);
  563. }
  564. #endif
  565. static inline hal_ring_handle_t dp_tx_get_hal_ring_hdl(struct dp_soc *soc,
  566. uint8_t ring_id)
  567. {
  568. return soc->tcl_data_ring[ring_id].hal_srng;
  569. }
  570. #endif
  571. #ifdef QCA_OL_TX_LOCK_LESS_ACCESS
  572. /*
  573. * dp_tx_hal_ring_access_start()- hal_tx_ring access for data transmission
  574. * @dp_soc - DP soc structure pointer
  575. * @hal_ring_hdl - HAL ring handle
  576. *
  577. * Return - None
  578. */
  579. static inline int dp_tx_hal_ring_access_start(struct dp_soc *soc,
  580. hal_ring_handle_t hal_ring_hdl)
  581. {
  582. return hal_srng_access_start_unlocked(soc->hal_soc, hal_ring_hdl);
  583. }
  584. /*
  585. * dp_tx_hal_ring_access_end()- hal_tx_ring access for data transmission
  586. * @dp_soc - DP soc structure pointer
  587. * @hal_ring_hdl - HAL ring handle
  588. *
  589. * Return - None
  590. */
  591. static inline void dp_tx_hal_ring_access_end(struct dp_soc *soc,
  592. hal_ring_handle_t hal_ring_hdl)
  593. {
  594. hal_srng_access_end_unlocked(soc->hal_soc, hal_ring_hdl);
  595. }
  596. /*
  597. * dp_tx_hal_ring_access_reap()- hal_tx_ring access for data transmission
  598. * @dp_soc - DP soc structure pointer
  599. * @hal_ring_hdl - HAL ring handle
  600. *
  601. * Return - None
  602. */
  603. static inline void dp_tx_hal_ring_access_end_reap(struct dp_soc *soc,
  604. hal_ring_handle_t
  605. hal_ring_hdl)
  606. {
  607. }
  608. #else
  609. static inline int dp_tx_hal_ring_access_start(struct dp_soc *soc,
  610. hal_ring_handle_t hal_ring_hdl)
  611. {
  612. return hal_srng_access_start(soc->hal_soc, hal_ring_hdl);
  613. }
  614. static inline void dp_tx_hal_ring_access_end(struct dp_soc *soc,
  615. hal_ring_handle_t hal_ring_hdl)
  616. {
  617. hal_srng_access_end(soc->hal_soc, hal_ring_hdl);
  618. }
  619. static inline void dp_tx_hal_ring_access_end_reap(struct dp_soc *soc,
  620. hal_ring_handle_t
  621. hal_ring_hdl)
  622. {
  623. hal_srng_access_end_reap(soc->hal_soc, hal_ring_hdl);
  624. }
  625. #endif
  626. #ifdef ATH_TX_PRI_OVERRIDE
  627. #define DP_TX_TID_OVERRIDE(_msdu_info, _nbuf) \
  628. ((_msdu_info)->tid = qdf_nbuf_get_priority(_nbuf))
  629. #else
  630. #define DP_TX_TID_OVERRIDE(_msdu_info, _nbuf)
  631. #endif
  632. /* TODO TX_FEATURE_NOT_YET */
  633. static inline void dp_tx_comp_process_exception(struct dp_tx_desc_s *tx_desc)
  634. {
  635. return;
  636. }
  637. /* TODO TX_FEATURE_NOT_YET */
  638. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  639. bool force_free);
  640. QDF_STATUS dp_tx_vdev_attach(struct dp_vdev *vdev);
  641. QDF_STATUS dp_tx_vdev_detach(struct dp_vdev *vdev);
  642. void dp_tx_vdev_update_search_flags(struct dp_vdev *vdev);
  643. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc);
  644. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc);
  645. void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc);
  646. void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc);
  647. void
  648. dp_handle_wbm_internal_error(struct dp_soc *soc, void *hal_desc,
  649. uint32_t buf_type);
  650. #else /* QCA_HOST_MODE_WIFI_DISABLED */
  651. static inline
  652. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc)
  653. {
  654. return QDF_STATUS_SUCCESS;
  655. }
  656. static inline
  657. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc)
  658. {
  659. return QDF_STATUS_SUCCESS;
  660. }
  661. static inline void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc)
  662. {
  663. }
  664. static inline void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc)
  665. {
  666. }
  667. static inline
  668. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  669. bool force_free)
  670. {
  671. }
  672. static inline QDF_STATUS dp_tx_vdev_attach(struct dp_vdev *vdev)
  673. {
  674. return QDF_STATUS_SUCCESS;
  675. }
  676. static inline QDF_STATUS dp_tx_vdev_detach(struct dp_vdev *vdev)
  677. {
  678. return QDF_STATUS_SUCCESS;
  679. }
  680. static inline void dp_tx_vdev_update_search_flags(struct dp_vdev *vdev)
  681. {
  682. }
  683. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  684. #if defined(QCA_SUPPORT_LATENCY_CAPTURE) || \
  685. defined(QCA_TX_CAPTURE_SUPPORT) || \
  686. defined(QCA_MCOPY_SUPPORT)
  687. #ifdef FEATURE_PERPKT_INFO
  688. QDF_STATUS
  689. dp_get_completion_indication_for_stack(struct dp_soc *soc,
  690. struct dp_pdev *pdev,
  691. struct dp_txrx_peer *peer,
  692. struct hal_tx_completion_status *ts,
  693. qdf_nbuf_t netbuf,
  694. uint64_t time_latency);
  695. void dp_send_completion_to_stack(struct dp_soc *soc, struct dp_pdev *pdev,
  696. uint16_t peer_id, uint32_t ppdu_id,
  697. qdf_nbuf_t netbuf);
  698. #endif
  699. #else
  700. static inline
  701. QDF_STATUS dp_get_completion_indication_for_stack(struct dp_soc *soc,
  702. struct dp_pdev *pdev,
  703. struct dp_txrx_peer *peer,
  704. struct hal_tx_completion_status *ts,
  705. qdf_nbuf_t netbuf,
  706. uint64_t time_latency)
  707. {
  708. return QDF_STATUS_E_NOSUPPORT;
  709. }
  710. static inline
  711. void dp_send_completion_to_stack(struct dp_soc *soc, struct dp_pdev *pdev,
  712. uint16_t peer_id, uint32_t ppdu_id,
  713. qdf_nbuf_t netbuf)
  714. {
  715. }
  716. #endif
  717. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  718. void dp_send_completion_to_pkt_capture(struct dp_soc *soc,
  719. struct dp_tx_desc_s *desc,
  720. struct hal_tx_completion_status *ts);
  721. #else
  722. static inline void
  723. dp_send_completion_to_pkt_capture(struct dp_soc *soc,
  724. struct dp_tx_desc_s *desc,
  725. struct hal_tx_completion_status *ts)
  726. {
  727. }
  728. #endif
  729. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  730. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  731. /**
  732. * dp_tx_update_stats() - Update soc level tx stats
  733. * @soc: DP soc handle
  734. * @tx_desc: TX descriptor reference
  735. * @ring_id: TCL ring id
  736. *
  737. * Returns: none
  738. */
  739. void dp_tx_update_stats(struct dp_soc *soc,
  740. struct dp_tx_desc_s *tx_desc,
  741. uint8_t ring_id);
  742. /**
  743. * dp_tx_attempt_coalescing() - Check and attempt TCL register write coalescing
  744. * @soc: Datapath soc handle
  745. * @tx_desc: tx packet descriptor
  746. * @tid: TID for pkt transmission
  747. * @msdu_info: MSDU info of tx packet
  748. * @ring_id: TCL ring id
  749. *
  750. * Returns: 1, if coalescing is to be done
  751. * 0, if coalescing is not to be done
  752. */
  753. int
  754. dp_tx_attempt_coalescing(struct dp_soc *soc, struct dp_vdev *vdev,
  755. struct dp_tx_desc_s *tx_desc,
  756. uint8_t tid,
  757. struct dp_tx_msdu_info_s *msdu_info,
  758. uint8_t ring_id);
  759. /**
  760. * dp_tx_ring_access_end() - HAL ring access end for data transmission
  761. * @soc: Datapath soc handle
  762. * @hal_ring_hdl: HAL ring handle
  763. * @coalesce: Coalesce the current write or not
  764. *
  765. * Returns: none
  766. */
  767. void
  768. dp_tx_ring_access_end(struct dp_soc *soc, hal_ring_handle_t hal_ring_hdl,
  769. int coalesce);
  770. #else
  771. /**
  772. * dp_tx_update_stats() - Update soc level tx stats
  773. * @soc: DP soc handle
  774. * @tx_desc: TX descriptor reference
  775. * @ring_id: TCL ring id
  776. *
  777. * Returns: none
  778. */
  779. static inline void dp_tx_update_stats(struct dp_soc *soc,
  780. struct dp_tx_desc_s *tx_desc,
  781. uint8_t ring_id){ }
  782. static inline void
  783. dp_tx_ring_access_end(struct dp_soc *soc, hal_ring_handle_t hal_ring_hdl,
  784. int coalesce)
  785. {
  786. dp_tx_hal_ring_access_end(soc, hal_ring_hdl);
  787. }
  788. static inline int
  789. dp_tx_attempt_coalescing(struct dp_soc *soc, struct dp_vdev *vdev,
  790. struct dp_tx_desc_s *tx_desc,
  791. uint8_t tid,
  792. struct dp_tx_msdu_info_s *msdu_info,
  793. uint8_t ring_id)
  794. {
  795. return 0;
  796. }
  797. #endif /* WLAN_DP_FEATURE_SW_LATENCY_MGR */
  798. #ifdef FEATURE_RUNTIME_PM
  799. /**
  800. * dp_set_rtpm_tput_policy_requirement() - Update RTPM throughput policy
  801. * @soc_hdl: DP soc handle
  802. * @is_high_tput: flag to indicate whether throughput is high
  803. *
  804. * Returns: none
  805. */
  806. static inline
  807. void dp_set_rtpm_tput_policy_requirement(struct cdp_soc_t *soc_hdl,
  808. bool is_high_tput)
  809. {
  810. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  811. qdf_atomic_set(&soc->rtpm_high_tput_flag, is_high_tput);
  812. }
  813. void
  814. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  815. hal_ring_handle_t hal_ring_hdl,
  816. int coalesce);
  817. #else
  818. #ifdef DP_POWER_SAVE
  819. void
  820. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  821. hal_ring_handle_t hal_ring_hdl,
  822. int coalesce);
  823. #else
  824. static inline void
  825. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  826. hal_ring_handle_t hal_ring_hdl,
  827. int coalesce)
  828. {
  829. dp_tx_ring_access_end(soc, hal_ring_hdl, coalesce);
  830. }
  831. #endif
  832. static inline void
  833. dp_set_rtpm_tput_policy_requirement(struct cdp_soc_t *soc_hdl,
  834. bool is_high_tput)
  835. { }
  836. #endif
  837. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  838. #ifdef DP_TX_HW_DESC_HISTORY
  839. static inline void
  840. dp_tx_hw_desc_update_evt(uint8_t *hal_tx_desc_cached,
  841. hal_ring_handle_t hal_ring_hdl,
  842. struct dp_soc *soc, uint8_t ring_id)
  843. {
  844. struct dp_tx_hw_desc_history *tx_hw_desc_history =
  845. &soc->tx_hw_desc_history;
  846. struct dp_tx_hw_desc_evt *evt;
  847. uint32_t idx = 0;
  848. uint16_t slot = 0;
  849. if (!tx_hw_desc_history->allocated)
  850. return;
  851. dp_get_frag_hist_next_atomic_idx(&tx_hw_desc_history->index, &idx,
  852. &slot,
  853. DP_TX_HW_DESC_HIST_SLOT_SHIFT,
  854. DP_TX_HW_DESC_HIST_PER_SLOT_MAX,
  855. DP_TX_HW_DESC_HIST_MAX);
  856. evt = &tx_hw_desc_history->entry[slot][idx];
  857. qdf_mem_copy(evt->tcl_desc, hal_tx_desc_cached, HAL_TX_DESC_LEN_BYTES);
  858. evt->posted = qdf_get_log_timestamp();
  859. evt->tcl_ring_id = ring_id;
  860. hal_get_sw_hptp(soc->hal_soc, hal_ring_hdl, &evt->tp, &evt->hp);
  861. }
  862. #else
  863. static inline void
  864. dp_tx_hw_desc_update_evt(uint8_t *hal_tx_desc_cached,
  865. hal_ring_handle_t hal_ring_hdl,
  866. struct dp_soc *soc, uint8_t ring_id)
  867. {
  868. }
  869. #endif
  870. #if defined(WLAN_FEATURE_TSF_UPLINK_DELAY) || defined(WLAN_CONFIG_TX_DELAY)
  871. /**
  872. * dp_tx_compute_hw_delay_us() - Compute hardware Tx completion delay
  873. * @ts: Tx completion status
  874. * @delta_tsf: Difference between TSF clock and qtimer
  875. * @delay_us: Delay in microseconds
  876. *
  877. * Return: QDF_STATUS_SUCCESS : Success
  878. * QDF_STATUS_E_INVAL : Tx completion status is invalid or
  879. * delay_us is NULL
  880. * QDF_STATUS_E_FAILURE : Error in delay calculation
  881. */
  882. QDF_STATUS
  883. dp_tx_compute_hw_delay_us(struct hal_tx_completion_status *ts,
  884. uint32_t delta_tsf,
  885. uint32_t *delay_us);
  886. /**
  887. * dp_set_delta_tsf() - Set delta_tsf to dp_soc structure
  888. * @soc_hdl: cdp soc pointer
  889. * @vdev_id: vdev id
  890. * @delta_tsf: difference between TSF clock and qtimer
  891. *
  892. * Return: None
  893. */
  894. void dp_set_delta_tsf(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  895. uint32_t delta_tsf);
  896. #endif
  897. #ifdef WLAN_FEATURE_TSF_UPLINK_DELAY
  898. /**
  899. * dp_set_tsf_report_ul_delay() - Enable or disable reporting uplink delay
  900. * @soc_hdl: cdp soc pointer
  901. * @vdev_id: vdev id
  902. * @enable: true to enable and false to disable
  903. *
  904. * Return: QDF_STATUS
  905. */
  906. QDF_STATUS dp_set_tsf_ul_delay_report(struct cdp_soc_t *soc_hdl,
  907. uint8_t vdev_id, bool enable);
  908. /**
  909. * dp_get_uplink_delay() - Get uplink delay value
  910. * @soc_hdl: cdp soc pointer
  911. * @vdev_id: vdev id
  912. * @val: pointer to save uplink delay value
  913. *
  914. * Return: QDF_STATUS
  915. */
  916. QDF_STATUS dp_get_uplink_delay(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  917. uint32_t *val);
  918. #endif /* WLAN_FEATURE_TSF_UPLINK_TSF */
  919. /**
  920. * dp_tx_pkt_tracepoints_enabled() - Get the state of tx pkt tracepoint
  921. *
  922. * Return: True if any tx pkt tracepoint is enabled else false
  923. */
  924. static inline
  925. bool dp_tx_pkt_tracepoints_enabled(void)
  926. {
  927. return (qdf_trace_dp_tx_comp_tcp_pkt_enabled() ||
  928. qdf_trace_dp_tx_comp_udp_pkt_enabled() ||
  929. qdf_trace_dp_tx_comp_pkt_enabled());
  930. }
  931. #ifdef DP_TX_TRACKING
  932. /**
  933. * dp_tx_desc_set_timestamp() - set timestamp in tx descriptor
  934. * @tx_desc - tx descriptor
  935. *
  936. * Return: None
  937. */
  938. static inline
  939. void dp_tx_desc_set_timestamp(struct dp_tx_desc_s *tx_desc)
  940. {
  941. tx_desc->timestamp_tick = qdf_system_ticks();
  942. }
  943. /**
  944. * dp_tx_desc_check_corruption() - Verify magic pattern in tx descriptor
  945. * @tx_desc: tx descriptor
  946. *
  947. * Check for corruption in tx descriptor, if magic pattern is not matching
  948. * trigger self recovery
  949. *
  950. * Return: none
  951. */
  952. void dp_tx_desc_check_corruption(struct dp_tx_desc_s *tx_desc);
  953. #else
  954. static inline
  955. void dp_tx_desc_set_timestamp(struct dp_tx_desc_s *tx_desc)
  956. {
  957. }
  958. static inline
  959. void dp_tx_desc_check_corruption(struct dp_tx_desc_s *tx_desc)
  960. {
  961. }
  962. #endif
  963. #ifndef CONFIG_SAWF
  964. static inline bool dp_sawf_tag_valid_get(qdf_nbuf_t nbuf)
  965. {
  966. return false;
  967. }
  968. #endif
  969. #ifdef HW_TX_DELAY_STATS_ENABLE
  970. /**
  971. * dp_tx_desc_set_ktimestamp() - set kernel timestamp in tx descriptor
  972. * @vdev: DP vdev handle
  973. * @tx_desc: tx descriptor
  974. *
  975. * Return: true when descriptor is timestamped, false otherwise
  976. */
  977. static inline
  978. bool dp_tx_desc_set_ktimestamp(struct dp_vdev *vdev,
  979. struct dp_tx_desc_s *tx_desc)
  980. {
  981. if (qdf_unlikely(vdev->pdev->delay_stats_flag) ||
  982. qdf_unlikely(vdev->pdev->soc->wlan_cfg_ctx->pext_stats_enabled) ||
  983. qdf_unlikely(dp_tx_pkt_tracepoints_enabled()) ||
  984. qdf_unlikely(vdev->pdev->soc->peerstats_enabled) ||
  985. qdf_unlikely(dp_is_vdev_tx_delay_stats_enabled(vdev))) {
  986. tx_desc->timestamp = qdf_ktime_real_get();
  987. return true;
  988. }
  989. return false;
  990. }
  991. #else
  992. static inline
  993. bool dp_tx_desc_set_ktimestamp(struct dp_vdev *vdev,
  994. struct dp_tx_desc_s *tx_desc)
  995. {
  996. if (qdf_unlikely(vdev->pdev->delay_stats_flag) ||
  997. qdf_unlikely(vdev->pdev->soc->wlan_cfg_ctx->pext_stats_enabled) ||
  998. qdf_unlikely(dp_tx_pkt_tracepoints_enabled()) ||
  999. qdf_unlikely(vdev->pdev->soc->peerstats_enabled)) {
  1000. tx_desc->timestamp = qdf_ktime_real_get();
  1001. return true;
  1002. }
  1003. return false;
  1004. }
  1005. #endif
  1006. #ifdef CONFIG_DP_PKT_ADD_TIMESTAMP
  1007. /**
  1008. * dp_pkt_add_timestamp() - add timestamp in data payload
  1009. *
  1010. * @vdev: dp vdev
  1011. * @index: index to decide offset in payload
  1012. * @time: timestamp to add in data payload
  1013. * @nbuf: network buffer
  1014. *
  1015. * Return: none
  1016. */
  1017. void dp_pkt_add_timestamp(struct dp_vdev *vdev,
  1018. enum qdf_pkt_timestamp_index index, uint64_t time,
  1019. qdf_nbuf_t nbuf);
  1020. /**
  1021. * dp_pkt_get_timestamp() - get current system time
  1022. *
  1023. * @time: return current system time
  1024. *
  1025. * Return: none
  1026. */
  1027. void dp_pkt_get_timestamp(uint64_t *time);
  1028. #else
  1029. #define dp_pkt_add_timestamp(vdev, index, time, nbuf)
  1030. static inline
  1031. void dp_pkt_get_timestamp(uint64_t *time)
  1032. {
  1033. }
  1034. #endif
  1035. #ifdef CONFIG_WLAN_SYSFS_MEM_STATS
  1036. /**
  1037. * dp_update_tx_desc_stats - Update the increase or decrease in
  1038. * outstanding tx desc count
  1039. * values on pdev and soc
  1040. * @vdev: DP pdev handle
  1041. *
  1042. * Return: void
  1043. */
  1044. static inline void
  1045. dp_update_tx_desc_stats(struct dp_pdev *pdev)
  1046. {
  1047. int32_t tx_descs_cnt =
  1048. qdf_atomic_read(&pdev->num_tx_outstanding);
  1049. if (pdev->tx_descs_max < tx_descs_cnt)
  1050. pdev->tx_descs_max = tx_descs_cnt;
  1051. qdf_mem_tx_desc_cnt_update(pdev->num_tx_outstanding,
  1052. pdev->tx_descs_max);
  1053. }
  1054. #else /* CONFIG_WLAN_SYSFS_MEM_STATS */
  1055. static inline void
  1056. dp_update_tx_desc_stats(struct dp_pdev *pdev)
  1057. {
  1058. }
  1059. #endif /* CONFIG_WLAN_SYSFS_MEM_STATS */
  1060. #ifdef QCA_TX_LIMIT_CHECK
  1061. /**
  1062. * dp_tx_limit_check - Check if allocated tx descriptors reached
  1063. * soc max limit and pdev max limit
  1064. * @vdev: DP vdev handle
  1065. *
  1066. * Return: true if allocated tx descriptors reached max configured value, else
  1067. * false
  1068. */
  1069. static inline bool
  1070. dp_tx_limit_check(struct dp_vdev *vdev)
  1071. {
  1072. struct dp_pdev *pdev = vdev->pdev;
  1073. struct dp_soc *soc = pdev->soc;
  1074. if (qdf_atomic_read(&soc->num_tx_outstanding) >=
  1075. soc->num_tx_allowed) {
  1076. dp_tx_info("queued packets are more than max tx, drop the frame");
  1077. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  1078. return true;
  1079. }
  1080. if (qdf_atomic_read(&pdev->num_tx_outstanding) >=
  1081. pdev->num_tx_allowed) {
  1082. dp_tx_info("queued packets are more than max tx, drop the frame");
  1083. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  1084. DP_STATS_INC(vdev, tx_i.dropped.desc_na_exc_outstand.num, 1);
  1085. return true;
  1086. }
  1087. return false;
  1088. }
  1089. /**
  1090. * dp_tx_exception_limit_check - Check if allocated tx exception descriptors
  1091. * reached soc max limit
  1092. * @vdev: DP vdev handle
  1093. *
  1094. * Return: true if allocated tx descriptors reached max configured value, else
  1095. * false
  1096. */
  1097. static inline bool
  1098. dp_tx_exception_limit_check(struct dp_vdev *vdev)
  1099. {
  1100. struct dp_pdev *pdev = vdev->pdev;
  1101. struct dp_soc *soc = pdev->soc;
  1102. if (qdf_atomic_read(&soc->num_tx_exception) >=
  1103. soc->num_msdu_exception_desc) {
  1104. dp_info("exc packets are more than max drop the exc pkt");
  1105. DP_STATS_INC(vdev, tx_i.dropped.exc_desc_na.num, 1);
  1106. return true;
  1107. }
  1108. return false;
  1109. }
  1110. /**
  1111. * dp_tx_outstanding_inc - Increment outstanding tx desc values on pdev and soc
  1112. * @vdev: DP pdev handle
  1113. *
  1114. * Return: void
  1115. */
  1116. static inline void
  1117. dp_tx_outstanding_inc(struct dp_pdev *pdev)
  1118. {
  1119. struct dp_soc *soc = pdev->soc;
  1120. qdf_atomic_inc(&pdev->num_tx_outstanding);
  1121. qdf_atomic_inc(&soc->num_tx_outstanding);
  1122. dp_update_tx_desc_stats(pdev);
  1123. }
  1124. /**
  1125. * dp_tx_outstanding__dec - Decrement outstanding tx desc values on pdev and soc
  1126. * @vdev: DP pdev handle
  1127. *
  1128. * Return: void
  1129. */
  1130. static inline void
  1131. dp_tx_outstanding_dec(struct dp_pdev *pdev)
  1132. {
  1133. struct dp_soc *soc = pdev->soc;
  1134. qdf_atomic_dec(&pdev->num_tx_outstanding);
  1135. qdf_atomic_dec(&soc->num_tx_outstanding);
  1136. dp_update_tx_desc_stats(pdev);
  1137. }
  1138. #else //QCA_TX_LIMIT_CHECK
  1139. static inline bool
  1140. dp_tx_limit_check(struct dp_vdev *vdev)
  1141. {
  1142. return false;
  1143. }
  1144. static inline bool
  1145. dp_tx_exception_limit_check(struct dp_vdev *vdev)
  1146. {
  1147. return false;
  1148. }
  1149. static inline void
  1150. dp_tx_outstanding_inc(struct dp_pdev *pdev)
  1151. {
  1152. qdf_atomic_inc(&pdev->num_tx_outstanding);
  1153. dp_update_tx_desc_stats(pdev);
  1154. }
  1155. static inline void
  1156. dp_tx_outstanding_dec(struct dp_pdev *pdev)
  1157. {
  1158. qdf_atomic_dec(&pdev->num_tx_outstanding);
  1159. dp_update_tx_desc_stats(pdev);
  1160. }
  1161. #endif //QCA_TX_LIMIT_CHECK
  1162. #endif