wma.h 73 KB

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  1. /*
  2. * Copyright (c) 2013-2016 The Linux Foundation. All rights reserved.
  3. *
  4. * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
  5. *
  6. *
  7. * Permission to use, copy, modify, and/or distribute this software for
  8. * any purpose with or without fee is hereby granted, provided that the
  9. * above copyright notice and this permission notice appear in all
  10. * copies.
  11. *
  12. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  13. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  14. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  15. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  16. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  17. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  18. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  19. * PERFORMANCE OF THIS SOFTWARE.
  20. */
  21. /*
  22. * This file was originally distributed by Qualcomm Atheros, Inc.
  23. * under proprietary terms before Copyright ownership was assigned
  24. * to the Linux Foundation.
  25. */
  26. #ifndef WMA_H
  27. #define WMA_H
  28. #include "a_types.h"
  29. #include "qdf_types.h"
  30. #include "osapi_linux.h"
  31. #include "htc_packet.h"
  32. #include "i_qdf_event.h"
  33. #include "wmi_services.h"
  34. #include "wmi_unified.h"
  35. #include "wmi_version.h"
  36. #include "qdf_types.h"
  37. #include "cfg_api.h"
  38. #include "qdf_status.h"
  39. #include "cds_sched.h"
  40. #include "sir_mac_prot_def.h"
  41. #include "wma_types.h"
  42. #include "ol_txrx_types.h"
  43. #include <linux/workqueue.h>
  44. #include "utils_api.h"
  45. #include "lim_types.h"
  46. #include "wmi_unified_api.h"
  47. #include "cdp_txrx_cmn.h"
  48. #include "ol_defines.h"
  49. #include "dbglog.h"
  50. /* Platform specific configuration for max. no. of fragments */
  51. #define QCA_OL_11AC_TX_MAX_FRAGS 2
  52. /* Private */
  53. #define WMA_READY_EVENTID_TIMEOUT 6000
  54. #define WMA_SERVICE_READY_EXT_TIMEOUT 6000
  55. #define WMA_TGT_SUSPEND_COMPLETE_TIMEOUT 6000
  56. #define WMA_WAKE_LOCK_TIMEOUT 1000
  57. #define WMA_RESUME_TIMEOUT 6000
  58. #define MAX_MEM_CHUNKS 32
  59. #define WMA_CRASH_INJECT_TIMEOUT 5000
  60. /* MAC ID to PDEV ID mapping is as given below
  61. * MAC_ID PDEV_ID
  62. * 0 1
  63. * 1 2
  64. * SOC Level WMI_PDEV_ID_SOC
  65. */
  66. #define WMA_MAC_TO_PDEV_MAP(x) ((x) + (1))
  67. #define WMA_PDEV_TO_MAC_MAP(x) ((x) - (1))
  68. /* In prima 12 HW stations are supported including BCAST STA(staId 0)
  69. * and SELF STA(staId 1) so total ASSOC stations which can connect to Prima
  70. * SoftAP = 12 - 1(Self STa) - 1(Bcast Sta) = 10 Stations.
  71. */
  72. #ifdef WLAN_SOFTAP_VSTA_FEATURE
  73. #define WMA_MAX_SUPPORTED_STAS 38
  74. #else
  75. #define WMA_MAX_SUPPORTED_STAS 12
  76. #endif
  77. #define WMA_MAX_SUPPORTED_BSS 5
  78. #define FRAGMENT_SIZE 3072
  79. #define WMA_INVALID_VDEV_ID 0xFF
  80. #define MAX_MEM_CHUNKS 32
  81. #define WMA_MAX_VDEV_SIZE 20
  82. #define WMA_VDEV_TBL_ENTRY_ADD 1
  83. #define WMA_VDEV_TBL_ENTRY_DEL 0
  84. /* 11A/G channel boundary */
  85. #define WMA_11A_CHANNEL_BEGIN 34
  86. #define WMA_11A_CHANNEL_END 165
  87. #define WMA_11G_CHANNEL_BEGIN 1
  88. #define WMA_11G_CHANNEL_END 14
  89. #define WMA_11P_CHANNEL_BEGIN (170)
  90. #define WMA_11P_CHANNEL_END (184)
  91. #define WMA_LOGD(args ...) \
  92. QDF_TRACE(QDF_MODULE_ID_WMA, QDF_TRACE_LEVEL_DEBUG, ## args)
  93. #define WMA_LOGI(args ...) \
  94. QDF_TRACE(QDF_MODULE_ID_WMA, QDF_TRACE_LEVEL_INFO, ## args)
  95. #define WMA_LOGW(args ...) \
  96. QDF_TRACE(QDF_MODULE_ID_WMA, QDF_TRACE_LEVEL_WARN, ## args)
  97. #define WMA_LOGE(args ...) \
  98. QDF_TRACE(QDF_MODULE_ID_WMA, QDF_TRACE_LEVEL_ERROR, ## args)
  99. #define WMA_LOGP(args ...) \
  100. QDF_TRACE(QDF_MODULE_ID_WMA, QDF_TRACE_LEVEL_FATAL, ## args)
  101. #define WMA_DEBUG_ALWAYS
  102. #ifdef WMA_DEBUG_ALWAYS
  103. #define WMA_LOGA(args ...) \
  104. QDF_TRACE(QDF_MODULE_ID_WMA, QDF_TRACE_LEVEL_FATAL, ## args)
  105. #else
  106. #define WMA_LOGA(args ...)
  107. #endif
  108. #define ALIGNED_WORD_SIZE 4
  109. #define WLAN_HAL_MSG_TYPE_MAX_ENUM_SIZE 0x7FFF
  110. #define WMA_WILDCARD_PDEV_ID 0x0
  111. /* Prefix used by scan req ids generated on the host */
  112. #define WMA_HOST_SCAN_REQID_PREFIX 0xA000
  113. /* Prefix used by roam scan req ids generated on the host */
  114. #define WMA_HOST_ROAM_SCAN_REQID_PREFIX 0xA800
  115. /* Prefix used by scan requestor id on host */
  116. #define WMA_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
  117. #define WMA_HW_DEF_SCAN_MAX_DURATION 30000 /* 30 secs */
  118. /* Max offchannel duration */
  119. #define WMA_BURST_SCAN_MAX_NUM_OFFCHANNELS (3)
  120. #define WMA_SCAN_NPROBES_DEFAULT (2)
  121. #define WMA_SCAN_IDLE_TIME_DEFAULT (25)
  122. #define WMA_P2P_SCAN_MAX_BURST_DURATION (180)
  123. #define WMA_CTS_DURATION_MS_MAX (32)
  124. #define WMA_GO_MIN_ACTIVE_SCAN_BURST_DURATION (40)
  125. #define WMA_GO_MAX_ACTIVE_SCAN_BURST_DURATION (120)
  126. #define WMA_DWELL_TIME_PASSIVE_DEFAULT (110)
  127. #define WMA_DWELL_TIME_PROBE_TIME_MAP_SIZE (11)
  128. #define WMA_3PORT_CONC_SCAN_MAX_BURST_DURATION (25)
  129. #define WMA_SEC_TO_USEC (1000000)
  130. #define BEACON_TX_BUFFER_SIZE (512)
  131. /* WMA_ETHER_TYPE_OFFSET = sa(6) + da(6) */
  132. #define WMA_ETHER_TYPE_OFFSET (6 + 6)
  133. /* WMA_ICMP_V6_HEADER_OFFSET = sa(6) + da(6) + eth_type(2) + icmp_v6_hdr(6)*/
  134. #define WMA_ICMP_V6_HEADER_OFFSET (6 + 6 + 2 + 6)
  135. /* WMA_ICMP_V6_TYPE_OFFSET = sa(6) + da(6) + eth_type(2) + 40 */
  136. #define WMA_ICMP_V6_TYPE_OFFSET (6 + 6 + 2 + 40)
  137. /* WMA_IPV4_PROTOCOL = sa(6) + da(6) + eth_type(2) + 9 */
  138. #define WMA_IPV4_PROTOCOL (6 + 6 + 2 + 9)
  139. #define WMA_ICMP_V6_HEADER_TYPE (0x3A)
  140. #define WMA_ICMP_V6_RA_TYPE (0x86)
  141. #define WMA_ICMP_V6_NS_TYPE (0x87)
  142. #define WMA_ICMP_V6_NA_TYPE (0x88)
  143. #define WMA_BCAST_MAC_ADDR (0xFF)
  144. #define WMA_MCAST_IPV4_MAC_ADDR (0x01)
  145. #define WMA_MCAST_IPV6_MAC_ADDR (0x33)
  146. #define WMA_ICMP_PROTOCOL (0x01)
  147. #define WMA_IS_EAPOL_GET_MIN_LEN 14
  148. #define WMA_EAPOL_SUBTYPE_GET_MIN_LEN 21
  149. #define WMA_EAPOL_INFO_GET_MIN_LEN 23
  150. #define WMA_IS_DHCP_GET_MIN_LEN 38
  151. #define WMA_DHCP_SUBTYPE_GET_MIN_LEN 0x11D
  152. #define WMA_DHCP_INFO_GET_MIN_LEN 50
  153. #define WMA_IS_ARP_GET_MIN_LEN 14
  154. #define WMA_ARP_SUBTYPE_GET_MIN_LEN 22
  155. #define WMA_IPV4_PROTO_GET_MIN_LEN 24
  156. #define WMA_IPV4_PKT_INFO_GET_MIN_LEN 42
  157. #define WMA_ICMP_SUBTYPE_GET_MIN_LEN 35
  158. #define WMA_IPV6_PROTO_GET_MIN_LEN 21
  159. #define WMA_IPV6_PKT_INFO_GET_MIN_LEN 62
  160. #define WMA_ICMPV6_SUBTYPE_GET_MIN_LEN 55
  161. /**
  162. * ds_mode: distribution system mode
  163. * @IEEE80211_NO_DS: NO DS at either side
  164. * @IEEE80211_TO_DS: DS at receiver side
  165. * @IEEE80211_FROM_DS: DS at sender side
  166. * @IEEE80211_DS_TO_DS: DS at both sender and revceiver side
  167. */
  168. enum ds_mode {
  169. IEEE80211_NO_DS,
  170. IEEE80211_TO_DS,
  171. IEEE80211_FROM_DS,
  172. IEEE80211_DS_TO_DS
  173. };
  174. /* Roaming default values
  175. * All time and period values are in milliseconds.
  176. * All rssi values are in dB except for WMA_NOISE_FLOOR_DBM_DEFAULT.
  177. */
  178. #define WMA_ROAM_SCAN_CHANNEL_SWITCH_TIME (4)
  179. #define WMA_NOISE_FLOOR_DBM_DEFAULT (-96)
  180. #define WMA_ROAM_RSSI_DIFF_DEFAULT (5)
  181. #define WMA_ROAM_DWELL_TIME_ACTIVE_DEFAULT (100)
  182. #define WMA_ROAM_DWELL_TIME_PASSIVE_DEFAULT (110)
  183. #define WMA_ROAM_MIN_REST_TIME_DEFAULT (50)
  184. #define WMA_ROAM_MAX_REST_TIME_DEFAULT (500)
  185. #define WMA_ROAM_LOW_RSSI_TRIGGER_DEFAULT (20)
  186. #define WMA_ROAM_LOW_RSSI_TRIGGER_VERYLOW (10)
  187. #define WMA_ROAM_BEACON_WEIGHT_DEFAULT (14)
  188. #define WMA_ROAM_OPP_SCAN_PERIOD_DEFAULT (120000)
  189. #define WMA_ROAM_OPP_SCAN_AGING_PERIOD_DEFAULT (WMA_ROAM_OPP_SCAN_PERIOD_DEFAULT * 5)
  190. #define WMA_ROAM_BMISS_FIRST_BCNT_DEFAULT (10)
  191. #define WMA_ROAM_BMISS_FINAL_BCNT_DEFAULT (10)
  192. #define WMA_ROAM_BMISS_FIRST_BCNT_DEFAULT_P2P (15)
  193. #define WMA_ROAM_BMISS_FINAL_BCNT_DEFAULT_P2P (45)
  194. #define WMA_INVALID_KEY_IDX 0xff
  195. #define WMA_DFS_RADAR_FOUND 1
  196. #define WMA_MAX_RF_CHAINS(x) ((1 << x) - 1)
  197. #define WMA_MIN_RF_CHAINS (1)
  198. #ifdef FEATURE_WLAN_EXTSCAN
  199. #define WMA_MAX_EXTSCAN_MSG_SIZE 1536
  200. #define WMA_EXTSCAN_REST_TIME 100
  201. #define WMA_EXTSCAN_MAX_SCAN_TIME 50000
  202. #define WMA_EXTSCAN_BURST_DURATION 150
  203. #endif
  204. #define WMA_BCN_BUF_MAX_SIZE 2500
  205. #define WMA_NOA_IE_SIZE(num_desc) (2 + (13 * (num_desc)))
  206. #define WMA_MAX_NOA_DESCRIPTORS 4
  207. #define WMA_TIM_SUPPORTED_PVB_LENGTH ((HAL_NUM_STA / 8) + 1)
  208. #define WMA_WOW_PTRN_MASK_VALID 0xFF
  209. #define WMA_NUM_BITS_IN_BYTE 8
  210. #define WMA_AP_WOW_DEFAULT_PTRN_MAX 4
  211. #define WMA_STA_WOW_DEFAULT_PTRN_MAX 5
  212. #define WMA_BSS_STATUS_STARTED 0x1
  213. #define WMA_BSS_STATUS_STOPPED 0x2
  214. #define WMA_TARGET_REQ_TYPE_VDEV_START 0x1
  215. #define WMA_TARGET_REQ_TYPE_VDEV_STOP 0x2
  216. #define WMA_TARGET_REQ_TYPE_VDEV_DEL 0x3
  217. #define WMA_PEER_ASSOC_CNF_START 0x01
  218. #define WMA_PEER_ASSOC_TIMEOUT (3000) /* 3 seconds */
  219. #define WMA_DELETE_STA_RSP_START 0x02
  220. #define WMA_DELETE_STA_TIMEOUT (6000) /* 6 seconds */
  221. #define WMA_DEL_P2P_SELF_STA_RSP_START 0x03
  222. #define WMA_VDEV_START_REQUEST_TIMEOUT (3000) /* 3 seconds */
  223. #define WMA_VDEV_STOP_REQUEST_TIMEOUT (3000) /* 3 seconds */
  224. #define WMA_TGT_INVALID_SNR 0x127
  225. #define WMA_TX_Q_RECHECK_TIMER_WAIT 2 /* 2 ms */
  226. #define WMA_TX_Q_RECHECK_TIMER_MAX_WAIT 20 /* 20 ms */
  227. #define WMA_MAX_NUM_ARGS 8
  228. #define WMA_SMPS_MASK_LOWER_16BITS 0xFF
  229. #define WMA_SMPS_MASK_UPPER_3BITS 0x7
  230. #define WMA_SMPS_PARAM_VALUE_S 29
  231. #define WMA_MAX_SCAN_ID 0x00FF
  232. /*
  233. * Setting the Tx Comp Timeout to 1 secs.
  234. * TODO: Need to Revist the Timing
  235. */
  236. #define WMA_TX_FRAME_COMPLETE_TIMEOUT 1000
  237. #define WMA_TX_FRAME_BUFFER_NO_FREE 0
  238. #define WMA_TX_FRAME_BUFFER_FREE 1
  239. /* Default InActivity Time is 200 ms */
  240. #define POWERSAVE_DEFAULT_INACTIVITY_TIME 200
  241. /* Default Listen Interval */
  242. #define POWERSAVE_DEFAULT_LISTEN_INTERVAL 1
  243. /*
  244. * TODO: Add WMI_CMD_ID_MAX as part of WMI_CMD_ID
  245. * instead of assigning it to the last valid wmi
  246. * cmd+1 to avoid updating this when a command is
  247. * added/deleted.
  248. */
  249. #define WMI_CMDID_MAX (WMI_TXBF_CMDID + 1)
  250. #define WMA_NLO_FREQ_THRESH 1000 /* in MHz */
  251. #define WMA_SEC_TO_MSEC(sec) (sec * 1000) /* sec to msec */
  252. #define WMA_MSEC_TO_USEC(msec) (msec * 1000) /* msec to usec */
  253. /* Default rssi threshold defined in CFG80211 */
  254. #define WMA_RSSI_THOLD_DEFAULT -300
  255. #ifdef FEATURE_WLAN_SCAN_PNO
  256. #define WMA_PNO_MATCH_WAKE_LOCK_TIMEOUT (5 * 1000) /* in msec */
  257. #define WMA_PNO_SCAN_COMPLETE_WAKE_LOCK_TIMEOUT (2 * 1000) /* in msec */
  258. #endif
  259. #define WMA_AUTH_REQ_RECV_WAKE_LOCK_TIMEOUT (5 * 1000) /* in msec */
  260. #define WMA_ASSOC_REQ_RECV_WAKE_LOCK_DURATION (5 * 1000) /* in msec */
  261. #define WMA_DEAUTH_RECV_WAKE_LOCK_DURATION (5 * 1000) /* in msec */
  262. #define WMA_DISASSOC_RECV_WAKE_LOCK_DURATION (5 * 1000) /* in msec */
  263. #ifdef FEATURE_WLAN_AUTO_SHUTDOWN
  264. #define WMA_AUTO_SHUTDOWN_WAKE_LOCK_DURATION (5 * 1000) /* in msec */
  265. #endif
  266. #define WMA_BMISS_EVENT_WAKE_LOCK_DURATION (4 * 1000) /* in msec */
  267. #define WMA_FW_RSP_EVENT_WAKE_LOCK_DURATION (3 * 1000) /* in msec */
  268. #define WMA_TXMIC_LEN 8
  269. #define WMA_RXMIC_LEN 8
  270. /*
  271. * Length = (2 octets for Index and CTWin/Opp PS) and
  272. * (13 octets for each NOA Descriptors)
  273. */
  274. #define WMA_P2P_NOA_IE_OPP_PS_SET (0x80)
  275. #define WMA_P2P_NOA_IE_CTWIN_MASK (0x7F)
  276. #define WMA_P2P_IE_ID 0xdd
  277. #define WMA_P2P_WFA_OUI { 0x50, 0x6f, 0x9a }
  278. #define WMA_P2P_WFA_VER 0x09 /* ver 1.0 */
  279. #define WMA_WSC_OUI { 0x00, 0x50, 0xF2 } /* Microsoft WSC OUI byte */
  280. /* P2P Sub element defintions (according to table 5 of Wifi's P2P spec) */
  281. #define WMA_P2P_SUB_ELEMENT_STATUS 0
  282. #define WMA_P2P_SUB_ELEMENT_MINOR_REASON 1
  283. #define WMA_P2P_SUB_ELEMENT_CAPABILITY 2
  284. #define WMA_P2P_SUB_ELEMENT_DEVICE_ID 3
  285. #define WMA_P2P_SUB_ELEMENT_GO_INTENT 4
  286. #define WMA_P2P_SUB_ELEMENT_CONFIGURATION_TIMEOUT 5
  287. #define WMA_P2P_SUB_ELEMENT_LISTEN_CHANNEL 6
  288. #define WMA_P2P_SUB_ELEMENT_GROUP_BSSID 7
  289. #define WMA_P2P_SUB_ELEMENT_EXTENDED_LISTEN_TIMING 8
  290. #define WMA_P2P_SUB_ELEMENT_INTENDED_INTERFACE_ADDR 9
  291. #define WMA_P2P_SUB_ELEMENT_MANAGEABILITY 10
  292. #define WMA_P2P_SUB_ELEMENT_CHANNEL_LIST 11
  293. #define WMA_P2P_SUB_ELEMENT_NOA 12
  294. #define WMA_P2P_SUB_ELEMENT_DEVICE_INFO 13
  295. #define WMA_P2P_SUB_ELEMENT_GROUP_INFO 14
  296. #define WMA_P2P_SUB_ELEMENT_GROUP_ID 15
  297. #define WMA_P2P_SUB_ELEMENT_INTERFACE 16
  298. #define WMA_P2P_SUB_ELEMENT_OP_CHANNEL 17
  299. #define WMA_P2P_SUB_ELEMENT_INVITATION_FLAGS 18
  300. #define WMA_P2P_SUB_ELEMENT_VENDOR 221
  301. /* Macros for handling unaligned memory accesses */
  302. #define P2PIE_PUT_LE16(a, val) \
  303. do { \
  304. (a)[1] = ((u16) (val)) >> 8; \
  305. (a)[0] = ((u16) (val)) & 0xff; \
  306. } while (0)
  307. #define P2PIE_PUT_LE32(a, val) \
  308. do { \
  309. (a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \
  310. (a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \
  311. (a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \
  312. (a)[0] = (u8) (((u32) (val)) & 0xff); \
  313. } while (0)
  314. #define WMA_DEFAULT_MAX_PSPOLL_BEFORE_WAKE 1
  315. #define WMA_DEFAULT_QPOWER_MAX_PSPOLL_BEFORE_WAKE 1
  316. #define WMA_DEFAULT_QPOWER_TX_WAKE_THRESHOLD 2
  317. #define WMA_DEFAULT_SIFS_BURST_DURATION 8160
  318. #define WMA_VHT_PPS_PAID_MATCH 1
  319. #define WMA_VHT_PPS_GID_MATCH 2
  320. #define WMA_VHT_PPS_DELIM_CRC_FAIL 3
  321. #define WMA_DFS_MAX_20M_SUB_CH 8
  322. #define WMA_80MHZ_START_CENTER_CH_DIFF 6
  323. #define WMA_160MHZ_START_CENTER_CH_DIFF 14
  324. #define WMA_NEXT_20MHZ_START_CH_DIFF 4
  325. #define WMA_DEFAULT_HW_MODE_INDEX 0xFFFF
  326. /**
  327. * WMA hardware mode list bit-mask definitions.
  328. * Bits 4:0, 31:29 are unused.
  329. *
  330. * The below definitions are added corresponding to WMI DBS HW mode
  331. * list to make it independent of firmware changes for WMI definitions.
  332. * Currently these definitions have dependency with BIT positions of
  333. * the existing WMI macros. Thus, if the BIT positions are changed for
  334. * WMI macros, then these macros' BIT definitions are also need to be
  335. * changed.
  336. */
  337. #define WMA_HW_MODE_MAC0_TX_STREAMS_BITPOS (28)
  338. #define WMA_HW_MODE_MAC0_RX_STREAMS_BITPOS (24)
  339. #define WMA_HW_MODE_MAC1_TX_STREAMS_BITPOS (20)
  340. #define WMA_HW_MODE_MAC1_RX_STREAMS_BITPOS (16)
  341. #define WMA_HW_MODE_MAC0_BANDWIDTH_BITPOS (12)
  342. #define WMA_HW_MODE_MAC1_BANDWIDTH_BITPOS (8)
  343. #define WMA_HW_MODE_DBS_MODE_BITPOS (7)
  344. #define WMA_HW_MODE_AGILE_DFS_MODE_BITPOS (6)
  345. #define WMA_HW_MODE_SBS_MODE_BITPOS (5)
  346. #define WMA_HW_MODE_MAC0_TX_STREAMS_MASK \
  347. (0xf << WMA_HW_MODE_MAC0_TX_STREAMS_BITPOS)
  348. #define WMA_HW_MODE_MAC0_RX_STREAMS_MASK \
  349. (0xf << WMA_HW_MODE_MAC0_RX_STREAMS_BITPOS)
  350. #define WMA_HW_MODE_MAC1_TX_STREAMS_MASK \
  351. (0xf << WMA_HW_MODE_MAC1_TX_STREAMS_BITPOS)
  352. #define WMA_HW_MODE_MAC1_RX_STREAMS_MASK \
  353. (0xf << WMA_HW_MODE_MAC1_RX_STREAMS_BITPOS)
  354. #define WMA_HW_MODE_MAC0_BANDWIDTH_MASK \
  355. (0xf << WMA_HW_MODE_MAC0_BANDWIDTH_BITPOS)
  356. #define WMA_HW_MODE_MAC1_BANDWIDTH_MASK \
  357. (0xf << WMA_HW_MODE_MAC1_BANDWIDTH_BITPOS)
  358. #define WMA_HW_MODE_DBS_MODE_MASK \
  359. (0x1 << WMA_HW_MODE_DBS_MODE_BITPOS)
  360. #define WMA_HW_MODE_AGILE_DFS_MODE_MASK \
  361. (0x1 << WMA_HW_MODE_AGILE_DFS_MODE_BITPOS)
  362. #define WMA_HW_MODE_SBS_MODE_MASK \
  363. (0x1 << WMA_HW_MODE_SBS_MODE_BITPOS)
  364. #define WMA_HW_MODE_MAC0_TX_STREAMS_SET(hw_mode, value) \
  365. WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC0_TX_STREAMS_BITPOS, 4, value)
  366. #define WMA_HW_MODE_MAC0_RX_STREAMS_SET(hw_mode, value) \
  367. WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC0_RX_STREAMS_BITPOS, 4, value)
  368. #define WMA_HW_MODE_MAC1_TX_STREAMS_SET(hw_mode, value) \
  369. WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC1_TX_STREAMS_BITPOS, 4, value)
  370. #define WMA_HW_MODE_MAC1_RX_STREAMS_SET(hw_mode, value) \
  371. WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC1_RX_STREAMS_BITPOS, 4, value)
  372. #define WMA_HW_MODE_MAC0_BANDWIDTH_SET(hw_mode, value) \
  373. WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC0_BANDWIDTH_BITPOS, 4, value)
  374. #define WMA_HW_MODE_MAC1_BANDWIDTH_SET(hw_mode, value) \
  375. WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC1_BANDWIDTH_BITPOS, 4, value)
  376. #define WMA_HW_MODE_DBS_MODE_SET(hw_mode, value) \
  377. WMI_SET_BITS(hw_mode, WMA_HW_MODE_DBS_MODE_BITPOS, 1, value)
  378. #define WMA_HW_MODE_AGILE_DFS_SET(hw_mode, value) \
  379. WMI_SET_BITS(hw_mode, WMA_HW_MODE_AGILE_DFS_MODE_BITPOS, 1, value)
  380. #define WMA_HW_MODE_SBS_MODE_SET(hw_mode, value) \
  381. WMI_SET_BITS(hw_mode, WMA_HW_MODE_SBS_MODE_BITPOS, 1, value)
  382. #define WMA_HW_MODE_MAC0_TX_STREAMS_GET(hw_mode) \
  383. ((hw_mode & WMA_HW_MODE_MAC0_TX_STREAMS_MASK) >> \
  384. WMA_HW_MODE_MAC0_TX_STREAMS_BITPOS)
  385. #define WMA_HW_MODE_MAC0_RX_STREAMS_GET(hw_mode) \
  386. ((hw_mode & WMA_HW_MODE_MAC0_RX_STREAMS_MASK) >> \
  387. WMA_HW_MODE_MAC0_RX_STREAMS_BITPOS)
  388. #define WMA_HW_MODE_MAC1_TX_STREAMS_GET(hw_mode) \
  389. ((hw_mode & WMA_HW_MODE_MAC1_TX_STREAMS_MASK) >> \
  390. WMA_HW_MODE_MAC1_TX_STREAMS_BITPOS)
  391. #define WMA_HW_MODE_MAC1_RX_STREAMS_GET(hw_mode) \
  392. ((hw_mode & WMA_HW_MODE_MAC1_RX_STREAMS_MASK) >> \
  393. WMA_HW_MODE_MAC1_RX_STREAMS_BITPOS)
  394. #define WMA_HW_MODE_MAC0_BANDWIDTH_GET(hw_mode) \
  395. ((hw_mode & WMA_HW_MODE_MAC0_BANDWIDTH_MASK) >> \
  396. WMA_HW_MODE_MAC0_BANDWIDTH_BITPOS)
  397. #define WMA_HW_MODE_MAC1_BANDWIDTH_GET(hw_mode) \
  398. ((hw_mode & WMA_HW_MODE_MAC1_BANDWIDTH_MASK) >> \
  399. WMA_HW_MODE_MAC1_BANDWIDTH_BITPOS)
  400. #define WMA_HW_MODE_DBS_MODE_GET(hw_mode) \
  401. ((hw_mode & WMA_HW_MODE_DBS_MODE_MASK) >> \
  402. WMA_HW_MODE_DBS_MODE_BITPOS)
  403. #define WMA_HW_MODE_AGILE_DFS_GET(hw_mode) \
  404. ((hw_mode & WMA_HW_MODE_AGILE_DFS_MODE_MASK) >> \
  405. WMA_HW_MODE_AGILE_DFS_MODE_BITPOS)
  406. #define WMA_HW_MODE_SBS_MODE_GET(hw_mode) \
  407. ((hw_mode & WMA_HW_MODE_SBS_MODE_MASK) >> \
  408. WMA_HW_MODE_SBS_MODE_BITPOS)
  409. /**
  410. * struct probeTime_dwellTime - probe time, dwell time map
  411. * @dwell_time: dwell time
  412. * @probe_time: repeat probe time
  413. */
  414. typedef struct probeTime_dwellTime {
  415. uint8_t dwell_time;
  416. uint8_t probe_time;
  417. } t_probeTime_dwellTime;
  418. static const t_probeTime_dwellTime
  419. probe_time_dwell_time_map[WMA_DWELL_TIME_PROBE_TIME_MAP_SIZE] = {
  420. {28, 0}, /* 0 SSID */
  421. {28, 20}, /* 1 SSID */
  422. {28, 20}, /* 2 SSID */
  423. {28, 20}, /* 3 SSID */
  424. {28, 20}, /* 4 SSID */
  425. {28, 20}, /* 5 SSID */
  426. {28, 20}, /* 6 SSID */
  427. {28, 11}, /* 7 SSID */
  428. {28, 11}, /* 8 SSID */
  429. {28, 11}, /* 9 SSID */
  430. {28, 8} /* 10 SSID */
  431. };
  432. typedef void (*txFailIndCallback)(uint8_t *peer_mac, uint8_t seqNo);
  433. typedef void (*encrypt_decrypt_cb)(struct sir_encrypt_decrypt_rsp_params
  434. *encrypt_decrypt_rsp_params);
  435. /**
  436. * enum t_wma_drv_type - wma driver type
  437. * @WMA_DRIVER_TYPE_PRODUCTION: production driver type
  438. * @WMA_DRIVER_TYPE_MFG: manufacture driver type
  439. * @WMA_DRIVER_TYPE_INVALID: invalid driver type
  440. */
  441. typedef enum {
  442. WMA_DRIVER_TYPE_PRODUCTION = 0,
  443. WMA_DRIVER_TYPE_MFG = 1,
  444. WMA_DRIVER_TYPE_INVALID = 0x7FFFFFFF
  445. } t_wma_drv_type;
  446. #ifdef FEATURE_WLAN_TDLS
  447. /**
  448. * enum t_wma_tdls_mode - TDLS mode
  449. * @WMA_TDLS_SUPPORT_NOT_ENABLED: tdls is disable
  450. * @WMA_TDLS_SUPPORT_DISABLED: suppress implicit trigger and not respond to peer
  451. * @WMA_TDLS_SUPPORT_EXPLICIT_TRIGGER_ONLY: suppress implicit trigger,
  452. * but respond to the peer
  453. * @WMA_TDLS_SUPPORT_ENABLED: implicit trigger
  454. * @WMA_TDLS_SUPPORT_ACTIVE_EXTERNAL_CONTROL: External control means
  455. * implicit trigger but only to a peer mac configured by user space.
  456. */
  457. typedef enum {
  458. WMA_TDLS_SUPPORT_NOT_ENABLED = 0,
  459. WMA_TDLS_SUPPORT_DISABLED,
  460. WMA_TDLS_SUPPORT_EXPLICIT_TRIGGER_ONLY,
  461. WMA_TDLS_SUPPORT_ENABLED,
  462. WMA_TDLS_SUPPORT_ACTIVE_EXTERNAL_CONTROL,
  463. } t_wma_tdls_mode;
  464. /**
  465. * enum wma_tdls_peer_notification - TDLS events
  466. * @WMA_TDLS_SHOULD_DISCOVER: tdls discovery recommended for peer (always based
  467. * on tx bytes per second > tx_discover threshold
  468. * NB: notification will be re-sent after
  469. * discovery_request_interval_ms
  470. * @WMA_TDLS_SHOULD_TEARDOWN: tdls link tear down recommended for peer
  471. * due to tx bytes per second below
  472. * tx_teardown_threshold
  473. * NB: this notification sent once
  474. * @WMA_TDLS_PEER_DISCONNECTED: tx peer TDLS link tear down complete
  475. */
  476. enum wma_tdls_peer_notification {
  477. WMA_TDLS_SHOULD_DISCOVER,
  478. WMA_TDLS_SHOULD_TEARDOWN,
  479. WMA_TDLS_PEER_DISCONNECTED,
  480. };
  481. /**
  482. * enum wma_tdls_peer_reason - TDLS peer reason
  483. * @WMA_TDLS_TEARDOWN_REASON_TX: tdls teardown recommended due to low transmits
  484. * @WMA_TDLS_TEARDOWN_REASON_RATE: tdls tear down recommended due to
  485. * packet rates < AP rates
  486. * @WMA_TDLS_TEARDOWN_REASON_RSSI: tdls link tear down recommended
  487. * due to poor RSSI
  488. * @WMA_TDLS_TEARDOWN_REASON_SCAN: tdls link tear down recommended
  489. * due to offchannel scan
  490. * @WMA_TDLS_DISCONNECTED_REASON_PEER_DELETE: tdls peer disconnected
  491. * due to peer deletion
  492. */
  493. enum wma_tdls_peer_reason {
  494. WMA_TDLS_TEARDOWN_REASON_TX,
  495. WMA_TDLS_TEARDOWN_REASON_RATE,
  496. WMA_TDLS_TEARDOWN_REASON_RSSI,
  497. WMA_TDLS_TEARDOWN_REASON_SCAN,
  498. WMA_TDLS_DISCONNECTED_REASON_PEER_DELETE,
  499. };
  500. #endif /* FEATURE_WLAN_TDLS */
  501. /**
  502. * enum wma_rx_exec_ctx - wma rx execution context
  503. * @WMA_RX_WORK_CTX: work queue context execution
  504. * @WMA_RX_TASKLET_CTX: tasklet context execution
  505. * @WMA_RX_SERIALIZER_CTX: MC thread context execution
  506. *
  507. */
  508. enum wma_rx_exec_ctx {
  509. WMA_RX_WORK_CTX,
  510. WMA_RX_TASKLET_CTX,
  511. WMA_RX_SERIALIZER_CTX
  512. };
  513. /**
  514. * enum wma_phy_idx
  515. * @PHY1: to notify caller that PHY1 specific param needed
  516. * @PHY2: to notify caller that PHY2 specific param needed
  517. * @PHY1_PHY2: to notify caller that both PHY's param needed
  518. * Note: Firmware sends phy map in terms of bitmask, so enum
  519. * also needs to be defined that way.
  520. *
  521. * For example, 0x3 = 0011 = BIT0 corresponds to one phy and
  522. * BIT1 coresponds to another phy. There is no direct relation between
  523. * each bit to particular PHY (ex. PHYA or PHYB).
  524. *
  525. * In simple terms, 3 means referring both PHYs & 1 or 2 means
  526. * referring to either PHYA or PHYB.
  527. */
  528. enum wma_phy_idx {
  529. PHY1 = 0x1, /* 0x1 */
  530. PHY2, /* 0x2 */
  531. PHY1_PHY2, /* 0x3 */
  532. };
  533. /**
  534. * struct wma_mem_chunk - memory chunks
  535. * @vaddr: virtual address
  536. * @paddr: physical address
  537. * @memctx: dma mapped memory
  538. * @len: length of data
  539. * @req_id: request id
  540. *
  541. * memory chunck allocated by Host to be managed by FW
  542. * used only for low latency interfaces like pcie
  543. */
  544. struct wma_mem_chunk {
  545. uint32_t *vaddr;
  546. uint32_t paddr;
  547. qdf_dma_mem_context(memctx);
  548. uint32_t len;
  549. uint32_t req_id;
  550. };
  551. /**
  552. * struct p2p_scan_param - p2p scan listen parameters
  553. * @scan_id: scan id
  554. * @p2p_scan_type: p2p scan type
  555. */
  556. struct p2p_scan_param {
  557. uint32_t scan_id;
  558. tSirP2pScanType p2p_scan_type;
  559. };
  560. /**
  561. * struct scan_param - scan parameters
  562. * @scan_id: scan id
  563. * @scan_requestor_id: scan requestor id
  564. * @p2p_scan_type: p2p scan type
  565. */
  566. struct scan_param {
  567. uint32_t scan_id;
  568. uint32_t scan_requestor_id;
  569. tSirP2pScanType p2p_scan_type;
  570. uint32_t chan_freq;
  571. };
  572. /**
  573. * struct beacon_info - structure to store beacon template
  574. * @buf: skb ptr
  575. * @len: length
  576. * @dma_mapped: is it dma mapped or not
  577. * @tim_ie_offset: TIM IE offset
  578. * @dtim_count: DTIM count
  579. * @seq_no: sequence no
  580. * @noa_sub_ie: NOA sub IE
  581. * @noa_sub_ie_len: NOA sub IE length
  582. * @noa_ie: NOA IE
  583. * @p2p_ie_offset: p2p IE offset
  584. * @lock: lock
  585. */
  586. struct beacon_info {
  587. qdf_nbuf_t buf;
  588. uint32_t len;
  589. uint8_t dma_mapped;
  590. uint32_t tim_ie_offset;
  591. uint8_t dtim_count;
  592. uint16_t seq_no;
  593. uint8_t noa_sub_ie[2 + WMA_NOA_IE_SIZE(WMA_MAX_NOA_DESCRIPTORS)];
  594. uint16_t noa_sub_ie_len;
  595. uint8_t *noa_ie;
  596. uint16_t p2p_ie_offset;
  597. qdf_spinlock_t lock;
  598. };
  599. /**
  600. * struct beacon_tim_ie - structure to store TIM IE of beacon
  601. * @tim_ie: tim ie
  602. * @tim_len: tim ie length
  603. * @dtim_count: dtim count
  604. * @dtim_period: dtim period
  605. * @tim_bitctl: tim bit control
  606. * @tim_bitmap: tim bitmap
  607. */
  608. struct beacon_tim_ie {
  609. uint8_t tim_ie;
  610. uint8_t tim_len;
  611. uint8_t dtim_count;
  612. uint8_t dtim_period;
  613. uint8_t tim_bitctl;
  614. uint8_t tim_bitmap[1];
  615. } __ATTRIB_PACK;
  616. /**
  617. * struct pps - packet power save parameter
  618. * @paid_match_enable: paid match enable
  619. * @gid_match_enable: gid match enable
  620. * @tim_clear: time clear
  621. * @dtim_clear: dtim clear
  622. * @eof_delim: eof delim
  623. * @mac_match: mac match
  624. * @delim_fail: delim fail
  625. * @nsts_zero: nsts zero
  626. * @rssi_chk: RSSI check
  627. * @ebt_5g: ebt 5GHz
  628. */
  629. struct pps {
  630. bool paid_match_enable;
  631. bool gid_match_enable;
  632. bool tim_clear;
  633. bool dtim_clear;
  634. bool eof_delim;
  635. bool mac_match;
  636. bool delim_fail;
  637. bool nsts_zero;
  638. bool rssi_chk;
  639. bool ebt_5g;
  640. };
  641. /**
  642. * struct qpower_params - qpower related parameters
  643. * @max_ps_poll_cnt: max ps poll count
  644. * @max_tx_before_wake: max tx before wake
  645. * @spec_ps_poll_wake_interval: ps poll wake interval
  646. * @max_spec_nodata_ps_poll: no data ps poll
  647. */
  648. struct qpower_params {
  649. uint32_t max_ps_poll_cnt;
  650. uint32_t max_tx_before_wake;
  651. uint32_t spec_ps_poll_wake_interval;
  652. uint32_t max_spec_nodata_ps_poll;
  653. };
  654. /**
  655. * struct gtx_config_t - GTX config
  656. * @gtxRTMask: for HT and VHT rate masks
  657. * @gtxUsrcfg: host request for GTX mask
  658. * @gtxPERThreshold: PER Threshold (default: 10%)
  659. * @gtxPERMargin: PER margin (default: 2%)
  660. * @gtxTPCstep: TCP step (default: 1)
  661. * @gtxTPCMin: TCP min (default: 5)
  662. * @gtxBWMask: BW mask (20/40/80/160 Mhz)
  663. */
  664. typedef struct {
  665. uint32_t gtxRTMask[2];
  666. uint32_t gtxUsrcfg;
  667. uint32_t gtxPERThreshold;
  668. uint32_t gtxPERMargin;
  669. uint32_t gtxTPCstep;
  670. uint32_t gtxTPCMin;
  671. uint32_t gtxBWMask;
  672. } gtx_config_t;
  673. /**
  674. * struct pdev_cli_config_t - store pdev parameters
  675. * @ani_enable: ANI is enabled/disable on target
  676. * @ani_poll_len: store ANI polling period
  677. * @ani_listen_len: store ANI listening period
  678. * @ani_ofdm_level: store ANI OFDM immunity level
  679. * @ani_cck_level: store ANI CCK immunity level
  680. * @cwmenable: Dynamic bw is enable/disable in fw
  681. * @txchainmask: tx chain mask
  682. * @rxchainmask: rx chain mask
  683. * @txpow2g: tx power limit for 2GHz
  684. * @txpow5g: tx power limit for 5GHz
  685. * @burst_enable: is burst enable/disable
  686. * @burst_dur: burst duration
  687. *
  688. * This structure stores pdev parameters.
  689. * Some of these parameters are set in fw and some
  690. * parameters are only maintained in host.
  691. */
  692. typedef struct {
  693. uint32_t ani_enable;
  694. uint32_t ani_poll_len;
  695. uint32_t ani_listen_len;
  696. uint32_t ani_ofdm_level;
  697. uint32_t ani_cck_level;
  698. uint32_t cwmenable;
  699. uint32_t cts_cbw;
  700. uint32_t txchainmask;
  701. uint32_t rxchainmask;
  702. uint32_t txpow2g;
  703. uint32_t txpow5g;
  704. uint32_t burst_enable;
  705. uint32_t burst_dur;
  706. } pdev_cli_config_t;
  707. /**
  708. * struct vdev_cli_config_t - store vdev parameters
  709. * @nss: nss width
  710. * @ldpc: is ldpc is enable/disable
  711. * @tx_stbc: TX STBC is enable/disable
  712. * @rx_stbc: RX STBC is enable/disable
  713. * @shortgi: short gi is enable/disable
  714. * @rtscts_en: RTS/CTS is enable/disable
  715. * @chwidth: channel width
  716. * @tx_rate: tx rate
  717. * @ampdu: ampdu size
  718. * @amsdu: amsdu size
  719. * @erx_adjust: enable/disable early rx enable
  720. * @erx_bmiss_num: target bmiss number per sample
  721. * @erx_bmiss_cycle: sample cycle
  722. * @erx_slop_step: slop_step value
  723. * @erx_init_slop: init slop
  724. * @erx_adj_pause: pause adjust enable/disable
  725. * @erx_dri_sample: enable/disable drift sample
  726. * @pps_params: packet power save parameters
  727. * @qpower_params: qpower parameters
  728. * @gtx_info: GTX offload info
  729. *
  730. * This structure stores vdev parameters.
  731. * Some of these parameters are set in fw and some
  732. * parameters are only maintained in host.
  733. */
  734. typedef struct {
  735. uint32_t nss;
  736. uint32_t ldpc;
  737. uint32_t tx_stbc;
  738. uint32_t rx_stbc;
  739. uint32_t shortgi;
  740. uint32_t rtscts_en;
  741. uint32_t chwidth;
  742. uint32_t tx_rate;
  743. uint32_t ampdu;
  744. uint32_t amsdu;
  745. uint32_t erx_adjust;
  746. uint32_t erx_bmiss_num;
  747. uint32_t erx_bmiss_cycle;
  748. uint32_t erx_slop_step;
  749. uint32_t erx_init_slop;
  750. uint32_t erx_adj_pause;
  751. uint32_t erx_dri_sample;
  752. struct pps pps_params;
  753. struct qpower_params qpower_params;
  754. gtx_config_t gtx_info;
  755. } vdev_cli_config_t;
  756. /**
  757. * struct wma_version_info - Store wmi version info
  758. * @major: wmi major version
  759. * @minor: wmi minor version
  760. * @revision: wmi revision number
  761. */
  762. struct wma_version_info {
  763. u_int32_t major;
  764. u_int32_t minor;
  765. u_int32_t revision;
  766. };
  767. /**
  768. * struct wma_wow - store wow patterns
  769. * @magic_ptrn_enable: magic pattern enable/disable
  770. * @wow_enable: wow enable/disable
  771. * @wow_enable_cmd_sent: is wow enable command sent to fw
  772. * @deauth_enable: is deauth wakeup enable/disable
  773. * @disassoc_enable: is disassoc wakeup enable/disable
  774. * @bmiss_enable: is bmiss wakeup enable/disable
  775. * @gtk_pdev_enable: is GTK based wakeup enable/disable
  776. * @gtk_err_enable: is GTK error wakeup enable/disable
  777. * @lphb_cache: lphb cache
  778. *
  779. * This structure stores wow patterns and
  780. * wow related parameters in host.
  781. */
  782. struct wma_wow {
  783. bool magic_ptrn_enable;
  784. bool wow_enable;
  785. bool wow_enable_cmd_sent;
  786. bool deauth_enable;
  787. bool disassoc_enable;
  788. bool bmiss_enable;
  789. bool gtk_err_enable[WMA_MAX_SUPPORTED_BSS];
  790. #ifdef FEATURE_WLAN_LPHB
  791. /* currently supports only vdev 0.
  792. * cache has two entries: one for TCP and one for UDP.
  793. */
  794. tSirLPHBReq lphb_cache[2];
  795. #endif
  796. };
  797. #ifdef WLAN_FEATURE_11W
  798. #define CMAC_IPN_LEN (6)
  799. #define WMA_IGTK_KEY_INDEX_4 (4)
  800. #define WMA_IGTK_KEY_INDEX_5 (5)
  801. /**
  802. * struct wma_igtk_ipn_t - GTK IPN info
  803. * @ipn: IPN info
  804. */
  805. typedef struct {
  806. uint8_t ipn[CMAC_IPN_LEN];
  807. } wma_igtk_ipn_t;
  808. /**
  809. * struct wma_igtk_key_t - GTK key
  810. * @key_length: key length
  811. * @key: key
  812. * @key_id: key id
  813. */
  814. typedef struct {
  815. uint16_t key_length;
  816. uint8_t key[CSR_AES_KEY_LEN];
  817. /* IPN is maintained per iGTK keyID
  818. * 0th index for iGTK keyID = 4;
  819. * 1st index for iGTK KeyID = 5
  820. */
  821. wma_igtk_ipn_t key_id[2];
  822. } wma_igtk_key_t;
  823. #endif
  824. /**
  825. * struct vdev_restart_params_t - vdev restart parameters
  826. * @vdev_id: vdev id
  827. * @ssid: ssid
  828. * @flags: flags
  829. * @requestor_id: requestor id
  830. * @chan: channel
  831. * @hidden_ssid_restart_in_progress: hidden ssid restart flag
  832. * @ssidHidden: is ssid hidden or not
  833. */
  834. typedef struct {
  835. A_UINT32 vdev_id;
  836. wmi_ssid ssid;
  837. A_UINT32 flags;
  838. A_UINT32 requestor_id;
  839. A_UINT32 disable_hw_ack;
  840. wmi_channel chan;
  841. qdf_atomic_t hidden_ssid_restart_in_progress;
  842. uint8_t ssidHidden;
  843. } vdev_restart_params_t;
  844. /**
  845. * struct wma_txrx_node - txrx node
  846. * @addr: mac address
  847. * @bssid: bssid
  848. * @handle: wma handle
  849. * @beacon: beacon info
  850. * @vdev_restart_params: vdev restart parameters
  851. * @config: per vdev config parameters
  852. * @scan_info: scan info
  853. * @type: type
  854. * @sub_type: sub type
  855. * @nlo_match_evt_received: is nlo match event received or not
  856. * @pno_in_progress: is pno in progress or not
  857. * @plm_in_progress: is plm in progress or not
  858. * @ptrn_match_enable: is pattern match is enable or not
  859. * @num_wow_default_patterns: number of default wow patterns configured for vdev
  860. * @num_wow_user_patterns: number of user wow patterns configured for vdev
  861. * @conn_state: connection state
  862. * @beaconInterval: beacon interval
  863. * @llbCoexist: 11b coexist
  864. * @shortSlotTimeSupported: is short slot time supported or not
  865. * @dtimPeriod: DTIM period
  866. * @chanmode: channel mode
  867. * @vht_capable: VHT capablity flag
  868. * @ht_capable: HT capablity flag
  869. * @mhz: channel frequency in KHz
  870. * @chan_width: channel bandwidth
  871. * @vdev_up: is vdev up or not
  872. * @tsfadjust: TSF adjust
  873. * @addBssStaContext: add bss context
  874. * @aid: association id
  875. * @rmfEnabled: Robust Management Frame (RMF) enabled/disabled
  876. * @key: GTK key
  877. * @uapsd_cached_val: uapsd cached value
  878. * @stats_rsp: stats response
  879. * @fw_stats_set: fw stats value
  880. * @del_staself_req: delete sta self request
  881. * @bss_status: bss status
  882. * @rate_flags: rate flags
  883. * @nss: nss value
  884. * @is_channel_switch: is channel switch
  885. * @pause_bitmap: pause bitmap
  886. * @tx_power: tx power in dbm
  887. * @max_tx_power: max tx power in dbm
  888. * @nwType: network type (802.11a/b/g/n/ac)
  889. * @staKeyParams: sta key parameters
  890. * @ps_enabled: is powersave enable/disable
  891. * @dtim_policy: DTIM policy
  892. * @peer_count: peer count
  893. * @roam_synch_in_progress: flag is in progress or not
  894. * @plink_status_req: link status request
  895. * @psnr_req: snr request
  896. * @delay_before_vdev_stop: delay
  897. * @tx_streams: number of tx streams can be used by the vdev
  898. * @rx_streams: number of rx streams can be used by the vdev
  899. * @chain_mask: chain mask can be used by the vdev
  900. * @mac_id: the mac on which vdev is on
  901. * @wep_default_key_idx: wep default index for group key
  902. * @arp_offload_req: cached arp offload request
  903. * @ns_offload_req: cached ns offload request
  904. * It stores parameters per vdev in wma.
  905. */
  906. struct wma_txrx_node {
  907. uint8_t addr[IEEE80211_ADDR_LEN];
  908. uint8_t bssid[IEEE80211_ADDR_LEN];
  909. void *handle;
  910. struct beacon_info *beacon;
  911. vdev_restart_params_t vdev_restart_params;
  912. vdev_cli_config_t config;
  913. struct scan_param scan_info;
  914. struct p2p_scan_param p2p_scan_info;
  915. uint32_t type;
  916. uint32_t sub_type;
  917. #ifdef FEATURE_WLAN_SCAN_PNO
  918. bool nlo_match_evt_received;
  919. bool pno_in_progress;
  920. #endif
  921. #ifdef FEATURE_WLAN_ESE
  922. bool plm_in_progress;
  923. #endif
  924. bool ptrn_match_enable;
  925. uint8_t num_wow_default_patterns;
  926. uint8_t num_wow_user_patterns;
  927. bool conn_state;
  928. tSirMacBeaconInterval beaconInterval;
  929. uint8_t llbCoexist;
  930. uint8_t shortSlotTimeSupported;
  931. uint8_t dtimPeriod;
  932. WLAN_PHY_MODE chanmode;
  933. uint8_t vht_capable;
  934. uint8_t ht_capable;
  935. A_UINT32 mhz;
  936. enum phy_ch_width chan_width;
  937. bool vdev_active;
  938. bool vdev_up;
  939. uint64_t tsfadjust;
  940. void *addBssStaContext;
  941. uint8_t aid;
  942. uint8_t rmfEnabled;
  943. #ifdef WLAN_FEATURE_11W
  944. wma_igtk_key_t key;
  945. #endif /* WLAN_FEATURE_11W */
  946. uint32_t uapsd_cached_val;
  947. tAniGetPEStatsRsp *stats_rsp;
  948. uint8_t fw_stats_set;
  949. void *del_staself_req;
  950. qdf_atomic_t bss_status;
  951. uint8_t rate_flags;
  952. uint8_t nss;
  953. bool is_channel_switch;
  954. uint16_t pause_bitmap;
  955. int8_t tx_power;
  956. int8_t max_tx_power;
  957. uint32_t nwType;
  958. void *staKeyParams;
  959. bool ps_enabled;
  960. uint32_t dtim_policy;
  961. uint32_t peer_count;
  962. bool roam_synch_in_progress;
  963. void *plink_status_req;
  964. void *psnr_req;
  965. uint8_t delay_before_vdev_stop;
  966. #ifdef FEATURE_WLAN_EXTSCAN
  967. bool extscan_in_progress;
  968. #endif
  969. uint32_t alt_modulated_dtim;
  970. bool alt_modulated_dtim_enabled;
  971. uint32_t tx_streams;
  972. uint32_t rx_streams;
  973. uint32_t chain_mask;
  974. uint32_t mac_id;
  975. bool roaming_in_progress;
  976. int32_t roam_synch_delay;
  977. uint8_t nss_2g;
  978. uint8_t nss_5g;
  979. bool p2p_lo_in_progress;
  980. uint8_t wep_default_key_idx;
  981. tSirHostOffloadReq arp_offload_req;
  982. tSirHostOffloadReq ns_offload_req;
  983. bool is_vdev_valid;
  984. };
  985. #if defined(QCA_WIFI_FTM)
  986. #define MAX_UTF_EVENT_LENGTH 2048
  987. #define MAX_WMI_UTF_LEN 252
  988. /**
  989. * struct SEG_HDR_INFO_STRUCT - header info
  990. * @len: length
  991. * @msgref: message refrence
  992. * @segmentInfo: segment info
  993. * @pad: padding
  994. */
  995. typedef struct {
  996. A_UINT32 len;
  997. A_UINT32 msgref;
  998. A_UINT32 segmentInfo;
  999. A_UINT32 pad;
  1000. } SEG_HDR_INFO_STRUCT;
  1001. /**
  1002. * struct utf_event_info - UTF event info
  1003. * @data: data ptr
  1004. * @length: length
  1005. * @offset: offset
  1006. * @currentSeq: curent squence
  1007. * @expectedSeq: expected sequence
  1008. */
  1009. struct utf_event_info {
  1010. uint8_t *data;
  1011. uint32_t length;
  1012. qdf_size_t offset;
  1013. uint8_t currentSeq;
  1014. uint8_t expectedSeq;
  1015. };
  1016. #endif
  1017. /**
  1018. * struct scan_timer_info - scan timer info
  1019. * @vdev_id: vdev id
  1020. * @scan_id: scan id
  1021. */
  1022. typedef struct {
  1023. uint8_t vdev_id;
  1024. uint32_t scan_id;
  1025. } scan_timer_info;
  1026. /**
  1027. * struct ibss_power_save_params - IBSS power save parameters
  1028. * @atimWindowLength: ATIM window length
  1029. * @isPowerSaveAllowed: is power save allowed
  1030. * @isPowerCollapseAllowed: is power collapsed allowed
  1031. * @isAwakeonTxRxEnabled: is awake on tx/rx enabled
  1032. * @inactivityCount: inactivity count
  1033. * @txSPEndInactivityTime: tx SP end inactivity time
  1034. * @ibssPsWarmupTime: IBSS power save warm up time
  1035. * @ibssPs1RxChainInAtimEnable: IBSS power save rx chain in ATIM enable
  1036. */
  1037. typedef struct {
  1038. uint32_t atimWindowLength;
  1039. uint32_t isPowerSaveAllowed;
  1040. uint32_t isPowerCollapseAllowed;
  1041. uint32_t isAwakeonTxRxEnabled;
  1042. uint32_t inactivityCount;
  1043. uint32_t txSPEndInactivityTime;
  1044. uint32_t ibssPsWarmupTime;
  1045. uint32_t ibssPs1RxChainInAtimEnable;
  1046. } ibss_power_save_params;
  1047. /**
  1048. * struct dbs_hw_mode_info - WLAN_DBS_HW_MODES_TLV Format
  1049. * @tlv_header: TLV header, TLV tag and len; tag equals WMITLV_TAG_ARRAY_UINT32
  1050. * @hw_mode_list: WLAN_DBS_HW_MODE_LIST entries
  1051. */
  1052. struct dbs_hw_mode_info {
  1053. uint32_t tlv_header;
  1054. uint32_t *hw_mode_list;
  1055. };
  1056. /**
  1057. * struct mac_ss_bw_info - hw_mode_list PHY/MAC params for each MAC
  1058. * @mac_tx_stream: Max TX stream
  1059. * @mac_rx_stream: Max RX stream
  1060. * @mac_bw: Max bandwidth
  1061. */
  1062. struct mac_ss_bw_info {
  1063. uint32_t mac_tx_stream;
  1064. uint32_t mac_rx_stream;
  1065. uint32_t mac_bw;
  1066. };
  1067. /* Current HTC credit is 2, pool size of 50 is sufficient */
  1068. #define WMI_DESC_POOL_MAX 50
  1069. /**
  1070. * struct wmi_desc_t - wmi management Tx descriptor.
  1071. * @tx_cmpl_cb_func: completion callback function, when DL completion and
  1072. * OTA done.
  1073. * @ota_post_proc_func: Post process callback function registered.
  1074. * @nbuf: Network buffer to be freed.
  1075. * @desc_id: WMI descriptor.
  1076. */
  1077. struct wmi_desc_t {
  1078. pWMATxRxCompFunc tx_cmpl_cb;
  1079. pWMAAckFnTxComp ota_post_proc_cb;
  1080. qdf_nbuf_t nbuf;
  1081. uint32_t desc_id;
  1082. };
  1083. /**
  1084. * union wmi_desc_elem_t - linked list wmi desc pool.
  1085. * @next: Pointer next descritor in the pool.
  1086. * @wmi_desc: wmi descriptor element.
  1087. */
  1088. union wmi_desc_elem_t {
  1089. union wmi_desc_elem_t *next;
  1090. struct wmi_desc_t wmi_desc;
  1091. };
  1092. /**
  1093. * struct dual_mac_config - Dual MAC configurations
  1094. * @prev_scan_config: Previous scan configuration
  1095. * @prev_fw_mode_config: Previous FW mode configuration
  1096. * @cur_scan_config: Current scan configuration
  1097. * @cur_fw_mode_config: Current FW mode configuration
  1098. * @req_scan_config: Requested scan configuration
  1099. * @req_fw_mode_config: Requested FW mode configuration
  1100. */
  1101. struct dual_mac_config {
  1102. uint32_t prev_scan_config;
  1103. uint32_t prev_fw_mode_config;
  1104. uint32_t cur_scan_config;
  1105. uint32_t cur_fw_mode_config;
  1106. uint32_t req_scan_config;
  1107. uint32_t req_fw_mode_config;
  1108. };
  1109. /**
  1110. * struct wma_ini_config - Structure to hold wma ini configuration
  1111. * @max_no_of_peers: Max Number of supported
  1112. *
  1113. * Placeholder for WMA ini parameters.
  1114. */
  1115. struct wma_ini_config {
  1116. uint8_t max_no_of_peers;
  1117. };
  1118. /**
  1119. * struct wmi_valid_channels - Channel details part of WMI_SCAN_CHAN_LIST_CMDID
  1120. * @num_channels: Number of channels
  1121. * @channel_list: Channel list
  1122. */
  1123. struct wma_valid_channels {
  1124. uint8_t num_channels;
  1125. uint8_t channel_list[MAX_NUM_CHAN];
  1126. };
  1127. /**
  1128. * struct hw_mode_idx_to_mac_cap_idx - map between hw_mode to capabilities
  1129. * @num_of_macs: number of macs/PHYs for given hw_mode through hw_mode_id
  1130. * @mac_cap_idx: index of the mac/PHY for given hw_mode through hw_mode_id
  1131. * @hw_mode_id: given hw_mode id
  1132. */
  1133. struct hw_mode_idx_to_mac_cap_idx {
  1134. uint8_t num_of_macs;
  1135. uint8_t mac_cap_idx;
  1136. uint8_t hw_mode_id;
  1137. };
  1138. /**
  1139. * struct extended_caps - new extended caps given by firmware
  1140. * @num_hw_modes: number of hardware modes for current SOC
  1141. * @each_hw_mode_cap: hw mode id to phy id mapping
  1142. * @each_phy_cap_per_hwmode: PHY's caps for each hw mode
  1143. * @num_phy_for_hal_reg_cap: number of phy for hal reg cap
  1144. * @hw_mode_to_mac_cap_map: map between hw_mode to capabilities
  1145. */
  1146. struct extended_caps {
  1147. WMI_SOC_MAC_PHY_HW_MODE_CAPS num_hw_modes;
  1148. WMI_HW_MODE_CAPABILITIES *each_hw_mode_cap;
  1149. WMI_MAC_PHY_CAPABILITIES *each_phy_cap_per_hwmode;
  1150. WMI_SOC_HAL_REG_CAPABILITIES num_phy_for_hal_reg_cap;
  1151. WMI_HAL_REG_CAPABILITIES_EXT *each_phy_hal_reg_cap;
  1152. struct hw_mode_idx_to_mac_cap_idx *hw_mode_to_mac_cap_map;
  1153. };
  1154. /**
  1155. * struct t_wma_handle - wma context
  1156. * @wmi_handle: wmi handle
  1157. * @htc_handle: htc handle
  1158. * @cds_context: cds handle
  1159. * @mac_context: mac context
  1160. * @wma_ready_event: wma rx ready event
  1161. * @wma_resume_event: wma resume event
  1162. * @target_suspend: target suspend event
  1163. * @recovery_event: wma FW recovery event
  1164. * @max_station: max stations
  1165. * @max_bssid: max bssid
  1166. * @frame_xln_reqd: frame transmission required
  1167. * @driver_type: driver type
  1168. * @myaddr: current mac address
  1169. * @hwaddr: mac address from EEPROM
  1170. * @target_abi_vers: target firmware version
  1171. * @final_abi_vers: The final ABI version to be used for communicating
  1172. * @target_fw_version: Target f/w build version
  1173. * @lpss_support: LPSS feature is supported in target or not
  1174. * @egap_support: Enhanced Green AP support flag
  1175. * @wmi_ready: wmi status flag
  1176. * @wlan_init_status: wlan init status
  1177. * @qdf_dev: qdf device
  1178. * @phy_capability: PHY Capability from Target
  1179. * @max_frag_entry: Max number of Fragment entry
  1180. * @wmi_service_bitmap: wmi services bitmap received from Target
  1181. * @wlan_resource_config: resource config
  1182. * @frameTransRequired: frame transmission required
  1183. * @wmaGlobalSystemRole: global system role
  1184. * @tx_frm_download_comp_cb: Tx Frame Compl Cb registered by umac
  1185. * @tx_frm_download_comp_event: Event to wait for tx download completion
  1186. * @tx_queue_empty_event: wait for tx queue to get flushed
  1187. * @umac_ota_ack_cb: Ack Complete Callback registered by umac
  1188. * @umac_data_ota_ack_cb: ack complete callback
  1189. * @last_umac_data_ota_timestamp: timestamp when OTA of last umac data was done
  1190. * @last_umac_data_nbuf: cache nbuf ptr for the last umac data buf
  1191. * @needShutdown: is shutdown needed or not
  1192. * @num_mem_chunks: number of memory chunk
  1193. * @mem_chunks: memory chunks
  1194. * @tgt_cfg_update_cb: configuration update callback
  1195. * @dfs_radar_indication_cb: Callback to indicate radar to HDD
  1196. * @reg_cap: regulatory capablities
  1197. * @scan_id: scan id
  1198. * @interfaces: txrx nodes(per vdev)
  1199. * @pdevconfig: pdev related configrations
  1200. * @vdev_resp_queue: vdev response queue
  1201. * @vdev_respq_lock: vdev response queue lock
  1202. * @ht_cap_info: HT capablity info
  1203. * @vht_cap_info: VHT capablity info
  1204. * @vht_supp_mcs: VHT supported MCS
  1205. * @num_rf_chains: number of RF chains
  1206. * @utf_event_info: UTF event information
  1207. * @is_fw_assert: is fw asserted
  1208. * @wow: wow related patterns & parameters
  1209. * @no_of_suspend_ind: number of suspend indications
  1210. * @no_of_resume_ind: number of resume indications
  1211. * @mArpInfo: arp info
  1212. * @powersave_mode: power save mode
  1213. * @ptrn_match_enable_all_vdev: is pattern match is enable/disable
  1214. * @pGetRssiReq: get RSSI request
  1215. * @thermal_mgmt_info: Thermal mitigation related info
  1216. * @roam_offload_enabled: is roam offload enable/disable
  1217. * @ol_ini_info: store ini status of arp offload, ns offload
  1218. * @ssdp: ssdp flag
  1219. * @enable_mc_list : To Check if Multicast list filtering is enabled in FW
  1220. * @ibss_started: is IBSS started or not
  1221. * @ibsskey_info: IBSS key info
  1222. * @dfs_ic: DFS umac interface information
  1223. * @hddTxFailCb: tx fail indication callback
  1224. * @pno_wake_lock: PNO wake lock
  1225. * @extscan_wake_lock: extscan wake lock
  1226. * @wow_wake_lock: wow wake lock
  1227. * @wow_nack: wow negative ack flag
  1228. * @ap_client_cnt: ap client count
  1229. * @is_wow_bus_suspended: is wow bus suspended flag
  1230. * @wma_scan_comp_timer: scan completion timer
  1231. * @dfs_phyerr_filter_offload: dfs phy error filter is offloaded or not
  1232. * @suitable_ap_hb_failure: better ap found
  1233. * @wma_ibss_power_save_params: IBSS Power Save config Parameters
  1234. * @IsRArateLimitEnabled: RA rate limiti s enabled or not
  1235. * @RArateLimitInterval: RA rate limit interval
  1236. * @is_lpass_enabled: Flag to indicate if LPASS feature is enabled or not
  1237. * @is_nan_enabled: Flag to indicate if NaN feature is enabled or not
  1238. * @staMaxLIModDtim: station max listen interval
  1239. * @staModDtim: station mode DTIM
  1240. * @staDynamicDtim: station dynamic DTIM
  1241. * @enable_mhf_offload: is MHF offload enable/disable
  1242. * @last_mhf_entries_timestamp: timestamp when last entries where set
  1243. * @dfs_pri_multiplier: DFS multiplier
  1244. * @hw_bd_id: hardware board id
  1245. * @hw_bd_info: hardware board info
  1246. * @in_d0wow: D0WOW is enable/disable
  1247. * @miracast_value: miracast value
  1248. * @log_completion_timer: log completion timer
  1249. * @mgmt_rx: management rx callback
  1250. * @num_dbs_hw_modes: Number of HW modes supported by the FW
  1251. * @dbs_mode: DBS HW mode list
  1252. * @old_hw_mode_index: Previous configured HW mode index
  1253. * @new_hw_mode_index: Current configured HW mode index
  1254. * @extended_caps phy_caps: extended caps per hw mode
  1255. * @peer_authorized_cb: peer authorized hdd callback
  1256. * @ocb_callback: callback to OCB commands
  1257. * @ocb_resp: response to OCB commands
  1258. * @wow_pno_match_wake_up_count: PNO match wake up count
  1259. * @wow_pno_complete_wake_up_count: PNO complete wake up count
  1260. * @wow_gscan_wake_up_count: Gscan wake up count
  1261. * @wow_low_rssi_wake_up_count: Low rssi wake up count
  1262. * @wow_rssi_breach_wake_up_count: RSSI breach wake up count
  1263. * @wow_ucast_wake_up_count: WoW unicast packet wake up count
  1264. * @wow_bcast_wake_up_count: WoW brodcast packet wake up count
  1265. * @wow_ipv4_mcast_wake_up_count: WoW IPV4 mcast packet wake up count
  1266. * @wow_ipv6_mcast_wake_up_count: WoW IPV6 mcast packet wake up count
  1267. * @wow_ipv6_mcast_ra_stats: WoW IPV6 mcast RA packet wake up count
  1268. * @wow_ipv6_mcast_ns_stats: WoW IPV6 mcast NS packet wake up count
  1269. * @wow_ipv6_mcast_na_stats: WoW IPV6 mcast NA packet wake up count
  1270. * @wow_icmpv4_count: WoW ipv4 icmp packet wake up count
  1271. * @wow_icmpv6_count: WoW ipv6 icmp packet wake up count
  1272. * @dual_mac_cfg: Dual mac configuration params for scan and fw mode
  1273. *
  1274. * @max_scan: maximum scan requests than can be queued
  1275. * This structure is global wma context
  1276. * It contains global wma module parameters and
  1277. * handle of other modules.
  1278. * @saved_wmi_init_cmd: Saved WMI INIT command
  1279. * @bool bpf_packet_filter_enable: BPF filter enabled or not
  1280. * @service_ready_ext_evt: Wait event for service ready ext
  1281. * @wmi_cmd_rsp_wake_lock: wmi command response wake lock
  1282. * @wmi_cmd_rsp_runtime_lock: wmi command response bus lock
  1283. * @saved_chan: saved channel list sent as part of WMI_SCAN_CHAN_LIST_CMDID
  1284. */
  1285. typedef struct {
  1286. void *wmi_handle;
  1287. void *htc_handle;
  1288. void *cds_context;
  1289. void *mac_context;
  1290. qdf_event_t wma_ready_event;
  1291. qdf_event_t wma_resume_event;
  1292. qdf_event_t target_suspend;
  1293. qdf_event_t runtime_suspend;
  1294. qdf_event_t recovery_event;
  1295. uint16_t max_station;
  1296. uint16_t max_bssid;
  1297. uint32_t frame_xln_reqd;
  1298. t_wma_drv_type driver_type;
  1299. uint8_t myaddr[IEEE80211_ADDR_LEN];
  1300. uint8_t hwaddr[IEEE80211_ADDR_LEN];
  1301. wmi_abi_version target_abi_vers;
  1302. wmi_abi_version final_abi_vers;
  1303. uint32_t target_fw_version;
  1304. #ifdef WLAN_FEATURE_LPSS
  1305. uint8_t lpss_support;
  1306. #endif
  1307. uint8_t ap_arpns_support;
  1308. #ifdef FEATURE_GREEN_AP
  1309. bool egap_support;
  1310. #endif
  1311. bool wmi_ready;
  1312. uint32_t wlan_init_status;
  1313. qdf_device_t qdf_dev;
  1314. uint32_t phy_capability;
  1315. uint32_t max_frag_entry;
  1316. uint32_t wmi_service_bitmap[WMI_SERVICE_BM_SIZE];
  1317. wmi_resource_config wlan_resource_config;
  1318. uint32_t frameTransRequired;
  1319. tBssSystemRole wmaGlobalSystemRole;
  1320. pWMATxRxCompFunc tx_frm_download_comp_cb;
  1321. qdf_event_t tx_frm_download_comp_event;
  1322. /*
  1323. * Dummy event to wait for draining MSDUs left in hardware tx
  1324. * queue and before requesting VDEV_STOP. Nobody will set this
  1325. * and wait will timeout, and code will poll the pending tx
  1326. * descriptors number to be zero.
  1327. */
  1328. qdf_event_t tx_queue_empty_event;
  1329. pWMAAckFnTxComp umac_ota_ack_cb[SIR_MAC_MGMT_RESERVED15];
  1330. pWMAAckFnTxComp umac_data_ota_ack_cb;
  1331. unsigned long last_umac_data_ota_timestamp;
  1332. qdf_nbuf_t last_umac_data_nbuf;
  1333. bool needShutdown;
  1334. uint32_t num_mem_chunks;
  1335. struct wmi_host_mem_chunk mem_chunks[MAX_MEM_CHUNKS];
  1336. wma_tgt_cfg_cb tgt_cfg_update_cb;
  1337. wma_dfs_radar_indication_cb dfs_radar_indication_cb;
  1338. HAL_REG_CAPABILITIES reg_cap;
  1339. uint32_t scan_id;
  1340. struct wma_txrx_node *interfaces;
  1341. pdev_cli_config_t pdevconfig;
  1342. qdf_list_t vdev_resp_queue;
  1343. qdf_spinlock_t vdev_respq_lock;
  1344. qdf_list_t wma_hold_req_queue;
  1345. qdf_spinlock_t wma_hold_req_q_lock;
  1346. uint32_t ht_cap_info;
  1347. uint32_t vht_cap_info;
  1348. uint32_t vht_supp_mcs;
  1349. uint32_t num_rf_chains;
  1350. #if defined(QCA_WIFI_FTM)
  1351. struct utf_event_info utf_event_info;
  1352. #endif
  1353. uint8_t is_fw_assert;
  1354. struct wma_wow wow;
  1355. uint8_t no_of_suspend_ind;
  1356. uint8_t no_of_resume_ind;
  1357. /* Have a back up of arp info to send along
  1358. * with ns info suppose if ns also enabled
  1359. */
  1360. tSirHostOffloadReq mArpInfo;
  1361. struct wma_tx_ack_work_ctx *ack_work_ctx;
  1362. uint8_t powersave_mode;
  1363. bool ptrn_match_enable_all_vdev;
  1364. void *pGetRssiReq;
  1365. t_thermal_mgmt thermal_mgmt_info;
  1366. bool roam_offload_enabled;
  1367. /* Here ol_ini_info is used to store ini
  1368. * status of arp offload, ns offload
  1369. * and others. Currently 1st bit is used
  1370. * for arp off load and 2nd bit for ns
  1371. * offload currently, rest bits are unused
  1372. */
  1373. uint8_t ol_ini_info;
  1374. bool ssdp;
  1375. bool enable_mc_list;
  1376. uint8_t ibss_started;
  1377. tSetBssKeyParams ibsskey_info;
  1378. struct ieee80211com *dfs_ic;
  1379. txFailIndCallback hddTxFailCb;
  1380. #ifdef FEATURE_WLAN_SCAN_PNO
  1381. qdf_wake_lock_t pno_wake_lock;
  1382. #endif
  1383. #ifdef FEATURE_WLAN_EXTSCAN
  1384. qdf_wake_lock_t extscan_wake_lock;
  1385. #endif
  1386. qdf_wake_lock_t wow_wake_lock;
  1387. int wow_nack;
  1388. bool wow_initial_wake_up;
  1389. qdf_atomic_t is_wow_bus_suspended;
  1390. qdf_mc_timer_t wma_scan_comp_timer;
  1391. uint8_t dfs_phyerr_filter_offload;
  1392. bool suitable_ap_hb_failure;
  1393. ibss_power_save_params wma_ibss_power_save_params;
  1394. #ifdef FEATURE_WLAN_RA_FILTERING
  1395. bool IsRArateLimitEnabled;
  1396. uint16_t RArateLimitInterval;
  1397. #endif
  1398. #ifdef WLAN_FEATURE_LPSS
  1399. bool is_lpass_enabled;
  1400. #endif
  1401. #ifdef WLAN_FEATURE_NAN
  1402. bool is_nan_enabled;
  1403. #endif
  1404. uint8_t staMaxLIModDtim;
  1405. uint8_t staModDtim;
  1406. uint8_t staDynamicDtim;
  1407. uint8_t enable_mhf_offload;
  1408. unsigned long last_mhf_entries_timestamp;
  1409. int32_t dfs_pri_multiplier;
  1410. uint32_t hw_bd_id;
  1411. uint32_t hw_bd_info[HW_BD_INFO_SIZE];
  1412. uint32_t miracast_value;
  1413. qdf_mc_timer_t log_completion_timer;
  1414. wma_mgmt_frame_rx_callback mgmt_rx;
  1415. uint32_t num_dbs_hw_modes;
  1416. struct dbs_hw_mode_info hw_mode;
  1417. uint32_t old_hw_mode_index;
  1418. uint32_t new_hw_mode_index;
  1419. struct extended_caps phy_caps;
  1420. qdf_atomic_t scan_id_counter;
  1421. wma_peer_authorized_fp peer_authorized_cb;
  1422. uint32_t wow_pno_match_wake_up_count;
  1423. uint32_t wow_pno_complete_wake_up_count;
  1424. uint32_t wow_gscan_wake_up_count;
  1425. uint32_t wow_low_rssi_wake_up_count;
  1426. uint32_t wow_rssi_breach_wake_up_count;
  1427. uint32_t wow_ucast_wake_up_count;
  1428. uint32_t wow_bcast_wake_up_count;
  1429. uint32_t wow_ipv4_mcast_wake_up_count;
  1430. uint32_t wow_ipv6_mcast_wake_up_count;
  1431. uint32_t wow_ipv6_mcast_ra_stats;
  1432. uint32_t wow_ipv6_mcast_ns_stats;
  1433. uint32_t wow_ipv6_mcast_na_stats;
  1434. uint32_t wow_icmpv4_count;
  1435. uint32_t wow_icmpv6_count;
  1436. uint32_t wow_oem_response_wake_up_count;
  1437. /* OCB request contexts */
  1438. struct sir_ocb_config *ocb_config_req;
  1439. struct dual_mac_config dual_mac_cfg;
  1440. struct {
  1441. uint16_t pool_size;
  1442. uint16_t num_free;
  1443. union wmi_desc_elem_t *array;
  1444. union wmi_desc_elem_t *freelist;
  1445. qdf_spinlock_t wmi_desc_pool_lock;
  1446. } wmi_desc_pool;
  1447. uint8_t max_scan;
  1448. uint16_t self_gen_frm_pwr;
  1449. bool tx_chain_mask_cck;
  1450. /* Going with a timer instead of wait event because on receiving the
  1451. * service ready event, we will be waiting on the MC thread for the
  1452. * service extended ready event which is also processed in MC thread.
  1453. * This leads to MC thread being stuck. Alternative was to process
  1454. * these events in tasklet/workqueue context. But, this leads to
  1455. * race conditions when the events are processed in two different
  1456. * context. So, processing ready event and extended ready event in
  1457. * the serialized MC thread context with a timer.
  1458. */
  1459. qdf_mc_timer_t service_ready_ext_timer;
  1460. #ifdef WLAN_FEATURE_ROAM_OFFLOAD
  1461. void (*csr_roam_synch_cb)(tpAniSirGlobal mac,
  1462. roam_offload_synch_ind *roam_synch_data,
  1463. tpSirBssDescription bss_desc_ptr,
  1464. enum sir_roam_op_code reason);
  1465. QDF_STATUS (*pe_roam_synch_cb)(tpAniSirGlobal mac,
  1466. roam_offload_synch_ind *roam_synch_data,
  1467. tpSirBssDescription bss_desc_ptr);
  1468. #endif
  1469. qdf_wake_lock_t wmi_cmd_rsp_wake_lock;
  1470. qdf_runtime_lock_t wmi_cmd_rsp_runtime_lock;
  1471. qdf_runtime_lock_t wma_runtime_resume_lock;
  1472. uint32_t fine_time_measurement_cap;
  1473. bool bpf_enabled;
  1474. bool bpf_packet_filter_enable;
  1475. struct wma_ini_config ini_config;
  1476. struct wma_valid_channels saved_chan;
  1477. /* NAN datapath support enabled in firmware */
  1478. bool nan_datapath_enabled;
  1479. QDF_STATUS (*pe_ndp_event_handler)(tpAniSirGlobal mac_ctx,
  1480. cds_msg_t *msg);
  1481. bool sub_20_support;
  1482. } t_wma_handle, *tp_wma_handle;
  1483. /**
  1484. * struct wma_target_cap - target capabality
  1485. * @wmi_service_bitmap: wmi services bitmap
  1486. * @wlan_resource_config: resource config
  1487. */
  1488. struct wma_target_cap {
  1489. /* wmi services bitmap received from Target */
  1490. uint32_t wmi_service_bitmap[WMI_SERVICE_BM_SIZE];
  1491. /* default resource config,the os shim can overwrite it */
  1492. wmi_resource_config wlan_resource_config;
  1493. };
  1494. /**
  1495. * struct t_wma_start_req - wma start request parameters
  1496. * @pConfigBuffer: config buffer
  1497. * @usConfigBufferLen: Length of the config buffer above
  1498. * @driver_type: Production or FTM driver
  1499. * @pUserData: user data
  1500. * @pIndUserData: indication function pointer to send to UMAC
  1501. *
  1502. * The shared memory between WDI and HAL is 4K so maximum data can be
  1503. * transferred from WDI to HAL is 4K
  1504. */
  1505. typedef struct {
  1506. void *pConfigBuffer;
  1507. uint16_t usConfigBufferLen;
  1508. t_wma_drv_type driver_type;
  1509. void *pUserData;
  1510. void *pIndUserData;
  1511. } t_wma_start_req;
  1512. /* Enumeration for Version */
  1513. typedef enum {
  1514. WLAN_HAL_MSG_VERSION0 = 0,
  1515. WLAN_HAL_MSG_VERSION1 = 1,
  1516. WLAN_HAL_MSG_WCNSS_CTRL_VERSION = 0x7FFF, /*define as 2 bytes data */
  1517. WLAN_HAL_MSG_VERSION_MAX_FIELD = WLAN_HAL_MSG_WCNSS_CTRL_VERSION
  1518. } tHalHostMsgVersion;
  1519. /**
  1520. * struct sHalMacStartParameter - mac start request parameters
  1521. * @driverType: driver type (production/FTM)
  1522. * @uConfigBufferLen: length of config buffer
  1523. */
  1524. typedef struct qdf_packed sHalMacStartParameter {
  1525. tDriverType driverType;
  1526. uint32_t uConfigBufferLen;
  1527. /* Following this there is a TLV formatted buffer of length
  1528. * "uConfigBufferLen" bytes containing all config values.
  1529. * The TLV is expected to be formatted like this:
  1530. * 0 15 31 31+CFG_LEN-1 length-1
  1531. * | CFG_ID | CFG_LEN | CFG_BODY | CFG_ID |......|
  1532. */
  1533. } tHalMacStartParameter, *tpHalMacStartParameter;
  1534. extern void cds_wma_complete_cback(void *p_cds_context);
  1535. extern void wma_send_regdomain_info_to_fw(uint32_t reg_dmn, uint16_t regdmn2G,
  1536. uint16_t regdmn5G, int8_t ctl2G,
  1537. int8_t ctl5G);
  1538. /**
  1539. * enum frame_index - Frame index
  1540. * @GENERIC_NODOWNLD_NOACK_COMP_INDEX: Frame index for no download comp no ack
  1541. * @GENERIC_DOWNLD_COMP_NOACK_COMP_INDEX: Frame index for download comp no ack
  1542. * @GENERIC_DOWNLD_COMP_ACK_COMP_INDEX: Frame index for download comp and ack
  1543. * @GENERIC_NODOWLOAD_ACK_COMP_INDEX: Frame index for no download comp and ack
  1544. * @FRAME_INDEX_MAX: maximum frame index
  1545. */
  1546. enum frame_index {
  1547. GENERIC_NODOWNLD_NOACK_COMP_INDEX,
  1548. GENERIC_DOWNLD_COMP_NOACK_COMP_INDEX,
  1549. GENERIC_DOWNLD_COMP_ACK_COMP_INDEX,
  1550. GENERIC_NODOWLOAD_ACK_COMP_INDEX,
  1551. FRAME_INDEX_MAX
  1552. };
  1553. /**
  1554. * struct wma_tx_ack_work_ctx - tx ack work context
  1555. * @wma_handle: wma handle
  1556. * @sub_type: sub type
  1557. * @status: status
  1558. * @ack_cmp_work: work structure
  1559. */
  1560. struct wma_tx_ack_work_ctx {
  1561. tp_wma_handle wma_handle;
  1562. uint16_t sub_type;
  1563. int32_t status;
  1564. qdf_work_t ack_cmp_work;
  1565. };
  1566. /**
  1567. * struct wma_target_req - target request parameters
  1568. * @event_timeout: event timeout
  1569. * @node: list
  1570. * @user_data: user data
  1571. * @msg_type: message type
  1572. * @vdev_id: vdev id
  1573. * @type: type
  1574. */
  1575. struct wma_target_req {
  1576. qdf_mc_timer_t event_timeout;
  1577. qdf_list_node_t node;
  1578. void *user_data;
  1579. uint32_t msg_type;
  1580. uint8_t vdev_id;
  1581. uint8_t type;
  1582. };
  1583. /**
  1584. * struct wma_vdev_start_req - vdev start request parameters
  1585. * @beacon_intval: beacon interval
  1586. * @dtim_period: dtim period
  1587. * @max_txpow: max tx power
  1588. * @chan_offset: channel offset
  1589. * @is_dfs: is dfs supported or not
  1590. * @vdev_id: vdev id
  1591. * @chan: channel
  1592. * @oper_mode: operating mode
  1593. * @ssid: ssid
  1594. * @hidden_ssid: hidden ssid
  1595. * @pmf_enabled: is pmf enabled or not
  1596. * @vht_capable: VHT capabality
  1597. * @ht_capable: HT capabality
  1598. * @dfs_pri_multiplier: DFS multiplier
  1599. * @dot11_mode: 802.11 mode
  1600. * @is_half_rate: is the channel operating at 10MHz
  1601. * @is_quarter_rate: is the channel operating at 5MHz
  1602. * @preferred_tx_streams: policy manager indicates the preferred
  1603. * number of transmit streams
  1604. * @preferred_rx_streams: policy manager indicates the preferred
  1605. * number of receive streams
  1606. */
  1607. struct wma_vdev_start_req {
  1608. uint32_t beacon_intval;
  1609. uint32_t dtim_period;
  1610. int32_t max_txpow;
  1611. enum phy_ch_width chan_width;
  1612. bool is_dfs;
  1613. uint8_t vdev_id;
  1614. uint8_t chan;
  1615. uint8_t oper_mode;
  1616. tSirMacSSid ssid;
  1617. uint8_t hidden_ssid;
  1618. uint8_t pmf_enabled;
  1619. uint8_t vht_capable;
  1620. uint8_t ch_center_freq_seg0;
  1621. uint8_t ch_center_freq_seg1;
  1622. uint8_t ht_capable;
  1623. int32_t dfs_pri_multiplier;
  1624. uint8_t dot11_mode;
  1625. bool is_half_rate;
  1626. bool is_quarter_rate;
  1627. uint32_t preferred_tx_streams;
  1628. uint32_t preferred_rx_streams;
  1629. uint8_t beacon_tx_rate;
  1630. };
  1631. /**
  1632. * struct wma_set_key_params - set key parameters
  1633. * @vdev_id: vdev id
  1634. * @def_key_idx: used to see if we have to read the key from cfg
  1635. * @key_len: key length
  1636. * @peer_mac: peer mac address
  1637. * @singl_tid_rc: 1=Single TID based Replay Count, 0=Per TID based RC
  1638. * @key_type: key type
  1639. * @key_idx: key index
  1640. * @unicast: unicast flag
  1641. * @key_data: key data
  1642. */
  1643. struct wma_set_key_params {
  1644. uint8_t vdev_id;
  1645. /* def_key_idx can be used to see if we have to read the key from cfg */
  1646. uint32_t def_key_idx;
  1647. uint16_t key_len;
  1648. uint8_t peer_mac[IEEE80211_ADDR_LEN];
  1649. uint8_t singl_tid_rc;
  1650. enum eAniEdType key_type;
  1651. uint32_t key_idx;
  1652. bool unicast;
  1653. uint8_t key_data[SIR_MAC_MAX_KEY_LENGTH];
  1654. };
  1655. /**
  1656. * struct t_thermal_cmd_params - thermal command parameters
  1657. * @minTemp: minimum temprature
  1658. * @maxTemp: maximum temprature
  1659. * @thermalEnable: thermal enable
  1660. */
  1661. typedef struct {
  1662. uint16_t minTemp;
  1663. uint16_t maxTemp;
  1664. uint8_t thermalEnable;
  1665. } t_thermal_cmd_params, *tp_thermal_cmd_params;
  1666. /**
  1667. * enum wma_cfg_cmd_id - wma cmd ids
  1668. * @WMA_VDEV_TXRX_FWSTATS_ENABLE_CMDID: txrx firmware stats enable command
  1669. * @WMA_VDEV_TXRX_FWSTATS_RESET_CMDID: txrx firmware stats reset command
  1670. * @WMA_VDEV_MCC_SET_TIME_LATENCY: set MCC latency time
  1671. * @WMA_VDEV_MCC_SET_TIME_QUOTA: set MCC time quota
  1672. * @WMA_VDEV_IBSS_SET_ATIM_WINDOW_SIZE: set IBSS ATIM window size
  1673. * @WMA_VDEV_IBSS_SET_POWER_SAVE_ALLOWED: set IBSS enable power save
  1674. * @WMA_VDEV_IBSS_SET_POWER_COLLAPSE_ALLOWED: set IBSS power collapse enable
  1675. * @WMA_VDEV_IBSS_SET_AWAKE_ON_TX_RX: awake IBSS on TX/RX
  1676. * @WMA_VDEV_IBSS_SET_INACTIVITY_TIME: set IBSS inactivity time
  1677. * @WMA_VDEV_IBSS_SET_TXSP_END_INACTIVITY_TIME: set IBSS TXSP
  1678. * @WMA_VDEV_IBSS_PS_SET_WARMUP_TIME_SECS: set IBSS power save warmup time
  1679. * @WMA_VDEV_IBSS_PS_SET_1RX_CHAIN_IN_ATIM_WINDOW: set IBSS power save ATIM
  1680. * @WMA_VDEV_DFS_CONTROL_CMDID: DFS control command
  1681. * @WMA_VDEV_TXRX_GET_IPA_UC_FW_STATS_CMDID: get IPA microcontroller fw stats
  1682. *
  1683. * wma command ids for configuration request which
  1684. * does not involve sending a wmi command.
  1685. */
  1686. enum wma_cfg_cmd_id {
  1687. WMA_VDEV_TXRX_FWSTATS_ENABLE_CMDID = WMI_CMDID_MAX,
  1688. WMA_VDEV_TXRX_FWSTATS_RESET_CMDID,
  1689. WMA_VDEV_MCC_SET_TIME_LATENCY,
  1690. WMA_VDEV_MCC_SET_TIME_QUOTA,
  1691. WMA_VDEV_IBSS_SET_ATIM_WINDOW_SIZE,
  1692. WMA_VDEV_IBSS_SET_POWER_SAVE_ALLOWED,
  1693. WMA_VDEV_IBSS_SET_POWER_COLLAPSE_ALLOWED,
  1694. WMA_VDEV_IBSS_SET_AWAKE_ON_TX_RX,
  1695. WMA_VDEV_IBSS_SET_INACTIVITY_TIME,
  1696. WMA_VDEV_IBSS_SET_TXSP_END_INACTIVITY_TIME,
  1697. WMA_VDEV_IBSS_PS_SET_WARMUP_TIME_SECS,
  1698. WMA_VDEV_IBSS_PS_SET_1RX_CHAIN_IN_ATIM_WINDOW,
  1699. WMA_VDEV_DFS_CONTROL_CMDID,
  1700. WMA_VDEV_TXRX_GET_IPA_UC_FW_STATS_CMDID,
  1701. WMA_CMD_ID_MAX
  1702. };
  1703. /**
  1704. * struct wma_trigger_uapsd_params - trigger uapsd parameters
  1705. * @wmm_ac: wmm access catagory
  1706. * @user_priority: user priority
  1707. * @service_interval: service interval
  1708. * @suspend_interval: suspend interval
  1709. * @delay_interval: delay interval
  1710. */
  1711. typedef struct wma_trigger_uapsd_params {
  1712. uint32_t wmm_ac;
  1713. uint32_t user_priority;
  1714. uint32_t service_interval;
  1715. uint32_t suspend_interval;
  1716. uint32_t delay_interval;
  1717. } t_wma_trigger_uapsd_params, *tp_wma_trigger_uapsd_params;
  1718. /**
  1719. * enum uapsd_peer_param_max_sp - U-APSD maximum service period of peer station
  1720. * @UAPSD_MAX_SP_LEN_UNLIMITED: unlimited max service period
  1721. * @UAPSD_MAX_SP_LEN_2: max service period = 2
  1722. * @UAPSD_MAX_SP_LEN_4: max service period = 4
  1723. * @UAPSD_MAX_SP_LEN_6: max service period = 6
  1724. */
  1725. enum uapsd_peer_param_max_sp {
  1726. UAPSD_MAX_SP_LEN_UNLIMITED = 0,
  1727. UAPSD_MAX_SP_LEN_2 = 2,
  1728. UAPSD_MAX_SP_LEN_4 = 4,
  1729. UAPSD_MAX_SP_LEN_6 = 6
  1730. };
  1731. /**
  1732. * enum uapsd_peer_param_enabled_ac - U-APSD Enabled AC's of peer station
  1733. * @UAPSD_VO_ENABLED: enable uapsd for voice
  1734. * @UAPSD_VI_ENABLED: enable uapsd for video
  1735. * @UAPSD_BK_ENABLED: enable uapsd for background
  1736. * @UAPSD_BE_ENABLED: enable uapsd for best effort
  1737. */
  1738. enum uapsd_peer_param_enabled_ac {
  1739. UAPSD_VO_ENABLED = 0x01,
  1740. UAPSD_VI_ENABLED = 0x02,
  1741. UAPSD_BK_ENABLED = 0x04,
  1742. UAPSD_BE_ENABLED = 0x08
  1743. };
  1744. /**
  1745. * enum profile_id_t - Firmware profiling index
  1746. * @PROF_CPU_IDLE: cpu idle profile
  1747. * @PROF_PPDU_PROC: ppdu processing profile
  1748. * @PROF_PPDU_POST: ppdu post profile
  1749. * @PROF_HTT_TX_INPUT: htt tx input profile
  1750. * @PROF_MSDU_ENQ: msdu enqueue profile
  1751. * @PROF_PPDU_POST_HAL: ppdu post profile
  1752. * @PROF_COMPUTE_TX_TIME: tx time profile
  1753. * @PROF_MAX_ID: max profile index
  1754. */
  1755. enum profile_id_t {
  1756. PROF_CPU_IDLE,
  1757. PROF_PPDU_PROC,
  1758. PROF_PPDU_POST,
  1759. PROF_HTT_TX_INPUT,
  1760. PROF_MSDU_ENQ,
  1761. PROF_PPDU_POST_HAL,
  1762. PROF_COMPUTE_TX_TIME,
  1763. PROF_MAX_ID,
  1764. };
  1765. /**
  1766. * struct p2p_ie - P2P IE structural definition.
  1767. * @p2p_id: p2p id
  1768. * @p2p_len: p2p length
  1769. * @p2p_oui: p2p OUI
  1770. * @p2p_oui_type: p2p OUI type
  1771. */
  1772. struct p2p_ie {
  1773. uint8_t p2p_id;
  1774. uint8_t p2p_len;
  1775. uint8_t p2p_oui[3];
  1776. uint8_t p2p_oui_type;
  1777. } __packed;
  1778. /**
  1779. * struct p2p_noa_descriptor - noa descriptor
  1780. * @type_count: 255: continuous schedule, 0: reserved
  1781. * @duration: Absent period duration in micro seconds
  1782. * @interval: Absent period interval in micro seconds
  1783. * @start_time: 32 bit tsf time when in starts
  1784. */
  1785. struct p2p_noa_descriptor {
  1786. uint8_t type_count;
  1787. uint32_t duration;
  1788. uint32_t interval;
  1789. uint32_t start_time;
  1790. } __packed;
  1791. /**
  1792. * struct p2p_sub_element_noa - p2p noa element
  1793. * @p2p_sub_id: p2p sub id
  1794. * @p2p_sub_len: p2p sub length
  1795. * @index: identifies instance of NOA su element
  1796. * @oppPS: oppPS state of the AP
  1797. * @ctwindow: ctwindow in TUs
  1798. * @num_descriptors: number of NOA descriptors
  1799. * @noa_descriptors: noa descriptors
  1800. */
  1801. struct p2p_sub_element_noa {
  1802. uint8_t p2p_sub_id;
  1803. uint8_t p2p_sub_len;
  1804. uint8_t index; /* identifies instance of NOA su element */
  1805. uint8_t oppPS:1, /* oppPS state of the AP */
  1806. ctwindow:7; /* ctwindow in TUs */
  1807. uint8_t num_descriptors; /* number of NOA descriptors */
  1808. struct p2p_noa_descriptor noa_descriptors[WMA_MAX_NOA_DESCRIPTORS];
  1809. };
  1810. /**
  1811. * struct wma_decap_info_t - decapsulation info
  1812. * @hdr: header
  1813. * @hdr_len: header length
  1814. */
  1815. struct wma_decap_info_t {
  1816. uint8_t hdr[sizeof(struct ieee80211_qosframe_addr4)];
  1817. int32_t hdr_len;
  1818. };
  1819. /**
  1820. * enum packet_power_save - packet power save params
  1821. * @WMI_VDEV_PPS_PAID_MATCH: paid match param
  1822. * @WMI_VDEV_PPS_GID_MATCH: gid match param
  1823. * @WMI_VDEV_PPS_EARLY_TIM_CLEAR: early tim clear param
  1824. * @WMI_VDEV_PPS_EARLY_DTIM_CLEAR: early dtim clear param
  1825. * @WMI_VDEV_PPS_EOF_PAD_DELIM: eof pad delim param
  1826. * @WMI_VDEV_PPS_MACADDR_MISMATCH: macaddr mismatch param
  1827. * @WMI_VDEV_PPS_DELIM_CRC_FAIL: delim CRC fail param
  1828. * @WMI_VDEV_PPS_GID_NSTS_ZERO: gid nsts zero param
  1829. * @WMI_VDEV_PPS_RSSI_CHECK: RSSI check param
  1830. * @WMI_VDEV_PPS_5G_EBT: 5G ebt param
  1831. */
  1832. typedef enum {
  1833. WMI_VDEV_PPS_PAID_MATCH = 0,
  1834. WMI_VDEV_PPS_GID_MATCH = 1,
  1835. WMI_VDEV_PPS_EARLY_TIM_CLEAR = 2,
  1836. WMI_VDEV_PPS_EARLY_DTIM_CLEAR = 3,
  1837. WMI_VDEV_PPS_EOF_PAD_DELIM = 4,
  1838. WMI_VDEV_PPS_MACADDR_MISMATCH = 5,
  1839. WMI_VDEV_PPS_DELIM_CRC_FAIL = 6,
  1840. WMI_VDEV_PPS_GID_NSTS_ZERO = 7,
  1841. WMI_VDEV_PPS_RSSI_CHECK = 8,
  1842. WMI_VDEV_VHT_SET_GID_MGMT = 9,
  1843. WMI_VDEV_PPS_5G_EBT = 10
  1844. } packet_power_save;
  1845. /**
  1846. * enum green_tx_param - green tx parameters
  1847. * @WMI_VDEV_PARAM_GTX_HT_MCS: ht mcs param
  1848. * @WMI_VDEV_PARAM_GTX_VHT_MCS: vht mcs param
  1849. * @WMI_VDEV_PARAM_GTX_USR_CFG: user cfg param
  1850. * @WMI_VDEV_PARAM_GTX_THRE: thre param
  1851. * @WMI_VDEV_PARAM_GTX_MARGIN: green tx margin param
  1852. * @WMI_VDEV_PARAM_GTX_STEP: green tx step param
  1853. * @WMI_VDEV_PARAM_GTX_MINTPC: mintpc param
  1854. * @WMI_VDEV_PARAM_GTX_BW_MASK: bandwidth mask
  1855. */
  1856. typedef enum {
  1857. WMI_VDEV_PARAM_GTX_HT_MCS,
  1858. WMI_VDEV_PARAM_GTX_VHT_MCS,
  1859. WMI_VDEV_PARAM_GTX_USR_CFG,
  1860. WMI_VDEV_PARAM_GTX_THRE,
  1861. WMI_VDEV_PARAM_GTX_MARGIN,
  1862. WMI_VDEV_PARAM_GTX_STEP,
  1863. WMI_VDEV_PARAM_GTX_MINTPC,
  1864. WMI_VDEV_PARAM_GTX_BW_MASK,
  1865. } green_tx_param;
  1866. #ifdef FEATURE_WLAN_TDLS
  1867. /**
  1868. * struct wma_tdls_params - TDLS parameters
  1869. * @vdev_id: vdev id
  1870. * @tdls_state: TDLS state
  1871. * @notification_interval_ms: notification inerval
  1872. * @tx_discovery_threshold: tx discovery threshold
  1873. * @tx_teardown_threshold: tx teardown threashold
  1874. * @rssi_teardown_threshold: RSSI teardown threshold
  1875. * @rssi_delta: RSSI delta
  1876. * @tdls_options: TDLS options
  1877. * @peer_traffic_ind_window: raffic indication window
  1878. * @peer_traffic_response_timeout: traffic response timeout
  1879. * @puapsd_mask: uapsd mask
  1880. * @puapsd_inactivity_time: uapsd inactivity time
  1881. * @puapsd_rx_frame_threshold: uapsd rx frame threshold
  1882. * @teardown_notification_ms: tdls teardown notification interval
  1883. * @tdls_peer_kickout_threshold: tdls packet threshold for
  1884. * peer kickout operation
  1885. */
  1886. typedef struct wma_tdls_params {
  1887. uint32_t vdev_id;
  1888. uint32_t tdls_state;
  1889. uint32_t notification_interval_ms;
  1890. uint32_t tx_discovery_threshold;
  1891. uint32_t tx_teardown_threshold;
  1892. int32_t rssi_teardown_threshold;
  1893. int32_t rssi_delta;
  1894. uint32_t tdls_options;
  1895. uint32_t peer_traffic_ind_window;
  1896. uint32_t peer_traffic_response_timeout;
  1897. uint32_t puapsd_mask;
  1898. uint32_t puapsd_inactivity_time;
  1899. uint32_t puapsd_rx_frame_threshold;
  1900. uint32_t teardown_notification_ms;
  1901. uint32_t tdls_peer_kickout_threshold;
  1902. } t_wma_tdls_params;
  1903. /**
  1904. * struct wma_tdls_peer_event - TDLS peer event
  1905. * @vdev_id: vdev id
  1906. * @peer_macaddr: peer MAC address
  1907. * @peer_status: TDLS peer status
  1908. * @peer_reason: TDLS peer reason
  1909. */
  1910. typedef struct {
  1911. A_UINT32 vdev_id;
  1912. wmi_mac_addr peer_macaddr;
  1913. A_UINT32 peer_status;
  1914. A_UINT32 peer_reason;
  1915. } wma_tdls_peer_event;
  1916. #endif /* FEATURE_WLAN_TDLS */
  1917. /**
  1918. * struct wma_dfs_radar_channel_list - dfs radar channel list
  1919. * @nchannels: nuber of channels
  1920. * @channels: Channel number including bonded channels on which
  1921. * radar is present
  1922. */
  1923. struct wma_dfs_radar_channel_list {
  1924. A_UINT32 nchannels;
  1925. uint8_t channels[WMA_DFS_MAX_20M_SUB_CH];
  1926. };
  1927. /**
  1928. * struct wma_dfs_radar_indication - Structure to indicate RADAR
  1929. * @vdev_id: vdev id
  1930. * @chan_list: Channel list on which RADAR is detected
  1931. * @dfs_radar_status: Flag to Indicate RADAR presence on the current channel
  1932. * @use_nol: Flag to indicate use NOL
  1933. */
  1934. struct wma_dfs_radar_indication {
  1935. A_UINT32 vdev_id;
  1936. struct wma_dfs_radar_channel_list chan_list;
  1937. uint32_t dfs_radar_status;
  1938. int use_nol;
  1939. };
  1940. /**
  1941. * enum uapsd_ac - U-APSD Access Categories
  1942. * @UAPSD_BE: best effort
  1943. * @UAPSD_BK: back ground
  1944. * @UAPSD_VI: video
  1945. * @UAPSD_VO: voice
  1946. */
  1947. enum uapsd_ac {
  1948. UAPSD_BE,
  1949. UAPSD_BK,
  1950. UAPSD_VI,
  1951. UAPSD_VO
  1952. };
  1953. QDF_STATUS wma_disable_uapsd_per_ac(tp_wma_handle wma_handle,
  1954. uint32_t vdev_id, enum uapsd_ac ac);
  1955. /**
  1956. * enum uapsd_up - U-APSD User Priorities
  1957. * @UAPSD_UP_BE: best effort
  1958. * @UAPSD_UP_BK: back ground
  1959. * @UAPSD_UP_RESV: reserve
  1960. * @UAPSD_UP_EE: Excellent Effort
  1961. * @UAPSD_UP_CL: Critical Applications
  1962. * @UAPSD_UP_VI: video
  1963. * @UAPSD_UP_VO: voice
  1964. * @UAPSD_UP_NC: Network Control
  1965. */
  1966. enum uapsd_up {
  1967. UAPSD_UP_BE,
  1968. UAPSD_UP_BK,
  1969. UAPSD_UP_RESV,
  1970. UAPSD_UP_EE,
  1971. UAPSD_UP_CL,
  1972. UAPSD_UP_VI,
  1973. UAPSD_UP_VO,
  1974. UAPSD_UP_NC,
  1975. UAPSD_UP_MAX
  1976. };
  1977. /**
  1978. * struct wma_unit_test_cmd - unit test command parameters
  1979. * @vdev_id: vdev id
  1980. * @module_id: module id
  1981. * @num_args: number of arguments
  1982. * @args: arguments
  1983. */
  1984. typedef struct wma_unit_test_cmd {
  1985. uint32_t vdev_id;
  1986. WLAN_MODULE_ID module_id;
  1987. uint32_t num_args;
  1988. uint32_t args[WMA_MAX_NUM_ARGS];
  1989. } t_wma_unit_test_cmd;
  1990. /**
  1991. * struct wma_roam_invoke_cmd - roam invoke command
  1992. * @vdev_id: vdev id
  1993. * @bssid: mac address
  1994. * @channel: channel
  1995. */
  1996. struct wma_roam_invoke_cmd {
  1997. uint32_t vdev_id;
  1998. uint8_t bssid[IEEE80211_ADDR_LEN];
  1999. uint32_t channel;
  2000. };
  2001. /**
  2002. * struct wma_process_fw_event_params - fw event parameters
  2003. * @wmi_handle: wmi handle
  2004. * @evt_buf: event buffer
  2005. */
  2006. typedef struct {
  2007. void *wmi_handle;
  2008. void *evt_buf;
  2009. } wma_process_fw_event_params;
  2010. int wma_process_fw_event_handler(void *ctx, void *ev, uint8_t rx_ctx);
  2011. A_UINT32 e_csr_auth_type_to_rsn_authmode(eCsrAuthType authtype,
  2012. eCsrEncryptionType encr);
  2013. A_UINT32 e_csr_encryption_type_to_rsn_cipherset(eCsrEncryptionType encr);
  2014. /*
  2015. * WMA-DFS Hooks
  2016. */
  2017. int ol_if_dfs_attach(struct ieee80211com *ic, void *ptr, void *radar_info);
  2018. uint64_t ol_if_get_tsf64(struct ieee80211com *ic);
  2019. int ol_if_dfs_disable(struct ieee80211com *ic);
  2020. struct dfs_ieee80211_channel *ieee80211_find_channel(struct ieee80211com *ic,
  2021. int freq, uint32_t flags);
  2022. int ol_if_dfs_enable(struct ieee80211com *ic, int *is_fastclk, void *pe);
  2023. uint32_t ieee80211_ieee2mhz(uint32_t chan, uint32_t flags);
  2024. int ol_if_dfs_get_ext_busy(struct ieee80211com *ic);
  2025. int ol_if_dfs_get_mib_cycle_counts_pct(struct ieee80211com *ic,
  2026. uint32_t *rxc_pcnt, uint32_t *rxf_pcnt,
  2027. uint32_t *txf_pcnt);
  2028. uint16_t ol_if_dfs_usenol(struct ieee80211com *ic);
  2029. void ieee80211_mark_dfs(struct ieee80211com *ic,
  2030. struct dfs_ieee80211_channel *ichan);
  2031. int wma_dfs_indicate_radar(struct ieee80211com *ic,
  2032. struct dfs_ieee80211_channel *ichan);
  2033. uint16_t dfs_usenol(struct ieee80211com *ic);
  2034. QDF_STATUS wma_trigger_uapsd_params(tp_wma_handle wma_handle, uint32_t vdev_id,
  2035. tp_wma_trigger_uapsd_params
  2036. trigger_uapsd_params);
  2037. /* added to get average snr for both data and beacon */
  2038. QDF_STATUS wma_send_snr_request(tp_wma_handle wma_handle, void *pGetRssiReq);
  2039. QDF_STATUS wma_update_vdev_tbl(tp_wma_handle wma_handle, uint8_t vdev_id,
  2040. ol_txrx_vdev_handle tx_rx_vdev_handle,
  2041. uint8_t *mac, uint32_t vdev_type, bool add_del);
  2042. void wma_send_flush_logs_to_fw(tp_wma_handle wma_handle);
  2043. void wma_log_completion_timeout(void *data);
  2044. QDF_STATUS wma_set_rssi_monitoring(tp_wma_handle wma,
  2045. struct rssi_monitor_req *req);
  2046. QDF_STATUS wma_send_pdev_set_pcl_cmd(tp_wma_handle wma_handle,
  2047. struct wmi_pcl_chan_weights *msg);
  2048. QDF_STATUS wma_send_pdev_set_hw_mode_cmd(tp_wma_handle wma_handle,
  2049. struct sir_hw_mode *msg);
  2050. QDF_STATUS wma_get_scan_id(uint32_t *scan_id);
  2051. QDF_STATUS wma_send_pdev_set_dual_mac_config(tp_wma_handle wma_handle,
  2052. struct sir_dual_mac_config *msg);
  2053. QDF_STATUS wma_send_pdev_set_antenna_mode(tp_wma_handle wma_handle,
  2054. struct sir_antenna_mode_param *msg);
  2055. QDF_STATUS wma_crash_inject(tp_wma_handle wma_handle, uint32_t type,
  2056. uint32_t delay_time_ms);
  2057. struct wma_target_req *wma_fill_vdev_req(tp_wma_handle wma,
  2058. uint8_t vdev_id,
  2059. uint32_t msg_type, uint8_t type,
  2060. void *params, uint32_t timeout);
  2061. struct wma_target_req *wma_fill_hold_req(tp_wma_handle wma,
  2062. uint8_t vdev_id, uint32_t msg_type,
  2063. uint8_t type, void *params,
  2064. uint32_t timeout);
  2065. QDF_STATUS wma_vdev_start(tp_wma_handle wma,
  2066. struct wma_vdev_start_req *req, bool isRestart);
  2067. void wma_remove_vdev_req(tp_wma_handle wma, uint8_t vdev_id,
  2068. uint8_t type);
  2069. int wmi_desc_pool_init(tp_wma_handle wma_handle, uint32_t pool_size);
  2070. void wmi_desc_pool_deinit(tp_wma_handle wma_handle);
  2071. struct wmi_desc_t *wmi_desc_get(tp_wma_handle wma_handle);
  2072. void wmi_desc_put(tp_wma_handle wma_handle, struct wmi_desc_t *wmi_desc);
  2073. int wma_mgmt_tx_completion_handler(void *handle, uint8_t *cmpl_event_params,
  2074. uint32_t len);
  2075. int wma_mgmt_tx_bundle_completion_handler(void *handle,
  2076. uint8_t *cmpl_event_params, uint32_t len);
  2077. void wma_set_dfs_region(tp_wma_handle wma, enum dfs_region dfs_region);
  2078. uint32_t wma_get_vht_ch_width(void);
  2079. QDF_STATUS
  2080. wma_config_debug_module_cmd(wmi_unified_t wmi_handle, A_UINT32 param,
  2081. A_UINT32 val, A_UINT32 *module_id_bitmap,
  2082. A_UINT32 bitmap_len);
  2083. #ifdef FEATURE_LFR_SUBNET_DETECTION
  2084. QDF_STATUS wma_set_gateway_params(tp_wma_handle wma,
  2085. struct gateway_param_update_req *req);
  2086. #else
  2087. static inline QDF_STATUS wma_set_gateway_params(tp_wma_handle wma,
  2088. struct gateway_param_update_req *req)
  2089. {
  2090. return QDF_STATUS_SUCCESS;
  2091. }
  2092. #endif /* FEATURE_LFR_SUBNET_DETECTION */
  2093. #if defined(FEATURE_LRO)
  2094. QDF_STATUS wma_lro_config_cmd(tp_wma_handle wma_handle,
  2095. struct wma_lro_config_cmd_t *wma_lro_cmd);
  2096. #else
  2097. static inline QDF_STATUS wma_lro_config_cmd(tp_wma_handle wma_handle,
  2098. struct wma_lro_config_cmd_t *wma_lro_cmd)
  2099. {
  2100. return QDF_STATUS_SUCCESS;
  2101. }
  2102. #endif
  2103. void
  2104. wma_indicate_err(enum ol_rx_err_type err_type,
  2105. struct ol_error_info *err_info);
  2106. QDF_STATUS wma_ht40_stop_obss_scan(tp_wma_handle wma_handle,
  2107. int32_t vdev_id);
  2108. void wma_process_fw_test_cmd(WMA_HANDLE handle,
  2109. struct set_fwtest_params *wma_fwtest);
  2110. QDF_STATUS wma_send_ht40_obss_scanind(tp_wma_handle wma,
  2111. struct obss_ht40_scanind *req);
  2112. int wma_get_bpf_caps_event_handler(void *handle,
  2113. u_int8_t *cmd_param_info,
  2114. u_int32_t len);
  2115. uint32_t wma_get_num_of_setbits_from_bitmask(uint32_t mask);
  2116. QDF_STATUS wma_get_bpf_capabilities(tp_wma_handle wma);
  2117. QDF_STATUS wma_set_bpf_instructions(tp_wma_handle wma,
  2118. struct sir_bpf_set_offload *bpf_set_offload);
  2119. void wma_process_set_pdev_ie_req(tp_wma_handle wma,
  2120. struct set_ie_param *ie_params);
  2121. void wma_process_set_pdev_ht_ie_req(tp_wma_handle wma,
  2122. struct set_ie_param *ie_params);
  2123. void wma_process_set_pdev_vht_ie_req(tp_wma_handle wma,
  2124. struct set_ie_param *ie_params);
  2125. void wma_remove_peer(tp_wma_handle wma, u_int8_t *bssid,
  2126. u_int8_t vdev_id, ol_txrx_peer_handle peer,
  2127. bool roam_synch_in_progress);
  2128. QDF_STATUS wma_add_wow_wakeup_event(tp_wma_handle wma,
  2129. uint32_t vdev_id,
  2130. uint32_t bitmap,
  2131. bool enable);
  2132. QDF_STATUS wma_create_peer(tp_wma_handle wma, ol_txrx_pdev_handle pdev,
  2133. ol_txrx_vdev_handle vdev, u8 peer_addr[6],
  2134. u_int32_t peer_type, u_int8_t vdev_id,
  2135. bool roam_synch_in_progress);
  2136. #endif
  2137. struct wma_ini_config *wma_get_ini_handle(tp_wma_handle wma_handle);
  2138. WLAN_PHY_MODE wma_chan_phy_mode(u8 chan, enum phy_ch_width chan_width,
  2139. u8 dot11_mode);
  2140. #ifdef FEATURE_OEM_DATA_SUPPORT
  2141. QDF_STATUS wma_start_oem_data_req(tp_wma_handle wma_handle,
  2142. struct oem_data_req *oem_req);
  2143. #endif
  2144. QDF_STATUS wma_enable_disable_caevent_ind(tp_wma_handle wma_handle,
  2145. uint8_t val);