dp_full_mon.c 27 KB

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  1. /*
  2. * Copyright (c) 2020, The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include "dp_types.h"
  17. #include "hal_rx.h"
  18. #include "hal_api.h"
  19. #include "qdf_trace.h"
  20. #include "qdf_nbuf.h"
  21. #include "hal_api_mon.h"
  22. #include "dp_rx.h"
  23. #include "dp_rx_mon.h"
  24. #include "dp_internal.h"
  25. #include "dp_htt.h"
  26. #include "dp_full_mon.h"
  27. #include "qdf_mem.h"
  28. #ifdef QCA_SUPPORT_FULL_MON
  29. uint32_t
  30. dp_rx_mon_status_process(struct dp_soc *soc,
  31. struct dp_intr *int_ctx,
  32. uint32_t mac_id,
  33. uint32_t quota);
  34. /*
  35. * dp_rx_mon_status_buf_validate () - Validate first monitor status buffer addr
  36. * against status buf addr given in monitor destination ring
  37. *
  38. * @pdev: DP pdev handle
  39. * @int_ctx: Interrupt context
  40. * @mac_id: lmac id
  41. *
  42. * Return: QDF_STATUS
  43. */
  44. static inline enum dp_mon_reap_status
  45. dp_rx_mon_status_buf_validate(struct dp_pdev *pdev,
  46. struct dp_intr *int_ctx,
  47. uint32_t mac_id)
  48. {
  49. struct dp_soc *soc = pdev->soc;
  50. hal_soc_handle_t hal_soc;
  51. void *mon_status_srng;
  52. void *ring_entry;
  53. uint32_t rx_buf_cookie;
  54. qdf_nbuf_t status_nbuf;
  55. struct dp_rx_desc *rx_desc;
  56. uint64_t buf_paddr;
  57. struct rx_desc_pool *rx_desc_pool;
  58. uint32_t tlv_tag;
  59. void *rx_tlv;
  60. struct hal_rx_ppdu_info *ppdu_info;
  61. enum dp_mon_reap_status status = dp_mon_status_match;
  62. QDF_STATUS buf_status;
  63. uint32_t ppdu_id_diff;
  64. mon_status_srng = soc->rxdma_mon_status_ring[mac_id].hal_srng;
  65. qdf_assert(mon_status_srng);
  66. if (!mon_status_srng || !hal_srng_initialized(mon_status_srng)) {
  67. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  68. "%s %d : HAL Monitor Status Ring Init Failed -- %pK",
  69. __func__, __LINE__, mon_status_srng);
  70. QDF_ASSERT(0);
  71. return status;
  72. }
  73. hal_soc = soc->hal_soc;
  74. qdf_assert(hal_soc);
  75. if (qdf_unlikely(hal_srng_access_start(hal_soc, mon_status_srng))) {
  76. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  77. "%s %d : HAL SRNG access Failed -- %pK",
  78. __func__, __LINE__, mon_status_srng);
  79. QDF_ASSERT(0);
  80. return status;
  81. }
  82. ring_entry = hal_srng_src_peek_n_get_next(hal_soc, mon_status_srng);
  83. if (!ring_entry) {
  84. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  85. "%s %d : HAL SRNG entry is NULL srng:-- %pK",
  86. __func__, __LINE__, mon_status_srng);
  87. status = dp_mon_status_replenish;
  88. goto done;
  89. }
  90. ppdu_info = &pdev->ppdu_info;
  91. rx_desc_pool = &soc->rx_desc_status[mac_id];
  92. buf_paddr = (HAL_RX_BUFFER_ADDR_31_0_GET(ring_entry) |
  93. ((uint64_t)(HAL_RX_BUFFER_ADDR_39_32_GET(ring_entry)) << 32));
  94. if (!buf_paddr) {
  95. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  96. "%s %d : buf addr is NULL -- %pK",
  97. __func__, __LINE__, mon_status_srng);
  98. status = dp_mon_status_replenish;
  99. goto done;
  100. }
  101. rx_buf_cookie = HAL_RX_BUF_COOKIE_GET(ring_entry);
  102. rx_desc = dp_rx_cookie_2_va_mon_status(soc, rx_buf_cookie);
  103. qdf_assert(rx_desc);
  104. status_nbuf = rx_desc->nbuf;
  105. qdf_nbuf_sync_for_cpu(soc->osdev, status_nbuf,
  106. QDF_DMA_FROM_DEVICE);
  107. rx_tlv = qdf_nbuf_data(status_nbuf);
  108. buf_status = hal_get_rx_status_done(rx_tlv);
  109. /* If status buffer DMA is not done,
  110. * hold on to mon destination ring.
  111. */
  112. if (buf_status != QDF_STATUS_SUCCESS) {
  113. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  114. FL("Monitor status ring: DMA is not done "
  115. "for nbuf: %pK buf_addr: %llx"),
  116. status_nbuf, buf_paddr);
  117. pdev->rx_mon_stats.tlv_tag_status_err++;
  118. status = dp_mon_status_no_dma;
  119. goto done;
  120. }
  121. qdf_nbuf_unmap_nbytes_single(soc->osdev, status_nbuf,
  122. QDF_DMA_FROM_DEVICE,
  123. rx_desc_pool->buf_size);
  124. rx_tlv = hal_rx_status_get_next_tlv(rx_tlv);
  125. tlv_tag = HAL_RX_GET_USER_TLV32_TYPE(rx_tlv);
  126. if (tlv_tag == WIFIRX_PPDU_START_E) {
  127. rx_tlv = (uint8_t *)rx_tlv + HAL_RX_TLV32_HDR_SIZE;
  128. pdev->mon_desc->status_ppdu_id =
  129. HAL_RX_GET(rx_tlv, RX_PPDU_START_0, PHY_PPDU_ID);
  130. pdev->status_buf_addr = buf_paddr;
  131. }
  132. if (pdev->mon_desc->ppdu_id < pdev->mon_desc->status_ppdu_id) {
  133. status = dp_mon_status_lead;
  134. /* For wrap around case */
  135. ppdu_id_diff = pdev->mon_desc->status_ppdu_id -
  136. pdev->mon_desc->ppdu_id;
  137. if (ppdu_id_diff > DP_RX_MON_PPDU_ID_WRAP)
  138. status = dp_mon_status_lag;
  139. } else if (pdev->mon_desc->ppdu_id > pdev->mon_desc->status_ppdu_id) {
  140. status = dp_mon_status_lag;
  141. /* For wrap around case */
  142. ppdu_id_diff = pdev->mon_desc->ppdu_id -
  143. pdev->mon_desc->status_ppdu_id;
  144. if (ppdu_id_diff > DP_RX_MON_PPDU_ID_WRAP)
  145. status = dp_mon_status_lead;
  146. }
  147. if ((pdev->mon_desc->status_buf.paddr != buf_paddr) ||
  148. (pdev->mon_desc->ppdu_id != pdev->mon_desc->status_ppdu_id)) {
  149. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  150. FL("Monitor: PPDU id or status buf_addr mismatch "
  151. "status_ppdu_id: %d dest_ppdu_id: %d "
  152. "status_addr: %llx status_buf_cookie: %d "
  153. "dest_addr: %llx tlv_tag: %d"
  154. " status_nbuf: %pK pdev->hold_mon_dest: %d"),
  155. pdev->mon_desc->status_ppdu_id,
  156. pdev->mon_desc->ppdu_id, pdev->status_buf_addr,
  157. rx_buf_cookie,
  158. pdev->mon_desc->status_buf.paddr, tlv_tag,
  159. status_nbuf, pdev->hold_mon_dest_ring);
  160. }
  161. done:
  162. hal_srng_access_end(hal_soc, mon_status_srng);
  163. return status;
  164. }
  165. /*
  166. * dp_rx_mon_prepare_mon_mpdu () - API to prepare dp_mon_mpdu object
  167. *
  168. * @pdev: DP pdev object
  169. * @head_msdu: Head msdu
  170. * @tail_msdu: Tail msdu
  171. *
  172. */
  173. static inline struct dp_mon_mpdu *
  174. dp_rx_mon_prepare_mon_mpdu(struct dp_pdev *pdev,
  175. qdf_nbuf_t head_msdu,
  176. qdf_nbuf_t tail_msdu)
  177. {
  178. struct dp_mon_mpdu *mon_mpdu = NULL;
  179. mon_mpdu = qdf_mem_malloc(sizeof(struct dp_mon_mpdu));
  180. if (!mon_mpdu) {
  181. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  182. FL("Monitor MPDU object allocation failed -- %pK"),
  183. pdev);
  184. qdf_assert_always(0);
  185. }
  186. mon_mpdu->head = head_msdu;
  187. mon_mpdu->tail = tail_msdu;
  188. mon_mpdu->rs_flags = pdev->ppdu_info.rx_status.rs_flags;
  189. mon_mpdu->ant_signal_db = pdev->ppdu_info.rx_status.ant_signal_db;
  190. mon_mpdu->is_stbc = pdev->ppdu_info.rx_status.is_stbc;
  191. mon_mpdu->sgi = pdev->ppdu_info.rx_status.sgi;
  192. mon_mpdu->beamformed = pdev->ppdu_info.rx_status.beamformed;
  193. return mon_mpdu;
  194. }
  195. static inline void
  196. dp_rx_mon_drop_ppdu(struct dp_pdev *pdev, uint32_t mac_id)
  197. {
  198. struct dp_mon_mpdu *mpdu = NULL;
  199. struct dp_mon_mpdu *temp_mpdu = NULL;
  200. qdf_nbuf_t mon_skb, skb_next;
  201. if (!TAILQ_EMPTY(&pdev->mon_mpdu_q)) {
  202. TAILQ_FOREACH_SAFE(mpdu,
  203. &pdev->mon_mpdu_q,
  204. mpdu_list_elem,
  205. temp_mpdu) {
  206. TAILQ_REMOVE(&pdev->mon_mpdu_q,
  207. mpdu, mpdu_list_elem);
  208. mon_skb = mpdu->head;
  209. while (mon_skb) {
  210. skb_next = qdf_nbuf_next(mon_skb);
  211. QDF_TRACE(QDF_MODULE_ID_DP,
  212. QDF_TRACE_LEVEL_DEBUG,
  213. "[%s][%d] mon_skb=%pK len %u"
  214. " __func__, __LINE__",
  215. mon_skb, mon_skb->len);
  216. qdf_nbuf_free(mon_skb);
  217. mon_skb = skb_next;
  218. }
  219. qdf_mem_free(mpdu);
  220. }
  221. }
  222. pdev->mon_desc->drop_ppdu = 0;
  223. }
  224. /*
  225. * dp_rx_monitor_deliver_ppdu () - API to deliver all MPDU for a MPDU
  226. * to upper layer stack
  227. *
  228. * @soc: DP soc handle
  229. * @pdev: pdev
  230. * @mac_id: lmac id
  231. */
  232. static inline QDF_STATUS
  233. dp_rx_monitor_deliver_ppdu(struct dp_soc *soc,
  234. struct dp_pdev *pdev,
  235. uint32_t mac_id)
  236. {
  237. struct dp_mon_mpdu *mpdu = NULL;
  238. struct dp_mon_mpdu *temp_mpdu = NULL;
  239. if (!TAILQ_EMPTY(&pdev->mon_mpdu_q)) {
  240. TAILQ_FOREACH_SAFE(mpdu,
  241. &pdev->mon_mpdu_q,
  242. mpdu_list_elem,
  243. temp_mpdu) {
  244. TAILQ_REMOVE(&pdev->mon_mpdu_q,
  245. mpdu, mpdu_list_elem);
  246. /* Check for IEEE80211_AMSDU_FLAG in mpdu
  247. * and set in pdev->ppdu_info.rx_status
  248. */
  249. HAL_RX_SET_MSDU_AGGREGATION(mpdu,
  250. &(pdev->ppdu_info.rx_status));
  251. pdev->ppdu_info.rx_status.ant_signal_db =
  252. mpdu->ant_signal_db;
  253. pdev->ppdu_info.rx_status.is_stbc = mpdu->is_stbc;
  254. pdev->ppdu_info.rx_status.sgi = mpdu->sgi;
  255. pdev->ppdu_info.rx_status.beamformed = mpdu->beamformed;
  256. dp_rx_mon_deliver(soc, mac_id,
  257. mpdu->head, mpdu->tail);
  258. qdf_mem_free(mpdu);
  259. }
  260. }
  261. return QDF_STATUS_SUCCESS;
  262. }
  263. /**
  264. * dp_rx_mon_reap_status_ring () - Reap status_buf_count of status buffers for
  265. * status ring.
  266. *
  267. * @soc: DP soc handle
  268. * @pdev: pdev
  269. * @int_ctx: interrupt context
  270. * @mac_id: mac id on which interrupt is received
  271. * @quota: number of status ring entries to be reaped
  272. * @desc_info: Rx ppdu desc info
  273. */
  274. static inline uint32_t
  275. dp_rx_mon_reap_status_ring(struct dp_soc *soc,
  276. struct dp_pdev *pdev,
  277. struct dp_intr *int_ctx,
  278. uint32_t mac_id,
  279. uint32_t quota,
  280. struct hal_rx_mon_desc_info *desc_info)
  281. {
  282. uint8_t status_buf_count;
  283. uint32_t work_done = 0;
  284. enum dp_mon_reap_status status;
  285. status_buf_count = desc_info->status_buf_count;
  286. desc_info->drop_ppdu = false;
  287. status = dp_rx_mon_status_buf_validate(pdev, int_ctx, mac_id);
  288. switch (status) {
  289. case dp_mon_status_no_dma:
  290. /* If DMA is not done for status ring entry,
  291. * hold on to monitor destination ring and
  292. * deliver current ppdu data once DMA is done.
  293. */
  294. pdev->hold_mon_dest_ring = true;
  295. break;
  296. case dp_mon_status_lag:
  297. /* If status_ppdu_id is lagging behind destination,
  298. * a. Hold on to destination ring
  299. * b. Drop status ppdus until ppdu id matches
  300. * c. Increment stats for ppdu_id mismatch and
  301. * status ppdu drop
  302. */
  303. pdev->hold_mon_dest_ring = true;
  304. pdev->rx_mon_stats.ppdu_id_mismatch++;
  305. pdev->rx_mon_stats.status_ppdu_drop++;
  306. break;
  307. case dp_mon_status_lead:
  308. /* If status_ppdu_id is leading ahead destination,
  309. * a. Drop destination ring ppdu until ppdu_id matches
  310. * b. Unhold monitor destination ring so status ppdus
  311. * can be dropped.
  312. * c. Increment stats for ppdu_id mismatch and
  313. * destination ppdu drop
  314. */
  315. desc_info->drop_ppdu = true;
  316. pdev->hold_mon_dest_ring = false;
  317. pdev->rx_mon_stats.ppdu_id_mismatch++;
  318. pdev->rx_mon_stats.dest_ppdu_drop++;
  319. break;
  320. case dp_mon_status_replenish:
  321. /* If status ring hp entry is NULL, replenish it */
  322. work_done = dp_rx_mon_status_process(soc, int_ctx, mac_id, 1);
  323. break;
  324. case dp_mon_status_match:
  325. /* If status ppdu id matches with destnation,
  326. * unhold monitor destination ring and deliver ppdu
  327. */
  328. pdev->hold_mon_dest_ring = false;
  329. break;
  330. default:
  331. dp_err("mon reap status is not supported");
  332. }
  333. /* If status ring is lagging behind detination ring,
  334. * reap only one status buffer
  335. */
  336. if (status == dp_mon_status_lag)
  337. status_buf_count = 1;
  338. if (status == dp_mon_status_lag ||
  339. status == dp_mon_status_match) {
  340. work_done = dp_rx_mon_status_process(soc,
  341. int_ctx,
  342. mac_id,
  343. status_buf_count);
  344. }
  345. return work_done;
  346. }
  347. /**
  348. * dp_rx_mon_mpdu_reap () - This API reaps a mpdu from mon dest ring descriptor
  349. * and returns link descriptor to HW (WBM)
  350. *
  351. * @soc: DP soc handle
  352. * @pdev: pdev
  353. * @mac_id: lmac id
  354. * @ring_desc: SW monitor ring desc
  355. * @head_msdu: nbuf pointing to first msdu in a chain
  356. * @tail_msdu: nbuf pointing to last msdu in a chain
  357. * @head_desc: head pointer to free desc list
  358. * @tail_desc: tail pointer to free desc list
  359. *
  360. * Return: number of reaped buffers
  361. */
  362. static inline uint32_t
  363. dp_rx_mon_mpdu_reap(struct dp_soc *soc, struct dp_pdev *pdev, uint32_t mac_id,
  364. void *ring_desc, qdf_nbuf_t *head_msdu,
  365. qdf_nbuf_t *tail_msdu,
  366. union dp_rx_desc_list_elem_t **head_desc,
  367. union dp_rx_desc_list_elem_t **tail_desc)
  368. {
  369. struct dp_rx_desc *rx_desc = NULL;
  370. struct hal_rx_msdu_list msdu_list;
  371. uint32_t rx_buf_reaped = 0;
  372. uint16_t num_msdus = 0, msdu_index, rx_hdr_tlv_len, l3_hdr_pad;
  373. uint32_t total_frag_len = 0, frag_len = 0;
  374. bool drop_mpdu = false;
  375. bool msdu_frag = false, is_first_msdu = true, is_frag_non_raw = false;
  376. void *link_desc_va;
  377. uint8_t *rx_tlv_hdr;
  378. qdf_nbuf_t msdu = NULL, last_msdu = NULL;
  379. uint32_t rx_link_buf_info[HAL_RX_BUFFINFO_NUM_DWORDS];
  380. struct hal_rx_mon_desc_info *desc_info;
  381. uint16_t prev_ppdu_id;
  382. struct rx_desc_pool *rx_desc_pool = NULL;
  383. desc_info = pdev->mon_desc;
  384. /* Restore previous ppdu_id to use it while doing
  385. * status buffer validation
  386. */
  387. prev_ppdu_id = pdev->mon_desc->status_ppdu_id;
  388. qdf_mem_zero(desc_info, sizeof(struct hal_rx_mon_desc_info));
  389. pdev->mon_desc->status_ppdu_id = prev_ppdu_id;
  390. /* Read SW Mon ring descriptor */
  391. hal_rx_sw_mon_desc_info_get((struct hal_soc *)soc->hal_soc,
  392. ring_desc,
  393. (void *)desc_info);
  394. /* If end_of_ppdu is 1, return*/
  395. if (desc_info->end_of_ppdu)
  396. return rx_buf_reaped;
  397. /* If there is rxdma error, drop mpdu */
  398. if (qdf_unlikely(dp_rx_mon_is_rxdma_error(desc_info)
  399. == QDF_STATUS_SUCCESS)) {
  400. drop_mpdu = true;
  401. pdev->rx_mon_stats.dest_mpdu_drop++;
  402. }
  403. /*
  404. * while loop iterates through all link descriptors and
  405. * reaps msdu_count number of msdus for one SW_MONITOR_RING descriptor
  406. * and forms nbuf queue.
  407. */
  408. while (desc_info->msdu_count && desc_info->link_desc.paddr) {
  409. link_desc_va = dp_rx_cookie_2_mon_link_desc(pdev,
  410. desc_info->link_desc,
  411. mac_id);
  412. qdf_assert_always(link_desc_va);
  413. hal_rx_msdu_list_get(soc->hal_soc,
  414. link_desc_va,
  415. &msdu_list,
  416. &num_msdus);
  417. for (msdu_index = 0; msdu_index < num_msdus; msdu_index++) {
  418. rx_desc = dp_rx_get_mon_desc(soc,
  419. msdu_list.sw_cookie[msdu_index]);
  420. qdf_assert_always(rx_desc);
  421. msdu = DP_RX_MON_GET_NBUF_FROM_DESC(rx_desc);
  422. if (rx_desc->unmapped == 0) {
  423. rx_desc_pool = dp_rx_get_mon_desc_pool(
  424. soc, mac_id, pdev->pdev_id);
  425. dp_rx_mon_buffer_unmap(soc, rx_desc,
  426. rx_desc_pool->buf_size);
  427. rx_desc->unmapped = 1;
  428. }
  429. if (drop_mpdu) {
  430. dp_rx_mon_buffer_free(rx_desc);
  431. msdu = NULL;
  432. desc_info->msdu_count--;
  433. goto next_msdu;
  434. }
  435. rx_tlv_hdr = dp_rx_mon_get_buffer_data(rx_desc);
  436. if (is_first_msdu) {
  437. if (dp_rx_mon_alloc_parent_buffer(head_msdu)
  438. != QDF_STATUS_SUCCESS) {
  439. DP_STATS_INC(pdev,
  440. replenish.nbuf_alloc_fail,
  441. 1);
  442. qdf_frag_free(rx_tlv_hdr);
  443. QDF_TRACE(QDF_MODULE_ID_DP,
  444. QDF_TRACE_LEVEL_DEBUG,
  445. "[%s] failed to allocate parent buffer to hold all frag",
  446. __func__);
  447. drop_mpdu = true;
  448. desc_info->msdu_count--;
  449. goto next_msdu;
  450. }
  451. is_first_msdu = false;
  452. }
  453. if (hal_rx_desc_is_first_msdu(soc->hal_soc,
  454. rx_tlv_hdr))
  455. hal_rx_mon_hw_desc_get_mpdu_status(soc->hal_soc,
  456. rx_tlv_hdr,
  457. &pdev->ppdu_info.rx_status);
  458. /** If msdu is fragmented, spread across multiple
  459. * buffers
  460. * a. calculate len of each fragmented buffer
  461. * b. calculate the number of fragmented buffers for
  462. * a msdu and decrement one msdu_count
  463. */
  464. dp_rx_mon_parse_desc_buffer(soc,
  465. &(msdu_list.msdu_info[msdu_index]),
  466. &msdu_frag,
  467. &total_frag_len,
  468. &frag_len,
  469. &l3_hdr_pad,
  470. rx_tlv_hdr,
  471. &is_frag_non_raw, rx_tlv_hdr);
  472. if (!msdu_frag)
  473. desc_info->msdu_count--;
  474. rx_hdr_tlv_len = SIZE_OF_MONITOR_TLV;
  475. /*
  476. * HW structures call this L3 header padding.
  477. * this is actually the offset
  478. * from the buffer beginning where the L2
  479. * header begins.
  480. */
  481. /*******************************************************
  482. * RX_PACKET *
  483. * ----------------------------------------------------*
  484. | RX_PKT_TLVS | L3 Padding header | msdu data| |
  485. * ----------------------------------------------------*
  486. ******************************************************/
  487. dp_rx_mon_buffer_set_pktlen(msdu,
  488. rx_hdr_tlv_len +
  489. l3_hdr_pad +
  490. frag_len);
  491. dp_rx_mon_add_msdu_to_list(head_msdu, msdu, &last_msdu,
  492. rx_tlv_hdr, frag_len,
  493. l3_hdr_pad);
  494. next_msdu:
  495. rx_buf_reaped++;
  496. dp_rx_add_to_free_desc_list(head_desc,
  497. tail_desc,
  498. rx_desc);
  499. QDF_TRACE(QDF_MODULE_ID_DP,
  500. QDF_TRACE_LEVEL_DEBUG,
  501. FL("%s total_len %u frag_len %u flags %u"),
  502. total_frag_len, frag_len,
  503. msdu_list.msdu_info[msdu_index].msdu_flags);
  504. }
  505. hal_rxdma_buff_addr_info_set(rx_link_buf_info,
  506. desc_info->link_desc.paddr,
  507. desc_info->link_desc.sw_cookie,
  508. desc_info->link_desc.rbm);
  509. /* Get next link desc VA from current link desc */
  510. hal_rx_mon_next_link_desc_get(link_desc_va,
  511. &desc_info->link_desc);
  512. /* return msdu link descriptor to WBM */
  513. if (dp_rx_monitor_link_desc_return(pdev,
  514. (hal_buff_addrinfo_t)rx_link_buf_info,
  515. mac_id,
  516. HAL_BM_ACTION_PUT_IN_IDLE_LIST)
  517. != QDF_STATUS_SUCCESS) {
  518. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  519. "dp_rx_monitor_link_desc_return failed");
  520. }
  521. }
  522. pdev->rx_mon_stats.dest_mpdu_done++;
  523. dp_rx_mon_init_tail_msdu(msdu, last_msdu, tail_msdu);
  524. dp_rx_mon_remove_raw_frame_fcs_len(head_msdu);
  525. return rx_buf_reaped;
  526. }
  527. /*
  528. * dp_rx_mon_deliver_prev_ppdu () - Deliver previous PPDU
  529. *
  530. * @pdev: DP pdev handle
  531. * @int_ctx: interrupt context
  532. * @mac_id: lmac id
  533. * @quota: quota
  534. *
  535. * Return: remaining qouta
  536. */
  537. static inline uint32_t
  538. dp_rx_mon_deliver_prev_ppdu(struct dp_pdev *pdev,
  539. struct dp_intr *int_ctx,
  540. uint32_t mac_id,
  541. uint32_t quota)
  542. {
  543. struct dp_soc *soc = pdev->soc;
  544. struct hal_rx_mon_desc_info *desc_info = pdev->mon_desc;
  545. uint32_t work_done = 0, work = 0;
  546. bool deliver_ppdu = false;
  547. enum dp_mon_reap_status status;
  548. while (pdev->hold_mon_dest_ring) {
  549. status = dp_rx_mon_status_buf_validate(pdev, int_ctx, mac_id);
  550. switch (status) {
  551. case dp_mon_status_no_dma:
  552. /* If DMA is not done for status ring entry,
  553. * hold on to monitor destination ring and
  554. * deliver current ppdu data once DMA is done.
  555. */
  556. pdev->hold_mon_dest_ring = true;
  557. break;
  558. case dp_mon_status_lag:
  559. /* If status_ppdu_id is lagging behind destination,
  560. * a. Hold on to destination ring
  561. * b. Drop status ppdus until ppdu id matches
  562. * c. Increment stats for ppdu_id mismatch and
  563. * status ppdu drop
  564. */
  565. pdev->hold_mon_dest_ring = true;
  566. pdev->rx_mon_stats.ppdu_id_mismatch++;
  567. pdev->rx_mon_stats.status_ppdu_drop++;
  568. break;
  569. case dp_mon_status_lead:
  570. /* If status_ppdu_id is leading ahead destination,
  571. * a. Drop destination ring ppdu until ppdu_id matches
  572. * b. Unhold monitor destination ring so status ppdus
  573. * can be dropped.
  574. * c. Increment stats for ppdu_id mismatch and
  575. * destination ppdu drop
  576. */
  577. desc_info->drop_ppdu = true;
  578. pdev->hold_mon_dest_ring = false;
  579. pdev->rx_mon_stats.ppdu_id_mismatch++;
  580. pdev->rx_mon_stats.dest_ppdu_drop++;
  581. break;
  582. case dp_mon_status_replenish:
  583. /* If status ring hp entry is NULL, replenish it */
  584. work = dp_rx_mon_status_process(soc, int_ctx, mac_id, 1);
  585. break;
  586. case dp_mon_status_match:
  587. /* If status ppdu id matches with destnation,
  588. * unhold monitor destination ring and deliver ppdu
  589. */
  590. pdev->hold_mon_dest_ring = false;
  591. break;
  592. default:
  593. dp_err("mon reap status is not supported");
  594. }
  595. /* When status ring entry's DMA is not done or
  596. * status ring entry is replenished, ppdu status is not
  597. * available for radiotap construction, so return and
  598. * check for status on next interrupt
  599. */
  600. if ((status == dp_mon_status_no_dma) ||
  601. (status == dp_mon_status_replenish)) {
  602. return work_done;
  603. }
  604. if (status == dp_mon_status_lag) {
  605. work = dp_rx_mon_status_process(soc, int_ctx, mac_id, 1);
  606. if (!work)
  607. return 0;
  608. work_done += work;
  609. }
  610. deliver_ppdu = true;
  611. }
  612. if (deliver_ppdu) {
  613. if (pdev->mon_desc->drop_ppdu) {
  614. dp_rx_mon_drop_ppdu(pdev, mac_id);
  615. return work_done;
  616. }
  617. work_done += dp_rx_mon_status_process(soc, int_ctx, mac_id,
  618. desc_info->status_buf_count);
  619. dp_rx_monitor_deliver_ppdu(soc, pdev, mac_id);
  620. }
  621. return work_done;
  622. }
  623. /**
  624. * dp_rx_mon_process () - Core brain processing for monitor mode
  625. *
  626. * This API processes monitor destination ring followed by monitor status ring
  627. * Called from bottom half (tasklet/NET_RX_SOFTIRQ)
  628. *
  629. * @soc: datapath soc context
  630. * @int_ctx: interrupt context
  631. * @mac_id: mac_id on which interrupt is received
  632. * @quota: Number of status ring entry that can be serviced in one shot.
  633. *
  634. * @Return: Number of reaped status ring entries
  635. */
  636. uint32_t dp_rx_mon_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  637. uint32_t mac_id, uint32_t quota)
  638. {
  639. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  640. union dp_rx_desc_list_elem_t *head_desc = NULL;
  641. union dp_rx_desc_list_elem_t *tail_desc = NULL;
  642. uint32_t rx_bufs_reaped = 0;
  643. struct dp_mon_mpdu *mon_mpdu;
  644. struct cdp_pdev_mon_stats *rx_mon_stats;
  645. hal_rxdma_desc_t ring_desc;
  646. hal_soc_handle_t hal_soc;
  647. hal_ring_handle_t mon_dest_srng;
  648. qdf_nbuf_t head_msdu = NULL;
  649. qdf_nbuf_t tail_msdu = NULL;
  650. struct hal_rx_mon_desc_info *desc_info;
  651. int mac_for_pdev = mac_id;
  652. QDF_STATUS status;
  653. uint32_t work_done = 0;
  654. if (!pdev) {
  655. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  656. "pdev is null for mac_id = %d", mac_id);
  657. return work_done;
  658. }
  659. qdf_spin_lock_bh(&pdev->mon_lock);
  660. if (qdf_unlikely(!dp_soc_is_full_mon_enable(pdev))) {
  661. work_done += dp_rx_mon_status_process(soc, int_ctx,
  662. mac_id, quota);
  663. qdf_spin_unlock_bh(&pdev->mon_lock);
  664. return work_done;
  665. }
  666. desc_info = pdev->mon_desc;
  667. rx_mon_stats = &pdev->rx_mon_stats;
  668. work_done = dp_rx_mon_deliver_prev_ppdu(pdev, int_ctx, mac_id, quota);
  669. /* Do not proceed if work_done zero */
  670. if (!work_done && pdev->hold_mon_dest_ring) {
  671. qdf_spin_unlock_bh(&pdev->mon_lock);
  672. return work_done;
  673. }
  674. mon_dest_srng = dp_rxdma_get_mon_dst_ring(pdev, mac_for_pdev);
  675. if (qdf_unlikely(!mon_dest_srng ||
  676. !hal_srng_initialized(mon_dest_srng))) {
  677. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  678. FL("HAL Monitor Destination Ring Init Failed -- %pK"),
  679. mon_dest_srng);
  680. goto done1;
  681. }
  682. hal_soc = soc->hal_soc;
  683. qdf_assert_always(hal_soc && pdev);
  684. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, mon_dest_srng))) {
  685. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  686. FL("HAL Monitor Destination Ring access Failed -- %pK"),
  687. mon_dest_srng);
  688. goto done1;
  689. }
  690. /* Each entry in mon dest ring carries mpdu data
  691. * reap all msdus for a mpdu and form skb chain
  692. */
  693. while (qdf_likely(ring_desc =
  694. hal_srng_dst_peek(hal_soc, mon_dest_srng))) {
  695. head_msdu = NULL;
  696. tail_msdu = NULL;
  697. rx_bufs_reaped = dp_rx_mon_mpdu_reap(soc, pdev, mac_id,
  698. ring_desc, &head_msdu,
  699. &tail_msdu, &head_desc,
  700. &tail_desc);
  701. /* Assert if end_of_ppdu is zero and number of reaped buffers
  702. * are zero.
  703. */
  704. if (qdf_unlikely(!desc_info->end_of_ppdu && !rx_bufs_reaped)) {
  705. qdf_err("end_of_ppdu and rx_bufs_reaped are zero");
  706. }
  707. rx_mon_stats->mon_rx_bufs_reaped_dest += rx_bufs_reaped;
  708. /* replenish rx_bufs_reaped buffers back to
  709. * RxDMA Monitor buffer ring
  710. */
  711. if (rx_bufs_reaped) {
  712. status = dp_rx_buffers_replenish(soc, mac_id,
  713. dp_rxdma_get_mon_buf_ring(pdev,
  714. mac_for_pdev),
  715. dp_rx_get_mon_desc_pool(soc, mac_id,
  716. pdev->pdev_id),
  717. rx_bufs_reaped,
  718. &head_desc, &tail_desc);
  719. if (status != QDF_STATUS_SUCCESS)
  720. qdf_assert_always(0);
  721. rx_mon_stats->mon_rx_bufs_replenished_dest += rx_bufs_reaped;
  722. }
  723. head_desc = NULL;
  724. tail_desc = NULL;
  725. /* If end_of_ppdu is zero, it is a valid data mpdu
  726. * a. Add head_msdu and tail_msdu to mpdu list
  727. * b. continue reaping next SW_MONITOR_RING descriptor
  728. */
  729. if (!desc_info->end_of_ppdu) {
  730. /*
  731. * In case of rxdma error, MPDU is dropped
  732. * from sw_monitor_ring descriptor.
  733. * in this case, head_msdu remains NULL.
  734. * move srng to next and continue reaping next entry
  735. */
  736. if (!head_msdu) {
  737. ring_desc = hal_srng_dst_get_next(hal_soc,
  738. mon_dest_srng);
  739. continue;
  740. }
  741. /*
  742. * Prepare a MPDU object which holds chain of msdus
  743. * and MPDU specific status and add this is to
  744. * monitor mpdu queue
  745. */
  746. mon_mpdu = dp_rx_mon_prepare_mon_mpdu(pdev,
  747. head_msdu,
  748. tail_msdu);
  749. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  750. FL("Dest_srng: %pK MPDU_OBJ: %pK "
  751. "head_msdu: %pK tail_msdu: %pK -- "),
  752. mon_dest_srng,
  753. mon_mpdu,
  754. head_msdu,
  755. tail_msdu);
  756. TAILQ_INSERT_TAIL(&pdev->mon_mpdu_q,
  757. mon_mpdu,
  758. mpdu_list_elem);
  759. head_msdu = NULL;
  760. tail_msdu = NULL;
  761. ring_desc = hal_srng_dst_get_next(hal_soc,
  762. mon_dest_srng);
  763. continue;
  764. }
  765. /* It is observed sometimes that, ppdu_id, status_buf_addr
  766. * and link desc addr is NULL, this WAR is to handle same
  767. */
  768. if (!desc_info->ppdu_id && !desc_info->status_buf.paddr) {
  769. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  770. FL("ppdu_id: %d ring_entry: %pK"
  771. "status_buf_count: %d rxdma_push: %d"
  772. "rxdma_err: %d link_desc: %pK "),
  773. desc_info->ppdu_id, ring_desc,
  774. desc_info->status_buf_count,
  775. desc_info->rxdma_push_reason,
  776. desc_info->rxdma_error_code,
  777. desc_info->link_desc.paddr);
  778. goto next_entry;
  779. }
  780. /*
  781. * end_of_ppdu is one,
  782. * a. update ppdu_done stattistics
  783. * b. Replenish buffers back to mon buffer ring
  784. * c. reap status ring for a PPDU and deliver all mpdus
  785. * to upper layer
  786. */
  787. rx_mon_stats->dest_ppdu_done++;
  788. work_done += dp_rx_mon_reap_status_ring(soc, pdev, int_ctx,
  789. mac_id, quota, desc_info);
  790. /* Deliver all MPDUs for a PPDU */
  791. if (desc_info->drop_ppdu)
  792. dp_rx_mon_drop_ppdu(pdev, mac_id);
  793. else if (!pdev->hold_mon_dest_ring)
  794. dp_rx_monitor_deliver_ppdu(soc, pdev, mac_id);
  795. next_entry:
  796. hal_srng_dst_get_next(hal_soc, mon_dest_srng);
  797. break;
  798. }
  799. dp_srng_access_end(int_ctx, soc, mon_dest_srng);
  800. done1:
  801. qdf_spin_unlock_bh(&pdev->mon_lock);
  802. return work_done;
  803. }
  804. /**
  805. * dp_full_mon_attach() - attach full monitor mode
  806. * resources
  807. * @pdev: Datapath PDEV handle
  808. *
  809. * Return: void
  810. */
  811. void dp_full_mon_attach(struct dp_pdev *pdev)
  812. {
  813. struct dp_soc *soc = pdev->soc;
  814. if (!soc->full_mon_mode) {
  815. qdf_debug("Full monitor is not enabled");
  816. return;
  817. }
  818. pdev->mon_desc = qdf_mem_malloc(sizeof(struct hal_rx_mon_desc_info));
  819. if (!pdev->mon_desc) {
  820. qdf_err("Memory allocation failed for hal_rx_mon_desc_info ");
  821. return;
  822. }
  823. TAILQ_INIT(&pdev->mon_mpdu_q);
  824. }
  825. /**
  826. * dp_full_mon_detach() - detach full monitor mode
  827. * resources
  828. * @pdev: Datapath PDEV handle
  829. *
  830. * Return: void
  831. *
  832. */
  833. void dp_full_mon_detach(struct dp_pdev *pdev)
  834. {
  835. struct dp_soc *soc = pdev->soc;
  836. struct dp_mon_mpdu *mpdu = NULL;
  837. struct dp_mon_mpdu *temp_mpdu = NULL;
  838. if (!soc->full_mon_mode) {
  839. qdf_debug("Full monitor is not enabled");
  840. return;
  841. }
  842. if (pdev->mon_desc)
  843. qdf_mem_free(pdev->mon_desc);
  844. if (!TAILQ_EMPTY(&pdev->mon_mpdu_q)) {
  845. TAILQ_FOREACH_SAFE(mpdu,
  846. &pdev->mon_mpdu_q,
  847. mpdu_list_elem,
  848. temp_mpdu) {
  849. qdf_mem_free(mpdu);
  850. }
  851. }
  852. }
  853. #endif