sm6150.c 262 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/clk.h>
  6. #include <linux/delay.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/slab.h>
  11. #include <linux/io.h>
  12. #include <linux/module.h>
  13. #include <linux/input.h>
  14. #include <linux/of_device.h>
  15. #include <linux/pm_qos.h>
  16. #include <linux/soc/qcom/fsa4480-i2c.h>
  17. #include <sound/core.h>
  18. #include <sound/soc.h>
  19. #include <sound/soc-dapm.h>
  20. #include <sound/pcm.h>
  21. #include <sound/pcm_params.h>
  22. #include <sound/info.h>
  23. #include <soc/snd_event.h>
  24. #include <soc/qcom/socinfo.h>
  25. #include <dsp/q6afe-v2.h>
  26. #include <dsp/q6core.h>
  27. #include "device_event.h"
  28. #include "msm-pcm-routing-v2.h"
  29. #include <asoc/msm-cdc-pinctrl.h>
  30. #include "codecs/wcd934x/wcd934x.h"
  31. #include "codecs/wcd9335.h"
  32. #include "codecs/wcd934x/wcd934x-mbhc.h"
  33. #include "codecs/wcd937x/wcd937x-mbhc.h"
  34. #include "codecs/wsa881x.h"
  35. #include "codecs/bolero/bolero-cdc.h"
  36. #include <dt-bindings/sound/audio-codec-port-types.h>
  37. #include "codecs/bolero/wsa-macro.h"
  38. #include "codecs/wcd937x/wcd937x.h"
  39. #define DRV_NAME "sm6150-asoc-snd"
  40. #define __CHIPSET__ "SM6150 "
  41. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  42. #define SAMPLING_RATE_8KHZ 8000
  43. #define SAMPLING_RATE_11P025KHZ 11025
  44. #define SAMPLING_RATE_16KHZ 16000
  45. #define SAMPLING_RATE_22P05KHZ 22050
  46. #define SAMPLING_RATE_32KHZ 32000
  47. #define SAMPLING_RATE_44P1KHZ 44100
  48. #define SAMPLING_RATE_48KHZ 48000
  49. #define SAMPLING_RATE_88P2KHZ 88200
  50. #define SAMPLING_RATE_96KHZ 96000
  51. #define SAMPLING_RATE_176P4KHZ 176400
  52. #define SAMPLING_RATE_192KHZ 192000
  53. #define SAMPLING_RATE_352P8KHZ 352800
  54. #define SAMPLING_RATE_384KHZ 384000
  55. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  56. #define WCD9XXX_MBHC_DEF_RLOADS 5
  57. #define CODEC_EXT_CLK_RATE 9600000
  58. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  59. #define DEV_NAME_STR_LEN 32
  60. #define WSA8810_NAME_1 "wsa881x.20170211"
  61. #define WSA8810_NAME_2 "wsa881x.20170212"
  62. #define WCN_CDC_SLIM_RX_CH_MAX 2
  63. #define WCN_CDC_SLIM_TX_CH_MAX 3
  64. #define TDM_CHANNEL_MAX 8
  65. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  66. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  67. #define MSM_HIFI_ON 1
  68. #define SM6150_SOC_VERSION_1_0 0x00010000
  69. #define SM6150_SOC_MSM_ID 0x163
  70. enum {
  71. SLIM_RX_0 = 0,
  72. SLIM_RX_1,
  73. SLIM_RX_2,
  74. SLIM_RX_3,
  75. SLIM_RX_4,
  76. SLIM_RX_5,
  77. SLIM_RX_6,
  78. SLIM_RX_7,
  79. SLIM_RX_MAX,
  80. };
  81. enum {
  82. SLIM_TX_0 = 0,
  83. SLIM_TX_1,
  84. SLIM_TX_2,
  85. SLIM_TX_3,
  86. SLIM_TX_4,
  87. SLIM_TX_5,
  88. SLIM_TX_6,
  89. SLIM_TX_7,
  90. SLIM_TX_8,
  91. SLIM_TX_MAX,
  92. };
  93. enum {
  94. PRIM_MI2S = 0,
  95. SEC_MI2S,
  96. TERT_MI2S,
  97. QUAT_MI2S,
  98. QUIN_MI2S,
  99. MI2S_MAX,
  100. };
  101. enum {
  102. PRIM_AUX_PCM = 0,
  103. SEC_AUX_PCM,
  104. TERT_AUX_PCM,
  105. QUAT_AUX_PCM,
  106. QUIN_AUX_PCM,
  107. AUX_PCM_MAX,
  108. };
  109. enum {
  110. TDM_0 = 0,
  111. TDM_1,
  112. TDM_2,
  113. TDM_3,
  114. TDM_4,
  115. TDM_5,
  116. TDM_6,
  117. TDM_7,
  118. TDM_PORT_MAX,
  119. };
  120. enum {
  121. TDM_PRI = 0,
  122. TDM_SEC,
  123. TDM_TERT,
  124. TDM_QUAT,
  125. TDM_QUIN,
  126. TDM_INTERFACE_MAX,
  127. };
  128. struct tdm_port {
  129. u32 mode;
  130. u32 channel;
  131. };
  132. enum {
  133. WSA_CDC_DMA_RX_0 = 0,
  134. WSA_CDC_DMA_RX_1,
  135. RX_CDC_DMA_RX_0,
  136. RX_CDC_DMA_RX_1,
  137. RX_CDC_DMA_RX_2,
  138. RX_CDC_DMA_RX_3,
  139. RX_CDC_DMA_RX_5,
  140. CDC_DMA_RX_MAX,
  141. };
  142. enum {
  143. WSA_CDC_DMA_TX_0 = 0,
  144. WSA_CDC_DMA_TX_1,
  145. WSA_CDC_DMA_TX_2,
  146. TX_CDC_DMA_TX_0,
  147. TX_CDC_DMA_TX_3,
  148. TX_CDC_DMA_TX_4,
  149. CDC_DMA_TX_MAX,
  150. };
  151. struct mi2s_conf {
  152. struct mutex lock;
  153. u32 ref_cnt;
  154. u32 msm_is_mi2s_master;
  155. u32 msm_is_ext_mclk;
  156. };
  157. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  158. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  159. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  160. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  161. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
  162. Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
  163. };
  164. struct dev_config {
  165. u32 sample_rate;
  166. u32 bit_format;
  167. u32 channels;
  168. };
  169. enum {
  170. DP_RX_IDX = 0,
  171. EXT_DISP_RX_IDX_MAX,
  172. };
  173. struct msm_wsa881x_dev_info {
  174. struct device_node *of_node;
  175. u32 index;
  176. };
  177. struct aux_codec_dev_info {
  178. struct device_node *of_node;
  179. u32 index;
  180. };
  181. struct msm_asoc_mach_data {
  182. struct snd_info_entry *codec_root;
  183. int usbc_en2_gpio; /* used by gpio driver API */
  184. struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
  185. int hph_en1_gpio;
  186. int hph_en0_gpio;
  187. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  188. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  189. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  190. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  191. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  192. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  193. bool is_afe_config_done;
  194. struct device_node *fsa_handle;
  195. };
  196. struct msm_asoc_wcd93xx_codec {
  197. void* (*get_afe_config_fn)(struct snd_soc_component *component,
  198. enum afe_config_type config_type);
  199. };
  200. static struct snd_soc_card snd_soc_card_sm6150_msm;
  201. /* TDM default config */
  202. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  203. { /* PRI TDM */
  204. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  205. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  206. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  207. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  208. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  209. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  210. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  211. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  212. },
  213. { /* SEC TDM */
  214. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  215. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  216. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  217. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  218. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  219. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  220. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  221. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  222. },
  223. { /* TERT TDM */
  224. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  225. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  226. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  227. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  228. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  229. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  230. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  231. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  232. },
  233. { /* QUAT TDM */
  234. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  235. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  236. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  237. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  240. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  242. },
  243. { /* QUIN TDM */
  244. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  246. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  247. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  249. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  250. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  252. }
  253. };
  254. /* TDM default config */
  255. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  256. { /* PRI TDM */
  257. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  258. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  259. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  260. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  261. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  262. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  263. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  264. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  265. },
  266. { /* SEC TDM */
  267. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  268. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  269. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  270. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  271. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  272. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  273. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  274. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  275. },
  276. { /* TERT TDM */
  277. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  278. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  279. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  280. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  281. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  282. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  283. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  284. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  285. },
  286. { /* QUAT TDM */
  287. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  288. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  289. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  290. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  291. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  292. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  293. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  294. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  295. },
  296. { /* QUIN TDM */
  297. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  298. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  299. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  300. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  301. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  302. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  303. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  304. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  305. }
  306. };
  307. /* Default configuration of slimbus channels */
  308. static struct dev_config slim_rx_cfg[] = {
  309. [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  310. [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  311. [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  312. [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  313. [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  314. [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  315. [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  316. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  317. };
  318. static struct dev_config slim_tx_cfg[] = {
  319. [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  320. [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  321. [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  322. [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  323. [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  324. [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  325. [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  326. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  327. [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  328. };
  329. /* Default configuration of Codec DMA Interface Tx */
  330. static struct dev_config cdc_dma_rx_cfg[] = {
  331. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  332. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  333. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  334. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  335. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  336. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  337. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  338. };
  339. /* Default configuration of Codec DMA Interface Rx */
  340. static struct dev_config cdc_dma_tx_cfg[] = {
  341. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  342. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  343. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  344. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  345. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  346. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  347. };
  348. /* Default configuration of external display BE */
  349. static struct dev_config ext_disp_rx_cfg[] = {
  350. [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  351. };
  352. static struct dev_config usb_rx_cfg = {
  353. .sample_rate = SAMPLING_RATE_48KHZ,
  354. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  355. .channels = 2,
  356. };
  357. static struct dev_config usb_tx_cfg = {
  358. .sample_rate = SAMPLING_RATE_48KHZ,
  359. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  360. .channels = 1,
  361. };
  362. static struct dev_config proxy_rx_cfg = {
  363. .sample_rate = SAMPLING_RATE_48KHZ,
  364. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  365. .channels = 2,
  366. };
  367. /* Default configuration of MI2S channels */
  368. static struct dev_config mi2s_rx_cfg[] = {
  369. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  370. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  371. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  372. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  373. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  374. };
  375. static struct dev_config mi2s_tx_cfg[] = {
  376. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  377. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  378. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  379. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  380. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  381. };
  382. static struct dev_config aux_pcm_rx_cfg[] = {
  383. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  384. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  385. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  386. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  387. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  388. };
  389. static struct dev_config aux_pcm_tx_cfg[] = {
  390. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  391. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  392. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  393. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  394. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  395. };
  396. static int msm_vi_feed_tx_ch = 2;
  397. static const char *const slim_rx_ch_text[] = {"One", "Two"};
  398. static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
  399. "Five", "Six", "Seven",
  400. "Eight"};
  401. static const char *const vi_feed_ch_text[] = {"One", "Two"};
  402. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  403. "S32_LE"};
  404. static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
  405. "S24_3LE"};
  406. static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  407. "KHZ_32", "KHZ_44P1", "KHZ_48",
  408. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  409. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  410. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  411. "KHZ_44P1", "KHZ_48",
  412. "KHZ_88P2", "KHZ_96"};
  413. static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
  414. "KHZ_44P1", "KHZ_48",
  415. "KHZ_88P2", "KHZ_96"};
  416. static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
  417. "KHZ_44P1", "KHZ_48",
  418. "KHZ_88P2", "KHZ_96"};
  419. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  420. "Five", "Six", "Seven",
  421. "Eight"};
  422. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  423. "Six", "Seven", "Eight"};
  424. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  425. "KHZ_16", "KHZ_22P05",
  426. "KHZ_32", "KHZ_44P1", "KHZ_48",
  427. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  428. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  429. static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
  430. "KHZ_192", "KHZ_32", "KHZ_44P1",
  431. "KHZ_88P2", "KHZ_176P4" };
  432. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  433. "Five", "Six", "Seven", "Eight"};
  434. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  435. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  436. "KHZ_48", "KHZ_176P4",
  437. "KHZ_352P8"};
  438. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  439. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  440. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  441. "KHZ_48", "KHZ_96", "KHZ_192"};
  442. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  443. "Five", "Six", "Seven",
  444. "Eight"};
  445. static const char *const hifi_text[] = {"Off", "On"};
  446. static const char *const qos_text[] = {"Disable", "Enable"};
  447. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  448. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  449. "Five", "Six", "Seven",
  450. "Eight"};
  451. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  452. "KHZ_16", "KHZ_22P05",
  453. "KHZ_32", "KHZ_44P1", "KHZ_48",
  454. "KHZ_88P2", "KHZ_96",
  455. "KHZ_176P4", "KHZ_192",
  456. "KHZ_352P8", "KHZ_384"};
  457. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
  458. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
  459. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
  460. static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
  461. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
  462. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
  463. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  464. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  465. static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
  466. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
  467. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  468. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
  469. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
  470. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
  471. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
  472. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  473. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  474. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
  475. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
  476. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
  477. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
  478. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
  479. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
  480. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  481. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
  482. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
  483. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  484. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  485. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
  486. ext_disp_sample_rate_text);
  487. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  488. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  489. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  490. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  491. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  492. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  493. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  494. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  495. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  496. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  497. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  498. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  499. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  500. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  501. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  502. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  503. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  504. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  505. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  506. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
  507. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
  508. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  509. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  510. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  511. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
  512. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
  513. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  514. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  515. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  516. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  517. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  518. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  519. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
  520. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
  521. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
  522. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
  523. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  524. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  525. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  526. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  527. static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
  528. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  529. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  530. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  531. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  532. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  533. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  534. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  535. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  536. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  537. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  538. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  539. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  540. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  541. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  542. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  543. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  544. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  545. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  546. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  547. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  548. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  549. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  550. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  551. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  552. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  553. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  554. cdc_dma_sample_rate_text);
  555. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  556. cdc_dma_sample_rate_text);
  557. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  558. cdc_dma_sample_rate_text);
  559. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  560. cdc_dma_sample_rate_text);
  561. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  562. cdc_dma_sample_rate_text);
  563. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  564. cdc_dma_sample_rate_text);
  565. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  566. cdc_dma_sample_rate_text);
  567. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  568. cdc_dma_sample_rate_text);
  569. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  570. cdc_dma_sample_rate_text);
  571. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  572. cdc_dma_sample_rate_text);
  573. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  574. cdc_dma_sample_rate_text);
  575. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  576. cdc_dma_sample_rate_text);
  577. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  578. cdc_dma_sample_rate_text);
  579. static int msm_hifi_control;
  580. static bool codec_reg_done;
  581. static struct snd_soc_aux_dev *msm_aux_dev;
  582. static struct snd_soc_codec_conf *msm_codec_conf;
  583. static struct msm_asoc_wcd93xx_codec msm_codec_fn;
  584. static int dmic_0_1_gpio_cnt;
  585. static int dmic_2_3_gpio_cnt;
  586. static void *def_wcd_mbhc_cal(void);
  587. static int msm_snd_enable_codec_ext_clk(struct snd_soc_component *component,
  588. int enable, bool dapm);
  589. static int msm_wsa881x_init(struct snd_soc_component *component);
  590. static int msm_aux_codec_init(struct snd_soc_component *component);
  591. /*
  592. * Need to report LINEIN
  593. * if R/L channel impedance is larger than 5K ohm
  594. */
  595. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  596. .read_fw_bin = false,
  597. .calibration = NULL,
  598. .detect_extn_cable = true,
  599. .mono_stero_detection = false,
  600. .swap_gnd_mic = NULL,
  601. .hs_ext_micbias = true,
  602. .key_code[0] = KEY_MEDIA,
  603. .key_code[1] = KEY_VOICECOMMAND,
  604. .key_code[2] = KEY_VOLUMEUP,
  605. .key_code[3] = KEY_VOLUMEDOWN,
  606. .key_code[4] = 0,
  607. .key_code[5] = 0,
  608. .key_code[6] = 0,
  609. .key_code[7] = 0,
  610. .linein_th = 5000,
  611. .moisture_en = true,
  612. .mbhc_micbias = MIC_BIAS_2,
  613. .anc_micbias = MIC_BIAS_2,
  614. .enable_anc_mic_detect = false,
  615. };
  616. static struct snd_soc_dapm_route wcd_audio_paths[] = {
  617. {"MIC BIAS1", NULL, "MCLK TX"},
  618. {"MIC BIAS2", NULL, "MCLK TX"},
  619. {"MIC BIAS3", NULL, "MCLK TX"},
  620. {"MIC BIAS4", NULL, "MCLK TX"},
  621. };
  622. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  623. {
  624. AFE_API_VERSION_I2S_CONFIG,
  625. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  626. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  627. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  628. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  629. 0,
  630. },
  631. {
  632. AFE_API_VERSION_I2S_CONFIG,
  633. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  634. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  635. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  636. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  637. 0,
  638. },
  639. {
  640. AFE_API_VERSION_I2S_CONFIG,
  641. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  642. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  643. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  644. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  645. 0,
  646. },
  647. {
  648. AFE_API_VERSION_I2S_CONFIG,
  649. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
  650. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  651. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  652. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  653. 0,
  654. },
  655. {
  656. AFE_API_VERSION_I2S_CONFIG,
  657. Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
  658. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  659. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  660. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  661. 0,
  662. }
  663. };
  664. static struct afe_clk_set mi2s_mclk[MI2S_MAX] = {
  665. {
  666. AFE_API_VERSION_I2S_CONFIG,
  667. Q6AFE_LPASS_CLK_ID_MCLK_3,
  668. Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
  669. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  670. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  671. 0,
  672. },
  673. {
  674. AFE_API_VERSION_I2S_CONFIG,
  675. Q6AFE_LPASS_CLK_ID_MCLK_2,
  676. Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
  677. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  678. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  679. 0,
  680. },
  681. {
  682. AFE_API_VERSION_I2S_CONFIG,
  683. Q6AFE_LPASS_CLK_ID_MCLK_1,
  684. Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
  685. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  686. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  687. 0,
  688. },
  689. {
  690. AFE_API_VERSION_I2S_CONFIG,
  691. Q6AFE_LPASS_CLK_ID_MCLK_1,
  692. Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
  693. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  694. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  695. 0,
  696. },
  697. {
  698. AFE_API_VERSION_I2S_CONFIG,
  699. Q6AFE_LPASS_CLK_ID_QUI_MI2S_OSR,
  700. Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
  701. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  702. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  703. 0,
  704. }
  705. };
  706. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  707. static int slim_get_sample_rate_val(int sample_rate)
  708. {
  709. int sample_rate_val = 0;
  710. switch (sample_rate) {
  711. case SAMPLING_RATE_8KHZ:
  712. sample_rate_val = 0;
  713. break;
  714. case SAMPLING_RATE_16KHZ:
  715. sample_rate_val = 1;
  716. break;
  717. case SAMPLING_RATE_32KHZ:
  718. sample_rate_val = 2;
  719. break;
  720. case SAMPLING_RATE_44P1KHZ:
  721. sample_rate_val = 3;
  722. break;
  723. case SAMPLING_RATE_48KHZ:
  724. sample_rate_val = 4;
  725. break;
  726. case SAMPLING_RATE_88P2KHZ:
  727. sample_rate_val = 5;
  728. break;
  729. case SAMPLING_RATE_96KHZ:
  730. sample_rate_val = 6;
  731. break;
  732. case SAMPLING_RATE_176P4KHZ:
  733. sample_rate_val = 7;
  734. break;
  735. case SAMPLING_RATE_192KHZ:
  736. sample_rate_val = 8;
  737. break;
  738. case SAMPLING_RATE_352P8KHZ:
  739. sample_rate_val = 9;
  740. break;
  741. case SAMPLING_RATE_384KHZ:
  742. sample_rate_val = 10;
  743. break;
  744. default:
  745. sample_rate_val = 4;
  746. break;
  747. }
  748. return sample_rate_val;
  749. }
  750. static int slim_get_sample_rate(int value)
  751. {
  752. int sample_rate = 0;
  753. switch (value) {
  754. case 0:
  755. sample_rate = SAMPLING_RATE_8KHZ;
  756. break;
  757. case 1:
  758. sample_rate = SAMPLING_RATE_16KHZ;
  759. break;
  760. case 2:
  761. sample_rate = SAMPLING_RATE_32KHZ;
  762. break;
  763. case 3:
  764. sample_rate = SAMPLING_RATE_44P1KHZ;
  765. break;
  766. case 4:
  767. sample_rate = SAMPLING_RATE_48KHZ;
  768. break;
  769. case 5:
  770. sample_rate = SAMPLING_RATE_88P2KHZ;
  771. break;
  772. case 6:
  773. sample_rate = SAMPLING_RATE_96KHZ;
  774. break;
  775. case 7:
  776. sample_rate = SAMPLING_RATE_176P4KHZ;
  777. break;
  778. case 8:
  779. sample_rate = SAMPLING_RATE_192KHZ;
  780. break;
  781. case 9:
  782. sample_rate = SAMPLING_RATE_352P8KHZ;
  783. break;
  784. case 10:
  785. sample_rate = SAMPLING_RATE_384KHZ;
  786. break;
  787. default:
  788. sample_rate = SAMPLING_RATE_48KHZ;
  789. break;
  790. }
  791. return sample_rate;
  792. }
  793. static int slim_get_bit_format_val(int bit_format)
  794. {
  795. int val = 0;
  796. switch (bit_format) {
  797. case SNDRV_PCM_FORMAT_S32_LE:
  798. val = 3;
  799. break;
  800. case SNDRV_PCM_FORMAT_S24_3LE:
  801. val = 2;
  802. break;
  803. case SNDRV_PCM_FORMAT_S24_LE:
  804. val = 1;
  805. break;
  806. case SNDRV_PCM_FORMAT_S16_LE:
  807. default:
  808. val = 0;
  809. break;
  810. }
  811. return val;
  812. }
  813. static int slim_get_bit_format(int val)
  814. {
  815. int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  816. switch (val) {
  817. case 0:
  818. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  819. break;
  820. case 1:
  821. bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
  822. break;
  823. case 2:
  824. bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
  825. break;
  826. case 3:
  827. bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
  828. break;
  829. default:
  830. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  831. break;
  832. }
  833. return bit_fmt;
  834. }
  835. static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
  836. {
  837. int port_id = 0;
  838. if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
  839. port_id = SLIM_RX_0;
  840. } else if (strnstr(kcontrol->id.name,
  841. "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
  842. port_id = SLIM_RX_2;
  843. } else if (strnstr(kcontrol->id.name,
  844. "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
  845. port_id = SLIM_RX_5;
  846. } else if (strnstr(kcontrol->id.name,
  847. "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
  848. port_id = SLIM_RX_6;
  849. } else if (strnstr(kcontrol->id.name,
  850. "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
  851. port_id = SLIM_TX_0;
  852. } else if (strnstr(kcontrol->id.name,
  853. "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
  854. port_id = SLIM_TX_1;
  855. } else {
  856. pr_err("%s: unsupported channel: %s\n",
  857. __func__, kcontrol->id.name);
  858. return -EINVAL;
  859. }
  860. return port_id;
  861. }
  862. static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  863. struct snd_ctl_elem_value *ucontrol)
  864. {
  865. int ch_num = slim_get_port_idx(kcontrol);
  866. if (ch_num < 0)
  867. return ch_num;
  868. ucontrol->value.enumerated.item[0] =
  869. slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
  870. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  871. ch_num, slim_rx_cfg[ch_num].sample_rate,
  872. ucontrol->value.enumerated.item[0]);
  873. return 0;
  874. }
  875. static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  876. struct snd_ctl_elem_value *ucontrol)
  877. {
  878. int ch_num = slim_get_port_idx(kcontrol);
  879. if (ch_num < 0)
  880. return ch_num;
  881. slim_rx_cfg[ch_num].sample_rate =
  882. slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  883. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  884. ch_num, slim_rx_cfg[ch_num].sample_rate,
  885. ucontrol->value.enumerated.item[0]);
  886. return 0;
  887. }
  888. static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  889. struct snd_ctl_elem_value *ucontrol)
  890. {
  891. int ch_num = slim_get_port_idx(kcontrol);
  892. if (ch_num < 0)
  893. return ch_num;
  894. ucontrol->value.enumerated.item[0] =
  895. slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
  896. pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  897. ch_num, slim_tx_cfg[ch_num].sample_rate,
  898. ucontrol->value.enumerated.item[0]);
  899. return 0;
  900. }
  901. static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  902. struct snd_ctl_elem_value *ucontrol)
  903. {
  904. int sample_rate = 0;
  905. int ch_num = slim_get_port_idx(kcontrol);
  906. if (ch_num < 0)
  907. return ch_num;
  908. sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  909. if (sample_rate == SAMPLING_RATE_44P1KHZ) {
  910. pr_err("%s: Unsupported sample rate %d: for Tx path\n",
  911. __func__, sample_rate);
  912. return -EINVAL;
  913. }
  914. slim_tx_cfg[ch_num].sample_rate = sample_rate;
  915. pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
  916. ch_num, slim_tx_cfg[ch_num].sample_rate,
  917. ucontrol->value.enumerated.item[0]);
  918. return 0;
  919. }
  920. static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
  921. struct snd_ctl_elem_value *ucontrol)
  922. {
  923. int ch_num = slim_get_port_idx(kcontrol);
  924. if (ch_num < 0)
  925. return ch_num;
  926. ucontrol->value.enumerated.item[0] =
  927. slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
  928. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  929. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  930. ucontrol->value.enumerated.item[0]);
  931. return 0;
  932. }
  933. static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
  934. struct snd_ctl_elem_value *ucontrol)
  935. {
  936. int ch_num = slim_get_port_idx(kcontrol);
  937. if (ch_num < 0)
  938. return ch_num;
  939. slim_rx_cfg[ch_num].bit_format =
  940. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  941. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  942. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  943. ucontrol->value.enumerated.item[0]);
  944. return 0;
  945. }
  946. static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
  947. struct snd_ctl_elem_value *ucontrol)
  948. {
  949. int ch_num = slim_get_port_idx(kcontrol);
  950. if (ch_num < 0)
  951. return ch_num;
  952. ucontrol->value.enumerated.item[0] =
  953. slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
  954. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  955. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  956. ucontrol->value.enumerated.item[0]);
  957. return 0;
  958. }
  959. static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
  960. struct snd_ctl_elem_value *ucontrol)
  961. {
  962. int ch_num = slim_get_port_idx(kcontrol);
  963. if (ch_num < 0)
  964. return ch_num;
  965. slim_tx_cfg[ch_num].bit_format =
  966. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  967. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  968. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  969. ucontrol->value.enumerated.item[0]);
  970. return 0;
  971. }
  972. static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
  973. struct snd_ctl_elem_value *ucontrol)
  974. {
  975. int ch_num = slim_get_port_idx(kcontrol);
  976. if (ch_num < 0)
  977. return ch_num;
  978. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  979. ch_num, slim_rx_cfg[ch_num].channels);
  980. ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
  981. return 0;
  982. }
  983. static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
  984. struct snd_ctl_elem_value *ucontrol)
  985. {
  986. int ch_num = slim_get_port_idx(kcontrol);
  987. if (ch_num < 0)
  988. return ch_num;
  989. slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  990. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  991. ch_num, slim_rx_cfg[ch_num].channels);
  992. return 1;
  993. }
  994. static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
  995. struct snd_ctl_elem_value *ucontrol)
  996. {
  997. int ch_num = slim_get_port_idx(kcontrol);
  998. if (ch_num < 0)
  999. return ch_num;
  1000. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  1001. ch_num, slim_tx_cfg[ch_num].channels);
  1002. ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
  1003. return 0;
  1004. }
  1005. static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
  1006. struct snd_ctl_elem_value *ucontrol)
  1007. {
  1008. int ch_num = slim_get_port_idx(kcontrol);
  1009. if (ch_num < 0)
  1010. return ch_num;
  1011. slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  1012. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  1013. ch_num, slim_tx_cfg[ch_num].channels);
  1014. return 1;
  1015. }
  1016. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  1017. struct snd_ctl_elem_value *ucontrol)
  1018. {
  1019. ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
  1020. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  1021. ucontrol->value.integer.value[0]);
  1022. return 0;
  1023. }
  1024. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  1025. struct snd_ctl_elem_value *ucontrol)
  1026. {
  1027. msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
  1028. pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
  1029. return 1;
  1030. }
  1031. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  1032. struct snd_ctl_elem_value *ucontrol)
  1033. {
  1034. /*
  1035. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  1036. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  1037. * value.
  1038. */
  1039. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  1040. case SAMPLING_RATE_96KHZ:
  1041. ucontrol->value.integer.value[0] = 5;
  1042. break;
  1043. case SAMPLING_RATE_88P2KHZ:
  1044. ucontrol->value.integer.value[0] = 4;
  1045. break;
  1046. case SAMPLING_RATE_48KHZ:
  1047. ucontrol->value.integer.value[0] = 3;
  1048. break;
  1049. case SAMPLING_RATE_44P1KHZ:
  1050. ucontrol->value.integer.value[0] = 2;
  1051. break;
  1052. case SAMPLING_RATE_16KHZ:
  1053. ucontrol->value.integer.value[0] = 1;
  1054. break;
  1055. case SAMPLING_RATE_8KHZ:
  1056. default:
  1057. ucontrol->value.integer.value[0] = 0;
  1058. break;
  1059. }
  1060. pr_debug("%s: sample rate = %d\n", __func__,
  1061. slim_rx_cfg[SLIM_RX_7].sample_rate);
  1062. return 0;
  1063. }
  1064. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  1065. struct snd_ctl_elem_value *ucontrol)
  1066. {
  1067. switch (ucontrol->value.integer.value[0]) {
  1068. case 1:
  1069. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1070. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1071. break;
  1072. case 2:
  1073. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1074. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1075. break;
  1076. case 3:
  1077. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1078. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1079. break;
  1080. case 4:
  1081. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1082. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1083. break;
  1084. case 5:
  1085. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1086. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1087. break;
  1088. case 0:
  1089. default:
  1090. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1091. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1092. break;
  1093. }
  1094. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  1095. __func__,
  1096. slim_rx_cfg[SLIM_RX_7].sample_rate,
  1097. slim_tx_cfg[SLIM_TX_7].sample_rate,
  1098. ucontrol->value.enumerated.item[0]);
  1099. return 0;
  1100. }
  1101. static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
  1102. struct snd_ctl_elem_value *ucontrol)
  1103. {
  1104. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  1105. case SAMPLING_RATE_96KHZ:
  1106. ucontrol->value.integer.value[0] = 5;
  1107. break;
  1108. case SAMPLING_RATE_88P2KHZ:
  1109. ucontrol->value.integer.value[0] = 4;
  1110. break;
  1111. case SAMPLING_RATE_48KHZ:
  1112. ucontrol->value.integer.value[0] = 3;
  1113. break;
  1114. case SAMPLING_RATE_44P1KHZ:
  1115. ucontrol->value.integer.value[0] = 2;
  1116. break;
  1117. case SAMPLING_RATE_16KHZ:
  1118. ucontrol->value.integer.value[0] = 1;
  1119. break;
  1120. case SAMPLING_RATE_8KHZ:
  1121. default:
  1122. ucontrol->value.integer.value[0] = 0;
  1123. break;
  1124. }
  1125. pr_debug("%s: sample rate rx = %d", __func__,
  1126. slim_rx_cfg[SLIM_RX_7].sample_rate);
  1127. return 0;
  1128. }
  1129. static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
  1130. struct snd_ctl_elem_value *ucontrol)
  1131. {
  1132. switch (ucontrol->value.integer.value[0]) {
  1133. case 1:
  1134. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1135. break;
  1136. case 2:
  1137. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1138. break;
  1139. case 3:
  1140. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1141. break;
  1142. case 4:
  1143. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1144. break;
  1145. case 5:
  1146. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1147. break;
  1148. case 0:
  1149. default:
  1150. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1151. break;
  1152. }
  1153. pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
  1154. __func__,
  1155. slim_rx_cfg[SLIM_RX_7].sample_rate,
  1156. ucontrol->value.enumerated.item[0]);
  1157. return 0;
  1158. }
  1159. static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
  1160. struct snd_ctl_elem_value *ucontrol)
  1161. {
  1162. switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
  1163. case SAMPLING_RATE_96KHZ:
  1164. ucontrol->value.integer.value[0] = 5;
  1165. break;
  1166. case SAMPLING_RATE_88P2KHZ:
  1167. ucontrol->value.integer.value[0] = 4;
  1168. break;
  1169. case SAMPLING_RATE_48KHZ:
  1170. ucontrol->value.integer.value[0] = 3;
  1171. break;
  1172. case SAMPLING_RATE_44P1KHZ:
  1173. ucontrol->value.integer.value[0] = 2;
  1174. break;
  1175. case SAMPLING_RATE_16KHZ:
  1176. ucontrol->value.integer.value[0] = 1;
  1177. break;
  1178. case SAMPLING_RATE_8KHZ:
  1179. default:
  1180. ucontrol->value.integer.value[0] = 0;
  1181. break;
  1182. }
  1183. pr_debug("%s: sample rate tx = %d", __func__,
  1184. slim_tx_cfg[SLIM_TX_7].sample_rate);
  1185. return 0;
  1186. }
  1187. static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
  1188. struct snd_ctl_elem_value *ucontrol)
  1189. {
  1190. switch (ucontrol->value.integer.value[0]) {
  1191. case 1:
  1192. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1193. break;
  1194. case 2:
  1195. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1196. break;
  1197. case 3:
  1198. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1199. break;
  1200. case 4:
  1201. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1202. break;
  1203. case 5:
  1204. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1205. break;
  1206. case 0:
  1207. default:
  1208. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1209. break;
  1210. }
  1211. pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
  1212. __func__,
  1213. slim_tx_cfg[SLIM_TX_7].sample_rate,
  1214. ucontrol->value.enumerated.item[0]);
  1215. return 0;
  1216. }
  1217. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1218. {
  1219. int idx = 0;
  1220. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  1221. sizeof("WSA_CDC_DMA_RX_0")))
  1222. idx = WSA_CDC_DMA_RX_0;
  1223. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  1224. sizeof("WSA_CDC_DMA_RX_0")))
  1225. idx = WSA_CDC_DMA_RX_1;
  1226. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1227. sizeof("RX_CDC_DMA_RX_0")))
  1228. idx = RX_CDC_DMA_RX_0;
  1229. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1230. sizeof("RX_CDC_DMA_RX_1")))
  1231. idx = RX_CDC_DMA_RX_1;
  1232. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1233. sizeof("RX_CDC_DMA_RX_2")))
  1234. idx = RX_CDC_DMA_RX_2;
  1235. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1236. sizeof("RX_CDC_DMA_RX_3")))
  1237. idx = RX_CDC_DMA_RX_3;
  1238. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1239. sizeof("RX_CDC_DMA_RX_5")))
  1240. idx = RX_CDC_DMA_RX_5;
  1241. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  1242. sizeof("WSA_CDC_DMA_TX_0")))
  1243. idx = WSA_CDC_DMA_TX_0;
  1244. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  1245. sizeof("WSA_CDC_DMA_TX_1")))
  1246. idx = WSA_CDC_DMA_TX_1;
  1247. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  1248. sizeof("WSA_CDC_DMA_TX_2")))
  1249. idx = WSA_CDC_DMA_TX_2;
  1250. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  1251. sizeof("TX_CDC_DMA_TX_0")))
  1252. idx = TX_CDC_DMA_TX_0;
  1253. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  1254. sizeof("TX_CDC_DMA_TX_3")))
  1255. idx = TX_CDC_DMA_TX_3;
  1256. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  1257. sizeof("TX_CDC_DMA_TX_4")))
  1258. idx = TX_CDC_DMA_TX_4;
  1259. else {
  1260. pr_err("%s: unsupported channel: %s\n",
  1261. __func__, kcontrol->id.name);
  1262. return -EINVAL;
  1263. }
  1264. return idx;
  1265. }
  1266. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  1267. struct snd_ctl_elem_value *ucontrol)
  1268. {
  1269. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1270. if (ch_num < 0) {
  1271. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1272. return ch_num;
  1273. }
  1274. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1275. cdc_dma_rx_cfg[ch_num].channels - 1);
  1276. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1277. return 0;
  1278. }
  1279. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1280. struct snd_ctl_elem_value *ucontrol)
  1281. {
  1282. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1283. if (ch_num < 0) {
  1284. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1285. return ch_num;
  1286. }
  1287. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1288. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1289. cdc_dma_rx_cfg[ch_num].channels);
  1290. return 1;
  1291. }
  1292. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  1293. struct snd_ctl_elem_value *ucontrol)
  1294. {
  1295. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1296. if (ch_num < 0) {
  1297. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1298. return ch_num;
  1299. }
  1300. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  1301. case SNDRV_PCM_FORMAT_S32_LE:
  1302. ucontrol->value.integer.value[0] = 3;
  1303. break;
  1304. case SNDRV_PCM_FORMAT_S24_3LE:
  1305. ucontrol->value.integer.value[0] = 2;
  1306. break;
  1307. case SNDRV_PCM_FORMAT_S24_LE:
  1308. ucontrol->value.integer.value[0] = 1;
  1309. break;
  1310. case SNDRV_PCM_FORMAT_S16_LE:
  1311. default:
  1312. ucontrol->value.integer.value[0] = 0;
  1313. break;
  1314. }
  1315. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1316. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1317. ucontrol->value.integer.value[0]);
  1318. return 0;
  1319. }
  1320. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  1321. struct snd_ctl_elem_value *ucontrol)
  1322. {
  1323. int rc = 0;
  1324. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1325. if (ch_num < 0) {
  1326. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1327. return ch_num;
  1328. }
  1329. switch (ucontrol->value.integer.value[0]) {
  1330. case 3:
  1331. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1332. break;
  1333. case 2:
  1334. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1335. break;
  1336. case 1:
  1337. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1338. break;
  1339. case 0:
  1340. default:
  1341. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1342. break;
  1343. }
  1344. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1345. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1346. ucontrol->value.integer.value[0]);
  1347. return rc;
  1348. }
  1349. static int cdc_dma_get_sample_rate_val(int sample_rate)
  1350. {
  1351. int sample_rate_val = 0;
  1352. switch (sample_rate) {
  1353. case SAMPLING_RATE_8KHZ:
  1354. sample_rate_val = 0;
  1355. break;
  1356. case SAMPLING_RATE_11P025KHZ:
  1357. sample_rate_val = 1;
  1358. break;
  1359. case SAMPLING_RATE_16KHZ:
  1360. sample_rate_val = 2;
  1361. break;
  1362. case SAMPLING_RATE_22P05KHZ:
  1363. sample_rate_val = 3;
  1364. break;
  1365. case SAMPLING_RATE_32KHZ:
  1366. sample_rate_val = 4;
  1367. break;
  1368. case SAMPLING_RATE_44P1KHZ:
  1369. sample_rate_val = 5;
  1370. break;
  1371. case SAMPLING_RATE_48KHZ:
  1372. sample_rate_val = 6;
  1373. break;
  1374. case SAMPLING_RATE_88P2KHZ:
  1375. sample_rate_val = 7;
  1376. break;
  1377. case SAMPLING_RATE_96KHZ:
  1378. sample_rate_val = 8;
  1379. break;
  1380. case SAMPLING_RATE_176P4KHZ:
  1381. sample_rate_val = 9;
  1382. break;
  1383. case SAMPLING_RATE_192KHZ:
  1384. sample_rate_val = 10;
  1385. break;
  1386. case SAMPLING_RATE_352P8KHZ:
  1387. sample_rate_val = 11;
  1388. break;
  1389. case SAMPLING_RATE_384KHZ:
  1390. sample_rate_val = 12;
  1391. break;
  1392. default:
  1393. sample_rate_val = 6;
  1394. break;
  1395. }
  1396. return sample_rate_val;
  1397. }
  1398. static int cdc_dma_get_sample_rate(int value)
  1399. {
  1400. int sample_rate = 0;
  1401. switch (value) {
  1402. case 0:
  1403. sample_rate = SAMPLING_RATE_8KHZ;
  1404. break;
  1405. case 1:
  1406. sample_rate = SAMPLING_RATE_11P025KHZ;
  1407. break;
  1408. case 2:
  1409. sample_rate = SAMPLING_RATE_16KHZ;
  1410. break;
  1411. case 3:
  1412. sample_rate = SAMPLING_RATE_22P05KHZ;
  1413. break;
  1414. case 4:
  1415. sample_rate = SAMPLING_RATE_32KHZ;
  1416. break;
  1417. case 5:
  1418. sample_rate = SAMPLING_RATE_44P1KHZ;
  1419. break;
  1420. case 6:
  1421. sample_rate = SAMPLING_RATE_48KHZ;
  1422. break;
  1423. case 7:
  1424. sample_rate = SAMPLING_RATE_88P2KHZ;
  1425. break;
  1426. case 8:
  1427. sample_rate = SAMPLING_RATE_96KHZ;
  1428. break;
  1429. case 9:
  1430. sample_rate = SAMPLING_RATE_176P4KHZ;
  1431. break;
  1432. case 10:
  1433. sample_rate = SAMPLING_RATE_192KHZ;
  1434. break;
  1435. case 11:
  1436. sample_rate = SAMPLING_RATE_352P8KHZ;
  1437. break;
  1438. case 12:
  1439. sample_rate = SAMPLING_RATE_384KHZ;
  1440. break;
  1441. default:
  1442. sample_rate = SAMPLING_RATE_48KHZ;
  1443. break;
  1444. }
  1445. return sample_rate;
  1446. }
  1447. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1448. struct snd_ctl_elem_value *ucontrol)
  1449. {
  1450. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1451. if (ch_num < 0) {
  1452. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1453. return ch_num;
  1454. }
  1455. ucontrol->value.enumerated.item[0] =
  1456. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  1457. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  1458. cdc_dma_rx_cfg[ch_num].sample_rate);
  1459. return 0;
  1460. }
  1461. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1462. struct snd_ctl_elem_value *ucontrol)
  1463. {
  1464. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1465. if (ch_num < 0) {
  1466. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1467. return ch_num;
  1468. }
  1469. cdc_dma_rx_cfg[ch_num].sample_rate =
  1470. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1471. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  1472. __func__, ucontrol->value.enumerated.item[0],
  1473. cdc_dma_rx_cfg[ch_num].sample_rate);
  1474. return 0;
  1475. }
  1476. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  1477. struct snd_ctl_elem_value *ucontrol)
  1478. {
  1479. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1480. if (ch_num < 0) {
  1481. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1482. return ch_num;
  1483. }
  1484. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1485. cdc_dma_tx_cfg[ch_num].channels);
  1486. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  1487. return 0;
  1488. }
  1489. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  1490. struct snd_ctl_elem_value *ucontrol)
  1491. {
  1492. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1493. if (ch_num < 0) {
  1494. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1495. return ch_num;
  1496. }
  1497. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1498. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1499. cdc_dma_tx_cfg[ch_num].channels);
  1500. return 1;
  1501. }
  1502. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1503. struct snd_ctl_elem_value *ucontrol)
  1504. {
  1505. int sample_rate_val;
  1506. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1507. if (ch_num < 0) {
  1508. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1509. return ch_num;
  1510. }
  1511. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  1512. case SAMPLING_RATE_384KHZ:
  1513. sample_rate_val = 12;
  1514. break;
  1515. case SAMPLING_RATE_352P8KHZ:
  1516. sample_rate_val = 11;
  1517. break;
  1518. case SAMPLING_RATE_192KHZ:
  1519. sample_rate_val = 10;
  1520. break;
  1521. case SAMPLING_RATE_176P4KHZ:
  1522. sample_rate_val = 9;
  1523. break;
  1524. case SAMPLING_RATE_96KHZ:
  1525. sample_rate_val = 8;
  1526. break;
  1527. case SAMPLING_RATE_88P2KHZ:
  1528. sample_rate_val = 7;
  1529. break;
  1530. case SAMPLING_RATE_48KHZ:
  1531. sample_rate_val = 6;
  1532. break;
  1533. case SAMPLING_RATE_44P1KHZ:
  1534. sample_rate_val = 5;
  1535. break;
  1536. case SAMPLING_RATE_32KHZ:
  1537. sample_rate_val = 4;
  1538. break;
  1539. case SAMPLING_RATE_22P05KHZ:
  1540. sample_rate_val = 3;
  1541. break;
  1542. case SAMPLING_RATE_16KHZ:
  1543. sample_rate_val = 2;
  1544. break;
  1545. case SAMPLING_RATE_11P025KHZ:
  1546. sample_rate_val = 1;
  1547. break;
  1548. case SAMPLING_RATE_8KHZ:
  1549. sample_rate_val = 0;
  1550. break;
  1551. default:
  1552. sample_rate_val = 6;
  1553. break;
  1554. }
  1555. ucontrol->value.integer.value[0] = sample_rate_val;
  1556. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  1557. cdc_dma_tx_cfg[ch_num].sample_rate);
  1558. return 0;
  1559. }
  1560. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1561. struct snd_ctl_elem_value *ucontrol)
  1562. {
  1563. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1564. if (ch_num < 0) {
  1565. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1566. return ch_num;
  1567. }
  1568. switch (ucontrol->value.integer.value[0]) {
  1569. case 12:
  1570. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  1571. break;
  1572. case 11:
  1573. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  1574. break;
  1575. case 10:
  1576. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  1577. break;
  1578. case 9:
  1579. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  1580. break;
  1581. case 8:
  1582. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  1583. break;
  1584. case 7:
  1585. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  1586. break;
  1587. case 6:
  1588. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1589. break;
  1590. case 5:
  1591. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  1592. break;
  1593. case 4:
  1594. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  1595. break;
  1596. case 3:
  1597. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  1598. break;
  1599. case 2:
  1600. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  1601. break;
  1602. case 1:
  1603. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  1604. break;
  1605. case 0:
  1606. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  1607. break;
  1608. default:
  1609. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1610. break;
  1611. }
  1612. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  1613. __func__, ucontrol->value.integer.value[0],
  1614. cdc_dma_tx_cfg[ch_num].sample_rate);
  1615. return 0;
  1616. }
  1617. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  1618. struct snd_ctl_elem_value *ucontrol)
  1619. {
  1620. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1621. if (ch_num < 0) {
  1622. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1623. return ch_num;
  1624. }
  1625. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  1626. case SNDRV_PCM_FORMAT_S32_LE:
  1627. ucontrol->value.integer.value[0] = 3;
  1628. break;
  1629. case SNDRV_PCM_FORMAT_S24_3LE:
  1630. ucontrol->value.integer.value[0] = 2;
  1631. break;
  1632. case SNDRV_PCM_FORMAT_S24_LE:
  1633. ucontrol->value.integer.value[0] = 1;
  1634. break;
  1635. case SNDRV_PCM_FORMAT_S16_LE:
  1636. default:
  1637. ucontrol->value.integer.value[0] = 0;
  1638. break;
  1639. }
  1640. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1641. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1642. ucontrol->value.integer.value[0]);
  1643. return 0;
  1644. }
  1645. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  1646. struct snd_ctl_elem_value *ucontrol)
  1647. {
  1648. int rc = 0;
  1649. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1650. if (ch_num < 0) {
  1651. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1652. return ch_num;
  1653. }
  1654. switch (ucontrol->value.integer.value[0]) {
  1655. case 3:
  1656. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1657. break;
  1658. case 2:
  1659. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1660. break;
  1661. case 1:
  1662. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1663. break;
  1664. case 0:
  1665. default:
  1666. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1667. break;
  1668. }
  1669. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1670. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1671. ucontrol->value.integer.value[0]);
  1672. return rc;
  1673. }
  1674. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  1675. struct snd_ctl_elem_value *ucontrol)
  1676. {
  1677. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  1678. usb_rx_cfg.channels);
  1679. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  1680. return 0;
  1681. }
  1682. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  1683. struct snd_ctl_elem_value *ucontrol)
  1684. {
  1685. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1686. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  1687. return 1;
  1688. }
  1689. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1690. struct snd_ctl_elem_value *ucontrol)
  1691. {
  1692. int sample_rate_val;
  1693. switch (usb_rx_cfg.sample_rate) {
  1694. case SAMPLING_RATE_384KHZ:
  1695. sample_rate_val = 12;
  1696. break;
  1697. case SAMPLING_RATE_352P8KHZ:
  1698. sample_rate_val = 11;
  1699. break;
  1700. case SAMPLING_RATE_192KHZ:
  1701. sample_rate_val = 10;
  1702. break;
  1703. case SAMPLING_RATE_176P4KHZ:
  1704. sample_rate_val = 9;
  1705. break;
  1706. case SAMPLING_RATE_96KHZ:
  1707. sample_rate_val = 8;
  1708. break;
  1709. case SAMPLING_RATE_88P2KHZ:
  1710. sample_rate_val = 7;
  1711. break;
  1712. case SAMPLING_RATE_48KHZ:
  1713. sample_rate_val = 6;
  1714. break;
  1715. case SAMPLING_RATE_44P1KHZ:
  1716. sample_rate_val = 5;
  1717. break;
  1718. case SAMPLING_RATE_32KHZ:
  1719. sample_rate_val = 4;
  1720. break;
  1721. case SAMPLING_RATE_22P05KHZ:
  1722. sample_rate_val = 3;
  1723. break;
  1724. case SAMPLING_RATE_16KHZ:
  1725. sample_rate_val = 2;
  1726. break;
  1727. case SAMPLING_RATE_11P025KHZ:
  1728. sample_rate_val = 1;
  1729. break;
  1730. case SAMPLING_RATE_8KHZ:
  1731. default:
  1732. sample_rate_val = 0;
  1733. break;
  1734. }
  1735. ucontrol->value.integer.value[0] = sample_rate_val;
  1736. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  1737. usb_rx_cfg.sample_rate);
  1738. return 0;
  1739. }
  1740. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1741. struct snd_ctl_elem_value *ucontrol)
  1742. {
  1743. switch (ucontrol->value.integer.value[0]) {
  1744. case 12:
  1745. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1746. break;
  1747. case 11:
  1748. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1749. break;
  1750. case 10:
  1751. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1752. break;
  1753. case 9:
  1754. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1755. break;
  1756. case 8:
  1757. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1758. break;
  1759. case 7:
  1760. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1761. break;
  1762. case 6:
  1763. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1764. break;
  1765. case 5:
  1766. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1767. break;
  1768. case 4:
  1769. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1770. break;
  1771. case 3:
  1772. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1773. break;
  1774. case 2:
  1775. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1776. break;
  1777. case 1:
  1778. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1779. break;
  1780. case 0:
  1781. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1782. break;
  1783. default:
  1784. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1785. break;
  1786. }
  1787. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  1788. __func__, ucontrol->value.integer.value[0],
  1789. usb_rx_cfg.sample_rate);
  1790. return 0;
  1791. }
  1792. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  1793. struct snd_ctl_elem_value *ucontrol)
  1794. {
  1795. switch (usb_rx_cfg.bit_format) {
  1796. case SNDRV_PCM_FORMAT_S32_LE:
  1797. ucontrol->value.integer.value[0] = 3;
  1798. break;
  1799. case SNDRV_PCM_FORMAT_S24_3LE:
  1800. ucontrol->value.integer.value[0] = 2;
  1801. break;
  1802. case SNDRV_PCM_FORMAT_S24_LE:
  1803. ucontrol->value.integer.value[0] = 1;
  1804. break;
  1805. case SNDRV_PCM_FORMAT_S16_LE:
  1806. default:
  1807. ucontrol->value.integer.value[0] = 0;
  1808. break;
  1809. }
  1810. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1811. __func__, usb_rx_cfg.bit_format,
  1812. ucontrol->value.integer.value[0]);
  1813. return 0;
  1814. }
  1815. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  1816. struct snd_ctl_elem_value *ucontrol)
  1817. {
  1818. int rc = 0;
  1819. switch (ucontrol->value.integer.value[0]) {
  1820. case 3:
  1821. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1822. break;
  1823. case 2:
  1824. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1825. break;
  1826. case 1:
  1827. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1828. break;
  1829. case 0:
  1830. default:
  1831. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1832. break;
  1833. }
  1834. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1835. __func__, usb_rx_cfg.bit_format,
  1836. ucontrol->value.integer.value[0]);
  1837. return rc;
  1838. }
  1839. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  1840. struct snd_ctl_elem_value *ucontrol)
  1841. {
  1842. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  1843. usb_tx_cfg.channels);
  1844. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  1845. return 0;
  1846. }
  1847. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  1848. struct snd_ctl_elem_value *ucontrol)
  1849. {
  1850. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1851. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  1852. return 1;
  1853. }
  1854. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1855. struct snd_ctl_elem_value *ucontrol)
  1856. {
  1857. int sample_rate_val;
  1858. switch (usb_tx_cfg.sample_rate) {
  1859. case SAMPLING_RATE_384KHZ:
  1860. sample_rate_val = 12;
  1861. break;
  1862. case SAMPLING_RATE_352P8KHZ:
  1863. sample_rate_val = 11;
  1864. break;
  1865. case SAMPLING_RATE_192KHZ:
  1866. sample_rate_val = 10;
  1867. break;
  1868. case SAMPLING_RATE_176P4KHZ:
  1869. sample_rate_val = 9;
  1870. break;
  1871. case SAMPLING_RATE_96KHZ:
  1872. sample_rate_val = 8;
  1873. break;
  1874. case SAMPLING_RATE_88P2KHZ:
  1875. sample_rate_val = 7;
  1876. break;
  1877. case SAMPLING_RATE_48KHZ:
  1878. sample_rate_val = 6;
  1879. break;
  1880. case SAMPLING_RATE_44P1KHZ:
  1881. sample_rate_val = 5;
  1882. break;
  1883. case SAMPLING_RATE_32KHZ:
  1884. sample_rate_val = 4;
  1885. break;
  1886. case SAMPLING_RATE_22P05KHZ:
  1887. sample_rate_val = 3;
  1888. break;
  1889. case SAMPLING_RATE_16KHZ:
  1890. sample_rate_val = 2;
  1891. break;
  1892. case SAMPLING_RATE_11P025KHZ:
  1893. sample_rate_val = 1;
  1894. break;
  1895. case SAMPLING_RATE_8KHZ:
  1896. sample_rate_val = 0;
  1897. break;
  1898. default:
  1899. sample_rate_val = 6;
  1900. break;
  1901. }
  1902. ucontrol->value.integer.value[0] = sample_rate_val;
  1903. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  1904. usb_tx_cfg.sample_rate);
  1905. return 0;
  1906. }
  1907. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1908. struct snd_ctl_elem_value *ucontrol)
  1909. {
  1910. switch (ucontrol->value.integer.value[0]) {
  1911. case 12:
  1912. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1913. break;
  1914. case 11:
  1915. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1916. break;
  1917. case 10:
  1918. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1919. break;
  1920. case 9:
  1921. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1922. break;
  1923. case 8:
  1924. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1925. break;
  1926. case 7:
  1927. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1928. break;
  1929. case 6:
  1930. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1931. break;
  1932. case 5:
  1933. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1934. break;
  1935. case 4:
  1936. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1937. break;
  1938. case 3:
  1939. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1940. break;
  1941. case 2:
  1942. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1943. break;
  1944. case 1:
  1945. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1946. break;
  1947. case 0:
  1948. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1949. break;
  1950. default:
  1951. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1952. break;
  1953. }
  1954. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  1955. __func__, ucontrol->value.integer.value[0],
  1956. usb_tx_cfg.sample_rate);
  1957. return 0;
  1958. }
  1959. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  1960. struct snd_ctl_elem_value *ucontrol)
  1961. {
  1962. switch (usb_tx_cfg.bit_format) {
  1963. case SNDRV_PCM_FORMAT_S32_LE:
  1964. ucontrol->value.integer.value[0] = 3;
  1965. break;
  1966. case SNDRV_PCM_FORMAT_S24_3LE:
  1967. ucontrol->value.integer.value[0] = 2;
  1968. break;
  1969. case SNDRV_PCM_FORMAT_S24_LE:
  1970. ucontrol->value.integer.value[0] = 1;
  1971. break;
  1972. case SNDRV_PCM_FORMAT_S16_LE:
  1973. default:
  1974. ucontrol->value.integer.value[0] = 0;
  1975. break;
  1976. }
  1977. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1978. __func__, usb_tx_cfg.bit_format,
  1979. ucontrol->value.integer.value[0]);
  1980. return 0;
  1981. }
  1982. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  1983. struct snd_ctl_elem_value *ucontrol)
  1984. {
  1985. int rc = 0;
  1986. switch (ucontrol->value.integer.value[0]) {
  1987. case 3:
  1988. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1989. break;
  1990. case 2:
  1991. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1992. break;
  1993. case 1:
  1994. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1995. break;
  1996. case 0:
  1997. default:
  1998. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1999. break;
  2000. }
  2001. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  2002. __func__, usb_tx_cfg.bit_format,
  2003. ucontrol->value.integer.value[0]);
  2004. return rc;
  2005. }
  2006. static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
  2007. {
  2008. int idx;
  2009. if (strnstr(kcontrol->id.name, "Display Port RX",
  2010. sizeof("Display Port RX"))) {
  2011. idx = DP_RX_IDX;
  2012. } else {
  2013. pr_err("%s: unsupported BE: %s\n",
  2014. __func__, kcontrol->id.name);
  2015. idx = -EINVAL;
  2016. }
  2017. return idx;
  2018. }
  2019. static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
  2020. struct snd_ctl_elem_value *ucontrol)
  2021. {
  2022. int idx = ext_disp_get_port_idx(kcontrol);
  2023. if (idx < 0)
  2024. return idx;
  2025. switch (ext_disp_rx_cfg[idx].bit_format) {
  2026. case SNDRV_PCM_FORMAT_S24_3LE:
  2027. ucontrol->value.integer.value[0] = 2;
  2028. break;
  2029. case SNDRV_PCM_FORMAT_S24_LE:
  2030. ucontrol->value.integer.value[0] = 1;
  2031. break;
  2032. case SNDRV_PCM_FORMAT_S16_LE:
  2033. default:
  2034. ucontrol->value.integer.value[0] = 0;
  2035. break;
  2036. }
  2037. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  2038. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  2039. ucontrol->value.integer.value[0]);
  2040. return 0;
  2041. }
  2042. static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
  2043. struct snd_ctl_elem_value *ucontrol)
  2044. {
  2045. int idx = ext_disp_get_port_idx(kcontrol);
  2046. if (idx < 0)
  2047. return idx;
  2048. switch (ucontrol->value.integer.value[0]) {
  2049. case 2:
  2050. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  2051. break;
  2052. case 1:
  2053. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  2054. break;
  2055. case 0:
  2056. default:
  2057. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  2058. break;
  2059. }
  2060. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  2061. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  2062. ucontrol->value.integer.value[0]);
  2063. return 0;
  2064. }
  2065. static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
  2066. struct snd_ctl_elem_value *ucontrol)
  2067. {
  2068. int idx = ext_disp_get_port_idx(kcontrol);
  2069. if (idx < 0)
  2070. return idx;
  2071. ucontrol->value.integer.value[0] =
  2072. ext_disp_rx_cfg[idx].channels - 2;
  2073. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  2074. idx, ext_disp_rx_cfg[idx].channels);
  2075. return 0;
  2076. }
  2077. static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
  2078. struct snd_ctl_elem_value *ucontrol)
  2079. {
  2080. int idx = ext_disp_get_port_idx(kcontrol);
  2081. if (idx < 0)
  2082. return idx;
  2083. ext_disp_rx_cfg[idx].channels =
  2084. ucontrol->value.integer.value[0] + 2;
  2085. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  2086. idx, ext_disp_rx_cfg[idx].channels);
  2087. return 1;
  2088. }
  2089. static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2090. struct snd_ctl_elem_value *ucontrol)
  2091. {
  2092. int sample_rate_val;
  2093. int idx = ext_disp_get_port_idx(kcontrol);
  2094. if (idx < 0)
  2095. return idx;
  2096. switch (ext_disp_rx_cfg[idx].sample_rate) {
  2097. case SAMPLING_RATE_176P4KHZ:
  2098. sample_rate_val = 6;
  2099. break;
  2100. case SAMPLING_RATE_88P2KHZ:
  2101. sample_rate_val = 5;
  2102. break;
  2103. case SAMPLING_RATE_44P1KHZ:
  2104. sample_rate_val = 4;
  2105. break;
  2106. case SAMPLING_RATE_32KHZ:
  2107. sample_rate_val = 3;
  2108. break;
  2109. case SAMPLING_RATE_192KHZ:
  2110. sample_rate_val = 2;
  2111. break;
  2112. case SAMPLING_RATE_96KHZ:
  2113. sample_rate_val = 1;
  2114. break;
  2115. case SAMPLING_RATE_48KHZ:
  2116. default:
  2117. sample_rate_val = 0;
  2118. break;
  2119. }
  2120. ucontrol->value.integer.value[0] = sample_rate_val;
  2121. pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
  2122. idx, ext_disp_rx_cfg[idx].sample_rate);
  2123. return 0;
  2124. }
  2125. static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2126. struct snd_ctl_elem_value *ucontrol)
  2127. {
  2128. int idx = ext_disp_get_port_idx(kcontrol);
  2129. if (idx < 0)
  2130. return idx;
  2131. switch (ucontrol->value.integer.value[0]) {
  2132. case 6:
  2133. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
  2134. break;
  2135. case 5:
  2136. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
  2137. break;
  2138. case 4:
  2139. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
  2140. break;
  2141. case 3:
  2142. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
  2143. break;
  2144. case 2:
  2145. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
  2146. break;
  2147. case 1:
  2148. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
  2149. break;
  2150. case 0:
  2151. default:
  2152. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
  2153. break;
  2154. }
  2155. pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
  2156. __func__, ucontrol->value.integer.value[0], idx,
  2157. ext_disp_rx_cfg[idx].sample_rate);
  2158. return 0;
  2159. }
  2160. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  2161. struct snd_ctl_elem_value *ucontrol)
  2162. {
  2163. pr_debug("%s: proxy_rx channels = %d\n",
  2164. __func__, proxy_rx_cfg.channels);
  2165. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  2166. return 0;
  2167. }
  2168. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  2169. struct snd_ctl_elem_value *ucontrol)
  2170. {
  2171. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  2172. pr_debug("%s: proxy_rx channels = %d\n",
  2173. __func__, proxy_rx_cfg.channels);
  2174. return 1;
  2175. }
  2176. static int tdm_get_sample_rate(int value)
  2177. {
  2178. int sample_rate = 0;
  2179. switch (value) {
  2180. case 0:
  2181. sample_rate = SAMPLING_RATE_8KHZ;
  2182. break;
  2183. case 1:
  2184. sample_rate = SAMPLING_RATE_16KHZ;
  2185. break;
  2186. case 2:
  2187. sample_rate = SAMPLING_RATE_32KHZ;
  2188. break;
  2189. case 3:
  2190. sample_rate = SAMPLING_RATE_48KHZ;
  2191. break;
  2192. case 4:
  2193. sample_rate = SAMPLING_RATE_176P4KHZ;
  2194. break;
  2195. case 5:
  2196. sample_rate = SAMPLING_RATE_352P8KHZ;
  2197. break;
  2198. default:
  2199. sample_rate = SAMPLING_RATE_48KHZ;
  2200. break;
  2201. }
  2202. return sample_rate;
  2203. }
  2204. static int aux_pcm_get_sample_rate(int value)
  2205. {
  2206. int sample_rate;
  2207. switch (value) {
  2208. case 1:
  2209. sample_rate = SAMPLING_RATE_16KHZ;
  2210. break;
  2211. case 0:
  2212. default:
  2213. sample_rate = SAMPLING_RATE_8KHZ;
  2214. break;
  2215. }
  2216. return sample_rate;
  2217. }
  2218. static int tdm_get_sample_rate_val(int sample_rate)
  2219. {
  2220. int sample_rate_val = 0;
  2221. switch (sample_rate) {
  2222. case SAMPLING_RATE_8KHZ:
  2223. sample_rate_val = 0;
  2224. break;
  2225. case SAMPLING_RATE_16KHZ:
  2226. sample_rate_val = 1;
  2227. break;
  2228. case SAMPLING_RATE_32KHZ:
  2229. sample_rate_val = 2;
  2230. break;
  2231. case SAMPLING_RATE_48KHZ:
  2232. sample_rate_val = 3;
  2233. break;
  2234. case SAMPLING_RATE_176P4KHZ:
  2235. sample_rate_val = 4;
  2236. break;
  2237. case SAMPLING_RATE_352P8KHZ:
  2238. sample_rate_val = 5;
  2239. break;
  2240. default:
  2241. sample_rate_val = 3;
  2242. break;
  2243. }
  2244. return sample_rate_val;
  2245. }
  2246. static int aux_pcm_get_sample_rate_val(int sample_rate)
  2247. {
  2248. int sample_rate_val;
  2249. switch (sample_rate) {
  2250. case SAMPLING_RATE_16KHZ:
  2251. sample_rate_val = 1;
  2252. break;
  2253. case SAMPLING_RATE_8KHZ:
  2254. default:
  2255. sample_rate_val = 0;
  2256. break;
  2257. }
  2258. return sample_rate_val;
  2259. }
  2260. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  2261. struct tdm_port *port)
  2262. {
  2263. if (port) {
  2264. if (strnstr(kcontrol->id.name, "PRI",
  2265. sizeof(kcontrol->id.name))) {
  2266. port->mode = TDM_PRI;
  2267. } else if (strnstr(kcontrol->id.name, "SEC",
  2268. sizeof(kcontrol->id.name))) {
  2269. port->mode = TDM_SEC;
  2270. } else if (strnstr(kcontrol->id.name, "TERT",
  2271. sizeof(kcontrol->id.name))) {
  2272. port->mode = TDM_TERT;
  2273. } else if (strnstr(kcontrol->id.name, "QUAT",
  2274. sizeof(kcontrol->id.name))) {
  2275. port->mode = TDM_QUAT;
  2276. } else if (strnstr(kcontrol->id.name, "QUIN",
  2277. sizeof(kcontrol->id.name))) {
  2278. port->mode = TDM_QUIN;
  2279. } else {
  2280. pr_err("%s: unsupported mode in: %s\n",
  2281. __func__, kcontrol->id.name);
  2282. return -EINVAL;
  2283. }
  2284. if (strnstr(kcontrol->id.name, "RX_0",
  2285. sizeof(kcontrol->id.name)) ||
  2286. strnstr(kcontrol->id.name, "TX_0",
  2287. sizeof(kcontrol->id.name))) {
  2288. port->channel = TDM_0;
  2289. } else if (strnstr(kcontrol->id.name, "RX_1",
  2290. sizeof(kcontrol->id.name)) ||
  2291. strnstr(kcontrol->id.name, "TX_1",
  2292. sizeof(kcontrol->id.name))) {
  2293. port->channel = TDM_1;
  2294. } else if (strnstr(kcontrol->id.name, "RX_2",
  2295. sizeof(kcontrol->id.name)) ||
  2296. strnstr(kcontrol->id.name, "TX_2",
  2297. sizeof(kcontrol->id.name))) {
  2298. port->channel = TDM_2;
  2299. } else if (strnstr(kcontrol->id.name, "RX_3",
  2300. sizeof(kcontrol->id.name)) ||
  2301. strnstr(kcontrol->id.name, "TX_3",
  2302. sizeof(kcontrol->id.name))) {
  2303. port->channel = TDM_3;
  2304. } else if (strnstr(kcontrol->id.name, "RX_4",
  2305. sizeof(kcontrol->id.name)) ||
  2306. strnstr(kcontrol->id.name, "TX_4",
  2307. sizeof(kcontrol->id.name))) {
  2308. port->channel = TDM_4;
  2309. } else if (strnstr(kcontrol->id.name, "RX_5",
  2310. sizeof(kcontrol->id.name)) ||
  2311. strnstr(kcontrol->id.name, "TX_5",
  2312. sizeof(kcontrol->id.name))) {
  2313. port->channel = TDM_5;
  2314. } else if (strnstr(kcontrol->id.name, "RX_6",
  2315. sizeof(kcontrol->id.name)) ||
  2316. strnstr(kcontrol->id.name, "TX_6",
  2317. sizeof(kcontrol->id.name))) {
  2318. port->channel = TDM_6;
  2319. } else if (strnstr(kcontrol->id.name, "RX_7",
  2320. sizeof(kcontrol->id.name)) ||
  2321. strnstr(kcontrol->id.name, "TX_7",
  2322. sizeof(kcontrol->id.name))) {
  2323. port->channel = TDM_7;
  2324. } else {
  2325. pr_err("%s: unsupported channel in: %s\n",
  2326. __func__, kcontrol->id.name);
  2327. return -EINVAL;
  2328. }
  2329. } else {
  2330. return -EINVAL;
  2331. }
  2332. return 0;
  2333. }
  2334. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2335. struct snd_ctl_elem_value *ucontrol)
  2336. {
  2337. struct tdm_port port;
  2338. int ret = tdm_get_port_idx(kcontrol, &port);
  2339. if (ret) {
  2340. pr_err("%s: unsupported control: %s\n",
  2341. __func__, kcontrol->id.name);
  2342. } else {
  2343. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2344. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  2345. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2346. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2347. ucontrol->value.enumerated.item[0]);
  2348. }
  2349. return ret;
  2350. }
  2351. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2352. struct snd_ctl_elem_value *ucontrol)
  2353. {
  2354. struct tdm_port port;
  2355. int ret = tdm_get_port_idx(kcontrol, &port);
  2356. if (ret) {
  2357. pr_err("%s: unsupported control: %s\n",
  2358. __func__, kcontrol->id.name);
  2359. } else {
  2360. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  2361. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2362. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2363. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2364. ucontrol->value.enumerated.item[0]);
  2365. }
  2366. return ret;
  2367. }
  2368. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2369. struct snd_ctl_elem_value *ucontrol)
  2370. {
  2371. struct tdm_port port;
  2372. int ret = tdm_get_port_idx(kcontrol, &port);
  2373. if (ret) {
  2374. pr_err("%s: unsupported control: %s\n",
  2375. __func__, kcontrol->id.name);
  2376. } else {
  2377. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2378. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  2379. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2380. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2381. ucontrol->value.enumerated.item[0]);
  2382. }
  2383. return ret;
  2384. }
  2385. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2386. struct snd_ctl_elem_value *ucontrol)
  2387. {
  2388. struct tdm_port port;
  2389. int ret = tdm_get_port_idx(kcontrol, &port);
  2390. if (ret) {
  2391. pr_err("%s: unsupported control: %s\n",
  2392. __func__, kcontrol->id.name);
  2393. } else {
  2394. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  2395. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2396. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2397. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2398. ucontrol->value.enumerated.item[0]);
  2399. }
  2400. return ret;
  2401. }
  2402. static int tdm_get_format(int value)
  2403. {
  2404. int format = 0;
  2405. switch (value) {
  2406. case 0:
  2407. format = SNDRV_PCM_FORMAT_S16_LE;
  2408. break;
  2409. case 1:
  2410. format = SNDRV_PCM_FORMAT_S24_LE;
  2411. break;
  2412. case 2:
  2413. format = SNDRV_PCM_FORMAT_S32_LE;
  2414. break;
  2415. default:
  2416. format = SNDRV_PCM_FORMAT_S16_LE;
  2417. break;
  2418. }
  2419. return format;
  2420. }
  2421. static int tdm_get_format_val(int format)
  2422. {
  2423. int value = 0;
  2424. switch (format) {
  2425. case SNDRV_PCM_FORMAT_S16_LE:
  2426. value = 0;
  2427. break;
  2428. case SNDRV_PCM_FORMAT_S24_LE:
  2429. value = 1;
  2430. break;
  2431. case SNDRV_PCM_FORMAT_S32_LE:
  2432. value = 2;
  2433. break;
  2434. default:
  2435. value = 0;
  2436. break;
  2437. }
  2438. return value;
  2439. }
  2440. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  2441. struct snd_ctl_elem_value *ucontrol)
  2442. {
  2443. struct tdm_port port;
  2444. int ret = tdm_get_port_idx(kcontrol, &port);
  2445. if (ret) {
  2446. pr_err("%s: unsupported control: %s\n",
  2447. __func__, kcontrol->id.name);
  2448. } else {
  2449. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2450. tdm_rx_cfg[port.mode][port.channel].bit_format);
  2451. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2452. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2453. ucontrol->value.enumerated.item[0]);
  2454. }
  2455. return ret;
  2456. }
  2457. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  2458. struct snd_ctl_elem_value *ucontrol)
  2459. {
  2460. struct tdm_port port;
  2461. int ret = tdm_get_port_idx(kcontrol, &port);
  2462. if (ret) {
  2463. pr_err("%s: unsupported control: %s\n",
  2464. __func__, kcontrol->id.name);
  2465. } else {
  2466. tdm_rx_cfg[port.mode][port.channel].bit_format =
  2467. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2468. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2469. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2470. ucontrol->value.enumerated.item[0]);
  2471. }
  2472. return ret;
  2473. }
  2474. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  2475. struct snd_ctl_elem_value *ucontrol)
  2476. {
  2477. struct tdm_port port;
  2478. int ret = tdm_get_port_idx(kcontrol, &port);
  2479. if (ret) {
  2480. pr_err("%s: unsupported control: %s\n",
  2481. __func__, kcontrol->id.name);
  2482. } else {
  2483. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2484. tdm_tx_cfg[port.mode][port.channel].bit_format);
  2485. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2486. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2487. ucontrol->value.enumerated.item[0]);
  2488. }
  2489. return ret;
  2490. }
  2491. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  2492. struct snd_ctl_elem_value *ucontrol)
  2493. {
  2494. struct tdm_port port;
  2495. int ret = tdm_get_port_idx(kcontrol, &port);
  2496. if (ret) {
  2497. pr_err("%s: unsupported control: %s\n",
  2498. __func__, kcontrol->id.name);
  2499. } else {
  2500. tdm_tx_cfg[port.mode][port.channel].bit_format =
  2501. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2502. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2503. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2504. ucontrol->value.enumerated.item[0]);
  2505. }
  2506. return ret;
  2507. }
  2508. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  2509. struct snd_ctl_elem_value *ucontrol)
  2510. {
  2511. struct tdm_port port;
  2512. int ret = tdm_get_port_idx(kcontrol, &port);
  2513. if (ret) {
  2514. pr_err("%s: unsupported control: %s\n",
  2515. __func__, kcontrol->id.name);
  2516. } else {
  2517. ucontrol->value.enumerated.item[0] =
  2518. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  2519. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2520. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  2521. ucontrol->value.enumerated.item[0]);
  2522. }
  2523. return ret;
  2524. }
  2525. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  2526. struct snd_ctl_elem_value *ucontrol)
  2527. {
  2528. struct tdm_port port;
  2529. int ret = tdm_get_port_idx(kcontrol, &port);
  2530. if (ret) {
  2531. pr_err("%s: unsupported control: %s\n",
  2532. __func__, kcontrol->id.name);
  2533. } else {
  2534. tdm_rx_cfg[port.mode][port.channel].channels =
  2535. ucontrol->value.enumerated.item[0] + 1;
  2536. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2537. tdm_rx_cfg[port.mode][port.channel].channels,
  2538. ucontrol->value.enumerated.item[0] + 1);
  2539. }
  2540. return ret;
  2541. }
  2542. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  2543. struct snd_ctl_elem_value *ucontrol)
  2544. {
  2545. struct tdm_port port;
  2546. int ret = tdm_get_port_idx(kcontrol, &port);
  2547. if (ret) {
  2548. pr_err("%s: unsupported control: %s\n",
  2549. __func__, kcontrol->id.name);
  2550. } else {
  2551. ucontrol->value.enumerated.item[0] =
  2552. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  2553. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2554. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  2555. ucontrol->value.enumerated.item[0]);
  2556. }
  2557. return ret;
  2558. }
  2559. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  2560. struct snd_ctl_elem_value *ucontrol)
  2561. {
  2562. struct tdm_port port;
  2563. int ret = tdm_get_port_idx(kcontrol, &port);
  2564. if (ret) {
  2565. pr_err("%s: unsupported control: %s\n",
  2566. __func__, kcontrol->id.name);
  2567. } else {
  2568. tdm_tx_cfg[port.mode][port.channel].channels =
  2569. ucontrol->value.enumerated.item[0] + 1;
  2570. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2571. tdm_tx_cfg[port.mode][port.channel].channels,
  2572. ucontrol->value.enumerated.item[0] + 1);
  2573. }
  2574. return ret;
  2575. }
  2576. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  2577. {
  2578. int idx;
  2579. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  2580. sizeof("PRIM_AUX_PCM"))) {
  2581. idx = PRIM_AUX_PCM;
  2582. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  2583. sizeof("SEC_AUX_PCM"))) {
  2584. idx = SEC_AUX_PCM;
  2585. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  2586. sizeof("TERT_AUX_PCM"))) {
  2587. idx = TERT_AUX_PCM;
  2588. } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
  2589. sizeof("QUAT_AUX_PCM"))) {
  2590. idx = QUAT_AUX_PCM;
  2591. } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
  2592. sizeof("QUIN_AUX_PCM"))) {
  2593. idx = QUIN_AUX_PCM;
  2594. } else {
  2595. pr_err("%s: unsupported port: %s\n",
  2596. __func__, kcontrol->id.name);
  2597. idx = -EINVAL;
  2598. }
  2599. return idx;
  2600. }
  2601. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2602. struct snd_ctl_elem_value *ucontrol)
  2603. {
  2604. int idx = aux_pcm_get_port_idx(kcontrol);
  2605. if (idx < 0)
  2606. return idx;
  2607. aux_pcm_rx_cfg[idx].sample_rate =
  2608. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2609. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2610. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2611. ucontrol->value.enumerated.item[0]);
  2612. return 0;
  2613. }
  2614. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2615. struct snd_ctl_elem_value *ucontrol)
  2616. {
  2617. int idx = aux_pcm_get_port_idx(kcontrol);
  2618. if (idx < 0)
  2619. return idx;
  2620. ucontrol->value.enumerated.item[0] =
  2621. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  2622. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2623. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2624. ucontrol->value.enumerated.item[0]);
  2625. return 0;
  2626. }
  2627. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2628. struct snd_ctl_elem_value *ucontrol)
  2629. {
  2630. int idx = aux_pcm_get_port_idx(kcontrol);
  2631. if (idx < 0)
  2632. return idx;
  2633. aux_pcm_tx_cfg[idx].sample_rate =
  2634. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2635. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2636. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2637. ucontrol->value.enumerated.item[0]);
  2638. return 0;
  2639. }
  2640. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2641. struct snd_ctl_elem_value *ucontrol)
  2642. {
  2643. int idx = aux_pcm_get_port_idx(kcontrol);
  2644. if (idx < 0)
  2645. return idx;
  2646. ucontrol->value.enumerated.item[0] =
  2647. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  2648. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2649. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2650. ucontrol->value.enumerated.item[0]);
  2651. return 0;
  2652. }
  2653. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  2654. {
  2655. int idx;
  2656. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  2657. sizeof("PRIM_MI2S_RX"))) {
  2658. idx = PRIM_MI2S;
  2659. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  2660. sizeof("SEC_MI2S_RX"))) {
  2661. idx = SEC_MI2S;
  2662. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  2663. sizeof("TERT_MI2S_RX"))) {
  2664. idx = TERT_MI2S;
  2665. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
  2666. sizeof("QUAT_MI2S_RX"))) {
  2667. idx = QUAT_MI2S;
  2668. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
  2669. sizeof("QUIN_MI2S_RX"))) {
  2670. idx = QUIN_MI2S;
  2671. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  2672. sizeof("PRIM_MI2S_TX"))) {
  2673. idx = PRIM_MI2S;
  2674. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  2675. sizeof("SEC_MI2S_TX"))) {
  2676. idx = SEC_MI2S;
  2677. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  2678. sizeof("TERT_MI2S_TX"))) {
  2679. idx = TERT_MI2S;
  2680. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
  2681. sizeof("QUAT_MI2S_TX"))) {
  2682. idx = QUAT_MI2S;
  2683. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
  2684. sizeof("QUIN_MI2S_TX"))) {
  2685. idx = QUIN_MI2S;
  2686. } else {
  2687. pr_err("%s: unsupported channel: %s\n",
  2688. __func__, kcontrol->id.name);
  2689. idx = -EINVAL;
  2690. }
  2691. return idx;
  2692. }
  2693. static int mi2s_get_sample_rate_val(int sample_rate)
  2694. {
  2695. int sample_rate_val;
  2696. switch (sample_rate) {
  2697. case SAMPLING_RATE_8KHZ:
  2698. sample_rate_val = 0;
  2699. break;
  2700. case SAMPLING_RATE_11P025KHZ:
  2701. sample_rate_val = 1;
  2702. break;
  2703. case SAMPLING_RATE_16KHZ:
  2704. sample_rate_val = 2;
  2705. break;
  2706. case SAMPLING_RATE_22P05KHZ:
  2707. sample_rate_val = 3;
  2708. break;
  2709. case SAMPLING_RATE_32KHZ:
  2710. sample_rate_val = 4;
  2711. break;
  2712. case SAMPLING_RATE_44P1KHZ:
  2713. sample_rate_val = 5;
  2714. break;
  2715. case SAMPLING_RATE_48KHZ:
  2716. sample_rate_val = 6;
  2717. break;
  2718. case SAMPLING_RATE_96KHZ:
  2719. sample_rate_val = 7;
  2720. break;
  2721. case SAMPLING_RATE_192KHZ:
  2722. sample_rate_val = 8;
  2723. break;
  2724. default:
  2725. sample_rate_val = 6;
  2726. break;
  2727. }
  2728. return sample_rate_val;
  2729. }
  2730. static int mi2s_get_sample_rate(int value)
  2731. {
  2732. int sample_rate;
  2733. switch (value) {
  2734. case 0:
  2735. sample_rate = SAMPLING_RATE_8KHZ;
  2736. break;
  2737. case 1:
  2738. sample_rate = SAMPLING_RATE_11P025KHZ;
  2739. break;
  2740. case 2:
  2741. sample_rate = SAMPLING_RATE_16KHZ;
  2742. break;
  2743. case 3:
  2744. sample_rate = SAMPLING_RATE_22P05KHZ;
  2745. break;
  2746. case 4:
  2747. sample_rate = SAMPLING_RATE_32KHZ;
  2748. break;
  2749. case 5:
  2750. sample_rate = SAMPLING_RATE_44P1KHZ;
  2751. break;
  2752. case 6:
  2753. sample_rate = SAMPLING_RATE_48KHZ;
  2754. break;
  2755. case 7:
  2756. sample_rate = SAMPLING_RATE_96KHZ;
  2757. break;
  2758. case 8:
  2759. sample_rate = SAMPLING_RATE_192KHZ;
  2760. break;
  2761. default:
  2762. sample_rate = SAMPLING_RATE_48KHZ;
  2763. break;
  2764. }
  2765. return sample_rate;
  2766. }
  2767. static int mi2s_auxpcm_get_format(int value)
  2768. {
  2769. int format;
  2770. switch (value) {
  2771. case 0:
  2772. format = SNDRV_PCM_FORMAT_S16_LE;
  2773. break;
  2774. case 1:
  2775. format = SNDRV_PCM_FORMAT_S24_LE;
  2776. break;
  2777. case 2:
  2778. format = SNDRV_PCM_FORMAT_S24_3LE;
  2779. break;
  2780. case 3:
  2781. format = SNDRV_PCM_FORMAT_S32_LE;
  2782. break;
  2783. default:
  2784. format = SNDRV_PCM_FORMAT_S16_LE;
  2785. break;
  2786. }
  2787. return format;
  2788. }
  2789. static int mi2s_auxpcm_get_format_value(int format)
  2790. {
  2791. int value;
  2792. switch (format) {
  2793. case SNDRV_PCM_FORMAT_S16_LE:
  2794. value = 0;
  2795. break;
  2796. case SNDRV_PCM_FORMAT_S24_LE:
  2797. value = 1;
  2798. break;
  2799. case SNDRV_PCM_FORMAT_S24_3LE:
  2800. value = 2;
  2801. break;
  2802. case SNDRV_PCM_FORMAT_S32_LE:
  2803. value = 3;
  2804. break;
  2805. default:
  2806. value = 0;
  2807. break;
  2808. }
  2809. return value;
  2810. }
  2811. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2812. struct snd_ctl_elem_value *ucontrol)
  2813. {
  2814. int idx = mi2s_get_port_idx(kcontrol);
  2815. if (idx < 0)
  2816. return idx;
  2817. mi2s_rx_cfg[idx].sample_rate =
  2818. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2819. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2820. idx, mi2s_rx_cfg[idx].sample_rate,
  2821. ucontrol->value.enumerated.item[0]);
  2822. return 0;
  2823. }
  2824. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2825. struct snd_ctl_elem_value *ucontrol)
  2826. {
  2827. int idx = mi2s_get_port_idx(kcontrol);
  2828. if (idx < 0)
  2829. return idx;
  2830. ucontrol->value.enumerated.item[0] =
  2831. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  2832. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2833. idx, mi2s_rx_cfg[idx].sample_rate,
  2834. ucontrol->value.enumerated.item[0]);
  2835. return 0;
  2836. }
  2837. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2838. struct snd_ctl_elem_value *ucontrol)
  2839. {
  2840. int idx = mi2s_get_port_idx(kcontrol);
  2841. if (idx < 0)
  2842. return idx;
  2843. mi2s_tx_cfg[idx].sample_rate =
  2844. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2845. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2846. idx, mi2s_tx_cfg[idx].sample_rate,
  2847. ucontrol->value.enumerated.item[0]);
  2848. return 0;
  2849. }
  2850. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2851. struct snd_ctl_elem_value *ucontrol)
  2852. {
  2853. int idx = mi2s_get_port_idx(kcontrol);
  2854. if (idx < 0)
  2855. return idx;
  2856. ucontrol->value.enumerated.item[0] =
  2857. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  2858. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2859. idx, mi2s_tx_cfg[idx].sample_rate,
  2860. ucontrol->value.enumerated.item[0]);
  2861. return 0;
  2862. }
  2863. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  2864. struct snd_ctl_elem_value *ucontrol)
  2865. {
  2866. int idx = mi2s_get_port_idx(kcontrol);
  2867. if (idx < 0)
  2868. return idx;
  2869. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2870. idx, mi2s_rx_cfg[idx].channels);
  2871. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  2872. return 0;
  2873. }
  2874. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  2875. struct snd_ctl_elem_value *ucontrol)
  2876. {
  2877. int idx = mi2s_get_port_idx(kcontrol);
  2878. if (idx < 0)
  2879. return idx;
  2880. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2881. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2882. idx, mi2s_rx_cfg[idx].channels);
  2883. return 1;
  2884. }
  2885. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  2886. struct snd_ctl_elem_value *ucontrol)
  2887. {
  2888. int idx = mi2s_get_port_idx(kcontrol);
  2889. if (idx < 0)
  2890. return idx;
  2891. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2892. idx, mi2s_tx_cfg[idx].channels);
  2893. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  2894. return 0;
  2895. }
  2896. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  2897. struct snd_ctl_elem_value *ucontrol)
  2898. {
  2899. int idx = mi2s_get_port_idx(kcontrol);
  2900. if (idx < 0)
  2901. return idx;
  2902. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2903. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2904. idx, mi2s_tx_cfg[idx].channels);
  2905. return 1;
  2906. }
  2907. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  2908. struct snd_ctl_elem_value *ucontrol)
  2909. {
  2910. int idx = mi2s_get_port_idx(kcontrol);
  2911. if (idx < 0)
  2912. return idx;
  2913. ucontrol->value.enumerated.item[0] =
  2914. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  2915. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2916. idx, mi2s_rx_cfg[idx].bit_format,
  2917. ucontrol->value.enumerated.item[0]);
  2918. return 0;
  2919. }
  2920. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  2921. struct snd_ctl_elem_value *ucontrol)
  2922. {
  2923. int idx = mi2s_get_port_idx(kcontrol);
  2924. if (idx < 0)
  2925. return idx;
  2926. mi2s_rx_cfg[idx].bit_format =
  2927. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2928. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2929. idx, mi2s_rx_cfg[idx].bit_format,
  2930. ucontrol->value.enumerated.item[0]);
  2931. return 0;
  2932. }
  2933. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  2934. struct snd_ctl_elem_value *ucontrol)
  2935. {
  2936. int idx = mi2s_get_port_idx(kcontrol);
  2937. if (idx < 0)
  2938. return idx;
  2939. ucontrol->value.enumerated.item[0] =
  2940. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  2941. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2942. idx, mi2s_tx_cfg[idx].bit_format,
  2943. ucontrol->value.enumerated.item[0]);
  2944. return 0;
  2945. }
  2946. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  2947. struct snd_ctl_elem_value *ucontrol)
  2948. {
  2949. int idx = mi2s_get_port_idx(kcontrol);
  2950. if (idx < 0)
  2951. return idx;
  2952. mi2s_tx_cfg[idx].bit_format =
  2953. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2954. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2955. idx, mi2s_tx_cfg[idx].bit_format,
  2956. ucontrol->value.enumerated.item[0]);
  2957. return 0;
  2958. }
  2959. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  2960. struct snd_ctl_elem_value *ucontrol)
  2961. {
  2962. int idx = aux_pcm_get_port_idx(kcontrol);
  2963. if (idx < 0)
  2964. return idx;
  2965. ucontrol->value.enumerated.item[0] =
  2966. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  2967. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2968. idx, aux_pcm_rx_cfg[idx].bit_format,
  2969. ucontrol->value.enumerated.item[0]);
  2970. return 0;
  2971. }
  2972. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  2973. struct snd_ctl_elem_value *ucontrol)
  2974. {
  2975. int idx = aux_pcm_get_port_idx(kcontrol);
  2976. if (idx < 0)
  2977. return idx;
  2978. aux_pcm_rx_cfg[idx].bit_format =
  2979. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2980. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2981. idx, aux_pcm_rx_cfg[idx].bit_format,
  2982. ucontrol->value.enumerated.item[0]);
  2983. return 0;
  2984. }
  2985. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  2986. struct snd_ctl_elem_value *ucontrol)
  2987. {
  2988. int idx = aux_pcm_get_port_idx(kcontrol);
  2989. if (idx < 0)
  2990. return idx;
  2991. ucontrol->value.enumerated.item[0] =
  2992. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  2993. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2994. idx, aux_pcm_tx_cfg[idx].bit_format,
  2995. ucontrol->value.enumerated.item[0]);
  2996. return 0;
  2997. }
  2998. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  2999. struct snd_ctl_elem_value *ucontrol)
  3000. {
  3001. int idx = aux_pcm_get_port_idx(kcontrol);
  3002. if (idx < 0)
  3003. return idx;
  3004. aux_pcm_tx_cfg[idx].bit_format =
  3005. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  3006. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  3007. idx, aux_pcm_tx_cfg[idx].bit_format,
  3008. ucontrol->value.enumerated.item[0]);
  3009. return 0;
  3010. }
  3011. static int msm_hifi_ctrl(struct snd_soc_component *component)
  3012. {
  3013. struct snd_soc_dapm_context *dapm =
  3014. snd_soc_component_get_dapm(component);
  3015. struct snd_soc_card *card = component->card;
  3016. struct msm_asoc_mach_data *pdata =
  3017. snd_soc_card_get_drvdata(card);
  3018. dev_dbg(component->dev, "%s: msm_hifi_control = %d\n", __func__,
  3019. msm_hifi_control);
  3020. if (!pdata || !pdata->hph_en1_gpio_p) {
  3021. dev_err(component->dev, "%s: hph_en1_gpio is invalid\n",
  3022. __func__);
  3023. return -EINVAL;
  3024. }
  3025. if (msm_hifi_control == MSM_HIFI_ON) {
  3026. msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
  3027. /* 5msec delay needed as per HW requirement */
  3028. usleep_range(5000, 5010);
  3029. } else {
  3030. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
  3031. }
  3032. snd_soc_dapm_sync(dapm);
  3033. return 0;
  3034. }
  3035. static int msm_hifi_get(struct snd_kcontrol *kcontrol,
  3036. struct snd_ctl_elem_value *ucontrol)
  3037. {
  3038. pr_debug("%s: msm_hifi_control = %d\n",
  3039. __func__, msm_hifi_control);
  3040. ucontrol->value.integer.value[0] = msm_hifi_control;
  3041. return 0;
  3042. }
  3043. static int msm_hifi_put(struct snd_kcontrol *kcontrol,
  3044. struct snd_ctl_elem_value *ucontrol)
  3045. {
  3046. struct snd_soc_component *component =
  3047. snd_soc_kcontrol_component(kcontrol);
  3048. dev_dbg(component->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  3049. __func__, ucontrol->value.integer.value[0]);
  3050. msm_hifi_control = ucontrol->value.integer.value[0];
  3051. msm_hifi_ctrl(component);
  3052. return 0;
  3053. }
  3054. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  3055. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  3056. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3057. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  3058. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3059. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  3060. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3061. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  3062. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3063. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  3064. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3065. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  3066. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3067. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  3068. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3069. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  3070. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3071. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  3072. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3073. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  3074. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3075. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  3076. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3077. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  3078. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3079. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  3080. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3081. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  3082. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3083. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  3084. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3085. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  3086. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3087. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  3088. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3089. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  3090. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3091. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  3092. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3093. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  3094. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3095. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  3096. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3097. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  3098. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3099. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  3100. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3101. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  3102. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3103. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  3104. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3105. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  3106. wsa_cdc_dma_rx_0_sample_rate,
  3107. cdc_dma_rx_sample_rate_get,
  3108. cdc_dma_rx_sample_rate_put),
  3109. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  3110. wsa_cdc_dma_rx_1_sample_rate,
  3111. cdc_dma_rx_sample_rate_get,
  3112. cdc_dma_rx_sample_rate_put),
  3113. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  3114. rx_cdc_dma_rx_0_sample_rate,
  3115. cdc_dma_rx_sample_rate_get,
  3116. cdc_dma_rx_sample_rate_put),
  3117. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  3118. rx_cdc_dma_rx_1_sample_rate,
  3119. cdc_dma_rx_sample_rate_get,
  3120. cdc_dma_rx_sample_rate_put),
  3121. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  3122. rx_cdc_dma_rx_2_sample_rate,
  3123. cdc_dma_rx_sample_rate_get,
  3124. cdc_dma_rx_sample_rate_put),
  3125. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  3126. rx_cdc_dma_rx_3_sample_rate,
  3127. cdc_dma_rx_sample_rate_get,
  3128. cdc_dma_rx_sample_rate_put),
  3129. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  3130. rx_cdc_dma_rx_5_sample_rate,
  3131. cdc_dma_rx_sample_rate_get,
  3132. cdc_dma_rx_sample_rate_put),
  3133. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  3134. wsa_cdc_dma_tx_0_sample_rate,
  3135. cdc_dma_tx_sample_rate_get,
  3136. cdc_dma_tx_sample_rate_put),
  3137. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  3138. wsa_cdc_dma_tx_1_sample_rate,
  3139. cdc_dma_tx_sample_rate_get,
  3140. cdc_dma_tx_sample_rate_put),
  3141. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  3142. wsa_cdc_dma_tx_2_sample_rate,
  3143. cdc_dma_tx_sample_rate_get,
  3144. cdc_dma_tx_sample_rate_put),
  3145. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  3146. tx_cdc_dma_tx_0_sample_rate,
  3147. cdc_dma_tx_sample_rate_get,
  3148. cdc_dma_tx_sample_rate_put),
  3149. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  3150. tx_cdc_dma_tx_3_sample_rate,
  3151. cdc_dma_tx_sample_rate_get,
  3152. cdc_dma_tx_sample_rate_put),
  3153. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  3154. tx_cdc_dma_tx_4_sample_rate,
  3155. cdc_dma_tx_sample_rate_get,
  3156. cdc_dma_tx_sample_rate_put),
  3157. };
  3158. static const struct snd_kcontrol_new msm_ext_snd_controls[] = {
  3159. SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
  3160. slim_rx_ch_get, slim_rx_ch_put),
  3161. SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
  3162. slim_rx_ch_get, slim_rx_ch_put),
  3163. SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
  3164. slim_tx_ch_get, slim_tx_ch_put),
  3165. SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
  3166. slim_tx_ch_get, slim_tx_ch_put),
  3167. SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
  3168. slim_rx_ch_get, slim_rx_ch_put),
  3169. SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
  3170. slim_rx_ch_get, slim_rx_ch_put),
  3171. SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
  3172. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3173. SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
  3174. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3175. SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
  3176. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3177. SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
  3178. slim_tx_bit_format_get, slim_tx_bit_format_put),
  3179. SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
  3180. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3181. SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
  3182. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3183. SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
  3184. slim_tx_sample_rate_get, slim_tx_sample_rate_put),
  3185. SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
  3186. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3187. SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
  3188. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3189. };
  3190. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  3191. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  3192. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  3193. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  3194. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  3195. SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
  3196. ext_disp_rx_ch_get, ext_disp_rx_ch_put),
  3197. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  3198. proxy_rx_ch_get, proxy_rx_ch_put),
  3199. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  3200. usb_audio_rx_format_get, usb_audio_rx_format_put),
  3201. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  3202. usb_audio_tx_format_get, usb_audio_tx_format_put),
  3203. SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
  3204. ext_disp_rx_format_get, ext_disp_rx_format_put),
  3205. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  3206. usb_audio_rx_sample_rate_get,
  3207. usb_audio_rx_sample_rate_put),
  3208. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  3209. usb_audio_tx_sample_rate_get,
  3210. usb_audio_tx_sample_rate_put),
  3211. SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
  3212. ext_disp_rx_sample_rate_get,
  3213. ext_disp_rx_sample_rate_put),
  3214. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3215. tdm_rx_sample_rate_get,
  3216. tdm_rx_sample_rate_put),
  3217. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3218. tdm_tx_sample_rate_get,
  3219. tdm_tx_sample_rate_put),
  3220. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  3221. tdm_rx_format_get,
  3222. tdm_rx_format_put),
  3223. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  3224. tdm_tx_format_get,
  3225. tdm_tx_format_put),
  3226. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  3227. tdm_rx_ch_get,
  3228. tdm_rx_ch_put),
  3229. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  3230. tdm_tx_ch_get,
  3231. tdm_tx_ch_put),
  3232. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3233. tdm_rx_sample_rate_get,
  3234. tdm_rx_sample_rate_put),
  3235. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3236. tdm_tx_sample_rate_get,
  3237. tdm_tx_sample_rate_put),
  3238. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  3239. tdm_rx_format_get,
  3240. tdm_rx_format_put),
  3241. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  3242. tdm_tx_format_get,
  3243. tdm_tx_format_put),
  3244. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  3245. tdm_rx_ch_get,
  3246. tdm_rx_ch_put),
  3247. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  3248. tdm_tx_ch_get,
  3249. tdm_tx_ch_put),
  3250. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3251. tdm_rx_sample_rate_get,
  3252. tdm_rx_sample_rate_put),
  3253. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3254. tdm_tx_sample_rate_get,
  3255. tdm_tx_sample_rate_put),
  3256. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  3257. tdm_rx_format_get,
  3258. tdm_rx_format_put),
  3259. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  3260. tdm_tx_format_get,
  3261. tdm_tx_format_put),
  3262. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  3263. tdm_rx_ch_get,
  3264. tdm_rx_ch_put),
  3265. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  3266. tdm_tx_ch_get,
  3267. tdm_tx_ch_put),
  3268. SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3269. tdm_rx_sample_rate_get,
  3270. tdm_rx_sample_rate_put),
  3271. SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3272. tdm_tx_sample_rate_get,
  3273. tdm_tx_sample_rate_put),
  3274. SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
  3275. tdm_rx_format_get,
  3276. tdm_rx_format_put),
  3277. SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
  3278. tdm_tx_format_get,
  3279. tdm_tx_format_put),
  3280. SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
  3281. tdm_rx_ch_get,
  3282. tdm_rx_ch_put),
  3283. SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
  3284. tdm_tx_ch_get,
  3285. tdm_tx_ch_put),
  3286. SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3287. tdm_rx_sample_rate_get,
  3288. tdm_rx_sample_rate_put),
  3289. SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3290. tdm_tx_sample_rate_get,
  3291. tdm_tx_sample_rate_put),
  3292. SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
  3293. tdm_rx_format_get,
  3294. tdm_rx_format_put),
  3295. SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
  3296. tdm_tx_format_get,
  3297. tdm_tx_format_put),
  3298. SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
  3299. tdm_rx_ch_get,
  3300. tdm_rx_ch_put),
  3301. SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
  3302. tdm_tx_ch_get,
  3303. tdm_tx_ch_put),
  3304. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  3305. aux_pcm_rx_sample_rate_get,
  3306. aux_pcm_rx_sample_rate_put),
  3307. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  3308. aux_pcm_rx_sample_rate_get,
  3309. aux_pcm_rx_sample_rate_put),
  3310. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  3311. aux_pcm_rx_sample_rate_get,
  3312. aux_pcm_rx_sample_rate_put),
  3313. SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
  3314. aux_pcm_rx_sample_rate_get,
  3315. aux_pcm_rx_sample_rate_put),
  3316. SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
  3317. aux_pcm_rx_sample_rate_get,
  3318. aux_pcm_rx_sample_rate_put),
  3319. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  3320. aux_pcm_tx_sample_rate_get,
  3321. aux_pcm_tx_sample_rate_put),
  3322. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  3323. aux_pcm_tx_sample_rate_get,
  3324. aux_pcm_tx_sample_rate_put),
  3325. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  3326. aux_pcm_tx_sample_rate_get,
  3327. aux_pcm_tx_sample_rate_put),
  3328. SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
  3329. aux_pcm_tx_sample_rate_get,
  3330. aux_pcm_tx_sample_rate_put),
  3331. SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
  3332. aux_pcm_tx_sample_rate_get,
  3333. aux_pcm_tx_sample_rate_put),
  3334. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  3335. mi2s_rx_sample_rate_get,
  3336. mi2s_rx_sample_rate_put),
  3337. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  3338. mi2s_rx_sample_rate_get,
  3339. mi2s_rx_sample_rate_put),
  3340. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  3341. mi2s_rx_sample_rate_get,
  3342. mi2s_rx_sample_rate_put),
  3343. SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
  3344. mi2s_rx_sample_rate_get,
  3345. mi2s_rx_sample_rate_put),
  3346. SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
  3347. mi2s_rx_sample_rate_get,
  3348. mi2s_rx_sample_rate_put),
  3349. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  3350. mi2s_tx_sample_rate_get,
  3351. mi2s_tx_sample_rate_put),
  3352. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  3353. mi2s_tx_sample_rate_get,
  3354. mi2s_tx_sample_rate_put),
  3355. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  3356. mi2s_tx_sample_rate_get,
  3357. mi2s_tx_sample_rate_put),
  3358. SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
  3359. mi2s_tx_sample_rate_get,
  3360. mi2s_tx_sample_rate_put),
  3361. SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
  3362. mi2s_tx_sample_rate_get,
  3363. mi2s_tx_sample_rate_put),
  3364. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  3365. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3366. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  3367. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3368. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  3369. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3370. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  3371. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3372. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  3373. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3374. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  3375. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3376. SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
  3377. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3378. SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
  3379. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3380. SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
  3381. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3382. SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
  3383. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3384. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  3385. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3386. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  3387. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3388. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  3389. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3390. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  3391. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3392. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  3393. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3394. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  3395. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3396. SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
  3397. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3398. SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
  3399. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3400. SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
  3401. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3402. SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
  3403. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3404. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  3405. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3406. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  3407. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3408. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  3409. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3410. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  3411. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3412. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3413. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3414. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3415. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3416. SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3417. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3418. SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3419. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3420. SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
  3421. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3422. SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
  3423. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3424. SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
  3425. msm_hifi_put),
  3426. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  3427. msm_bt_sample_rate_get,
  3428. msm_bt_sample_rate_put),
  3429. SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
  3430. msm_bt_sample_rate_rx_get,
  3431. msm_bt_sample_rate_rx_put),
  3432. SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
  3433. msm_bt_sample_rate_tx_get,
  3434. msm_bt_sample_rate_tx_put),
  3435. SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
  3436. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  3437. };
  3438. static int msm_snd_enable_codec_ext_clk(struct snd_soc_component *component,
  3439. int enable, bool dapm)
  3440. {
  3441. int ret = 0;
  3442. if (!strcmp(component->name, "tavil_codec")) {
  3443. ret = tavil_cdc_mclk_enable(component, enable);
  3444. } else if (!strcmp(dev_name(component->dev), "tasha_codec")) {
  3445. ret = tasha_cdc_mclk_enable(component, enable, dapm);
  3446. } else {
  3447. dev_err(component->dev, "%s: unknown codec to enable ext clk\n",
  3448. __func__);
  3449. ret = -EINVAL;
  3450. }
  3451. return ret;
  3452. }
  3453. static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_component *component,
  3454. int enable, bool dapm)
  3455. {
  3456. int ret = 0;
  3457. if (!strcmp(component->name, "tavil_codec")) {
  3458. ret = tavil_cdc_mclk_tx_enable(component, enable);
  3459. } else if (!strcmp(dev_name(component->dev), "tasha_codec")) {
  3460. ret = tasha_cdc_mclk_tx_enable(component, enable, dapm);
  3461. } else {
  3462. dev_err(component->dev, "%s: unknown codec to enable TX ext clk\n",
  3463. __func__);
  3464. ret = -EINVAL;
  3465. }
  3466. return ret;
  3467. }
  3468. static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
  3469. struct snd_kcontrol *kcontrol, int event)
  3470. {
  3471. struct snd_soc_component *component =
  3472. snd_soc_dapm_to_component(w->dapm);
  3473. pr_debug("%s: event = %d\n", __func__, event);
  3474. switch (event) {
  3475. case SND_SOC_DAPM_PRE_PMU:
  3476. return msm_snd_enable_codec_ext_tx_clk(component, 1, true);
  3477. case SND_SOC_DAPM_POST_PMD:
  3478. return msm_snd_enable_codec_ext_tx_clk(component, 0, true);
  3479. }
  3480. return 0;
  3481. }
  3482. static int msm_mclk_event(struct snd_soc_dapm_widget *w,
  3483. struct snd_kcontrol *kcontrol, int event)
  3484. {
  3485. struct snd_soc_component *component =
  3486. snd_soc_dapm_to_component(w->dapm);
  3487. pr_debug("%s: event = %d\n", __func__, event);
  3488. switch (event) {
  3489. case SND_SOC_DAPM_PRE_PMU:
  3490. return msm_snd_enable_codec_ext_clk(component, 1, true);
  3491. case SND_SOC_DAPM_POST_PMD:
  3492. return msm_snd_enable_codec_ext_clk(component, 0, true);
  3493. }
  3494. return 0;
  3495. }
  3496. static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
  3497. struct snd_kcontrol *k, int event)
  3498. {
  3499. struct snd_soc_component *component =
  3500. snd_soc_dapm_to_component(w->dapm);
  3501. struct snd_soc_card *card = component->card;
  3502. struct msm_asoc_mach_data *pdata =
  3503. snd_soc_card_get_drvdata(card);
  3504. dev_dbg(component->dev, "%s: msm_hifi_control = %d\n",
  3505. __func__, msm_hifi_control);
  3506. if (!pdata || !pdata->hph_en0_gpio_p) {
  3507. dev_err(component->dev, "%s: hph_en0_gpio is invalid\n",
  3508. __func__);
  3509. return -EINVAL;
  3510. }
  3511. if (msm_hifi_control != MSM_HIFI_ON) {
  3512. dev_dbg(component->dev, "%s: HiFi mixer control is not set\n",
  3513. __func__);
  3514. return 0;
  3515. }
  3516. switch (event) {
  3517. case SND_SOC_DAPM_POST_PMU:
  3518. msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
  3519. break;
  3520. case SND_SOC_DAPM_PRE_PMD:
  3521. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
  3522. break;
  3523. }
  3524. return 0;
  3525. }
  3526. static const struct snd_soc_dapm_widget msm_ext_dapm_widgets[] = {
  3527. SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
  3528. msm_mclk_event,
  3529. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3530. SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
  3531. msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3532. SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
  3533. SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
  3534. SND_SOC_DAPM_SPK("Lineout_3 amp", NULL),
  3535. SND_SOC_DAPM_SPK("Lineout_4 amp", NULL),
  3536. SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
  3537. SND_SOC_DAPM_MIC("Handset Mic", NULL),
  3538. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  3539. SND_SOC_DAPM_MIC("Secondary Mic", NULL),
  3540. SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
  3541. SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
  3542. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3543. SND_SOC_DAPM_MIC("Analog Mic5", NULL),
  3544. SND_SOC_DAPM_MIC("Analog Mic6", NULL),
  3545. SND_SOC_DAPM_MIC("Analog Mic7", NULL),
  3546. SND_SOC_DAPM_MIC("Analog Mic8", NULL),
  3547. SND_SOC_DAPM_MIC("Digital Mic0", NULL),
  3548. SND_SOC_DAPM_MIC("Digital Mic1", NULL),
  3549. SND_SOC_DAPM_MIC("Digital Mic2", NULL),
  3550. SND_SOC_DAPM_MIC("Digital Mic3", NULL),
  3551. SND_SOC_DAPM_MIC("Digital Mic4", NULL),
  3552. SND_SOC_DAPM_MIC("Digital Mic5", NULL),
  3553. SND_SOC_DAPM_MIC("Digital Mic6", NULL),
  3554. };
  3555. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  3556. struct snd_kcontrol *kcontrol, int event)
  3557. {
  3558. struct msm_asoc_mach_data *pdata = NULL;
  3559. struct snd_soc_component *component =
  3560. snd_soc_dapm_to_component(w->dapm);
  3561. int ret = 0;
  3562. u32 dmic_idx;
  3563. int *dmic_gpio_cnt;
  3564. struct device_node *dmic_gpio;
  3565. char *wname;
  3566. wname = strpbrk(w->name, "0123");
  3567. if (!wname) {
  3568. dev_err(component->dev, "%s: widget not found\n", __func__);
  3569. return -EINVAL;
  3570. }
  3571. ret = kstrtouint(wname, 10, &dmic_idx);
  3572. if (ret < 0) {
  3573. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  3574. __func__);
  3575. return -EINVAL;
  3576. }
  3577. pdata = snd_soc_card_get_drvdata(component->card);
  3578. switch (dmic_idx) {
  3579. case 0:
  3580. case 1:
  3581. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3582. dmic_gpio = pdata->dmic01_gpio_p;
  3583. break;
  3584. case 2:
  3585. case 3:
  3586. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3587. dmic_gpio = pdata->dmic23_gpio_p;
  3588. break;
  3589. default:
  3590. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  3591. __func__);
  3592. return -EINVAL;
  3593. }
  3594. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3595. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3596. switch (event) {
  3597. case SND_SOC_DAPM_PRE_PMU:
  3598. (*dmic_gpio_cnt)++;
  3599. if (*dmic_gpio_cnt == 1) {
  3600. ret = msm_cdc_pinctrl_select_active_state(
  3601. dmic_gpio);
  3602. if (ret < 0) {
  3603. pr_err("%s: gpio set cannot be activated %sd",
  3604. __func__, "dmic_gpio");
  3605. return ret;
  3606. }
  3607. }
  3608. break;
  3609. case SND_SOC_DAPM_POST_PMD:
  3610. (*dmic_gpio_cnt)--;
  3611. if (*dmic_gpio_cnt == 0) {
  3612. ret = msm_cdc_pinctrl_select_sleep_state(
  3613. dmic_gpio);
  3614. if (ret < 0) {
  3615. pr_err("%s: gpio set cannot be de-activated %sd",
  3616. __func__, "dmic_gpio");
  3617. return ret;
  3618. }
  3619. }
  3620. break;
  3621. default:
  3622. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3623. return -EINVAL;
  3624. }
  3625. return 0;
  3626. }
  3627. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3628. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3629. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3630. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3631. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3632. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3633. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3634. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3635. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3636. };
  3637. static inline int param_is_mask(int p)
  3638. {
  3639. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  3640. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  3641. }
  3642. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  3643. int n)
  3644. {
  3645. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  3646. }
  3647. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  3648. unsigned int bit)
  3649. {
  3650. if (bit >= SNDRV_MASK_MAX)
  3651. return;
  3652. if (param_is_mask(n)) {
  3653. struct snd_mask *m = param_to_mask(p, n);
  3654. m->bits[0] = 0;
  3655. m->bits[1] = 0;
  3656. m->bits[bit >> 5] |= (1 << (bit & 31));
  3657. }
  3658. }
  3659. static int msm_slim_get_ch_from_beid(int32_t be_id)
  3660. {
  3661. int ch_id = 0;
  3662. switch (be_id) {
  3663. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3664. ch_id = SLIM_RX_0;
  3665. break;
  3666. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3667. ch_id = SLIM_RX_1;
  3668. break;
  3669. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3670. ch_id = SLIM_RX_2;
  3671. break;
  3672. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3673. ch_id = SLIM_RX_3;
  3674. break;
  3675. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3676. ch_id = SLIM_RX_4;
  3677. break;
  3678. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3679. ch_id = SLIM_RX_6;
  3680. break;
  3681. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3682. ch_id = SLIM_TX_0;
  3683. break;
  3684. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3685. ch_id = SLIM_TX_3;
  3686. break;
  3687. default:
  3688. ch_id = SLIM_RX_0;
  3689. break;
  3690. }
  3691. return ch_id;
  3692. }
  3693. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  3694. {
  3695. int idx = 0;
  3696. switch (be_id) {
  3697. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3698. idx = WSA_CDC_DMA_RX_0;
  3699. break;
  3700. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3701. idx = WSA_CDC_DMA_TX_0;
  3702. break;
  3703. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3704. idx = WSA_CDC_DMA_RX_1;
  3705. break;
  3706. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3707. idx = WSA_CDC_DMA_TX_1;
  3708. break;
  3709. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3710. idx = WSA_CDC_DMA_TX_2;
  3711. break;
  3712. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3713. idx = RX_CDC_DMA_RX_0;
  3714. break;
  3715. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3716. idx = RX_CDC_DMA_RX_1;
  3717. break;
  3718. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3719. idx = RX_CDC_DMA_RX_2;
  3720. break;
  3721. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3722. idx = RX_CDC_DMA_RX_3;
  3723. break;
  3724. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  3725. idx = RX_CDC_DMA_RX_5;
  3726. break;
  3727. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3728. idx = TX_CDC_DMA_TX_0;
  3729. break;
  3730. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3731. idx = TX_CDC_DMA_TX_3;
  3732. break;
  3733. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3734. idx = TX_CDC_DMA_TX_4;
  3735. break;
  3736. default:
  3737. idx = RX_CDC_DMA_RX_0;
  3738. break;
  3739. }
  3740. return idx;
  3741. }
  3742. static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
  3743. {
  3744. int idx = -EINVAL;
  3745. switch (be_id) {
  3746. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3747. idx = DP_RX_IDX;
  3748. break;
  3749. default:
  3750. pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
  3751. idx = -EINVAL;
  3752. break;
  3753. }
  3754. return idx;
  3755. }
  3756. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  3757. struct snd_pcm_hw_params *params)
  3758. {
  3759. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3760. struct snd_interval *rate = hw_param_interval(params,
  3761. SNDRV_PCM_HW_PARAM_RATE);
  3762. struct snd_interval *channels = hw_param_interval(params,
  3763. SNDRV_PCM_HW_PARAM_CHANNELS);
  3764. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3765. int rc = 0;
  3766. int idx;
  3767. void *config = NULL;
  3768. struct snd_soc_component *component = NULL;
  3769. pr_debug("%s: format = %d, rate = %d\n",
  3770. __func__, params_format(params), params_rate(params));
  3771. switch (dai_link->id) {
  3772. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3773. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3774. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3775. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3776. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3777. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3778. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3779. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3780. slim_rx_cfg[idx].bit_format);
  3781. rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
  3782. channels->min = channels->max = slim_rx_cfg[idx].channels;
  3783. break;
  3784. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3785. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3786. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3787. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3788. slim_tx_cfg[idx].bit_format);
  3789. rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
  3790. channels->min = channels->max = slim_tx_cfg[idx].channels;
  3791. break;
  3792. case MSM_BACKEND_DAI_SLIMBUS_1_TX:
  3793. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3794. slim_tx_cfg[1].bit_format);
  3795. rate->min = rate->max = slim_tx_cfg[1].sample_rate;
  3796. channels->min = channels->max = slim_tx_cfg[1].channels;
  3797. break;
  3798. case MSM_BACKEND_DAI_SLIMBUS_4_TX:
  3799. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3800. SNDRV_PCM_FORMAT_S32_LE);
  3801. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3802. channels->min = channels->max = msm_vi_feed_tx_ch;
  3803. break;
  3804. case MSM_BACKEND_DAI_SLIMBUS_5_RX:
  3805. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3806. slim_rx_cfg[5].bit_format);
  3807. rate->min = rate->max = slim_rx_cfg[5].sample_rate;
  3808. channels->min = channels->max = slim_rx_cfg[5].channels;
  3809. break;
  3810. case MSM_BACKEND_DAI_SLIMBUS_5_TX:
  3811. component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
  3812. if (!component) {
  3813. pr_err("%s: component is NULL\n", __func__);
  3814. rc = -EINVAL;
  3815. goto done;
  3816. }
  3817. rate->min = rate->max = SAMPLING_RATE_16KHZ;
  3818. channels->min = channels->max = 1;
  3819. config = msm_codec_fn.get_afe_config_fn(component,
  3820. AFE_SLIMBUS_SLAVE_PORT_CONFIG);
  3821. if (config) {
  3822. rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
  3823. config, SLIMBUS_5_TX);
  3824. if (rc)
  3825. pr_err("%s: Failed to set slimbus slave port config %d\n",
  3826. __func__, rc);
  3827. }
  3828. break;
  3829. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  3830. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3831. slim_rx_cfg[SLIM_RX_7].bit_format);
  3832. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  3833. channels->min = channels->max =
  3834. slim_rx_cfg[SLIM_RX_7].channels;
  3835. break;
  3836. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  3837. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  3838. channels->min = channels->max =
  3839. slim_tx_cfg[SLIM_TX_7].channels;
  3840. break;
  3841. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  3842. rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
  3843. channels->min = channels->max =
  3844. slim_tx_cfg[SLIM_TX_8].channels;
  3845. break;
  3846. case MSM_BACKEND_DAI_USB_RX:
  3847. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3848. usb_rx_cfg.bit_format);
  3849. rate->min = rate->max = usb_rx_cfg.sample_rate;
  3850. channels->min = channels->max = usb_rx_cfg.channels;
  3851. break;
  3852. case MSM_BACKEND_DAI_USB_TX:
  3853. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3854. usb_tx_cfg.bit_format);
  3855. rate->min = rate->max = usb_tx_cfg.sample_rate;
  3856. channels->min = channels->max = usb_tx_cfg.channels;
  3857. break;
  3858. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3859. idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
  3860. if (idx < 0) {
  3861. pr_err("%s: Incorrect ext disp idx %d\n",
  3862. __func__, idx);
  3863. rc = idx;
  3864. goto done;
  3865. }
  3866. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3867. ext_disp_rx_cfg[idx].bit_format);
  3868. rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
  3869. channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
  3870. break;
  3871. case MSM_BACKEND_DAI_AFE_PCM_RX:
  3872. channels->min = channels->max = proxy_rx_cfg.channels;
  3873. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3874. break;
  3875. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  3876. channels->min = channels->max =
  3877. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3878. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3879. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  3880. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  3881. break;
  3882. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  3883. channels->min = channels->max =
  3884. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3885. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3886. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  3887. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  3888. break;
  3889. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  3890. channels->min = channels->max =
  3891. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3892. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3893. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  3894. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  3895. break;
  3896. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  3897. channels->min = channels->max =
  3898. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3899. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3900. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  3901. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  3902. break;
  3903. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  3904. channels->min = channels->max =
  3905. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3906. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3907. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  3908. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  3909. break;
  3910. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  3911. channels->min = channels->max =
  3912. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3913. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3914. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  3915. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  3916. break;
  3917. case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
  3918. channels->min = channels->max =
  3919. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  3920. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3921. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  3922. rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3923. break;
  3924. case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
  3925. channels->min = channels->max =
  3926. tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  3927. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3928. tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
  3929. rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3930. break;
  3931. case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
  3932. channels->min = channels->max =
  3933. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  3934. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3935. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  3936. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3937. break;
  3938. case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
  3939. channels->min = channels->max =
  3940. tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  3941. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3942. tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
  3943. rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3944. break;
  3945. case MSM_BACKEND_DAI_AUXPCM_RX:
  3946. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3947. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  3948. rate->min = rate->max =
  3949. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  3950. channels->min = channels->max =
  3951. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  3952. break;
  3953. case MSM_BACKEND_DAI_AUXPCM_TX:
  3954. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3955. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  3956. rate->min = rate->max =
  3957. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  3958. channels->min = channels->max =
  3959. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  3960. break;
  3961. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  3962. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3963. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  3964. rate->min = rate->max =
  3965. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  3966. channels->min = channels->max =
  3967. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  3968. break;
  3969. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  3970. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3971. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  3972. rate->min = rate->max =
  3973. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  3974. channels->min = channels->max =
  3975. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  3976. break;
  3977. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  3978. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3979. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  3980. rate->min = rate->max =
  3981. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  3982. channels->min = channels->max =
  3983. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  3984. break;
  3985. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  3986. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3987. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  3988. rate->min = rate->max =
  3989. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  3990. channels->min = channels->max =
  3991. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  3992. break;
  3993. case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
  3994. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3995. aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
  3996. rate->min = rate->max =
  3997. aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
  3998. channels->min = channels->max =
  3999. aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
  4000. break;
  4001. case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
  4002. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4003. aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
  4004. rate->min = rate->max =
  4005. aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
  4006. channels->min = channels->max =
  4007. aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
  4008. break;
  4009. case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
  4010. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4011. aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
  4012. rate->min = rate->max =
  4013. aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
  4014. channels->min = channels->max =
  4015. aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
  4016. break;
  4017. case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
  4018. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4019. aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
  4020. rate->min = rate->max =
  4021. aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
  4022. channels->min = channels->max =
  4023. aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
  4024. break;
  4025. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  4026. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4027. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  4028. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  4029. channels->min = channels->max =
  4030. mi2s_rx_cfg[PRIM_MI2S].channels;
  4031. break;
  4032. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  4033. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4034. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  4035. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  4036. channels->min = channels->max =
  4037. mi2s_tx_cfg[PRIM_MI2S].channels;
  4038. break;
  4039. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  4040. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4041. mi2s_rx_cfg[SEC_MI2S].bit_format);
  4042. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  4043. channels->min = channels->max =
  4044. mi2s_rx_cfg[SEC_MI2S].channels;
  4045. break;
  4046. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  4047. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4048. mi2s_tx_cfg[SEC_MI2S].bit_format);
  4049. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  4050. channels->min = channels->max =
  4051. mi2s_tx_cfg[SEC_MI2S].channels;
  4052. break;
  4053. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  4054. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4055. mi2s_rx_cfg[TERT_MI2S].bit_format);
  4056. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  4057. channels->min = channels->max =
  4058. mi2s_rx_cfg[TERT_MI2S].channels;
  4059. break;
  4060. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4061. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4062. mi2s_tx_cfg[TERT_MI2S].bit_format);
  4063. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  4064. channels->min = channels->max =
  4065. mi2s_tx_cfg[TERT_MI2S].channels;
  4066. break;
  4067. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4068. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4069. mi2s_rx_cfg[QUAT_MI2S].bit_format);
  4070. rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
  4071. channels->min = channels->max =
  4072. mi2s_rx_cfg[QUAT_MI2S].channels;
  4073. break;
  4074. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4075. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4076. mi2s_tx_cfg[QUAT_MI2S].bit_format);
  4077. rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
  4078. channels->min = channels->max =
  4079. mi2s_tx_cfg[QUAT_MI2S].channels;
  4080. break;
  4081. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4082. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4083. mi2s_rx_cfg[QUIN_MI2S].bit_format);
  4084. rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
  4085. channels->min = channels->max =
  4086. mi2s_rx_cfg[QUIN_MI2S].channels;
  4087. break;
  4088. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4089. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4090. mi2s_tx_cfg[QUIN_MI2S].bit_format);
  4091. rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
  4092. channels->min = channels->max =
  4093. mi2s_tx_cfg[QUIN_MI2S].channels;
  4094. break;
  4095. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  4096. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  4097. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  4098. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  4099. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  4100. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4101. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4102. cdc_dma_rx_cfg[idx].bit_format);
  4103. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  4104. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  4105. break;
  4106. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  4107. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  4108. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  4109. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  4110. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  4111. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4112. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4113. cdc_dma_tx_cfg[idx].bit_format);
  4114. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  4115. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  4116. break;
  4117. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  4118. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4119. SNDRV_PCM_FORMAT_S32_LE);
  4120. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  4121. channels->min = channels->max = msm_vi_feed_tx_ch;
  4122. break;
  4123. default:
  4124. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  4125. break;
  4126. }
  4127. done:
  4128. return rc;
  4129. }
  4130. static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component,
  4131. bool active)
  4132. {
  4133. struct snd_soc_card *card = component->card;
  4134. struct msm_asoc_mach_data *pdata =
  4135. snd_soc_card_get_drvdata(card);
  4136. if (!pdata->fsa_handle)
  4137. return false;
  4138. return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
  4139. }
  4140. static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
  4141. {
  4142. int value = 0;
  4143. bool ret = false;
  4144. struct snd_soc_card *card;
  4145. struct msm_asoc_mach_data *pdata;
  4146. if (!component) {
  4147. pr_err("%s component is NULL\n", __func__);
  4148. return false;
  4149. }
  4150. card = component->card;
  4151. pdata = snd_soc_card_get_drvdata(card);
  4152. if (!pdata)
  4153. return false;
  4154. if (wcd_mbhc_cfg.enable_usbc_analog)
  4155. return msm_usbc_swap_gnd_mic(component, active);
  4156. /* if usbc is not defined, swap using us_euro_gpio_p */
  4157. if (pdata->us_euro_gpio_p) {
  4158. value = msm_cdc_pinctrl_get_state(
  4159. pdata->us_euro_gpio_p);
  4160. if (value)
  4161. msm_cdc_pinctrl_select_sleep_state(
  4162. pdata->us_euro_gpio_p);
  4163. else
  4164. msm_cdc_pinctrl_select_active_state(
  4165. pdata->us_euro_gpio_p);
  4166. dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
  4167. __func__, value, !value);
  4168. ret = true;
  4169. }
  4170. return ret;
  4171. }
  4172. static int msm_afe_set_config(struct snd_soc_component *component)
  4173. {
  4174. int ret = 0;
  4175. void *config_data = NULL;
  4176. if (!msm_codec_fn.get_afe_config_fn) {
  4177. dev_err(component->dev, "%s: codec get afe config not init'ed\n",
  4178. __func__);
  4179. return -EINVAL;
  4180. }
  4181. config_data = msm_codec_fn.get_afe_config_fn(component,
  4182. AFE_CDC_REGISTERS_CONFIG);
  4183. if (config_data) {
  4184. ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
  4185. if (ret) {
  4186. dev_err(component->dev,
  4187. "%s: Failed to set codec registers config %d\n",
  4188. __func__, ret);
  4189. return ret;
  4190. }
  4191. }
  4192. config_data = msm_codec_fn.get_afe_config_fn(component,
  4193. AFE_CDC_REGISTER_PAGE_CONFIG);
  4194. if (config_data) {
  4195. ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
  4196. 0);
  4197. if (ret)
  4198. dev_err(component->dev,
  4199. "%s: Failed to set cdc register page config\n",
  4200. __func__);
  4201. }
  4202. config_data = msm_codec_fn.get_afe_config_fn(component,
  4203. AFE_SLIMBUS_SLAVE_CONFIG);
  4204. if (config_data) {
  4205. ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
  4206. if (ret) {
  4207. dev_err(component->dev,
  4208. "%s: Failed to set slimbus slave config %d\n",
  4209. __func__, ret);
  4210. return ret;
  4211. }
  4212. }
  4213. return 0;
  4214. }
  4215. static void msm_afe_clear_config(void)
  4216. {
  4217. afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
  4218. afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
  4219. }
  4220. static int msm_config_hph_en0_gpio(struct snd_soc_component *component, bool high)
  4221. {
  4222. struct snd_soc_card *card = component->card;
  4223. struct msm_asoc_mach_data *pdata;
  4224. int val;
  4225. if (!card)
  4226. return 0;
  4227. pdata = snd_soc_card_get_drvdata(card);
  4228. if (!pdata || !gpio_is_valid(pdata->hph_en0_gpio))
  4229. return 0;
  4230. val = gpio_get_value_cansleep(pdata->hph_en0_gpio);
  4231. if ((!!val) == high)
  4232. return 0;
  4233. gpio_direction_output(pdata->hph_en0_gpio, (int)high);
  4234. return 1;
  4235. }
  4236. static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
  4237. {
  4238. int ret = 0;
  4239. void *config_data;
  4240. struct snd_soc_component *component = NULL;
  4241. struct snd_soc_dapm_context *dapm;
  4242. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4243. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4244. struct snd_soc_component *aux_comp;
  4245. struct snd_card *card = rtd->card->snd_card;
  4246. struct snd_info_entry *entry;
  4247. struct msm_asoc_mach_data *pdata =
  4248. snd_soc_card_get_drvdata(rtd->card);
  4249. /*
  4250. * Codec SLIMBUS configuration
  4251. * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
  4252. * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
  4253. * TX14, TX15, TX16
  4254. */
  4255. unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
  4256. 150, 151};
  4257. unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
  4258. 134, 135, 136, 137, 138, 139,
  4259. 140, 141, 142, 143};
  4260. pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
  4261. rtd->pmdown_time = 0;
  4262. component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
  4263. if (!component) {
  4264. pr_err("%s: component is NULL\n", __func__);
  4265. return -EINVAL;
  4266. }
  4267. dapm = snd_soc_component_get_dapm(component);
  4268. ret = snd_soc_add_component_controls(component, msm_ext_snd_controls,
  4269. ARRAY_SIZE(msm_ext_snd_controls));
  4270. if (ret < 0) {
  4271. pr_err("%s: add_codec_controls failed, err %d\n",
  4272. __func__, ret);
  4273. return ret;
  4274. }
  4275. ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
  4276. ARRAY_SIZE(msm_common_snd_controls));
  4277. if (ret < 0) {
  4278. pr_err("%s: add_codec_controls failed, err %d\n",
  4279. __func__, ret);
  4280. return ret;
  4281. }
  4282. snd_soc_dapm_new_controls(dapm, msm_ext_dapm_widgets,
  4283. ARRAY_SIZE(msm_ext_dapm_widgets));
  4284. snd_soc_dapm_add_routes(dapm, wcd_audio_paths,
  4285. ARRAY_SIZE(wcd_audio_paths));
  4286. snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
  4287. snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
  4288. snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
  4289. snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
  4290. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4291. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4292. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4293. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4294. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
  4295. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
  4296. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
  4297. snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
  4298. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
  4299. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
  4300. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
  4301. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  4302. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
  4303. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
  4304. snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
  4305. snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
  4306. snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
  4307. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  4308. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  4309. snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
  4310. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
  4311. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
  4312. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
  4313. snd_soc_dapm_sync(dapm);
  4314. snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4315. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4316. msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
  4317. ret = msm_afe_set_config(component);
  4318. if (ret) {
  4319. pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
  4320. goto err;
  4321. }
  4322. pdata->is_afe_config_done = true;
  4323. config_data = msm_codec_fn.get_afe_config_fn(component,
  4324. AFE_AANC_VERSION);
  4325. if (config_data) {
  4326. ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
  4327. if (ret) {
  4328. pr_err("%s: Failed to set aanc version %d\n",
  4329. __func__, ret);
  4330. goto err;
  4331. }
  4332. }
  4333. /*
  4334. * Send speaker configuration only for WSA8810.
  4335. * Default configuration is for WSA8815.
  4336. */
  4337. pr_debug("%s: Number of aux devices: %d\n",
  4338. __func__, rtd->card->num_aux_devs);
  4339. if (rtd->card->num_aux_devs &&
  4340. !list_empty(&rtd->card->aux_comp_list)) {
  4341. aux_comp = list_first_entry(&rtd->card->aux_comp_list,
  4342. struct snd_soc_component, card_aux_list);
  4343. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4344. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4345. tavil_set_spkr_mode(component, WCD934X_SPKR_MODE_1);
  4346. tavil_set_spkr_gain_offset(component,
  4347. WCD934X_RX_GAIN_OFFSET_M1P5_DB);
  4348. }
  4349. }
  4350. card = rtd->card->snd_card;
  4351. if (!pdata->codec_root) {
  4352. entry = snd_info_create_subdir(card->module, "codecs",
  4353. card->proc_root);
  4354. if (!entry) {
  4355. pr_debug("%s: Cannot create codecs module entry\n",
  4356. __func__);
  4357. ret = 0;
  4358. goto err;
  4359. }
  4360. pdata->codec_root = entry;
  4361. }
  4362. tavil_codec_info_create_codec_entry(pdata->codec_root, component);
  4363. codec_reg_done = true;
  4364. return 0;
  4365. err:
  4366. return ret;
  4367. }
  4368. static int msm_audrx_tasha_init(struct snd_soc_pcm_runtime *rtd)
  4369. {
  4370. int ret = 0;
  4371. void *config_data;
  4372. struct snd_soc_component *component = NULL;
  4373. struct snd_soc_dapm_context *dapm;
  4374. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4375. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4376. struct snd_soc_component *aux_comp;
  4377. struct snd_card *card;
  4378. struct snd_info_entry *entry;
  4379. struct msm_asoc_mach_data *pdata =
  4380. snd_soc_card_get_drvdata(rtd->card);
  4381. /* Codec SLIMBUS configuration
  4382. * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8, RX9, RX10, RX11, RX12, RX13
  4383. * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
  4384. * TX14, TX15, TX16
  4385. */
  4386. unsigned int rx_ch[TASHA_RX_MAX] = {144, 145, 146, 147, 148, 149, 150,
  4387. 151, 152, 153, 154, 155, 156};
  4388. unsigned int tx_ch[TASHA_TX_MAX] = {128, 129, 130, 131, 132, 133,
  4389. 134, 135, 136, 137, 138, 139,
  4390. 140, 141, 142, 143};
  4391. pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
  4392. rtd->pmdown_time = 0;
  4393. component = snd_soc_rtdcom_lookup(rtd, "tasha_codec");
  4394. if (!component) {
  4395. pr_err("%s: component is NULL\n", __func__);
  4396. return -EINVAL;
  4397. }
  4398. dapm = snd_soc_component_get_dapm(component);
  4399. ret = snd_soc_add_component_controls(component, msm_ext_snd_controls,
  4400. ARRAY_SIZE(msm_ext_snd_controls));
  4401. if (ret < 0) {
  4402. pr_err("%s: add_component_controls failed, err %d\n",
  4403. __func__, ret);
  4404. return ret;
  4405. }
  4406. ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
  4407. ARRAY_SIZE(msm_common_snd_controls));
  4408. if (ret < 0) {
  4409. pr_err("%s: add_component_controls failed, err %d\n",
  4410. __func__, ret);
  4411. return ret;
  4412. }
  4413. snd_soc_dapm_new_controls(dapm, msm_ext_dapm_widgets,
  4414. ARRAY_SIZE(msm_ext_dapm_widgets));
  4415. snd_soc_dapm_add_routes(dapm, wcd_audio_paths,
  4416. ARRAY_SIZE(wcd_audio_paths));
  4417. snd_soc_dapm_enable_pin(dapm, "Lineout_1 amp");
  4418. snd_soc_dapm_enable_pin(dapm, "Lineout_2 amp");
  4419. snd_soc_dapm_enable_pin(dapm, "Lineout_3 amp");
  4420. snd_soc_dapm_enable_pin(dapm, "Lineout_4 amp");
  4421. snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
  4422. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
  4423. snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
  4424. snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
  4425. snd_soc_dapm_ignore_suspend(dapm, "Secondary Mic");
  4426. snd_soc_dapm_ignore_suspend(dapm, "Lineout_1 amp");
  4427. snd_soc_dapm_ignore_suspend(dapm, "Lineout_2 amp");
  4428. snd_soc_dapm_ignore_suspend(dapm, "Lineout_3 amp");
  4429. snd_soc_dapm_ignore_suspend(dapm, "Lineout_4 amp");
  4430. snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
  4431. snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
  4432. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4433. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4434. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4435. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4436. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
  4437. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
  4438. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  4439. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic6");
  4440. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic7");
  4441. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic8");
  4442. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  4443. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
  4444. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
  4445. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  4446. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  4447. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  4448. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  4449. snd_soc_dapm_ignore_suspend(dapm, "AMIC5");
  4450. snd_soc_dapm_ignore_suspend(dapm, "DMIC0");
  4451. snd_soc_dapm_ignore_suspend(dapm, "DMIC1");
  4452. snd_soc_dapm_ignore_suspend(dapm, "DMIC2");
  4453. snd_soc_dapm_ignore_suspend(dapm, "DMIC3");
  4454. snd_soc_dapm_ignore_suspend(dapm, "DMIC4");
  4455. snd_soc_dapm_ignore_suspend(dapm, "DMIC5");
  4456. snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
  4457. snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
  4458. snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
  4459. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  4460. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  4461. snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
  4462. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
  4463. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT3");
  4464. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT4");
  4465. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
  4466. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
  4467. snd_soc_dapm_ignore_suspend(dapm, "ANC LINEOUT1");
  4468. snd_soc_dapm_ignore_suspend(dapm, "ANC LINEOUT2");
  4469. snd_soc_dapm_sync(dapm);
  4470. snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4471. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4472. msm_codec_fn.get_afe_config_fn = tasha_get_afe_config;
  4473. ret = msm_afe_set_config(component);
  4474. if (ret) {
  4475. pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
  4476. goto err;
  4477. }
  4478. pdata->is_afe_config_done = true;
  4479. config_data = msm_codec_fn.get_afe_config_fn(component,
  4480. AFE_AANC_VERSION);
  4481. if (config_data) {
  4482. ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
  4483. if (ret) {
  4484. pr_err("%s: Failed to set aanc version %d\n",
  4485. __func__, ret);
  4486. goto err;
  4487. }
  4488. }
  4489. /*
  4490. * Send speaker configuration only for WSA8810.
  4491. * Default configuration is for WSA8815.
  4492. */
  4493. pr_debug("%s: Number of aux devices: %d\n",
  4494. __func__, rtd->card->num_aux_devs);
  4495. if (rtd->card->num_aux_devs &&
  4496. !list_empty(&rtd->card->aux_comp_list)) {
  4497. aux_comp = list_first_entry(&rtd->card->aux_comp_list,
  4498. struct snd_soc_component, card_aux_list);
  4499. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4500. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4501. tasha_set_spkr_mode(component, SPKR_MODE_1);
  4502. tasha_set_spkr_gain_offset(component,
  4503. RX_GAIN_OFFSET_M1P5_DB);
  4504. }
  4505. }
  4506. card = rtd->card->snd_card;
  4507. if (!pdata->codec_root) {
  4508. entry = snd_info_create_subdir(card->module, "codecs",
  4509. card->proc_root);
  4510. if (!entry) {
  4511. pr_debug("%s: Cannot create codecs module entry\n",
  4512. __func__);
  4513. ret = 0;
  4514. goto err;
  4515. }
  4516. pdata->codec_root = entry;
  4517. }
  4518. tasha_codec_info_create_codec_entry(pdata->codec_root, component);
  4519. tasha_mbhc_zdet_gpio_ctrl(msm_config_hph_en0_gpio, component);
  4520. codec_reg_done = true;
  4521. return 0;
  4522. err:
  4523. return ret;
  4524. }
  4525. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  4526. {
  4527. int ret = 0;
  4528. struct snd_soc_component *component;
  4529. struct snd_soc_dapm_context *dapm;
  4530. struct snd_card *card;
  4531. struct snd_info_entry *entry;
  4532. struct snd_soc_component *aux_comp;
  4533. struct msm_asoc_mach_data *pdata =
  4534. snd_soc_card_get_drvdata(rtd->card);
  4535. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4536. component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
  4537. if (!component) {
  4538. pr_err("%s: component is NULL\n", __func__);
  4539. return -EINVAL;
  4540. }
  4541. dapm = snd_soc_component_get_dapm(component);
  4542. ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
  4543. ARRAY_SIZE(msm_int_snd_controls));
  4544. if (ret < 0) {
  4545. pr_err("%s: add_component_controls failed: %d\n",
  4546. __func__, ret);
  4547. return ret;
  4548. }
  4549. ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
  4550. ARRAY_SIZE(msm_common_snd_controls));
  4551. if (ret < 0) {
  4552. pr_err("%s: add common snd controls failed: %d\n",
  4553. __func__, ret);
  4554. return ret;
  4555. }
  4556. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  4557. ARRAY_SIZE(msm_int_dapm_widgets));
  4558. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4559. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4560. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4561. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4562. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  4563. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  4564. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  4565. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  4566. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  4567. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  4568. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  4569. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  4570. snd_soc_dapm_sync(dapm);
  4571. /*
  4572. * Send speaker configuration only for WSA8810.
  4573. * Default configuration is for WSA8815.
  4574. */
  4575. dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
  4576. __func__, rtd->card->num_aux_devs);
  4577. if (rtd->card->num_aux_devs &&
  4578. !list_empty(&rtd->card->aux_comp_list)) {
  4579. aux_comp = list_first_entry(&rtd->card->aux_comp_list,
  4580. struct snd_soc_component, card_aux_list);
  4581. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4582. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4583. wsa_macro_set_spkr_mode(component,
  4584. WSA_MACRO_SPKR_MODE_1);
  4585. wsa_macro_set_spkr_gain_offset(component,
  4586. WSA_MACRO_GAIN_OFFSET_M1P5_DB);
  4587. }
  4588. }
  4589. card = rtd->card->snd_card;
  4590. if (!pdata->codec_root) {
  4591. entry = snd_info_create_subdir(card->module, "codecs",
  4592. card->proc_root);
  4593. if (!entry) {
  4594. pr_debug("%s: Cannot create codecs module entry\n",
  4595. __func__);
  4596. ret = 0;
  4597. goto err;
  4598. }
  4599. pdata->codec_root = entry;
  4600. }
  4601. bolero_info_create_codec_entry(pdata->codec_root, codec);
  4602. /*
  4603. * SM6150 MSM 1.0 doesn't have hardware wake up interrupt line
  4604. * from AOSS to APSS. So, it uses SW workaround and listens to
  4605. * interrupt from AFE over IPC.
  4606. * Check for MSM version and MSM ID and register wake irq
  4607. * accordingly to provide compatibility to all chipsets.
  4608. */
  4609. if (socinfo_get_id() == SM6150_SOC_MSM_ID &&
  4610. socinfo_get_version() == SM6150_SOC_VERSION_1_0)
  4611. bolero_register_wake_irq(component, true);
  4612. else
  4613. bolero_register_wake_irq(component, false);
  4614. codec_reg_done = true;
  4615. return 0;
  4616. err:
  4617. return ret;
  4618. }
  4619. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  4620. {
  4621. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  4622. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
  4623. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4624. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4625. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4626. }
  4627. static void *def_wcd_mbhc_cal(void)
  4628. {
  4629. void *wcd_mbhc_cal;
  4630. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  4631. u16 *btn_high;
  4632. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  4633. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  4634. if (!wcd_mbhc_cal)
  4635. return NULL;
  4636. #define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
  4637. S(v_hs_max, 1600);
  4638. #undef S
  4639. #define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
  4640. S(num_btn, WCD_MBHC_DEF_BUTTONS);
  4641. #undef S
  4642. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  4643. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  4644. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  4645. btn_high[0] = 75;
  4646. btn_high[1] = 150;
  4647. btn_high[2] = 237;
  4648. btn_high[3] = 500;
  4649. btn_high[4] = 500;
  4650. btn_high[5] = 500;
  4651. btn_high[6] = 500;
  4652. btn_high[7] = 500;
  4653. return wcd_mbhc_cal;
  4654. }
  4655. static int msm_snd_hw_params(struct snd_pcm_substream *substream,
  4656. struct snd_pcm_hw_params *params)
  4657. {
  4658. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4659. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4660. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4661. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4662. int ret = 0;
  4663. u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4664. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4665. u32 user_set_tx_ch = 0;
  4666. u32 rx_ch_count;
  4667. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4668. ret = snd_soc_dai_get_channel_map(codec_dai,
  4669. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4670. if (ret < 0) {
  4671. pr_err("%s: failed to get codec chan map, err:%d\n",
  4672. __func__, ret);
  4673. goto err;
  4674. }
  4675. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
  4676. pr_debug("%s: rx_5_ch=%d\n", __func__,
  4677. slim_rx_cfg[5].channels);
  4678. rx_ch_count = slim_rx_cfg[5].channels;
  4679. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
  4680. pr_debug("%s: rx_2_ch=%d\n", __func__,
  4681. slim_rx_cfg[2].channels);
  4682. rx_ch_count = slim_rx_cfg[2].channels;
  4683. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
  4684. pr_debug("%s: rx_6_ch=%d\n", __func__,
  4685. slim_rx_cfg[6].channels);
  4686. rx_ch_count = slim_rx_cfg[6].channels;
  4687. } else {
  4688. pr_debug("%s: rx_0_ch=%d\n", __func__,
  4689. slim_rx_cfg[0].channels);
  4690. rx_ch_count = slim_rx_cfg[0].channels;
  4691. }
  4692. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4693. rx_ch_count, rx_ch);
  4694. if (ret < 0) {
  4695. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4696. __func__, ret);
  4697. goto err;
  4698. }
  4699. } else {
  4700. pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
  4701. codec_dai->name, codec_dai->id, user_set_tx_ch);
  4702. ret = snd_soc_dai_get_channel_map(codec_dai,
  4703. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4704. if (ret < 0) {
  4705. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4706. __func__, ret);
  4707. goto err;
  4708. }
  4709. /* For <codec>_tx1 case */
  4710. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
  4711. user_set_tx_ch = slim_tx_cfg[0].channels;
  4712. /* For <codec>_tx3 case */
  4713. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
  4714. user_set_tx_ch = slim_tx_cfg[1].channels;
  4715. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
  4716. user_set_tx_ch = msm_vi_feed_tx_ch;
  4717. else
  4718. user_set_tx_ch = tx_ch_cnt;
  4719. pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
  4720. __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
  4721. tx_ch_cnt, dai_link->id);
  4722. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4723. user_set_tx_ch, tx_ch, 0, 0);
  4724. if (ret < 0)
  4725. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4726. __func__, ret);
  4727. }
  4728. err:
  4729. return ret;
  4730. }
  4731. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  4732. struct snd_pcm_hw_params *params)
  4733. {
  4734. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4735. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4736. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4737. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4738. int ret = 0;
  4739. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  4740. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4741. u32 user_set_tx_ch = 0;
  4742. u32 user_set_rx_ch = 0;
  4743. u32 ch_id;
  4744. ret = snd_soc_dai_get_channel_map(codec_dai,
  4745. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  4746. &rx_ch_cdc_dma);
  4747. if (ret < 0) {
  4748. pr_err("%s: failed to get codec chan map, err:%d\n",
  4749. __func__, ret);
  4750. goto err;
  4751. }
  4752. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4753. switch (dai_link->id) {
  4754. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  4755. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  4756. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  4757. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  4758. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  4759. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  4760. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  4761. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  4762. {
  4763. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4764. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  4765. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  4766. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  4767. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4768. user_set_rx_ch, &rx_ch_cdc_dma);
  4769. if (ret < 0) {
  4770. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4771. __func__, ret);
  4772. goto err;
  4773. }
  4774. }
  4775. break;
  4776. }
  4777. } else {
  4778. switch (dai_link->id) {
  4779. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  4780. {
  4781. user_set_tx_ch = msm_vi_feed_tx_ch;
  4782. }
  4783. break;
  4784. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  4785. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  4786. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  4787. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  4788. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  4789. {
  4790. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4791. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  4792. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  4793. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  4794. }
  4795. break;
  4796. }
  4797. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  4798. &tx_ch_cdc_dma, 0, 0);
  4799. if (ret < 0) {
  4800. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4801. __func__, ret);
  4802. goto err;
  4803. }
  4804. }
  4805. err:
  4806. return ret;
  4807. }
  4808. static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
  4809. struct snd_pcm_hw_params *params)
  4810. {
  4811. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4812. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4813. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4814. unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4815. unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
  4816. unsigned int num_tx_ch = 0;
  4817. unsigned int num_rx_ch = 0;
  4818. int ret = 0;
  4819. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4820. num_rx_ch = params_channels(params);
  4821. pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
  4822. codec_dai->name, codec_dai->id, num_rx_ch);
  4823. ret = snd_soc_dai_get_channel_map(codec_dai,
  4824. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4825. if (ret < 0) {
  4826. pr_err("%s: failed to get codec chan map, err:%d\n",
  4827. __func__, ret);
  4828. goto err;
  4829. }
  4830. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4831. num_rx_ch, rx_ch);
  4832. if (ret < 0) {
  4833. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4834. __func__, ret);
  4835. goto err;
  4836. }
  4837. } else {
  4838. num_tx_ch = params_channels(params);
  4839. pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
  4840. codec_dai->name, codec_dai->id, num_tx_ch);
  4841. ret = snd_soc_dai_get_channel_map(codec_dai,
  4842. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4843. if (ret < 0) {
  4844. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4845. __func__, ret);
  4846. goto err;
  4847. }
  4848. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4849. num_tx_ch, tx_ch, 0, 0);
  4850. if (ret < 0) {
  4851. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4852. __func__, ret);
  4853. goto err;
  4854. }
  4855. }
  4856. err:
  4857. return ret;
  4858. }
  4859. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  4860. struct snd_pcm_hw_params *params)
  4861. {
  4862. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4863. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4864. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4865. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4866. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  4867. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4868. int ret;
  4869. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  4870. codec_dai->name, codec_dai->id);
  4871. ret = snd_soc_dai_get_channel_map(codec_dai,
  4872. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4873. if (ret) {
  4874. dev_err(rtd->dev,
  4875. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  4876. __func__, ret);
  4877. goto err;
  4878. }
  4879. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  4880. __func__, tx_ch_cnt, dai_link->id);
  4881. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4882. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  4883. if (ret)
  4884. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  4885. __func__, ret);
  4886. err:
  4887. return ret;
  4888. }
  4889. int msm_snd_cpe_hw_params(struct snd_pcm_substream *substream,
  4890. struct snd_pcm_hw_params *params)
  4891. {
  4892. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4893. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4894. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4895. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4896. int ret = 0;
  4897. u32 tx_ch[SLIM_MAX_TX_PORTS];
  4898. u32 tx_ch_cnt = 0;
  4899. if (substream->stream != SNDRV_PCM_STREAM_CAPTURE) {
  4900. pr_err("%s: Invalid stream type %d\n",
  4901. __func__, substream->stream);
  4902. ret = -EINVAL;
  4903. goto end;
  4904. }
  4905. pr_debug("%s: %s_tx_dai_id_%d\n", __func__,
  4906. codec_dai->name, codec_dai->id);
  4907. ret = snd_soc_dai_get_channel_map(codec_dai,
  4908. &tx_ch_cnt, tx_ch, NULL, NULL);
  4909. if (ret < 0) {
  4910. pr_err("%s: failed to get codec chan map\n, err:%d\n",
  4911. __func__, ret);
  4912. goto end;
  4913. }
  4914. pr_debug("%s: tx_ch_cnt(%d) id %d\n",
  4915. __func__, tx_ch_cnt, dai_link->id);
  4916. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4917. tx_ch_cnt, tx_ch, 0, 0);
  4918. if (ret < 0) {
  4919. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4920. __func__, ret);
  4921. goto end;
  4922. }
  4923. end:
  4924. return ret;
  4925. }
  4926. static int msm_get_port_id(int be_id)
  4927. {
  4928. int afe_port_id;
  4929. switch (be_id) {
  4930. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  4931. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  4932. break;
  4933. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  4934. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  4935. break;
  4936. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  4937. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  4938. break;
  4939. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  4940. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  4941. break;
  4942. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  4943. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  4944. break;
  4945. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4946. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  4947. break;
  4948. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4949. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
  4950. break;
  4951. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4952. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
  4953. break;
  4954. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4955. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
  4956. break;
  4957. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4958. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
  4959. break;
  4960. default:
  4961. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  4962. afe_port_id = -EINVAL;
  4963. }
  4964. return afe_port_id;
  4965. }
  4966. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  4967. {
  4968. u32 bit_per_sample;
  4969. switch (bit_format) {
  4970. case SNDRV_PCM_FORMAT_S32_LE:
  4971. case SNDRV_PCM_FORMAT_S24_3LE:
  4972. case SNDRV_PCM_FORMAT_S24_LE:
  4973. bit_per_sample = 32;
  4974. break;
  4975. case SNDRV_PCM_FORMAT_S16_LE:
  4976. default:
  4977. bit_per_sample = 16;
  4978. break;
  4979. }
  4980. return bit_per_sample;
  4981. }
  4982. static void update_mi2s_clk_val(int dai_id, int stream)
  4983. {
  4984. u32 bit_per_sample;
  4985. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4986. bit_per_sample =
  4987. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  4988. mi2s_clk[dai_id].clk_freq_in_hz =
  4989. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4990. } else {
  4991. bit_per_sample =
  4992. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  4993. mi2s_clk[dai_id].clk_freq_in_hz =
  4994. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4995. }
  4996. }
  4997. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  4998. {
  4999. int ret = 0;
  5000. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5001. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5002. int port_id = 0;
  5003. int index = cpu_dai->id;
  5004. port_id = msm_get_port_id(rtd->dai_link->id);
  5005. if (port_id < 0) {
  5006. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  5007. ret = port_id;
  5008. goto err;
  5009. }
  5010. if (enable) {
  5011. update_mi2s_clk_val(index, substream->stream);
  5012. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  5013. mi2s_clk[index].clk_freq_in_hz);
  5014. }
  5015. mi2s_clk[index].enable = enable;
  5016. ret = afe_set_lpass_clock_v2(port_id,
  5017. &mi2s_clk[index]);
  5018. if (ret < 0) {
  5019. dev_err(rtd->card->dev,
  5020. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  5021. __func__, port_id, ret);
  5022. goto err;
  5023. }
  5024. err:
  5025. return ret;
  5026. }
  5027. static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  5028. struct snd_pcm_hw_params *params)
  5029. {
  5030. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5031. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5032. int ret = 0;
  5033. int slot_width = 32;
  5034. int channels, slots;
  5035. unsigned int slot_mask, rate, clk_freq;
  5036. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  5037. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  5038. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5039. switch (cpu_dai->id) {
  5040. case AFE_PORT_ID_PRIMARY_TDM_RX:
  5041. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  5042. break;
  5043. case AFE_PORT_ID_SECONDARY_TDM_RX:
  5044. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  5045. break;
  5046. case AFE_PORT_ID_TERTIARY_TDM_RX:
  5047. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  5048. break;
  5049. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  5050. slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  5051. break;
  5052. case AFE_PORT_ID_QUINARY_TDM_RX:
  5053. slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  5054. break;
  5055. case AFE_PORT_ID_PRIMARY_TDM_TX:
  5056. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  5057. break;
  5058. case AFE_PORT_ID_SECONDARY_TDM_TX:
  5059. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  5060. break;
  5061. case AFE_PORT_ID_TERTIARY_TDM_TX:
  5062. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  5063. break;
  5064. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  5065. slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  5066. break;
  5067. case AFE_PORT_ID_QUINARY_TDM_TX:
  5068. slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  5069. break;
  5070. default:
  5071. pr_err("%s: dai id 0x%x not supported\n",
  5072. __func__, cpu_dai->id);
  5073. return -EINVAL;
  5074. }
  5075. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  5076. /*2 slot config - bits 0 and 1 set for the first two slots */
  5077. slot_mask = 0x0000FFFF >> (16-slots);
  5078. channels = slots;
  5079. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  5080. __func__, slot_width, slots);
  5081. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  5082. slots, slot_width);
  5083. if (ret < 0) {
  5084. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  5085. __func__, ret);
  5086. goto end;
  5087. }
  5088. ret = snd_soc_dai_set_channel_map(cpu_dai,
  5089. 0, NULL, channels, slot_offset);
  5090. if (ret < 0) {
  5091. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  5092. __func__, ret);
  5093. goto end;
  5094. }
  5095. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  5096. /*2 slot config - bits 0 and 1 set for the first two slots */
  5097. slot_mask = 0x0000FFFF >> (16-slots);
  5098. channels = slots;
  5099. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  5100. __func__, slot_width, slots);
  5101. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  5102. slots, slot_width);
  5103. if (ret < 0) {
  5104. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  5105. __func__, ret);
  5106. goto end;
  5107. }
  5108. ret = snd_soc_dai_set_channel_map(cpu_dai,
  5109. channels, slot_offset, 0, NULL);
  5110. if (ret < 0) {
  5111. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  5112. __func__, ret);
  5113. goto end;
  5114. }
  5115. } else {
  5116. ret = -EINVAL;
  5117. pr_err("%s: invalid use case, err:%d\n",
  5118. __func__, ret);
  5119. goto end;
  5120. }
  5121. rate = params_rate(params);
  5122. clk_freq = rate * slot_width * slots;
  5123. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  5124. if (ret < 0)
  5125. pr_err("%s: failed to set tdm clk, err:%d\n",
  5126. __func__, ret);
  5127. end:
  5128. return ret;
  5129. }
  5130. static int msm_get_tdm_mode(u32 port_id)
  5131. {
  5132. int tdm_mode;
  5133. switch (port_id) {
  5134. case AFE_PORT_ID_PRIMARY_TDM_RX:
  5135. case AFE_PORT_ID_PRIMARY_TDM_TX:
  5136. tdm_mode = TDM_PRI;
  5137. break;
  5138. case AFE_PORT_ID_SECONDARY_TDM_RX:
  5139. case AFE_PORT_ID_SECONDARY_TDM_TX:
  5140. tdm_mode = TDM_SEC;
  5141. break;
  5142. case AFE_PORT_ID_TERTIARY_TDM_RX:
  5143. case AFE_PORT_ID_TERTIARY_TDM_TX:
  5144. tdm_mode = TDM_TERT;
  5145. break;
  5146. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  5147. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  5148. tdm_mode = TDM_QUAT;
  5149. break;
  5150. case AFE_PORT_ID_QUINARY_TDM_RX:
  5151. case AFE_PORT_ID_QUINARY_TDM_TX:
  5152. tdm_mode = TDM_QUIN;
  5153. break;
  5154. default:
  5155. pr_err("%s: Invalid port id: %d\n", __func__, port_id);
  5156. tdm_mode = -EINVAL;
  5157. }
  5158. return tdm_mode;
  5159. }
  5160. static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
  5161. {
  5162. int ret = 0;
  5163. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5164. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5165. struct snd_soc_card *card = rtd->card;
  5166. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5167. int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
  5168. if (tdm_mode < 0) {
  5169. dev_err(rtd->card->dev, "%s: Invalid tdm_mode\n", __func__);
  5170. return tdm_mode;
  5171. }
  5172. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5173. if (pdata->mi2s_gpio_p[tdm_mode])
  5174. ret = msm_cdc_pinctrl_select_active_state(
  5175. pdata->mi2s_gpio_p[tdm_mode]);
  5176. return ret;
  5177. }
  5178. static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
  5179. {
  5180. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5181. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5182. struct snd_soc_card *card = rtd->card;
  5183. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5184. int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
  5185. if (tdm_mode < 0) {
  5186. dev_err(rtd->card->dev, "%s: Invalid tdm_mode\n", __func__);
  5187. return;
  5188. }
  5189. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5190. if (pdata->mi2s_gpio_p[tdm_mode])
  5191. msm_cdc_pinctrl_select_sleep_state(
  5192. pdata->mi2s_gpio_p[tdm_mode]);
  5193. }
  5194. static struct snd_soc_ops sm6150_tdm_be_ops = {
  5195. .hw_params = sm6150_tdm_snd_hw_params,
  5196. .startup = sm6150_tdm_snd_startup,
  5197. .shutdown = sm6150_tdm_snd_shutdown
  5198. };
  5199. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  5200. {
  5201. cpumask_t mask;
  5202. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  5203. pm_qos_remove_request(&substream->latency_pm_qos_req);
  5204. cpumask_clear(&mask);
  5205. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  5206. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  5207. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  5208. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  5209. pm_qos_add_request(&substream->latency_pm_qos_req,
  5210. PM_QOS_CPU_DMA_LATENCY,
  5211. MSM_LL_QOS_VALUE);
  5212. return 0;
  5213. }
  5214. static struct snd_soc_ops msm_fe_qos_ops = {
  5215. .prepare = msm_fe_qos_prepare,
  5216. };
  5217. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  5218. {
  5219. int ret = 0;
  5220. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5221. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5222. int index = cpu_dai->id;
  5223. int port_id = msm_get_port_id(rtd->dai_link->id);
  5224. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  5225. struct snd_soc_card *card = rtd->card;
  5226. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5227. dev_dbg(rtd->card->dev,
  5228. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  5229. __func__, substream->name, substream->stream,
  5230. cpu_dai->name, cpu_dai->id);
  5231. if (port_id < 0) {
  5232. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  5233. ret = port_id;
  5234. goto err;
  5235. }
  5236. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5237. ret = -EINVAL;
  5238. dev_err(rtd->card->dev,
  5239. "%s: CPU DAI id (%d) out of range\n",
  5240. __func__, cpu_dai->id);
  5241. goto err;
  5242. }
  5243. /*
  5244. * Mutex protection in case the same MI2S
  5245. * interface using for both TX and RX so
  5246. * that the same clock won't be enable twice.
  5247. */
  5248. mutex_lock(&mi2s_intf_conf[index].lock);
  5249. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  5250. /* Check if msm needs to provide the clock to the interface */
  5251. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  5252. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  5253. fmt = SND_SOC_DAIFMT_CBM_CFM;
  5254. }
  5255. ret = msm_mi2s_set_sclk(substream, true);
  5256. if (ret < 0) {
  5257. dev_err(rtd->card->dev,
  5258. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  5259. __func__, ret);
  5260. goto clean_up;
  5261. }
  5262. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  5263. if (ret < 0) {
  5264. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  5265. __func__, index, ret);
  5266. goto clk_off;
  5267. }
  5268. if (mi2s_intf_conf[index].msm_is_ext_mclk) {
  5269. pr_debug("%s: Enabling mclk, clk_freq_in_hz = %u\n",
  5270. __func__, mi2s_mclk[index].clk_freq_in_hz);
  5271. ret = afe_set_lpass_clock_v2(port_id,
  5272. &mi2s_mclk[index]);
  5273. if (ret < 0) {
  5274. pr_err("%s: afe lpass mclk failed, err:%d\n",
  5275. __func__, ret);
  5276. goto clk_off;
  5277. }
  5278. mi2s_mclk[index].enable = 1;
  5279. }
  5280. if (pdata->mi2s_gpio_p[index])
  5281. msm_cdc_pinctrl_select_active_state(
  5282. pdata->mi2s_gpio_p[index]);
  5283. }
  5284. clk_off:
  5285. if (ret < 0)
  5286. msm_mi2s_set_sclk(substream, false);
  5287. clean_up:
  5288. if (ret < 0)
  5289. mi2s_intf_conf[index].ref_cnt--;
  5290. mutex_unlock(&mi2s_intf_conf[index].lock);
  5291. err:
  5292. return ret;
  5293. }
  5294. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  5295. {
  5296. int ret;
  5297. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5298. int index = rtd->cpu_dai->id;
  5299. int port_id = msm_get_port_id(rtd->dai_link->id);
  5300. struct snd_soc_card *card = rtd->card;
  5301. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5302. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  5303. substream->name, substream->stream);
  5304. if (port_id < 0) {
  5305. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  5306. return;
  5307. }
  5308. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5309. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  5310. return;
  5311. }
  5312. mutex_lock(&mi2s_intf_conf[index].lock);
  5313. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  5314. if (pdata->mi2s_gpio_p[index])
  5315. msm_cdc_pinctrl_select_sleep_state(
  5316. pdata->mi2s_gpio_p[index]);
  5317. ret = msm_mi2s_set_sclk(substream, false);
  5318. if (ret < 0)
  5319. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  5320. __func__, index, ret);
  5321. if (mi2s_intf_conf[index].msm_is_ext_mclk) {
  5322. pr_debug("%s: Disabling mclk, clk_freq_in_hz = %u\n",
  5323. __func__, mi2s_mclk[index].clk_freq_in_hz);
  5324. ret = afe_set_lpass_clock_v2(port_id,
  5325. &mi2s_mclk[index]);
  5326. if (ret < 0)
  5327. pr_err("%s: mclk disable failed for MCLK (%d); ret=%d\n",
  5328. __func__, index, ret);
  5329. mi2s_mclk[index].enable = 0;
  5330. }
  5331. }
  5332. mutex_unlock(&mi2s_intf_conf[index].lock);
  5333. }
  5334. static struct snd_soc_ops msm_mi2s_be_ops = {
  5335. .startup = msm_mi2s_snd_startup,
  5336. .shutdown = msm_mi2s_snd_shutdown,
  5337. };
  5338. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  5339. .hw_params = msm_snd_cdc_dma_hw_params,
  5340. };
  5341. static struct snd_soc_ops msm_be_ops = {
  5342. .hw_params = msm_snd_hw_params,
  5343. };
  5344. static struct snd_soc_ops msm_slimbus_2_be_ops = {
  5345. .hw_params = msm_slimbus_2_hw_params,
  5346. };
  5347. static struct snd_soc_ops msm_wcn_ops = {
  5348. .hw_params = msm_wcn_hw_params,
  5349. };
  5350. static struct snd_soc_ops msm_ext_cpe_ops = {
  5351. .hw_params = msm_snd_cpe_hw_params,
  5352. };
  5353. /* Digital audio interface glue - connects codec <---> CPU */
  5354. static struct snd_soc_dai_link msm_common_dai_links[] = {
  5355. /* FrontEnd DAI Links */
  5356. {/* hw:x,0 */
  5357. .name = MSM_DAILINK_NAME(Media1),
  5358. .stream_name = "MultiMedia1",
  5359. .cpu_dai_name = "MultiMedia1",
  5360. .platform_name = "msm-pcm-dsp.0",
  5361. .dynamic = 1,
  5362. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5363. .dpcm_playback = 1,
  5364. .dpcm_capture = 1,
  5365. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5366. SND_SOC_DPCM_TRIGGER_POST},
  5367. .codec_dai_name = "snd-soc-dummy-dai",
  5368. .codec_name = "snd-soc-dummy",
  5369. .ignore_suspend = 1,
  5370. /* this dainlink has playback support */
  5371. .ignore_pmdown_time = 1,
  5372. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  5373. },
  5374. {/* hw:x,1 */
  5375. .name = MSM_DAILINK_NAME(Media2),
  5376. .stream_name = "MultiMedia2",
  5377. .cpu_dai_name = "MultiMedia2",
  5378. .platform_name = "msm-pcm-dsp.0",
  5379. .dynamic = 1,
  5380. .dpcm_playback = 1,
  5381. .dpcm_capture = 1,
  5382. .codec_dai_name = "snd-soc-dummy-dai",
  5383. .codec_name = "snd-soc-dummy",
  5384. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5385. SND_SOC_DPCM_TRIGGER_POST},
  5386. .ignore_suspend = 1,
  5387. /* this dainlink has playback support */
  5388. .ignore_pmdown_time = 1,
  5389. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  5390. },
  5391. {/* hw:x,2 */
  5392. .name = "VoiceMMode1",
  5393. .stream_name = "VoiceMMode1",
  5394. .cpu_dai_name = "VoiceMMode1",
  5395. .platform_name = "msm-pcm-voice",
  5396. .dynamic = 1,
  5397. .dpcm_playback = 1,
  5398. .dpcm_capture = 1,
  5399. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5400. SND_SOC_DPCM_TRIGGER_POST},
  5401. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5402. .ignore_suspend = 1,
  5403. .ignore_pmdown_time = 1,
  5404. .codec_dai_name = "snd-soc-dummy-dai",
  5405. .codec_name = "snd-soc-dummy",
  5406. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  5407. },
  5408. {/* hw:x,3 */
  5409. .name = "MSM VoIP",
  5410. .stream_name = "VoIP",
  5411. .cpu_dai_name = "VoIP",
  5412. .platform_name = "msm-voip-dsp",
  5413. .dynamic = 1,
  5414. .dpcm_playback = 1,
  5415. .dpcm_capture = 1,
  5416. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5417. SND_SOC_DPCM_TRIGGER_POST},
  5418. .codec_dai_name = "snd-soc-dummy-dai",
  5419. .codec_name = "snd-soc-dummy",
  5420. .ignore_suspend = 1,
  5421. /* this dainlink has playback support */
  5422. .ignore_pmdown_time = 1,
  5423. .id = MSM_FRONTEND_DAI_VOIP,
  5424. },
  5425. {/* hw:x,4 */
  5426. .name = MSM_DAILINK_NAME(ULL),
  5427. .stream_name = "MultiMedia3",
  5428. .cpu_dai_name = "MultiMedia3",
  5429. .platform_name = "msm-pcm-dsp.2",
  5430. .dynamic = 1,
  5431. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5432. .dpcm_playback = 1,
  5433. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5434. SND_SOC_DPCM_TRIGGER_POST},
  5435. .codec_dai_name = "snd-soc-dummy-dai",
  5436. .codec_name = "snd-soc-dummy",
  5437. .ignore_suspend = 1,
  5438. /* this dainlink has playback support */
  5439. .ignore_pmdown_time = 1,
  5440. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  5441. },
  5442. /* Hostless PCM purpose */
  5443. {/* hw:x,5 */
  5444. .name = "SLIMBUS_0 Hostless",
  5445. .stream_name = "SLIMBUS_0 Hostless",
  5446. .cpu_dai_name = "SLIMBUS0_HOSTLESS",
  5447. .platform_name = "msm-pcm-hostless",
  5448. .dynamic = 1,
  5449. .dpcm_playback = 1,
  5450. .dpcm_capture = 1,
  5451. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5452. SND_SOC_DPCM_TRIGGER_POST},
  5453. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5454. .ignore_suspend = 1,
  5455. /* this dailink has playback support */
  5456. .ignore_pmdown_time = 1,
  5457. .codec_dai_name = "snd-soc-dummy-dai",
  5458. .codec_name = "snd-soc-dummy",
  5459. },
  5460. {/* hw:x,6 */
  5461. .name = "MSM AFE-PCM RX",
  5462. .stream_name = "AFE-PROXY RX",
  5463. .cpu_dai_name = "msm-dai-q6-dev.241",
  5464. .codec_name = "msm-stub-codec.1",
  5465. .codec_dai_name = "msm-stub-rx",
  5466. .platform_name = "msm-pcm-afe",
  5467. .dpcm_playback = 1,
  5468. .ignore_suspend = 1,
  5469. /* this dainlink has playback support */
  5470. .ignore_pmdown_time = 1,
  5471. },
  5472. {/* hw:x,7 */
  5473. .name = "MSM AFE-PCM TX",
  5474. .stream_name = "AFE-PROXY TX",
  5475. .cpu_dai_name = "msm-dai-q6-dev.240",
  5476. .codec_name = "msm-stub-codec.1",
  5477. .codec_dai_name = "msm-stub-tx",
  5478. .platform_name = "msm-pcm-afe",
  5479. .dpcm_capture = 1,
  5480. .ignore_suspend = 1,
  5481. },
  5482. {/* hw:x,8 */
  5483. .name = MSM_DAILINK_NAME(Compress1),
  5484. .stream_name = "Compress1",
  5485. .cpu_dai_name = "MultiMedia4",
  5486. .platform_name = "msm-compress-dsp",
  5487. .dynamic = 1,
  5488. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  5489. .dpcm_playback = 1,
  5490. .dpcm_capture = 1,
  5491. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5492. SND_SOC_DPCM_TRIGGER_POST},
  5493. .codec_dai_name = "snd-soc-dummy-dai",
  5494. .codec_name = "snd-soc-dummy",
  5495. .ignore_suspend = 1,
  5496. .ignore_pmdown_time = 1,
  5497. /* this dainlink has playback support */
  5498. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  5499. },
  5500. {/* hw:x,9 */
  5501. .name = "AUXPCM Hostless",
  5502. .stream_name = "AUXPCM Hostless",
  5503. .cpu_dai_name = "AUXPCM_HOSTLESS",
  5504. .platform_name = "msm-pcm-hostless",
  5505. .dynamic = 1,
  5506. .dpcm_playback = 1,
  5507. .dpcm_capture = 1,
  5508. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5509. SND_SOC_DPCM_TRIGGER_POST},
  5510. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5511. .ignore_suspend = 1,
  5512. /* this dainlink has playback support */
  5513. .ignore_pmdown_time = 1,
  5514. .codec_dai_name = "snd-soc-dummy-dai",
  5515. .codec_name = "snd-soc-dummy",
  5516. },
  5517. {/* hw:x,10 */
  5518. .name = "SLIMBUS_1 Hostless",
  5519. .stream_name = "SLIMBUS_1 Hostless",
  5520. .cpu_dai_name = "SLIMBUS1_HOSTLESS",
  5521. .platform_name = "msm-pcm-hostless",
  5522. .dynamic = 1,
  5523. .dpcm_playback = 1,
  5524. .dpcm_capture = 1,
  5525. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5526. SND_SOC_DPCM_TRIGGER_POST},
  5527. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5528. .ignore_suspend = 1,
  5529. /* this dailink has playback support */
  5530. .ignore_pmdown_time = 1,
  5531. .codec_dai_name = "snd-soc-dummy-dai",
  5532. .codec_name = "snd-soc-dummy",
  5533. },
  5534. {/* hw:x,11 */
  5535. .name = "SLIMBUS_3 Hostless",
  5536. .stream_name = "SLIMBUS_3 Hostless",
  5537. .cpu_dai_name = "SLIMBUS3_HOSTLESS",
  5538. .platform_name = "msm-pcm-hostless",
  5539. .dynamic = 1,
  5540. .dpcm_playback = 1,
  5541. .dpcm_capture = 1,
  5542. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5543. SND_SOC_DPCM_TRIGGER_POST},
  5544. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5545. .ignore_suspend = 1,
  5546. /* this dailink has playback support */
  5547. .ignore_pmdown_time = 1,
  5548. .codec_dai_name = "snd-soc-dummy-dai",
  5549. .codec_name = "snd-soc-dummy",
  5550. },
  5551. {/* hw:x,12 */
  5552. .name = "SLIMBUS_7 Hostless",
  5553. .stream_name = "SLIMBUS_7 Hostless",
  5554. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  5555. .platform_name = "msm-pcm-hostless",
  5556. .dynamic = 1,
  5557. .dpcm_playback = 1,
  5558. .dpcm_capture = 1,
  5559. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5560. SND_SOC_DPCM_TRIGGER_POST},
  5561. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5562. .ignore_suspend = 1,
  5563. /* this dailink has playback support */
  5564. .ignore_pmdown_time = 1,
  5565. .codec_dai_name = "snd-soc-dummy-dai",
  5566. .codec_name = "snd-soc-dummy",
  5567. },
  5568. {/* hw:x,13 */
  5569. .name = MSM_DAILINK_NAME(LowLatency),
  5570. .stream_name = "MultiMedia5",
  5571. .cpu_dai_name = "MultiMedia5",
  5572. .platform_name = "msm-pcm-dsp.1",
  5573. .dynamic = 1,
  5574. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5575. .dpcm_playback = 1,
  5576. .dpcm_capture = 1,
  5577. .codec_dai_name = "snd-soc-dummy-dai",
  5578. .codec_name = "snd-soc-dummy",
  5579. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5580. SND_SOC_DPCM_TRIGGER_POST},
  5581. .ignore_suspend = 1,
  5582. /* this dainlink has playback support */
  5583. .ignore_pmdown_time = 1,
  5584. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  5585. .ops = &msm_fe_qos_ops,
  5586. },
  5587. {/* hw:x,14 */
  5588. .name = "Listen 1 Audio Service",
  5589. .stream_name = "Listen 1 Audio Service",
  5590. .cpu_dai_name = "LSM1",
  5591. .platform_name = "msm-lsm-client",
  5592. .dynamic = 1,
  5593. .dpcm_capture = 1,
  5594. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5595. SND_SOC_DPCM_TRIGGER_POST },
  5596. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5597. .ignore_suspend = 1,
  5598. .codec_dai_name = "snd-soc-dummy-dai",
  5599. .codec_name = "snd-soc-dummy",
  5600. .id = MSM_FRONTEND_DAI_LSM1,
  5601. },
  5602. /* Multiple Tunnel instances */
  5603. {/* hw:x,15 */
  5604. .name = MSM_DAILINK_NAME(Compress2),
  5605. .stream_name = "Compress2",
  5606. .cpu_dai_name = "MultiMedia7",
  5607. .platform_name = "msm-compress-dsp",
  5608. .dynamic = 1,
  5609. .dpcm_playback = 1,
  5610. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5611. SND_SOC_DPCM_TRIGGER_POST},
  5612. .codec_dai_name = "snd-soc-dummy-dai",
  5613. .codec_name = "snd-soc-dummy",
  5614. .ignore_suspend = 1,
  5615. .ignore_pmdown_time = 1,
  5616. /* this dainlink has playback support */
  5617. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  5618. },
  5619. {/* hw:x,16 */
  5620. .name = MSM_DAILINK_NAME(MultiMedia10),
  5621. .stream_name = "MultiMedia10",
  5622. .cpu_dai_name = "MultiMedia10",
  5623. .platform_name = "msm-pcm-dsp.1",
  5624. .dynamic = 1,
  5625. .dpcm_playback = 1,
  5626. .dpcm_capture = 1,
  5627. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5628. SND_SOC_DPCM_TRIGGER_POST},
  5629. .codec_dai_name = "snd-soc-dummy-dai",
  5630. .codec_name = "snd-soc-dummy",
  5631. .ignore_suspend = 1,
  5632. .ignore_pmdown_time = 1,
  5633. /* this dainlink has playback support */
  5634. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  5635. },
  5636. {/* hw:x,17 */
  5637. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  5638. .stream_name = "MM_NOIRQ",
  5639. .cpu_dai_name = "MultiMedia8",
  5640. .platform_name = "msm-pcm-dsp-noirq",
  5641. .dynamic = 1,
  5642. .dpcm_playback = 1,
  5643. .dpcm_capture = 1,
  5644. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5645. SND_SOC_DPCM_TRIGGER_POST},
  5646. .codec_dai_name = "snd-soc-dummy-dai",
  5647. .codec_name = "snd-soc-dummy",
  5648. .ignore_suspend = 1,
  5649. .ignore_pmdown_time = 1,
  5650. /* this dainlink has playback support */
  5651. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  5652. .ops = &msm_fe_qos_ops,
  5653. },
  5654. /* HDMI Hostless */
  5655. {/* hw:x,18 */
  5656. .name = "HDMI_RX_HOSTLESS",
  5657. .stream_name = "HDMI_RX_HOSTLESS",
  5658. .cpu_dai_name = "HDMI_HOSTLESS",
  5659. .platform_name = "msm-pcm-hostless",
  5660. .dynamic = 1,
  5661. .dpcm_playback = 1,
  5662. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5663. SND_SOC_DPCM_TRIGGER_POST},
  5664. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5665. .ignore_suspend = 1,
  5666. .ignore_pmdown_time = 1,
  5667. .codec_dai_name = "snd-soc-dummy-dai",
  5668. .codec_name = "snd-soc-dummy",
  5669. },
  5670. {/* hw:x,19 */
  5671. .name = "VoiceMMode2",
  5672. .stream_name = "VoiceMMode2",
  5673. .cpu_dai_name = "VoiceMMode2",
  5674. .platform_name = "msm-pcm-voice",
  5675. .dynamic = 1,
  5676. .dpcm_playback = 1,
  5677. .dpcm_capture = 1,
  5678. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5679. SND_SOC_DPCM_TRIGGER_POST},
  5680. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5681. .ignore_suspend = 1,
  5682. .ignore_pmdown_time = 1,
  5683. .codec_dai_name = "snd-soc-dummy-dai",
  5684. .codec_name = "snd-soc-dummy",
  5685. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  5686. },
  5687. /* LSM FE */
  5688. {/* hw:x,20 */
  5689. .name = "Listen 2 Audio Service",
  5690. .stream_name = "Listen 2 Audio Service",
  5691. .cpu_dai_name = "LSM2",
  5692. .platform_name = "msm-lsm-client",
  5693. .dynamic = 1,
  5694. .dpcm_capture = 1,
  5695. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5696. SND_SOC_DPCM_TRIGGER_POST },
  5697. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5698. .ignore_suspend = 1,
  5699. .codec_dai_name = "snd-soc-dummy-dai",
  5700. .codec_name = "snd-soc-dummy",
  5701. .id = MSM_FRONTEND_DAI_LSM2,
  5702. },
  5703. {/* hw:x,21 */
  5704. .name = "Listen 3 Audio Service",
  5705. .stream_name = "Listen 3 Audio Service",
  5706. .cpu_dai_name = "LSM3",
  5707. .platform_name = "msm-lsm-client",
  5708. .dynamic = 1,
  5709. .dpcm_capture = 1,
  5710. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5711. SND_SOC_DPCM_TRIGGER_POST },
  5712. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5713. .ignore_suspend = 1,
  5714. .codec_dai_name = "snd-soc-dummy-dai",
  5715. .codec_name = "snd-soc-dummy",
  5716. .id = MSM_FRONTEND_DAI_LSM3,
  5717. },
  5718. {/* hw:x,22 */
  5719. .name = "Listen 4 Audio Service",
  5720. .stream_name = "Listen 4 Audio Service",
  5721. .cpu_dai_name = "LSM4",
  5722. .platform_name = "msm-lsm-client",
  5723. .dynamic = 1,
  5724. .dpcm_capture = 1,
  5725. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5726. SND_SOC_DPCM_TRIGGER_POST },
  5727. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5728. .ignore_suspend = 1,
  5729. .codec_dai_name = "snd-soc-dummy-dai",
  5730. .codec_name = "snd-soc-dummy",
  5731. .id = MSM_FRONTEND_DAI_LSM4,
  5732. },
  5733. {/* hw:x,23 */
  5734. .name = "Listen 5 Audio Service",
  5735. .stream_name = "Listen 5 Audio Service",
  5736. .cpu_dai_name = "LSM5",
  5737. .platform_name = "msm-lsm-client",
  5738. .dynamic = 1,
  5739. .dpcm_capture = 1,
  5740. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5741. SND_SOC_DPCM_TRIGGER_POST },
  5742. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5743. .ignore_suspend = 1,
  5744. .codec_dai_name = "snd-soc-dummy-dai",
  5745. .codec_name = "snd-soc-dummy",
  5746. .id = MSM_FRONTEND_DAI_LSM5,
  5747. },
  5748. {/* hw:x,24 */
  5749. .name = "Listen 6 Audio Service",
  5750. .stream_name = "Listen 6 Audio Service",
  5751. .cpu_dai_name = "LSM6",
  5752. .platform_name = "msm-lsm-client",
  5753. .dynamic = 1,
  5754. .dpcm_capture = 1,
  5755. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5756. SND_SOC_DPCM_TRIGGER_POST },
  5757. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5758. .ignore_suspend = 1,
  5759. .codec_dai_name = "snd-soc-dummy-dai",
  5760. .codec_name = "snd-soc-dummy",
  5761. .id = MSM_FRONTEND_DAI_LSM6,
  5762. },
  5763. {/* hw:x,25 */
  5764. .name = "Listen 7 Audio Service",
  5765. .stream_name = "Listen 7 Audio Service",
  5766. .cpu_dai_name = "LSM7",
  5767. .platform_name = "msm-lsm-client",
  5768. .dynamic = 1,
  5769. .dpcm_capture = 1,
  5770. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5771. SND_SOC_DPCM_TRIGGER_POST },
  5772. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5773. .ignore_suspend = 1,
  5774. .codec_dai_name = "snd-soc-dummy-dai",
  5775. .codec_name = "snd-soc-dummy",
  5776. .id = MSM_FRONTEND_DAI_LSM7,
  5777. },
  5778. {/* hw:x,26 */
  5779. .name = "Listen 8 Audio Service",
  5780. .stream_name = "Listen 8 Audio Service",
  5781. .cpu_dai_name = "LSM8",
  5782. .platform_name = "msm-lsm-client",
  5783. .dynamic = 1,
  5784. .dpcm_capture = 1,
  5785. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5786. SND_SOC_DPCM_TRIGGER_POST },
  5787. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5788. .ignore_suspend = 1,
  5789. .codec_dai_name = "snd-soc-dummy-dai",
  5790. .codec_name = "snd-soc-dummy",
  5791. .id = MSM_FRONTEND_DAI_LSM8,
  5792. },
  5793. {/* hw:x,27 */
  5794. .name = MSM_DAILINK_NAME(Media9),
  5795. .stream_name = "MultiMedia9",
  5796. .cpu_dai_name = "MultiMedia9",
  5797. .platform_name = "msm-pcm-dsp.0",
  5798. .dynamic = 1,
  5799. .dpcm_playback = 1,
  5800. .dpcm_capture = 1,
  5801. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5802. SND_SOC_DPCM_TRIGGER_POST},
  5803. .codec_dai_name = "snd-soc-dummy-dai",
  5804. .codec_name = "snd-soc-dummy",
  5805. .ignore_suspend = 1,
  5806. /* this dainlink has playback support */
  5807. .ignore_pmdown_time = 1,
  5808. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  5809. },
  5810. {/* hw:x,28 */
  5811. .name = MSM_DAILINK_NAME(Compress4),
  5812. .stream_name = "Compress4",
  5813. .cpu_dai_name = "MultiMedia11",
  5814. .platform_name = "msm-compress-dsp",
  5815. .dynamic = 1,
  5816. .dpcm_playback = 1,
  5817. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5818. SND_SOC_DPCM_TRIGGER_POST},
  5819. .codec_dai_name = "snd-soc-dummy-dai",
  5820. .codec_name = "snd-soc-dummy",
  5821. .ignore_suspend = 1,
  5822. .ignore_pmdown_time = 1,
  5823. /* this dainlink has playback support */
  5824. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  5825. },
  5826. {/* hw:x,29 */
  5827. .name = MSM_DAILINK_NAME(Compress5),
  5828. .stream_name = "Compress5",
  5829. .cpu_dai_name = "MultiMedia12",
  5830. .platform_name = "msm-compress-dsp",
  5831. .dynamic = 1,
  5832. .dpcm_playback = 1,
  5833. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5834. SND_SOC_DPCM_TRIGGER_POST},
  5835. .codec_dai_name = "snd-soc-dummy-dai",
  5836. .codec_name = "snd-soc-dummy",
  5837. .ignore_suspend = 1,
  5838. .ignore_pmdown_time = 1,
  5839. /* this dainlink has playback support */
  5840. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  5841. },
  5842. {/* hw:x,30 */
  5843. .name = MSM_DAILINK_NAME(Compress6),
  5844. .stream_name = "Compress6",
  5845. .cpu_dai_name = "MultiMedia13",
  5846. .platform_name = "msm-compress-dsp",
  5847. .dynamic = 1,
  5848. .dpcm_playback = 1,
  5849. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5850. SND_SOC_DPCM_TRIGGER_POST},
  5851. .codec_dai_name = "snd-soc-dummy-dai",
  5852. .codec_name = "snd-soc-dummy",
  5853. .ignore_suspend = 1,
  5854. .ignore_pmdown_time = 1,
  5855. /* this dainlink has playback support */
  5856. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  5857. },
  5858. {/* hw:x,31 */
  5859. .name = MSM_DAILINK_NAME(Compress7),
  5860. .stream_name = "Compress7",
  5861. .cpu_dai_name = "MultiMedia14",
  5862. .platform_name = "msm-compress-dsp",
  5863. .dynamic = 1,
  5864. .dpcm_playback = 1,
  5865. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5866. SND_SOC_DPCM_TRIGGER_POST},
  5867. .codec_dai_name = "snd-soc-dummy-dai",
  5868. .codec_name = "snd-soc-dummy",
  5869. .ignore_suspend = 1,
  5870. .ignore_pmdown_time = 1,
  5871. /* this dainlink has playback support */
  5872. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  5873. },
  5874. {/* hw:x,32 */
  5875. .name = MSM_DAILINK_NAME(Compress8),
  5876. .stream_name = "Compress8",
  5877. .cpu_dai_name = "MultiMedia15",
  5878. .platform_name = "msm-compress-dsp",
  5879. .dynamic = 1,
  5880. .dpcm_playback = 1,
  5881. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5882. SND_SOC_DPCM_TRIGGER_POST},
  5883. .codec_dai_name = "snd-soc-dummy-dai",
  5884. .codec_name = "snd-soc-dummy",
  5885. .ignore_suspend = 1,
  5886. .ignore_pmdown_time = 1,
  5887. /* this dainlink has playback support */
  5888. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  5889. },
  5890. {/* hw:x,33 */
  5891. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  5892. .stream_name = "MM_NOIRQ_2",
  5893. .cpu_dai_name = "MultiMedia16",
  5894. .platform_name = "msm-pcm-dsp-noirq",
  5895. .dynamic = 1,
  5896. .dpcm_playback = 1,
  5897. .dpcm_capture = 1,
  5898. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5899. SND_SOC_DPCM_TRIGGER_POST},
  5900. .codec_dai_name = "snd-soc-dummy-dai",
  5901. .codec_name = "snd-soc-dummy",
  5902. .ignore_suspend = 1,
  5903. .ignore_pmdown_time = 1,
  5904. /* this dainlink has playback support */
  5905. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  5906. },
  5907. {/* hw:x,34 */
  5908. .name = "SLIMBUS_8 Hostless",
  5909. .stream_name = "SLIMBUS8_HOSTLESS Capture",
  5910. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  5911. .platform_name = "msm-pcm-hostless",
  5912. .dynamic = 1,
  5913. .dpcm_capture = 1,
  5914. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5915. SND_SOC_DPCM_TRIGGER_POST},
  5916. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5917. .ignore_suspend = 1,
  5918. .codec_dai_name = "snd-soc-dummy-dai",
  5919. .codec_name = "snd-soc-dummy",
  5920. },
  5921. {/* hw:x,35 */
  5922. .name = "CDC_DMA Hostless",
  5923. .stream_name = "CDC_DMA Hostless",
  5924. .cpu_dai_name = "CDC_DMA_HOSTLESS",
  5925. .platform_name = "msm-pcm-hostless",
  5926. .dynamic = 1,
  5927. .dpcm_playback = 1,
  5928. .dpcm_capture = 1,
  5929. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5930. SND_SOC_DPCM_TRIGGER_POST},
  5931. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5932. .ignore_suspend = 1,
  5933. /* this dailink has playback support */
  5934. .ignore_pmdown_time = 1,
  5935. .codec_dai_name = "snd-soc-dummy-dai",
  5936. .codec_name = "snd-soc-dummy",
  5937. },
  5938. {/* hw:x,36 */
  5939. .name = "TX3_CDC_DMA Hostless",
  5940. .stream_name = "TX3_CDC_DMA Hostless",
  5941. .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
  5942. .platform_name = "msm-pcm-hostless",
  5943. .dynamic = 1,
  5944. .dpcm_capture = 1,
  5945. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5946. SND_SOC_DPCM_TRIGGER_POST},
  5947. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5948. .ignore_suspend = 1,
  5949. .codec_dai_name = "snd-soc-dummy-dai",
  5950. .codec_name = "snd-soc-dummy",
  5951. },
  5952. };
  5953. static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
  5954. {/* hw:x,37 */
  5955. .name = LPASS_BE_SLIMBUS_4_TX,
  5956. .stream_name = "Slimbus4 Capture",
  5957. .cpu_dai_name = "msm-dai-q6-dev.16393",
  5958. .platform_name = "msm-pcm-hostless",
  5959. .codec_name = "tavil_codec",
  5960. .codec_dai_name = "tavil_vifeedback",
  5961. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  5962. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5963. .ops = &msm_be_ops,
  5964. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5965. .ignore_suspend = 1,
  5966. },
  5967. /* Ultrasound RX DAI Link */
  5968. {/* hw:x,38 */
  5969. .name = "SLIMBUS_2 Hostless Playback",
  5970. .stream_name = "SLIMBUS_2 Hostless Playback",
  5971. .cpu_dai_name = "msm-dai-q6-dev.16388",
  5972. .platform_name = "msm-pcm-hostless",
  5973. .codec_name = "tavil_codec",
  5974. .codec_dai_name = "tavil_rx2",
  5975. .ignore_suspend = 1,
  5976. .ignore_pmdown_time = 1,
  5977. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5978. .ops = &msm_slimbus_2_be_ops,
  5979. },
  5980. /* Ultrasound TX DAI Link */
  5981. {/* hw:x,39 */
  5982. .name = "SLIMBUS_2 Hostless Capture",
  5983. .stream_name = "SLIMBUS_2 Hostless Capture",
  5984. .cpu_dai_name = "msm-dai-q6-dev.16389",
  5985. .platform_name = "msm-pcm-hostless",
  5986. .codec_name = "tavil_codec",
  5987. .codec_dai_name = "tavil_tx2",
  5988. .ignore_suspend = 1,
  5989. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5990. .ops = &msm_slimbus_2_be_ops,
  5991. },
  5992. };
  5993. static struct snd_soc_dai_link msm_int_compress_capture_dai[] = {
  5994. {
  5995. .name = "Compress9",
  5996. .stream_name = "Compress9",
  5997. .cpu_dai_name = "MultiMedia17",
  5998. .platform_name = "msm-compress-dsp",
  5999. .dynamic = 1,
  6000. .dpcm_capture = 1,
  6001. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6002. SND_SOC_DPCM_TRIGGER_POST},
  6003. .codec_dai_name = "snd-soc-dummy-dai",
  6004. .codec_name = "snd-soc-dummy",
  6005. .ignore_suspend = 1,
  6006. .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
  6007. },
  6008. {
  6009. .name = "Compress10",
  6010. .stream_name = "Compress10",
  6011. .cpu_dai_name = "MultiMedia18",
  6012. .platform_name = "msm-compress-dsp",
  6013. .dynamic = 1,
  6014. .dpcm_capture = 1,
  6015. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6016. SND_SOC_DPCM_TRIGGER_POST},
  6017. .codec_dai_name = "snd-soc-dummy-dai",
  6018. .codec_name = "snd-soc-dummy",
  6019. .ignore_suspend = 1,
  6020. .id = MSM_FRONTEND_DAI_MULTIMEDIA18,
  6021. },
  6022. {
  6023. .name = "Compress11",
  6024. .stream_name = "Compress11",
  6025. .cpu_dai_name = "MultiMedia19",
  6026. .platform_name = "msm-compress-dsp",
  6027. .dynamic = 1,
  6028. .dpcm_capture = 1,
  6029. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6030. SND_SOC_DPCM_TRIGGER_POST},
  6031. .codec_dai_name = "snd-soc-dummy-dai",
  6032. .codec_name = "snd-soc-dummy",
  6033. .ignore_suspend = 1,
  6034. .id = MSM_FRONTEND_DAI_MULTIMEDIA19,
  6035. },
  6036. {
  6037. .name = "Compress12",
  6038. .stream_name = "Compress12",
  6039. .cpu_dai_name = "MultiMedia28",
  6040. .platform_name = "msm-compress-dsp",
  6041. .dynamic = 1,
  6042. .dpcm_capture = 1,
  6043. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6044. SND_SOC_DPCM_TRIGGER_POST},
  6045. .codec_dai_name = "snd-soc-dummy-dai",
  6046. .codec_name = "snd-soc-dummy",
  6047. .ignore_suspend = 1,
  6048. .id = MSM_FRONTEND_DAI_MULTIMEDIA28,
  6049. },
  6050. {
  6051. .name = "Compress13",
  6052. .stream_name = "Compress13",
  6053. .cpu_dai_name = "MultiMedia29",
  6054. .platform_name = "msm-compress-dsp",
  6055. .dynamic = 1,
  6056. .dpcm_capture = 1,
  6057. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6058. SND_SOC_DPCM_TRIGGER_POST},
  6059. .codec_dai_name = "snd-soc-dummy-dai",
  6060. .codec_name = "snd-soc-dummy",
  6061. .ignore_suspend = 1,
  6062. .id = MSM_FRONTEND_DAI_MULTIMEDIA29,
  6063. },
  6064. };
  6065. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  6066. {/* hw:x,37 */
  6067. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  6068. .stream_name = "WSA CDC DMA0 Capture",
  6069. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  6070. .platform_name = "msm-pcm-hostless",
  6071. .codec_name = "bolero_codec",
  6072. .codec_dai_name = "wsa_macro_vifeedback",
  6073. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  6074. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6075. .ignore_suspend = 1,
  6076. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  6077. .ops = &msm_cdc_dma_be_ops,
  6078. },
  6079. };
  6080. static struct snd_soc_dai_link msm_tasha_fe_dai_links[] = {
  6081. /* tasha_vifeedback for speaker protection */
  6082. {
  6083. .name = LPASS_BE_SLIMBUS_4_TX,
  6084. .stream_name = "Slimbus4 Capture",
  6085. .cpu_dai_name = "msm-dai-q6-dev.16393",
  6086. .platform_name = "msm-pcm-hostless",
  6087. .codec_name = "tasha_codec",
  6088. .codec_dai_name = "tasha_vifeedback",
  6089. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  6090. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6091. .ops = &msm_be_ops,
  6092. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  6093. .ignore_suspend = 1,
  6094. },
  6095. /* Ultrasound RX DAI Link */
  6096. {
  6097. .name = "SLIMBUS_2 Hostless Playback",
  6098. .stream_name = "SLIMBUS_2 Hostless Playback",
  6099. .cpu_dai_name = "msm-dai-q6-dev.16388",
  6100. .platform_name = "msm-pcm-hostless",
  6101. .codec_name = "tasha_codec",
  6102. .codec_dai_name = "tasha_rx2",
  6103. .ignore_suspend = 1,
  6104. .dpcm_playback = 1,
  6105. .dpcm_capture = 1,
  6106. .ignore_pmdown_time = 1,
  6107. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  6108. .ops = &msm_slimbus_2_be_ops,
  6109. },
  6110. /* Ultrasound TX DAI Link */
  6111. {
  6112. .name = "SLIMBUS_2 Hostless Capture",
  6113. .stream_name = "SLIMBUS_2 Hostless Capture",
  6114. .cpu_dai_name = "msm-dai-q6-dev.16389",
  6115. .platform_name = "msm-pcm-hostless",
  6116. .codec_name = "tasha_codec",
  6117. .codec_dai_name = "tasha_tx2",
  6118. .ignore_suspend = 1,
  6119. .dpcm_capture = 1,
  6120. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  6121. .ops = &msm_slimbus_2_be_ops,
  6122. },
  6123. /* CPE LSM direct dai-link */
  6124. {
  6125. .name = "CPE Listen service",
  6126. .stream_name = "CPE Listen Audio Service",
  6127. .cpu_dai_name = "msm-dai-slim",
  6128. .platform_name = "msm-cpe-lsm",
  6129. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6130. SND_SOC_DPCM_TRIGGER_POST},
  6131. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  6132. .ignore_suspend = 1,
  6133. .dpcm_capture = 1,
  6134. .codec_dai_name = "tasha_mad1",
  6135. .codec_name = "tasha_codec",
  6136. .ops = &msm_ext_cpe_ops,
  6137. },
  6138. {
  6139. .name = "SLIMBUS_6 Hostless Playback",
  6140. .stream_name = "SLIMBUS_6 Hostless",
  6141. .cpu_dai_name = "SLIMBUS6_HOSTLESS",
  6142. .platform_name = "msm-pcm-hostless",
  6143. .dynamic = 1,
  6144. .dpcm_playback = 1,
  6145. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6146. SND_SOC_DPCM_TRIGGER_POST},
  6147. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  6148. .ignore_suspend = 1,
  6149. /* this dailink has playback support */
  6150. .ignore_pmdown_time = 1,
  6151. .codec_dai_name = "snd-soc-dummy-dai",
  6152. .codec_name = "snd-soc-dummy",
  6153. },
  6154. /* CPE LSM EC PP direct dai-link */
  6155. {
  6156. .name = "CPE Listen service ECPP",
  6157. .stream_name = "CPE Listen Audio Service ECPP",
  6158. .cpu_dai_name = "CPE_LSM_NOHOST",
  6159. .platform_name = "msm-cpe-lsm.3",
  6160. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6161. SND_SOC_DPCM_TRIGGER_POST},
  6162. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  6163. .ignore_suspend = 1,
  6164. .ignore_pmdown_time = 1,
  6165. .codec_dai_name = "tasha_cpe",
  6166. .codec_name = "tasha_codec",
  6167. },
  6168. };
  6169. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  6170. {
  6171. .name = MSM_DAILINK_NAME(ASM Loopback),
  6172. .stream_name = "MultiMedia6",
  6173. .cpu_dai_name = "MultiMedia6",
  6174. .platform_name = "msm-pcm-loopback",
  6175. .dynamic = 1,
  6176. .dpcm_playback = 1,
  6177. .dpcm_capture = 1,
  6178. .codec_dai_name = "snd-soc-dummy-dai",
  6179. .codec_name = "snd-soc-dummy",
  6180. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6181. SND_SOC_DPCM_TRIGGER_POST},
  6182. .ignore_suspend = 1,
  6183. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  6184. .ignore_pmdown_time = 1,
  6185. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  6186. },
  6187. {
  6188. .name = "USB Audio Hostless",
  6189. .stream_name = "USB Audio Hostless",
  6190. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  6191. .platform_name = "msm-pcm-hostless",
  6192. .dynamic = 1,
  6193. .dpcm_playback = 1,
  6194. .dpcm_capture = 1,
  6195. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6196. SND_SOC_DPCM_TRIGGER_POST},
  6197. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  6198. .ignore_suspend = 1,
  6199. .ignore_pmdown_time = 1,
  6200. .codec_dai_name = "snd-soc-dummy-dai",
  6201. .codec_name = "snd-soc-dummy",
  6202. },
  6203. };
  6204. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  6205. /* Backend AFE DAI Links */
  6206. {
  6207. .name = LPASS_BE_AFE_PCM_RX,
  6208. .stream_name = "AFE Playback",
  6209. .cpu_dai_name = "msm-dai-q6-dev.224",
  6210. .platform_name = "msm-pcm-routing",
  6211. .codec_name = "msm-stub-codec.1",
  6212. .codec_dai_name = "msm-stub-rx",
  6213. .no_pcm = 1,
  6214. .dpcm_playback = 1,
  6215. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  6216. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6217. /* this dainlink has playback support */
  6218. .ignore_pmdown_time = 1,
  6219. .ignore_suspend = 1,
  6220. },
  6221. {
  6222. .name = LPASS_BE_AFE_PCM_TX,
  6223. .stream_name = "AFE Capture",
  6224. .cpu_dai_name = "msm-dai-q6-dev.225",
  6225. .platform_name = "msm-pcm-routing",
  6226. .codec_name = "msm-stub-codec.1",
  6227. .codec_dai_name = "msm-stub-tx",
  6228. .no_pcm = 1,
  6229. .dpcm_capture = 1,
  6230. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  6231. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6232. .ignore_suspend = 1,
  6233. },
  6234. /* Incall Record Uplink BACK END DAI Link */
  6235. {
  6236. .name = LPASS_BE_INCALL_RECORD_TX,
  6237. .stream_name = "Voice Uplink Capture",
  6238. .cpu_dai_name = "msm-dai-q6-dev.32772",
  6239. .platform_name = "msm-pcm-routing",
  6240. .codec_name = "msm-stub-codec.1",
  6241. .codec_dai_name = "msm-stub-tx",
  6242. .no_pcm = 1,
  6243. .dpcm_capture = 1,
  6244. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  6245. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6246. .ignore_suspend = 1,
  6247. },
  6248. /* Incall Record Downlink BACK END DAI Link */
  6249. {
  6250. .name = LPASS_BE_INCALL_RECORD_RX,
  6251. .stream_name = "Voice Downlink Capture",
  6252. .cpu_dai_name = "msm-dai-q6-dev.32771",
  6253. .platform_name = "msm-pcm-routing",
  6254. .codec_name = "msm-stub-codec.1",
  6255. .codec_dai_name = "msm-stub-tx",
  6256. .no_pcm = 1,
  6257. .dpcm_capture = 1,
  6258. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  6259. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6260. .ignore_suspend = 1,
  6261. },
  6262. /* Incall Music BACK END DAI Link */
  6263. {
  6264. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  6265. .stream_name = "Voice Farend Playback",
  6266. .cpu_dai_name = "msm-dai-q6-dev.32773",
  6267. .platform_name = "msm-pcm-routing",
  6268. .codec_name = "msm-stub-codec.1",
  6269. .codec_dai_name = "msm-stub-rx",
  6270. .no_pcm = 1,
  6271. .dpcm_playback = 1,
  6272. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  6273. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6274. .ignore_suspend = 1,
  6275. .ignore_pmdown_time = 1,
  6276. },
  6277. /* Incall Music 2 BACK END DAI Link */
  6278. {
  6279. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  6280. .stream_name = "Voice2 Farend Playback",
  6281. .cpu_dai_name = "msm-dai-q6-dev.32770",
  6282. .platform_name = "msm-pcm-routing",
  6283. .codec_name = "msm-stub-codec.1",
  6284. .codec_dai_name = "msm-stub-rx",
  6285. .no_pcm = 1,
  6286. .dpcm_playback = 1,
  6287. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  6288. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6289. .ignore_suspend = 1,
  6290. .ignore_pmdown_time = 1,
  6291. },
  6292. {
  6293. .name = LPASS_BE_USB_AUDIO_RX,
  6294. .stream_name = "USB Audio Playback",
  6295. .cpu_dai_name = "msm-dai-q6-dev.28672",
  6296. .platform_name = "msm-pcm-routing",
  6297. .codec_name = "msm-stub-codec.1",
  6298. .codec_dai_name = "msm-stub-rx",
  6299. .no_pcm = 1,
  6300. .dpcm_playback = 1,
  6301. .id = MSM_BACKEND_DAI_USB_RX,
  6302. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6303. .ignore_pmdown_time = 1,
  6304. .ignore_suspend = 1,
  6305. },
  6306. {
  6307. .name = LPASS_BE_USB_AUDIO_TX,
  6308. .stream_name = "USB Audio Capture",
  6309. .cpu_dai_name = "msm-dai-q6-dev.28673",
  6310. .platform_name = "msm-pcm-routing",
  6311. .codec_name = "msm-stub-codec.1",
  6312. .codec_dai_name = "msm-stub-tx",
  6313. .no_pcm = 1,
  6314. .dpcm_capture = 1,
  6315. .id = MSM_BACKEND_DAI_USB_TX,
  6316. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6317. .ignore_suspend = 1,
  6318. },
  6319. {
  6320. .name = LPASS_BE_PRI_TDM_RX_0,
  6321. .stream_name = "Primary TDM0 Playback",
  6322. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  6323. .platform_name = "msm-pcm-routing",
  6324. .codec_name = "msm-stub-codec.1",
  6325. .codec_dai_name = "msm-stub-rx",
  6326. .no_pcm = 1,
  6327. .dpcm_playback = 1,
  6328. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  6329. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6330. .ops = &sm6150_tdm_be_ops,
  6331. .ignore_suspend = 1,
  6332. .ignore_pmdown_time = 1,
  6333. },
  6334. {
  6335. .name = LPASS_BE_PRI_TDM_TX_0,
  6336. .stream_name = "Primary TDM0 Capture",
  6337. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  6338. .platform_name = "msm-pcm-routing",
  6339. .codec_name = "msm-stub-codec.1",
  6340. .codec_dai_name = "msm-stub-tx",
  6341. .no_pcm = 1,
  6342. .dpcm_capture = 1,
  6343. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  6344. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6345. .ops = &sm6150_tdm_be_ops,
  6346. .ignore_suspend = 1,
  6347. },
  6348. {
  6349. .name = LPASS_BE_SEC_TDM_RX_0,
  6350. .stream_name = "Secondary TDM0 Playback",
  6351. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  6352. .platform_name = "msm-pcm-routing",
  6353. .codec_name = "msm-stub-codec.1",
  6354. .codec_dai_name = "msm-stub-rx",
  6355. .no_pcm = 1,
  6356. .dpcm_playback = 1,
  6357. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  6358. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6359. .ops = &sm6150_tdm_be_ops,
  6360. .ignore_suspend = 1,
  6361. .ignore_pmdown_time = 1,
  6362. },
  6363. {
  6364. .name = LPASS_BE_SEC_TDM_TX_0,
  6365. .stream_name = "Secondary TDM0 Capture",
  6366. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  6367. .platform_name = "msm-pcm-routing",
  6368. .codec_name = "msm-stub-codec.1",
  6369. .codec_dai_name = "msm-stub-tx",
  6370. .no_pcm = 1,
  6371. .dpcm_capture = 1,
  6372. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  6373. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6374. .ops = &sm6150_tdm_be_ops,
  6375. .ignore_suspend = 1,
  6376. },
  6377. {
  6378. .name = LPASS_BE_TERT_TDM_RX_0,
  6379. .stream_name = "Tertiary TDM0 Playback",
  6380. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  6381. .platform_name = "msm-pcm-routing",
  6382. .codec_name = "msm-stub-codec.1",
  6383. .codec_dai_name = "msm-stub-rx",
  6384. .no_pcm = 1,
  6385. .dpcm_playback = 1,
  6386. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  6387. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6388. .ops = &sm6150_tdm_be_ops,
  6389. .ignore_suspend = 1,
  6390. .ignore_pmdown_time = 1,
  6391. },
  6392. {
  6393. .name = LPASS_BE_TERT_TDM_TX_0,
  6394. .stream_name = "Tertiary TDM0 Capture",
  6395. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  6396. .platform_name = "msm-pcm-routing",
  6397. .codec_name = "msm-stub-codec.1",
  6398. .codec_dai_name = "msm-stub-tx",
  6399. .no_pcm = 1,
  6400. .dpcm_capture = 1,
  6401. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  6402. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6403. .ops = &sm6150_tdm_be_ops,
  6404. .ignore_suspend = 1,
  6405. },
  6406. {
  6407. .name = LPASS_BE_QUAT_TDM_RX_0,
  6408. .stream_name = "Quaternary TDM0 Playback",
  6409. .cpu_dai_name = "msm-dai-q6-tdm.36912",
  6410. .platform_name = "msm-pcm-routing",
  6411. .codec_name = "msm-stub-codec.1",
  6412. .codec_dai_name = "msm-stub-rx",
  6413. .no_pcm = 1,
  6414. .dpcm_playback = 1,
  6415. .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
  6416. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6417. .ops = &sm6150_tdm_be_ops,
  6418. .ignore_suspend = 1,
  6419. .ignore_pmdown_time = 1,
  6420. },
  6421. {
  6422. .name = LPASS_BE_QUAT_TDM_TX_0,
  6423. .stream_name = "Quaternary TDM0 Capture",
  6424. .cpu_dai_name = "msm-dai-q6-tdm.36913",
  6425. .platform_name = "msm-pcm-routing",
  6426. .codec_name = "msm-stub-codec.1",
  6427. .codec_dai_name = "msm-stub-tx",
  6428. .no_pcm = 1,
  6429. .dpcm_capture = 1,
  6430. .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
  6431. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6432. .ops = &sm6150_tdm_be_ops,
  6433. .ignore_suspend = 1,
  6434. },
  6435. {
  6436. .name = LPASS_BE_QUIN_TDM_RX_0,
  6437. .stream_name = "Quinary TDM0 Playback",
  6438. .cpu_dai_name = "msm-dai-q6-tdm.36928",
  6439. .platform_name = "msm-pcm-routing",
  6440. .codec_name = "msm-stub-codec.1",
  6441. .codec_dai_name = "msm-stub-rx",
  6442. .no_pcm = 1,
  6443. .dpcm_playback = 1,
  6444. .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,
  6445. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6446. .ops = &sm6150_tdm_be_ops,
  6447. .ignore_suspend = 1,
  6448. .ignore_pmdown_time = 1,
  6449. },
  6450. {
  6451. .name = LPASS_BE_QUIN_TDM_TX_0,
  6452. .stream_name = "Quinary TDM0 Capture",
  6453. .cpu_dai_name = "msm-dai-q6-tdm.36929",
  6454. .platform_name = "msm-pcm-routing",
  6455. .codec_name = "msm-stub-codec.1",
  6456. .codec_dai_name = "msm-stub-tx",
  6457. .no_pcm = 1,
  6458. .dpcm_capture = 1,
  6459. .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,
  6460. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6461. .ops = &sm6150_tdm_be_ops,
  6462. .ignore_suspend = 1,
  6463. },
  6464. };
  6465. static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
  6466. {
  6467. .name = LPASS_BE_SLIMBUS_0_RX,
  6468. .stream_name = "Slimbus Playback",
  6469. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6470. .platform_name = "msm-pcm-routing",
  6471. .codec_name = "tavil_codec",
  6472. .codec_dai_name = "tavil_rx1",
  6473. .no_pcm = 1,
  6474. .dpcm_playback = 1,
  6475. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6476. .init = &msm_audrx_tavil_init,
  6477. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6478. /* this dainlink has playback support */
  6479. .ignore_pmdown_time = 1,
  6480. .ignore_suspend = 1,
  6481. .ops = &msm_be_ops,
  6482. },
  6483. {
  6484. .name = LPASS_BE_SLIMBUS_0_TX,
  6485. .stream_name = "Slimbus Capture",
  6486. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6487. .platform_name = "msm-pcm-routing",
  6488. .codec_name = "tavil_codec",
  6489. .codec_dai_name = "tavil_tx1",
  6490. .no_pcm = 1,
  6491. .dpcm_capture = 1,
  6492. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6493. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6494. .ignore_suspend = 1,
  6495. .ops = &msm_be_ops,
  6496. },
  6497. {
  6498. .name = LPASS_BE_SLIMBUS_1_RX,
  6499. .stream_name = "Slimbus1 Playback",
  6500. .cpu_dai_name = "msm-dai-q6-dev.16386",
  6501. .platform_name = "msm-pcm-routing",
  6502. .codec_name = "tavil_codec",
  6503. .codec_dai_name = "tavil_rx1",
  6504. .no_pcm = 1,
  6505. .dpcm_playback = 1,
  6506. .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
  6507. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6508. .ops = &msm_be_ops,
  6509. /* dai link has playback support */
  6510. .ignore_pmdown_time = 1,
  6511. .ignore_suspend = 1,
  6512. },
  6513. {
  6514. .name = LPASS_BE_SLIMBUS_1_TX,
  6515. .stream_name = "Slimbus1 Capture",
  6516. .cpu_dai_name = "msm-dai-q6-dev.16387",
  6517. .platform_name = "msm-pcm-routing",
  6518. .codec_name = "tavil_codec",
  6519. .codec_dai_name = "tavil_tx3",
  6520. .no_pcm = 1,
  6521. .dpcm_capture = 1,
  6522. .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
  6523. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6524. .ops = &msm_be_ops,
  6525. .ignore_suspend = 1,
  6526. },
  6527. {
  6528. .name = LPASS_BE_SLIMBUS_2_RX,
  6529. .stream_name = "Slimbus2 Playback",
  6530. .cpu_dai_name = "msm-dai-q6-dev.16388",
  6531. .platform_name = "msm-pcm-routing",
  6532. .codec_name = "tavil_codec",
  6533. .codec_dai_name = "tavil_rx2",
  6534. .no_pcm = 1,
  6535. .dpcm_playback = 1,
  6536. .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
  6537. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6538. .ops = &msm_be_ops,
  6539. .ignore_pmdown_time = 1,
  6540. .ignore_suspend = 1,
  6541. },
  6542. {
  6543. .name = LPASS_BE_SLIMBUS_3_RX,
  6544. .stream_name = "Slimbus3 Playback",
  6545. .cpu_dai_name = "msm-dai-q6-dev.16390",
  6546. .platform_name = "msm-pcm-routing",
  6547. .codec_name = "tavil_codec",
  6548. .codec_dai_name = "tavil_rx1",
  6549. .no_pcm = 1,
  6550. .dpcm_playback = 1,
  6551. .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
  6552. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6553. .ops = &msm_be_ops,
  6554. /* dai link has playback support */
  6555. .ignore_pmdown_time = 1,
  6556. .ignore_suspend = 1,
  6557. },
  6558. {
  6559. .name = LPASS_BE_SLIMBUS_3_TX,
  6560. .stream_name = "Slimbus3 Capture",
  6561. .cpu_dai_name = "msm-dai-q6-dev.16391",
  6562. .platform_name = "msm-pcm-routing",
  6563. .codec_name = "tavil_codec",
  6564. .codec_dai_name = "tavil_tx1",
  6565. .no_pcm = 1,
  6566. .dpcm_capture = 1,
  6567. .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
  6568. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6569. .ops = &msm_be_ops,
  6570. .ignore_suspend = 1,
  6571. },
  6572. {
  6573. .name = LPASS_BE_SLIMBUS_4_RX,
  6574. .stream_name = "Slimbus4 Playback",
  6575. .cpu_dai_name = "msm-dai-q6-dev.16392",
  6576. .platform_name = "msm-pcm-routing",
  6577. .codec_name = "tavil_codec",
  6578. .codec_dai_name = "tavil_rx1",
  6579. .no_pcm = 1,
  6580. .dpcm_playback = 1,
  6581. .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
  6582. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6583. .ops = &msm_be_ops,
  6584. /* dai link has playback support */
  6585. .ignore_pmdown_time = 1,
  6586. .ignore_suspend = 1,
  6587. },
  6588. {
  6589. .name = LPASS_BE_SLIMBUS_5_RX,
  6590. .stream_name = "Slimbus5 Playback",
  6591. .cpu_dai_name = "msm-dai-q6-dev.16394",
  6592. .platform_name = "msm-pcm-routing",
  6593. .codec_name = "tavil_codec",
  6594. .codec_dai_name = "tavil_rx3",
  6595. .no_pcm = 1,
  6596. .dpcm_playback = 1,
  6597. .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
  6598. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6599. .ops = &msm_be_ops,
  6600. /* dai link has playback support */
  6601. .ignore_pmdown_time = 1,
  6602. .ignore_suspend = 1,
  6603. },
  6604. /* MAD BE */
  6605. {
  6606. .name = LPASS_BE_SLIMBUS_5_TX,
  6607. .stream_name = "Slimbus5 Capture",
  6608. .cpu_dai_name = "msm-dai-q6-dev.16395",
  6609. .platform_name = "msm-pcm-routing",
  6610. .codec_name = "tavil_codec",
  6611. .codec_dai_name = "tavil_mad1",
  6612. .no_pcm = 1,
  6613. .dpcm_capture = 1,
  6614. .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
  6615. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6616. .ops = &msm_be_ops,
  6617. .ignore_suspend = 1,
  6618. },
  6619. {
  6620. .name = LPASS_BE_SLIMBUS_6_RX,
  6621. .stream_name = "Slimbus6 Playback",
  6622. .cpu_dai_name = "msm-dai-q6-dev.16396",
  6623. .platform_name = "msm-pcm-routing",
  6624. .codec_name = "tavil_codec",
  6625. .codec_dai_name = "tavil_rx4",
  6626. .no_pcm = 1,
  6627. .dpcm_playback = 1,
  6628. .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
  6629. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6630. .ops = &msm_be_ops,
  6631. /* dai link has playback support */
  6632. .ignore_pmdown_time = 1,
  6633. .ignore_suspend = 1,
  6634. },
  6635. /* Slimbus VI Recording */
  6636. {
  6637. .name = LPASS_BE_SLIMBUS_TX_VI,
  6638. .stream_name = "Slimbus4 Capture",
  6639. .cpu_dai_name = "msm-dai-q6-dev.16393",
  6640. .platform_name = "msm-pcm-routing",
  6641. .codec_name = "tavil_codec",
  6642. .codec_dai_name = "tavil_vifeedback",
  6643. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  6644. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6645. .ops = &msm_be_ops,
  6646. .ignore_suspend = 1,
  6647. .no_pcm = 1,
  6648. .dpcm_capture = 1,
  6649. },
  6650. };
  6651. static struct snd_soc_dai_link msm_tasha_be_dai_links[] = {
  6652. /* Backend DAI Links */
  6653. {
  6654. .name = LPASS_BE_SLIMBUS_0_RX,
  6655. .stream_name = "Slimbus Playback",
  6656. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6657. .platform_name = "msm-pcm-routing",
  6658. .codec_name = "tasha_codec",
  6659. .codec_dai_name = "tasha_mix_rx1",
  6660. .no_pcm = 1,
  6661. .dpcm_playback = 1,
  6662. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6663. .init = &msm_audrx_tasha_init,
  6664. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6665. /* this dainlink has playback support */
  6666. .ignore_pmdown_time = 1,
  6667. .ignore_suspend = 1,
  6668. .ops = &msm_be_ops,
  6669. },
  6670. {
  6671. .name = LPASS_BE_SLIMBUS_0_TX,
  6672. .stream_name = "Slimbus Capture",
  6673. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6674. .platform_name = "msm-pcm-routing",
  6675. .codec_name = "tasha_codec",
  6676. .codec_dai_name = "tasha_tx1",
  6677. .no_pcm = 1,
  6678. .dpcm_capture = 1,
  6679. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6680. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6681. .ignore_suspend = 1,
  6682. .ops = &msm_be_ops,
  6683. },
  6684. {
  6685. .name = LPASS_BE_SLIMBUS_1_RX,
  6686. .stream_name = "Slimbus1 Playback",
  6687. .cpu_dai_name = "msm-dai-q6-dev.16386",
  6688. .platform_name = "msm-pcm-routing",
  6689. .codec_name = "tasha_codec",
  6690. .codec_dai_name = "tasha_mix_rx1",
  6691. .no_pcm = 1,
  6692. .dpcm_playback = 1,
  6693. .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
  6694. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6695. .ops = &msm_be_ops,
  6696. /* dai link has playback support */
  6697. .ignore_pmdown_time = 1,
  6698. .ignore_suspend = 1,
  6699. },
  6700. {
  6701. .name = LPASS_BE_SLIMBUS_1_TX,
  6702. .stream_name = "Slimbus1 Capture",
  6703. .cpu_dai_name = "msm-dai-q6-dev.16387",
  6704. .platform_name = "msm-pcm-routing",
  6705. .codec_name = "tasha_codec",
  6706. .codec_dai_name = "tasha_tx3",
  6707. .no_pcm = 1,
  6708. .dpcm_capture = 1,
  6709. .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
  6710. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6711. .ops = &msm_be_ops,
  6712. .ignore_suspend = 1,
  6713. },
  6714. {
  6715. .name = LPASS_BE_SLIMBUS_3_RX,
  6716. .stream_name = "Slimbus3 Playback",
  6717. .cpu_dai_name = "msm-dai-q6-dev.16390",
  6718. .platform_name = "msm-pcm-routing",
  6719. .codec_name = "tasha_codec",
  6720. .codec_dai_name = "tasha_mix_rx1",
  6721. .no_pcm = 1,
  6722. .dpcm_playback = 1,
  6723. .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
  6724. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6725. .ops = &msm_be_ops,
  6726. /* dai link has playback support */
  6727. .ignore_pmdown_time = 1,
  6728. .ignore_suspend = 1,
  6729. },
  6730. {
  6731. .name = LPASS_BE_SLIMBUS_3_TX,
  6732. .stream_name = "Slimbus3 Capture",
  6733. .cpu_dai_name = "msm-dai-q6-dev.16391",
  6734. .platform_name = "msm-pcm-routing",
  6735. .codec_name = "tasha_codec",
  6736. .codec_dai_name = "tasha_tx1",
  6737. .no_pcm = 1,
  6738. .dpcm_capture = 1,
  6739. .dpcm_playback = 1,
  6740. .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
  6741. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6742. .ops = &msm_be_ops,
  6743. .ignore_suspend = 1,
  6744. },
  6745. {
  6746. .name = LPASS_BE_SLIMBUS_4_RX,
  6747. .stream_name = "Slimbus4 Playback",
  6748. .cpu_dai_name = "msm-dai-q6-dev.16392",
  6749. .platform_name = "msm-pcm-routing",
  6750. .codec_name = "tasha_codec",
  6751. .codec_dai_name = "tasha_mix_rx1",
  6752. .no_pcm = 1,
  6753. .dpcm_playback = 1,
  6754. .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
  6755. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6756. .ops = &msm_be_ops,
  6757. /* dai link has playback support */
  6758. .ignore_pmdown_time = 1,
  6759. .ignore_suspend = 1,
  6760. },
  6761. {
  6762. .name = LPASS_BE_SLIMBUS_5_RX,
  6763. .stream_name = "Slimbus5 Playback",
  6764. .cpu_dai_name = "msm-dai-q6-dev.16394",
  6765. .platform_name = "msm-pcm-routing",
  6766. .codec_name = "tasha_codec",
  6767. .codec_dai_name = "tasha_rx3",
  6768. .no_pcm = 1,
  6769. .dpcm_playback = 1,
  6770. .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
  6771. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6772. .ops = &msm_be_ops,
  6773. /* dai link has playback support */
  6774. .ignore_pmdown_time = 1,
  6775. .ignore_suspend = 1,
  6776. },
  6777. /* MAD BE */
  6778. {
  6779. .name = LPASS_BE_SLIMBUS_5_TX,
  6780. .stream_name = "Slimbus5 Capture",
  6781. .cpu_dai_name = "msm-dai-q6-dev.16395",
  6782. .platform_name = "msm-pcm-routing",
  6783. .codec_name = "tasha_codec",
  6784. .codec_dai_name = "tasha_mad1",
  6785. .no_pcm = 1,
  6786. .dpcm_capture = 1,
  6787. .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
  6788. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6789. .ops = &msm_be_ops,
  6790. .ignore_suspend = 1,
  6791. },
  6792. {
  6793. .name = LPASS_BE_SLIMBUS_6_RX,
  6794. .stream_name = "Slimbus6 Playback",
  6795. .cpu_dai_name = "msm-dai-q6-dev.16396",
  6796. .platform_name = "msm-pcm-routing",
  6797. .codec_name = "tasha_codec",
  6798. .codec_dai_name = "tasha_rx4",
  6799. .no_pcm = 1,
  6800. .dpcm_playback = 1,
  6801. .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
  6802. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6803. .ops = &msm_be_ops,
  6804. /* dai link has playback support */
  6805. .ignore_pmdown_time = 1,
  6806. .ignore_suspend = 1,
  6807. },
  6808. };
  6809. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  6810. {
  6811. .name = LPASS_BE_SLIMBUS_7_RX,
  6812. .stream_name = "Slimbus7 Playback",
  6813. .cpu_dai_name = "msm-dai-q6-dev.16398",
  6814. .platform_name = "msm-pcm-routing",
  6815. .codec_name = "btfmslim_slave",
  6816. /* BT codec driver determines capabilities based on
  6817. * dai name, bt codecdai name should always contains
  6818. * supported usecase information
  6819. */
  6820. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  6821. .no_pcm = 1,
  6822. .dpcm_playback = 1,
  6823. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  6824. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6825. .ops = &msm_wcn_ops,
  6826. /* dai link has playback support */
  6827. .ignore_pmdown_time = 1,
  6828. .ignore_suspend = 1,
  6829. },
  6830. {
  6831. .name = LPASS_BE_SLIMBUS_7_TX,
  6832. .stream_name = "Slimbus7 Capture",
  6833. .cpu_dai_name = "msm-dai-q6-dev.16399",
  6834. .platform_name = "msm-pcm-routing",
  6835. .codec_name = "btfmslim_slave",
  6836. .codec_dai_name = "btfm_bt_sco_slim_tx",
  6837. .no_pcm = 1,
  6838. .dpcm_capture = 1,
  6839. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  6840. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6841. .ops = &msm_wcn_ops,
  6842. .ignore_suspend = 1,
  6843. },
  6844. {
  6845. .name = LPASS_BE_SLIMBUS_8_TX,
  6846. .stream_name = "Slimbus8 Capture",
  6847. .cpu_dai_name = "msm-dai-q6-dev.16401",
  6848. .platform_name = "msm-pcm-routing",
  6849. .codec_name = "btfmslim_slave",
  6850. .codec_dai_name = "btfm_fm_slim_tx",
  6851. .no_pcm = 1,
  6852. .dpcm_capture = 1,
  6853. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  6854. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6855. .init = &msm_wcn_init,
  6856. .ops = &msm_wcn_ops,
  6857. .ignore_suspend = 1,
  6858. },
  6859. };
  6860. static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
  6861. /* DISP PORT BACK END DAI Link */
  6862. {
  6863. .name = LPASS_BE_DISPLAY_PORT,
  6864. .stream_name = "Display Port Playback",
  6865. .cpu_dai_name = "msm-dai-q6-dp.24608",
  6866. .platform_name = "msm-pcm-routing",
  6867. .codec_name = "msm-ext-disp-audio-codec-rx",
  6868. .codec_dai_name = "msm_dp_audio_codec_rx_dai",
  6869. .no_pcm = 1,
  6870. .dpcm_playback = 1,
  6871. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
  6872. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6873. .ignore_pmdown_time = 1,
  6874. .ignore_suspend = 1,
  6875. },
  6876. };
  6877. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  6878. {
  6879. .name = LPASS_BE_PRI_MI2S_RX,
  6880. .stream_name = "Primary MI2S Playback",
  6881. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6882. .platform_name = "msm-pcm-routing",
  6883. .codec_name = "msm-stub-codec.1",
  6884. .codec_dai_name = "msm-stub-rx",
  6885. .no_pcm = 1,
  6886. .dpcm_playback = 1,
  6887. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  6888. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6889. .ops = &msm_mi2s_be_ops,
  6890. .ignore_suspend = 1,
  6891. .ignore_pmdown_time = 1,
  6892. },
  6893. {
  6894. .name = LPASS_BE_PRI_MI2S_TX,
  6895. .stream_name = "Primary MI2S Capture",
  6896. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6897. .platform_name = "msm-pcm-routing",
  6898. .codec_name = "msm-stub-codec.1",
  6899. .codec_dai_name = "msm-stub-tx",
  6900. .no_pcm = 1,
  6901. .dpcm_capture = 1,
  6902. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  6903. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6904. .ops = &msm_mi2s_be_ops,
  6905. .ignore_suspend = 1,
  6906. },
  6907. {
  6908. .name = LPASS_BE_SEC_MI2S_RX,
  6909. .stream_name = "Secondary MI2S Playback",
  6910. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6911. .platform_name = "msm-pcm-routing",
  6912. .codec_name = "msm-stub-codec.1",
  6913. .codec_dai_name = "msm-stub-rx",
  6914. .no_pcm = 1,
  6915. .dpcm_playback = 1,
  6916. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  6917. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6918. .ops = &msm_mi2s_be_ops,
  6919. .ignore_suspend = 1,
  6920. .ignore_pmdown_time = 1,
  6921. },
  6922. {
  6923. .name = LPASS_BE_SEC_MI2S_TX,
  6924. .stream_name = "Secondary MI2S Capture",
  6925. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6926. .platform_name = "msm-pcm-routing",
  6927. .codec_name = "msm-stub-codec.1",
  6928. .codec_dai_name = "msm-stub-tx",
  6929. .no_pcm = 1,
  6930. .dpcm_capture = 1,
  6931. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  6932. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6933. .ops = &msm_mi2s_be_ops,
  6934. .ignore_suspend = 1,
  6935. },
  6936. {
  6937. .name = LPASS_BE_TERT_MI2S_RX,
  6938. .stream_name = "Tertiary MI2S Playback",
  6939. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6940. .platform_name = "msm-pcm-routing",
  6941. .codec_name = "msm-stub-codec.1",
  6942. .codec_dai_name = "msm-stub-rx",
  6943. .no_pcm = 1,
  6944. .dpcm_playback = 1,
  6945. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  6946. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6947. .ops = &msm_mi2s_be_ops,
  6948. .ignore_suspend = 1,
  6949. .ignore_pmdown_time = 1,
  6950. },
  6951. {
  6952. .name = LPASS_BE_TERT_MI2S_TX,
  6953. .stream_name = "Tertiary MI2S Capture",
  6954. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6955. .platform_name = "msm-pcm-routing",
  6956. .codec_name = "msm-stub-codec.1",
  6957. .codec_dai_name = "msm-stub-tx",
  6958. .no_pcm = 1,
  6959. .dpcm_capture = 1,
  6960. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  6961. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6962. .ops = &msm_mi2s_be_ops,
  6963. .ignore_suspend = 1,
  6964. },
  6965. {
  6966. .name = LPASS_BE_QUAT_MI2S_RX,
  6967. .stream_name = "Quaternary MI2S Playback",
  6968. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6969. .platform_name = "msm-pcm-routing",
  6970. .codec_name = "msm-stub-codec.1",
  6971. .codec_dai_name = "msm-stub-rx",
  6972. .no_pcm = 1,
  6973. .dpcm_playback = 1,
  6974. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
  6975. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6976. .ops = &msm_mi2s_be_ops,
  6977. .ignore_suspend = 1,
  6978. .ignore_pmdown_time = 1,
  6979. },
  6980. {
  6981. .name = LPASS_BE_QUAT_MI2S_TX,
  6982. .stream_name = "Quaternary MI2S Capture",
  6983. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6984. .platform_name = "msm-pcm-routing",
  6985. .codec_name = "msm-stub-codec.1",
  6986. .codec_dai_name = "msm-stub-tx",
  6987. .no_pcm = 1,
  6988. .dpcm_capture = 1,
  6989. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
  6990. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6991. .ops = &msm_mi2s_be_ops,
  6992. .ignore_suspend = 1,
  6993. },
  6994. {
  6995. .name = LPASS_BE_QUIN_MI2S_RX,
  6996. .stream_name = "Quinary MI2S Playback",
  6997. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6998. .platform_name = "msm-pcm-routing",
  6999. .codec_name = "msm-stub-codec.1",
  7000. .codec_dai_name = "msm-stub-rx",
  7001. .no_pcm = 1,
  7002. .dpcm_playback = 1,
  7003. .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
  7004. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7005. .ops = &msm_mi2s_be_ops,
  7006. .ignore_suspend = 1,
  7007. .ignore_pmdown_time = 1,
  7008. },
  7009. {
  7010. .name = LPASS_BE_QUIN_MI2S_TX,
  7011. .stream_name = "Quinary MI2S Capture",
  7012. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  7013. .platform_name = "msm-pcm-routing",
  7014. .codec_name = "msm-stub-codec.1",
  7015. .codec_dai_name = "msm-stub-tx",
  7016. .no_pcm = 1,
  7017. .dpcm_capture = 1,
  7018. .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
  7019. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7020. .ops = &msm_mi2s_be_ops,
  7021. .ignore_suspend = 1,
  7022. },
  7023. };
  7024. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  7025. /* Primary AUX PCM Backend DAI Links */
  7026. {
  7027. .name = LPASS_BE_AUXPCM_RX,
  7028. .stream_name = "AUX PCM Playback",
  7029. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  7030. .platform_name = "msm-pcm-routing",
  7031. .codec_name = "msm-stub-codec.1",
  7032. .codec_dai_name = "msm-stub-rx",
  7033. .no_pcm = 1,
  7034. .dpcm_playback = 1,
  7035. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  7036. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7037. .ignore_pmdown_time = 1,
  7038. .ignore_suspend = 1,
  7039. },
  7040. {
  7041. .name = LPASS_BE_AUXPCM_TX,
  7042. .stream_name = "AUX PCM Capture",
  7043. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  7044. .platform_name = "msm-pcm-routing",
  7045. .codec_name = "msm-stub-codec.1",
  7046. .codec_dai_name = "msm-stub-tx",
  7047. .no_pcm = 1,
  7048. .dpcm_capture = 1,
  7049. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  7050. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7051. .ignore_suspend = 1,
  7052. },
  7053. /* Secondary AUX PCM Backend DAI Links */
  7054. {
  7055. .name = LPASS_BE_SEC_AUXPCM_RX,
  7056. .stream_name = "Sec AUX PCM Playback",
  7057. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  7058. .platform_name = "msm-pcm-routing",
  7059. .codec_name = "msm-stub-codec.1",
  7060. .codec_dai_name = "msm-stub-rx",
  7061. .no_pcm = 1,
  7062. .dpcm_playback = 1,
  7063. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  7064. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7065. .ignore_pmdown_time = 1,
  7066. .ignore_suspend = 1,
  7067. },
  7068. {
  7069. .name = LPASS_BE_SEC_AUXPCM_TX,
  7070. .stream_name = "Sec AUX PCM Capture",
  7071. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  7072. .platform_name = "msm-pcm-routing",
  7073. .codec_name = "msm-stub-codec.1",
  7074. .codec_dai_name = "msm-stub-tx",
  7075. .no_pcm = 1,
  7076. .dpcm_capture = 1,
  7077. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  7078. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7079. .ignore_suspend = 1,
  7080. },
  7081. /* Tertiary AUX PCM Backend DAI Links */
  7082. {
  7083. .name = LPASS_BE_TERT_AUXPCM_RX,
  7084. .stream_name = "Tert AUX PCM Playback",
  7085. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  7086. .platform_name = "msm-pcm-routing",
  7087. .codec_name = "msm-stub-codec.1",
  7088. .codec_dai_name = "msm-stub-rx",
  7089. .no_pcm = 1,
  7090. .dpcm_playback = 1,
  7091. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  7092. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7093. .ignore_suspend = 1,
  7094. },
  7095. {
  7096. .name = LPASS_BE_TERT_AUXPCM_TX,
  7097. .stream_name = "Tert AUX PCM Capture",
  7098. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  7099. .platform_name = "msm-pcm-routing",
  7100. .codec_name = "msm-stub-codec.1",
  7101. .codec_dai_name = "msm-stub-tx",
  7102. .no_pcm = 1,
  7103. .dpcm_capture = 1,
  7104. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  7105. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7106. .ignore_suspend = 1,
  7107. },
  7108. /* Quaternary AUX PCM Backend DAI Links */
  7109. {
  7110. .name = LPASS_BE_QUAT_AUXPCM_RX,
  7111. .stream_name = "Quat AUX PCM Playback",
  7112. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  7113. .platform_name = "msm-pcm-routing",
  7114. .codec_name = "msm-stub-codec.1",
  7115. .codec_dai_name = "msm-stub-rx",
  7116. .no_pcm = 1,
  7117. .dpcm_playback = 1,
  7118. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
  7119. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7120. .ignore_pmdown_time = 1,
  7121. .ignore_suspend = 1,
  7122. },
  7123. {
  7124. .name = LPASS_BE_QUAT_AUXPCM_TX,
  7125. .stream_name = "Quat AUX PCM Capture",
  7126. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  7127. .platform_name = "msm-pcm-routing",
  7128. .codec_name = "msm-stub-codec.1",
  7129. .codec_dai_name = "msm-stub-tx",
  7130. .no_pcm = 1,
  7131. .dpcm_capture = 1,
  7132. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
  7133. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7134. .ignore_suspend = 1,
  7135. },
  7136. /* Quinary AUX PCM Backend DAI Links */
  7137. {
  7138. .name = LPASS_BE_QUIN_AUXPCM_RX,
  7139. .stream_name = "Quin AUX PCM Playback",
  7140. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  7141. .platform_name = "msm-pcm-routing",
  7142. .codec_name = "msm-stub-codec.1",
  7143. .codec_dai_name = "msm-stub-rx",
  7144. .no_pcm = 1,
  7145. .dpcm_playback = 1,
  7146. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
  7147. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7148. .ignore_pmdown_time = 1,
  7149. .ignore_suspend = 1,
  7150. },
  7151. {
  7152. .name = LPASS_BE_QUIN_AUXPCM_TX,
  7153. .stream_name = "Quin AUX PCM Capture",
  7154. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  7155. .platform_name = "msm-pcm-routing",
  7156. .codec_name = "msm-stub-codec.1",
  7157. .codec_dai_name = "msm-stub-tx",
  7158. .no_pcm = 1,
  7159. .dpcm_capture = 1,
  7160. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
  7161. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7162. .ignore_suspend = 1,
  7163. },
  7164. };
  7165. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  7166. /* WSA CDC DMA Backend DAI Links */
  7167. {
  7168. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  7169. .stream_name = "WSA CDC DMA0 Playback",
  7170. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  7171. .platform_name = "msm-pcm-routing",
  7172. .codec_name = "bolero_codec",
  7173. .codec_dai_name = "wsa_macro_rx1",
  7174. .no_pcm = 1,
  7175. .dpcm_playback = 1,
  7176. .init = &msm_int_audrx_init,
  7177. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  7178. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7179. .ignore_pmdown_time = 1,
  7180. .ignore_suspend = 1,
  7181. .ops = &msm_cdc_dma_be_ops,
  7182. },
  7183. {
  7184. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  7185. .stream_name = "WSA CDC DMA1 Playback",
  7186. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  7187. .platform_name = "msm-pcm-routing",
  7188. .codec_name = "bolero_codec",
  7189. .codec_dai_name = "wsa_macro_rx_mix",
  7190. .no_pcm = 1,
  7191. .dpcm_playback = 1,
  7192. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  7193. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7194. .ignore_pmdown_time = 1,
  7195. .ignore_suspend = 1,
  7196. .ops = &msm_cdc_dma_be_ops,
  7197. },
  7198. {
  7199. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  7200. .stream_name = "WSA CDC DMA1 Capture",
  7201. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  7202. .platform_name = "msm-pcm-routing",
  7203. .codec_name = "bolero_codec",
  7204. .codec_dai_name = "wsa_macro_echo",
  7205. .no_pcm = 1,
  7206. .dpcm_capture = 1,
  7207. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  7208. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7209. .ignore_suspend = 1,
  7210. .ops = &msm_cdc_dma_be_ops,
  7211. },
  7212. };
  7213. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  7214. /* RX CDC DMA Backend DAI Links */
  7215. {
  7216. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  7217. .stream_name = "RX CDC DMA0 Playback",
  7218. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  7219. .platform_name = "msm-pcm-routing",
  7220. .codec_name = "bolero_codec",
  7221. .codec_dai_name = "rx_macro_rx1",
  7222. .no_pcm = 1,
  7223. .dpcm_playback = 1,
  7224. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  7225. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7226. .ignore_pmdown_time = 1,
  7227. .ignore_suspend = 1,
  7228. .ops = &msm_cdc_dma_be_ops,
  7229. },
  7230. {
  7231. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  7232. .stream_name = "RX CDC DMA1 Playback",
  7233. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  7234. .platform_name = "msm-pcm-routing",
  7235. .codec_name = "bolero_codec",
  7236. .codec_dai_name = "rx_macro_rx2",
  7237. .no_pcm = 1,
  7238. .dpcm_playback = 1,
  7239. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  7240. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7241. .ignore_pmdown_time = 1,
  7242. .ignore_suspend = 1,
  7243. .ops = &msm_cdc_dma_be_ops,
  7244. },
  7245. {
  7246. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  7247. .stream_name = "RX CDC DMA2 Playback",
  7248. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  7249. .platform_name = "msm-pcm-routing",
  7250. .codec_name = "bolero_codec",
  7251. .codec_dai_name = "rx_macro_rx3",
  7252. .no_pcm = 1,
  7253. .dpcm_playback = 1,
  7254. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  7255. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7256. .ignore_pmdown_time = 1,
  7257. .ignore_suspend = 1,
  7258. .ops = &msm_cdc_dma_be_ops,
  7259. },
  7260. {
  7261. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  7262. .stream_name = "RX CDC DMA3 Playback",
  7263. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  7264. .platform_name = "msm-pcm-routing",
  7265. .codec_name = "bolero_codec",
  7266. .codec_dai_name = "rx_macro_rx4",
  7267. .no_pcm = 1,
  7268. .dpcm_playback = 1,
  7269. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  7270. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7271. .ignore_pmdown_time = 1,
  7272. .ignore_suspend = 1,
  7273. .ops = &msm_cdc_dma_be_ops,
  7274. },
  7275. /* TX CDC DMA Backend DAI Links */
  7276. {
  7277. .name = LPASS_BE_TX_CDC_DMA_TX_0,
  7278. .stream_name = "TX CDC DMA0 Capture",
  7279. .cpu_dai_name = "msm-dai-cdc-dma-dev.45105",
  7280. .platform_name = "msm-pcm-routing",
  7281. .codec_name = "bolero_codec",
  7282. .codec_dai_name = "rx_macro_echo",
  7283. .no_pcm = 1,
  7284. .dpcm_capture = 1,
  7285. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_0,
  7286. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7287. .ignore_suspend = 1,
  7288. .ops = &msm_cdc_dma_be_ops,
  7289. },
  7290. {
  7291. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  7292. .stream_name = "TX CDC DMA3 Capture",
  7293. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  7294. .platform_name = "msm-pcm-routing",
  7295. .codec_name = "bolero_codec",
  7296. .codec_dai_name = "tx_macro_tx1",
  7297. .no_pcm = 1,
  7298. .dpcm_capture = 1,
  7299. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  7300. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7301. .ignore_suspend = 1,
  7302. .ops = &msm_cdc_dma_be_ops,
  7303. },
  7304. {
  7305. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  7306. .stream_name = "TX CDC DMA4 Capture",
  7307. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  7308. .platform_name = "msm-pcm-routing",
  7309. .codec_name = "bolero_codec",
  7310. .codec_dai_name = "tx_macro_tx2",
  7311. .no_pcm = 1,
  7312. .dpcm_capture = 1,
  7313. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  7314. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7315. .ignore_suspend = 1,
  7316. .ops = &msm_cdc_dma_be_ops,
  7317. },
  7318. };
  7319. static struct snd_soc_dai_link msm_sm6150_dai_links[
  7320. ARRAY_SIZE(msm_common_dai_links) +
  7321. ARRAY_SIZE(msm_tavil_fe_dai_links) +
  7322. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  7323. ARRAY_SIZE(msm_tasha_fe_dai_links) +
  7324. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  7325. ARRAY_SIZE(msm_int_compress_capture_dai) +
  7326. ARRAY_SIZE(msm_common_be_dai_links) +
  7327. ARRAY_SIZE(msm_tavil_be_dai_links) +
  7328. ARRAY_SIZE(msm_tasha_be_dai_links) +
  7329. ARRAY_SIZE(msm_wcn_be_dai_links) +
  7330. ARRAY_SIZE(ext_disp_be_dai_link) +
  7331. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  7332. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  7333. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  7334. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
  7335. static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
  7336. {
  7337. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  7338. struct snd_soc_pcm_runtime *rtd;
  7339. struct snd_soc_component *component;
  7340. int ret = 0;
  7341. void *mbhc_calibration;
  7342. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  7343. if (!rtd) {
  7344. dev_err(card->dev,
  7345. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  7346. __func__, be_dl_name);
  7347. ret = -EINVAL;
  7348. goto err_pcm_runtime;
  7349. }
  7350. component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
  7351. if (!component) {
  7352. pr_err("%s: component is NULL\n", __func__);
  7353. ret = -EINVAL;
  7354. goto err_pcm_runtime;
  7355. }
  7356. mbhc_calibration = def_wcd_mbhc_cal();
  7357. if (!mbhc_calibration) {
  7358. ret = -ENOMEM;
  7359. goto err_mbhc_cal;
  7360. }
  7361. wcd_mbhc_cfg.calibration = mbhc_calibration;
  7362. ret = tavil_mbhc_hs_detect(component, &wcd_mbhc_cfg);
  7363. if (ret) {
  7364. dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
  7365. __func__, ret);
  7366. goto err_hs_detect;
  7367. }
  7368. return 0;
  7369. err_hs_detect:
  7370. kfree(mbhc_calibration);
  7371. err_mbhc_cal:
  7372. err_pcm_runtime:
  7373. return ret;
  7374. }
  7375. static int msm_snd_card_tasha_late_probe(struct snd_soc_card *card)
  7376. {
  7377. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  7378. struct snd_soc_pcm_runtime *rtd;
  7379. struct snd_soc_component *component;
  7380. int ret = 0;
  7381. void *mbhc_calibration;
  7382. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  7383. if (!rtd) {
  7384. dev_err(card->dev,
  7385. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  7386. __func__, be_dl_name);
  7387. ret = -EINVAL;
  7388. goto err_pcm_runtime;
  7389. }
  7390. component = snd_soc_rtdcom_lookup(rtd, "tasha_codec");
  7391. if (!component) {
  7392. pr_err("%s: component is NULL\n", __func__);
  7393. ret = -EINVAL;
  7394. goto err_pcm_runtime;
  7395. }
  7396. mbhc_calibration = def_wcd_mbhc_cal();
  7397. if (!mbhc_calibration) {
  7398. ret = -ENOMEM;
  7399. goto err_mbhc_cal;
  7400. }
  7401. wcd_mbhc_cfg.calibration = mbhc_calibration;
  7402. ret = tasha_mbhc_hs_detect(component, &wcd_mbhc_cfg);
  7403. if (ret) {
  7404. dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
  7405. __func__, ret);
  7406. goto err_hs_detect;
  7407. }
  7408. return 0;
  7409. err_hs_detect:
  7410. kfree(mbhc_calibration);
  7411. err_mbhc_cal:
  7412. err_pcm_runtime:
  7413. return ret;
  7414. }
  7415. static int msm_populate_dai_link_component_of_node(
  7416. struct snd_soc_card *card)
  7417. {
  7418. int i, index, ret = 0;
  7419. struct device *cdev = card->dev;
  7420. struct snd_soc_dai_link *dai_link = card->dai_link;
  7421. struct device_node *np;
  7422. if (!cdev) {
  7423. pr_err("%s: Sound card device memory NULL\n", __func__);
  7424. return -ENODEV;
  7425. }
  7426. for (i = 0; i < card->num_links; i++) {
  7427. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  7428. continue;
  7429. /* populate platform_of_node for snd card dai links */
  7430. if (dai_link[i].platform_name &&
  7431. !dai_link[i].platform_of_node) {
  7432. index = of_property_match_string(cdev->of_node,
  7433. "asoc-platform-names",
  7434. dai_link[i].platform_name);
  7435. if (index < 0) {
  7436. pr_err("%s: No match found for platform name: %s\n",
  7437. __func__, dai_link[i].platform_name);
  7438. ret = index;
  7439. goto err;
  7440. }
  7441. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  7442. index);
  7443. if (!np) {
  7444. pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
  7445. __func__, dai_link[i].platform_name,
  7446. index);
  7447. ret = -ENODEV;
  7448. goto err;
  7449. }
  7450. dai_link[i].platform_of_node = np;
  7451. dai_link[i].platform_name = NULL;
  7452. }
  7453. /* populate cpu_of_node for snd card dai links */
  7454. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  7455. index = of_property_match_string(cdev->of_node,
  7456. "asoc-cpu-names",
  7457. dai_link[i].cpu_dai_name);
  7458. if (index >= 0) {
  7459. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  7460. index);
  7461. if (!np) {
  7462. pr_err("%s: retrieving phandle for cpu dai %s failed\n",
  7463. __func__,
  7464. dai_link[i].cpu_dai_name);
  7465. ret = -ENODEV;
  7466. goto err;
  7467. }
  7468. dai_link[i].cpu_of_node = np;
  7469. dai_link[i].cpu_dai_name = NULL;
  7470. }
  7471. }
  7472. /* populate codec_of_node for snd card dai links */
  7473. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  7474. index = of_property_match_string(cdev->of_node,
  7475. "asoc-codec-names",
  7476. dai_link[i].codec_name);
  7477. if (index < 0)
  7478. continue;
  7479. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  7480. index);
  7481. if (!np) {
  7482. pr_err("%s: retrieving phandle for codec %s failed\n",
  7483. __func__, dai_link[i].codec_name);
  7484. ret = -ENODEV;
  7485. goto err;
  7486. }
  7487. dai_link[i].codec_of_node = np;
  7488. dai_link[i].codec_name = NULL;
  7489. }
  7490. }
  7491. err:
  7492. return ret;
  7493. }
  7494. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  7495. {
  7496. int ret = 0;
  7497. struct snd_soc_component *component =
  7498. snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
  7499. ret = snd_soc_add_component_controls(component, msm_ext_snd_controls,
  7500. ARRAY_SIZE(msm_ext_snd_controls));
  7501. if (ret < 0) {
  7502. dev_err(component->dev,
  7503. "%s: add_codec_controls failed, err = %d\n",
  7504. __func__, ret);
  7505. return ret;
  7506. }
  7507. return 0;
  7508. }
  7509. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  7510. struct snd_pcm_hw_params *params)
  7511. {
  7512. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  7513. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  7514. int ret = 0;
  7515. unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
  7516. 151};
  7517. unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
  7518. 134, 135, 136, 137, 138, 139,
  7519. 140, 141, 142, 143};
  7520. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  7521. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  7522. slim_rx_cfg[SLIM_RX_0].channels,
  7523. rx_ch);
  7524. if (ret < 0)
  7525. pr_err("%s: RX failed to set cpu chan map error %d\n",
  7526. __func__, ret);
  7527. } else {
  7528. ret = snd_soc_dai_set_channel_map(cpu_dai,
  7529. slim_tx_cfg[SLIM_TX_0].channels,
  7530. tx_ch, 0, 0);
  7531. if (ret < 0)
  7532. pr_err("%s: TX failed to set cpu chan map error %d\n",
  7533. __func__, ret);
  7534. }
  7535. return ret;
  7536. }
  7537. static struct snd_soc_ops msm_stub_be_ops = {
  7538. .hw_params = msm_snd_stub_hw_params,
  7539. };
  7540. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  7541. /* FrontEnd DAI Links */
  7542. {
  7543. .name = "MSMSTUB Media1",
  7544. .stream_name = "MultiMedia1",
  7545. .cpu_dai_name = "MultiMedia1",
  7546. .platform_name = "msm-pcm-dsp.0",
  7547. .dynamic = 1,
  7548. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  7549. .dpcm_playback = 1,
  7550. .dpcm_capture = 1,
  7551. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  7552. SND_SOC_DPCM_TRIGGER_POST},
  7553. .codec_dai_name = "snd-soc-dummy-dai",
  7554. .codec_name = "snd-soc-dummy",
  7555. .ignore_suspend = 1,
  7556. /* this dainlink has playback support */
  7557. .ignore_pmdown_time = 1,
  7558. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  7559. },
  7560. };
  7561. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  7562. /* Backend DAI Links */
  7563. {
  7564. .name = LPASS_BE_SLIMBUS_0_RX,
  7565. .stream_name = "Slimbus Playback",
  7566. .cpu_dai_name = "msm-dai-q6-dev.16384",
  7567. .platform_name = "msm-pcm-routing",
  7568. .codec_name = "msm-stub-codec.1",
  7569. .codec_dai_name = "msm-stub-rx",
  7570. .no_pcm = 1,
  7571. .dpcm_playback = 1,
  7572. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  7573. .init = &msm_audrx_stub_init,
  7574. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7575. .ignore_pmdown_time = 1, /* dai link has playback support */
  7576. .ignore_suspend = 1,
  7577. .ops = &msm_stub_be_ops,
  7578. },
  7579. {
  7580. .name = LPASS_BE_SLIMBUS_0_TX,
  7581. .stream_name = "Slimbus Capture",
  7582. .cpu_dai_name = "msm-dai-q6-dev.16385",
  7583. .platform_name = "msm-pcm-routing",
  7584. .codec_name = "msm-stub-codec.1",
  7585. .codec_dai_name = "msm-stub-tx",
  7586. .no_pcm = 1,
  7587. .dpcm_capture = 1,
  7588. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  7589. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7590. .ignore_suspend = 1,
  7591. .ops = &msm_stub_be_ops,
  7592. },
  7593. };
  7594. static struct snd_soc_dai_link msm_stub_dai_links[
  7595. ARRAY_SIZE(msm_stub_fe_dai_links) +
  7596. ARRAY_SIZE(msm_stub_be_dai_links)];
  7597. struct snd_soc_card snd_soc_card_stub_msm = {
  7598. .name = "sm6150-stub-snd-card",
  7599. };
  7600. static const struct of_device_id sm6150_asoc_machine_of_match[] = {
  7601. { .compatible = "qcom,sm6150-asoc-snd",
  7602. .data = "codec"},
  7603. { .compatible = "qcom,sm6150-asoc-snd-stub",
  7604. .data = "stub_codec"},
  7605. {},
  7606. };
  7607. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  7608. {
  7609. struct snd_soc_card *card = NULL;
  7610. struct snd_soc_dai_link *dailink;
  7611. int total_links = 0, rc = 0;
  7612. u32 tavil_codec = 0, auxpcm_audio_intf = 0;
  7613. u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
  7614. u32 wcn_btfm_intf = 0;
  7615. const struct of_device_id *match;
  7616. u32 tasha_codec = 0;
  7617. match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
  7618. if (!match) {
  7619. dev_err(dev, "%s: No DT match found for sound card\n",
  7620. __func__);
  7621. return NULL;
  7622. }
  7623. if (!strcmp(match->data, "codec")) {
  7624. card = &snd_soc_card_sm6150_msm;
  7625. memcpy(msm_sm6150_dai_links + total_links,
  7626. msm_common_dai_links,
  7627. sizeof(msm_common_dai_links));
  7628. total_links += ARRAY_SIZE(msm_common_dai_links);
  7629. memcpy(msm_sm6150_dai_links + total_links,
  7630. msm_common_misc_fe_dai_links,
  7631. sizeof(msm_common_misc_fe_dai_links));
  7632. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  7633. rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
  7634. &tavil_codec);
  7635. if (rc)
  7636. dev_dbg(dev, "%s: No DT match for tavil codec\n",
  7637. __func__);
  7638. rc = of_property_read_u32(dev->of_node, "qcom,tasha_codec",
  7639. &tasha_codec);
  7640. if (rc)
  7641. dev_dbg(dev, "%s: No DT match for tasha codec\n",
  7642. __func__);
  7643. if (tavil_codec) {
  7644. card->late_probe =
  7645. msm_snd_card_tavil_late_probe;
  7646. memcpy(msm_sm6150_dai_links + total_links,
  7647. msm_tavil_fe_dai_links,
  7648. sizeof(msm_tavil_fe_dai_links));
  7649. total_links +=
  7650. ARRAY_SIZE(msm_tavil_fe_dai_links);
  7651. } else if (tasha_codec) {
  7652. card->late_probe =
  7653. msm_snd_card_tasha_late_probe;
  7654. memcpy(msm_sm6150_dai_links + total_links,
  7655. msm_tasha_fe_dai_links,
  7656. sizeof(msm_tasha_fe_dai_links));
  7657. total_links +=
  7658. ARRAY_SIZE(msm_tasha_fe_dai_links);
  7659. } else {
  7660. memcpy(msm_sm6150_dai_links + total_links,
  7661. msm_bolero_fe_dai_links,
  7662. sizeof(msm_bolero_fe_dai_links));
  7663. total_links +=
  7664. ARRAY_SIZE(msm_bolero_fe_dai_links);
  7665. }
  7666. memcpy(msm_sm6150_dai_links + total_links,
  7667. msm_int_compress_capture_dai,
  7668. sizeof(msm_int_compress_capture_dai));
  7669. total_links += ARRAY_SIZE(msm_int_compress_capture_dai);
  7670. memcpy(msm_sm6150_dai_links + total_links,
  7671. msm_common_be_dai_links,
  7672. sizeof(msm_common_be_dai_links));
  7673. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  7674. if (tavil_codec) {
  7675. memcpy(msm_sm6150_dai_links + total_links,
  7676. msm_tavil_be_dai_links,
  7677. sizeof(msm_tavil_be_dai_links));
  7678. total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
  7679. } else if (tasha_codec) {
  7680. memcpy(msm_sm6150_dai_links + total_links,
  7681. msm_tasha_be_dai_links,
  7682. sizeof(msm_tasha_be_dai_links));
  7683. total_links += ARRAY_SIZE(msm_tasha_be_dai_links);
  7684. } else {
  7685. memcpy(msm_sm6150_dai_links + total_links,
  7686. msm_wsa_cdc_dma_be_dai_links,
  7687. sizeof(msm_wsa_cdc_dma_be_dai_links));
  7688. total_links +=
  7689. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  7690. memcpy(msm_sm6150_dai_links + total_links,
  7691. msm_rx_tx_cdc_dma_be_dai_links,
  7692. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  7693. total_links +=
  7694. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  7695. }
  7696. rc = of_property_read_u32(dev->of_node,
  7697. "qcom,ext-disp-audio-rx",
  7698. &ext_disp_audio_intf);
  7699. if (rc) {
  7700. dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
  7701. __func__);
  7702. } else {
  7703. if (ext_disp_audio_intf) {
  7704. memcpy(msm_sm6150_dai_links + total_links,
  7705. ext_disp_be_dai_link,
  7706. sizeof(ext_disp_be_dai_link));
  7707. total_links +=
  7708. ARRAY_SIZE(ext_disp_be_dai_link);
  7709. }
  7710. }
  7711. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  7712. &mi2s_audio_intf);
  7713. if (rc) {
  7714. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  7715. __func__);
  7716. } else {
  7717. if (mi2s_audio_intf) {
  7718. memcpy(msm_sm6150_dai_links + total_links,
  7719. msm_mi2s_be_dai_links,
  7720. sizeof(msm_mi2s_be_dai_links));
  7721. total_links +=
  7722. ARRAY_SIZE(msm_mi2s_be_dai_links);
  7723. }
  7724. }
  7725. rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
  7726. &wcn_btfm_intf);
  7727. if (rc) {
  7728. dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
  7729. __func__);
  7730. } else {
  7731. if (wcn_btfm_intf) {
  7732. memcpy(msm_sm6150_dai_links + total_links,
  7733. msm_wcn_be_dai_links,
  7734. sizeof(msm_wcn_be_dai_links));
  7735. total_links +=
  7736. ARRAY_SIZE(msm_wcn_be_dai_links);
  7737. }
  7738. }
  7739. rc = of_property_read_u32(dev->of_node,
  7740. "qcom,auxpcm-audio-intf",
  7741. &auxpcm_audio_intf);
  7742. if (rc) {
  7743. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  7744. __func__);
  7745. } else {
  7746. if (auxpcm_audio_intf) {
  7747. memcpy(msm_sm6150_dai_links + total_links,
  7748. msm_auxpcm_be_dai_links,
  7749. sizeof(msm_auxpcm_be_dai_links));
  7750. total_links +=
  7751. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  7752. }
  7753. }
  7754. dailink = msm_sm6150_dai_links;
  7755. } else if (!strcmp(match->data, "stub_codec")) {
  7756. card = &snd_soc_card_stub_msm;
  7757. memcpy(msm_stub_dai_links + total_links,
  7758. msm_stub_fe_dai_links,
  7759. sizeof(msm_stub_fe_dai_links));
  7760. total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
  7761. memcpy(msm_stub_dai_links + total_links,
  7762. msm_stub_be_dai_links,
  7763. sizeof(msm_stub_be_dai_links));
  7764. total_links += ARRAY_SIZE(msm_stub_be_dai_links);
  7765. dailink = msm_stub_dai_links;
  7766. }
  7767. if (card) {
  7768. card->dai_link = dailink;
  7769. card->num_links = total_links;
  7770. }
  7771. return card;
  7772. }
  7773. static int msm_wsa881x_init(struct snd_soc_component *component)
  7774. {
  7775. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7776. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7777. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  7778. SPKR_L_BOOST, SPKR_L_VI};
  7779. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  7780. SPKR_R_BOOST, SPKR_R_VI};
  7781. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  7782. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  7783. struct msm_asoc_mach_data *pdata;
  7784. struct snd_soc_dapm_context *dapm;
  7785. struct snd_card *card = component->card->snd_card;
  7786. struct snd_info_entry *entry;
  7787. int ret = 0;
  7788. if (!component) {
  7789. pr_err("%s codec is NULL\n", __func__);
  7790. return -EINVAL;
  7791. }
  7792. dapm = snd_soc_component_get_dapm(component);
  7793. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  7794. dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
  7795. __func__, component->name);
  7796. wsa881x_set_channel_map(component, &spkleft_ports[0],
  7797. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7798. &ch_rate[0], &spkleft_port_types[0]);
  7799. if (dapm->component) {
  7800. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  7801. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  7802. }
  7803. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  7804. dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
  7805. __func__, component->name);
  7806. wsa881x_set_channel_map(component, &spkright_ports[0],
  7807. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7808. &ch_rate[0], &spkright_port_types[0]);
  7809. if (dapm->component) {
  7810. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  7811. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  7812. }
  7813. } else {
  7814. dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
  7815. component->name);
  7816. ret = -EINVAL;
  7817. goto err;
  7818. }
  7819. pdata = snd_soc_card_get_drvdata(component->card);
  7820. if (!pdata->codec_root) {
  7821. entry = snd_info_create_subdir(card->module, "codecs",
  7822. card->proc_root);
  7823. if (!entry) {
  7824. pr_err("%s: Cannot create codecs module entry\n",
  7825. __func__);
  7826. ret = 0;
  7827. goto err;
  7828. }
  7829. pdata->codec_root = entry;
  7830. }
  7831. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  7832. component);
  7833. err:
  7834. return ret;
  7835. }
  7836. static int msm_aux_codec_init(struct snd_soc_component *component)
  7837. {
  7838. struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
  7839. int ret = 0;
  7840. void *mbhc_calibration;
  7841. struct snd_info_entry *entry;
  7842. struct snd_card *card = component->card->snd_card;
  7843. struct msm_asoc_mach_data *pdata;
  7844. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  7845. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  7846. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  7847. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  7848. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  7849. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  7850. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  7851. snd_soc_dapm_sync(dapm);
  7852. pdata = snd_soc_card_get_drvdata(component->card);
  7853. if (!pdata->codec_root) {
  7854. entry = snd_info_create_subdir(card->module, "codecs",
  7855. card->proc_root);
  7856. if (!entry) {
  7857. pr_err("%s: Cannot create codecs module entry\n",
  7858. __func__);
  7859. ret = 0;
  7860. goto codec_root_err;
  7861. }
  7862. pdata->codec_root = entry;
  7863. }
  7864. wcd937x_info_create_codec_entry(pdata->codec_root, component);
  7865. codec_root_err:
  7866. mbhc_calibration = def_wcd_mbhc_cal();
  7867. if (!mbhc_calibration) {
  7868. return -ENOMEM;
  7869. }
  7870. wcd_mbhc_cfg.calibration = mbhc_calibration;
  7871. ret = wcd937x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
  7872. return ret;
  7873. }
  7874. static int msm_init_aux_dev(struct platform_device *pdev,
  7875. struct snd_soc_card *card)
  7876. {
  7877. struct device_node *wsa_of_node;
  7878. struct device_node *aux_codec_of_node;
  7879. u32 wsa_max_devs;
  7880. u32 wsa_dev_cnt;
  7881. u32 codec_max_aux_devs = 0;
  7882. u32 codec_aux_dev_cnt = 0;
  7883. int i;
  7884. struct msm_wsa881x_dev_info *wsa881x_dev_info = NULL;
  7885. struct aux_codec_dev_info *aux_cdc_dev_info = NULL;
  7886. const char *auxdev_name_prefix[1];
  7887. char *dev_name_str = NULL;
  7888. int found = 0;
  7889. int codecs_found = 0;
  7890. int ret = 0;
  7891. /* Get maximum WSA device count for this platform */
  7892. ret = of_property_read_u32(pdev->dev.of_node,
  7893. "qcom,wsa-max-devs", &wsa_max_devs);
  7894. if (ret) {
  7895. dev_err(&pdev->dev,
  7896. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  7897. __func__, pdev->dev.of_node->full_name, ret);
  7898. wsa_max_devs = 0;
  7899. goto codec_aux_dev;
  7900. }
  7901. if (wsa_max_devs == 0) {
  7902. dev_dbg(&pdev->dev,
  7903. "%s: Max WSA devices is 0 for this target?\n",
  7904. __func__);
  7905. goto codec_aux_dev;
  7906. }
  7907. /* Get count of WSA device phandles for this platform */
  7908. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  7909. "qcom,wsa-devs", NULL);
  7910. if (wsa_dev_cnt == -ENOENT) {
  7911. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  7912. __func__);
  7913. goto err;
  7914. } else if (wsa_dev_cnt <= 0) {
  7915. dev_err(&pdev->dev,
  7916. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  7917. __func__, wsa_dev_cnt);
  7918. ret = -EINVAL;
  7919. goto err;
  7920. }
  7921. /*
  7922. * Expect total phandles count to be NOT less than maximum possible
  7923. * WSA count. However, if it is less, then assign same value to
  7924. * max count as well.
  7925. */
  7926. if (wsa_dev_cnt < wsa_max_devs) {
  7927. dev_dbg(&pdev->dev,
  7928. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  7929. __func__, wsa_max_devs, wsa_dev_cnt);
  7930. wsa_max_devs = wsa_dev_cnt;
  7931. }
  7932. /* Make sure prefix string passed for each WSA device */
  7933. ret = of_property_count_strings(pdev->dev.of_node,
  7934. "qcom,wsa-aux-dev-prefix");
  7935. if (ret != wsa_dev_cnt) {
  7936. dev_err(&pdev->dev,
  7937. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  7938. __func__, wsa_dev_cnt, ret);
  7939. ret = -EINVAL;
  7940. goto err;
  7941. }
  7942. /*
  7943. * Alloc mem to store phandle and index info of WSA device, if already
  7944. * registered with ALSA core
  7945. */
  7946. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  7947. sizeof(struct msm_wsa881x_dev_info),
  7948. GFP_KERNEL);
  7949. if (!wsa881x_dev_info) {
  7950. ret = -ENOMEM;
  7951. goto err;
  7952. }
  7953. /*
  7954. * search and check whether all WSA devices are already
  7955. * registered with ALSA core or not. If found a node, store
  7956. * the node and the index in a local array of struct for later
  7957. * use.
  7958. */
  7959. for (i = 0; i < wsa_dev_cnt; i++) {
  7960. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  7961. "qcom,wsa-devs", i);
  7962. if (unlikely(!wsa_of_node)) {
  7963. /* we should not be here */
  7964. dev_err(&pdev->dev,
  7965. "%s: wsa dev node is not present\n",
  7966. __func__);
  7967. ret = -EINVAL;
  7968. goto err;
  7969. }
  7970. if (soc_find_component_locked(wsa_of_node, NULL)) {
  7971. /* WSA device registered with ALSA core */
  7972. wsa881x_dev_info[found].of_node = wsa_of_node;
  7973. wsa881x_dev_info[found].index = i;
  7974. found++;
  7975. if (found == wsa_max_devs)
  7976. break;
  7977. }
  7978. }
  7979. if (found < wsa_max_devs) {
  7980. dev_dbg(&pdev->dev,
  7981. "%s: failed to find %d components. Found only %d\n",
  7982. __func__, wsa_max_devs, found);
  7983. return -EPROBE_DEFER;
  7984. }
  7985. dev_info(&pdev->dev,
  7986. "%s: found %d wsa881x devices registered with ALSA core\n",
  7987. __func__, found);
  7988. codec_aux_dev:
  7989. if (!strnstr(card->name, "tavil", strlen(card->name)) &&
  7990. !strnstr(card->name, "tasha", strlen(card->name))) {
  7991. /* Get maximum aux codec device count for this platform */
  7992. ret = of_property_read_u32(pdev->dev.of_node,
  7993. "qcom,codec-max-aux-devs",
  7994. &codec_max_aux_devs);
  7995. if (ret) {
  7996. dev_err(&pdev->dev,
  7997. "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
  7998. __func__, pdev->dev.of_node->full_name, ret);
  7999. codec_max_aux_devs = 0;
  8000. goto aux_dev_register;
  8001. }
  8002. if (codec_max_aux_devs == 0) {
  8003. dev_dbg(&pdev->dev,
  8004. "%s: Max aux codec devices is 0 for this target?\n",
  8005. __func__);
  8006. goto aux_dev_register;
  8007. }
  8008. /* Get count of aux codec device phandles for this platform */
  8009. codec_aux_dev_cnt = of_count_phandle_with_args(
  8010. pdev->dev.of_node,
  8011. "qcom,codec-aux-devs", NULL);
  8012. if (codec_aux_dev_cnt == -ENOENT) {
  8013. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  8014. __func__);
  8015. goto err;
  8016. } else if (codec_aux_dev_cnt <= 0) {
  8017. dev_err(&pdev->dev,
  8018. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  8019. __func__, codec_aux_dev_cnt);
  8020. ret = -EINVAL;
  8021. goto err;
  8022. }
  8023. /*
  8024. * Expect total phandles count to be NOT less than maximum possible
  8025. * AUX device count. However, if it is less, then assign same value to
  8026. * max count as well.
  8027. */
  8028. if (codec_aux_dev_cnt < codec_max_aux_devs) {
  8029. dev_dbg(&pdev->dev,
  8030. "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
  8031. __func__, codec_max_aux_devs,
  8032. codec_aux_dev_cnt);
  8033. codec_max_aux_devs = codec_aux_dev_cnt;
  8034. }
  8035. /*
  8036. * Alloc mem to store phandle and index info of aux codec
  8037. * if already registered with ALSA core
  8038. */
  8039. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_max_aux_devs,
  8040. sizeof(struct aux_codec_dev_info),
  8041. GFP_KERNEL);
  8042. if (!aux_cdc_dev_info) {
  8043. ret = -ENOMEM;
  8044. goto err;
  8045. }
  8046. /*
  8047. * search and check whether all aux codecs are already
  8048. * registered with ALSA core or not. If found a node, store
  8049. * the node and the index in a local array of struct for later
  8050. * use.
  8051. */
  8052. for (i = 0; i < codec_aux_dev_cnt; i++) {
  8053. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  8054. "qcom,codec-aux-devs", i);
  8055. if (unlikely(!aux_codec_of_node)) {
  8056. /* we should not be here */
  8057. dev_err(&pdev->dev,
  8058. "%s: aux codec dev node is not present\n",
  8059. __func__);
  8060. ret = -EINVAL;
  8061. goto err;
  8062. }
  8063. if (soc_find_component_locked(aux_codec_of_node, NULL)) {
  8064. /* AUX codec registered with ALSA core */
  8065. aux_cdc_dev_info[codecs_found].of_node =
  8066. aux_codec_of_node;
  8067. aux_cdc_dev_info[codecs_found].index = i;
  8068. codecs_found++;
  8069. }
  8070. }
  8071. if (codecs_found < codec_max_aux_devs) {
  8072. dev_dbg(&pdev->dev,
  8073. "%s: failed to find %d components. Found only %d\n",
  8074. __func__, codec_max_aux_devs, codecs_found);
  8075. return -EPROBE_DEFER;
  8076. }
  8077. dev_info(&pdev->dev,
  8078. "%s: found %d AUX codecs registered with ALSA core\n",
  8079. __func__, codecs_found);
  8080. }
  8081. aux_dev_register:
  8082. card->num_aux_devs = wsa_max_devs + codec_max_aux_devs;
  8083. card->num_configs = wsa_max_devs + codec_max_aux_devs;
  8084. /* Alloc array of AUX devs struct */
  8085. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  8086. sizeof(struct snd_soc_aux_dev),
  8087. GFP_KERNEL);
  8088. if (!msm_aux_dev) {
  8089. ret = -ENOMEM;
  8090. goto err;
  8091. }
  8092. /* Alloc array of codec conf struct */
  8093. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  8094. sizeof(struct snd_soc_codec_conf),
  8095. GFP_KERNEL);
  8096. if (!msm_codec_conf) {
  8097. ret = -ENOMEM;
  8098. goto err;
  8099. }
  8100. for (i = 0; i < wsa_max_devs; i++) {
  8101. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  8102. GFP_KERNEL);
  8103. if (!dev_name_str) {
  8104. ret = -ENOMEM;
  8105. goto err;
  8106. }
  8107. ret = of_property_read_string_index(pdev->dev.of_node,
  8108. "qcom,wsa-aux-dev-prefix",
  8109. wsa881x_dev_info[i].index,
  8110. auxdev_name_prefix);
  8111. if (ret) {
  8112. dev_err(&pdev->dev,
  8113. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  8114. __func__, ret);
  8115. ret = -EINVAL;
  8116. goto err;
  8117. }
  8118. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  8119. msm_aux_dev[i].name = dev_name_str;
  8120. msm_aux_dev[i].codec_name = NULL;
  8121. msm_aux_dev[i].codec_of_node =
  8122. wsa881x_dev_info[i].of_node;
  8123. msm_aux_dev[i].init = msm_wsa881x_init;
  8124. msm_codec_conf[i].dev_name = NULL;
  8125. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  8126. msm_codec_conf[i].of_node =
  8127. wsa881x_dev_info[i].of_node;
  8128. }
  8129. for (i = 0; i < codec_aux_dev_cnt; i++) {
  8130. msm_aux_dev[wsa_max_devs + i].name = "aux_codec";
  8131. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  8132. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  8133. aux_cdc_dev_info[i].of_node;
  8134. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  8135. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  8136. msm_codec_conf[wsa_max_devs + i].name_prefix =
  8137. NULL;
  8138. msm_codec_conf[wsa_max_devs + i].of_node =
  8139. aux_cdc_dev_info[i].of_node;
  8140. }
  8141. card->codec_conf = msm_codec_conf;
  8142. card->aux_dev = msm_aux_dev;
  8143. err:
  8144. return ret;
  8145. }
  8146. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  8147. {
  8148. int count;
  8149. u32 mi2s_master_slave[MI2S_MAX];
  8150. u32 mi2s_ext_mclk[MI2S_MAX];
  8151. int ret;
  8152. for (count = 0; count < MI2S_MAX; count++) {
  8153. mutex_init(&mi2s_intf_conf[count].lock);
  8154. mi2s_intf_conf[count].ref_cnt = 0;
  8155. }
  8156. ret = of_property_read_u32_array(pdev->dev.of_node,
  8157. "qcom,msm-mi2s-master",
  8158. mi2s_master_slave, MI2S_MAX);
  8159. if (ret) {
  8160. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  8161. __func__);
  8162. } else {
  8163. for (count = 0; count < MI2S_MAX; count++) {
  8164. mi2s_intf_conf[count].msm_is_mi2s_master =
  8165. mi2s_master_slave[count];
  8166. }
  8167. }
  8168. ret = of_property_read_u32_array(pdev->dev.of_node,
  8169. "qcom,msm-mi2s-ext-mclk",
  8170. mi2s_ext_mclk, MI2S_MAX);
  8171. if (ret) {
  8172. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-ext-mclk in DT node\n",
  8173. __func__);
  8174. } else {
  8175. for (count = 0; count < MI2S_MAX; count++)
  8176. mi2s_intf_conf[count].msm_is_ext_mclk =
  8177. mi2s_ext_mclk[count];
  8178. }
  8179. }
  8180. static void msm_i2s_auxpcm_deinit(void)
  8181. {
  8182. int count;
  8183. for (count = 0; count < MI2S_MAX; count++) {
  8184. mutex_destroy(&mi2s_intf_conf[count].lock);
  8185. mi2s_intf_conf[count].ref_cnt = 0;
  8186. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  8187. mi2s_intf_conf[count].msm_is_ext_mclk = 0;
  8188. }
  8189. }
  8190. static int sm6150_ssr_enable(struct device *dev, void *data)
  8191. {
  8192. struct platform_device *pdev = to_platform_device(dev);
  8193. struct snd_soc_card *card = platform_get_drvdata(pdev);
  8194. struct msm_asoc_mach_data *pdata = NULL;
  8195. struct snd_soc_component *component = NULL;
  8196. int ret = 0;
  8197. if (!card) {
  8198. dev_err(dev, "%s: card is NULL\n", __func__);
  8199. ret = -EINVAL;
  8200. goto err;
  8201. }
  8202. if (strnstr(card->name, "tavil", strlen(card->name)) ||
  8203. strnstr(card->name, "tasha", strlen(card->name))) {
  8204. pdata = snd_soc_card_get_drvdata(card);
  8205. if (!pdata->is_afe_config_done) {
  8206. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  8207. struct snd_soc_pcm_runtime *rtd;
  8208. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  8209. if (!rtd) {
  8210. dev_err(dev,
  8211. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  8212. __func__, be_dl_name);
  8213. ret = -EINVAL;
  8214. goto err;
  8215. }
  8216. component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
  8217. if (!component) {
  8218. dev_err(dev, "%s: component is NULL\n",
  8219. __func__);
  8220. ret = -EINVAL;
  8221. goto err;
  8222. }
  8223. ret = msm_afe_set_config(component);
  8224. if (ret)
  8225. dev_err(dev, "%s: Failed to set AFE config. err %d\n",
  8226. __func__, ret);
  8227. else
  8228. pdata->is_afe_config_done = true;
  8229. }
  8230. }
  8231. snd_soc_card_change_online_state(card, 1);
  8232. dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
  8233. err:
  8234. return ret;
  8235. }
  8236. static void sm6150_ssr_disable(struct device *dev, void *data)
  8237. {
  8238. struct platform_device *pdev = to_platform_device(dev);
  8239. struct snd_soc_card *card = platform_get_drvdata(pdev);
  8240. struct msm_asoc_mach_data *pdata;
  8241. if (!card) {
  8242. dev_err(dev, "%s: card is NULL\n", __func__);
  8243. return;
  8244. }
  8245. dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
  8246. snd_soc_card_change_online_state(card, 0);
  8247. if (strnstr(card->name, "tavil", strlen(card->name)) ||
  8248. strnstr(card->name, "tasha", strlen(card->name))) {
  8249. pdata = snd_soc_card_get_drvdata(card);
  8250. msm_afe_clear_config();
  8251. pdata->is_afe_config_done = false;
  8252. }
  8253. }
  8254. static int msm_ext_prepare_hifi(struct msm_asoc_mach_data *pdata)
  8255. {
  8256. int ret = 0;
  8257. if (gpio_is_valid(pdata->hph_en1_gpio)) {
  8258. pr_debug("%s: hph_en1_gpio request %d\n", __func__,
  8259. pdata->hph_en1_gpio);
  8260. ret = gpio_request(pdata->hph_en1_gpio, "hph_en1_gpio");
  8261. if (ret) {
  8262. pr_err("%s: hph_en1_gpio request failed, ret:%d\n",
  8263. __func__, ret);
  8264. goto err;
  8265. }
  8266. }
  8267. if (gpio_is_valid(pdata->hph_en0_gpio)) {
  8268. pr_debug("%s: hph_en0_gpio request %d\n", __func__,
  8269. pdata->hph_en0_gpio);
  8270. ret = gpio_request(pdata->hph_en0_gpio, "hph_en0_gpio");
  8271. if (ret)
  8272. pr_err("%s: hph_en0_gpio request failed, ret:%d\n",
  8273. __func__, ret);
  8274. }
  8275. err:
  8276. return ret;
  8277. }
  8278. static const struct snd_event_ops sm6150_ssr_ops = {
  8279. .enable = sm6150_ssr_enable,
  8280. .disable = sm6150_ssr_disable,
  8281. };
  8282. static int msm_audio_ssr_compare(struct device *dev, void *data)
  8283. {
  8284. struct device_node *node = data;
  8285. dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
  8286. __func__, dev->of_node, node);
  8287. return (dev->of_node && dev->of_node == node);
  8288. }
  8289. static int msm_audio_ssr_register(struct device *dev)
  8290. {
  8291. struct device_node *np = dev->of_node;
  8292. struct snd_event_clients *ssr_clients = NULL;
  8293. struct device_node *node;
  8294. int ret;
  8295. int i;
  8296. for (i = 0; ; i++) {
  8297. node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
  8298. if (!node)
  8299. break;
  8300. snd_event_mstr_add_client(&ssr_clients,
  8301. msm_audio_ssr_compare, node);
  8302. }
  8303. ret = snd_event_master_register(dev, &sm6150_ssr_ops,
  8304. ssr_clients, NULL);
  8305. if (!ret)
  8306. snd_event_notify(dev, SND_EVENT_UP);
  8307. return ret;
  8308. }
  8309. static int msm_asoc_machine_probe(struct platform_device *pdev)
  8310. {
  8311. struct snd_soc_card *card;
  8312. struct msm_asoc_mach_data *pdata;
  8313. const char *mbhc_audio_jack_type = NULL;
  8314. int ret;
  8315. if (!pdev->dev.of_node) {
  8316. dev_err(&pdev->dev, "No platform supplied from device tree\n");
  8317. return -EINVAL;
  8318. }
  8319. pdata = devm_kzalloc(&pdev->dev,
  8320. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  8321. if (!pdata)
  8322. return -ENOMEM;
  8323. card = populate_snd_card_dailinks(&pdev->dev);
  8324. if (!card) {
  8325. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  8326. ret = -EINVAL;
  8327. goto err;
  8328. }
  8329. card->dev = &pdev->dev;
  8330. platform_set_drvdata(pdev, card);
  8331. snd_soc_card_set_drvdata(card, pdata);
  8332. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  8333. if (ret) {
  8334. dev_err(&pdev->dev, "parse card name failed, err:%d\n",
  8335. ret);
  8336. goto err;
  8337. }
  8338. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  8339. if (ret) {
  8340. dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
  8341. ret);
  8342. goto err;
  8343. }
  8344. ret = msm_populate_dai_link_component_of_node(card);
  8345. if (ret) {
  8346. ret = -EPROBE_DEFER;
  8347. goto err;
  8348. }
  8349. ret = msm_init_aux_dev(pdev, card);
  8350. if (ret)
  8351. goto err;
  8352. ret = devm_snd_soc_register_card(&pdev->dev, card);
  8353. if (ret == -EPROBE_DEFER) {
  8354. if (codec_reg_done)
  8355. ret = -EINVAL;
  8356. goto err;
  8357. } else if (ret) {
  8358. dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
  8359. ret);
  8360. goto err;
  8361. }
  8362. dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
  8363. pdata->hph_en1_gpio = of_get_named_gpio(pdev->dev.of_node,
  8364. "qcom,hph-en1-gpio", 0);
  8365. if (!gpio_is_valid(pdata->hph_en1_gpio))
  8366. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  8367. "qcom,hph-en1-gpio", 0);
  8368. if (!gpio_is_valid(pdata->hph_en1_gpio) && (!pdata->hph_en1_gpio_p)) {
  8369. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  8370. "qcom,hph-en1-gpio", pdev->dev.of_node->full_name);
  8371. }
  8372. pdata->hph_en0_gpio = of_get_named_gpio(pdev->dev.of_node,
  8373. "qcom,hph-en0-gpio", 0);
  8374. if (!gpio_is_valid(pdata->hph_en0_gpio))
  8375. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  8376. "qcom,hph-en0-gpio", 0);
  8377. if (!gpio_is_valid(pdata->hph_en0_gpio) && (!pdata->hph_en0_gpio_p)) {
  8378. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  8379. "qcom,hph-en0-gpio", pdev->dev.of_node->full_name);
  8380. }
  8381. ret = msm_ext_prepare_hifi(pdata);
  8382. if (ret) {
  8383. dev_dbg(&pdev->dev, "msm_ext_prepare_hifi failed (%d)\n",
  8384. ret);
  8385. ret = 0;
  8386. }
  8387. ret = of_property_read_string(pdev->dev.of_node,
  8388. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  8389. if (ret) {
  8390. dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
  8391. "qcom,mbhc-audio-jack-type",
  8392. pdev->dev.of_node->full_name);
  8393. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  8394. ret = 0;
  8395. } else {
  8396. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  8397. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  8398. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  8399. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  8400. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  8401. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  8402. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  8403. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  8404. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  8405. } else {
  8406. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  8407. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  8408. }
  8409. }
  8410. pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
  8411. "qcom,pri-mi2s-gpios", 0);
  8412. pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
  8413. "qcom,sec-mi2s-gpios", 0);
  8414. pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
  8415. "qcom,tert-mi2s-gpios", 0);
  8416. pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
  8417. "qcom,quat-mi2s-gpios", 0);
  8418. pdata->mi2s_gpio_p[QUIN_MI2S] = of_parse_phandle(pdev->dev.of_node,
  8419. "qcom,quin-mi2s-gpios", 0);
  8420. /*
  8421. * Parse US-Euro gpio info from DT. Report no error if us-euro
  8422. * entry is not found in DT file as some targets do not support
  8423. * US-Euro detection
  8424. */
  8425. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  8426. "qcom,us-euro-gpios", 0);
  8427. if (!pdata->us_euro_gpio_p) {
  8428. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  8429. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  8430. } else {
  8431. dev_dbg(&pdev->dev, "%s detected\n",
  8432. "qcom,us-euro-gpios");
  8433. wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  8434. }
  8435. if (wcd_mbhc_cfg.enable_usbc_analog) {
  8436. wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
  8437. pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
  8438. "fsa4480-i2c-handle", 0);
  8439. if (!pdata->fsa_handle)
  8440. dev_err(&pdev->dev,
  8441. "property %s not detected in node %s\n",
  8442. "fsa4480-i2c-handle",
  8443. pdev->dev.of_node->full_name);
  8444. }
  8445. msm_i2s_auxpcm_init(pdev);
  8446. if (!strnstr(card->name, "tavil", strlen(card->name)) &&
  8447. !strnstr(card->name, "tasha", strlen(card->name))) {
  8448. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  8449. "qcom,cdc-dmic01-gpios",
  8450. 0);
  8451. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  8452. "qcom,cdc-dmic23-gpios",
  8453. 0);
  8454. }
  8455. ret = msm_audio_ssr_register(&pdev->dev);
  8456. if (ret)
  8457. pr_err("%s: Registration with SND event FWK failed ret = %d\n",
  8458. __func__, ret);
  8459. err:
  8460. return ret;
  8461. }
  8462. static int msm_asoc_machine_remove(struct platform_device *pdev)
  8463. {
  8464. snd_event_master_deregister(&pdev->dev);
  8465. msm_i2s_auxpcm_deinit();
  8466. return 0;
  8467. }
  8468. static struct platform_driver sm6150_asoc_machine_driver = {
  8469. .driver = {
  8470. .name = DRV_NAME,
  8471. .owner = THIS_MODULE,
  8472. .pm = &snd_soc_pm_ops,
  8473. .of_match_table = sm6150_asoc_machine_of_match,
  8474. },
  8475. .probe = msm_asoc_machine_probe,
  8476. .remove = msm_asoc_machine_remove,
  8477. };
  8478. module_platform_driver(sm6150_asoc_machine_driver);
  8479. MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
  8480. MODULE_LICENSE("GPL v2");
  8481. MODULE_ALIAS("platform:" DRV_NAME);
  8482. MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);