main.c 88 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved. */
  3. #include <linux/delay.h>
  4. #include <linux/jiffies.h>
  5. #include <linux/module.h>
  6. #include <linux/of.h>
  7. #include <linux/of_device.h>
  8. #include <linux/pm_wakeup.h>
  9. #include <linux/reboot.h>
  10. #include <linux/rwsem.h>
  11. #include <linux/suspend.h>
  12. #include <linux/timer.h>
  13. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  14. #include <soc/qcom/minidump.h>
  15. #endif
  16. #include "cnss_plat_ipc_qmi.h"
  17. #include "main.h"
  18. #include "bus.h"
  19. #include "debug.h"
  20. #include "genl.h"
  21. #define CNSS_DUMP_FORMAT_VER 0x11
  22. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  23. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  24. #define CNSS_DUMP_NAME "CNSS_WLAN"
  25. #define CNSS_DUMP_DESC_SIZE 0x1000
  26. #define CNSS_DUMP_SEG_VER 0x1
  27. #define RECOVERY_DELAY_MS 100
  28. #define FILE_SYSTEM_READY 1
  29. #define FW_READY_TIMEOUT 20000
  30. #define FW_ASSERT_TIMEOUT 5000
  31. #define CNSS_EVENT_PENDING 2989
  32. #define COLD_BOOT_CAL_SHUTDOWN_DELAY_MS 50
  33. #define CNSS_QUIRKS_DEFAULT 0
  34. #ifdef CONFIG_CNSS_EMULATION
  35. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  36. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  37. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  38. #else
  39. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  40. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  41. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  42. #endif
  43. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  44. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  45. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  46. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  47. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  48. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  49. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  50. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  51. enum cnss_cal_db_op {
  52. CNSS_CAL_DB_UPLOAD,
  53. CNSS_CAL_DB_DOWNLOAD,
  54. CNSS_CAL_DB_INVALID_OP,
  55. };
  56. static struct cnss_plat_data *plat_env;
  57. static DECLARE_RWSEM(cnss_pm_sem);
  58. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  59. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  60. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  61. };
  62. static struct cnss_fw_files FW_FILES_DEFAULT = {
  63. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  64. "utfbd.bin", "epping.bin", "evicted.bin"
  65. };
  66. struct cnss_driver_event {
  67. struct list_head list;
  68. enum cnss_driver_event_type type;
  69. bool sync;
  70. struct completion complete;
  71. int ret;
  72. void *data;
  73. };
  74. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  75. struct cnss_plat_data *plat_priv)
  76. {
  77. plat_env = plat_priv;
  78. }
  79. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  80. {
  81. return plat_env;
  82. }
  83. /**
  84. * cnss_get_mem_seg_count - Get segment count of memory
  85. * @type: memory type
  86. * @seg: segment count
  87. *
  88. * Return: 0 on success, negative value on failure
  89. */
  90. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  91. {
  92. struct cnss_plat_data *plat_priv;
  93. plat_priv = cnss_get_plat_priv(NULL);
  94. if (!plat_priv)
  95. return -ENODEV;
  96. switch (type) {
  97. case CNSS_REMOTE_MEM_TYPE_FW:
  98. *seg = plat_priv->fw_mem_seg_len;
  99. break;
  100. case CNSS_REMOTE_MEM_TYPE_QDSS:
  101. *seg = plat_priv->qdss_mem_seg_len;
  102. break;
  103. default:
  104. return -EINVAL;
  105. }
  106. return 0;
  107. }
  108. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  109. /**
  110. * cnss_get_mem_segment_info - Get memory info of different type
  111. * @type: memory type
  112. * @segment: array to save the segment info
  113. * @seg: segment count
  114. *
  115. * Return: 0 on success, negative value on failure
  116. */
  117. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  118. struct cnss_mem_segment segment[],
  119. u32 segment_count)
  120. {
  121. struct cnss_plat_data *plat_priv;
  122. u32 i;
  123. plat_priv = cnss_get_plat_priv(NULL);
  124. if (!plat_priv)
  125. return -ENODEV;
  126. switch (type) {
  127. case CNSS_REMOTE_MEM_TYPE_FW:
  128. if (segment_count > plat_priv->fw_mem_seg_len)
  129. segment_count = plat_priv->fw_mem_seg_len;
  130. for (i = 0; i < segment_count; i++) {
  131. segment[i].size = plat_priv->fw_mem[i].size;
  132. segment[i].va = plat_priv->fw_mem[i].va;
  133. segment[i].pa = plat_priv->fw_mem[i].pa;
  134. }
  135. break;
  136. case CNSS_REMOTE_MEM_TYPE_QDSS:
  137. if (segment_count > plat_priv->qdss_mem_seg_len)
  138. segment_count = plat_priv->qdss_mem_seg_len;
  139. for (i = 0; i < segment_count; i++) {
  140. segment[i].size = plat_priv->qdss_mem[i].size;
  141. segment[i].va = plat_priv->qdss_mem[i].va;
  142. segment[i].pa = plat_priv->qdss_mem[i].pa;
  143. }
  144. break;
  145. default:
  146. return -EINVAL;
  147. }
  148. return 0;
  149. }
  150. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  151. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  152. enum cnss_feature_v01 feature)
  153. {
  154. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  155. return -EINVAL;
  156. plat_priv->feature_list |= 1 << feature;
  157. return 0;
  158. }
  159. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  160. u64 *feature_list)
  161. {
  162. if (unlikely(!plat_priv))
  163. return -EINVAL;
  164. *feature_list = plat_priv->feature_list;
  165. return 0;
  166. }
  167. static int cnss_pm_notify(struct notifier_block *b,
  168. unsigned long event, void *p)
  169. {
  170. switch (event) {
  171. case PM_SUSPEND_PREPARE:
  172. down_write(&cnss_pm_sem);
  173. break;
  174. case PM_POST_SUSPEND:
  175. up_write(&cnss_pm_sem);
  176. break;
  177. }
  178. return NOTIFY_DONE;
  179. }
  180. static struct notifier_block cnss_pm_notifier = {
  181. .notifier_call = cnss_pm_notify,
  182. };
  183. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  184. {
  185. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  186. return;
  187. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  188. plat_priv->driver_state,
  189. atomic_read(&plat_priv->pm_count));
  190. pm_stay_awake(&plat_priv->plat_dev->dev);
  191. }
  192. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  193. {
  194. int r = atomic_dec_return(&plat_priv->pm_count);
  195. WARN_ON(r < 0);
  196. if (r != 0)
  197. return;
  198. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  199. plat_priv->driver_state,
  200. atomic_read(&plat_priv->pm_count));
  201. pm_relax(&plat_priv->plat_dev->dev);
  202. }
  203. void cnss_lock_pm_sem(struct device *dev)
  204. {
  205. down_read(&cnss_pm_sem);
  206. }
  207. EXPORT_SYMBOL(cnss_lock_pm_sem);
  208. void cnss_release_pm_sem(struct device *dev)
  209. {
  210. up_read(&cnss_pm_sem);
  211. }
  212. EXPORT_SYMBOL(cnss_release_pm_sem);
  213. int cnss_get_fw_files_for_target(struct device *dev,
  214. struct cnss_fw_files *pfw_files,
  215. u32 target_type, u32 target_version)
  216. {
  217. if (!pfw_files)
  218. return -ENODEV;
  219. switch (target_version) {
  220. case QCA6174_REV3_VERSION:
  221. case QCA6174_REV3_2_VERSION:
  222. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  223. break;
  224. default:
  225. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  226. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  227. target_type, target_version);
  228. break;
  229. }
  230. return 0;
  231. }
  232. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  233. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  234. {
  235. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  236. if (!plat_priv)
  237. return -ENODEV;
  238. if (!cap)
  239. return -EINVAL;
  240. *cap = plat_priv->cap;
  241. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  242. return 0;
  243. }
  244. EXPORT_SYMBOL(cnss_get_platform_cap);
  245. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  246. {
  247. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  248. if (!plat_priv)
  249. return;
  250. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  251. }
  252. EXPORT_SYMBOL(cnss_request_pm_qos);
  253. void cnss_remove_pm_qos(struct device *dev)
  254. {
  255. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  256. if (!plat_priv)
  257. return;
  258. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  259. }
  260. EXPORT_SYMBOL(cnss_remove_pm_qos);
  261. int cnss_wlan_enable(struct device *dev,
  262. struct cnss_wlan_enable_cfg *config,
  263. enum cnss_driver_mode mode,
  264. const char *host_version)
  265. {
  266. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  267. int ret = 0;
  268. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  269. return 0;
  270. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  271. return 0;
  272. if (!config || !host_version) {
  273. cnss_pr_err("Invalid config or host_version pointer\n");
  274. return -EINVAL;
  275. }
  276. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  277. mode, config, host_version);
  278. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  279. goto skip_cfg;
  280. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  281. if (ret)
  282. goto out;
  283. skip_cfg:
  284. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  285. out:
  286. return ret;
  287. }
  288. EXPORT_SYMBOL(cnss_wlan_enable);
  289. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  290. {
  291. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  292. int ret = 0;
  293. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  294. return 0;
  295. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  296. return 0;
  297. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  298. cnss_bus_free_qdss_mem(plat_priv);
  299. return ret;
  300. }
  301. EXPORT_SYMBOL(cnss_wlan_disable);
  302. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  303. u32 data_len, u8 *output)
  304. {
  305. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  306. int ret = 0;
  307. if (!plat_priv) {
  308. cnss_pr_err("plat_priv is NULL!\n");
  309. return -EINVAL;
  310. }
  311. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  312. return 0;
  313. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  314. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  315. plat_priv->driver_state);
  316. ret = -EINVAL;
  317. goto out;
  318. }
  319. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  320. data_len, output);
  321. out:
  322. return ret;
  323. }
  324. EXPORT_SYMBOL(cnss_athdiag_read);
  325. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  326. u32 data_len, u8 *input)
  327. {
  328. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  329. int ret = 0;
  330. if (!plat_priv) {
  331. cnss_pr_err("plat_priv is NULL!\n");
  332. return -EINVAL;
  333. }
  334. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  335. return 0;
  336. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  337. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  338. plat_priv->driver_state);
  339. ret = -EINVAL;
  340. goto out;
  341. }
  342. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  343. data_len, input);
  344. out:
  345. return ret;
  346. }
  347. EXPORT_SYMBOL(cnss_athdiag_write);
  348. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  349. {
  350. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  351. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  352. return 0;
  353. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  354. }
  355. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  356. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  357. {
  358. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  359. if (!plat_priv)
  360. return -EINVAL;
  361. if (plat_priv->device_id != QCA6490_DEVICE_ID ||
  362. !plat_priv->fw_pcie_gen_switch)
  363. return -EOPNOTSUPP;
  364. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  365. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  366. return -EINVAL;
  367. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  368. plat_priv->pcie_gen_speed = pcie_gen_speed;
  369. return 0;
  370. }
  371. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  372. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  373. {
  374. int ret = 0;
  375. if (!plat_priv)
  376. return -ENODEV;
  377. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  378. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  379. if (ret)
  380. goto out;
  381. if (plat_priv->hds_enabled)
  382. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  383. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  384. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  385. plat_priv->ctrl_params.bdf_type);
  386. if (ret)
  387. goto out;
  388. ret = cnss_bus_load_m3(plat_priv);
  389. if (ret)
  390. goto out;
  391. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  392. if (ret)
  393. goto out;
  394. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  395. return 0;
  396. out:
  397. return ret;
  398. }
  399. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  400. {
  401. int ret = 0;
  402. if (!plat_priv->antenna) {
  403. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  404. if (ret)
  405. goto out;
  406. }
  407. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  408. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  409. if (ret)
  410. goto out;
  411. }
  412. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  413. if (ret)
  414. goto out;
  415. return 0;
  416. out:
  417. return ret;
  418. }
  419. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  420. {
  421. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  422. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  423. }
  424. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  425. {
  426. u32 i;
  427. int ret = 0;
  428. struct cnss_plat_ipc_daemon_config *cfg;
  429. ret = cnss_qmi_get_dms_mac(plat_priv);
  430. if (ret == 0 && plat_priv->dms.mac_valid)
  431. goto qmi_send;
  432. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  433. * Thus assert on failure to get MAC from DMS even after retries
  434. */
  435. if (plat_priv->use_nv_mac) {
  436. /* Check if Daemon says platform support DMS MAC provisioning */
  437. cfg = cnss_plat_ipc_qmi_daemon_config();
  438. if (cfg) {
  439. if (!cfg->dms_mac_addr_supported) {
  440. cnss_pr_err("DMS MAC address not supported\n");
  441. CNSS_ASSERT(0);
  442. return -EINVAL;
  443. }
  444. }
  445. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  446. if (plat_priv->dms.mac_valid)
  447. break;
  448. ret = cnss_qmi_get_dms_mac(plat_priv);
  449. if (ret == 0)
  450. break;
  451. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  452. }
  453. if (!plat_priv->dms.mac_valid) {
  454. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  455. CNSS_ASSERT(0);
  456. return -EINVAL;
  457. }
  458. }
  459. qmi_send:
  460. if (plat_priv->dms.mac_valid)
  461. ret =
  462. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  463. ARRAY_SIZE(plat_priv->dms.mac));
  464. return ret;
  465. }
  466. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  467. enum cnss_cal_db_op op, u32 *size)
  468. {
  469. int ret = 0;
  470. u32 timeout = cnss_get_timeout(plat_priv,
  471. CNSS_TIMEOUT_DAEMON_CONNECTION);
  472. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  473. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  474. if (op >= CNSS_CAL_DB_INVALID_OP)
  475. return -EINVAL;
  476. if (!plat_priv->cbc_file_download) {
  477. cnss_pr_info("CAL DB file not required as per BDF\n");
  478. return 0;
  479. }
  480. if (*size == 0) {
  481. cnss_pr_err("Invalid cal file size\n");
  482. return -EINVAL;
  483. }
  484. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  485. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  486. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  487. msecs_to_jiffies(timeout));
  488. if (!ret) {
  489. cnss_pr_err("Daemon not yet connected\n");
  490. CNSS_ASSERT(0);
  491. return ret;
  492. }
  493. }
  494. if (!plat_priv->cal_mem->va) {
  495. cnss_pr_err("CAL DB Memory not setup for FW\n");
  496. return -EINVAL;
  497. }
  498. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  499. if (op == CNSS_CAL_DB_DOWNLOAD) {
  500. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  501. ret = cnss_plat_ipc_qmi_file_download(client_id,
  502. CNSS_CAL_DB_FILE_NAME,
  503. plat_priv->cal_mem->va,
  504. size);
  505. } else {
  506. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  507. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  508. CNSS_CAL_DB_FILE_NAME,
  509. plat_priv->cal_mem->va,
  510. *size);
  511. }
  512. if (ret)
  513. cnss_pr_err("Cal DB file %s %s failure\n",
  514. CNSS_CAL_DB_FILE_NAME,
  515. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  516. else
  517. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  518. CNSS_CAL_DB_FILE_NAME,
  519. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  520. *size);
  521. return ret;
  522. }
  523. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  524. {
  525. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  526. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  527. return -EINVAL;
  528. }
  529. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  530. &plat_priv->cal_file_size);
  531. }
  532. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  533. u32 *cal_file_size)
  534. {
  535. /* To download pass the total size of cal DB mem allocated.
  536. * After cal file is download to mem, its size is updated in
  537. * return pointer
  538. */
  539. *cal_file_size = plat_priv->cal_mem->size;
  540. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  541. cal_file_size);
  542. }
  543. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  544. {
  545. int ret = 0;
  546. u32 cal_file_size = 0;
  547. if (!plat_priv)
  548. return -ENODEV;
  549. cnss_pr_dbg("Processing FW Init Done..\n");
  550. del_timer(&plat_priv->fw_boot_timer);
  551. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  552. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  553. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  554. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  555. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  556. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  557. }
  558. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  559. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  560. CNSS_WALTEST);
  561. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  562. cnss_request_antenna_sharing(plat_priv);
  563. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  564. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  565. plat_priv->cal_time = jiffies;
  566. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  567. CNSS_CALIBRATION);
  568. } else {
  569. ret = cnss_setup_dms_mac(plat_priv);
  570. ret = cnss_bus_call_driver_probe(plat_priv);
  571. }
  572. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  573. goto out;
  574. else if (ret)
  575. goto shutdown;
  576. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  577. return 0;
  578. shutdown:
  579. cnss_bus_dev_shutdown(plat_priv);
  580. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  581. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  582. out:
  583. return ret;
  584. }
  585. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  586. {
  587. switch (type) {
  588. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  589. return "SERVER_ARRIVE";
  590. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  591. return "SERVER_EXIT";
  592. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  593. return "REQUEST_MEM";
  594. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  595. return "FW_MEM_READY";
  596. case CNSS_DRIVER_EVENT_FW_READY:
  597. return "FW_READY";
  598. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  599. return "COLD_BOOT_CAL_START";
  600. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  601. return "COLD_BOOT_CAL_DONE";
  602. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  603. return "REGISTER_DRIVER";
  604. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  605. return "UNREGISTER_DRIVER";
  606. case CNSS_DRIVER_EVENT_RECOVERY:
  607. return "RECOVERY";
  608. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  609. return "FORCE_FW_ASSERT";
  610. case CNSS_DRIVER_EVENT_POWER_UP:
  611. return "POWER_UP";
  612. case CNSS_DRIVER_EVENT_POWER_DOWN:
  613. return "POWER_DOWN";
  614. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  615. return "IDLE_RESTART";
  616. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  617. return "IDLE_SHUTDOWN";
  618. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  619. return "IMS_WFC_CALL_IND";
  620. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  621. return "WLFW_TWC_CFG_IND";
  622. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  623. return "QDSS_TRACE_REQ_MEM";
  624. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  625. return "FW_MEM_FILE_SAVE";
  626. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  627. return "QDSS_TRACE_FREE";
  628. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  629. return "QDSS_TRACE_REQ_DATA";
  630. case CNSS_DRIVER_EVENT_MAX:
  631. return "EVENT_MAX";
  632. }
  633. return "UNKNOWN";
  634. };
  635. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  636. enum cnss_driver_event_type type,
  637. u32 flags, void *data)
  638. {
  639. struct cnss_driver_event *event;
  640. unsigned long irq_flags;
  641. int gfp = GFP_KERNEL;
  642. int ret = 0;
  643. if (!plat_priv)
  644. return -ENODEV;
  645. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  646. cnss_driver_event_to_str(type), type,
  647. flags ? "-sync" : "", plat_priv->driver_state, flags);
  648. if (type >= CNSS_DRIVER_EVENT_MAX) {
  649. cnss_pr_err("Invalid Event type: %d, can't post", type);
  650. return -EINVAL;
  651. }
  652. if (in_interrupt() || irqs_disabled())
  653. gfp = GFP_ATOMIC;
  654. event = kzalloc(sizeof(*event), gfp);
  655. if (!event)
  656. return -ENOMEM;
  657. cnss_pm_stay_awake(plat_priv);
  658. event->type = type;
  659. event->data = data;
  660. init_completion(&event->complete);
  661. event->ret = CNSS_EVENT_PENDING;
  662. event->sync = !!(flags & CNSS_EVENT_SYNC);
  663. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  664. list_add_tail(&event->list, &plat_priv->event_list);
  665. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  666. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  667. if (!(flags & CNSS_EVENT_SYNC))
  668. goto out;
  669. if (flags & CNSS_EVENT_UNKILLABLE)
  670. wait_for_completion(&event->complete);
  671. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  672. ret = wait_for_completion_killable(&event->complete);
  673. else
  674. ret = wait_for_completion_interruptible(&event->complete);
  675. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  676. cnss_driver_event_to_str(type), type,
  677. plat_priv->driver_state, ret, event->ret);
  678. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  679. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  680. event->sync = false;
  681. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  682. ret = -EINTR;
  683. goto out;
  684. }
  685. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  686. ret = event->ret;
  687. kfree(event);
  688. out:
  689. cnss_pm_relax(plat_priv);
  690. return ret;
  691. }
  692. /**
  693. * cnss_get_timeout - Get timeout for corresponding type.
  694. * @plat_priv: Pointer to platform driver context.
  695. * @cnss_timeout_type: Timeout type.
  696. *
  697. * Return: Timeout in milliseconds.
  698. */
  699. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  700. enum cnss_timeout_type timeout_type)
  701. {
  702. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  703. switch (timeout_type) {
  704. case CNSS_TIMEOUT_QMI:
  705. return qmi_timeout;
  706. case CNSS_TIMEOUT_POWER_UP:
  707. return (qmi_timeout << 2);
  708. case CNSS_TIMEOUT_IDLE_RESTART:
  709. /* In idle restart power up sequence, we have fw_boot_timer to
  710. * handle FW initialization failure.
  711. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  712. * account for FW dump collection and FW re-initialization on
  713. * retry.
  714. */
  715. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  716. case CNSS_TIMEOUT_CALIBRATION:
  717. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT);
  718. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  719. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  720. case CNSS_TIMEOUT_RDDM:
  721. return CNSS_RDDM_TIMEOUT_MS;
  722. case CNSS_TIMEOUT_RECOVERY:
  723. return RECOVERY_TIMEOUT;
  724. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  725. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  726. default:
  727. return qmi_timeout;
  728. }
  729. }
  730. unsigned int cnss_get_boot_timeout(struct device *dev)
  731. {
  732. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  733. if (!plat_priv) {
  734. cnss_pr_err("plat_priv is NULL\n");
  735. return 0;
  736. }
  737. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  738. }
  739. EXPORT_SYMBOL(cnss_get_boot_timeout);
  740. int cnss_power_up(struct device *dev)
  741. {
  742. int ret = 0;
  743. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  744. unsigned int timeout;
  745. if (!plat_priv) {
  746. cnss_pr_err("plat_priv is NULL\n");
  747. return -ENODEV;
  748. }
  749. cnss_pr_dbg("Powering up device\n");
  750. ret = cnss_driver_event_post(plat_priv,
  751. CNSS_DRIVER_EVENT_POWER_UP,
  752. CNSS_EVENT_SYNC, NULL);
  753. if (ret)
  754. goto out;
  755. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  756. goto out;
  757. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  758. reinit_completion(&plat_priv->power_up_complete);
  759. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  760. msecs_to_jiffies(timeout));
  761. if (!ret) {
  762. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  763. timeout);
  764. ret = -EAGAIN;
  765. goto out;
  766. }
  767. return 0;
  768. out:
  769. return ret;
  770. }
  771. EXPORT_SYMBOL(cnss_power_up);
  772. int cnss_power_down(struct device *dev)
  773. {
  774. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  775. if (!plat_priv) {
  776. cnss_pr_err("plat_priv is NULL\n");
  777. return -ENODEV;
  778. }
  779. cnss_pr_dbg("Powering down device\n");
  780. return cnss_driver_event_post(plat_priv,
  781. CNSS_DRIVER_EVENT_POWER_DOWN,
  782. CNSS_EVENT_SYNC, NULL);
  783. }
  784. EXPORT_SYMBOL(cnss_power_down);
  785. int cnss_idle_restart(struct device *dev)
  786. {
  787. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  788. unsigned int timeout;
  789. int ret = 0;
  790. if (!plat_priv) {
  791. cnss_pr_err("plat_priv is NULL\n");
  792. return -ENODEV;
  793. }
  794. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  795. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  796. return -EBUSY;
  797. }
  798. cnss_pr_dbg("Doing idle restart\n");
  799. reinit_completion(&plat_priv->power_up_complete);
  800. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  801. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  802. ret = -EINVAL;
  803. goto out;
  804. }
  805. ret = cnss_driver_event_post(plat_priv,
  806. CNSS_DRIVER_EVENT_IDLE_RESTART,
  807. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  808. if (ret)
  809. goto out;
  810. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  811. ret = cnss_bus_call_driver_probe(plat_priv);
  812. goto out;
  813. }
  814. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  815. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  816. msecs_to_jiffies(timeout));
  817. if (plat_priv->power_up_error) {
  818. ret = plat_priv->power_up_error;
  819. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  820. cnss_pr_dbg("Power up error:%d, exiting\n",
  821. plat_priv->power_up_error);
  822. goto out;
  823. }
  824. if (!ret) {
  825. /* This exception occurs after attempting retry of FW recovery.
  826. * Thus we can safely power off the device.
  827. */
  828. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  829. timeout);
  830. ret = -ETIMEDOUT;
  831. cnss_power_down(dev);
  832. CNSS_ASSERT(0);
  833. goto out;
  834. }
  835. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  836. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  837. del_timer(&plat_priv->fw_boot_timer);
  838. ret = -EINVAL;
  839. goto out;
  840. }
  841. mutex_unlock(&plat_priv->driver_ops_lock);
  842. return 0;
  843. out:
  844. mutex_unlock(&plat_priv->driver_ops_lock);
  845. return ret;
  846. }
  847. EXPORT_SYMBOL(cnss_idle_restart);
  848. int cnss_idle_shutdown(struct device *dev)
  849. {
  850. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  851. unsigned int timeout;
  852. int ret;
  853. if (!plat_priv) {
  854. cnss_pr_err("plat_priv is NULL\n");
  855. return -ENODEV;
  856. }
  857. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  858. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  859. return -EAGAIN;
  860. }
  861. cnss_pr_dbg("Doing idle shutdown\n");
  862. if (!test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) &&
  863. !test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  864. goto skip_wait;
  865. reinit_completion(&plat_priv->recovery_complete);
  866. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY);
  867. ret = wait_for_completion_timeout(&plat_priv->recovery_complete,
  868. msecs_to_jiffies(timeout));
  869. if (!ret) {
  870. cnss_pr_err("Timeout (%ums) waiting for recovery to complete\n",
  871. timeout);
  872. CNSS_ASSERT(0);
  873. }
  874. skip_wait:
  875. return cnss_driver_event_post(plat_priv,
  876. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  877. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  878. }
  879. EXPORT_SYMBOL(cnss_idle_shutdown);
  880. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  881. {
  882. int ret = 0;
  883. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  884. if (ret) {
  885. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  886. goto out;
  887. }
  888. ret = cnss_get_clk(plat_priv);
  889. if (ret) {
  890. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  891. goto put_vreg;
  892. }
  893. ret = cnss_get_pinctrl(plat_priv);
  894. if (ret) {
  895. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  896. goto put_clk;
  897. }
  898. return 0;
  899. put_clk:
  900. cnss_put_clk(plat_priv);
  901. put_vreg:
  902. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  903. out:
  904. return ret;
  905. }
  906. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  907. {
  908. cnss_put_clk(plat_priv);
  909. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  910. }
  911. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  912. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  913. unsigned long code,
  914. void *ss_handle)
  915. {
  916. struct cnss_plat_data *plat_priv =
  917. container_of(nb, struct cnss_plat_data, modem_nb);
  918. struct cnss_esoc_info *esoc_info;
  919. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  920. if (!plat_priv)
  921. return NOTIFY_DONE;
  922. esoc_info = &plat_priv->esoc_info;
  923. if (code == SUBSYS_AFTER_POWERUP)
  924. esoc_info->modem_current_status = 1;
  925. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  926. esoc_info->modem_current_status = 0;
  927. else
  928. return NOTIFY_DONE;
  929. if (!cnss_bus_call_driver_modem_status(plat_priv,
  930. esoc_info->modem_current_status))
  931. return NOTIFY_DONE;
  932. return NOTIFY_OK;
  933. }
  934. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  935. {
  936. int ret = 0;
  937. struct device *dev;
  938. struct cnss_esoc_info *esoc_info;
  939. struct esoc_desc *esoc_desc;
  940. const char *client_desc;
  941. dev = &plat_priv->plat_dev->dev;
  942. esoc_info = &plat_priv->esoc_info;
  943. esoc_info->notify_modem_status =
  944. of_property_read_bool(dev->of_node,
  945. "qcom,notify-modem-status");
  946. if (!esoc_info->notify_modem_status)
  947. goto out;
  948. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  949. &client_desc);
  950. if (ret) {
  951. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  952. } else {
  953. esoc_desc = devm_register_esoc_client(dev, client_desc);
  954. if (IS_ERR_OR_NULL(esoc_desc)) {
  955. ret = PTR_RET(esoc_desc);
  956. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  957. ret);
  958. goto out;
  959. }
  960. esoc_info->esoc_desc = esoc_desc;
  961. }
  962. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  963. esoc_info->modem_current_status = 0;
  964. esoc_info->modem_notify_handler =
  965. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  966. esoc_info->esoc_desc->name :
  967. "modem", &plat_priv->modem_nb);
  968. if (IS_ERR(esoc_info->modem_notify_handler)) {
  969. ret = PTR_ERR(esoc_info->modem_notify_handler);
  970. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  971. ret);
  972. goto unreg_esoc;
  973. }
  974. return 0;
  975. unreg_esoc:
  976. if (esoc_info->esoc_desc)
  977. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  978. out:
  979. return ret;
  980. }
  981. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  982. {
  983. struct device *dev;
  984. struct cnss_esoc_info *esoc_info;
  985. dev = &plat_priv->plat_dev->dev;
  986. esoc_info = &plat_priv->esoc_info;
  987. if (esoc_info->notify_modem_status)
  988. subsys_notif_unregister_notifier
  989. (esoc_info->modem_notify_handler,
  990. &plat_priv->modem_nb);
  991. if (esoc_info->esoc_desc)
  992. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  993. }
  994. #else
  995. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  996. {
  997. return 0;
  998. }
  999. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1000. #endif
  1001. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1002. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1003. {
  1004. struct cnss_plat_data *plat_priv;
  1005. int ret = 0;
  1006. if (!subsys_desc->dev) {
  1007. cnss_pr_err("dev from subsys_desc is NULL\n");
  1008. return -ENODEV;
  1009. }
  1010. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1011. if (!plat_priv) {
  1012. cnss_pr_err("plat_priv is NULL\n");
  1013. return -ENODEV;
  1014. }
  1015. if (!plat_priv->driver_state) {
  1016. cnss_pr_dbg("Powerup is ignored\n");
  1017. return 0;
  1018. }
  1019. ret = cnss_bus_dev_powerup(plat_priv);
  1020. if (ret)
  1021. __pm_relax(plat_priv->recovery_ws);
  1022. return ret;
  1023. }
  1024. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1025. bool force_stop)
  1026. {
  1027. struct cnss_plat_data *plat_priv;
  1028. if (!subsys_desc->dev) {
  1029. cnss_pr_err("dev from subsys_desc is NULL\n");
  1030. return -ENODEV;
  1031. }
  1032. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1033. if (!plat_priv) {
  1034. cnss_pr_err("plat_priv is NULL\n");
  1035. return -ENODEV;
  1036. }
  1037. if (!plat_priv->driver_state) {
  1038. cnss_pr_dbg("shutdown is ignored\n");
  1039. return 0;
  1040. }
  1041. return cnss_bus_dev_shutdown(plat_priv);
  1042. }
  1043. void cnss_device_crashed(struct device *dev)
  1044. {
  1045. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1046. struct cnss_subsys_info *subsys_info;
  1047. if (!plat_priv)
  1048. return;
  1049. subsys_info = &plat_priv->subsys_info;
  1050. if (subsys_info->subsys_device) {
  1051. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1052. subsys_set_crash_status(subsys_info->subsys_device, true);
  1053. subsystem_restart_dev(subsys_info->subsys_device);
  1054. }
  1055. }
  1056. EXPORT_SYMBOL(cnss_device_crashed);
  1057. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1058. {
  1059. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1060. if (!plat_priv) {
  1061. cnss_pr_err("plat_priv is NULL\n");
  1062. return;
  1063. }
  1064. cnss_bus_dev_crash_shutdown(plat_priv);
  1065. }
  1066. static int cnss_subsys_ramdump(int enable,
  1067. const struct subsys_desc *subsys_desc)
  1068. {
  1069. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1070. if (!plat_priv) {
  1071. cnss_pr_err("plat_priv is NULL\n");
  1072. return -ENODEV;
  1073. }
  1074. if (!enable)
  1075. return 0;
  1076. return cnss_bus_dev_ramdump(plat_priv);
  1077. }
  1078. static void cnss_recovery_work_handler(struct work_struct *work)
  1079. {
  1080. }
  1081. #else
  1082. static void cnss_recovery_work_handler(struct work_struct *work)
  1083. {
  1084. int ret;
  1085. struct cnss_plat_data *plat_priv =
  1086. container_of(work, struct cnss_plat_data, recovery_work);
  1087. if (!plat_priv->recovery_enabled)
  1088. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1089. cnss_bus_dev_shutdown(plat_priv);
  1090. cnss_bus_dev_ramdump(plat_priv);
  1091. msleep(RECOVERY_DELAY_MS);
  1092. ret = cnss_bus_dev_powerup(plat_priv);
  1093. if (ret)
  1094. __pm_relax(plat_priv->recovery_ws);
  1095. return;
  1096. }
  1097. void cnss_device_crashed(struct device *dev)
  1098. {
  1099. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1100. if (!plat_priv)
  1101. return;
  1102. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1103. schedule_work(&plat_priv->recovery_work);
  1104. }
  1105. EXPORT_SYMBOL(cnss_device_crashed);
  1106. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1107. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1108. {
  1109. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1110. struct cnss_ramdump_info *ramdump_info;
  1111. if (!plat_priv)
  1112. return NULL;
  1113. ramdump_info = &plat_priv->ramdump_info;
  1114. *size = ramdump_info->ramdump_size;
  1115. return ramdump_info->ramdump_va;
  1116. }
  1117. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1118. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1119. {
  1120. switch (reason) {
  1121. case CNSS_REASON_DEFAULT:
  1122. return "DEFAULT";
  1123. case CNSS_REASON_LINK_DOWN:
  1124. return "LINK_DOWN";
  1125. case CNSS_REASON_RDDM:
  1126. return "RDDM";
  1127. case CNSS_REASON_TIMEOUT:
  1128. return "TIMEOUT";
  1129. }
  1130. return "UNKNOWN";
  1131. };
  1132. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1133. enum cnss_recovery_reason reason)
  1134. {
  1135. plat_priv->recovery_count++;
  1136. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1137. goto self_recovery;
  1138. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1139. cnss_pr_dbg("Skip device recovery\n");
  1140. return 0;
  1141. }
  1142. /* FW recovery sequence has multiple steps and firmware load requires
  1143. * linux PM in awake state. Thus hold the cnss wake source until
  1144. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1145. * time taken in this process.
  1146. */
  1147. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1148. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1149. true);
  1150. switch (reason) {
  1151. case CNSS_REASON_LINK_DOWN:
  1152. if (!cnss_bus_check_link_status(plat_priv)) {
  1153. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1154. return 0;
  1155. }
  1156. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1157. &plat_priv->ctrl_params.quirks))
  1158. goto self_recovery;
  1159. if (!cnss_bus_recover_link_down(plat_priv)) {
  1160. /* clear recovery bit here to avoid skipping
  1161. * the recovery work for RDDM later
  1162. */
  1163. clear_bit(CNSS_DRIVER_RECOVERY,
  1164. &plat_priv->driver_state);
  1165. return 0;
  1166. }
  1167. break;
  1168. case CNSS_REASON_RDDM:
  1169. cnss_bus_collect_dump_info(plat_priv, false);
  1170. break;
  1171. case CNSS_REASON_DEFAULT:
  1172. case CNSS_REASON_TIMEOUT:
  1173. break;
  1174. default:
  1175. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1176. cnss_recovery_reason_to_str(reason), reason);
  1177. break;
  1178. }
  1179. cnss_bus_device_crashed(plat_priv);
  1180. return 0;
  1181. self_recovery:
  1182. cnss_pr_dbg("Going for self recovery\n");
  1183. cnss_bus_dev_shutdown(plat_priv);
  1184. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1185. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1186. &plat_priv->ctrl_params.quirks);
  1187. cnss_bus_dev_powerup(plat_priv);
  1188. return 0;
  1189. }
  1190. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1191. void *data)
  1192. {
  1193. struct cnss_recovery_data *recovery_data = data;
  1194. int ret = 0;
  1195. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1196. cnss_recovery_reason_to_str(recovery_data->reason),
  1197. recovery_data->reason);
  1198. if (!plat_priv->driver_state) {
  1199. cnss_pr_err("Improper driver state, ignore recovery\n");
  1200. ret = -EINVAL;
  1201. goto out;
  1202. }
  1203. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1204. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1205. ret = -EINVAL;
  1206. goto out;
  1207. }
  1208. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1209. cnss_pr_err("Recovery is already in progress\n");
  1210. CNSS_ASSERT(0);
  1211. ret = -EINVAL;
  1212. goto out;
  1213. }
  1214. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1215. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1216. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1217. ret = -EINVAL;
  1218. goto out;
  1219. }
  1220. switch (plat_priv->device_id) {
  1221. case QCA6174_DEVICE_ID:
  1222. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1223. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1224. &plat_priv->driver_state)) {
  1225. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1226. ret = -EINVAL;
  1227. goto out;
  1228. }
  1229. break;
  1230. default:
  1231. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1232. set_bit(CNSS_FW_BOOT_RECOVERY,
  1233. &plat_priv->driver_state);
  1234. }
  1235. break;
  1236. }
  1237. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1238. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1239. out:
  1240. kfree(data);
  1241. return ret;
  1242. }
  1243. int cnss_self_recovery(struct device *dev,
  1244. enum cnss_recovery_reason reason)
  1245. {
  1246. cnss_schedule_recovery(dev, reason);
  1247. return 0;
  1248. }
  1249. EXPORT_SYMBOL(cnss_self_recovery);
  1250. void cnss_schedule_recovery(struct device *dev,
  1251. enum cnss_recovery_reason reason)
  1252. {
  1253. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1254. struct cnss_recovery_data *data;
  1255. int gfp = GFP_KERNEL;
  1256. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1257. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1258. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1259. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1260. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1261. return;
  1262. }
  1263. if (in_interrupt() || irqs_disabled())
  1264. gfp = GFP_ATOMIC;
  1265. data = kzalloc(sizeof(*data), gfp);
  1266. if (!data)
  1267. return;
  1268. data->reason = reason;
  1269. cnss_driver_event_post(plat_priv,
  1270. CNSS_DRIVER_EVENT_RECOVERY,
  1271. 0, data);
  1272. }
  1273. EXPORT_SYMBOL(cnss_schedule_recovery);
  1274. int cnss_force_fw_assert(struct device *dev)
  1275. {
  1276. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1277. if (!plat_priv) {
  1278. cnss_pr_err("plat_priv is NULL\n");
  1279. return -ENODEV;
  1280. }
  1281. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1282. cnss_pr_info("Forced FW assert is not supported\n");
  1283. return -EOPNOTSUPP;
  1284. }
  1285. if (cnss_bus_is_device_down(plat_priv)) {
  1286. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1287. return 0;
  1288. }
  1289. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1290. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1291. return 0;
  1292. }
  1293. if (in_interrupt() || irqs_disabled())
  1294. cnss_driver_event_post(plat_priv,
  1295. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1296. 0, NULL);
  1297. else
  1298. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1299. return 0;
  1300. }
  1301. EXPORT_SYMBOL(cnss_force_fw_assert);
  1302. int cnss_force_collect_rddm(struct device *dev)
  1303. {
  1304. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1305. unsigned int timeout;
  1306. int ret = 0;
  1307. if (!plat_priv) {
  1308. cnss_pr_err("plat_priv is NULL\n");
  1309. return -ENODEV;
  1310. }
  1311. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1312. cnss_pr_info("Force collect rddm is not supported\n");
  1313. return -EOPNOTSUPP;
  1314. }
  1315. if (cnss_bus_is_device_down(plat_priv)) {
  1316. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1317. goto wait_rddm;
  1318. }
  1319. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1320. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1321. goto wait_rddm;
  1322. }
  1323. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1324. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1325. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1326. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1327. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1328. return 0;
  1329. }
  1330. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1331. if (ret)
  1332. return ret;
  1333. wait_rddm:
  1334. reinit_completion(&plat_priv->rddm_complete);
  1335. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1336. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1337. msecs_to_jiffies(timeout));
  1338. if (!ret) {
  1339. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1340. timeout);
  1341. ret = -ETIMEDOUT;
  1342. } else if (ret > 0) {
  1343. ret = 0;
  1344. }
  1345. return ret;
  1346. }
  1347. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1348. int cnss_qmi_send_get(struct device *dev)
  1349. {
  1350. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1351. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1352. return 0;
  1353. return cnss_bus_qmi_send_get(plat_priv);
  1354. }
  1355. EXPORT_SYMBOL(cnss_qmi_send_get);
  1356. int cnss_qmi_send_put(struct device *dev)
  1357. {
  1358. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1359. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1360. return 0;
  1361. return cnss_bus_qmi_send_put(plat_priv);
  1362. }
  1363. EXPORT_SYMBOL(cnss_qmi_send_put);
  1364. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1365. int cmd_len, void *cb_ctx,
  1366. int (*cb)(void *ctx, void *event, int event_len))
  1367. {
  1368. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1369. int ret;
  1370. if (!plat_priv)
  1371. return -ENODEV;
  1372. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1373. return -EINVAL;
  1374. plat_priv->get_info_cb = cb;
  1375. plat_priv->get_info_cb_ctx = cb_ctx;
  1376. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1377. if (ret) {
  1378. plat_priv->get_info_cb = NULL;
  1379. plat_priv->get_info_cb_ctx = NULL;
  1380. }
  1381. return ret;
  1382. }
  1383. EXPORT_SYMBOL(cnss_qmi_send);
  1384. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1385. {
  1386. int ret = 0;
  1387. u32 retry = 0;
  1388. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1389. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1390. goto out;
  1391. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1392. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1393. goto out;
  1394. }
  1395. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1396. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1397. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1398. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1399. CNSS_ASSERT(0);
  1400. return -EINVAL;
  1401. }
  1402. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1403. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1404. break;
  1405. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1406. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1407. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1408. CNSS_ASSERT(0);
  1409. ret = -EINVAL;
  1410. goto mark_cal_fail;
  1411. }
  1412. }
  1413. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1414. reinit_completion(&plat_priv->cal_complete);
  1415. ret = cnss_bus_dev_powerup(plat_priv);
  1416. mark_cal_fail:
  1417. if (ret) {
  1418. complete(&plat_priv->cal_complete);
  1419. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1420. /* Set CBC done in driver state to mark attempt and note error
  1421. * since calibration cannot be retried at boot.
  1422. */
  1423. plat_priv->cal_done = CNSS_CAL_FAILURE;
  1424. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1425. }
  1426. out:
  1427. return ret;
  1428. }
  1429. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  1430. void *data)
  1431. {
  1432. struct cnss_cal_info *cal_info = data;
  1433. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  1434. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  1435. goto out;
  1436. switch (cal_info->cal_status) {
  1437. case CNSS_CAL_DONE:
  1438. cnss_pr_dbg("Calibration completed successfully\n");
  1439. plat_priv->cal_done = true;
  1440. break;
  1441. case CNSS_CAL_TIMEOUT:
  1442. case CNSS_CAL_FAILURE:
  1443. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  1444. cal_info->cal_status);
  1445. break;
  1446. default:
  1447. cnss_pr_err("Unknown calibration status: %u\n",
  1448. cal_info->cal_status);
  1449. break;
  1450. }
  1451. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  1452. cnss_bus_free_qdss_mem(plat_priv);
  1453. cnss_release_antenna_sharing(plat_priv);
  1454. cnss_bus_dev_shutdown(plat_priv);
  1455. msleep(COLD_BOOT_CAL_SHUTDOWN_DELAY_MS);
  1456. complete(&plat_priv->cal_complete);
  1457. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1458. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1459. if (cal_info->cal_status == CNSS_CAL_DONE) {
  1460. cnss_cal_mem_upload_to_file(plat_priv);
  1461. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work)
  1462. ) {
  1463. cnss_pr_dbg("Schedule WLAN driver load\n");
  1464. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1465. 0);
  1466. }
  1467. }
  1468. out:
  1469. kfree(data);
  1470. return 0;
  1471. }
  1472. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  1473. {
  1474. int ret;
  1475. ret = cnss_bus_dev_powerup(plat_priv);
  1476. if (ret)
  1477. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1478. return ret;
  1479. }
  1480. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  1481. {
  1482. cnss_bus_dev_shutdown(plat_priv);
  1483. return 0;
  1484. }
  1485. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  1486. {
  1487. int ret = 0;
  1488. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  1489. if (ret < 0)
  1490. return ret;
  1491. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  1492. }
  1493. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  1494. u32 mem_seg_len, u64 pa, u32 size)
  1495. {
  1496. int i = 0;
  1497. u64 offset = 0;
  1498. void *va = NULL;
  1499. u64 local_pa;
  1500. u32 local_size;
  1501. for (i = 0; i < mem_seg_len; i++) {
  1502. local_pa = (u64)fw_mem[i].pa;
  1503. local_size = (u32)fw_mem[i].size;
  1504. if (pa == local_pa && size <= local_size) {
  1505. va = fw_mem[i].va;
  1506. break;
  1507. }
  1508. if (pa > local_pa &&
  1509. pa < local_pa + local_size &&
  1510. pa + size <= local_pa + local_size) {
  1511. offset = pa - local_pa;
  1512. va = fw_mem[i].va + offset;
  1513. break;
  1514. }
  1515. }
  1516. return va;
  1517. }
  1518. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  1519. void *data)
  1520. {
  1521. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1522. struct cnss_fw_mem *fw_mem_seg;
  1523. int ret = 0L;
  1524. void *va = NULL;
  1525. u32 i, fw_mem_seg_len;
  1526. switch (event_data->mem_type) {
  1527. case QMI_WLFW_MEM_TYPE_DDR_V01:
  1528. if (!plat_priv->fw_mem_seg_len)
  1529. goto invalid_mem_save;
  1530. fw_mem_seg = plat_priv->fw_mem;
  1531. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  1532. break;
  1533. case QMI_WLFW_MEM_QDSS_V01:
  1534. if (!plat_priv->qdss_mem_seg_len)
  1535. goto invalid_mem_save;
  1536. fw_mem_seg = plat_priv->qdss_mem;
  1537. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  1538. break;
  1539. default:
  1540. goto invalid_mem_save;
  1541. }
  1542. for (i = 0; i < event_data->mem_seg_len; i++) {
  1543. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  1544. event_data->mem_seg[i].addr,
  1545. event_data->mem_seg[i].size);
  1546. if (!va) {
  1547. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  1548. &event_data->mem_seg[i].addr,
  1549. event_data->mem_type);
  1550. ret = -EINVAL;
  1551. break;
  1552. }
  1553. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  1554. event_data->file_name,
  1555. event_data->mem_seg[i].size);
  1556. if (ret < 0) {
  1557. cnss_pr_err("Fail to save fw mem data: %d\n",
  1558. ret);
  1559. break;
  1560. }
  1561. }
  1562. kfree(data);
  1563. return ret;
  1564. invalid_mem_save:
  1565. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  1566. event_data->mem_type);
  1567. kfree(data);
  1568. return -EINVAL;
  1569. }
  1570. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  1571. {
  1572. cnss_bus_free_qdss_mem(plat_priv);
  1573. return 0;
  1574. }
  1575. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  1576. void *data)
  1577. {
  1578. int ret = 0;
  1579. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1580. if (!plat_priv)
  1581. return -ENODEV;
  1582. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  1583. event_data->total_size);
  1584. kfree(data);
  1585. return ret;
  1586. }
  1587. static void cnss_driver_event_work(struct work_struct *work)
  1588. {
  1589. struct cnss_plat_data *plat_priv =
  1590. container_of(work, struct cnss_plat_data, event_work);
  1591. struct cnss_driver_event *event;
  1592. unsigned long flags;
  1593. int ret = 0;
  1594. if (!plat_priv) {
  1595. cnss_pr_err("plat_priv is NULL!\n");
  1596. return;
  1597. }
  1598. cnss_pm_stay_awake(plat_priv);
  1599. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1600. while (!list_empty(&plat_priv->event_list)) {
  1601. event = list_first_entry(&plat_priv->event_list,
  1602. struct cnss_driver_event, list);
  1603. list_del(&event->list);
  1604. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1605. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  1606. cnss_driver_event_to_str(event->type),
  1607. event->sync ? "-sync" : "", event->type,
  1608. plat_priv->driver_state);
  1609. switch (event->type) {
  1610. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1611. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  1612. break;
  1613. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  1614. ret = cnss_wlfw_server_exit(plat_priv);
  1615. break;
  1616. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  1617. ret = cnss_bus_alloc_fw_mem(plat_priv);
  1618. if (ret)
  1619. break;
  1620. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  1621. break;
  1622. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  1623. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  1624. break;
  1625. case CNSS_DRIVER_EVENT_FW_READY:
  1626. ret = cnss_fw_ready_hdlr(plat_priv);
  1627. break;
  1628. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  1629. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  1630. break;
  1631. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  1632. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  1633. event->data);
  1634. break;
  1635. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1636. ret = cnss_bus_register_driver_hdlr(plat_priv,
  1637. event->data);
  1638. break;
  1639. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1640. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  1641. break;
  1642. case CNSS_DRIVER_EVENT_RECOVERY:
  1643. ret = cnss_driver_recovery_hdlr(plat_priv,
  1644. event->data);
  1645. break;
  1646. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  1647. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1648. break;
  1649. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  1650. set_bit(CNSS_DRIVER_IDLE_RESTART,
  1651. &plat_priv->driver_state);
  1652. /* fall through */
  1653. case CNSS_DRIVER_EVENT_POWER_UP:
  1654. ret = cnss_power_up_hdlr(plat_priv);
  1655. break;
  1656. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1657. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  1658. &plat_priv->driver_state);
  1659. /* fall through */
  1660. case CNSS_DRIVER_EVENT_POWER_DOWN:
  1661. ret = cnss_power_down_hdlr(plat_priv);
  1662. break;
  1663. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  1664. ret = cnss_process_wfc_call_ind_event(plat_priv,
  1665. event->data);
  1666. break;
  1667. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  1668. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  1669. event->data);
  1670. break;
  1671. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1672. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  1673. break;
  1674. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  1675. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  1676. event->data);
  1677. break;
  1678. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1679. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  1680. break;
  1681. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1682. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  1683. event->data);
  1684. break;
  1685. default:
  1686. cnss_pr_err("Invalid driver event type: %d",
  1687. event->type);
  1688. kfree(event);
  1689. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1690. continue;
  1691. }
  1692. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1693. if (event->sync) {
  1694. event->ret = ret;
  1695. complete(&event->complete);
  1696. continue;
  1697. }
  1698. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1699. kfree(event);
  1700. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1701. }
  1702. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1703. cnss_pm_relax(plat_priv);
  1704. }
  1705. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  1706. phys_addr_t *pa, unsigned long attrs)
  1707. {
  1708. struct sg_table sgt;
  1709. int ret;
  1710. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  1711. if (ret) {
  1712. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  1713. va, &dma, size, attrs);
  1714. return -EINVAL;
  1715. }
  1716. *pa = page_to_phys(sg_page(sgt.sgl));
  1717. sg_free_table(&sgt);
  1718. return 0;
  1719. }
  1720. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1721. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  1722. {
  1723. int ret = 0;
  1724. struct cnss_subsys_info *subsys_info;
  1725. subsys_info = &plat_priv->subsys_info;
  1726. subsys_info->subsys_desc.name = "wlan";
  1727. subsys_info->subsys_desc.owner = THIS_MODULE;
  1728. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  1729. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  1730. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  1731. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  1732. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  1733. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  1734. if (IS_ERR(subsys_info->subsys_device)) {
  1735. ret = PTR_ERR(subsys_info->subsys_device);
  1736. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  1737. goto out;
  1738. }
  1739. subsys_info->subsys_handle =
  1740. subsystem_get(subsys_info->subsys_desc.name);
  1741. if (!subsys_info->subsys_handle) {
  1742. cnss_pr_err("Failed to get subsys_handle!\n");
  1743. ret = -EINVAL;
  1744. goto unregister_subsys;
  1745. } else if (IS_ERR(subsys_info->subsys_handle)) {
  1746. ret = PTR_ERR(subsys_info->subsys_handle);
  1747. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  1748. goto unregister_subsys;
  1749. }
  1750. return 0;
  1751. unregister_subsys:
  1752. subsys_unregister(subsys_info->subsys_device);
  1753. out:
  1754. return ret;
  1755. }
  1756. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  1757. {
  1758. struct cnss_subsys_info *subsys_info;
  1759. subsys_info = &plat_priv->subsys_info;
  1760. subsystem_put(subsys_info->subsys_handle);
  1761. subsys_unregister(subsys_info->subsys_device);
  1762. }
  1763. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  1764. {
  1765. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  1766. return create_ramdump_device(subsys_info->subsys_desc.name,
  1767. subsys_info->subsys_desc.dev);
  1768. }
  1769. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  1770. void *ramdump_dev)
  1771. {
  1772. destroy_ramdump_device(ramdump_dev);
  1773. }
  1774. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  1775. {
  1776. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  1777. struct ramdump_segment segment;
  1778. memset(&segment, 0, sizeof(segment));
  1779. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  1780. segment.size = ramdump_info->ramdump_size;
  1781. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  1782. }
  1783. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  1784. {
  1785. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  1786. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  1787. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  1788. struct ramdump_segment *ramdump_segs, *s;
  1789. struct cnss_dump_meta_info meta_info = {0};
  1790. int i, ret = 0;
  1791. ramdump_segs = kcalloc(dump_data->nentries + 1,
  1792. sizeof(*ramdump_segs),
  1793. GFP_KERNEL);
  1794. if (!ramdump_segs)
  1795. return -ENOMEM;
  1796. s = ramdump_segs + 1;
  1797. for (i = 0; i < dump_data->nentries; i++) {
  1798. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  1799. cnss_pr_err("Unsupported dump type: %d",
  1800. dump_seg->type);
  1801. continue;
  1802. }
  1803. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  1804. meta_info.entry[dump_seg->type].type = dump_seg->type;
  1805. meta_info.entry[dump_seg->type].entry_start = i + 1;
  1806. }
  1807. meta_info.entry[dump_seg->type].entry_num++;
  1808. s->address = dump_seg->address;
  1809. s->v_address = (void __iomem *)dump_seg->v_address;
  1810. s->size = dump_seg->size;
  1811. s++;
  1812. dump_seg++;
  1813. }
  1814. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  1815. meta_info.version = CNSS_RAMDUMP_VERSION;
  1816. meta_info.chipset = plat_priv->device_id;
  1817. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  1818. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  1819. ramdump_segs->size = sizeof(meta_info);
  1820. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  1821. dump_data->nentries + 1);
  1822. kfree(ramdump_segs);
  1823. return ret;
  1824. }
  1825. #else
  1826. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  1827. void *data)
  1828. {
  1829. struct cnss_plat_data *plat_priv =
  1830. container_of(nb, struct cnss_plat_data, panic_nb);
  1831. cnss_bus_dev_crash_shutdown(plat_priv);
  1832. return NOTIFY_DONE;
  1833. }
  1834. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  1835. {
  1836. int ret;
  1837. if (!plat_priv)
  1838. return -ENODEV;
  1839. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  1840. ret = atomic_notifier_chain_register(&panic_notifier_list,
  1841. &plat_priv->panic_nb);
  1842. if (ret) {
  1843. cnss_pr_err("Failed to register panic handler\n");
  1844. return -EINVAL;
  1845. }
  1846. return 0;
  1847. }
  1848. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  1849. {
  1850. int ret;
  1851. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  1852. &plat_priv->panic_nb);
  1853. if (ret)
  1854. cnss_pr_err("Failed to unregister panic handler\n");
  1855. }
  1856. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  1857. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  1858. {
  1859. return &plat_priv->plat_dev->dev;
  1860. }
  1861. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  1862. void *ramdump_dev)
  1863. {
  1864. }
  1865. #endif
  1866. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  1867. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  1868. {
  1869. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  1870. struct qcom_dump_segment segment;
  1871. struct list_head head;
  1872. INIT_LIST_HEAD(&head);
  1873. memset(&segment, 0, sizeof(segment));
  1874. segment.va = ramdump_info->ramdump_va;
  1875. segment.size = ramdump_info->ramdump_size;
  1876. list_add(&segment.node, &head);
  1877. return qcom_dump(&head, ramdump_info->ramdump_dev);
  1878. }
  1879. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  1880. {
  1881. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  1882. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  1883. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  1884. struct qcom_dump_segment *seg;
  1885. struct cnss_dump_meta_info meta_info = {0};
  1886. struct list_head head;
  1887. int i, ret = 0;
  1888. if (!dump_enabled()) {
  1889. cnss_pr_info("Dump collection is not enabled\n");
  1890. return ret;
  1891. }
  1892. INIT_LIST_HEAD(&head);
  1893. for (i = 0; i < dump_data->nentries; i++) {
  1894. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  1895. cnss_pr_err("Unsupported dump type: %d",
  1896. dump_seg->type);
  1897. continue;
  1898. }
  1899. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  1900. if (!seg)
  1901. continue;
  1902. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  1903. meta_info.entry[dump_seg->type].type = dump_seg->type;
  1904. meta_info.entry[dump_seg->type].entry_start = i + 1;
  1905. }
  1906. meta_info.entry[dump_seg->type].entry_num++;
  1907. seg->da = dump_seg->address;
  1908. seg->va = dump_seg->v_address;
  1909. seg->size = dump_seg->size;
  1910. list_add_tail(&seg->node, &head);
  1911. dump_seg++;
  1912. }
  1913. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  1914. if (!seg)
  1915. goto do_elf_dump;
  1916. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  1917. meta_info.version = CNSS_RAMDUMP_VERSION;
  1918. meta_info.chipset = plat_priv->device_id;
  1919. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  1920. seg->va = &meta_info;
  1921. seg->size = sizeof(meta_info);
  1922. list_add(&seg->node, &head);
  1923. do_elf_dump:
  1924. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  1925. while (!list_empty(&head)) {
  1926. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  1927. list_del(&seg->node);
  1928. kfree(seg);
  1929. }
  1930. return ret;
  1931. }
  1932. #else
  1933. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  1934. {
  1935. return 0;
  1936. }
  1937. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  1938. {
  1939. return 0;
  1940. }
  1941. #endif /* CONFIG_QCOM_RAMDUMP */
  1942. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1943. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  1944. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  1945. {
  1946. struct cnss_ramdump_info *ramdump_info;
  1947. struct msm_dump_entry dump_entry;
  1948. ramdump_info = &plat_priv->ramdump_info;
  1949. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  1950. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  1951. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  1952. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  1953. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  1954. sizeof(ramdump_info->dump_data.name));
  1955. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  1956. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  1957. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  1958. &dump_entry);
  1959. }
  1960. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  1961. {
  1962. int ret = 0;
  1963. struct device *dev;
  1964. struct cnss_ramdump_info *ramdump_info;
  1965. u32 ramdump_size = 0;
  1966. dev = &plat_priv->plat_dev->dev;
  1967. ramdump_info = &plat_priv->ramdump_info;
  1968. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  1969. &ramdump_size) == 0) {
  1970. ramdump_info->ramdump_va =
  1971. dma_alloc_coherent(dev, ramdump_size,
  1972. &ramdump_info->ramdump_pa,
  1973. GFP_KERNEL);
  1974. if (ramdump_info->ramdump_va)
  1975. ramdump_info->ramdump_size = ramdump_size;
  1976. }
  1977. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  1978. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  1979. if (ramdump_info->ramdump_size == 0) {
  1980. cnss_pr_info("Ramdump will not be collected");
  1981. goto out;
  1982. }
  1983. ret = cnss_init_dump_entry(plat_priv);
  1984. if (ret) {
  1985. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  1986. goto free_ramdump;
  1987. }
  1988. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  1989. if (!ramdump_info->ramdump_dev) {
  1990. cnss_pr_err("Failed to create ramdump device!");
  1991. ret = -ENOMEM;
  1992. goto free_ramdump;
  1993. }
  1994. return 0;
  1995. free_ramdump:
  1996. dma_free_coherent(dev, ramdump_info->ramdump_size,
  1997. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  1998. out:
  1999. return ret;
  2000. }
  2001. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2002. {
  2003. struct device *dev;
  2004. struct cnss_ramdump_info *ramdump_info;
  2005. dev = &plat_priv->plat_dev->dev;
  2006. ramdump_info = &plat_priv->ramdump_info;
  2007. if (ramdump_info->ramdump_dev)
  2008. cnss_destroy_ramdump_device(plat_priv,
  2009. ramdump_info->ramdump_dev);
  2010. if (ramdump_info->ramdump_va)
  2011. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2012. ramdump_info->ramdump_va,
  2013. ramdump_info->ramdump_pa);
  2014. }
  2015. /**
  2016. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2017. * @ret: Error returned by msm_dump_data_register_nominidump
  2018. *
  2019. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2020. * ignore failure.
  2021. *
  2022. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2023. */
  2024. static int cnss_ignore_dump_data_reg_fail(int ret)
  2025. {
  2026. return ret;
  2027. }
  2028. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2029. {
  2030. int ret = 0;
  2031. struct cnss_ramdump_info_v2 *info_v2;
  2032. struct cnss_dump_data *dump_data;
  2033. struct msm_dump_entry dump_entry;
  2034. struct device *dev = &plat_priv->plat_dev->dev;
  2035. u32 ramdump_size = 0;
  2036. info_v2 = &plat_priv->ramdump_info_v2;
  2037. dump_data = &info_v2->dump_data;
  2038. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2039. &ramdump_size) == 0)
  2040. info_v2->ramdump_size = ramdump_size;
  2041. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2042. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2043. if (!info_v2->dump_data_vaddr)
  2044. return -ENOMEM;
  2045. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2046. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2047. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2048. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2049. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2050. sizeof(dump_data->name));
  2051. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2052. dump_entry.addr = virt_to_phys(dump_data);
  2053. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2054. &dump_entry);
  2055. if (ret) {
  2056. ret = cnss_ignore_dump_data_reg_fail(ret);
  2057. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  2058. ret ? "Error" : "Ignoring", ret);
  2059. goto free_ramdump;
  2060. }
  2061. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2062. if (!info_v2->ramdump_dev) {
  2063. cnss_pr_err("Failed to create ramdump device!\n");
  2064. ret = -ENOMEM;
  2065. goto free_ramdump;
  2066. }
  2067. return 0;
  2068. free_ramdump:
  2069. kfree(info_v2->dump_data_vaddr);
  2070. info_v2->dump_data_vaddr = NULL;
  2071. return ret;
  2072. }
  2073. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  2074. {
  2075. struct cnss_ramdump_info_v2 *info_v2;
  2076. info_v2 = &plat_priv->ramdump_info_v2;
  2077. if (info_v2->ramdump_dev)
  2078. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  2079. kfree(info_v2->dump_data_vaddr);
  2080. info_v2->dump_data_vaddr = NULL;
  2081. info_v2->dump_data_valid = false;
  2082. }
  2083. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2084. {
  2085. int ret = 0;
  2086. switch (plat_priv->device_id) {
  2087. case QCA6174_DEVICE_ID:
  2088. ret = cnss_register_ramdump_v1(plat_priv);
  2089. break;
  2090. case QCA6290_DEVICE_ID:
  2091. case QCA6390_DEVICE_ID:
  2092. case QCA6490_DEVICE_ID:
  2093. case WCN7850_DEVICE_ID:
  2094. ret = cnss_register_ramdump_v2(plat_priv);
  2095. break;
  2096. default:
  2097. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2098. ret = -ENODEV;
  2099. break;
  2100. }
  2101. return ret;
  2102. }
  2103. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2104. {
  2105. switch (plat_priv->device_id) {
  2106. case QCA6174_DEVICE_ID:
  2107. cnss_unregister_ramdump_v1(plat_priv);
  2108. break;
  2109. case QCA6290_DEVICE_ID:
  2110. case QCA6390_DEVICE_ID:
  2111. case QCA6490_DEVICE_ID:
  2112. case WCN7850_DEVICE_ID:
  2113. cnss_unregister_ramdump_v2(plat_priv);
  2114. break;
  2115. default:
  2116. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2117. break;
  2118. }
  2119. }
  2120. #else
  2121. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2122. {
  2123. return 0;
  2124. }
  2125. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv) {}
  2126. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  2127. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  2128. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2129. enum cnss_fw_dump_type type, int seg_no,
  2130. void *va, phys_addr_t pa, size_t size)
  2131. {
  2132. struct md_region md_entry;
  2133. int ret;
  2134. switch (type) {
  2135. case CNSS_FW_IMAGE:
  2136. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2137. seg_no);
  2138. break;
  2139. case CNSS_FW_RDDM:
  2140. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2141. seg_no);
  2142. break;
  2143. case CNSS_FW_REMOTE_HEAP:
  2144. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2145. seg_no);
  2146. break;
  2147. default:
  2148. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2149. return -EINVAL;
  2150. }
  2151. md_entry.phys_addr = pa;
  2152. md_entry.virt_addr = (uintptr_t)va;
  2153. md_entry.size = size;
  2154. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2155. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2156. md_entry.name, va, &pa, size);
  2157. ret = msm_minidump_add_region(&md_entry);
  2158. if (ret < 0)
  2159. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  2160. return ret;
  2161. }
  2162. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2163. enum cnss_fw_dump_type type, int seg_no,
  2164. void *va, phys_addr_t pa, size_t size)
  2165. {
  2166. struct md_region md_entry;
  2167. int ret;
  2168. switch (type) {
  2169. case CNSS_FW_IMAGE:
  2170. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2171. seg_no);
  2172. break;
  2173. case CNSS_FW_RDDM:
  2174. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2175. seg_no);
  2176. break;
  2177. case CNSS_FW_REMOTE_HEAP:
  2178. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2179. seg_no);
  2180. break;
  2181. default:
  2182. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2183. return -EINVAL;
  2184. }
  2185. md_entry.phys_addr = pa;
  2186. md_entry.virt_addr = (uintptr_t)va;
  2187. md_entry.size = size;
  2188. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2189. cnss_pr_dbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2190. md_entry.name, va, &pa, size);
  2191. ret = msm_minidump_remove_region(&md_entry);
  2192. if (ret)
  2193. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  2194. ret);
  2195. return ret;
  2196. }
  2197. #else
  2198. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2199. enum cnss_fw_dump_type type, int seg_no,
  2200. void *va, phys_addr_t pa, size_t size)
  2201. {
  2202. return 0;
  2203. }
  2204. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2205. enum cnss_fw_dump_type type, int seg_no,
  2206. void *va, phys_addr_t pa, size_t size)
  2207. {
  2208. return 0;
  2209. }
  2210. #endif /* CONFIG_QCOM_MINIDUMP */
  2211. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  2212. const struct firmware **fw_entry,
  2213. const char *filename)
  2214. {
  2215. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  2216. return request_firmware_direct(fw_entry, filename,
  2217. &plat_priv->plat_dev->dev);
  2218. else
  2219. return firmware_request_nowarn(fw_entry, filename,
  2220. &plat_priv->plat_dev->dev);
  2221. }
  2222. #if IS_ENABLED(CONFIG_INTERCONNECT)
  2223. /**
  2224. * cnss_register_bus_scale() - Setup interconnect voting data
  2225. * @plat_priv: Platform data structure
  2226. *
  2227. * For different interconnect path configured in device tree setup voting data
  2228. * for list of bandwidth requirements.
  2229. *
  2230. * Result: 0 for success. -EINVAL if not configured
  2231. */
  2232. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2233. {
  2234. int ret = -EINVAL;
  2235. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  2236. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2237. struct device *dev = &plat_priv->plat_dev->dev;
  2238. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  2239. ret = of_property_read_u32(dev->of_node,
  2240. "qcom,icc-path-count",
  2241. &plat_priv->icc.path_count);
  2242. if (ret) {
  2243. cnss_pr_err("Platform Bus Interconnect path not configured\n");
  2244. return -EINVAL;
  2245. }
  2246. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  2247. "qcom,bus-bw-cfg-count",
  2248. &plat_priv->icc.bus_bw_cfg_count);
  2249. if (ret) {
  2250. cnss_pr_err("Failed to get Bus BW Config table size\n");
  2251. goto cleanup;
  2252. }
  2253. cfg_arr_size = plat_priv->icc.path_count *
  2254. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  2255. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  2256. if (!cfg_arr) {
  2257. cnss_pr_err("Failed to alloc cfg table mem\n");
  2258. ret = -ENOMEM;
  2259. goto cleanup;
  2260. }
  2261. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  2262. "qcom,bus-bw-cfg", cfg_arr,
  2263. cfg_arr_size);
  2264. if (ret) {
  2265. cnss_pr_err("Invalid Bus BW Config Table\n");
  2266. goto cleanup;
  2267. }
  2268. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  2269. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  2270. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  2271. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  2272. GFP_KERNEL);
  2273. if (!bus_bw_info) {
  2274. ret = -ENOMEM;
  2275. goto out;
  2276. }
  2277. ret = of_property_read_string_index(dev->of_node,
  2278. "interconnect-names", idx,
  2279. &bus_bw_info->icc_name);
  2280. if (ret)
  2281. goto out;
  2282. bus_bw_info->icc_path =
  2283. of_icc_get(&plat_priv->plat_dev->dev,
  2284. bus_bw_info->icc_name);
  2285. if (IS_ERR(bus_bw_info->icc_path)) {
  2286. ret = PTR_ERR(bus_bw_info->icc_path);
  2287. if (ret != -EPROBE_DEFER) {
  2288. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  2289. bus_bw_info->icc_name, ret);
  2290. goto out;
  2291. }
  2292. }
  2293. bus_bw_info->cfg_table =
  2294. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  2295. sizeof(*bus_bw_info->cfg_table),
  2296. GFP_KERNEL);
  2297. if (!bus_bw_info->cfg_table) {
  2298. ret = -ENOMEM;
  2299. goto out;
  2300. }
  2301. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  2302. bus_bw_info->icc_name);
  2303. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  2304. CNSS_ICC_VOTE_MAX);
  2305. i < plat_priv->icc.bus_bw_cfg_count;
  2306. i++, j += 2) {
  2307. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  2308. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  2309. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  2310. i, bus_bw_info->cfg_table[i].avg_bw,
  2311. bus_bw_info->cfg_table[i].peak_bw);
  2312. }
  2313. list_add_tail(&bus_bw_info->list,
  2314. &plat_priv->icc.list_head);
  2315. }
  2316. kfree(cfg_arr);
  2317. return 0;
  2318. out:
  2319. list_for_each_entry_safe(bus_bw_info, tmp,
  2320. &plat_priv->icc.list_head, list) {
  2321. list_del(&bus_bw_info->list);
  2322. }
  2323. cleanup:
  2324. kfree(cfg_arr);
  2325. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2326. return ret;
  2327. }
  2328. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  2329. {
  2330. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2331. list_for_each_entry_safe(bus_bw_info, tmp,
  2332. &plat_priv->icc.list_head, list) {
  2333. list_del(&bus_bw_info->list);
  2334. if (bus_bw_info->icc_path)
  2335. icc_put(bus_bw_info->icc_path);
  2336. }
  2337. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2338. }
  2339. #else
  2340. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2341. {
  2342. return 0;
  2343. }
  2344. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  2345. #endif /* CONFIG_INTERCONNECT */
  2346. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  2347. {
  2348. struct cnss_plat_data *plat_priv = cb_ctx;
  2349. if (!plat_priv) {
  2350. cnss_pr_err("%s: Invalid context\n", __func__);
  2351. return;
  2352. }
  2353. if (status) {
  2354. cnss_pr_info("CNSS Daemon connected\n");
  2355. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2356. complete(&plat_priv->daemon_connected);
  2357. } else {
  2358. cnss_pr_info("CNSS Daemon disconnected\n");
  2359. reinit_completion(&plat_priv->daemon_connected);
  2360. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2361. }
  2362. }
  2363. static ssize_t enable_hds_store(struct device *dev,
  2364. struct device_attribute *attr,
  2365. const char *buf, size_t count)
  2366. {
  2367. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2368. unsigned int enable_hds = 0;
  2369. if (!plat_priv)
  2370. return -ENODEV;
  2371. if (sscanf(buf, "%du", &enable_hds) != 1) {
  2372. cnss_pr_err("Invalid enable_hds sysfs command\n");
  2373. return -EINVAL;
  2374. }
  2375. if (enable_hds)
  2376. plat_priv->hds_enabled = true;
  2377. else
  2378. plat_priv->hds_enabled = false;
  2379. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  2380. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  2381. return count;
  2382. }
  2383. static ssize_t recovery_store(struct device *dev,
  2384. struct device_attribute *attr,
  2385. const char *buf, size_t count)
  2386. {
  2387. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2388. unsigned int recovery = 0;
  2389. if (!plat_priv)
  2390. return -ENODEV;
  2391. if (sscanf(buf, "%du", &recovery) != 1) {
  2392. cnss_pr_err("Invalid recovery sysfs command\n");
  2393. return -EINVAL;
  2394. }
  2395. if (recovery)
  2396. plat_priv->recovery_enabled = true;
  2397. else
  2398. plat_priv->recovery_enabled = false;
  2399. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  2400. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  2401. return count;
  2402. }
  2403. static ssize_t shutdown_store(struct device *dev,
  2404. struct device_attribute *attr,
  2405. const char *buf, size_t count)
  2406. {
  2407. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2408. if (plat_priv) {
  2409. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  2410. del_timer(&plat_priv->fw_boot_timer);
  2411. complete_all(&plat_priv->power_up_complete);
  2412. complete_all(&plat_priv->cal_complete);
  2413. }
  2414. cnss_pr_dbg("Received shutdown notification\n");
  2415. return count;
  2416. }
  2417. static ssize_t fs_ready_store(struct device *dev,
  2418. struct device_attribute *attr,
  2419. const char *buf, size_t count)
  2420. {
  2421. int fs_ready = 0;
  2422. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2423. if (sscanf(buf, "%du", &fs_ready) != 1)
  2424. return -EINVAL;
  2425. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  2426. fs_ready, count);
  2427. if (!plat_priv) {
  2428. cnss_pr_err("plat_priv is NULL\n");
  2429. return count;
  2430. }
  2431. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  2432. cnss_pr_dbg("QMI is bypassed\n");
  2433. return count;
  2434. }
  2435. switch (plat_priv->device_id) {
  2436. case QCA6290_DEVICE_ID:
  2437. case QCA6390_DEVICE_ID:
  2438. case QCA6490_DEVICE_ID:
  2439. case WCN7850_DEVICE_ID:
  2440. break;
  2441. default:
  2442. cnss_pr_err("Not supported for device ID 0x%lx\n",
  2443. plat_priv->device_id);
  2444. return count;
  2445. }
  2446. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  2447. cnss_driver_event_post(plat_priv,
  2448. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  2449. 0, NULL);
  2450. }
  2451. return count;
  2452. }
  2453. static ssize_t qdss_trace_start_store(struct device *dev,
  2454. struct device_attribute *attr,
  2455. const char *buf, size_t count)
  2456. {
  2457. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2458. wlfw_qdss_trace_start(plat_priv);
  2459. cnss_pr_dbg("Received QDSS start command\n");
  2460. return count;
  2461. }
  2462. static ssize_t qdss_trace_stop_store(struct device *dev,
  2463. struct device_attribute *attr,
  2464. const char *buf, size_t count)
  2465. {
  2466. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2467. u32 option = 0;
  2468. if (sscanf(buf, "%du", &option) != 1)
  2469. return -EINVAL;
  2470. wlfw_qdss_trace_stop(plat_priv, option);
  2471. cnss_pr_dbg("Received QDSS stop command\n");
  2472. return count;
  2473. }
  2474. static ssize_t qdss_conf_download_store(struct device *dev,
  2475. struct device_attribute *attr,
  2476. const char *buf, size_t count)
  2477. {
  2478. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2479. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  2480. cnss_pr_dbg("Received QDSS download config command\n");
  2481. return count;
  2482. }
  2483. static ssize_t hw_trace_override_store(struct device *dev,
  2484. struct device_attribute *attr,
  2485. const char *buf, size_t count)
  2486. {
  2487. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2488. int tmp = 0;
  2489. if (sscanf(buf, "%du", &tmp) != 1)
  2490. return -EINVAL;
  2491. plat_priv->hw_trc_override = tmp;
  2492. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  2493. return count;
  2494. }
  2495. static DEVICE_ATTR_WO(fs_ready);
  2496. static DEVICE_ATTR_WO(shutdown);
  2497. static DEVICE_ATTR_WO(recovery);
  2498. static DEVICE_ATTR_WO(enable_hds);
  2499. static DEVICE_ATTR_WO(qdss_trace_start);
  2500. static DEVICE_ATTR_WO(qdss_trace_stop);
  2501. static DEVICE_ATTR_WO(qdss_conf_download);
  2502. static DEVICE_ATTR_WO(hw_trace_override);
  2503. static struct attribute *cnss_attrs[] = {
  2504. &dev_attr_fs_ready.attr,
  2505. &dev_attr_shutdown.attr,
  2506. &dev_attr_recovery.attr,
  2507. &dev_attr_enable_hds.attr,
  2508. &dev_attr_qdss_trace_start.attr,
  2509. &dev_attr_qdss_trace_stop.attr,
  2510. &dev_attr_qdss_conf_download.attr,
  2511. &dev_attr_hw_trace_override.attr,
  2512. NULL,
  2513. };
  2514. static struct attribute_group cnss_attr_group = {
  2515. .attrs = cnss_attrs,
  2516. };
  2517. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  2518. {
  2519. struct device *dev = &plat_priv->plat_dev->dev;
  2520. int ret;
  2521. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "cnss");
  2522. if (ret) {
  2523. cnss_pr_err("Failed to create cnss link, err = %d\n",
  2524. ret);
  2525. goto out;
  2526. }
  2527. /* This is only for backward compatibility. */
  2528. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "shutdown_wlan");
  2529. if (ret) {
  2530. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  2531. ret);
  2532. goto rm_cnss_link;
  2533. }
  2534. return 0;
  2535. rm_cnss_link:
  2536. sysfs_remove_link(kernel_kobj, "cnss");
  2537. out:
  2538. return ret;
  2539. }
  2540. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  2541. {
  2542. sysfs_remove_link(kernel_kobj, "shutdown_wlan");
  2543. sysfs_remove_link(kernel_kobj, "cnss");
  2544. }
  2545. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  2546. {
  2547. int ret = 0;
  2548. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  2549. &cnss_attr_group);
  2550. if (ret) {
  2551. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  2552. ret);
  2553. goto out;
  2554. }
  2555. cnss_create_sysfs_link(plat_priv);
  2556. return 0;
  2557. out:
  2558. return ret;
  2559. }
  2560. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  2561. {
  2562. cnss_remove_sysfs_link(plat_priv);
  2563. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  2564. }
  2565. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  2566. {
  2567. spin_lock_init(&plat_priv->event_lock);
  2568. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  2569. WQ_UNBOUND, 1);
  2570. if (!plat_priv->event_wq) {
  2571. cnss_pr_err("Failed to create event workqueue!\n");
  2572. return -EFAULT;
  2573. }
  2574. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  2575. INIT_LIST_HEAD(&plat_priv->event_list);
  2576. return 0;
  2577. }
  2578. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  2579. {
  2580. destroy_workqueue(plat_priv->event_wq);
  2581. }
  2582. static int cnss_reboot_notifier(struct notifier_block *nb,
  2583. unsigned long action,
  2584. void *data)
  2585. {
  2586. struct cnss_plat_data *plat_priv =
  2587. container_of(nb, struct cnss_plat_data, reboot_nb);
  2588. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  2589. del_timer(&plat_priv->fw_boot_timer);
  2590. complete_all(&plat_priv->power_up_complete);
  2591. complete_all(&plat_priv->cal_complete);
  2592. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  2593. return NOTIFY_DONE;
  2594. }
  2595. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  2596. {
  2597. int ret;
  2598. timer_setup(&plat_priv->fw_boot_timer,
  2599. cnss_bus_fw_boot_timeout_hdlr, 0);
  2600. ret = register_pm_notifier(&cnss_pm_notifier);
  2601. if (ret)
  2602. cnss_pr_err("Failed to register PM notifier, err = %d\n", ret);
  2603. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  2604. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  2605. if (ret)
  2606. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  2607. ret);
  2608. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  2609. if (ret)
  2610. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  2611. ret);
  2612. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  2613. init_completion(&plat_priv->power_up_complete);
  2614. init_completion(&plat_priv->cal_complete);
  2615. init_completion(&plat_priv->rddm_complete);
  2616. init_completion(&plat_priv->recovery_complete);
  2617. init_completion(&plat_priv->daemon_connected);
  2618. mutex_init(&plat_priv->dev_lock);
  2619. mutex_init(&plat_priv->driver_ops_lock);
  2620. plat_priv->recovery_ws =
  2621. wakeup_source_register(&plat_priv->plat_dev->dev,
  2622. "CNSS_FW_RECOVERY");
  2623. if (!plat_priv->recovery_ws)
  2624. cnss_pr_err("Failed to setup FW recovery wake source\n");
  2625. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  2626. cnss_daemon_connection_update_cb,
  2627. plat_priv);
  2628. if (ret)
  2629. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  2630. ret);
  2631. return 0;
  2632. }
  2633. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  2634. {
  2635. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  2636. plat_priv);
  2637. complete_all(&plat_priv->recovery_complete);
  2638. complete_all(&plat_priv->rddm_complete);
  2639. complete_all(&plat_priv->cal_complete);
  2640. complete_all(&plat_priv->power_up_complete);
  2641. complete_all(&plat_priv->daemon_connected);
  2642. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  2643. unregister_reboot_notifier(&plat_priv->reboot_nb);
  2644. unregister_pm_notifier(&cnss_pm_notifier);
  2645. del_timer(&plat_priv->fw_boot_timer);
  2646. wakeup_source_unregister(plat_priv->recovery_ws);
  2647. }
  2648. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  2649. {
  2650. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  2651. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  2652. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  2653. "qcom,wlan-cbc-enabled");
  2654. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  2655. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  2656. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  2657. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  2658. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  2659. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  2660. * enabled by default
  2661. */
  2662. plat_priv->adsp_pc_enabled = true;
  2663. }
  2664. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  2665. {
  2666. struct device *dev = &plat_priv->plat_dev->dev;
  2667. plat_priv->use_pm_domain =
  2668. of_property_read_bool(dev->of_node, "use-pm-domain");
  2669. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  2670. }
  2671. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  2672. {
  2673. struct device *dev = &plat_priv->plat_dev->dev;
  2674. plat_priv->set_wlaon_pwr_ctrl =
  2675. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  2676. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  2677. plat_priv->set_wlaon_pwr_ctrl);
  2678. }
  2679. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  2680. {
  2681. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  2682. "qcom,converged-dt") ||
  2683. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  2684. "qcom,same-dt-multi-dev"));
  2685. }
  2686. static const struct platform_device_id cnss_platform_id_table[] = {
  2687. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  2688. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  2689. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  2690. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  2691. { .name = "wcn7850", .driver_data = WCN7850_DEVICE_ID, },
  2692. { },
  2693. };
  2694. static const struct of_device_id cnss_of_match_table[] = {
  2695. {
  2696. .compatible = "qcom,cnss",
  2697. .data = (void *)&cnss_platform_id_table[0]},
  2698. {
  2699. .compatible = "qcom,cnss-qca6290",
  2700. .data = (void *)&cnss_platform_id_table[1]},
  2701. {
  2702. .compatible = "qcom,cnss-qca6390",
  2703. .data = (void *)&cnss_platform_id_table[2]},
  2704. {
  2705. .compatible = "qcom,cnss-qca6490",
  2706. .data = (void *)&cnss_platform_id_table[3]},
  2707. {
  2708. .compatible = "qcom,cnss-wcn7850",
  2709. .data = (void *)&cnss_platform_id_table[4]},
  2710. { },
  2711. };
  2712. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  2713. static inline bool
  2714. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  2715. {
  2716. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  2717. "use-nv-mac");
  2718. }
  2719. static int cnss_probe(struct platform_device *plat_dev)
  2720. {
  2721. int ret = 0;
  2722. struct cnss_plat_data *plat_priv;
  2723. const struct of_device_id *of_id;
  2724. const struct platform_device_id *device_id;
  2725. int retry = 0;
  2726. if (cnss_get_plat_priv(plat_dev)) {
  2727. cnss_pr_err("Driver is already initialized!\n");
  2728. ret = -EEXIST;
  2729. goto out;
  2730. }
  2731. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  2732. if (!of_id || !of_id->data) {
  2733. cnss_pr_err("Failed to find of match device!\n");
  2734. ret = -ENODEV;
  2735. goto out;
  2736. }
  2737. device_id = of_id->data;
  2738. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  2739. GFP_KERNEL);
  2740. if (!plat_priv) {
  2741. ret = -ENOMEM;
  2742. goto out;
  2743. }
  2744. plat_priv->plat_dev = plat_dev;
  2745. plat_priv->device_id = device_id->driver_data;
  2746. plat_priv->bus_type = cnss_get_bus_type(plat_priv->device_id);
  2747. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  2748. plat_priv->use_fw_path_with_prefix =
  2749. cnss_use_fw_path_with_prefix(plat_priv);
  2750. cnss_set_plat_priv(plat_dev, plat_priv);
  2751. platform_set_drvdata(plat_dev, plat_priv);
  2752. INIT_LIST_HEAD(&plat_priv->vreg_list);
  2753. INIT_LIST_HEAD(&plat_priv->clk_list);
  2754. cnss_get_pm_domain_info(plat_priv);
  2755. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  2756. cnss_get_tcs_info(plat_priv);
  2757. cnss_get_cpr_info(plat_priv);
  2758. cnss_aop_mbox_init(plat_priv);
  2759. cnss_init_control_params(plat_priv);
  2760. ret = cnss_get_resources(plat_priv);
  2761. if (ret)
  2762. goto reset_ctx;
  2763. ret = cnss_register_esoc(plat_priv);
  2764. if (ret)
  2765. goto free_res;
  2766. ret = cnss_register_bus_scale(plat_priv);
  2767. if (ret)
  2768. goto unreg_esoc;
  2769. ret = cnss_create_sysfs(plat_priv);
  2770. if (ret)
  2771. goto unreg_bus_scale;
  2772. ret = cnss_event_work_init(plat_priv);
  2773. if (ret)
  2774. goto remove_sysfs;
  2775. ret = cnss_qmi_init(plat_priv);
  2776. if (ret)
  2777. goto deinit_event_work;
  2778. ret = cnss_dms_init(plat_priv);
  2779. if (ret)
  2780. goto deinit_qmi;
  2781. ret = cnss_debugfs_create(plat_priv);
  2782. if (ret)
  2783. goto deinit_dms;
  2784. ret = cnss_misc_init(plat_priv);
  2785. if (ret)
  2786. goto destroy_debugfs;
  2787. /* Make sure all platform related init are done before
  2788. * device power on and bus init.
  2789. */
  2790. if (!test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks)) {
  2791. retry:
  2792. ret = cnss_power_on_device(plat_priv);
  2793. if (ret)
  2794. goto deinit_misc;
  2795. ret = cnss_bus_init(plat_priv);
  2796. if (ret) {
  2797. if ((ret != -EPROBE_DEFER) &&
  2798. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  2799. cnss_power_off_device(plat_priv);
  2800. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  2801. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  2802. goto retry;
  2803. }
  2804. goto power_off;
  2805. }
  2806. }
  2807. cnss_register_coex_service(plat_priv);
  2808. cnss_register_ims_service(plat_priv);
  2809. ret = cnss_genl_init();
  2810. if (ret < 0)
  2811. cnss_pr_err("CNSS genl init failed %d\n", ret);
  2812. cnss_pr_info("Platform driver probed successfully.\n");
  2813. return 0;
  2814. power_off:
  2815. if (!test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  2816. cnss_power_off_device(plat_priv);
  2817. deinit_misc:
  2818. cnss_misc_deinit(plat_priv);
  2819. destroy_debugfs:
  2820. cnss_debugfs_destroy(plat_priv);
  2821. deinit_dms:
  2822. cnss_dms_deinit(plat_priv);
  2823. deinit_qmi:
  2824. cnss_qmi_deinit(plat_priv);
  2825. deinit_event_work:
  2826. cnss_event_work_deinit(plat_priv);
  2827. remove_sysfs:
  2828. cnss_remove_sysfs(plat_priv);
  2829. unreg_bus_scale:
  2830. cnss_unregister_bus_scale(plat_priv);
  2831. unreg_esoc:
  2832. cnss_unregister_esoc(plat_priv);
  2833. free_res:
  2834. cnss_put_resources(plat_priv);
  2835. reset_ctx:
  2836. platform_set_drvdata(plat_dev, NULL);
  2837. cnss_set_plat_priv(plat_dev, NULL);
  2838. out:
  2839. return ret;
  2840. }
  2841. static int cnss_remove(struct platform_device *plat_dev)
  2842. {
  2843. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  2844. cnss_genl_exit();
  2845. cnss_unregister_ims_service(plat_priv);
  2846. cnss_unregister_coex_service(plat_priv);
  2847. cnss_bus_deinit(plat_priv);
  2848. cnss_misc_deinit(plat_priv);
  2849. cnss_debugfs_destroy(plat_priv);
  2850. cnss_dms_deinit(plat_priv);
  2851. cnss_qmi_deinit(plat_priv);
  2852. cnss_event_work_deinit(plat_priv);
  2853. cnss_remove_sysfs(plat_priv);
  2854. cnss_unregister_bus_scale(plat_priv);
  2855. cnss_unregister_esoc(plat_priv);
  2856. cnss_put_resources(plat_priv);
  2857. platform_set_drvdata(plat_dev, NULL);
  2858. plat_env = NULL;
  2859. return 0;
  2860. }
  2861. static struct platform_driver cnss_platform_driver = {
  2862. .probe = cnss_probe,
  2863. .remove = cnss_remove,
  2864. .driver = {
  2865. .name = "cnss2",
  2866. .of_match_table = cnss_of_match_table,
  2867. #ifdef CONFIG_CNSS_ASYNC
  2868. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  2869. #endif
  2870. },
  2871. };
  2872. /**
  2873. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  2874. *
  2875. * Valid device tree node means a node with "compatible" property from the
  2876. * device match table and "status" property is not disabled.
  2877. *
  2878. * Return: true if valid device tree node found, false if not found
  2879. */
  2880. static bool cnss_is_valid_dt_node_found(void)
  2881. {
  2882. struct device_node *dn = NULL;
  2883. for_each_matching_node(dn, cnss_of_match_table) {
  2884. if (of_device_is_available(dn))
  2885. break;
  2886. }
  2887. if (dn)
  2888. return true;
  2889. return false;
  2890. }
  2891. static int __init cnss_initialize(void)
  2892. {
  2893. int ret = 0;
  2894. if (!cnss_is_valid_dt_node_found())
  2895. return -ENODEV;
  2896. cnss_debug_init();
  2897. ret = platform_driver_register(&cnss_platform_driver);
  2898. if (ret)
  2899. cnss_debug_deinit();
  2900. return ret;
  2901. }
  2902. static void __exit cnss_exit(void)
  2903. {
  2904. platform_driver_unregister(&cnss_platform_driver);
  2905. cnss_debug_deinit();
  2906. }
  2907. module_init(cnss_initialize);
  2908. module_exit(cnss_exit);
  2909. MODULE_LICENSE("GPL v2");
  2910. MODULE_DESCRIPTION("CNSS2 Platform Driver");