debug.c 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved. */
  3. #include <linux/err.h>
  4. #include <linux/seq_file.h>
  5. #include <linux/debugfs.h>
  6. #include "main.h"
  7. #include "bus.h"
  8. #include "debug.h"
  9. #include "pci.h"
  10. #define MMIO_REG_ACCESS_MEM_TYPE 0xFF
  11. #define MMIO_REG_RAW_ACCESS_MEM_TYPE 0xFE
  12. #if IS_ENABLED(CONFIG_IPC_LOGGING)
  13. void *cnss_ipc_log_context;
  14. void *cnss_ipc_log_long_context;
  15. #endif
  16. static int cnss_pin_connect_show(struct seq_file *s, void *data)
  17. {
  18. struct cnss_plat_data *cnss_priv = s->private;
  19. seq_puts(s, "Pin connect results\n");
  20. seq_printf(s, "FW power pin result: %04x\n",
  21. cnss_priv->pin_result.fw_pwr_pin_result);
  22. seq_printf(s, "FW PHY IO pin result: %04x\n",
  23. cnss_priv->pin_result.fw_phy_io_pin_result);
  24. seq_printf(s, "FW RF pin result: %04x\n",
  25. cnss_priv->pin_result.fw_rf_pin_result);
  26. seq_printf(s, "Host pin result: %04x\n",
  27. cnss_priv->pin_result.host_pin_result);
  28. seq_puts(s, "\n");
  29. return 0;
  30. }
  31. static int cnss_pin_connect_open(struct inode *inode, struct file *file)
  32. {
  33. return single_open(file, cnss_pin_connect_show, inode->i_private);
  34. }
  35. static const struct file_operations cnss_pin_connect_fops = {
  36. .read = seq_read,
  37. .release = single_release,
  38. .open = cnss_pin_connect_open,
  39. .owner = THIS_MODULE,
  40. .llseek = seq_lseek,
  41. };
  42. static int cnss_stats_show_state(struct seq_file *s,
  43. struct cnss_plat_data *plat_priv)
  44. {
  45. enum cnss_driver_state i;
  46. int skip = 0;
  47. unsigned long state;
  48. seq_printf(s, "\nState: 0x%lx(", plat_priv->driver_state);
  49. for (i = 0, state = plat_priv->driver_state; state != 0;
  50. state >>= 1, i++) {
  51. if (!(state & 0x1))
  52. continue;
  53. if (skip++)
  54. seq_puts(s, " | ");
  55. switch (i) {
  56. case CNSS_QMI_WLFW_CONNECTED:
  57. seq_puts(s, "QMI_WLFW_CONNECTED");
  58. continue;
  59. case CNSS_FW_MEM_READY:
  60. seq_puts(s, "FW_MEM_READY");
  61. continue;
  62. case CNSS_FW_READY:
  63. seq_puts(s, "FW_READY");
  64. continue;
  65. case CNSS_IN_COLD_BOOT_CAL:
  66. seq_puts(s, "IN_COLD_BOOT_CAL");
  67. continue;
  68. case CNSS_DRIVER_LOADING:
  69. seq_puts(s, "DRIVER_LOADING");
  70. continue;
  71. case CNSS_DRIVER_UNLOADING:
  72. seq_puts(s, "DRIVER_UNLOADING");
  73. continue;
  74. case CNSS_DRIVER_IDLE_RESTART:
  75. seq_puts(s, "IDLE_RESTART");
  76. continue;
  77. case CNSS_DRIVER_IDLE_SHUTDOWN:
  78. seq_puts(s, "IDLE_SHUTDOWN");
  79. continue;
  80. case CNSS_DRIVER_PROBED:
  81. seq_puts(s, "DRIVER_PROBED");
  82. continue;
  83. case CNSS_DRIVER_RECOVERY:
  84. seq_puts(s, "DRIVER_RECOVERY");
  85. continue;
  86. case CNSS_FW_BOOT_RECOVERY:
  87. seq_puts(s, "FW_BOOT_RECOVERY");
  88. continue;
  89. case CNSS_DEV_ERR_NOTIFY:
  90. seq_puts(s, "DEV_ERR");
  91. continue;
  92. case CNSS_DRIVER_DEBUG:
  93. seq_puts(s, "DRIVER_DEBUG");
  94. continue;
  95. case CNSS_COEX_CONNECTED:
  96. seq_puts(s, "COEX_CONNECTED");
  97. continue;
  98. case CNSS_IMS_CONNECTED:
  99. seq_puts(s, "IMS_CONNECTED");
  100. continue;
  101. case CNSS_IN_SUSPEND_RESUME:
  102. seq_puts(s, "IN_SUSPEND_RESUME");
  103. continue;
  104. case CNSS_IN_REBOOT:
  105. seq_puts(s, "IN_REBOOT");
  106. continue;
  107. case CNSS_COLD_BOOT_CAL_DONE:
  108. seq_puts(s, "COLD_BOOT_CAL_DONE");
  109. continue;
  110. case CNSS_IN_PANIC:
  111. seq_puts(s, "IN_PANIC");
  112. continue;
  113. case CNSS_QMI_DEL_SERVER:
  114. seq_puts(s, "DEL_SERVER_IN_PROGRESS");
  115. continue;
  116. case CNSS_QMI_DMS_CONNECTED:
  117. seq_puts(s, "DMS_CONNECTED");
  118. continue;
  119. case CNSS_DAEMON_CONNECTED:
  120. seq_puts(s, "DAEMON_CONNECTED");
  121. continue;
  122. case CNSS_PCI_PROBE_DONE:
  123. seq_puts(s, "PCI PROBE DONE");
  124. continue;
  125. }
  126. seq_printf(s, "UNKNOWN-%d", i);
  127. }
  128. seq_puts(s, ")\n");
  129. return 0;
  130. }
  131. static int cnss_stats_show(struct seq_file *s, void *data)
  132. {
  133. struct cnss_plat_data *plat_priv = s->private;
  134. cnss_stats_show_state(s, plat_priv);
  135. return 0;
  136. }
  137. static int cnss_stats_open(struct inode *inode, struct file *file)
  138. {
  139. return single_open(file, cnss_stats_show, inode->i_private);
  140. }
  141. static const struct file_operations cnss_stats_fops = {
  142. .read = seq_read,
  143. .release = single_release,
  144. .open = cnss_stats_open,
  145. .owner = THIS_MODULE,
  146. .llseek = seq_lseek,
  147. };
  148. static ssize_t cnss_dev_boot_debug_write(struct file *fp,
  149. const char __user *user_buf,
  150. size_t count, loff_t *off)
  151. {
  152. struct cnss_plat_data *plat_priv =
  153. ((struct seq_file *)fp->private_data)->private;
  154. struct cnss_pci_data *pci_priv;
  155. char buf[64];
  156. char *cmd;
  157. unsigned int len = 0;
  158. int ret = 0;
  159. if (!plat_priv)
  160. return -ENODEV;
  161. len = min(count, sizeof(buf) - 1);
  162. if (copy_from_user(buf, user_buf, len))
  163. return -EFAULT;
  164. buf[len] = '\0';
  165. cmd = buf;
  166. cnss_pr_dbg("Received dev_boot debug command: %s\n", cmd);
  167. if (sysfs_streq(cmd, "on")) {
  168. ret = cnss_power_on_device(plat_priv);
  169. } else if (sysfs_streq(cmd, "off")) {
  170. cnss_power_off_device(plat_priv);
  171. } else if (sysfs_streq(cmd, "enumerate")) {
  172. ret = cnss_pci_init(plat_priv);
  173. } else if (sysfs_streq(cmd, "powerup")) {
  174. set_bit(CNSS_DRIVER_DEBUG, &plat_priv->driver_state);
  175. ret = cnss_driver_event_post(plat_priv,
  176. CNSS_DRIVER_EVENT_POWER_UP,
  177. CNSS_EVENT_SYNC, NULL);
  178. } else if (sysfs_streq(cmd, "shutdown")) {
  179. ret = cnss_driver_event_post(plat_priv,
  180. CNSS_DRIVER_EVENT_POWER_DOWN,
  181. 0, NULL);
  182. clear_bit(CNSS_DRIVER_DEBUG, &plat_priv->driver_state);
  183. } else {
  184. pci_priv = plat_priv->bus_priv;
  185. if (!pci_priv)
  186. return -ENODEV;
  187. if (sysfs_streq(cmd, "download")) {
  188. set_bit(CNSS_DRIVER_DEBUG, &plat_priv->driver_state);
  189. ret = cnss_pci_start_mhi(pci_priv);
  190. } else if (sysfs_streq(cmd, "linkup")) {
  191. ret = cnss_resume_pci_link(pci_priv);
  192. } else if (sysfs_streq(cmd, "linkdown")) {
  193. ret = cnss_suspend_pci_link(pci_priv);
  194. } else if (sysfs_streq(cmd, "assert")) {
  195. cnss_pr_info("FW Assert triggered for debug\n");
  196. ret = cnss_force_fw_assert(&pci_priv->pci_dev->dev);
  197. } else if (sysfs_streq(cmd, "set_cbc_done")) {
  198. cnss_pr_dbg("Force set cold boot cal done status\n");
  199. set_bit(CNSS_COLD_BOOT_CAL_DONE,
  200. &plat_priv->driver_state);
  201. } else {
  202. cnss_pr_err("Device boot debugfs command is invalid\n");
  203. ret = -EINVAL;
  204. }
  205. }
  206. if (ret < 0)
  207. return ret;
  208. return count;
  209. }
  210. static int cnss_dev_boot_debug_show(struct seq_file *s, void *data)
  211. {
  212. seq_puts(s, "\nUsage: echo <action> > <debugfs_path>/cnss/dev_boot\n");
  213. seq_puts(s, "<action> can be one of below:\n");
  214. seq_puts(s, "on: turn on device power, assert WLAN_EN\n");
  215. seq_puts(s, "off: de-assert WLAN_EN, turn off device power\n");
  216. seq_puts(s, "enumerate: de-assert PERST, enumerate PCIe\n");
  217. seq_puts(s, "download: download FW and do QMI handshake with FW\n");
  218. seq_puts(s, "linkup: bring up PCIe link\n");
  219. seq_puts(s, "linkdown: bring down PCIe link\n");
  220. seq_puts(s, "powerup: full power on sequence to boot device, download FW and do QMI handshake with FW\n");
  221. seq_puts(s, "shutdown: full power off sequence to shutdown device\n");
  222. seq_puts(s, "assert: trigger firmware assert\n");
  223. seq_puts(s, "set_cbc_done: Set cold boot calibration done status\n");
  224. return 0;
  225. }
  226. static int cnss_dev_boot_debug_open(struct inode *inode, struct file *file)
  227. {
  228. return single_open(file, cnss_dev_boot_debug_show, inode->i_private);
  229. }
  230. static const struct file_operations cnss_dev_boot_debug_fops = {
  231. .read = seq_read,
  232. .write = cnss_dev_boot_debug_write,
  233. .release = single_release,
  234. .open = cnss_dev_boot_debug_open,
  235. .owner = THIS_MODULE,
  236. .llseek = seq_lseek,
  237. };
  238. static int cnss_reg_read_debug_show(struct seq_file *s, void *data)
  239. {
  240. struct cnss_plat_data *plat_priv = s->private;
  241. mutex_lock(&plat_priv->dev_lock);
  242. if (!plat_priv->diag_reg_read_buf) {
  243. seq_puts(s, "\nUsage: echo <mem_type> <offset> <data_len> > <debugfs_path>/cnss/reg_read\n");
  244. seq_puts(s, "Use mem_type = 0xff for register read by IO access, data_len will be ignored\n");
  245. seq_puts(s, "Use mem_type = 0xfe for register read by raw IO access which skips sanity checks, data_len will be ignored\n");
  246. seq_puts(s, "Use other mem_type for register read by QMI\n");
  247. mutex_unlock(&plat_priv->dev_lock);
  248. return 0;
  249. }
  250. seq_printf(s, "\nRegister read, address: 0x%x memory type: 0x%x length: 0x%x\n\n",
  251. plat_priv->diag_reg_read_addr,
  252. plat_priv->diag_reg_read_mem_type,
  253. plat_priv->diag_reg_read_len);
  254. seq_hex_dump(s, "", DUMP_PREFIX_OFFSET, 32, 4,
  255. plat_priv->diag_reg_read_buf,
  256. plat_priv->diag_reg_read_len, false);
  257. plat_priv->diag_reg_read_len = 0;
  258. kfree(plat_priv->diag_reg_read_buf);
  259. plat_priv->diag_reg_read_buf = NULL;
  260. mutex_unlock(&plat_priv->dev_lock);
  261. return 0;
  262. }
  263. static ssize_t cnss_reg_read_debug_write(struct file *fp,
  264. const char __user *user_buf,
  265. size_t count, loff_t *off)
  266. {
  267. struct cnss_plat_data *plat_priv =
  268. ((struct seq_file *)fp->private_data)->private;
  269. char buf[64];
  270. char *sptr, *token;
  271. unsigned int len = 0;
  272. u32 reg_offset, mem_type;
  273. u32 data_len = 0, reg_val = 0;
  274. u8 *reg_buf = NULL;
  275. const char *delim = " ";
  276. int ret = 0;
  277. len = min(count, sizeof(buf) - 1);
  278. if (copy_from_user(buf, user_buf, len))
  279. return -EFAULT;
  280. buf[len] = '\0';
  281. sptr = buf;
  282. token = strsep(&sptr, delim);
  283. if (!token)
  284. return -EINVAL;
  285. if (!sptr)
  286. return -EINVAL;
  287. if (kstrtou32(token, 0, &mem_type))
  288. return -EINVAL;
  289. token = strsep(&sptr, delim);
  290. if (!token)
  291. return -EINVAL;
  292. if (!sptr)
  293. return -EINVAL;
  294. if (kstrtou32(token, 0, &reg_offset))
  295. return -EINVAL;
  296. token = strsep(&sptr, delim);
  297. if (!token)
  298. return -EINVAL;
  299. if (kstrtou32(token, 0, &data_len))
  300. return -EINVAL;
  301. if (mem_type == MMIO_REG_ACCESS_MEM_TYPE ||
  302. mem_type == MMIO_REG_RAW_ACCESS_MEM_TYPE) {
  303. ret = cnss_bus_debug_reg_read(plat_priv, reg_offset, &reg_val,
  304. mem_type ==
  305. MMIO_REG_RAW_ACCESS_MEM_TYPE);
  306. if (ret)
  307. return ret;
  308. cnss_pr_dbg("Read 0x%x from register offset 0x%x\n", reg_val,
  309. reg_offset);
  310. return count;
  311. }
  312. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  313. cnss_pr_err("Firmware is not ready yet\n");
  314. return -EINVAL;
  315. }
  316. mutex_lock(&plat_priv->dev_lock);
  317. kfree(plat_priv->diag_reg_read_buf);
  318. plat_priv->diag_reg_read_buf = NULL;
  319. reg_buf = kzalloc(data_len, GFP_KERNEL);
  320. if (!reg_buf) {
  321. mutex_unlock(&plat_priv->dev_lock);
  322. return -ENOMEM;
  323. }
  324. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, reg_offset,
  325. mem_type, data_len,
  326. reg_buf);
  327. if (ret) {
  328. kfree(reg_buf);
  329. mutex_unlock(&plat_priv->dev_lock);
  330. return ret;
  331. }
  332. plat_priv->diag_reg_read_addr = reg_offset;
  333. plat_priv->diag_reg_read_mem_type = mem_type;
  334. plat_priv->diag_reg_read_len = data_len;
  335. plat_priv->diag_reg_read_buf = reg_buf;
  336. mutex_unlock(&plat_priv->dev_lock);
  337. return count;
  338. }
  339. static int cnss_reg_read_debug_open(struct inode *inode, struct file *file)
  340. {
  341. return single_open(file, cnss_reg_read_debug_show, inode->i_private);
  342. }
  343. static const struct file_operations cnss_reg_read_debug_fops = {
  344. .read = seq_read,
  345. .write = cnss_reg_read_debug_write,
  346. .open = cnss_reg_read_debug_open,
  347. .owner = THIS_MODULE,
  348. .llseek = seq_lseek,
  349. };
  350. static int cnss_reg_write_debug_show(struct seq_file *s, void *data)
  351. {
  352. seq_puts(s, "\nUsage: echo <mem_type> <offset> <reg_val> > <debugfs_path>/cnss/reg_write\n");
  353. seq_puts(s, "Use mem_type = 0xff for register write by IO access\n");
  354. seq_puts(s, "Use mem_type = 0xfe for register write by raw IO access which skips sanity checks\n");
  355. seq_puts(s, "Use other mem_type for register write by QMI\n");
  356. return 0;
  357. }
  358. static ssize_t cnss_reg_write_debug_write(struct file *fp,
  359. const char __user *user_buf,
  360. size_t count, loff_t *off)
  361. {
  362. struct cnss_plat_data *plat_priv =
  363. ((struct seq_file *)fp->private_data)->private;
  364. char buf[64];
  365. char *sptr, *token;
  366. unsigned int len = 0;
  367. u32 reg_offset, mem_type, reg_val;
  368. const char *delim = " ";
  369. int ret = 0;
  370. len = min(count, sizeof(buf) - 1);
  371. if (copy_from_user(buf, user_buf, len))
  372. return -EFAULT;
  373. buf[len] = '\0';
  374. sptr = buf;
  375. token = strsep(&sptr, delim);
  376. if (!token)
  377. return -EINVAL;
  378. if (!sptr)
  379. return -EINVAL;
  380. if (kstrtou32(token, 0, &mem_type))
  381. return -EINVAL;
  382. token = strsep(&sptr, delim);
  383. if (!token)
  384. return -EINVAL;
  385. if (!sptr)
  386. return -EINVAL;
  387. if (kstrtou32(token, 0, &reg_offset))
  388. return -EINVAL;
  389. token = strsep(&sptr, delim);
  390. if (!token)
  391. return -EINVAL;
  392. if (kstrtou32(token, 0, &reg_val))
  393. return -EINVAL;
  394. if (mem_type == MMIO_REG_ACCESS_MEM_TYPE ||
  395. mem_type == MMIO_REG_RAW_ACCESS_MEM_TYPE) {
  396. ret = cnss_bus_debug_reg_write(plat_priv, reg_offset, reg_val,
  397. mem_type ==
  398. MMIO_REG_RAW_ACCESS_MEM_TYPE);
  399. if (ret)
  400. return ret;
  401. cnss_pr_dbg("Wrote 0x%x to register offset 0x%x\n", reg_val,
  402. reg_offset);
  403. return count;
  404. }
  405. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  406. cnss_pr_err("Firmware is not ready yet\n");
  407. return -EINVAL;
  408. }
  409. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, reg_offset, mem_type,
  410. sizeof(u32),
  411. (u8 *)&reg_val);
  412. if (ret)
  413. return ret;
  414. return count;
  415. }
  416. static int cnss_reg_write_debug_open(struct inode *inode, struct file *file)
  417. {
  418. return single_open(file, cnss_reg_write_debug_show, inode->i_private);
  419. }
  420. static const struct file_operations cnss_reg_write_debug_fops = {
  421. .read = seq_read,
  422. .write = cnss_reg_write_debug_write,
  423. .open = cnss_reg_write_debug_open,
  424. .owner = THIS_MODULE,
  425. .llseek = seq_lseek,
  426. };
  427. static ssize_t cnss_runtime_pm_debug_write(struct file *fp,
  428. const char __user *user_buf,
  429. size_t count, loff_t *off)
  430. {
  431. struct cnss_plat_data *plat_priv =
  432. ((struct seq_file *)fp->private_data)->private;
  433. struct cnss_pci_data *pci_priv;
  434. char buf[64];
  435. char *cmd;
  436. unsigned int len = 0;
  437. int ret = 0;
  438. if (!plat_priv)
  439. return -ENODEV;
  440. pci_priv = plat_priv->bus_priv;
  441. if (!pci_priv)
  442. return -ENODEV;
  443. len = min(count, sizeof(buf) - 1);
  444. if (copy_from_user(buf, user_buf, len))
  445. return -EFAULT;
  446. buf[len] = '\0';
  447. cmd = buf;
  448. if (sysfs_streq(cmd, "usage_count")) {
  449. cnss_pci_pm_runtime_show_usage_count(pci_priv);
  450. } else if (sysfs_streq(cmd, "request_resume")) {
  451. ret = cnss_pci_pm_request_resume(pci_priv);
  452. } else if (sysfs_streq(cmd, "resume")) {
  453. ret = cnss_pci_pm_runtime_resume(pci_priv);
  454. } else if (sysfs_streq(cmd, "get")) {
  455. ret = cnss_pci_pm_runtime_get(pci_priv, RTPM_ID_CNSS);
  456. } else if (sysfs_streq(cmd, "get_noresume")) {
  457. cnss_pci_pm_runtime_get_noresume(pci_priv, RTPM_ID_CNSS);
  458. } else if (sysfs_streq(cmd, "put_autosuspend")) {
  459. ret = cnss_pci_pm_runtime_put_autosuspend(pci_priv,
  460. RTPM_ID_CNSS);
  461. } else if (sysfs_streq(cmd, "put_noidle")) {
  462. cnss_pci_pm_runtime_put_noidle(pci_priv, RTPM_ID_CNSS);
  463. } else if (sysfs_streq(cmd, "mark_last_busy")) {
  464. cnss_pci_pm_runtime_mark_last_busy(pci_priv);
  465. } else if (sysfs_streq(cmd, "resume_bus")) {
  466. cnss_pci_resume_bus(pci_priv);
  467. } else if (sysfs_streq(cmd, "suspend_bus")) {
  468. cnss_pci_suspend_bus(pci_priv);
  469. } else {
  470. cnss_pr_err("Runtime PM debugfs command is invalid\n");
  471. ret = -EINVAL;
  472. }
  473. if (ret < 0)
  474. return ret;
  475. return count;
  476. }
  477. static int cnss_runtime_pm_debug_show(struct seq_file *s, void *data)
  478. {
  479. struct cnss_plat_data *plat_priv = s->private;
  480. struct cnss_pci_data *pci_priv;
  481. int i;
  482. if (!plat_priv)
  483. return -ENODEV;
  484. pci_priv = plat_priv->bus_priv;
  485. if (!pci_priv)
  486. return -ENODEV;
  487. seq_puts(s, "\nUsage: echo <action> > <debugfs_path>/cnss/runtime_pm\n");
  488. seq_puts(s, "<action> can be one of below:\n");
  489. seq_puts(s, "usage_count: get runtime PM usage count\n");
  490. seq_puts(s, "reques_resume: do async runtime PM resume\n");
  491. seq_puts(s, "resume: do sync runtime PM resume\n");
  492. seq_puts(s, "get: do runtime PM get\n");
  493. seq_puts(s, "get_noresume: do runtime PM get noresume\n");
  494. seq_puts(s, "put_noidle: do runtime PM put noidle\n");
  495. seq_puts(s, "put_autosuspend: do runtime PM put autosuspend\n");
  496. seq_puts(s, "mark_last_busy: do runtime PM mark last busy\n");
  497. seq_puts(s, "resume_bus: do bus resume only\n");
  498. seq_puts(s, "suspend_bus: do bus suspend only\n");
  499. seq_puts(s, "\nStats:\n");
  500. seq_printf(s, "%s: %u\n", "get count",
  501. atomic_read(&pci_priv->pm_stats.runtime_get));
  502. seq_printf(s, "%s: %u\n", "put count",
  503. atomic_read(&pci_priv->pm_stats.runtime_put));
  504. seq_printf(s, "%-10s%-10s%-10s%-15s%-15s\n",
  505. "id:", "get", "put", "get time(us)", "put time(us)");
  506. for (i = 0; i < RTPM_ID_MAX; i++) {
  507. seq_printf(s, "%d%-9s", i, ":");
  508. seq_printf(s, "%-10d",
  509. atomic_read(&pci_priv->pm_stats.runtime_get_id[i]));
  510. seq_printf(s, "%-10d",
  511. atomic_read(&pci_priv->pm_stats.runtime_put_id[i]));
  512. seq_printf(s, "%-15llu",
  513. pci_priv->pm_stats.runtime_get_timestamp_id[i]);
  514. seq_printf(s, "%-15llu\n",
  515. pci_priv->pm_stats.runtime_put_timestamp_id[i]);
  516. }
  517. return 0;
  518. }
  519. static int cnss_runtime_pm_debug_open(struct inode *inode, struct file *file)
  520. {
  521. return single_open(file, cnss_runtime_pm_debug_show, inode->i_private);
  522. }
  523. static const struct file_operations cnss_runtime_pm_debug_fops = {
  524. .read = seq_read,
  525. .write = cnss_runtime_pm_debug_write,
  526. .open = cnss_runtime_pm_debug_open,
  527. .owner = THIS_MODULE,
  528. .llseek = seq_lseek,
  529. };
  530. static ssize_t cnss_control_params_debug_write(struct file *fp,
  531. const char __user *user_buf,
  532. size_t count, loff_t *off)
  533. {
  534. struct cnss_plat_data *plat_priv =
  535. ((struct seq_file *)fp->private_data)->private;
  536. char buf[64];
  537. char *sptr, *token;
  538. char *cmd;
  539. u32 val;
  540. unsigned int len = 0;
  541. const char *delim = " ";
  542. if (!plat_priv)
  543. return -ENODEV;
  544. len = min(count, sizeof(buf) - 1);
  545. if (copy_from_user(buf, user_buf, len))
  546. return -EFAULT;
  547. buf[len] = '\0';
  548. sptr = buf;
  549. token = strsep(&sptr, delim);
  550. if (!token)
  551. return -EINVAL;
  552. if (!sptr)
  553. return -EINVAL;
  554. cmd = token;
  555. token = strsep(&sptr, delim);
  556. if (!token)
  557. return -EINVAL;
  558. if (kstrtou32(token, 0, &val))
  559. return -EINVAL;
  560. if (strcmp(cmd, "quirks") == 0)
  561. plat_priv->ctrl_params.quirks = val;
  562. else if (strcmp(cmd, "mhi_timeout") == 0)
  563. plat_priv->ctrl_params.mhi_timeout = val;
  564. else if (strcmp(cmd, "mhi_m2_timeout") == 0)
  565. plat_priv->ctrl_params.mhi_m2_timeout = val;
  566. else if (strcmp(cmd, "qmi_timeout") == 0)
  567. plat_priv->ctrl_params.qmi_timeout = val;
  568. else if (strcmp(cmd, "bdf_type") == 0)
  569. plat_priv->ctrl_params.bdf_type = val;
  570. else if (strcmp(cmd, "time_sync_period") == 0)
  571. plat_priv->ctrl_params.time_sync_period = val;
  572. else
  573. return -EINVAL;
  574. return count;
  575. }
  576. static int cnss_show_quirks_state(struct seq_file *s,
  577. struct cnss_plat_data *plat_priv)
  578. {
  579. enum cnss_debug_quirks i;
  580. int skip = 0;
  581. unsigned long state;
  582. seq_printf(s, "quirks: 0x%lx (", plat_priv->ctrl_params.quirks);
  583. for (i = 0, state = plat_priv->ctrl_params.quirks;
  584. state != 0; state >>= 1, i++) {
  585. if (!(state & 0x1))
  586. continue;
  587. if (skip++)
  588. seq_puts(s, " | ");
  589. switch (i) {
  590. case LINK_DOWN_SELF_RECOVERY:
  591. seq_puts(s, "LINK_DOWN_SELF_RECOVERY");
  592. continue;
  593. case SKIP_DEVICE_BOOT:
  594. seq_puts(s, "SKIP_DEVICE_BOOT");
  595. continue;
  596. case USE_CORE_ONLY_FW:
  597. seq_puts(s, "USE_CORE_ONLY_FW");
  598. continue;
  599. case SKIP_RECOVERY:
  600. seq_puts(s, "SKIP_RECOVERY");
  601. continue;
  602. case QMI_BYPASS:
  603. seq_puts(s, "QMI_BYPASS");
  604. continue;
  605. case ENABLE_WALTEST:
  606. seq_puts(s, "WALTEST");
  607. continue;
  608. case ENABLE_PCI_LINK_DOWN_PANIC:
  609. seq_puts(s, "PCI_LINK_DOWN_PANIC");
  610. continue;
  611. case FBC_BYPASS:
  612. seq_puts(s, "FBC_BYPASS");
  613. continue;
  614. case ENABLE_DAEMON_SUPPORT:
  615. seq_puts(s, "DAEMON_SUPPORT");
  616. continue;
  617. case DISABLE_DRV:
  618. seq_puts(s, "DISABLE_DRV");
  619. continue;
  620. case DISABLE_IO_COHERENCY:
  621. seq_puts(s, "DISABLE_IO_COHERENCY");
  622. continue;
  623. case IGNORE_PCI_LINK_FAILURE:
  624. seq_puts(s, "IGNORE_PCI_LINK_FAILURE");
  625. continue;
  626. case DISABLE_TIME_SYNC:
  627. seq_puts(s, "DISABLE_TIME_SYNC");
  628. continue;
  629. }
  630. seq_printf(s, "UNKNOWN-%d", i);
  631. }
  632. seq_puts(s, ")\n");
  633. return 0;
  634. }
  635. static int cnss_control_params_debug_show(struct seq_file *s, void *data)
  636. {
  637. struct cnss_plat_data *cnss_priv = s->private;
  638. seq_puts(s, "\nUsage: echo <params_name> <value> > <debugfs_path>/cnss/control_params\n");
  639. seq_puts(s, "<params_name> can be one of below:\n");
  640. seq_puts(s, "quirks: Debug quirks for driver\n");
  641. seq_puts(s, "mhi_timeout: Timeout for MHI operation in milliseconds\n");
  642. seq_puts(s, "qmi_timeout: Timeout for QMI message in milliseconds\n");
  643. seq_puts(s, "bdf_type: Type of board data file to be downloaded\n");
  644. seq_puts(s, "time_sync_period: Time period to do time sync with device in milliseconds\n");
  645. seq_puts(s, "\nCurrent value:\n");
  646. cnss_show_quirks_state(s, cnss_priv);
  647. seq_printf(s, "mhi_timeout: %u\n", cnss_priv->ctrl_params.mhi_timeout);
  648. seq_printf(s, "mhi_m2_timeout: %u\n",
  649. cnss_priv->ctrl_params.mhi_m2_timeout);
  650. seq_printf(s, "qmi_timeout: %u\n", cnss_priv->ctrl_params.qmi_timeout);
  651. seq_printf(s, "bdf_type: %u\n", cnss_priv->ctrl_params.bdf_type);
  652. seq_printf(s, "time_sync_period: %u\n",
  653. cnss_priv->ctrl_params.time_sync_period);
  654. return 0;
  655. }
  656. static int cnss_control_params_debug_open(struct inode *inode,
  657. struct file *file)
  658. {
  659. return single_open(file, cnss_control_params_debug_show,
  660. inode->i_private);
  661. }
  662. static const struct file_operations cnss_control_params_debug_fops = {
  663. .read = seq_read,
  664. .write = cnss_control_params_debug_write,
  665. .open = cnss_control_params_debug_open,
  666. .owner = THIS_MODULE,
  667. .llseek = seq_lseek,
  668. };
  669. static ssize_t cnss_dynamic_feature_write(struct file *fp,
  670. const char __user *user_buf,
  671. size_t count, loff_t *off)
  672. {
  673. struct cnss_plat_data *plat_priv =
  674. ((struct seq_file *)fp->private_data)->private;
  675. int ret = 0;
  676. u64 val;
  677. ret = kstrtou64_from_user(user_buf, count, 0, &val);
  678. if (ret)
  679. return ret;
  680. plat_priv->dynamic_feature = val;
  681. ret = cnss_wlfw_dynamic_feature_mask_send_sync(plat_priv);
  682. if (ret < 0)
  683. return ret;
  684. return count;
  685. }
  686. static int cnss_dynamic_feature_show(struct seq_file *s, void *data)
  687. {
  688. struct cnss_plat_data *cnss_priv = s->private;
  689. seq_printf(s, "dynamic_feature: 0x%llx\n", cnss_priv->dynamic_feature);
  690. return 0;
  691. }
  692. static int cnss_dynamic_feature_open(struct inode *inode,
  693. struct file *file)
  694. {
  695. return single_open(file, cnss_dynamic_feature_show,
  696. inode->i_private);
  697. }
  698. static const struct file_operations cnss_dynamic_feature_fops = {
  699. .read = seq_read,
  700. .write = cnss_dynamic_feature_write,
  701. .open = cnss_dynamic_feature_open,
  702. .owner = THIS_MODULE,
  703. .llseek = seq_lseek,
  704. };
  705. #ifdef CONFIG_DEBUG_FS
  706. #ifdef CONFIG_CNSS2_DEBUG
  707. static int cnss_create_debug_only_node(struct cnss_plat_data *plat_priv)
  708. {
  709. struct dentry *root_dentry = plat_priv->root_dentry;
  710. debugfs_create_file("dev_boot", 0600, root_dentry, plat_priv,
  711. &cnss_dev_boot_debug_fops);
  712. debugfs_create_file("reg_read", 0600, root_dentry, plat_priv,
  713. &cnss_reg_read_debug_fops);
  714. debugfs_create_file("reg_write", 0600, root_dentry, plat_priv,
  715. &cnss_reg_write_debug_fops);
  716. debugfs_create_file("runtime_pm", 0600, root_dentry, plat_priv,
  717. &cnss_runtime_pm_debug_fops);
  718. debugfs_create_file("control_params", 0600, root_dentry, plat_priv,
  719. &cnss_control_params_debug_fops);
  720. debugfs_create_file("dynamic_feature", 0600, root_dentry, plat_priv,
  721. &cnss_dynamic_feature_fops);
  722. return 0;
  723. }
  724. #else
  725. static int cnss_create_debug_only_node(struct cnss_plat_data *plat_priv)
  726. {
  727. return 0;
  728. }
  729. #endif
  730. int cnss_debugfs_create(struct cnss_plat_data *plat_priv)
  731. {
  732. int ret = 0;
  733. struct dentry *root_dentry;
  734. root_dentry = debugfs_create_dir("cnss", 0);
  735. if (IS_ERR(root_dentry)) {
  736. ret = PTR_ERR(root_dentry);
  737. cnss_pr_err("Unable to create debugfs %d\n", ret);
  738. goto out;
  739. }
  740. plat_priv->root_dentry = root_dentry;
  741. debugfs_create_file("pin_connect_result", 0644, root_dentry, plat_priv,
  742. &cnss_pin_connect_fops);
  743. debugfs_create_file("stats", 0644, root_dentry, plat_priv,
  744. &cnss_stats_fops);
  745. cnss_create_debug_only_node(plat_priv);
  746. out:
  747. return ret;
  748. }
  749. void cnss_debugfs_destroy(struct cnss_plat_data *plat_priv)
  750. {
  751. debugfs_remove_recursive(plat_priv->root_dentry);
  752. }
  753. #else
  754. int cnss_debugfs_create(struct cnss_plat_data *plat_priv)
  755. {
  756. plat_priv->root_dentry = NULL;
  757. return 0;
  758. }
  759. void cnss_debugfs_destroy(struct cnss_plat_data *plat_priv)
  760. {
  761. }
  762. #endif
  763. #if IS_ENABLED(CONFIG_IPC_LOGGING)
  764. void cnss_debug_ipc_log_print(void *log_ctx, char *process, const char *fn,
  765. const char *log_level, char *fmt, ...)
  766. {
  767. struct va_format vaf;
  768. va_list va_args;
  769. va_start(va_args, fmt);
  770. vaf.fmt = fmt;
  771. vaf.va = &va_args;
  772. if (log_level)
  773. printk("%scnss: %pV", log_level, &vaf);
  774. ipc_log_string(log_ctx, "[%s] %s: %pV", process, fn, &vaf);
  775. va_end(va_args);
  776. }
  777. static int cnss_ipc_logging_init(void)
  778. {
  779. cnss_ipc_log_context = ipc_log_context_create(CNSS_IPC_LOG_PAGES,
  780. "cnss", 0);
  781. if (!cnss_ipc_log_context) {
  782. cnss_pr_err("Unable to create IPC log context\n");
  783. return -EINVAL;
  784. }
  785. cnss_ipc_log_long_context = ipc_log_context_create(CNSS_IPC_LOG_PAGES,
  786. "cnss-long", 0);
  787. if (!cnss_ipc_log_long_context) {
  788. cnss_pr_err("Unable to create IPC long log context\n");
  789. ipc_log_context_destroy(cnss_ipc_log_context);
  790. return -EINVAL;
  791. }
  792. return 0;
  793. }
  794. static void cnss_ipc_logging_deinit(void)
  795. {
  796. if (cnss_ipc_log_long_context) {
  797. ipc_log_context_destroy(cnss_ipc_log_long_context);
  798. cnss_ipc_log_long_context = NULL;
  799. }
  800. if (cnss_ipc_log_context) {
  801. ipc_log_context_destroy(cnss_ipc_log_context);
  802. cnss_ipc_log_context = NULL;
  803. }
  804. }
  805. #else
  806. static int cnss_ipc_logging_init(void) { return 0; }
  807. static void cnss_ipc_logging_deinit(void) {}
  808. void cnss_debug_ipc_log_print(void *log_ctx, char *process, const char *fn,
  809. const char *log_level, char *fmt, ...)
  810. {
  811. struct va_format vaf;
  812. va_list va_args;
  813. va_start(va_args, fmt);
  814. vaf.fmt = fmt;
  815. vaf.va = &va_args;
  816. if (log_level)
  817. printk("%scnss: %pV", log_level, &vaf);
  818. va_end(va_args);
  819. }
  820. #endif
  821. int cnss_debug_init(void)
  822. {
  823. return cnss_ipc_logging_init();
  824. }
  825. void cnss_debug_deinit(void)
  826. {
  827. cnss_ipc_logging_deinit();
  828. }