main.c 146 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/thermal.h>
  20. #include <linux/version.h>
  21. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  22. #include <linux/panic_notifier.h>
  23. #endif
  24. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  25. #include <soc/qcom/minidump.h>
  26. #endif
  27. #include "cnss_plat_ipc_qmi.h"
  28. #include "cnss_utils.h"
  29. #include "main.h"
  30. #include "bus.h"
  31. #include "debug.h"
  32. #include "genl.h"
  33. #include "reg.h"
  34. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  35. #ifdef CONFIG_CNSS_HW_SECURE_SMEM
  36. #include <linux/soc/qcom/smem.h>
  37. #define PERISEC_SMEM_ID 651
  38. #define HW_WIFI_UID 0x508
  39. #else
  40. #include "smcinvoke.h"
  41. #include "smcinvoke_object.h"
  42. #include "IClientEnv.h"
  43. #define HW_STATE_UID 0x108
  44. #define HW_OP_GET_STATE 1
  45. #define HW_WIFI_UID 0x508
  46. #define FEATURE_NOT_SUPPORTED 12
  47. #define PERIPHERAL_NOT_FOUND 10
  48. #endif
  49. #endif
  50. #define CNSS_DUMP_FORMAT_VER 0x11
  51. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  52. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  53. #define CNSS_DUMP_NAME "CNSS_WLAN"
  54. #define CNSS_DUMP_DESC_SIZE 0x1000
  55. #define CNSS_DUMP_SEG_VER 0x1
  56. #define FILE_SYSTEM_READY 1
  57. #define FW_READY_TIMEOUT 20000
  58. #define FW_ASSERT_TIMEOUT 5000
  59. #define CNSS_EVENT_PENDING 2989
  60. #define POWER_RESET_MIN_DELAY_MS 100
  61. #define CNSS_QUIRKS_DEFAULT 0
  62. #ifdef CONFIG_CNSS_EMULATION
  63. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  64. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  65. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  66. #else
  67. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  68. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  69. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  70. #endif
  71. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  72. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  73. #define CNSS_MIN_TIME_SYNC_PERIOD 2000
  74. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  75. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  76. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  77. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  78. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  79. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  80. #define CNSS_TIME_SYNC_PERIOD_INVALID 0xFFFFFFFF
  81. enum cnss_cal_db_op {
  82. CNSS_CAL_DB_UPLOAD,
  83. CNSS_CAL_DB_DOWNLOAD,
  84. CNSS_CAL_DB_INVALID_OP,
  85. };
  86. enum cnss_recovery_type {
  87. CNSS_WLAN_RECOVERY = 0x1,
  88. CNSS_PCSS_RECOVERY = 0x2,
  89. };
  90. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  91. #define CNSS_MAX_DEV_NUM 2
  92. static struct cnss_plat_data *plat_env[CNSS_MAX_DEV_NUM];
  93. static int plat_env_count;
  94. #else
  95. static struct cnss_plat_data *plat_env;
  96. #endif
  97. static bool cnss_allow_driver_loading;
  98. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  99. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  100. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  101. };
  102. static struct cnss_fw_files FW_FILES_DEFAULT = {
  103. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  104. "utfbd.bin", "epping.bin", "evicted.bin"
  105. };
  106. struct cnss_driver_event {
  107. struct list_head list;
  108. enum cnss_driver_event_type type;
  109. bool sync;
  110. struct completion complete;
  111. int ret;
  112. void *data;
  113. };
  114. bool cnss_check_driver_loading_allowed(void)
  115. {
  116. return cnss_allow_driver_loading;
  117. }
  118. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  119. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  120. struct cnss_plat_data *plat_priv)
  121. {
  122. cnss_pr_dbg("Set plat_priv at %d", plat_env_count);
  123. if (plat_priv) {
  124. plat_priv->plat_idx = plat_env_count;
  125. plat_env[plat_priv->plat_idx] = plat_priv;
  126. plat_env_count++;
  127. }
  128. }
  129. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device
  130. *plat_dev)
  131. {
  132. int i;
  133. if (!plat_dev)
  134. return NULL;
  135. for (i = 0; i < plat_env_count; i++) {
  136. if (plat_env[i]->plat_dev == plat_dev)
  137. return plat_env[i];
  138. }
  139. return NULL;
  140. }
  141. struct cnss_plat_data *cnss_get_first_plat_priv(struct platform_device
  142. *plat_dev)
  143. {
  144. int i;
  145. if (!plat_dev) {
  146. for (i = 0; i < plat_env_count; i++) {
  147. if (plat_env[i])
  148. return plat_env[i];
  149. }
  150. }
  151. return NULL;
  152. }
  153. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  154. {
  155. cnss_pr_dbg("Clear plat_priv at %d", plat_priv->plat_idx);
  156. plat_env[plat_priv->plat_idx] = NULL;
  157. plat_env_count--;
  158. }
  159. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  160. {
  161. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  162. "wlan_%d", plat_priv->plat_idx);
  163. return 0;
  164. }
  165. static int cnss_plat_env_available(void)
  166. {
  167. int ret = 0;
  168. if (plat_env_count >= CNSS_MAX_DEV_NUM) {
  169. cnss_pr_err("ERROR: No space to store plat_priv\n");
  170. ret = -ENOMEM;
  171. }
  172. return ret;
  173. }
  174. int cnss_get_plat_env_count(void)
  175. {
  176. return plat_env_count;
  177. }
  178. struct cnss_plat_data *cnss_get_plat_env(int index)
  179. {
  180. return plat_env[index];
  181. }
  182. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  183. {
  184. int i;
  185. for (i = 0; i < plat_env_count; i++) {
  186. if (plat_env[i]->rc_num == rc_num)
  187. return plat_env[i];
  188. }
  189. return NULL;
  190. }
  191. static inline int
  192. cnss_get_qrtr_node_id(struct cnss_plat_data *plat_priv)
  193. {
  194. return of_property_read_u32(plat_priv->dev_node,
  195. "qcom,qrtr_node_id", &plat_priv->qrtr_node_id);
  196. }
  197. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  198. {
  199. int ret = 0;
  200. ret = cnss_get_qrtr_node_id(plat_priv);
  201. if (ret) {
  202. cnss_pr_warn("Failed to find qrtr_node_id err=%d\n", ret);
  203. plat_priv->qrtr_node_id = 0;
  204. plat_priv->wlfw_service_instance_id = 0;
  205. } else {
  206. plat_priv->wlfw_service_instance_id = plat_priv->qrtr_node_id +
  207. QRTR_NODE_FW_ID_BASE;
  208. cnss_pr_dbg("service_instance_id=0x%x\n",
  209. plat_priv->wlfw_service_instance_id);
  210. }
  211. }
  212. static inline int
  213. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  214. {
  215. return of_property_read_string(plat_priv->plat_dev->dev.of_node,
  216. "qcom,pld_bus_ops_name",
  217. &plat_priv->pld_bus_ops_name);
  218. }
  219. #else
  220. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  221. struct cnss_plat_data *plat_priv)
  222. {
  223. plat_env = plat_priv;
  224. }
  225. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  226. {
  227. return plat_env;
  228. }
  229. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  230. {
  231. plat_env = NULL;
  232. }
  233. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  234. {
  235. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  236. "wlan");
  237. return 0;
  238. }
  239. static int cnss_plat_env_available(void)
  240. {
  241. return 0;
  242. }
  243. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  244. {
  245. return cnss_bus_dev_to_plat_priv(NULL);
  246. }
  247. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  248. {
  249. }
  250. static int
  251. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  252. {
  253. return 0;
  254. }
  255. #endif
  256. void cnss_get_sleep_clk_supported(struct cnss_plat_data *plat_priv)
  257. {
  258. plat_priv->sleep_clk = of_property_read_bool(plat_priv->dev_node,
  259. "qcom,sleep-clk-support");
  260. cnss_pr_dbg("qcom,sleep-clk-support is %d\n",
  261. plat_priv->sleep_clk);
  262. }
  263. void cnss_get_bwscal_info(struct cnss_plat_data *plat_priv)
  264. {
  265. plat_priv->no_bwscale = of_property_read_bool(plat_priv->dev_node,
  266. "qcom,no-bwscale");
  267. }
  268. static inline int
  269. cnss_get_rc_num(struct cnss_plat_data *plat_priv)
  270. {
  271. return of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  272. "qcom,wlan-rc-num", &plat_priv->rc_num);
  273. }
  274. bool cnss_is_dual_wlan_enabled(void)
  275. {
  276. return IS_ENABLED(CONFIG_CNSS_SUPPORT_DUAL_DEV);
  277. }
  278. /**
  279. * cnss_get_mem_seg_count - Get segment count of memory
  280. * @type: memory type
  281. * @seg: segment count
  282. *
  283. * Return: 0 on success, negative value on failure
  284. */
  285. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  286. {
  287. struct cnss_plat_data *plat_priv;
  288. plat_priv = cnss_get_plat_priv(NULL);
  289. if (!plat_priv)
  290. return -ENODEV;
  291. switch (type) {
  292. case CNSS_REMOTE_MEM_TYPE_FW:
  293. *seg = plat_priv->fw_mem_seg_len;
  294. break;
  295. case CNSS_REMOTE_MEM_TYPE_QDSS:
  296. *seg = plat_priv->qdss_mem_seg_len;
  297. break;
  298. default:
  299. return -EINVAL;
  300. }
  301. return 0;
  302. }
  303. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  304. /**
  305. * cnss_get_wifi_kobject -return wifi kobject
  306. * Return: Null, to maintain driver comnpatibilty
  307. */
  308. struct kobject *cnss_get_wifi_kobj(struct device *dev)
  309. {
  310. struct cnss_plat_data *plat_priv;
  311. plat_priv = cnss_get_plat_priv(NULL);
  312. if (!plat_priv)
  313. return NULL;
  314. return plat_priv->wifi_kobj;
  315. }
  316. EXPORT_SYMBOL(cnss_get_wifi_kobj);
  317. /**
  318. * cnss_get_mem_segment_info - Get memory info of different type
  319. * @type: memory type
  320. * @segment: array to save the segment info
  321. * @seg: segment count
  322. *
  323. * Return: 0 on success, negative value on failure
  324. */
  325. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  326. struct cnss_mem_segment segment[],
  327. u32 segment_count)
  328. {
  329. struct cnss_plat_data *plat_priv;
  330. u32 i;
  331. plat_priv = cnss_get_plat_priv(NULL);
  332. if (!plat_priv)
  333. return -ENODEV;
  334. switch (type) {
  335. case CNSS_REMOTE_MEM_TYPE_FW:
  336. if (segment_count > plat_priv->fw_mem_seg_len)
  337. segment_count = plat_priv->fw_mem_seg_len;
  338. for (i = 0; i < segment_count; i++) {
  339. segment[i].size = plat_priv->fw_mem[i].size;
  340. segment[i].va = plat_priv->fw_mem[i].va;
  341. segment[i].pa = plat_priv->fw_mem[i].pa;
  342. }
  343. break;
  344. case CNSS_REMOTE_MEM_TYPE_QDSS:
  345. if (segment_count > plat_priv->qdss_mem_seg_len)
  346. segment_count = plat_priv->qdss_mem_seg_len;
  347. for (i = 0; i < segment_count; i++) {
  348. segment[i].size = plat_priv->qdss_mem[i].size;
  349. segment[i].va = plat_priv->qdss_mem[i].va;
  350. segment[i].pa = plat_priv->qdss_mem[i].pa;
  351. }
  352. break;
  353. default:
  354. return -EINVAL;
  355. }
  356. return 0;
  357. }
  358. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  359. static int cnss_get_audio_iommu_domain(struct cnss_plat_data *plat_priv)
  360. {
  361. struct device_node *audio_ion_node;
  362. struct platform_device *audio_ion_pdev;
  363. audio_ion_node = of_find_compatible_node(NULL, NULL,
  364. "qcom,msm-audio-ion");
  365. if (!audio_ion_node) {
  366. cnss_pr_err("Unable to get Audio ion node");
  367. return -EINVAL;
  368. }
  369. audio_ion_pdev = of_find_device_by_node(audio_ion_node);
  370. of_node_put(audio_ion_node);
  371. if (!audio_ion_pdev) {
  372. cnss_pr_err("Unable to get Audio ion platform device");
  373. return -EINVAL;
  374. }
  375. plat_priv->audio_iommu_domain =
  376. iommu_get_domain_for_dev(&audio_ion_pdev->dev);
  377. put_device(&audio_ion_pdev->dev);
  378. if (!plat_priv->audio_iommu_domain) {
  379. cnss_pr_err("Unable to get Audio ion iommu domain");
  380. return -EINVAL;
  381. }
  382. return 0;
  383. }
  384. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  385. enum cnss_feature_v01 feature)
  386. {
  387. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  388. return -EINVAL;
  389. plat_priv->feature_list |= 1 << feature;
  390. return 0;
  391. }
  392. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  393. enum cnss_feature_v01 feature)
  394. {
  395. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  396. return -EINVAL;
  397. plat_priv->feature_list &= ~(1 << feature);
  398. return 0;
  399. }
  400. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  401. u64 *feature_list)
  402. {
  403. if (unlikely(!plat_priv))
  404. return -EINVAL;
  405. *feature_list = plat_priv->feature_list;
  406. return 0;
  407. }
  408. size_t cnss_get_platform_name(struct cnss_plat_data *plat_priv,
  409. char *buf, const size_t buf_len)
  410. {
  411. if (unlikely(!plat_priv || !buf || !buf_len))
  412. return 0;
  413. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  414. "platform-name-required")) {
  415. struct device_node *root;
  416. root = of_find_node_by_path("/");
  417. if (root) {
  418. const char *model;
  419. size_t model_len;
  420. model = of_get_property(root, "model", NULL);
  421. if (model) {
  422. model_len = strlcpy(buf, model, buf_len);
  423. cnss_pr_dbg("Platform name: %s (%zu)\n",
  424. buf, model_len);
  425. return model_len;
  426. }
  427. }
  428. }
  429. return 0;
  430. }
  431. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  432. {
  433. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  434. return;
  435. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  436. plat_priv->driver_state,
  437. atomic_read(&plat_priv->pm_count));
  438. pm_stay_awake(&plat_priv->plat_dev->dev);
  439. }
  440. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  441. {
  442. int r = atomic_dec_return(&plat_priv->pm_count);
  443. WARN_ON(r < 0);
  444. if (r != 0)
  445. return;
  446. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  447. plat_priv->driver_state,
  448. atomic_read(&plat_priv->pm_count));
  449. pm_relax(&plat_priv->plat_dev->dev);
  450. }
  451. int cnss_get_fw_files_for_target(struct device *dev,
  452. struct cnss_fw_files *pfw_files,
  453. u32 target_type, u32 target_version)
  454. {
  455. if (!pfw_files)
  456. return -ENODEV;
  457. switch (target_version) {
  458. case QCA6174_REV3_VERSION:
  459. case QCA6174_REV3_2_VERSION:
  460. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  461. break;
  462. default:
  463. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  464. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  465. target_type, target_version);
  466. break;
  467. }
  468. return 0;
  469. }
  470. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  471. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  472. {
  473. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  474. if (!plat_priv)
  475. return -ENODEV;
  476. if (!cap)
  477. return -EINVAL;
  478. *cap = plat_priv->cap;
  479. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  480. return 0;
  481. }
  482. EXPORT_SYMBOL(cnss_get_platform_cap);
  483. /**
  484. * cnss_get_fw_cap - Check whether FW supports specific capability or not
  485. * @dev: Device
  486. * @fw_cap: FW Capability which needs to be checked
  487. *
  488. * Return: TRUE if supported, FALSE on failure or if not supported
  489. */
  490. bool cnss_get_fw_cap(struct device *dev, enum cnss_fw_caps fw_cap)
  491. {
  492. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  493. bool is_supported = false;
  494. if (!plat_priv)
  495. return is_supported;
  496. if (!plat_priv->fw_caps)
  497. return is_supported;
  498. switch (fw_cap) {
  499. case CNSS_FW_CAP_DIRECT_LINK_SUPPORT:
  500. is_supported = !!(plat_priv->fw_caps &
  501. QMI_WLFW_DIRECT_LINK_SUPPORT_V01);
  502. if (is_supported && cnss_get_audio_iommu_domain(plat_priv))
  503. is_supported = false;
  504. break;
  505. case CNSS_FW_CAP_CALDB_SEG_DDR_SUPPORT:
  506. is_supported = !!(plat_priv->fw_caps &
  507. QMI_WLFW_CALDB_SEG_DDR_SUPPORT_V01);
  508. break;
  509. default:
  510. cnss_pr_err("Invalid FW Capability: 0x%x\n", fw_cap);
  511. }
  512. cnss_pr_dbg("FW Capability 0x%x is %s\n", fw_cap,
  513. is_supported ? "supported" : "not supported");
  514. return is_supported;
  515. }
  516. EXPORT_SYMBOL(cnss_get_fw_cap);
  517. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  518. {
  519. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  520. if (!plat_priv)
  521. return;
  522. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  523. }
  524. EXPORT_SYMBOL(cnss_request_pm_qos);
  525. void cnss_remove_pm_qos(struct device *dev)
  526. {
  527. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  528. if (!plat_priv)
  529. return;
  530. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  531. }
  532. EXPORT_SYMBOL(cnss_remove_pm_qos);
  533. int cnss_wlan_enable(struct device *dev,
  534. struct cnss_wlan_enable_cfg *config,
  535. enum cnss_driver_mode mode,
  536. const char *host_version)
  537. {
  538. int ret = 0;
  539. struct cnss_plat_data *plat_priv;
  540. if (!dev) {
  541. cnss_pr_err("Invalid dev pointer\n");
  542. return -EINVAL;
  543. }
  544. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  545. if (!plat_priv)
  546. return -ENODEV;
  547. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  548. return 0;
  549. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  550. return 0;
  551. if (!config || !host_version) {
  552. cnss_pr_err("Invalid config or host_version pointer\n");
  553. return -EINVAL;
  554. }
  555. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  556. mode, config, host_version);
  557. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  558. goto skip_cfg;
  559. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  560. config->send_msi_ce = true;
  561. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  562. if (ret)
  563. goto out;
  564. skip_cfg:
  565. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  566. out:
  567. return ret;
  568. }
  569. EXPORT_SYMBOL(cnss_wlan_enable);
  570. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  571. {
  572. int ret = 0;
  573. struct cnss_plat_data *plat_priv;
  574. if (!dev) {
  575. cnss_pr_err("Invalid dev pointer\n");
  576. return -EINVAL;
  577. }
  578. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  579. if (!plat_priv)
  580. return -ENODEV;
  581. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  582. return 0;
  583. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  584. return 0;
  585. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  586. cnss_bus_free_qdss_mem(plat_priv);
  587. return ret;
  588. }
  589. EXPORT_SYMBOL(cnss_wlan_disable);
  590. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  591. int cnss_iommu_map(struct iommu_domain *domain,
  592. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  593. {
  594. return iommu_map(domain, iova, paddr, size, prot);
  595. }
  596. #else
  597. int cnss_iommu_map(struct iommu_domain *domain,
  598. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  599. {
  600. return iommu_map(domain, iova, paddr, size, prot, GFP_KERNEL);
  601. }
  602. #endif
  603. int cnss_audio_smmu_map(struct device *dev, phys_addr_t paddr,
  604. dma_addr_t iova, size_t size)
  605. {
  606. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  607. uint32_t page_offset;
  608. if (!plat_priv)
  609. return -ENODEV;
  610. if (!plat_priv->audio_iommu_domain)
  611. return -EINVAL;
  612. page_offset = iova & (PAGE_SIZE - 1);
  613. if (page_offset + size > PAGE_SIZE)
  614. size += PAGE_SIZE;
  615. iova -= page_offset;
  616. paddr -= page_offset;
  617. return cnss_iommu_map(plat_priv->audio_iommu_domain, iova, paddr,
  618. roundup(size, PAGE_SIZE), IOMMU_READ |
  619. IOMMU_WRITE | IOMMU_CACHE);
  620. }
  621. EXPORT_SYMBOL(cnss_audio_smmu_map);
  622. void cnss_audio_smmu_unmap(struct device *dev, dma_addr_t iova, size_t size)
  623. {
  624. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  625. uint32_t page_offset;
  626. if (!plat_priv)
  627. return;
  628. if (!plat_priv->audio_iommu_domain)
  629. return;
  630. page_offset = iova & (PAGE_SIZE - 1);
  631. if (page_offset + size > PAGE_SIZE)
  632. size += PAGE_SIZE;
  633. iova -= page_offset;
  634. iommu_unmap(plat_priv->audio_iommu_domain, iova,
  635. roundup(size, PAGE_SIZE));
  636. }
  637. EXPORT_SYMBOL(cnss_audio_smmu_unmap);
  638. int cnss_get_fw_lpass_shared_mem(struct device *dev, dma_addr_t *iova,
  639. size_t *size)
  640. {
  641. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  642. uint8_t i;
  643. if (!plat_priv)
  644. return -EINVAL;
  645. for (i = 0; i < plat_priv->fw_mem_seg_len; i++) {
  646. if (plat_priv->fw_mem[i].type ==
  647. QMI_WLFW_MEM_LPASS_SHARED_V01) {
  648. *iova = plat_priv->fw_mem[i].pa;
  649. *size = plat_priv->fw_mem[i].size;
  650. return 0;
  651. }
  652. }
  653. return -EINVAL;
  654. }
  655. EXPORT_SYMBOL(cnss_get_fw_lpass_shared_mem);
  656. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  657. u32 data_len, u8 *output)
  658. {
  659. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  660. int ret = 0;
  661. if (!plat_priv) {
  662. cnss_pr_err("plat_priv is NULL!\n");
  663. return -EINVAL;
  664. }
  665. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  666. return 0;
  667. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  668. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  669. plat_priv->driver_state);
  670. ret = -EINVAL;
  671. goto out;
  672. }
  673. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  674. data_len, output);
  675. out:
  676. return ret;
  677. }
  678. EXPORT_SYMBOL(cnss_athdiag_read);
  679. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  680. u32 data_len, u8 *input)
  681. {
  682. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  683. int ret = 0;
  684. if (!plat_priv) {
  685. cnss_pr_err("plat_priv is NULL!\n");
  686. return -EINVAL;
  687. }
  688. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  689. return 0;
  690. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  691. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  692. plat_priv->driver_state);
  693. ret = -EINVAL;
  694. goto out;
  695. }
  696. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  697. data_len, input);
  698. out:
  699. return ret;
  700. }
  701. EXPORT_SYMBOL(cnss_athdiag_write);
  702. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  703. {
  704. struct cnss_plat_data *plat_priv;
  705. if (!dev) {
  706. cnss_pr_err("Invalid dev pointer\n");
  707. return -EINVAL;
  708. }
  709. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  710. if (!plat_priv)
  711. return -ENODEV;
  712. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  713. return 0;
  714. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  715. }
  716. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  717. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  718. {
  719. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  720. if (!plat_priv)
  721. return -EINVAL;
  722. if (!plat_priv->fw_pcie_gen_switch) {
  723. cnss_pr_err("Firmware does not support PCIe gen switch\n");
  724. return -EOPNOTSUPP;
  725. }
  726. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  727. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  728. return -EINVAL;
  729. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  730. plat_priv->pcie_gen_speed = pcie_gen_speed;
  731. return 0;
  732. }
  733. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  734. static bool cnss_is_aux_support_enabled(struct cnss_plat_data *plat_priv)
  735. {
  736. switch (plat_priv->device_id) {
  737. case PEACH_DEVICE_ID:
  738. if (!plat_priv->fw_aux_uc_support) {
  739. cnss_pr_dbg("FW does not support aux uc capability\n");
  740. return false;
  741. }
  742. break;
  743. default:
  744. cnss_pr_dbg("Host does not support aux uc capability\n");
  745. return false;
  746. }
  747. return true;
  748. }
  749. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  750. {
  751. int ret = 0;
  752. if (!plat_priv)
  753. return -ENODEV;
  754. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  755. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  756. if (ret)
  757. goto out;
  758. cnss_bus_load_tme_patch(plat_priv);
  759. cnss_wlfw_tme_patch_dnld_send_sync(plat_priv,
  760. WLFW_TME_LITE_PATCH_FILE_V01);
  761. if (plat_priv->hds_enabled)
  762. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  763. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  764. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  765. plat_priv->ctrl_params.bdf_type = CNSS_BDF_BIN;
  766. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  767. plat_priv->ctrl_params.bdf_type);
  768. if (ret)
  769. goto out;
  770. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  771. return 0;
  772. ret = cnss_bus_load_m3(plat_priv);
  773. if (ret)
  774. goto out;
  775. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  776. if (ret)
  777. goto out;
  778. if (cnss_is_aux_support_enabled(plat_priv)) {
  779. ret = cnss_bus_load_aux(plat_priv);
  780. if (ret)
  781. goto out;
  782. ret = cnss_wlfw_aux_dnld_send_sync(plat_priv);
  783. if (ret)
  784. goto out;
  785. }
  786. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  787. return 0;
  788. out:
  789. return ret;
  790. }
  791. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  792. {
  793. int ret = 0;
  794. if (!plat_priv->antenna) {
  795. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  796. if (ret)
  797. goto out;
  798. }
  799. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  800. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  801. if (ret)
  802. goto out;
  803. }
  804. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  805. if (ret)
  806. goto out;
  807. return 0;
  808. out:
  809. return ret;
  810. }
  811. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  812. {
  813. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  814. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  815. }
  816. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  817. {
  818. u32 i;
  819. int ret = 0;
  820. struct cnss_plat_ipc_daemon_config *cfg;
  821. ret = cnss_qmi_get_dms_mac(plat_priv);
  822. if (ret == 0 && plat_priv->dms.mac_valid)
  823. goto qmi_send;
  824. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  825. * Thus assert on failure to get MAC from DMS even after retries
  826. */
  827. if (plat_priv->use_nv_mac) {
  828. /* Check if Daemon says platform support DMS MAC provisioning */
  829. cfg = cnss_plat_ipc_qmi_daemon_config();
  830. if (cfg) {
  831. if (!cfg->dms_mac_addr_supported) {
  832. cnss_pr_err("DMS MAC address not supported\n");
  833. CNSS_ASSERT(0);
  834. return -EINVAL;
  835. }
  836. }
  837. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  838. if (plat_priv->dms.mac_valid)
  839. break;
  840. ret = cnss_qmi_get_dms_mac(plat_priv);
  841. if (ret == 0)
  842. break;
  843. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  844. }
  845. if (!plat_priv->dms.mac_valid) {
  846. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  847. CNSS_ASSERT(0);
  848. return -EINVAL;
  849. }
  850. }
  851. qmi_send:
  852. if (plat_priv->dms.mac_valid)
  853. ret =
  854. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  855. ARRAY_SIZE(plat_priv->dms.mac));
  856. return ret;
  857. }
  858. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  859. enum cnss_cal_db_op op, u32 *size)
  860. {
  861. int ret = 0;
  862. u32 timeout = cnss_get_timeout(plat_priv,
  863. CNSS_TIMEOUT_DAEMON_CONNECTION);
  864. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  865. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  866. if (op >= CNSS_CAL_DB_INVALID_OP)
  867. return -EINVAL;
  868. if (!plat_priv->cbc_file_download) {
  869. cnss_pr_info("CAL DB file not required as per BDF\n");
  870. return 0;
  871. }
  872. if (*size == 0) {
  873. cnss_pr_err("Invalid cal file size\n");
  874. return -EINVAL;
  875. }
  876. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  877. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  878. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  879. msecs_to_jiffies(timeout));
  880. if (!ret) {
  881. cnss_pr_err("Daemon not yet connected\n");
  882. CNSS_ASSERT(0);
  883. return ret;
  884. }
  885. }
  886. if (!plat_priv->cal_mem->va) {
  887. cnss_pr_err("CAL DB Memory not setup for FW\n");
  888. return -EINVAL;
  889. }
  890. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  891. if (op == CNSS_CAL_DB_DOWNLOAD) {
  892. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  893. ret = cnss_plat_ipc_qmi_file_download(client_id,
  894. CNSS_CAL_DB_FILE_NAME,
  895. plat_priv->cal_mem->va,
  896. size);
  897. } else {
  898. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  899. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  900. CNSS_CAL_DB_FILE_NAME,
  901. plat_priv->cal_mem->va,
  902. *size);
  903. }
  904. if (ret)
  905. cnss_pr_err("Cal DB file %s %s failure\n",
  906. CNSS_CAL_DB_FILE_NAME,
  907. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  908. else
  909. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  910. CNSS_CAL_DB_FILE_NAME,
  911. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  912. *size);
  913. return ret;
  914. }
  915. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  916. {
  917. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  918. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  919. return -EINVAL;
  920. }
  921. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  922. &plat_priv->cal_file_size);
  923. }
  924. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  925. u32 *cal_file_size)
  926. {
  927. /* To download pass the total size of cal DB mem allocated.
  928. * After cal file is download to mem, its size is updated in
  929. * return pointer
  930. */
  931. *cal_file_size = plat_priv->cal_mem->size;
  932. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  933. cal_file_size);
  934. }
  935. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  936. {
  937. int ret = 0;
  938. u32 cal_file_size = 0;
  939. if (!plat_priv)
  940. return -ENODEV;
  941. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  942. cnss_pr_err("Reboot is in progress, ignore FW ready\n");
  943. return -EINVAL;
  944. }
  945. cnss_pr_dbg("Processing FW Init Done..\n");
  946. del_timer(&plat_priv->fw_boot_timer);
  947. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  948. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  949. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  950. cnss_send_subsys_restart_level_msg(plat_priv);
  951. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  952. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  953. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  954. }
  955. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  956. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  957. CNSS_WALTEST);
  958. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  959. cnss_request_antenna_sharing(plat_priv);
  960. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  961. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  962. plat_priv->cal_time = jiffies;
  963. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  964. CNSS_CALIBRATION);
  965. } else {
  966. ret = cnss_setup_dms_mac(plat_priv);
  967. ret = cnss_bus_call_driver_probe(plat_priv);
  968. }
  969. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  970. goto out;
  971. else if (ret)
  972. goto shutdown;
  973. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  974. return 0;
  975. shutdown:
  976. cnss_bus_dev_shutdown(plat_priv);
  977. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  978. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  979. out:
  980. return ret;
  981. }
  982. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  983. {
  984. switch (type) {
  985. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  986. return "SERVER_ARRIVE";
  987. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  988. return "SERVER_EXIT";
  989. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  990. return "REQUEST_MEM";
  991. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  992. return "FW_MEM_READY";
  993. case CNSS_DRIVER_EVENT_FW_READY:
  994. return "FW_READY";
  995. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  996. return "COLD_BOOT_CAL_START";
  997. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  998. return "COLD_BOOT_CAL_DONE";
  999. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1000. return "REGISTER_DRIVER";
  1001. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1002. return "UNREGISTER_DRIVER";
  1003. case CNSS_DRIVER_EVENT_RECOVERY:
  1004. return "RECOVERY";
  1005. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  1006. return "FORCE_FW_ASSERT";
  1007. case CNSS_DRIVER_EVENT_POWER_UP:
  1008. return "POWER_UP";
  1009. case CNSS_DRIVER_EVENT_POWER_DOWN:
  1010. return "POWER_DOWN";
  1011. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  1012. return "IDLE_RESTART";
  1013. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1014. return "IDLE_SHUTDOWN";
  1015. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  1016. return "IMS_WFC_CALL_IND";
  1017. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  1018. return "WLFW_TWC_CFG_IND";
  1019. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1020. return "QDSS_TRACE_REQ_MEM";
  1021. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  1022. return "FW_MEM_FILE_SAVE";
  1023. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1024. return "QDSS_TRACE_FREE";
  1025. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1026. return "QDSS_TRACE_REQ_DATA";
  1027. case CNSS_DRIVER_EVENT_MAX:
  1028. return "EVENT_MAX";
  1029. }
  1030. return "UNKNOWN";
  1031. };
  1032. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  1033. enum cnss_driver_event_type type,
  1034. u32 flags, void *data)
  1035. {
  1036. struct cnss_driver_event *event;
  1037. unsigned long irq_flags;
  1038. int gfp = GFP_KERNEL;
  1039. int ret = 0;
  1040. if (!plat_priv)
  1041. return -ENODEV;
  1042. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  1043. cnss_driver_event_to_str(type), type,
  1044. flags ? "-sync" : "", plat_priv->driver_state, flags);
  1045. if (type >= CNSS_DRIVER_EVENT_MAX) {
  1046. cnss_pr_err("Invalid Event type: %d, can't post", type);
  1047. return -EINVAL;
  1048. }
  1049. if (in_interrupt() || irqs_disabled())
  1050. gfp = GFP_ATOMIC;
  1051. event = kzalloc(sizeof(*event), gfp);
  1052. if (!event)
  1053. return -ENOMEM;
  1054. cnss_pm_stay_awake(plat_priv);
  1055. event->type = type;
  1056. event->data = data;
  1057. init_completion(&event->complete);
  1058. event->ret = CNSS_EVENT_PENDING;
  1059. event->sync = !!(flags & CNSS_EVENT_SYNC);
  1060. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  1061. list_add_tail(&event->list, &plat_priv->event_list);
  1062. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1063. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  1064. if (!(flags & CNSS_EVENT_SYNC))
  1065. goto out;
  1066. if (flags & CNSS_EVENT_UNKILLABLE)
  1067. wait_for_completion(&event->complete);
  1068. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  1069. ret = wait_for_completion_killable(&event->complete);
  1070. else
  1071. ret = wait_for_completion_interruptible(&event->complete);
  1072. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  1073. cnss_driver_event_to_str(type), type,
  1074. plat_priv->driver_state, ret, event->ret);
  1075. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  1076. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  1077. event->sync = false;
  1078. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1079. ret = -EINTR;
  1080. goto out;
  1081. }
  1082. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1083. ret = event->ret;
  1084. kfree(event);
  1085. out:
  1086. cnss_pm_relax(plat_priv);
  1087. return ret;
  1088. }
  1089. /**
  1090. * cnss_get_timeout - Get timeout for corresponding type.
  1091. * @plat_priv: Pointer to platform driver context.
  1092. * @cnss_timeout_type: Timeout type.
  1093. *
  1094. * Return: Timeout in milliseconds.
  1095. */
  1096. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  1097. enum cnss_timeout_type timeout_type)
  1098. {
  1099. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  1100. switch (timeout_type) {
  1101. case CNSS_TIMEOUT_QMI:
  1102. return qmi_timeout;
  1103. case CNSS_TIMEOUT_POWER_UP:
  1104. return (qmi_timeout << 2);
  1105. case CNSS_TIMEOUT_IDLE_RESTART:
  1106. /* In idle restart power up sequence, we have fw_boot_timer to
  1107. * handle FW initialization failure.
  1108. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  1109. * account for FW dump collection and FW re-initialization on
  1110. * retry.
  1111. */
  1112. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  1113. case CNSS_TIMEOUT_CALIBRATION:
  1114. /* Similar to mission mode, in CBC if FW init fails
  1115. * fw recovery is tried. Thus return 2x the CBC timeout.
  1116. */
  1117. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  1118. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  1119. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  1120. case CNSS_TIMEOUT_RDDM:
  1121. return CNSS_RDDM_TIMEOUT_MS;
  1122. case CNSS_TIMEOUT_RECOVERY:
  1123. return RECOVERY_TIMEOUT;
  1124. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  1125. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  1126. default:
  1127. return qmi_timeout;
  1128. }
  1129. }
  1130. unsigned int cnss_get_boot_timeout(struct device *dev)
  1131. {
  1132. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1133. if (!plat_priv) {
  1134. cnss_pr_err("plat_priv is NULL\n");
  1135. return 0;
  1136. }
  1137. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  1138. }
  1139. EXPORT_SYMBOL(cnss_get_boot_timeout);
  1140. int cnss_power_up(struct device *dev)
  1141. {
  1142. int ret = 0;
  1143. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1144. unsigned int timeout;
  1145. if (!plat_priv) {
  1146. cnss_pr_err("plat_priv is NULL\n");
  1147. return -ENODEV;
  1148. }
  1149. cnss_pr_dbg("Powering up device\n");
  1150. ret = cnss_driver_event_post(plat_priv,
  1151. CNSS_DRIVER_EVENT_POWER_UP,
  1152. CNSS_EVENT_SYNC, NULL);
  1153. if (ret)
  1154. goto out;
  1155. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1156. goto out;
  1157. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  1158. reinit_completion(&plat_priv->power_up_complete);
  1159. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1160. msecs_to_jiffies(timeout));
  1161. if (!ret) {
  1162. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  1163. timeout);
  1164. ret = -EAGAIN;
  1165. goto out;
  1166. }
  1167. return 0;
  1168. out:
  1169. return ret;
  1170. }
  1171. EXPORT_SYMBOL(cnss_power_up);
  1172. int cnss_power_down(struct device *dev)
  1173. {
  1174. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1175. if (!plat_priv) {
  1176. cnss_pr_err("plat_priv is NULL\n");
  1177. return -ENODEV;
  1178. }
  1179. cnss_pr_dbg("Powering down device\n");
  1180. return cnss_driver_event_post(plat_priv,
  1181. CNSS_DRIVER_EVENT_POWER_DOWN,
  1182. CNSS_EVENT_SYNC, NULL);
  1183. }
  1184. EXPORT_SYMBOL(cnss_power_down);
  1185. int cnss_idle_restart(struct device *dev)
  1186. {
  1187. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1188. unsigned int timeout;
  1189. int ret = 0;
  1190. if (!plat_priv) {
  1191. cnss_pr_err("plat_priv is NULL\n");
  1192. return -ENODEV;
  1193. }
  1194. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  1195. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  1196. return -EBUSY;
  1197. }
  1198. cnss_pr_dbg("Doing idle restart\n");
  1199. reinit_completion(&plat_priv->power_up_complete);
  1200. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1201. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1202. ret = -EINVAL;
  1203. goto out;
  1204. }
  1205. ret = cnss_driver_event_post(plat_priv,
  1206. CNSS_DRIVER_EVENT_IDLE_RESTART,
  1207. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1208. if (ret == -EINTR && plat_priv->device_id != QCA6174_DEVICE_ID)
  1209. cnss_pr_err("Idle restart has been interrupted but device power up is still in progress");
  1210. else if (ret)
  1211. goto out;
  1212. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1213. ret = cnss_bus_call_driver_probe(plat_priv);
  1214. goto out;
  1215. }
  1216. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  1217. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1218. msecs_to_jiffies(timeout));
  1219. if (plat_priv->power_up_error) {
  1220. ret = plat_priv->power_up_error;
  1221. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1222. cnss_pr_dbg("Power up error:%d, exiting\n",
  1223. plat_priv->power_up_error);
  1224. goto out;
  1225. }
  1226. if (!ret) {
  1227. /* This exception occurs after attempting retry of FW recovery.
  1228. * Thus we can safely power off the device.
  1229. */
  1230. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  1231. timeout);
  1232. ret = -ETIMEDOUT;
  1233. cnss_power_down(dev);
  1234. CNSS_ASSERT(0);
  1235. goto out;
  1236. }
  1237. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1238. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1239. del_timer(&plat_priv->fw_boot_timer);
  1240. ret = -EINVAL;
  1241. goto out;
  1242. }
  1243. /* In non-DRV mode, remove MHI satellite configuration. Switching to
  1244. * non-DRV is supported only once after device reboots and before wifi
  1245. * is turned on. We do not allow switching back to DRV.
  1246. * To bring device back into DRV, user needs to reboot device.
  1247. */
  1248. if (test_bit(DISABLE_DRV, &plat_priv->ctrl_params.quirks)) {
  1249. cnss_pr_dbg("DRV is disabled\n");
  1250. cnss_bus_disable_mhi_satellite_cfg(plat_priv);
  1251. }
  1252. mutex_unlock(&plat_priv->driver_ops_lock);
  1253. return 0;
  1254. out:
  1255. mutex_unlock(&plat_priv->driver_ops_lock);
  1256. return ret;
  1257. }
  1258. EXPORT_SYMBOL(cnss_idle_restart);
  1259. int cnss_idle_shutdown(struct device *dev)
  1260. {
  1261. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1262. if (!plat_priv) {
  1263. cnss_pr_err("plat_priv is NULL\n");
  1264. return -ENODEV;
  1265. }
  1266. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  1267. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  1268. return -EAGAIN;
  1269. }
  1270. cnss_pr_dbg("Doing idle shutdown\n");
  1271. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) ||
  1272. test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state)) {
  1273. cnss_pr_dbg("Recovery in progress. Ignore IDLE Shutdown\n");
  1274. return -EBUSY;
  1275. }
  1276. return cnss_driver_event_post(plat_priv,
  1277. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1278. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1279. }
  1280. EXPORT_SYMBOL(cnss_idle_shutdown);
  1281. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  1282. {
  1283. int ret = 0;
  1284. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1285. if (ret < 0) {
  1286. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  1287. goto out;
  1288. }
  1289. ret = cnss_get_clk(plat_priv);
  1290. if (ret) {
  1291. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  1292. goto put_vreg;
  1293. }
  1294. ret = cnss_get_pinctrl(plat_priv);
  1295. if (ret) {
  1296. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  1297. goto put_clk;
  1298. }
  1299. return 0;
  1300. put_clk:
  1301. cnss_put_clk(plat_priv);
  1302. put_vreg:
  1303. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1304. out:
  1305. return ret;
  1306. }
  1307. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  1308. {
  1309. cnss_put_clk(plat_priv);
  1310. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1311. }
  1312. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1313. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  1314. unsigned long code,
  1315. void *ss_handle)
  1316. {
  1317. struct cnss_plat_data *plat_priv =
  1318. container_of(nb, struct cnss_plat_data, modem_nb);
  1319. struct cnss_esoc_info *esoc_info;
  1320. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  1321. if (!plat_priv)
  1322. return NOTIFY_DONE;
  1323. esoc_info = &plat_priv->esoc_info;
  1324. if (code == SUBSYS_AFTER_POWERUP)
  1325. esoc_info->modem_current_status = 1;
  1326. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  1327. esoc_info->modem_current_status = 0;
  1328. else
  1329. return NOTIFY_DONE;
  1330. if (!cnss_bus_call_driver_modem_status(plat_priv,
  1331. esoc_info->modem_current_status))
  1332. return NOTIFY_DONE;
  1333. return NOTIFY_OK;
  1334. }
  1335. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1336. {
  1337. int ret = 0;
  1338. struct device *dev;
  1339. struct cnss_esoc_info *esoc_info;
  1340. struct esoc_desc *esoc_desc;
  1341. const char *client_desc;
  1342. dev = &plat_priv->plat_dev->dev;
  1343. esoc_info = &plat_priv->esoc_info;
  1344. esoc_info->notify_modem_status =
  1345. of_property_read_bool(dev->of_node,
  1346. "qcom,notify-modem-status");
  1347. if (!esoc_info->notify_modem_status)
  1348. goto out;
  1349. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  1350. &client_desc);
  1351. if (ret) {
  1352. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  1353. } else {
  1354. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1355. if (IS_ERR_OR_NULL(esoc_desc)) {
  1356. ret = PTR_RET(esoc_desc);
  1357. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1358. ret);
  1359. goto out;
  1360. }
  1361. esoc_info->esoc_desc = esoc_desc;
  1362. }
  1363. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1364. esoc_info->modem_current_status = 0;
  1365. esoc_info->modem_notify_handler =
  1366. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1367. esoc_info->esoc_desc->name :
  1368. "modem", &plat_priv->modem_nb);
  1369. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1370. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1371. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1372. ret);
  1373. goto unreg_esoc;
  1374. }
  1375. return 0;
  1376. unreg_esoc:
  1377. if (esoc_info->esoc_desc)
  1378. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1379. out:
  1380. return ret;
  1381. }
  1382. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1383. {
  1384. struct device *dev;
  1385. struct cnss_esoc_info *esoc_info;
  1386. dev = &plat_priv->plat_dev->dev;
  1387. esoc_info = &plat_priv->esoc_info;
  1388. if (esoc_info->notify_modem_status)
  1389. subsys_notif_unregister_notifier
  1390. (esoc_info->modem_notify_handler,
  1391. &plat_priv->modem_nb);
  1392. if (esoc_info->esoc_desc)
  1393. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1394. }
  1395. #else
  1396. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1397. {
  1398. return 0;
  1399. }
  1400. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1401. #endif
  1402. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1403. {
  1404. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1405. int ret = 0;
  1406. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1407. return 0;
  1408. enable_irq(sol_gpio->dev_sol_irq);
  1409. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1410. if (ret)
  1411. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1412. ret);
  1413. return ret;
  1414. }
  1415. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1416. {
  1417. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1418. int ret = 0;
  1419. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1420. return 0;
  1421. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1422. if (ret)
  1423. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1424. ret);
  1425. disable_irq(sol_gpio->dev_sol_irq);
  1426. return ret;
  1427. }
  1428. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1429. {
  1430. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1431. if (sol_gpio->dev_sol_gpio < 0)
  1432. return -EINVAL;
  1433. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1434. }
  1435. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1436. {
  1437. struct cnss_plat_data *plat_priv = data;
  1438. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1439. sol_gpio->dev_sol_counter++;
  1440. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1441. irq, sol_gpio->dev_sol_counter);
  1442. /* Make sure abort current suspend */
  1443. cnss_pm_stay_awake(plat_priv);
  1444. cnss_pm_relax(plat_priv);
  1445. pm_system_wakeup();
  1446. cnss_bus_handle_dev_sol_irq(plat_priv);
  1447. return IRQ_HANDLED;
  1448. }
  1449. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1450. {
  1451. struct device *dev = &plat_priv->plat_dev->dev;
  1452. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1453. int ret = 0;
  1454. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1455. "wlan-dev-sol-gpio", 0);
  1456. if (sol_gpio->dev_sol_gpio < 0)
  1457. goto out;
  1458. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1459. sol_gpio->dev_sol_gpio);
  1460. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1461. if (ret) {
  1462. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1463. ret);
  1464. goto out;
  1465. }
  1466. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1467. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1468. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1469. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1470. if (ret) {
  1471. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1472. goto free_gpio;
  1473. }
  1474. return 0;
  1475. free_gpio:
  1476. gpio_free(sol_gpio->dev_sol_gpio);
  1477. out:
  1478. return ret;
  1479. }
  1480. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1481. {
  1482. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1483. if (sol_gpio->dev_sol_gpio < 0)
  1484. return;
  1485. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1486. gpio_free(sol_gpio->dev_sol_gpio);
  1487. }
  1488. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1489. {
  1490. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1491. if (sol_gpio->host_sol_gpio < 0)
  1492. return -EINVAL;
  1493. if (value)
  1494. cnss_pr_dbg("Assert host SOL GPIO\n");
  1495. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1496. return 0;
  1497. }
  1498. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1499. {
  1500. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1501. if (sol_gpio->host_sol_gpio < 0)
  1502. return -EINVAL;
  1503. return gpio_get_value(sol_gpio->host_sol_gpio);
  1504. }
  1505. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1506. {
  1507. struct device *dev = &plat_priv->plat_dev->dev;
  1508. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1509. int ret = 0;
  1510. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1511. "wlan-host-sol-gpio", 0);
  1512. if (sol_gpio->host_sol_gpio < 0)
  1513. goto out;
  1514. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1515. sol_gpio->host_sol_gpio);
  1516. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1517. if (ret) {
  1518. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1519. ret);
  1520. goto out;
  1521. }
  1522. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1523. return 0;
  1524. out:
  1525. return ret;
  1526. }
  1527. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1528. {
  1529. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1530. if (sol_gpio->host_sol_gpio < 0)
  1531. return;
  1532. gpio_free(sol_gpio->host_sol_gpio);
  1533. }
  1534. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1535. {
  1536. int ret;
  1537. ret = cnss_init_dev_sol_gpio(plat_priv);
  1538. if (ret)
  1539. goto out;
  1540. ret = cnss_init_host_sol_gpio(plat_priv);
  1541. if (ret)
  1542. goto deinit_dev_sol;
  1543. return 0;
  1544. deinit_dev_sol:
  1545. cnss_deinit_dev_sol_gpio(plat_priv);
  1546. out:
  1547. return ret;
  1548. }
  1549. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1550. {
  1551. cnss_deinit_host_sol_gpio(plat_priv);
  1552. cnss_deinit_dev_sol_gpio(plat_priv);
  1553. }
  1554. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1555. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1556. {
  1557. struct cnss_plat_data *plat_priv;
  1558. int ret = 0;
  1559. if (!subsys_desc->dev) {
  1560. cnss_pr_err("dev from subsys_desc is NULL\n");
  1561. return -ENODEV;
  1562. }
  1563. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1564. if (!plat_priv) {
  1565. cnss_pr_err("plat_priv is NULL\n");
  1566. return -ENODEV;
  1567. }
  1568. if (!plat_priv->driver_state) {
  1569. cnss_pr_dbg("subsys powerup is ignored\n");
  1570. return 0;
  1571. }
  1572. ret = cnss_bus_dev_powerup(plat_priv);
  1573. if (ret)
  1574. __pm_relax(plat_priv->recovery_ws);
  1575. return ret;
  1576. }
  1577. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1578. bool force_stop)
  1579. {
  1580. struct cnss_plat_data *plat_priv;
  1581. if (!subsys_desc->dev) {
  1582. cnss_pr_err("dev from subsys_desc is NULL\n");
  1583. return -ENODEV;
  1584. }
  1585. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1586. if (!plat_priv) {
  1587. cnss_pr_err("plat_priv is NULL\n");
  1588. return -ENODEV;
  1589. }
  1590. if (!plat_priv->driver_state) {
  1591. cnss_pr_dbg("subsys shutdown is ignored\n");
  1592. return 0;
  1593. }
  1594. return cnss_bus_dev_shutdown(plat_priv);
  1595. }
  1596. void cnss_device_crashed(struct device *dev)
  1597. {
  1598. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1599. struct cnss_subsys_info *subsys_info;
  1600. if (!plat_priv)
  1601. return;
  1602. subsys_info = &plat_priv->subsys_info;
  1603. if (subsys_info->subsys_device) {
  1604. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1605. subsys_set_crash_status(subsys_info->subsys_device, true);
  1606. subsystem_restart_dev(subsys_info->subsys_device);
  1607. }
  1608. }
  1609. EXPORT_SYMBOL(cnss_device_crashed);
  1610. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1611. {
  1612. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1613. if (!plat_priv) {
  1614. cnss_pr_err("plat_priv is NULL\n");
  1615. return;
  1616. }
  1617. cnss_bus_dev_crash_shutdown(plat_priv);
  1618. }
  1619. static int cnss_subsys_ramdump(int enable,
  1620. const struct subsys_desc *subsys_desc)
  1621. {
  1622. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1623. if (!plat_priv) {
  1624. cnss_pr_err("plat_priv is NULL\n");
  1625. return -ENODEV;
  1626. }
  1627. if (!enable)
  1628. return 0;
  1629. return cnss_bus_dev_ramdump(plat_priv);
  1630. }
  1631. static void cnss_recovery_work_handler(struct work_struct *work)
  1632. {
  1633. }
  1634. #else
  1635. void cnss_recovery_handler(struct cnss_plat_data *plat_priv)
  1636. {
  1637. int ret;
  1638. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1639. if (!plat_priv->recovery_enabled)
  1640. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1641. cnss_bus_dev_shutdown(plat_priv);
  1642. cnss_bus_dev_ramdump(plat_priv);
  1643. /* If recovery is triggered before Host driver registration,
  1644. * avoid device power up because eventually device will be
  1645. * power up as part of driver registration.
  1646. */
  1647. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state) ||
  1648. !test_bit(CNSS_DRIVER_REGISTERED, &plat_priv->driver_state)) {
  1649. cnss_pr_dbg("Host driver not registered yet, ignore Device Power Up, 0x%lx\n",
  1650. plat_priv->driver_state);
  1651. return;
  1652. }
  1653. msleep(POWER_RESET_MIN_DELAY_MS);
  1654. ret = cnss_bus_dev_powerup(plat_priv);
  1655. if (ret) {
  1656. __pm_relax(plat_priv->recovery_ws);
  1657. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1658. }
  1659. return;
  1660. }
  1661. static void cnss_recovery_work_handler(struct work_struct *work)
  1662. {
  1663. struct cnss_plat_data *plat_priv =
  1664. container_of(work, struct cnss_plat_data, recovery_work);
  1665. cnss_recovery_handler(plat_priv);
  1666. }
  1667. void cnss_device_crashed(struct device *dev)
  1668. {
  1669. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1670. if (!plat_priv)
  1671. return;
  1672. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1673. schedule_work(&plat_priv->recovery_work);
  1674. }
  1675. EXPORT_SYMBOL(cnss_device_crashed);
  1676. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1677. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1678. {
  1679. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1680. struct cnss_ramdump_info *ramdump_info;
  1681. if (!plat_priv)
  1682. return NULL;
  1683. ramdump_info = &plat_priv->ramdump_info;
  1684. *size = ramdump_info->ramdump_size;
  1685. return ramdump_info->ramdump_va;
  1686. }
  1687. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1688. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1689. {
  1690. switch (reason) {
  1691. case CNSS_REASON_DEFAULT:
  1692. return "DEFAULT";
  1693. case CNSS_REASON_LINK_DOWN:
  1694. return "LINK_DOWN";
  1695. case CNSS_REASON_RDDM:
  1696. return "RDDM";
  1697. case CNSS_REASON_TIMEOUT:
  1698. return "TIMEOUT";
  1699. }
  1700. return "UNKNOWN";
  1701. };
  1702. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1703. enum cnss_recovery_reason reason)
  1704. {
  1705. int ret;
  1706. plat_priv->recovery_count++;
  1707. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1708. goto self_recovery;
  1709. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1710. cnss_pr_dbg("Skip device recovery\n");
  1711. return 0;
  1712. }
  1713. /* FW recovery sequence has multiple steps and firmware load requires
  1714. * linux PM in awake state. Thus hold the cnss wake source until
  1715. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1716. * time taken in this process.
  1717. */
  1718. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1719. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1720. true);
  1721. switch (reason) {
  1722. case CNSS_REASON_LINK_DOWN:
  1723. if (!cnss_bus_check_link_status(plat_priv)) {
  1724. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1725. return 0;
  1726. }
  1727. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1728. &plat_priv->ctrl_params.quirks))
  1729. goto self_recovery;
  1730. if (!cnss_bus_recover_link_down(plat_priv)) {
  1731. /* clear recovery bit here to avoid skipping
  1732. * the recovery work for RDDM later
  1733. */
  1734. clear_bit(CNSS_DRIVER_RECOVERY,
  1735. &plat_priv->driver_state);
  1736. return 0;
  1737. }
  1738. break;
  1739. case CNSS_REASON_RDDM:
  1740. cnss_bus_collect_dump_info(plat_priv, false);
  1741. break;
  1742. case CNSS_REASON_DEFAULT:
  1743. case CNSS_REASON_TIMEOUT:
  1744. break;
  1745. default:
  1746. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1747. cnss_recovery_reason_to_str(reason), reason);
  1748. break;
  1749. }
  1750. cnss_bus_device_crashed(plat_priv);
  1751. return 0;
  1752. self_recovery:
  1753. cnss_pr_dbg("Going for self recovery\n");
  1754. cnss_bus_dev_shutdown(plat_priv);
  1755. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1756. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1757. &plat_priv->ctrl_params.quirks);
  1758. /* If link down self recovery is triggered before Host driver
  1759. * registration, avoid device power up because eventually device
  1760. * will be power up as part of driver registration.
  1761. */
  1762. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state) ||
  1763. !test_bit(CNSS_DRIVER_REGISTERED, &plat_priv->driver_state)) {
  1764. cnss_pr_dbg("Host driver not registered yet, ignore Device Power Up, 0x%lx\n",
  1765. plat_priv->driver_state);
  1766. return 0;
  1767. }
  1768. ret = cnss_bus_dev_powerup(plat_priv);
  1769. if (ret)
  1770. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1771. return 0;
  1772. }
  1773. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1774. void *data)
  1775. {
  1776. struct cnss_recovery_data *recovery_data = data;
  1777. int ret = 0;
  1778. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1779. cnss_recovery_reason_to_str(recovery_data->reason),
  1780. recovery_data->reason);
  1781. if (!plat_priv->driver_state) {
  1782. cnss_pr_err("Improper driver state, ignore recovery\n");
  1783. ret = -EINVAL;
  1784. goto out;
  1785. }
  1786. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1787. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1788. ret = -EINVAL;
  1789. goto out;
  1790. }
  1791. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1792. cnss_pr_err("Recovery is already in progress\n");
  1793. CNSS_ASSERT(0);
  1794. ret = -EINVAL;
  1795. goto out;
  1796. }
  1797. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1798. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1799. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1800. ret = -EINVAL;
  1801. goto out;
  1802. }
  1803. switch (plat_priv->device_id) {
  1804. case QCA6174_DEVICE_ID:
  1805. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1806. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1807. &plat_priv->driver_state)) {
  1808. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1809. ret = -EINVAL;
  1810. goto out;
  1811. }
  1812. break;
  1813. default:
  1814. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1815. set_bit(CNSS_FW_BOOT_RECOVERY,
  1816. &plat_priv->driver_state);
  1817. }
  1818. break;
  1819. }
  1820. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1821. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1822. out:
  1823. kfree(data);
  1824. return ret;
  1825. }
  1826. int cnss_self_recovery(struct device *dev,
  1827. enum cnss_recovery_reason reason)
  1828. {
  1829. cnss_schedule_recovery(dev, reason);
  1830. return 0;
  1831. }
  1832. EXPORT_SYMBOL(cnss_self_recovery);
  1833. void cnss_schedule_recovery(struct device *dev,
  1834. enum cnss_recovery_reason reason)
  1835. {
  1836. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1837. struct cnss_recovery_data *data;
  1838. int gfp = GFP_KERNEL;
  1839. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1840. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1841. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1842. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1843. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1844. return;
  1845. }
  1846. if (in_interrupt() || irqs_disabled())
  1847. gfp = GFP_ATOMIC;
  1848. data = kzalloc(sizeof(*data), gfp);
  1849. if (!data)
  1850. return;
  1851. data->reason = reason;
  1852. cnss_driver_event_post(plat_priv,
  1853. CNSS_DRIVER_EVENT_RECOVERY,
  1854. 0, data);
  1855. }
  1856. EXPORT_SYMBOL(cnss_schedule_recovery);
  1857. int cnss_force_fw_assert(struct device *dev)
  1858. {
  1859. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1860. if (!plat_priv) {
  1861. cnss_pr_err("plat_priv is NULL\n");
  1862. return -ENODEV;
  1863. }
  1864. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1865. cnss_pr_info("Forced FW assert is not supported\n");
  1866. return -EOPNOTSUPP;
  1867. }
  1868. if (cnss_bus_is_device_down(plat_priv)) {
  1869. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1870. return 0;
  1871. }
  1872. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1873. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1874. return 0;
  1875. }
  1876. if (in_interrupt() || irqs_disabled())
  1877. cnss_driver_event_post(plat_priv,
  1878. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1879. 0, NULL);
  1880. else
  1881. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1882. return 0;
  1883. }
  1884. EXPORT_SYMBOL(cnss_force_fw_assert);
  1885. int cnss_force_collect_rddm(struct device *dev)
  1886. {
  1887. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1888. unsigned int timeout;
  1889. int ret = 0;
  1890. if (!plat_priv) {
  1891. cnss_pr_err("plat_priv is NULL\n");
  1892. return -ENODEV;
  1893. }
  1894. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1895. cnss_pr_info("Force collect rddm is not supported\n");
  1896. return -EOPNOTSUPP;
  1897. }
  1898. if (cnss_bus_is_device_down(plat_priv)) {
  1899. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1900. goto wait_rddm;
  1901. }
  1902. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1903. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1904. goto wait_rddm;
  1905. }
  1906. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1907. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1908. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1909. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1910. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1911. return 0;
  1912. }
  1913. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1914. if (ret)
  1915. return ret;
  1916. wait_rddm:
  1917. reinit_completion(&plat_priv->rddm_complete);
  1918. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1919. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1920. msecs_to_jiffies(timeout));
  1921. if (!ret) {
  1922. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1923. timeout);
  1924. ret = -ETIMEDOUT;
  1925. } else if (ret > 0) {
  1926. ret = 0;
  1927. }
  1928. return ret;
  1929. }
  1930. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1931. int cnss_qmi_send_get(struct device *dev)
  1932. {
  1933. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1934. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1935. return 0;
  1936. return cnss_bus_qmi_send_get(plat_priv);
  1937. }
  1938. EXPORT_SYMBOL(cnss_qmi_send_get);
  1939. int cnss_qmi_send_put(struct device *dev)
  1940. {
  1941. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1942. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1943. return 0;
  1944. return cnss_bus_qmi_send_put(plat_priv);
  1945. }
  1946. EXPORT_SYMBOL(cnss_qmi_send_put);
  1947. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1948. int cmd_len, void *cb_ctx,
  1949. int (*cb)(void *ctx, void *event, int event_len))
  1950. {
  1951. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1952. int ret;
  1953. if (!plat_priv)
  1954. return -ENODEV;
  1955. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1956. return -EINVAL;
  1957. plat_priv->get_info_cb = cb;
  1958. plat_priv->get_info_cb_ctx = cb_ctx;
  1959. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1960. if (ret) {
  1961. plat_priv->get_info_cb = NULL;
  1962. plat_priv->get_info_cb_ctx = NULL;
  1963. }
  1964. return ret;
  1965. }
  1966. EXPORT_SYMBOL(cnss_qmi_send);
  1967. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1968. {
  1969. int ret = 0;
  1970. u32 retry = 0, timeout;
  1971. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1972. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1973. goto out;
  1974. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1975. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1976. goto out;
  1977. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  1978. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  1979. goto out;
  1980. }
  1981. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1982. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1983. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1984. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1985. CNSS_ASSERT(0);
  1986. return -EINVAL;
  1987. }
  1988. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1989. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1990. break;
  1991. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1992. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1993. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1994. CNSS_ASSERT(0);
  1995. ret = -EINVAL;
  1996. goto mark_cal_fail;
  1997. }
  1998. }
  1999. switch (plat_priv->device_id) {
  2000. case QCA6290_DEVICE_ID:
  2001. case QCA6390_DEVICE_ID:
  2002. case QCA6490_DEVICE_ID:
  2003. case KIWI_DEVICE_ID:
  2004. case MANGO_DEVICE_ID:
  2005. case PEACH_DEVICE_ID:
  2006. break;
  2007. default:
  2008. cnss_pr_err("Not supported for device ID 0x%lx\n",
  2009. plat_priv->device_id);
  2010. ret = -EINVAL;
  2011. goto mark_cal_fail;
  2012. }
  2013. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  2014. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  2015. timeout = cnss_get_timeout(plat_priv,
  2016. CNSS_TIMEOUT_CALIBRATION);
  2017. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  2018. timeout / 1000);
  2019. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  2020. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  2021. msecs_to_jiffies(timeout));
  2022. }
  2023. reinit_completion(&plat_priv->cal_complete);
  2024. ret = cnss_bus_dev_powerup(plat_priv);
  2025. mark_cal_fail:
  2026. if (ret) {
  2027. complete(&plat_priv->cal_complete);
  2028. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  2029. /* Set CBC done in driver state to mark attempt and note error
  2030. * since calibration cannot be retried at boot.
  2031. */
  2032. plat_priv->cal_done = CNSS_CAL_FAILURE;
  2033. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  2034. if (plat_priv->device_id == QCA6174_DEVICE_ID ||
  2035. plat_priv->device_id == QCN7605_DEVICE_ID) {
  2036. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  2037. goto out;
  2038. cnss_pr_info("Schedule WLAN driver load\n");
  2039. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  2040. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  2041. 0);
  2042. }
  2043. }
  2044. out:
  2045. return ret;
  2046. }
  2047. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  2048. void *data)
  2049. {
  2050. struct cnss_cal_info *cal_info = data;
  2051. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  2052. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  2053. goto out;
  2054. switch (cal_info->cal_status) {
  2055. case CNSS_CAL_DONE:
  2056. cnss_pr_dbg("Calibration completed successfully\n");
  2057. plat_priv->cal_done = true;
  2058. break;
  2059. case CNSS_CAL_TIMEOUT:
  2060. case CNSS_CAL_FAILURE:
  2061. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  2062. cal_info->cal_status);
  2063. break;
  2064. default:
  2065. cnss_pr_err("Unknown calibration status: %u\n",
  2066. cal_info->cal_status);
  2067. break;
  2068. }
  2069. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  2070. cnss_bus_free_qdss_mem(plat_priv);
  2071. cnss_release_antenna_sharing(plat_priv);
  2072. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  2073. goto skip_shutdown;
  2074. cnss_bus_dev_shutdown(plat_priv);
  2075. msleep(POWER_RESET_MIN_DELAY_MS);
  2076. skip_shutdown:
  2077. complete(&plat_priv->cal_complete);
  2078. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  2079. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  2080. if (cal_info->cal_status == CNSS_CAL_DONE) {
  2081. cnss_cal_mem_upload_to_file(plat_priv);
  2082. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  2083. goto out;
  2084. cnss_pr_dbg("Schedule WLAN driver load\n");
  2085. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  2086. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  2087. 0);
  2088. }
  2089. out:
  2090. kfree(data);
  2091. return 0;
  2092. }
  2093. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  2094. {
  2095. int ret;
  2096. ret = cnss_bus_dev_powerup(plat_priv);
  2097. if (ret)
  2098. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  2099. return ret;
  2100. }
  2101. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  2102. {
  2103. cnss_bus_dev_shutdown(plat_priv);
  2104. return 0;
  2105. }
  2106. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  2107. {
  2108. int ret = 0;
  2109. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  2110. if (ret < 0)
  2111. return ret;
  2112. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  2113. }
  2114. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  2115. u32 mem_seg_len, u64 pa, u32 size)
  2116. {
  2117. int i = 0;
  2118. u64 offset = 0;
  2119. void *va = NULL;
  2120. u64 local_pa;
  2121. u32 local_size;
  2122. for (i = 0; i < mem_seg_len; i++) {
  2123. if (i == QMI_WLFW_MEM_LPASS_SHARED_V01)
  2124. continue;
  2125. local_pa = (u64)fw_mem[i].pa;
  2126. local_size = (u32)fw_mem[i].size;
  2127. if (pa == local_pa && size <= local_size) {
  2128. va = fw_mem[i].va;
  2129. break;
  2130. }
  2131. if (pa > local_pa &&
  2132. pa < local_pa + local_size &&
  2133. pa + size <= local_pa + local_size) {
  2134. offset = pa - local_pa;
  2135. va = fw_mem[i].va + offset;
  2136. break;
  2137. }
  2138. }
  2139. return va;
  2140. }
  2141. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  2142. void *data)
  2143. {
  2144. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2145. struct cnss_fw_mem *fw_mem_seg;
  2146. int ret = 0L;
  2147. void *va = NULL;
  2148. u32 i, fw_mem_seg_len;
  2149. switch (event_data->mem_type) {
  2150. case QMI_WLFW_MEM_TYPE_DDR_V01:
  2151. if (!plat_priv->fw_mem_seg_len)
  2152. goto invalid_mem_save;
  2153. fw_mem_seg = plat_priv->fw_mem;
  2154. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  2155. break;
  2156. case QMI_WLFW_MEM_QDSS_V01:
  2157. if (!plat_priv->qdss_mem_seg_len)
  2158. goto invalid_mem_save;
  2159. fw_mem_seg = plat_priv->qdss_mem;
  2160. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  2161. break;
  2162. default:
  2163. goto invalid_mem_save;
  2164. }
  2165. for (i = 0; i < event_data->mem_seg_len; i++) {
  2166. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  2167. event_data->mem_seg[i].addr,
  2168. event_data->mem_seg[i].size);
  2169. if (!va) {
  2170. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  2171. &event_data->mem_seg[i].addr,
  2172. event_data->mem_type);
  2173. ret = -EINVAL;
  2174. break;
  2175. }
  2176. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  2177. event_data->file_name,
  2178. event_data->mem_seg[i].size);
  2179. if (ret < 0) {
  2180. cnss_pr_err("Fail to save fw mem data: %d\n",
  2181. ret);
  2182. break;
  2183. }
  2184. }
  2185. kfree(data);
  2186. return ret;
  2187. invalid_mem_save:
  2188. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  2189. event_data->mem_type);
  2190. kfree(data);
  2191. return -EINVAL;
  2192. }
  2193. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  2194. {
  2195. cnss_bus_free_qdss_mem(plat_priv);
  2196. return 0;
  2197. }
  2198. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  2199. void *data)
  2200. {
  2201. int ret = 0;
  2202. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2203. if (!plat_priv)
  2204. return -ENODEV;
  2205. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  2206. event_data->total_size);
  2207. kfree(data);
  2208. return ret;
  2209. }
  2210. static void cnss_driver_event_work(struct work_struct *work)
  2211. {
  2212. struct cnss_plat_data *plat_priv =
  2213. container_of(work, struct cnss_plat_data, event_work);
  2214. struct cnss_driver_event *event;
  2215. unsigned long flags;
  2216. int ret = 0;
  2217. if (!plat_priv) {
  2218. cnss_pr_err("plat_priv is NULL!\n");
  2219. return;
  2220. }
  2221. cnss_pm_stay_awake(plat_priv);
  2222. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2223. while (!list_empty(&plat_priv->event_list)) {
  2224. event = list_first_entry(&plat_priv->event_list,
  2225. struct cnss_driver_event, list);
  2226. list_del(&event->list);
  2227. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2228. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  2229. cnss_driver_event_to_str(event->type),
  2230. event->sync ? "-sync" : "", event->type,
  2231. plat_priv->driver_state);
  2232. switch (event->type) {
  2233. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  2234. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  2235. break;
  2236. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  2237. ret = cnss_wlfw_server_exit(plat_priv);
  2238. break;
  2239. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  2240. ret = cnss_bus_alloc_fw_mem(plat_priv);
  2241. if (ret)
  2242. break;
  2243. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  2244. break;
  2245. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  2246. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  2247. break;
  2248. case CNSS_DRIVER_EVENT_FW_READY:
  2249. ret = cnss_fw_ready_hdlr(plat_priv);
  2250. break;
  2251. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  2252. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  2253. break;
  2254. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  2255. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  2256. event->data);
  2257. break;
  2258. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  2259. ret = cnss_bus_register_driver_hdlr(plat_priv,
  2260. event->data);
  2261. break;
  2262. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  2263. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  2264. break;
  2265. case CNSS_DRIVER_EVENT_RECOVERY:
  2266. ret = cnss_driver_recovery_hdlr(plat_priv,
  2267. event->data);
  2268. break;
  2269. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  2270. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  2271. break;
  2272. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  2273. set_bit(CNSS_DRIVER_IDLE_RESTART,
  2274. &plat_priv->driver_state);
  2275. fallthrough;
  2276. case CNSS_DRIVER_EVENT_POWER_UP:
  2277. ret = cnss_power_up_hdlr(plat_priv);
  2278. break;
  2279. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  2280. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  2281. &plat_priv->driver_state);
  2282. fallthrough;
  2283. case CNSS_DRIVER_EVENT_POWER_DOWN:
  2284. ret = cnss_power_down_hdlr(plat_priv);
  2285. break;
  2286. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  2287. ret = cnss_process_wfc_call_ind_event(plat_priv,
  2288. event->data);
  2289. break;
  2290. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  2291. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  2292. event->data);
  2293. break;
  2294. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  2295. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  2296. break;
  2297. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  2298. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  2299. event->data);
  2300. break;
  2301. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  2302. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  2303. break;
  2304. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  2305. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  2306. event->data);
  2307. break;
  2308. default:
  2309. cnss_pr_err("Invalid driver event type: %d",
  2310. event->type);
  2311. kfree(event);
  2312. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2313. continue;
  2314. }
  2315. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2316. if (event->sync) {
  2317. event->ret = ret;
  2318. complete(&event->complete);
  2319. continue;
  2320. }
  2321. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2322. kfree(event);
  2323. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2324. }
  2325. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2326. cnss_pm_relax(plat_priv);
  2327. }
  2328. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  2329. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2330. {
  2331. int ret = 0;
  2332. struct cnss_subsys_info *subsys_info;
  2333. subsys_info = &plat_priv->subsys_info;
  2334. subsys_info->subsys_desc.name = plat_priv->device_name;
  2335. subsys_info->subsys_desc.owner = THIS_MODULE;
  2336. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  2337. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  2338. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  2339. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  2340. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  2341. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  2342. if (IS_ERR(subsys_info->subsys_device)) {
  2343. ret = PTR_ERR(subsys_info->subsys_device);
  2344. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  2345. goto out;
  2346. }
  2347. subsys_info->subsys_handle =
  2348. subsystem_get(subsys_info->subsys_desc.name);
  2349. if (!subsys_info->subsys_handle) {
  2350. cnss_pr_err("Failed to get subsys_handle!\n");
  2351. ret = -EINVAL;
  2352. goto unregister_subsys;
  2353. } else if (IS_ERR(subsys_info->subsys_handle)) {
  2354. ret = PTR_ERR(subsys_info->subsys_handle);
  2355. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  2356. goto unregister_subsys;
  2357. }
  2358. return 0;
  2359. unregister_subsys:
  2360. subsys_unregister(subsys_info->subsys_device);
  2361. out:
  2362. return ret;
  2363. }
  2364. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2365. {
  2366. struct cnss_subsys_info *subsys_info;
  2367. subsys_info = &plat_priv->subsys_info;
  2368. subsystem_put(subsys_info->subsys_handle);
  2369. subsys_unregister(subsys_info->subsys_device);
  2370. }
  2371. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2372. {
  2373. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  2374. return create_ramdump_device(subsys_info->subsys_desc.name,
  2375. subsys_info->subsys_desc.dev);
  2376. }
  2377. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2378. void *ramdump_dev)
  2379. {
  2380. destroy_ramdump_device(ramdump_dev);
  2381. }
  2382. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2383. {
  2384. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2385. struct ramdump_segment segment;
  2386. memset(&segment, 0, sizeof(segment));
  2387. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  2388. segment.size = ramdump_info->ramdump_size;
  2389. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  2390. }
  2391. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2392. {
  2393. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2394. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2395. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2396. struct ramdump_segment *ramdump_segs, *s;
  2397. struct cnss_dump_meta_info meta_info = {0};
  2398. int i, ret = 0;
  2399. ramdump_segs = kcalloc(dump_data->nentries + 1,
  2400. sizeof(*ramdump_segs),
  2401. GFP_KERNEL);
  2402. if (!ramdump_segs)
  2403. return -ENOMEM;
  2404. s = ramdump_segs + 1;
  2405. for (i = 0; i < dump_data->nentries; i++) {
  2406. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2407. cnss_pr_err("Unsupported dump type: %d",
  2408. dump_seg->type);
  2409. continue;
  2410. }
  2411. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2412. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2413. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2414. }
  2415. meta_info.entry[dump_seg->type].entry_num++;
  2416. s->address = dump_seg->address;
  2417. s->v_address = (void __iomem *)dump_seg->v_address;
  2418. s->size = dump_seg->size;
  2419. s++;
  2420. dump_seg++;
  2421. }
  2422. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2423. meta_info.version = CNSS_RAMDUMP_VERSION;
  2424. meta_info.chipset = plat_priv->device_id;
  2425. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2426. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2427. ramdump_segs->size = sizeof(meta_info);
  2428. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2429. dump_data->nentries + 1);
  2430. kfree(ramdump_segs);
  2431. return ret;
  2432. }
  2433. #else
  2434. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2435. void *data)
  2436. {
  2437. struct cnss_plat_data *plat_priv =
  2438. container_of(nb, struct cnss_plat_data, panic_nb);
  2439. cnss_bus_dev_crash_shutdown(plat_priv);
  2440. return NOTIFY_DONE;
  2441. }
  2442. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2443. {
  2444. int ret;
  2445. if (!plat_priv)
  2446. return -ENODEV;
  2447. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2448. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2449. &plat_priv->panic_nb);
  2450. if (ret) {
  2451. cnss_pr_err("Failed to register panic handler\n");
  2452. return -EINVAL;
  2453. }
  2454. return 0;
  2455. }
  2456. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2457. {
  2458. int ret;
  2459. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2460. &plat_priv->panic_nb);
  2461. if (ret)
  2462. cnss_pr_err("Failed to unregister panic handler\n");
  2463. }
  2464. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2465. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2466. {
  2467. return &plat_priv->plat_dev->dev;
  2468. }
  2469. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2470. void *ramdump_dev)
  2471. {
  2472. }
  2473. #endif
  2474. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2475. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2476. {
  2477. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2478. struct qcom_dump_segment segment;
  2479. struct list_head head;
  2480. INIT_LIST_HEAD(&head);
  2481. memset(&segment, 0, sizeof(segment));
  2482. segment.va = ramdump_info->ramdump_va;
  2483. segment.size = ramdump_info->ramdump_size;
  2484. list_add(&segment.node, &head);
  2485. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2486. }
  2487. #else
  2488. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2489. {
  2490. return 0;
  2491. }
  2492. /* Using completion event inside dynamically allocated ramdump_desc
  2493. * may result a race between freeing the event after setting it to
  2494. * complete inside dev coredump free callback and the thread that is
  2495. * waiting for completion.
  2496. */
  2497. DECLARE_COMPLETION(dump_done);
  2498. #define TIMEOUT_SAVE_DUMP_MS 30000
  2499. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2500. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2501. { \
  2502. if (class == ELFCLASS32) \
  2503. return sizeof(struct elf32_##__xhdr); \
  2504. else \
  2505. return sizeof(struct elf64_##__xhdr); \
  2506. }
  2507. SIZEOF_ELF_STRUCT(phdr)
  2508. SIZEOF_ELF_STRUCT(hdr)
  2509. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2510. do { \
  2511. if (class == ELFCLASS32) \
  2512. ((struct elf32_##__xhdr *)arg)->member = value; \
  2513. else \
  2514. ((struct elf64_##__xhdr *)arg)->member = value; \
  2515. } while (0)
  2516. #define set_ehdr_property(arg, class, member, value) \
  2517. set_xhdr_property(hdr, arg, class, member, value)
  2518. #define set_phdr_property(arg, class, member, value) \
  2519. set_xhdr_property(phdr, arg, class, member, value)
  2520. /* These replace qcom_ramdump driver APIs called from common API
  2521. * cnss_do_elf_dump() by the ones defined here.
  2522. */
  2523. #define qcom_dump_segment cnss_qcom_dump_segment
  2524. #define qcom_elf_dump cnss_qcom_elf_dump
  2525. #define dump_enabled cnss_dump_enabled
  2526. struct cnss_qcom_dump_segment {
  2527. struct list_head node;
  2528. dma_addr_t da;
  2529. void *va;
  2530. size_t size;
  2531. };
  2532. struct cnss_qcom_ramdump_desc {
  2533. void *data;
  2534. struct completion dump_done;
  2535. };
  2536. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2537. void *data, size_t datalen)
  2538. {
  2539. struct cnss_qcom_ramdump_desc *desc = data;
  2540. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2541. datalen);
  2542. }
  2543. static void cnss_qcom_devcd_freev(void *data)
  2544. {
  2545. struct cnss_qcom_ramdump_desc *desc = data;
  2546. cnss_pr_dbg("Free dump data for dev coredump\n");
  2547. complete(&dump_done);
  2548. vfree(desc->data);
  2549. kfree(desc);
  2550. }
  2551. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2552. gfp_t gfp)
  2553. {
  2554. struct cnss_qcom_ramdump_desc *desc;
  2555. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2556. int ret;
  2557. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2558. if (!desc)
  2559. return -ENOMEM;
  2560. desc->data = data;
  2561. reinit_completion(&dump_done);
  2562. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2563. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2564. ret = wait_for_completion_timeout(&dump_done,
  2565. msecs_to_jiffies(timeout));
  2566. if (!ret)
  2567. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2568. timeout);
  2569. return ret ? 0 : -ETIMEDOUT;
  2570. }
  2571. /* Since the elf32 and elf64 identification is identical apart from
  2572. * the class, use elf32 by default.
  2573. */
  2574. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2575. {
  2576. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2577. ehdr->e_ident[EI_CLASS] = class;
  2578. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2579. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2580. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2581. }
  2582. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2583. unsigned char class)
  2584. {
  2585. struct cnss_qcom_dump_segment *segment;
  2586. void *phdr, *ehdr;
  2587. size_t data_size, offset;
  2588. int phnum = 0;
  2589. void *data;
  2590. void __iomem *ptr;
  2591. if (!segs || list_empty(segs))
  2592. return -EINVAL;
  2593. data_size = sizeof_elf_hdr(class);
  2594. list_for_each_entry(segment, segs, node) {
  2595. data_size += sizeof_elf_phdr(class) + segment->size;
  2596. phnum++;
  2597. }
  2598. data = vmalloc(data_size);
  2599. if (!data)
  2600. return -ENOMEM;
  2601. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2602. ehdr = data;
  2603. memset(ehdr, 0, sizeof_elf_hdr(class));
  2604. init_elf_identification(ehdr, class);
  2605. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2606. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2607. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2608. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2609. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2610. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2611. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2612. phdr = data + sizeof_elf_hdr(class);
  2613. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2614. list_for_each_entry(segment, segs, node) {
  2615. memset(phdr, 0, sizeof_elf_phdr(class));
  2616. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2617. set_phdr_property(phdr, class, p_offset, offset);
  2618. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2619. set_phdr_property(phdr, class, p_paddr, segment->da);
  2620. set_phdr_property(phdr, class, p_filesz, segment->size);
  2621. set_phdr_property(phdr, class, p_memsz, segment->size);
  2622. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2623. set_phdr_property(phdr, class, p_align, 0);
  2624. if (segment->va) {
  2625. memcpy(data + offset, segment->va, segment->size);
  2626. } else {
  2627. ptr = devm_ioremap(dev, segment->da, segment->size);
  2628. if (!ptr) {
  2629. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2630. &segment->da, segment->size);
  2631. memset(data + offset, 0xff, segment->size);
  2632. } else {
  2633. memcpy_fromio(data + offset, ptr,
  2634. segment->size);
  2635. }
  2636. }
  2637. offset += segment->size;
  2638. phdr += sizeof_elf_phdr(class);
  2639. }
  2640. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2641. }
  2642. /* Saving dump to file system is always needed in this case. */
  2643. static bool cnss_dump_enabled(void)
  2644. {
  2645. return true;
  2646. }
  2647. #endif /* CONFIG_QCOM_RAMDUMP */
  2648. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2649. {
  2650. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2651. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2652. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2653. struct qcom_dump_segment *seg;
  2654. struct cnss_dump_meta_info meta_info = {0};
  2655. struct list_head head;
  2656. int i, ret = 0;
  2657. if (!dump_enabled()) {
  2658. cnss_pr_info("Dump collection is not enabled\n");
  2659. return ret;
  2660. }
  2661. INIT_LIST_HEAD(&head);
  2662. for (i = 0; i < dump_data->nentries; i++) {
  2663. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2664. cnss_pr_err("Unsupported dump type: %d",
  2665. dump_seg->type);
  2666. continue;
  2667. }
  2668. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2669. if (!seg) {
  2670. cnss_pr_err("%s: Failed to allocate mem for seg %d\n",
  2671. __func__, i);
  2672. continue;
  2673. }
  2674. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2675. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2676. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2677. }
  2678. meta_info.entry[dump_seg->type].entry_num++;
  2679. seg->da = dump_seg->address;
  2680. seg->va = dump_seg->v_address;
  2681. seg->size = dump_seg->size;
  2682. list_add_tail(&seg->node, &head);
  2683. dump_seg++;
  2684. }
  2685. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2686. if (!seg) {
  2687. cnss_pr_err("%s: Failed to allocate mem for elf ramdump seg\n",
  2688. __func__);
  2689. goto skip_elf_dump;
  2690. }
  2691. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2692. meta_info.version = CNSS_RAMDUMP_VERSION;
  2693. meta_info.chipset = plat_priv->device_id;
  2694. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2695. seg->va = &meta_info;
  2696. seg->size = sizeof(meta_info);
  2697. list_add(&seg->node, &head);
  2698. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2699. skip_elf_dump:
  2700. while (!list_empty(&head)) {
  2701. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2702. list_del(&seg->node);
  2703. kfree(seg);
  2704. }
  2705. return ret;
  2706. }
  2707. #ifdef CONFIG_CNSS2_SSR_DRIVER_DUMP
  2708. /**
  2709. * cnss_host_ramdump_dev_release() - callback function for device release
  2710. * @dev: device to be released
  2711. *
  2712. * Return: None
  2713. */
  2714. static void cnss_host_ramdump_dev_release(struct device *dev)
  2715. {
  2716. cnss_pr_dbg("free host ramdump device\n");
  2717. kfree(dev);
  2718. }
  2719. int cnss_do_host_ramdump(struct cnss_plat_data *plat_priv,
  2720. struct cnss_ssr_driver_dump_entry *ssr_entry,
  2721. size_t num_entries_loaded)
  2722. {
  2723. struct qcom_dump_segment *seg;
  2724. struct cnss_host_dump_meta_info meta_info = {0};
  2725. struct list_head head;
  2726. int dev_ret = 0;
  2727. struct device *new_device;
  2728. static const char * const wlan_str[] = {
  2729. [CNSS_HOST_WLAN_LOGS] = "wlan_logs",
  2730. [CNSS_HOST_HTC_CREDIT] = "htc_credit",
  2731. [CNSS_HOST_WMI_TX_CMP] = "wmi_tx_cmp",
  2732. [CNSS_HOST_WMI_COMMAND_LOG] = "wmi_command_log",
  2733. [CNSS_HOST_WMI_EVENT_LOG] = "wmi_event_log",
  2734. [CNSS_HOST_WMI_RX_EVENT] = "wmi_rx_event",
  2735. [CNSS_HOST_HAL_SOC] = "hal_soc",
  2736. [CNSS_HOST_GWLAN_LOGGING] = "gwlan_logging",
  2737. [CNSS_HOST_WMI_DEBUG_LOG_INFO] = "wmi_debug_log_info",
  2738. [CNSS_HOST_HTC_CREDIT_IDX] = "htc_credit_history_idx",
  2739. [CNSS_HOST_HTC_CREDIT_LEN] = "htc_credit_history_length",
  2740. [CNSS_HOST_WMI_TX_CMP_IDX] = "wmi_tx_cmp_idx",
  2741. [CNSS_HOST_WMI_COMMAND_LOG_IDX] = "wmi_command_log_idx",
  2742. [CNSS_HOST_WMI_EVENT_LOG_IDX] = "wmi_event_log_idx",
  2743. [CNSS_HOST_WMI_RX_EVENT_IDX] = "wmi_rx_event_idx",
  2744. [CNSS_HOST_HIF_CE_DESC_HISTORY_BUFF] = "hif_ce_desc_history_buff",
  2745. [CNSS_HOST_HANG_EVENT_DATA] = "hang_event_data",
  2746. [CNSS_HOST_CE_DESC_HIST] = "hif_ce_desc_hist",
  2747. [CNSS_HOST_CE_COUNT_MAX] = "hif_ce_count_max",
  2748. [CNSS_HOST_CE_HISTORY_MAX] = "hif_ce_history_max",
  2749. [CNSS_HOST_ONLY_FOR_CRIT_CE] = "hif_ce_only_for_crit",
  2750. [CNSS_HOST_HIF_EVENT_HISTORY] = "hif_event_history",
  2751. [CNSS_HOST_HIF_EVENT_HIST_MAX] = "hif_event_hist_max",
  2752. [CNSS_HOST_DP_WBM_DESC_REL] = "wbm_desc_rel_ring",
  2753. [CNSS_HOST_DP_WBM_DESC_REL_HANDLE] = "wbm_desc_rel_ring_handle",
  2754. [CNSS_HOST_DP_TCL_CMD] = "tcl_cmd_ring",
  2755. [CNSS_HOST_DP_TCL_CMD_HANDLE] = "tcl_cmd_ring_handle",
  2756. [CNSS_HOST_DP_TCL_STATUS] = "tcl_status_ring",
  2757. [CNSS_HOST_DP_TCL_STATUS_HANDLE] = "tcl_status_ring_handle",
  2758. [CNSS_HOST_DP_REO_REINJ] = "reo_reinject_ring",
  2759. [CNSS_HOST_DP_REO_REINJ_HANDLE] = "reo_reinject_ring_handle",
  2760. [CNSS_HOST_DP_RX_REL] = "rx_rel_ring",
  2761. [CNSS_HOST_DP_RX_REL_HANDLE] = "rx_rel_ring_handle",
  2762. [CNSS_HOST_DP_REO_EXP] = "reo_exception_ring",
  2763. [CNSS_HOST_DP_REO_EXP_HANDLE] = "reo_exception_ring_handle",
  2764. [CNSS_HOST_DP_REO_CMD] = "reo_cmd_ring",
  2765. [CNSS_HOST_DP_REO_CMD_HANDLE] = "reo_cmd_ring_handle",
  2766. [CNSS_HOST_DP_REO_STATUS] = "reo_status_ring",
  2767. [CNSS_HOST_DP_REO_STATUS_HANDLE] = "reo_status_ring_handle",
  2768. [CNSS_HOST_DP_TCL_DATA_0] = "tcl_data_ring_0",
  2769. [CNSS_HOST_DP_TCL_DATA_0_HANDLE] = "tcl_data_ring_0_handle",
  2770. [CNSS_HOST_DP_TX_COMP_0] = "tx_comp_ring_0",
  2771. [CNSS_HOST_DP_TX_COMP_0_HANDLE] = "tx_comp_ring_0_handle",
  2772. [CNSS_HOST_DP_TCL_DATA_1] = "tcl_data_ring_1",
  2773. [CNSS_HOST_DP_TCL_DATA_1_HANDLE] = "tcl_data_ring_1_handle",
  2774. [CNSS_HOST_DP_TX_COMP_1] = "tx_comp_ring_1",
  2775. [CNSS_HOST_DP_TX_COMP_1_HANDLE] = "tx_comp_ring_1_handle",
  2776. [CNSS_HOST_DP_TCL_DATA_2] = "tcl_data_ring_2",
  2777. [CNSS_HOST_DP_TCL_DATA_2_HANDLE] = "tcl_data_ring_2_handle",
  2778. [CNSS_HOST_DP_TX_COMP_2] = "tx_comp_ring_2",
  2779. [CNSS_HOST_DP_TX_COMP_2_HANDLE] = "tx_comp_ring_2_handle",
  2780. [CNSS_HOST_DP_REO_DST_0] = "reo_dest_ring_0",
  2781. [CNSS_HOST_DP_REO_DST_0_HANDLE] = "reo_dest_ring_0_handle",
  2782. [CNSS_HOST_DP_REO_DST_1] = "reo_dest_ring_1",
  2783. [CNSS_HOST_DP_REO_DST_1_HANDLE] = "reo_dest_ring_1_handle",
  2784. [CNSS_HOST_DP_REO_DST_2] = "reo_dest_ring_2",
  2785. [CNSS_HOST_DP_REO_DST_2_HANDLE] = "reo_dest_ring_2_handle",
  2786. [CNSS_HOST_DP_REO_DST_3] = "reo_dest_ring_3",
  2787. [CNSS_HOST_DP_REO_DST_3_HANDLE] = "reo_dest_ring_3_handle",
  2788. [CNSS_HOST_DP_REO_DST_4] = "reo_dest_ring_4",
  2789. [CNSS_HOST_DP_REO_DST_4_HANDLE] = "reo_dest_ring_4_handle",
  2790. [CNSS_HOST_DP_REO_DST_5] = "reo_dest_ring_5",
  2791. [CNSS_HOST_DP_REO_DST_5_HANDLE] = "reo_dest_ring_5_handle",
  2792. [CNSS_HOST_DP_REO_DST_6] = "reo_dest_ring_6",
  2793. [CNSS_HOST_DP_REO_DST_6_HANDLE] = "reo_dest_ring_6_handle",
  2794. [CNSS_HOST_DP_REO_DST_7] = "reo_dest_ring_7",
  2795. [CNSS_HOST_DP_REO_DST_7_HANDLE] = "reo_dest_ring_7_handle",
  2796. [CNSS_HOST_DP_PDEV_0] = "dp_pdev_0",
  2797. [CNSS_HOST_DP_WLAN_CFG_CTX] = "wlan_cfg_ctx",
  2798. [CNSS_HOST_DP_SOC] = "dp_soc",
  2799. [CNSS_HOST_HAL_RX_FST] = "hal_rx_fst",
  2800. [CNSS_HOST_DP_FISA] = "dp_fisa",
  2801. [CNSS_HOST_DP_FISA_HW_FSE_TABLE] = "dp_fisa_hw_fse_table",
  2802. [CNSS_HOST_DP_FISA_SW_FSE_TABLE] = "dp_fisa_sw_fse_table",
  2803. [CNSS_HOST_HIF] = "hif",
  2804. [CNSS_HOST_QDF_NBUF_HIST] = "qdf_nbuf_history",
  2805. [CNSS_HOST_TCL_WBM_MAP] = "tcl_wbm_map_array",
  2806. [CNSS_HOST_RX_MAC_BUF_RING_0] = "rx_mac_buf_ring_0",
  2807. [CNSS_HOST_RX_MAC_BUF_RING_0_HANDLE] = "rx_mac_buf_ring_0_handle",
  2808. [CNSS_HOST_RX_MAC_BUF_RING_1] = "rx_mac_buf_ring_1",
  2809. [CNSS_HOST_RX_MAC_BUF_RING_1_HANDLE] = "rx_mac_buf_ring_1_handle",
  2810. [CNSS_HOST_RX_REFILL_0] = "rx_refill_buf_ring_0",
  2811. [CNSS_HOST_RX_REFILL_0_HANDLE] = "rx_refill_buf_ring_0_handle",
  2812. [CNSS_HOST_CE_0] = "ce_0",
  2813. [CNSS_HOST_CE_0_SRC_RING] = "ce_0_src_ring",
  2814. [CNSS_HOST_CE_0_SRC_RING_CTX] = "ce_0_src_ring_ctx",
  2815. [CNSS_HOST_CE_1] = "ce_1",
  2816. [CNSS_HOST_CE_1_STATUS_RING] = "ce_1_status_ring",
  2817. [CNSS_HOST_CE_1_STATUS_RING_CTX] = "ce_1_status_ring_ctx",
  2818. [CNSS_HOST_CE_1_DEST_RING] = "ce_1_dest_ring",
  2819. [CNSS_HOST_CE_1_DEST_RING_CTX] = "ce_1_dest_ring_ctx",
  2820. [CNSS_HOST_CE_2] = "ce_2",
  2821. [CNSS_HOST_CE_2_STATUS_RING] = "ce_2_status_ring",
  2822. [CNSS_HOST_CE_2_STATUS_RING_CTX] = "ce_2_status_ring_ctx",
  2823. [CNSS_HOST_CE_2_DEST_RING] = "ce_2_dest_ring",
  2824. [CNSS_HOST_CE_2_DEST_RING_CTX] = "ce_2_dest_ring_ctx",
  2825. [CNSS_HOST_CE_3] = "ce_3",
  2826. [CNSS_HOST_CE_3_SRC_RING] = "ce_3_src_ring",
  2827. [CNSS_HOST_CE_3_SRC_RING_CTX] = "ce_3_src_ring_ctx",
  2828. [CNSS_HOST_CE_4] = "ce_4",
  2829. [CNSS_HOST_CE_4_SRC_RING] = "ce_4_src_ring",
  2830. [CNSS_HOST_CE_4_SRC_RING_CTX] = "ce_4_src_ring_ctx",
  2831. [CNSS_HOST_CE_5] = "ce_5",
  2832. [CNSS_HOST_CE_6] = "ce_6",
  2833. [CNSS_HOST_CE_7] = "ce_7",
  2834. [CNSS_HOST_CE_7_STATUS_RING] = "ce_7_status_ring",
  2835. [CNSS_HOST_CE_7_STATUS_RING_CTX] = "ce_7_status_ring_ctx",
  2836. [CNSS_HOST_CE_7_DEST_RING] = "ce_7_dest_ring",
  2837. [CNSS_HOST_CE_7_DEST_RING_CTX] = "ce_7_dest_ring_ctx",
  2838. [CNSS_HOST_CE_8] = "ce_8",
  2839. [CNSS_HOST_DP_TCL_DATA_3] = "tcl_data_ring_3",
  2840. [CNSS_HOST_DP_TCL_DATA_3_HANDLE] = "tcl_data_ring_3_handle",
  2841. [CNSS_HOST_DP_TX_COMP_3] = "tx_comp_ring_3",
  2842. [CNSS_HOST_DP_TX_COMP_3_HANDLE] = "tx_comp_ring_3_handle"
  2843. };
  2844. int i;
  2845. int ret = 0;
  2846. enum cnss_host_dump_type j;
  2847. if (!dump_enabled()) {
  2848. cnss_pr_info("Dump collection is not enabled\n");
  2849. return ret;
  2850. }
  2851. new_device = kcalloc(1, sizeof(*new_device), GFP_KERNEL);
  2852. if (!new_device) {
  2853. cnss_pr_err("Failed to alloc device mem\n");
  2854. return -ENOMEM;
  2855. }
  2856. new_device->release = cnss_host_ramdump_dev_release;
  2857. device_initialize(new_device);
  2858. dev_set_name(new_device, "wlan_driver");
  2859. dev_ret = device_add(new_device);
  2860. if (dev_ret) {
  2861. cnss_pr_err("Failed to add new device\n");
  2862. goto put_device;
  2863. }
  2864. INIT_LIST_HEAD(&head);
  2865. for (i = 0; i < num_entries_loaded; i++) {
  2866. /* If region name registered by driver is not present in
  2867. * wlan_str. type for that entry will not be set, but entry will
  2868. * be added. Which will result in entry type being 0. Currently
  2869. * entry type 0 is for wlan_logs, which will result in parsing
  2870. * issue for wlan_logs as parsing is done based upon type field.
  2871. * So initialize type with -1(Invalid) to avoid such issues.
  2872. */
  2873. meta_info.entry[i].type = -1;
  2874. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2875. if (!seg) {
  2876. cnss_pr_err("Failed to alloc seg entry %d\n", i);
  2877. continue;
  2878. }
  2879. seg->va = ssr_entry[i].buffer_pointer;
  2880. seg->da = (dma_addr_t)ssr_entry[i].buffer_pointer;
  2881. seg->size = ssr_entry[i].buffer_size;
  2882. for (j = 0; j < CNSS_HOST_DUMP_TYPE_MAX; j++) {
  2883. if (strcmp(ssr_entry[i].region_name, wlan_str[j]) == 0) {
  2884. meta_info.entry[i].type = j;
  2885. }
  2886. }
  2887. meta_info.entry[i].entry_start = i + 1;
  2888. meta_info.entry[i].entry_num++;
  2889. list_add_tail(&seg->node, &head);
  2890. }
  2891. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2892. if (!seg) {
  2893. cnss_pr_err("%s: Failed to allocate mem for host dump seg\n",
  2894. __func__);
  2895. goto skip_host_dump;
  2896. }
  2897. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2898. meta_info.version = CNSS_RAMDUMP_VERSION;
  2899. meta_info.chipset = plat_priv->device_id;
  2900. meta_info.total_entries = num_entries_loaded;
  2901. seg->va = &meta_info;
  2902. seg->da = (dma_addr_t)&meta_info;
  2903. seg->size = sizeof(meta_info);
  2904. list_add(&seg->node, &head);
  2905. ret = qcom_elf_dump(&head, new_device, ELF_CLASS);
  2906. skip_host_dump:
  2907. while (!list_empty(&head)) {
  2908. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2909. list_del(&seg->node);
  2910. kfree(seg);
  2911. }
  2912. device_del(new_device);
  2913. put_device:
  2914. put_device(new_device);
  2915. cnss_pr_dbg("host ramdump result %d\n", ret);
  2916. return ret;
  2917. }
  2918. #endif
  2919. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2920. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2921. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2922. {
  2923. struct cnss_ramdump_info *ramdump_info;
  2924. struct msm_dump_entry dump_entry;
  2925. ramdump_info = &plat_priv->ramdump_info;
  2926. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2927. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2928. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2929. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2930. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2931. sizeof(ramdump_info->dump_data.name));
  2932. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2933. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2934. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2935. &dump_entry);
  2936. }
  2937. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2938. {
  2939. int ret = 0;
  2940. struct device *dev;
  2941. struct cnss_ramdump_info *ramdump_info;
  2942. u32 ramdump_size = 0;
  2943. dev = &plat_priv->plat_dev->dev;
  2944. ramdump_info = &plat_priv->ramdump_info;
  2945. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2946. /* dt type: legacy or converged */
  2947. ret = of_property_read_u32(dev->of_node,
  2948. "qcom,wlan-ramdump-dynamic",
  2949. &ramdump_size);
  2950. } else {
  2951. ret = of_property_read_u32(plat_priv->dev_node,
  2952. "qcom,wlan-ramdump-dynamic",
  2953. &ramdump_size);
  2954. }
  2955. if (ret == 0) {
  2956. ramdump_info->ramdump_va =
  2957. dma_alloc_coherent(dev, ramdump_size,
  2958. &ramdump_info->ramdump_pa,
  2959. GFP_KERNEL);
  2960. if (ramdump_info->ramdump_va)
  2961. ramdump_info->ramdump_size = ramdump_size;
  2962. }
  2963. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2964. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2965. if (ramdump_info->ramdump_size == 0) {
  2966. cnss_pr_info("Ramdump will not be collected");
  2967. goto out;
  2968. }
  2969. ret = cnss_init_dump_entry(plat_priv);
  2970. if (ret) {
  2971. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2972. goto free_ramdump;
  2973. }
  2974. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2975. if (!ramdump_info->ramdump_dev) {
  2976. cnss_pr_err("Failed to create ramdump device!");
  2977. ret = -ENOMEM;
  2978. goto free_ramdump;
  2979. }
  2980. return 0;
  2981. free_ramdump:
  2982. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2983. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2984. out:
  2985. return ret;
  2986. }
  2987. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2988. {
  2989. struct device *dev;
  2990. struct cnss_ramdump_info *ramdump_info;
  2991. dev = &plat_priv->plat_dev->dev;
  2992. ramdump_info = &plat_priv->ramdump_info;
  2993. if (ramdump_info->ramdump_dev)
  2994. cnss_destroy_ramdump_device(plat_priv,
  2995. ramdump_info->ramdump_dev);
  2996. if (ramdump_info->ramdump_va)
  2997. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2998. ramdump_info->ramdump_va,
  2999. ramdump_info->ramdump_pa);
  3000. }
  3001. /**
  3002. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  3003. * @ret: Error returned by msm_dump_data_register_nominidump
  3004. *
  3005. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  3006. * ignore failure.
  3007. *
  3008. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  3009. */
  3010. static int cnss_ignore_dump_data_reg_fail(int ret)
  3011. {
  3012. return ret;
  3013. }
  3014. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  3015. {
  3016. int ret = 0;
  3017. struct cnss_ramdump_info_v2 *info_v2;
  3018. struct cnss_dump_data *dump_data;
  3019. struct msm_dump_entry dump_entry;
  3020. struct device *dev = &plat_priv->plat_dev->dev;
  3021. u32 ramdump_size = 0;
  3022. info_v2 = &plat_priv->ramdump_info_v2;
  3023. dump_data = &info_v2->dump_data;
  3024. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  3025. /* dt type: legacy or converged */
  3026. ret = of_property_read_u32(dev->of_node,
  3027. "qcom,wlan-ramdump-dynamic",
  3028. &ramdump_size);
  3029. } else {
  3030. ret = of_property_read_u32(plat_priv->dev_node,
  3031. "qcom,wlan-ramdump-dynamic",
  3032. &ramdump_size);
  3033. }
  3034. if (ret == 0)
  3035. info_v2->ramdump_size = ramdump_size;
  3036. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  3037. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  3038. if (!info_v2->dump_data_vaddr)
  3039. return -ENOMEM;
  3040. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  3041. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  3042. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  3043. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  3044. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  3045. sizeof(dump_data->name));
  3046. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3047. dump_entry.addr = virt_to_phys(dump_data);
  3048. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  3049. &dump_entry);
  3050. if (ret) {
  3051. ret = cnss_ignore_dump_data_reg_fail(ret);
  3052. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  3053. ret ? "Error" : "Ignoring", ret);
  3054. goto free_ramdump;
  3055. }
  3056. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  3057. if (!info_v2->ramdump_dev) {
  3058. cnss_pr_err("Failed to create ramdump device!\n");
  3059. ret = -ENOMEM;
  3060. goto free_ramdump;
  3061. }
  3062. return 0;
  3063. free_ramdump:
  3064. kfree(info_v2->dump_data_vaddr);
  3065. info_v2->dump_data_vaddr = NULL;
  3066. return ret;
  3067. }
  3068. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  3069. {
  3070. struct cnss_ramdump_info_v2 *info_v2;
  3071. info_v2 = &plat_priv->ramdump_info_v2;
  3072. if (info_v2->ramdump_dev)
  3073. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  3074. kfree(info_v2->dump_data_vaddr);
  3075. info_v2->dump_data_vaddr = NULL;
  3076. info_v2->dump_data_valid = false;
  3077. }
  3078. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  3079. {
  3080. int ret = 0;
  3081. switch (plat_priv->device_id) {
  3082. case QCA6174_DEVICE_ID:
  3083. ret = cnss_register_ramdump_v1(plat_priv);
  3084. break;
  3085. case QCA6290_DEVICE_ID:
  3086. case QCA6390_DEVICE_ID:
  3087. case QCN7605_DEVICE_ID:
  3088. case QCA6490_DEVICE_ID:
  3089. case KIWI_DEVICE_ID:
  3090. case MANGO_DEVICE_ID:
  3091. case PEACH_DEVICE_ID:
  3092. ret = cnss_register_ramdump_v2(plat_priv);
  3093. break;
  3094. default:
  3095. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  3096. ret = -ENODEV;
  3097. break;
  3098. }
  3099. return ret;
  3100. }
  3101. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  3102. {
  3103. switch (plat_priv->device_id) {
  3104. case QCA6174_DEVICE_ID:
  3105. cnss_unregister_ramdump_v1(plat_priv);
  3106. break;
  3107. case QCA6290_DEVICE_ID:
  3108. case QCA6390_DEVICE_ID:
  3109. case QCN7605_DEVICE_ID:
  3110. case QCA6490_DEVICE_ID:
  3111. case KIWI_DEVICE_ID:
  3112. case MANGO_DEVICE_ID:
  3113. case PEACH_DEVICE_ID:
  3114. cnss_unregister_ramdump_v2(plat_priv);
  3115. break;
  3116. default:
  3117. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  3118. break;
  3119. }
  3120. }
  3121. #else
  3122. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  3123. {
  3124. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  3125. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  3126. struct device *dev = &plat_priv->plat_dev->dev;
  3127. u32 ramdump_size = 0;
  3128. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  3129. &ramdump_size) == 0)
  3130. info_v2->ramdump_size = ramdump_size;
  3131. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  3132. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  3133. if (!info_v2->dump_data_vaddr)
  3134. return -ENOMEM;
  3135. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  3136. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  3137. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  3138. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  3139. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  3140. sizeof(dump_data->name));
  3141. info_v2->ramdump_dev = dev;
  3142. return 0;
  3143. }
  3144. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  3145. {
  3146. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  3147. info_v2->ramdump_dev = NULL;
  3148. kfree(info_v2->dump_data_vaddr);
  3149. info_v2->dump_data_vaddr = NULL;
  3150. info_v2->dump_data_valid = false;
  3151. }
  3152. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  3153. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  3154. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  3155. phys_addr_t *pa, unsigned long attrs)
  3156. {
  3157. struct sg_table sgt;
  3158. int ret;
  3159. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  3160. if (ret) {
  3161. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  3162. va, &dma, size, attrs);
  3163. return -EINVAL;
  3164. }
  3165. *pa = page_to_phys(sg_page(sgt.sgl));
  3166. sg_free_table(&sgt);
  3167. return 0;
  3168. }
  3169. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  3170. enum cnss_fw_dump_type type, int seg_no,
  3171. void *va, phys_addr_t pa, size_t size)
  3172. {
  3173. struct md_region md_entry;
  3174. int ret;
  3175. switch (type) {
  3176. case CNSS_FW_IMAGE:
  3177. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  3178. seg_no);
  3179. break;
  3180. case CNSS_FW_RDDM:
  3181. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  3182. seg_no);
  3183. break;
  3184. case CNSS_FW_REMOTE_HEAP:
  3185. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  3186. seg_no);
  3187. break;
  3188. default:
  3189. cnss_pr_err("Unknown dump type ID: %d\n", type);
  3190. return -EINVAL;
  3191. }
  3192. md_entry.phys_addr = pa;
  3193. md_entry.virt_addr = (uintptr_t)va;
  3194. md_entry.size = size;
  3195. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3196. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  3197. md_entry.name, va, &pa, size);
  3198. ret = msm_minidump_add_region(&md_entry);
  3199. if (ret < 0)
  3200. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  3201. return ret;
  3202. }
  3203. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  3204. enum cnss_fw_dump_type type, int seg_no,
  3205. void *va, phys_addr_t pa, size_t size)
  3206. {
  3207. struct md_region md_entry;
  3208. int ret;
  3209. switch (type) {
  3210. case CNSS_FW_IMAGE:
  3211. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  3212. seg_no);
  3213. break;
  3214. case CNSS_FW_RDDM:
  3215. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  3216. seg_no);
  3217. break;
  3218. case CNSS_FW_REMOTE_HEAP:
  3219. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  3220. seg_no);
  3221. break;
  3222. default:
  3223. cnss_pr_err("Unknown dump type ID: %d\n", type);
  3224. return -EINVAL;
  3225. }
  3226. md_entry.phys_addr = pa;
  3227. md_entry.virt_addr = (uintptr_t)va;
  3228. md_entry.size = size;
  3229. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3230. cnss_pr_vdbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  3231. md_entry.name, va, &pa, size);
  3232. ret = msm_minidump_remove_region(&md_entry);
  3233. if (ret)
  3234. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  3235. ret);
  3236. return ret;
  3237. }
  3238. #else
  3239. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  3240. phys_addr_t *pa, unsigned long attrs)
  3241. {
  3242. return 0;
  3243. }
  3244. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  3245. enum cnss_fw_dump_type type, int seg_no,
  3246. void *va, phys_addr_t pa, size_t size)
  3247. {
  3248. return 0;
  3249. }
  3250. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  3251. enum cnss_fw_dump_type type, int seg_no,
  3252. void *va, phys_addr_t pa, size_t size)
  3253. {
  3254. return 0;
  3255. }
  3256. #endif /* CONFIG_QCOM_MINIDUMP */
  3257. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  3258. const struct firmware **fw_entry,
  3259. const char *filename)
  3260. {
  3261. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  3262. return request_firmware_direct(fw_entry, filename,
  3263. &plat_priv->plat_dev->dev);
  3264. else
  3265. return firmware_request_nowarn(fw_entry, filename,
  3266. &plat_priv->plat_dev->dev);
  3267. }
  3268. #if IS_ENABLED(CONFIG_INTERCONNECT)
  3269. /**
  3270. * cnss_register_bus_scale() - Setup interconnect voting data
  3271. * @plat_priv: Platform data structure
  3272. *
  3273. * For different interconnect path configured in device tree setup voting data
  3274. * for list of bandwidth requirements.
  3275. *
  3276. * Result: 0 for success. -EINVAL if not configured
  3277. */
  3278. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3279. {
  3280. int ret = -EINVAL;
  3281. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  3282. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3283. struct device *dev = &plat_priv->plat_dev->dev;
  3284. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  3285. ret = of_property_read_u32(dev->of_node,
  3286. "qcom,icc-path-count",
  3287. &plat_priv->icc.path_count);
  3288. if (ret) {
  3289. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  3290. return 0;
  3291. }
  3292. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  3293. "qcom,bus-bw-cfg-count",
  3294. &plat_priv->icc.bus_bw_cfg_count);
  3295. if (ret) {
  3296. cnss_pr_err("Failed to get Bus BW Config table size\n");
  3297. goto cleanup;
  3298. }
  3299. cfg_arr_size = plat_priv->icc.path_count *
  3300. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  3301. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  3302. if (!cfg_arr) {
  3303. cnss_pr_err("Failed to alloc cfg table mem\n");
  3304. ret = -ENOMEM;
  3305. goto cleanup;
  3306. }
  3307. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  3308. "qcom,bus-bw-cfg", cfg_arr,
  3309. cfg_arr_size);
  3310. if (ret) {
  3311. cnss_pr_err("Invalid Bus BW Config Table\n");
  3312. goto cleanup;
  3313. }
  3314. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  3315. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  3316. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  3317. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  3318. GFP_KERNEL);
  3319. if (!bus_bw_info) {
  3320. ret = -ENOMEM;
  3321. goto out;
  3322. }
  3323. ret = of_property_read_string_index(dev->of_node,
  3324. "interconnect-names", idx,
  3325. &bus_bw_info->icc_name);
  3326. if (ret)
  3327. goto out;
  3328. bus_bw_info->icc_path =
  3329. of_icc_get(&plat_priv->plat_dev->dev,
  3330. bus_bw_info->icc_name);
  3331. if (IS_ERR(bus_bw_info->icc_path)) {
  3332. ret = PTR_ERR(bus_bw_info->icc_path);
  3333. if (ret != -EPROBE_DEFER) {
  3334. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  3335. bus_bw_info->icc_name, ret);
  3336. goto out;
  3337. }
  3338. }
  3339. bus_bw_info->cfg_table =
  3340. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  3341. sizeof(*bus_bw_info->cfg_table),
  3342. GFP_KERNEL);
  3343. if (!bus_bw_info->cfg_table) {
  3344. ret = -ENOMEM;
  3345. goto out;
  3346. }
  3347. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  3348. bus_bw_info->icc_name);
  3349. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  3350. CNSS_ICC_VOTE_MAX);
  3351. i < plat_priv->icc.bus_bw_cfg_count;
  3352. i++, j += 2) {
  3353. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  3354. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  3355. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  3356. i, bus_bw_info->cfg_table[i].avg_bw,
  3357. bus_bw_info->cfg_table[i].peak_bw);
  3358. }
  3359. list_add_tail(&bus_bw_info->list,
  3360. &plat_priv->icc.list_head);
  3361. }
  3362. kfree(cfg_arr);
  3363. return 0;
  3364. out:
  3365. list_for_each_entry_safe(bus_bw_info, tmp,
  3366. &plat_priv->icc.list_head, list) {
  3367. list_del(&bus_bw_info->list);
  3368. }
  3369. cleanup:
  3370. kfree(cfg_arr);
  3371. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3372. return ret;
  3373. }
  3374. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  3375. {
  3376. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3377. list_for_each_entry_safe(bus_bw_info, tmp,
  3378. &plat_priv->icc.list_head, list) {
  3379. list_del(&bus_bw_info->list);
  3380. if (bus_bw_info->icc_path)
  3381. icc_put(bus_bw_info->icc_path);
  3382. }
  3383. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3384. }
  3385. #else
  3386. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3387. {
  3388. return 0;
  3389. }
  3390. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  3391. #endif /* CONFIG_INTERCONNECT */
  3392. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  3393. {
  3394. struct cnss_plat_data *plat_priv = cb_ctx;
  3395. if (!plat_priv) {
  3396. cnss_pr_err("%s: Invalid context\n", __func__);
  3397. return;
  3398. }
  3399. if (status) {
  3400. cnss_pr_info("CNSS Daemon connected\n");
  3401. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3402. complete(&plat_priv->daemon_connected);
  3403. } else {
  3404. cnss_pr_info("CNSS Daemon disconnected\n");
  3405. reinit_completion(&plat_priv->daemon_connected);
  3406. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3407. }
  3408. }
  3409. static ssize_t enable_hds_store(struct device *dev,
  3410. struct device_attribute *attr,
  3411. const char *buf, size_t count)
  3412. {
  3413. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3414. unsigned int enable_hds = 0;
  3415. if (!plat_priv)
  3416. return -ENODEV;
  3417. if (sscanf(buf, "%du", &enable_hds) != 1) {
  3418. cnss_pr_err("Invalid enable_hds sysfs command\n");
  3419. return -EINVAL;
  3420. }
  3421. if (enable_hds)
  3422. plat_priv->hds_enabled = true;
  3423. else
  3424. plat_priv->hds_enabled = false;
  3425. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  3426. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  3427. return count;
  3428. }
  3429. static ssize_t recovery_show(struct device *dev,
  3430. struct device_attribute *attr,
  3431. char *buf)
  3432. {
  3433. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3434. u32 buf_size = PAGE_SIZE;
  3435. u32 curr_len = 0;
  3436. u32 buf_written = 0;
  3437. if (!plat_priv)
  3438. return -ENODEV;
  3439. buf_written = scnprintf(buf, buf_size,
  3440. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  3441. "BIT0 -- wlan fw recovery\n"
  3442. "BIT1 -- wlan pcss recovery\n"
  3443. "---------------------------------\n");
  3444. curr_len += buf_written;
  3445. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3446. "WLAN recovery %s[%d]\n",
  3447. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  3448. plat_priv->recovery_enabled);
  3449. curr_len += buf_written;
  3450. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3451. "WLAN PCSS recovery %s[%d]\n",
  3452. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  3453. plat_priv->recovery_pcss_enabled);
  3454. curr_len += buf_written;
  3455. /*
  3456. * Now size of curr_len is not over page size for sure,
  3457. * later if new item or none-fixed size item added, need
  3458. * add check to make sure curr_len is not over page size.
  3459. */
  3460. return curr_len;
  3461. }
  3462. static ssize_t tme_opt_file_download_show(struct device *dev,
  3463. struct device_attribute *attr, char *buf)
  3464. {
  3465. u32 buf_size = PAGE_SIZE;
  3466. u32 curr_len = 0;
  3467. u32 buf_written = 0;
  3468. buf_written = scnprintf(buf, buf_size,
  3469. "Usage: echo [file_type] > /sys/kernel/cnss/tme_opt_file_download\n"
  3470. "file_type = sec -- For OEM_FUSE file\n"
  3471. "file_type = rpr -- For RPR file\n"
  3472. "file_type = dpr -- For DPR file\n");
  3473. curr_len += buf_written;
  3474. return curr_len;
  3475. }
  3476. static ssize_t time_sync_period_show(struct device *dev,
  3477. struct device_attribute *attr,
  3478. char *buf)
  3479. {
  3480. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3481. return scnprintf(buf, PAGE_SIZE, "%u ms\n",
  3482. plat_priv->ctrl_params.time_sync_period);
  3483. }
  3484. /**
  3485. * cnss_get_min_time_sync_period_by_vote() - Get minimum time sync period
  3486. * @plat_priv: Platform data structure
  3487. *
  3488. * Result: return minimum time sync period present in vote from wlan and sys
  3489. */
  3490. uint32_t cnss_get_min_time_sync_period_by_vote(struct cnss_plat_data *plat_priv)
  3491. {
  3492. unsigned int i, min_time_sync_period = CNSS_TIME_SYNC_PERIOD_INVALID;
  3493. unsigned int time_sync_period;
  3494. for (i = 0; i < TIME_SYNC_VOTE_MAX; i++) {
  3495. time_sync_period = plat_priv->ctrl_params.time_sync_period_vote[i];
  3496. if (min_time_sync_period > time_sync_period)
  3497. min_time_sync_period = time_sync_period;
  3498. }
  3499. return min_time_sync_period;
  3500. }
  3501. static ssize_t time_sync_period_store(struct device *dev,
  3502. struct device_attribute *attr,
  3503. const char *buf, size_t count)
  3504. {
  3505. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3506. unsigned int time_sync_period = 0;
  3507. if (!plat_priv)
  3508. return -ENODEV;
  3509. if (sscanf(buf, "%du", &time_sync_period) != 1) {
  3510. cnss_pr_err("Invalid time sync sysfs command\n");
  3511. return -EINVAL;
  3512. }
  3513. if (time_sync_period < CNSS_MIN_TIME_SYNC_PERIOD) {
  3514. cnss_pr_err("Invalid time sync value\n");
  3515. return -EINVAL;
  3516. }
  3517. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_CNSS] =
  3518. time_sync_period;
  3519. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3520. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3521. cnss_pr_err("Invalid min time sync value\n");
  3522. return -EINVAL;
  3523. }
  3524. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3525. return count;
  3526. }
  3527. /**
  3528. * cnss_update_time_sync_period() - Set time sync period given by driver
  3529. * @dev: device structure
  3530. * @time_sync_period: time sync period value
  3531. *
  3532. * Update time sync period vote of driver and set minimum of time sync period
  3533. * from stored vote through wlan and sys config
  3534. * Result: return 0 for success, error in case of invalid value and no dev
  3535. */
  3536. int cnss_update_time_sync_period(struct device *dev, uint32_t time_sync_period)
  3537. {
  3538. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3539. if (!plat_priv)
  3540. return -ENODEV;
  3541. if (time_sync_period < CNSS_MIN_TIME_SYNC_PERIOD) {
  3542. cnss_pr_err("Invalid time sync value\n");
  3543. return -EINVAL;
  3544. }
  3545. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  3546. time_sync_period;
  3547. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3548. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3549. cnss_pr_err("Invalid min time sync value\n");
  3550. return -EINVAL;
  3551. }
  3552. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3553. return 0;
  3554. }
  3555. EXPORT_SYMBOL(cnss_update_time_sync_period);
  3556. /**
  3557. * cnss_reset_time_sync_period() - Reset time sync period
  3558. * @dev: device structure
  3559. *
  3560. * Update time sync period vote of driver as invalid
  3561. * and reset minimum of time sync period from
  3562. * stored vote through wlan and sys config
  3563. * Result: return 0 for success, error in case of no dev
  3564. */
  3565. int cnss_reset_time_sync_period(struct device *dev)
  3566. {
  3567. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3568. unsigned int time_sync_period = 0;
  3569. if (!plat_priv)
  3570. return -ENODEV;
  3571. /* Driver vote is set to invalid in case of reset
  3572. * In this case, only vote valid to check is sys config
  3573. */
  3574. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  3575. CNSS_TIME_SYNC_PERIOD_INVALID;
  3576. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3577. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3578. cnss_pr_err("Invalid min time sync value\n");
  3579. return -EINVAL;
  3580. }
  3581. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3582. return 0;
  3583. }
  3584. EXPORT_SYMBOL(cnss_reset_time_sync_period);
  3585. static ssize_t recovery_store(struct device *dev,
  3586. struct device_attribute *attr,
  3587. const char *buf, size_t count)
  3588. {
  3589. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3590. unsigned int recovery = 0;
  3591. if (!plat_priv)
  3592. return -ENODEV;
  3593. if (sscanf(buf, "%du", &recovery) != 1) {
  3594. cnss_pr_err("Invalid recovery sysfs command\n");
  3595. return -EINVAL;
  3596. }
  3597. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  3598. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  3599. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  3600. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  3601. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  3602. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  3603. cnss_send_subsys_restart_level_msg(plat_priv);
  3604. return count;
  3605. }
  3606. static ssize_t shutdown_store(struct device *dev,
  3607. struct device_attribute *attr,
  3608. const char *buf, size_t count)
  3609. {
  3610. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3611. cnss_pr_dbg("Received shutdown notification\n");
  3612. if (plat_priv) {
  3613. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3614. cnss_bus_update_status(plat_priv, CNSS_SYS_REBOOT);
  3615. del_timer(&plat_priv->fw_boot_timer);
  3616. complete_all(&plat_priv->power_up_complete);
  3617. complete_all(&plat_priv->cal_complete);
  3618. cnss_pr_dbg("Shutdown notification handled\n");
  3619. }
  3620. return count;
  3621. }
  3622. static ssize_t fs_ready_store(struct device *dev,
  3623. struct device_attribute *attr,
  3624. const char *buf, size_t count)
  3625. {
  3626. int fs_ready = 0;
  3627. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3628. if (sscanf(buf, "%du", &fs_ready) != 1)
  3629. return -EINVAL;
  3630. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  3631. fs_ready, count);
  3632. if (!plat_priv) {
  3633. cnss_pr_err("plat_priv is NULL\n");
  3634. return count;
  3635. }
  3636. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  3637. cnss_pr_dbg("QMI is bypassed\n");
  3638. return count;
  3639. }
  3640. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  3641. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  3642. cnss_driver_event_post(plat_priv,
  3643. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3644. 0, NULL);
  3645. }
  3646. return count;
  3647. }
  3648. static ssize_t qdss_trace_start_store(struct device *dev,
  3649. struct device_attribute *attr,
  3650. const char *buf, size_t count)
  3651. {
  3652. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3653. wlfw_qdss_trace_start(plat_priv);
  3654. cnss_pr_dbg("Received QDSS start command\n");
  3655. return count;
  3656. }
  3657. static ssize_t qdss_trace_stop_store(struct device *dev,
  3658. struct device_attribute *attr,
  3659. const char *buf, size_t count)
  3660. {
  3661. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3662. u32 option = 0;
  3663. if (sscanf(buf, "%du", &option) != 1)
  3664. return -EINVAL;
  3665. wlfw_qdss_trace_stop(plat_priv, option);
  3666. cnss_pr_dbg("Received QDSS stop command\n");
  3667. return count;
  3668. }
  3669. static ssize_t qdss_conf_download_store(struct device *dev,
  3670. struct device_attribute *attr,
  3671. const char *buf, size_t count)
  3672. {
  3673. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3674. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  3675. cnss_pr_dbg("Received QDSS download config command\n");
  3676. return count;
  3677. }
  3678. static ssize_t tme_opt_file_download_store(struct device *dev,
  3679. struct device_attribute *attr,
  3680. const char *buf, size_t count)
  3681. {
  3682. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3683. char cmd[5];
  3684. if (sscanf(buf, "%s", cmd) != 1)
  3685. return -EINVAL;
  3686. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  3687. cnss_pr_err("Firmware is not ready yet\n");
  3688. return 0;
  3689. }
  3690. if (plat_priv->device_id == PEACH_DEVICE_ID &&
  3691. cnss_bus_runtime_pm_get_sync(plat_priv) < 0)
  3692. goto runtime_pm_put;
  3693. if (strcmp(cmd, "sec") == 0) {
  3694. cnss_bus_load_tme_opt_file(plat_priv, WLFW_TME_LITE_OEM_FUSE_FILE_V01);
  3695. cnss_wlfw_tme_opt_file_dnld_send_sync(plat_priv, WLFW_TME_LITE_OEM_FUSE_FILE_V01);
  3696. } else if (strcmp(cmd, "rpr") == 0) {
  3697. cnss_bus_load_tme_opt_file(plat_priv, WLFW_TME_LITE_RPR_FILE_V01);
  3698. cnss_wlfw_tme_opt_file_dnld_send_sync(plat_priv, WLFW_TME_LITE_RPR_FILE_V01);
  3699. } else if (strcmp(cmd, "dpr") == 0) {
  3700. cnss_bus_load_tme_opt_file(plat_priv, WLFW_TME_LITE_DPR_FILE_V01);
  3701. cnss_wlfw_tme_opt_file_dnld_send_sync(plat_priv, WLFW_TME_LITE_DPR_FILE_V01);
  3702. }
  3703. cnss_pr_dbg("Received tme_opt_file_download indication cmd: %s\n", cmd);
  3704. runtime_pm_put:
  3705. if (plat_priv->device_id == PEACH_DEVICE_ID)
  3706. cnss_bus_runtime_pm_put(plat_priv);
  3707. return count;
  3708. }
  3709. static ssize_t hw_trace_override_store(struct device *dev,
  3710. struct device_attribute *attr,
  3711. const char *buf, size_t count)
  3712. {
  3713. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3714. int tmp = 0;
  3715. if (sscanf(buf, "%du", &tmp) != 1)
  3716. return -EINVAL;
  3717. plat_priv->hw_trc_override = tmp;
  3718. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3719. return count;
  3720. }
  3721. static ssize_t charger_mode_store(struct device *dev,
  3722. struct device_attribute *attr,
  3723. const char *buf, size_t count)
  3724. {
  3725. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3726. int tmp = 0;
  3727. if (sscanf(buf, "%du", &tmp) != 1)
  3728. return -EINVAL;
  3729. plat_priv->charger_mode = tmp;
  3730. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  3731. return count;
  3732. }
  3733. static DEVICE_ATTR_WO(fs_ready);
  3734. static DEVICE_ATTR_WO(shutdown);
  3735. static DEVICE_ATTR_RW(recovery);
  3736. static DEVICE_ATTR_WO(enable_hds);
  3737. static DEVICE_ATTR_WO(qdss_trace_start);
  3738. static DEVICE_ATTR_WO(qdss_trace_stop);
  3739. static DEVICE_ATTR_WO(qdss_conf_download);
  3740. static DEVICE_ATTR_RW(tme_opt_file_download);
  3741. static DEVICE_ATTR_WO(hw_trace_override);
  3742. static DEVICE_ATTR_WO(charger_mode);
  3743. static DEVICE_ATTR_RW(time_sync_period);
  3744. static struct attribute *cnss_attrs[] = {
  3745. &dev_attr_fs_ready.attr,
  3746. &dev_attr_shutdown.attr,
  3747. &dev_attr_recovery.attr,
  3748. &dev_attr_enable_hds.attr,
  3749. &dev_attr_qdss_trace_start.attr,
  3750. &dev_attr_qdss_trace_stop.attr,
  3751. &dev_attr_qdss_conf_download.attr,
  3752. &dev_attr_tme_opt_file_download.attr,
  3753. &dev_attr_hw_trace_override.attr,
  3754. &dev_attr_charger_mode.attr,
  3755. &dev_attr_time_sync_period.attr,
  3756. NULL,
  3757. };
  3758. static struct attribute_group cnss_attr_group = {
  3759. .attrs = cnss_attrs,
  3760. };
  3761. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  3762. {
  3763. struct device *dev = &plat_priv->plat_dev->dev;
  3764. int ret;
  3765. char cnss_name[CNSS_FS_NAME_SIZE];
  3766. char shutdown_name[32];
  3767. if (cnss_is_dual_wlan_enabled()) {
  3768. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3769. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3770. snprintf(shutdown_name, sizeof(shutdown_name),
  3771. "shutdown_wlan_%d", plat_priv->plat_idx);
  3772. } else {
  3773. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3774. snprintf(shutdown_name, sizeof(shutdown_name),
  3775. "shutdown_wlan");
  3776. }
  3777. ret = sysfs_create_link(kernel_kobj, &dev->kobj, cnss_name);
  3778. if (ret) {
  3779. cnss_pr_err("Failed to create cnss link, err = %d\n",
  3780. ret);
  3781. goto out;
  3782. }
  3783. /* This is only for backward compatibility. */
  3784. ret = sysfs_create_link(kernel_kobj, &dev->kobj, shutdown_name);
  3785. if (ret) {
  3786. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  3787. ret);
  3788. goto rm_cnss_link;
  3789. }
  3790. return 0;
  3791. rm_cnss_link:
  3792. sysfs_remove_link(kernel_kobj, cnss_name);
  3793. out:
  3794. return ret;
  3795. }
  3796. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  3797. {
  3798. char cnss_name[CNSS_FS_NAME_SIZE];
  3799. char shutdown_name[32];
  3800. if (cnss_is_dual_wlan_enabled()) {
  3801. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3802. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3803. snprintf(shutdown_name, sizeof(shutdown_name),
  3804. "shutdown_wlan_%d", plat_priv->plat_idx);
  3805. } else {
  3806. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3807. snprintf(shutdown_name, sizeof(shutdown_name),
  3808. "shutdown_wlan");
  3809. }
  3810. sysfs_remove_link(kernel_kobj, shutdown_name);
  3811. sysfs_remove_link(kernel_kobj, cnss_name);
  3812. }
  3813. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  3814. {
  3815. int ret = 0;
  3816. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  3817. &cnss_attr_group);
  3818. if (ret) {
  3819. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  3820. ret);
  3821. goto out;
  3822. }
  3823. cnss_create_sysfs_link(plat_priv);
  3824. return 0;
  3825. out:
  3826. return ret;
  3827. }
  3828. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 2, 0))
  3829. union cnss_device_group_devres {
  3830. const struct attribute_group *group;
  3831. };
  3832. static void devm_cnss_group_remove(struct device *dev, void *res)
  3833. {
  3834. union cnss_device_group_devres *devres = res;
  3835. const struct attribute_group *group = devres->group;
  3836. cnss_pr_dbg("%s: removing group %p\n", __func__, group);
  3837. sysfs_remove_group(&dev->kobj, group);
  3838. }
  3839. static int devm_cnss_group_match(struct device *dev, void *res, void *data)
  3840. {
  3841. return ((union cnss_device_group_devres *)res) == data;
  3842. }
  3843. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3844. {
  3845. cnss_remove_sysfs_link(plat_priv);
  3846. WARN_ON(devres_release(&plat_priv->plat_dev->dev,
  3847. devm_cnss_group_remove, devm_cnss_group_match,
  3848. (void *)&cnss_attr_group));
  3849. }
  3850. #else
  3851. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3852. {
  3853. cnss_remove_sysfs_link(plat_priv);
  3854. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3855. }
  3856. #endif
  3857. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3858. {
  3859. spin_lock_init(&plat_priv->event_lock);
  3860. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3861. WQ_UNBOUND, 1);
  3862. if (!plat_priv->event_wq) {
  3863. cnss_pr_err("Failed to create event workqueue!\n");
  3864. return -EFAULT;
  3865. }
  3866. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3867. INIT_LIST_HEAD(&plat_priv->event_list);
  3868. return 0;
  3869. }
  3870. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3871. {
  3872. destroy_workqueue(plat_priv->event_wq);
  3873. }
  3874. static int cnss_reboot_notifier(struct notifier_block *nb,
  3875. unsigned long action,
  3876. void *data)
  3877. {
  3878. struct cnss_plat_data *plat_priv =
  3879. container_of(nb, struct cnss_plat_data, reboot_nb);
  3880. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3881. cnss_bus_update_status(plat_priv, CNSS_SYS_REBOOT);
  3882. del_timer(&plat_priv->fw_boot_timer);
  3883. complete_all(&plat_priv->power_up_complete);
  3884. complete_all(&plat_priv->cal_complete);
  3885. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3886. return NOTIFY_DONE;
  3887. }
  3888. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3889. #ifdef CONFIG_CNSS_HW_SECURE_SMEM
  3890. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3891. {
  3892. uint32_t *peripheralStateInfo = NULL;
  3893. size_t size = 0;
  3894. /* Once this flag is set, secure peripheral feature
  3895. * will not be supported till next reboot
  3896. */
  3897. if (plat_priv->sec_peri_feature_disable)
  3898. return 0;
  3899. peripheralStateInfo = qcom_smem_get(QCOM_SMEM_HOST_ANY, PERISEC_SMEM_ID, &size);
  3900. if (IS_ERR_OR_NULL(peripheralStateInfo)) {
  3901. if (PTR_ERR(peripheralStateInfo) != -ENOENT)
  3902. CNSS_ASSERT(0);
  3903. cnss_pr_dbg("Secure HW feature not enabled. ret = %d\n",
  3904. PTR_ERR(peripheralStateInfo));
  3905. plat_priv->sec_peri_feature_disable = true;
  3906. return 0;
  3907. }
  3908. cnss_pr_dbg("Secure HW state: %d\n", *peripheralStateInfo);
  3909. if ((*peripheralStateInfo >> (HW_WIFI_UID - 0x500)) & 0x1)
  3910. set_bit(CNSS_WLAN_HW_DISABLED,
  3911. &plat_priv->driver_state);
  3912. else
  3913. clear_bit(CNSS_WLAN_HW_DISABLED,
  3914. &plat_priv->driver_state);
  3915. return 0;
  3916. }
  3917. #else
  3918. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3919. {
  3920. struct Object client_env;
  3921. struct Object app_object;
  3922. u32 wifi_uid = HW_WIFI_UID;
  3923. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3924. int ret;
  3925. u8 state = 0;
  3926. /* Once this flag is set, secure peripheral feature
  3927. * will not be supported till next reboot
  3928. */
  3929. if (plat_priv->sec_peri_feature_disable)
  3930. return 0;
  3931. /* get rootObj */
  3932. ret = get_client_env_object(&client_env);
  3933. if (ret) {
  3934. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  3935. goto end;
  3936. }
  3937. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  3938. if (ret) {
  3939. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  3940. if (ret == FEATURE_NOT_SUPPORTED) {
  3941. ret = 0; /* Do not Assert */
  3942. plat_priv->sec_peri_feature_disable = true;
  3943. cnss_pr_dbg("Secure HW feature not supported\n");
  3944. }
  3945. goto exit_release_clientenv;
  3946. }
  3947. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  3948. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  3949. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  3950. ObjectCounts_pack(1, 1, 0, 0));
  3951. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  3952. if (ret) {
  3953. if (ret == PERIPHERAL_NOT_FOUND) {
  3954. ret = 0; /* Do not Assert */
  3955. plat_priv->sec_peri_feature_disable = true;
  3956. cnss_pr_dbg("Secure HW mode is not updated. Peripheral not found\n");
  3957. }
  3958. goto exit_release_app_obj;
  3959. }
  3960. if (state == 1)
  3961. set_bit(CNSS_WLAN_HW_DISABLED,
  3962. &plat_priv->driver_state);
  3963. else
  3964. clear_bit(CNSS_WLAN_HW_DISABLED,
  3965. &plat_priv->driver_state);
  3966. exit_release_app_obj:
  3967. Object_release(app_object);
  3968. exit_release_clientenv:
  3969. Object_release(client_env);
  3970. end:
  3971. if (ret) {
  3972. cnss_pr_err("Unable to get HW disable status\n");
  3973. CNSS_ASSERT(0);
  3974. }
  3975. return ret;
  3976. }
  3977. #endif
  3978. #else
  3979. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3980. {
  3981. return 0;
  3982. }
  3983. #endif
  3984. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  3985. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  3986. {
  3987. }
  3988. #else
  3989. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  3990. {
  3991. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3992. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3993. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3994. }
  3995. #endif
  3996. #if IS_ENABLED(CONFIG_WCNSS_MEM_PRE_ALLOC)
  3997. static void cnss_initialize_mem_pool(unsigned long device_id)
  3998. {
  3999. cnss_initialize_prealloc_pool(device_id);
  4000. }
  4001. static void cnss_deinitialize_mem_pool(void)
  4002. {
  4003. cnss_deinitialize_prealloc_pool();
  4004. }
  4005. #else
  4006. static void cnss_initialize_mem_pool(unsigned long device_id)
  4007. {
  4008. }
  4009. static void cnss_deinitialize_mem_pool(void)
  4010. {
  4011. }
  4012. #endif
  4013. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  4014. {
  4015. int ret;
  4016. ret = cnss_init_sol_gpio(plat_priv);
  4017. if (ret)
  4018. return ret;
  4019. timer_setup(&plat_priv->fw_boot_timer,
  4020. cnss_bus_fw_boot_timeout_hdlr, 0);
  4021. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  4022. if (ret)
  4023. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  4024. ret);
  4025. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  4026. init_completion(&plat_priv->power_up_complete);
  4027. init_completion(&plat_priv->cal_complete);
  4028. init_completion(&plat_priv->rddm_complete);
  4029. init_completion(&plat_priv->recovery_complete);
  4030. init_completion(&plat_priv->daemon_connected);
  4031. mutex_init(&plat_priv->dev_lock);
  4032. mutex_init(&plat_priv->driver_ops_lock);
  4033. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  4034. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  4035. if (ret)
  4036. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  4037. ret);
  4038. plat_priv->recovery_ws =
  4039. wakeup_source_register(&plat_priv->plat_dev->dev,
  4040. "CNSS_FW_RECOVERY");
  4041. if (!plat_priv->recovery_ws)
  4042. cnss_pr_err("Failed to setup FW recovery wake source\n");
  4043. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  4044. cnss_daemon_connection_update_cb,
  4045. plat_priv);
  4046. if (ret)
  4047. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  4048. ret);
  4049. cnss_sram_dump_init(plat_priv);
  4050. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4051. "qcom,rc-ep-short-channel"))
  4052. cnss_set_feature_list(plat_priv, CNSS_RC_EP_ULTRASHORT_CHANNEL_V01);
  4053. if (plat_priv->device_id == PEACH_DEVICE_ID)
  4054. cnss_set_feature_list(plat_priv, CNSS_AUX_UC_SUPPORT_V01);
  4055. return 0;
  4056. }
  4057. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  4058. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  4059. {
  4060. }
  4061. #else
  4062. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  4063. {
  4064. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  4065. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  4066. kfree(plat_priv->sram_dump);
  4067. }
  4068. #endif
  4069. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  4070. {
  4071. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  4072. plat_priv);
  4073. complete_all(&plat_priv->recovery_complete);
  4074. complete_all(&plat_priv->rddm_complete);
  4075. complete_all(&plat_priv->cal_complete);
  4076. complete_all(&plat_priv->power_up_complete);
  4077. complete_all(&plat_priv->daemon_connected);
  4078. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  4079. unregister_reboot_notifier(&plat_priv->reboot_nb);
  4080. del_timer(&plat_priv->fw_boot_timer);
  4081. wakeup_source_unregister(plat_priv->recovery_ws);
  4082. cnss_deinit_sol_gpio(plat_priv);
  4083. cnss_sram_dump_deinit(plat_priv);
  4084. kfree(plat_priv->on_chip_pmic_board_ids);
  4085. }
  4086. static void cnss_init_time_sync_period_default(struct cnss_plat_data *plat_priv)
  4087. {
  4088. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  4089. CNSS_TIME_SYNC_PERIOD_INVALID;
  4090. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_CNSS] =
  4091. CNSS_TIME_SYNC_PERIOD_DEFAULT;
  4092. }
  4093. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  4094. {
  4095. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  4096. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  4097. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4098. "qcom,wlan-cbc-enabled");
  4099. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  4100. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  4101. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  4102. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  4103. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  4104. cnss_init_time_sync_period_default(plat_priv);
  4105. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  4106. * enabled by default
  4107. */
  4108. plat_priv->adsp_pc_enabled = true;
  4109. }
  4110. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  4111. {
  4112. struct device *dev = &plat_priv->plat_dev->dev;
  4113. plat_priv->use_pm_domain =
  4114. of_property_read_bool(dev->of_node, "use-pm-domain");
  4115. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  4116. }
  4117. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  4118. {
  4119. struct device *dev = &plat_priv->plat_dev->dev;
  4120. plat_priv->set_wlaon_pwr_ctrl =
  4121. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  4122. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  4123. plat_priv->set_wlaon_pwr_ctrl);
  4124. }
  4125. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  4126. {
  4127. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4128. "qcom,converged-dt") ||
  4129. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4130. "qcom,same-dt-multi-dev") ||
  4131. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4132. "qcom,multi-wlan-exchg"));
  4133. }
  4134. static const struct platform_device_id cnss_platform_id_table[] = {
  4135. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  4136. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  4137. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  4138. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  4139. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  4140. { .name = "mango", .driver_data = MANGO_DEVICE_ID, },
  4141. { .name = "peach", .driver_data = PEACH_DEVICE_ID, },
  4142. { .name = "qcaconv", .driver_data = 0, },
  4143. { },
  4144. };
  4145. static const struct of_device_id cnss_of_match_table[] = {
  4146. {
  4147. .compatible = "qcom,cnss",
  4148. .data = (void *)&cnss_platform_id_table[0]},
  4149. {
  4150. .compatible = "qcom,cnss-qca6290",
  4151. .data = (void *)&cnss_platform_id_table[1]},
  4152. {
  4153. .compatible = "qcom,cnss-qca6390",
  4154. .data = (void *)&cnss_platform_id_table[2]},
  4155. {
  4156. .compatible = "qcom,cnss-qca6490",
  4157. .data = (void *)&cnss_platform_id_table[3]},
  4158. {
  4159. .compatible = "qcom,cnss-kiwi",
  4160. .data = (void *)&cnss_platform_id_table[4]},
  4161. {
  4162. .compatible = "qcom,cnss-mango",
  4163. .data = (void *)&cnss_platform_id_table[5]},
  4164. {
  4165. .compatible = "qcom,cnss-peach",
  4166. .data = (void *)&cnss_platform_id_table[6]},
  4167. {
  4168. .compatible = "qcom,cnss-qca-converged",
  4169. .data = (void *)&cnss_platform_id_table[7]},
  4170. { },
  4171. };
  4172. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  4173. static inline bool
  4174. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  4175. {
  4176. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4177. "use-nv-mac");
  4178. }
  4179. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  4180. {
  4181. struct device_node *child;
  4182. u32 id, i;
  4183. int id_n, device_identifier_gpio, ret;
  4184. u8 gpio_value;
  4185. if (plat_priv->dt_type != CNSS_DTT_CONVERGED)
  4186. return 0;
  4187. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  4188. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  4189. if (ret) {
  4190. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  4191. return ret;
  4192. }
  4193. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  4194. gpio_value = gpio_get_value(device_identifier_gpio);
  4195. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  4196. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  4197. child) {
  4198. if (strcmp(child->name, "chip_cfg"))
  4199. continue;
  4200. id_n = of_property_count_u32_elems(child, "supported-ids");
  4201. if (id_n <= 0) {
  4202. cnss_pr_err("Device id is NOT set\n");
  4203. return -EINVAL;
  4204. }
  4205. for (i = 0; i < id_n; i++) {
  4206. ret = of_property_read_u32_index(child,
  4207. "supported-ids",
  4208. i, &id);
  4209. if (ret) {
  4210. cnss_pr_err("Failed to read supported ids\n");
  4211. return -EINVAL;
  4212. }
  4213. if (gpio_value && id == QCA6490_DEVICE_ID) {
  4214. plat_priv->plat_dev->dev.of_node = child;
  4215. plat_priv->device_id = QCA6490_DEVICE_ID;
  4216. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  4217. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  4218. child->name, i, id);
  4219. return 0;
  4220. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  4221. plat_priv->plat_dev->dev.of_node = child;
  4222. plat_priv->device_id = KIWI_DEVICE_ID;
  4223. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  4224. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  4225. child->name, i, id);
  4226. return 0;
  4227. }
  4228. }
  4229. }
  4230. return -EINVAL;
  4231. }
  4232. static inline u32
  4233. cnss_dt_type(struct cnss_plat_data *plat_priv)
  4234. {
  4235. bool is_converged_dt = of_property_read_bool(
  4236. plat_priv->plat_dev->dev.of_node, "qcom,converged-dt");
  4237. bool is_multi_wlan_xchg;
  4238. if (is_converged_dt)
  4239. return CNSS_DTT_CONVERGED;
  4240. is_multi_wlan_xchg = of_property_read_bool(
  4241. plat_priv->plat_dev->dev.of_node, "qcom,multi-wlan-exchg");
  4242. if (is_multi_wlan_xchg)
  4243. return CNSS_DTT_MULTIEXCHG;
  4244. return CNSS_DTT_LEGACY;
  4245. }
  4246. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  4247. {
  4248. int ret = 0;
  4249. int retry = 0;
  4250. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  4251. return 0;
  4252. retry:
  4253. ret = cnss_power_on_device(plat_priv, true);
  4254. if (ret)
  4255. goto end;
  4256. ret = cnss_bus_init(plat_priv);
  4257. if (ret) {
  4258. if ((ret != -EPROBE_DEFER) &&
  4259. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  4260. cnss_power_off_device(plat_priv);
  4261. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  4262. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  4263. goto retry;
  4264. }
  4265. goto power_off;
  4266. }
  4267. return 0;
  4268. power_off:
  4269. cnss_power_off_device(plat_priv);
  4270. end:
  4271. return ret;
  4272. }
  4273. int cnss_wlan_hw_enable(void)
  4274. {
  4275. struct cnss_plat_data *plat_priv;
  4276. int ret = 0;
  4277. if (cnss_is_dual_wlan_enabled())
  4278. plat_priv = cnss_get_first_plat_priv(NULL);
  4279. else
  4280. plat_priv = cnss_get_plat_priv(NULL);
  4281. if (!plat_priv)
  4282. return -ENODEV;
  4283. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  4284. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  4285. goto register_driver;
  4286. ret = cnss_wlan_device_init(plat_priv);
  4287. if (ret) {
  4288. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state))
  4289. CNSS_ASSERT(0);
  4290. return ret;
  4291. }
  4292. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  4293. cnss_driver_event_post(plat_priv,
  4294. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  4295. 0, NULL);
  4296. register_driver:
  4297. if (plat_priv->driver_ops)
  4298. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  4299. return ret;
  4300. }
  4301. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  4302. int cnss_set_wfc_mode(struct device *dev, struct cnss_wfc_cfg cfg)
  4303. {
  4304. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  4305. int ret = 0;
  4306. if (!plat_priv)
  4307. return -ENODEV;
  4308. /* If IMS server is connected, return success without QMI send */
  4309. if (test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  4310. cnss_pr_dbg("Ignore host request as IMS server is connected");
  4311. return ret;
  4312. }
  4313. ret = cnss_wlfw_send_host_wfc_call_status(plat_priv, cfg);
  4314. return ret;
  4315. }
  4316. EXPORT_SYMBOL(cnss_set_wfc_mode);
  4317. static int cnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  4318. unsigned long *thermal_state)
  4319. {
  4320. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4321. if (!tcdev || !tcdev->devdata) {
  4322. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4323. return -EINVAL;
  4324. }
  4325. cnss_tcdev = tcdev->devdata;
  4326. *thermal_state = cnss_tcdev->max_thermal_state;
  4327. return 0;
  4328. }
  4329. static int cnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  4330. unsigned long *thermal_state)
  4331. {
  4332. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4333. if (!tcdev || !tcdev->devdata) {
  4334. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4335. return -EINVAL;
  4336. }
  4337. cnss_tcdev = tcdev->devdata;
  4338. *thermal_state = cnss_tcdev->curr_thermal_state;
  4339. return 0;
  4340. }
  4341. static int cnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  4342. unsigned long thermal_state)
  4343. {
  4344. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4345. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  4346. int ret = 0;
  4347. if (!tcdev || !tcdev->devdata) {
  4348. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4349. return -EINVAL;
  4350. }
  4351. cnss_tcdev = tcdev->devdata;
  4352. if (thermal_state > cnss_tcdev->max_thermal_state)
  4353. return -EINVAL;
  4354. cnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  4355. thermal_state, cnss_tcdev->tcdev_id);
  4356. mutex_lock(&plat_priv->tcdev_lock);
  4357. ret = cnss_bus_set_therm_cdev_state(plat_priv,
  4358. thermal_state,
  4359. cnss_tcdev->tcdev_id);
  4360. if (!ret)
  4361. cnss_tcdev->curr_thermal_state = thermal_state;
  4362. mutex_unlock(&plat_priv->tcdev_lock);
  4363. if (ret) {
  4364. cnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  4365. ret, cnss_tcdev->tcdev_id);
  4366. return ret;
  4367. }
  4368. return 0;
  4369. }
  4370. static struct thermal_cooling_device_ops cnss_cooling_ops = {
  4371. .get_max_state = cnss_tcdev_get_max_state,
  4372. .get_cur_state = cnss_tcdev_get_cur_state,
  4373. .set_cur_state = cnss_tcdev_set_cur_state,
  4374. };
  4375. int cnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  4376. int tcdev_id)
  4377. {
  4378. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4379. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4380. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  4381. struct device_node *dev_node;
  4382. int ret = 0;
  4383. if (!priv) {
  4384. cnss_pr_err("Platform driver is not initialized!\n");
  4385. return -ENODEV;
  4386. }
  4387. cnss_tcdev = kzalloc(sizeof(*cnss_tcdev), GFP_KERNEL);
  4388. if (!cnss_tcdev) {
  4389. cnss_pr_err("Failed to allocate cnss_tcdev object!\n");
  4390. return -ENOMEM;
  4391. }
  4392. cnss_tcdev->tcdev_id = tcdev_id;
  4393. cnss_tcdev->max_thermal_state = max_state;
  4394. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  4395. "qcom,cnss_cdev%d", tcdev_id);
  4396. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  4397. if (!dev_node) {
  4398. cnss_pr_err("Failed to get cooling device node\n");
  4399. kfree(cnss_tcdev);
  4400. return -EINVAL;
  4401. }
  4402. cnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  4403. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  4404. cnss_tcdev->tcdev = thermal_of_cooling_device_register(dev_node,
  4405. cdev_node_name,
  4406. cnss_tcdev,
  4407. &cnss_cooling_ops);
  4408. if (IS_ERR_OR_NULL(cnss_tcdev->tcdev)) {
  4409. ret = PTR_ERR(cnss_tcdev->tcdev);
  4410. cnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  4411. ret, cnss_tcdev->tcdev_id);
  4412. kfree(cnss_tcdev);
  4413. } else {
  4414. cnss_pr_dbg("Cooling device registered for cdev id %d",
  4415. cnss_tcdev->tcdev_id);
  4416. mutex_lock(&priv->tcdev_lock);
  4417. list_add(&cnss_tcdev->tcdev_list,
  4418. &priv->cnss_tcdev_list);
  4419. mutex_unlock(&priv->tcdev_lock);
  4420. }
  4421. } else {
  4422. cnss_pr_dbg("Cooling device registration not supported");
  4423. kfree(cnss_tcdev);
  4424. ret = -EOPNOTSUPP;
  4425. }
  4426. return ret;
  4427. }
  4428. EXPORT_SYMBOL(cnss_thermal_cdev_register);
  4429. void cnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  4430. {
  4431. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4432. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4433. if (!priv) {
  4434. cnss_pr_err("Platform driver is not initialized!\n");
  4435. return;
  4436. }
  4437. mutex_lock(&priv->tcdev_lock);
  4438. while (!list_empty(&priv->cnss_tcdev_list)) {
  4439. cnss_tcdev = list_first_entry(&priv->cnss_tcdev_list,
  4440. struct cnss_thermal_cdev,
  4441. tcdev_list);
  4442. thermal_cooling_device_unregister(cnss_tcdev->tcdev);
  4443. list_del(&cnss_tcdev->tcdev_list);
  4444. kfree(cnss_tcdev);
  4445. }
  4446. mutex_unlock(&priv->tcdev_lock);
  4447. }
  4448. EXPORT_SYMBOL(cnss_thermal_cdev_unregister);
  4449. int cnss_get_curr_therm_cdev_state(struct device *dev,
  4450. unsigned long *thermal_state,
  4451. int tcdev_id)
  4452. {
  4453. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4454. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4455. if (!priv) {
  4456. cnss_pr_err("Platform driver is not initialized!\n");
  4457. return -ENODEV;
  4458. }
  4459. mutex_lock(&priv->tcdev_lock);
  4460. list_for_each_entry(cnss_tcdev, &priv->cnss_tcdev_list, tcdev_list) {
  4461. if (cnss_tcdev->tcdev_id != tcdev_id)
  4462. continue;
  4463. *thermal_state = cnss_tcdev->curr_thermal_state;
  4464. mutex_unlock(&priv->tcdev_lock);
  4465. cnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  4466. cnss_tcdev->curr_thermal_state, tcdev_id);
  4467. return 0;
  4468. }
  4469. mutex_unlock(&priv->tcdev_lock);
  4470. cnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  4471. return -EINVAL;
  4472. }
  4473. EXPORT_SYMBOL(cnss_get_curr_therm_cdev_state);
  4474. static int cnss_probe(struct platform_device *plat_dev)
  4475. {
  4476. int ret = 0;
  4477. struct cnss_plat_data *plat_priv;
  4478. const struct of_device_id *of_id;
  4479. const struct platform_device_id *device_id;
  4480. if (cnss_get_plat_priv(plat_dev)) {
  4481. cnss_pr_err("Driver is already initialized!\n");
  4482. ret = -EEXIST;
  4483. goto out;
  4484. }
  4485. ret = cnss_plat_env_available();
  4486. if (ret)
  4487. goto out;
  4488. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  4489. if (!of_id || !of_id->data) {
  4490. cnss_pr_err("Failed to find of match device!\n");
  4491. ret = -ENODEV;
  4492. goto out;
  4493. }
  4494. device_id = of_id->data;
  4495. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  4496. GFP_KERNEL);
  4497. if (!plat_priv) {
  4498. ret = -ENOMEM;
  4499. goto out;
  4500. }
  4501. plat_priv->plat_dev = plat_dev;
  4502. plat_priv->dev_node = NULL;
  4503. plat_priv->device_id = device_id->driver_data;
  4504. plat_priv->dt_type = cnss_dt_type(plat_priv);
  4505. cnss_pr_dbg("Probing platform driver from dt type: %d\n",
  4506. plat_priv->dt_type);
  4507. plat_priv->use_fw_path_with_prefix =
  4508. cnss_use_fw_path_with_prefix(plat_priv);
  4509. ret = cnss_get_dev_cfg_node(plat_priv);
  4510. if (ret) {
  4511. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  4512. goto reset_plat_dev;
  4513. }
  4514. cnss_initialize_mem_pool(plat_priv->device_id);
  4515. ret = cnss_get_pld_bus_ops_name(plat_priv);
  4516. if (ret)
  4517. cnss_pr_vdbg("Failed to find bus ops name, err = %d\n",
  4518. ret);
  4519. ret = cnss_get_rc_num(plat_priv);
  4520. if (ret)
  4521. cnss_pr_err("Failed to find PCIe RC number, err = %d\n", ret);
  4522. cnss_pr_dbg("rc_num=%d\n", plat_priv->rc_num);
  4523. plat_priv->bus_type = cnss_get_bus_type(plat_priv);
  4524. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  4525. plat_priv->driver_mode = CNSS_DRIVER_MODE_MAX;
  4526. cnss_set_plat_priv(plat_dev, plat_priv);
  4527. cnss_set_device_name(plat_priv);
  4528. platform_set_drvdata(plat_dev, plat_priv);
  4529. INIT_LIST_HEAD(&plat_priv->vreg_list);
  4530. INIT_LIST_HEAD(&plat_priv->clk_list);
  4531. cnss_get_pm_domain_info(plat_priv);
  4532. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  4533. cnss_power_misc_params_init(plat_priv);
  4534. cnss_get_tcs_info(plat_priv);
  4535. cnss_get_cpr_info(plat_priv);
  4536. cnss_aop_interface_init(plat_priv);
  4537. cnss_init_control_params(plat_priv);
  4538. ret = cnss_get_resources(plat_priv);
  4539. if (ret)
  4540. goto reset_ctx;
  4541. ret = cnss_register_esoc(plat_priv);
  4542. if (ret)
  4543. goto free_res;
  4544. ret = cnss_register_bus_scale(plat_priv);
  4545. if (ret)
  4546. goto unreg_esoc;
  4547. ret = cnss_create_sysfs(plat_priv);
  4548. if (ret)
  4549. goto unreg_bus_scale;
  4550. ret = cnss_event_work_init(plat_priv);
  4551. if (ret)
  4552. goto remove_sysfs;
  4553. ret = cnss_dms_init(plat_priv);
  4554. if (ret)
  4555. goto deinit_event_work;
  4556. ret = cnss_debugfs_create(plat_priv);
  4557. if (ret)
  4558. goto deinit_dms;
  4559. ret = cnss_misc_init(plat_priv);
  4560. if (ret)
  4561. goto destroy_debugfs;
  4562. ret = cnss_wlan_hw_disable_check(plat_priv);
  4563. if (ret)
  4564. goto deinit_misc;
  4565. /* Make sure all platform related init are done before
  4566. * device power on and bus init.
  4567. */
  4568. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  4569. ret = cnss_wlan_device_init(plat_priv);
  4570. if (ret)
  4571. goto deinit_misc;
  4572. } else {
  4573. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  4574. }
  4575. cnss_register_coex_service(plat_priv);
  4576. cnss_register_ims_service(plat_priv);
  4577. mutex_init(&plat_priv->tcdev_lock);
  4578. INIT_LIST_HEAD(&plat_priv->cnss_tcdev_list);
  4579. cnss_pr_info("Platform driver probed successfully.\n");
  4580. return 0;
  4581. deinit_misc:
  4582. cnss_misc_deinit(plat_priv);
  4583. destroy_debugfs:
  4584. cnss_debugfs_destroy(plat_priv);
  4585. deinit_dms:
  4586. cnss_dms_deinit(plat_priv);
  4587. deinit_event_work:
  4588. cnss_event_work_deinit(plat_priv);
  4589. remove_sysfs:
  4590. cnss_remove_sysfs(plat_priv);
  4591. unreg_bus_scale:
  4592. cnss_unregister_bus_scale(plat_priv);
  4593. unreg_esoc:
  4594. cnss_unregister_esoc(plat_priv);
  4595. free_res:
  4596. cnss_put_resources(plat_priv);
  4597. reset_ctx:
  4598. cnss_aop_interface_deinit(plat_priv);
  4599. platform_set_drvdata(plat_dev, NULL);
  4600. cnss_deinitialize_mem_pool();
  4601. reset_plat_dev:
  4602. cnss_clear_plat_priv(plat_priv);
  4603. out:
  4604. return ret;
  4605. }
  4606. static int cnss_remove(struct platform_device *plat_dev)
  4607. {
  4608. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  4609. plat_priv->audio_iommu_domain = NULL;
  4610. cnss_genl_exit();
  4611. cnss_unregister_ims_service(plat_priv);
  4612. cnss_unregister_coex_service(plat_priv);
  4613. cnss_bus_deinit(plat_priv);
  4614. cnss_misc_deinit(plat_priv);
  4615. cnss_debugfs_destroy(plat_priv);
  4616. cnss_dms_deinit(plat_priv);
  4617. cnss_qmi_deinit(plat_priv);
  4618. cnss_event_work_deinit(plat_priv);
  4619. cnss_cancel_dms_work();
  4620. cnss_remove_sysfs(plat_priv);
  4621. cnss_unregister_bus_scale(plat_priv);
  4622. cnss_unregister_esoc(plat_priv);
  4623. cnss_put_resources(plat_priv);
  4624. cnss_aop_interface_deinit(plat_priv);
  4625. cnss_deinitialize_mem_pool();
  4626. platform_set_drvdata(plat_dev, NULL);
  4627. cnss_clear_plat_priv(plat_priv);
  4628. return 0;
  4629. }
  4630. static struct platform_driver cnss_platform_driver = {
  4631. .probe = cnss_probe,
  4632. .remove = cnss_remove,
  4633. .driver = {
  4634. .name = "cnss2",
  4635. .of_match_table = cnss_of_match_table,
  4636. #ifdef CONFIG_CNSS_ASYNC
  4637. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4638. #endif
  4639. },
  4640. };
  4641. static bool cnss_check_compatible_node(void)
  4642. {
  4643. struct device_node *dn = NULL;
  4644. for_each_matching_node(dn, cnss_of_match_table) {
  4645. if (of_device_is_available(dn)) {
  4646. cnss_allow_driver_loading = true;
  4647. return true;
  4648. }
  4649. }
  4650. return false;
  4651. }
  4652. /**
  4653. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  4654. *
  4655. * Valid device tree node means a node with "compatible" property from the
  4656. * device match table and "status" property is not disabled.
  4657. *
  4658. * Return: true if valid device tree node found, false if not found
  4659. */
  4660. static bool cnss_is_valid_dt_node_found(void)
  4661. {
  4662. struct device_node *dn = NULL;
  4663. for_each_matching_node(dn, cnss_of_match_table) {
  4664. if (of_device_is_available(dn))
  4665. break;
  4666. }
  4667. if (dn)
  4668. return true;
  4669. return false;
  4670. }
  4671. static int __init cnss_initialize(void)
  4672. {
  4673. int ret = 0;
  4674. if (!cnss_is_valid_dt_node_found())
  4675. return -ENODEV;
  4676. if (!cnss_check_compatible_node())
  4677. return ret;
  4678. cnss_debug_init();
  4679. ret = platform_driver_register(&cnss_platform_driver);
  4680. if (ret)
  4681. cnss_debug_deinit();
  4682. ret = cnss_genl_init();
  4683. if (ret < 0)
  4684. cnss_pr_err("CNSS genl init failed %d\n", ret);
  4685. return ret;
  4686. }
  4687. static void __exit cnss_exit(void)
  4688. {
  4689. cnss_genl_exit();
  4690. platform_driver_unregister(&cnss_platform_driver);
  4691. cnss_debug_deinit();
  4692. }
  4693. module_init(cnss_initialize);
  4694. module_exit(cnss_exit);
  4695. MODULE_LICENSE("GPL v2");
  4696. MODULE_DESCRIPTION("CNSS2 Platform Driver");