wcd937x.c 56 KB

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  1. /*
  2. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/slab.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/device.h>
  17. #include <linux/delay.h>
  18. #include <linux/kernel.h>
  19. #include <linux/component.h>
  20. #include <sound/soc.h>
  21. #include <sound/tlv.h>
  22. #include <soc/soundwire.h>
  23. #include <linux/regmap.h>
  24. #include <sound/soc.h>
  25. #include <sound/soc-dapm.h>
  26. #include "internal.h"
  27. #include "../wcdcal-hwdep.h"
  28. #include "wcd937x-registers.h"
  29. #include "../msm-cdc-pinctrl.h"
  30. #include <dt-bindings/sound/audio-codec-port-types.h>
  31. #include "../msm-cdc-supply.h"
  32. #define WCD9370_VARIANT 0
  33. #define WCD9375_VARIANT 5
  34. #define NUM_SWRS_DT_PARAMS 5
  35. enum {
  36. CODEC_TX = 0,
  37. CODEC_RX,
  38. };
  39. static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
  40. static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
  41. static int wcd937x_handle_post_irq(void *data);
  42. static const struct regmap_irq wcd937x_irqs[WCD937X_NUM_IRQS] = {
  43. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_BUTTON_PRESS_DET, 0, 0x01),
  44. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_BUTTON_RELEASE_DET, 0, 0x02),
  45. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_ELECT_INS_REM_DET, 0, 0x04),
  46. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_ELECT_INS_REM_LEG_DET, 0, 0x08),
  47. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_SW_DET, 0, 0x10),
  48. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_OCP_INT, 0, 0x20),
  49. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_CNP_INT, 0, 0x40),
  50. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_OCP_INT, 0, 0x80),
  51. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_CNP_INT, 1, 0x01),
  52. REGMAP_IRQ_REG(WCD937X_IRQ_EAR_CNP_INT, 1, 0x02),
  53. REGMAP_IRQ_REG(WCD937X_IRQ_EAR_SCD_INT, 1, 0x04),
  54. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_CNP_INT, 1, 0x08),
  55. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_SCD_INT, 1, 0x10),
  56. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_PDM_WD_INT, 1, 0x20),
  57. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_PDM_WD_INT, 1, 0x40),
  58. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_PDM_WD_INT, 1, 0x80),
  59. REGMAP_IRQ_REG(WCD937X_IRQ_LDORT_SCD_INT, 2, 0x01),
  60. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_MOISTURE_INT, 2, 0x02),
  61. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_SURGE_DET_INT, 2, 0x04),
  62. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_SURGE_DET_INT, 2, 0x08),
  63. };
  64. static struct regmap_irq_chip wcd937x_regmap_irq_chip = {
  65. .name = "wcd937x",
  66. .irqs = wcd937x_irqs,
  67. .num_irqs = ARRAY_SIZE(wcd937x_irqs),
  68. .num_regs = 3,
  69. .status_base = WCD937X_DIGITAL_INTR_STATUS_0,
  70. .mask_base = WCD937X_DIGITAL_INTR_MASK_0,
  71. .type_base = WCD937X_DIGITAL_INTR_LEVEL_0,
  72. .runtime_pm = false,
  73. .handle_post_irq = wcd937x_handle_post_irq,
  74. .irq_drv_data = NULL,
  75. };
  76. static int wcd937x_handle_post_irq(void *data)
  77. {
  78. struct wcd937x_priv *wcd937x = data;
  79. int val = 0;
  80. struct wcd937x_pdata *pdata = NULL;
  81. pdata = dev_get_platdata(wcd937x->dev);
  82. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_0, &val);
  83. dev_dbg(wcd937x->dev, "%s Clear OCP interupts\n", __func__);
  84. regmap_write(wcd937x->regmap,
  85. WCD937X_DIGITAL_INTR_CLEAR_0, 0xFF);
  86. regmap_write(wcd937x->regmap,
  87. WCD937X_DIGITAL_INTR_CLEAR_0, 0x0);
  88. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_1, &val);
  89. dev_dbg(wcd937x->dev, "%s Clear SCD interupts\n", __func__);
  90. regmap_write(wcd937x->regmap,
  91. WCD937X_DIGITAL_INTR_CLEAR_1, 0xFF);
  92. regmap_write(wcd937x->regmap,
  93. WCD937X_DIGITAL_INTR_CLEAR_1, 0x0);
  94. regmap_write(wcd937x->regmap,
  95. WCD937X_DIGITAL_INTR_CLEAR_2, 0xFF);
  96. regmap_write(wcd937x->regmap,
  97. WCD937X_DIGITAL_INTR_CLEAR_2, 0x0);
  98. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_0, &val);
  99. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_1, &val);
  100. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_2, &val);
  101. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_CLEAR_0, &val);
  102. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_CLEAR_1, &val);
  103. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_CLEAR_2, &val);
  104. return IRQ_HANDLED;
  105. }
  106. static int wcd937x_init_reg(struct snd_soc_codec *codec)
  107. {
  108. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x0E, 0x0E);
  109. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x80, 0x80);
  110. usleep_range(1000, 1010);
  111. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x40, 0x40);
  112. usleep_range(1000, 1010);
  113. snd_soc_update_bits(codec, WCD937X_LDORXTX_CONFIG, 0x10, 0x00);
  114. snd_soc_update_bits(codec, WCD937X_BIAS_VBG_FINE_ADJ, 0xF0, 0x80);
  115. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x80, 0x80);
  116. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x40, 0x40);
  117. usleep_range(10000, 10010);
  118. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x40, 0x00);
  119. return 0;
  120. }
  121. static int wcd937x_set_port_params(struct snd_soc_codec *codec, u8 slv_prt_type,
  122. u8 *port_id, u8 *num_ch, u8 *ch_mask, u32 *ch_rate,
  123. u8 *port_type, u8 path)
  124. {
  125. int i, j;
  126. u8 num_ports;
  127. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT];
  128. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  129. switch (path) {
  130. case CODEC_RX:
  131. map = &wcd937x->rx_port_mapping;
  132. num_ports = wcd937x->num_rx_ports;
  133. break;
  134. case CODEC_TX:
  135. map = &wcd937x->tx_port_mapping;
  136. num_ports = wcd937x->num_tx_ports;
  137. break;
  138. }
  139. for (i = 0; i <= num_ports; i++) {
  140. for (j = 0; j < MAX_CH_PER_PORT; j++) {
  141. if ((*map)[i][j].slave_port_type == slv_prt_type)
  142. goto found;
  143. }
  144. }
  145. found:
  146. if (i > num_ports || j == MAX_CH_PER_PORT) {
  147. dev_err(codec->dev, "%s Failed to find slave port for type %u\n",
  148. __func__, slv_prt_type);
  149. return -EINVAL;
  150. }
  151. *port_id = i;
  152. *num_ch = (*map)[i][j].num_ch;
  153. *ch_mask = (*map)[i][j].ch_mask;
  154. *ch_rate = (*map)[i][j].ch_rate;
  155. *port_type = (*map)[i][j].master_port_type;
  156. return 0;
  157. }
  158. static int wcd937x_parse_port_mapping(struct device *dev,
  159. char *prop, u8 path)
  160. {
  161. u32 *dt_array, map_size, map_length;
  162. u32 port_num, ch_mask, ch_rate, old_port_num = 0;
  163. u32 slave_port_type, master_port_type;
  164. u32 i, ch_iter = 0;
  165. int ret = 0;
  166. u8 *num_ports;
  167. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT];
  168. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  169. switch (path) {
  170. case CODEC_RX:
  171. map = &wcd937x->rx_port_mapping;
  172. num_ports = &wcd937x->num_rx_ports;
  173. break;
  174. case CODEC_TX:
  175. map = &wcd937x->tx_port_mapping;
  176. num_ports = &wcd937x->num_tx_ports;
  177. break;
  178. }
  179. if (!of_find_property(dev->of_node, prop,
  180. &map_size)) {
  181. dev_err(dev, "missing port mapping prop %s\n", prop);
  182. goto err_pdata_fail;
  183. }
  184. map_length = map_size / (NUM_SWRS_DT_PARAMS * sizeof(u32));
  185. dt_array = kzalloc(map_size, GFP_KERNEL);
  186. if (!dt_array) {
  187. ret = -ENOMEM;
  188. goto err_pdata_fail;
  189. }
  190. ret = of_property_read_u32_array(dev->of_node, prop, dt_array,
  191. NUM_SWRS_DT_PARAMS * map_length);
  192. if (ret) {
  193. dev_err(dev, "%s: Failed to read port mapping from prop %s\n",
  194. __func__, prop);
  195. goto err_pdata_fail;
  196. }
  197. for (i = 0; i < map_length; i++) {
  198. port_num = dt_array[NUM_SWRS_DT_PARAMS * i];
  199. slave_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 1];
  200. ch_mask = dt_array[NUM_SWRS_DT_PARAMS * i + 2];
  201. ch_rate = dt_array[NUM_SWRS_DT_PARAMS * i + 3];
  202. master_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 4];
  203. if (port_num != old_port_num)
  204. ch_iter = 0;
  205. (*map)[port_num][ch_iter].slave_port_type = slave_port_type;
  206. (*map)[port_num][ch_iter].ch_mask = ch_mask;
  207. (*map)[port_num][ch_iter].master_port_type = master_port_type;
  208. (*map)[port_num][ch_iter].num_ch = __sw_hweight8(ch_mask);
  209. (*map)[port_num][ch_iter++].ch_rate = ch_rate;
  210. old_port_num = port_num;
  211. }
  212. *num_ports = port_num;
  213. kfree(dt_array);
  214. return 0;
  215. err_pdata_fail:
  216. kfree(dt_array);
  217. return -EINVAL;
  218. }
  219. static int wcd937x_tx_connect_port(struct snd_soc_codec *codec,
  220. u8 slv_port_type, u8 enable)
  221. {
  222. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  223. u8 port_id;
  224. u8 num_ch;
  225. u8 ch_mask;
  226. u32 ch_rate;
  227. u8 port_type;
  228. u8 num_port = 1;
  229. int ret = 0;
  230. ret = wcd937x_set_port_params(codec, slv_port_type, &port_id,
  231. &num_ch, &ch_mask, &ch_rate,
  232. &port_type, CODEC_TX);
  233. if (ret)
  234. return ret;
  235. if (enable)
  236. ret = swr_connect_port(wcd937x->tx_swr_dev, &port_id,
  237. num_port, &ch_mask, &ch_rate,
  238. &num_ch, &port_type);
  239. else
  240. ret = swr_disconnect_port(wcd937x->tx_swr_dev, &port_id,
  241. num_port, &ch_mask, &port_type);
  242. return ret;
  243. }
  244. static int wcd937x_rx_connect_port(struct snd_soc_codec *codec,
  245. u8 slv_port_type, u8 enable)
  246. {
  247. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  248. u8 port_id;
  249. u8 num_ch;
  250. u8 ch_mask;
  251. u32 ch_rate;
  252. u8 port_type;
  253. u8 num_port = 1;
  254. int ret = 0;
  255. ret = wcd937x_set_port_params(codec, slv_port_type, &port_id,
  256. &num_ch, &ch_mask, &ch_rate,
  257. &port_type, CODEC_RX);
  258. if (ret)
  259. return ret;
  260. if (enable)
  261. ret = swr_connect_port(wcd937x->rx_swr_dev, &port_id,
  262. num_port, &ch_mask, &ch_rate,
  263. &num_ch, &port_type);
  264. else
  265. ret = swr_disconnect_port(wcd937x->rx_swr_dev, &port_id,
  266. num_port, &ch_mask, &port_type);
  267. return ret;
  268. }
  269. static int wcd937x_rx_clk_enable(struct snd_soc_codec *codec)
  270. {
  271. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  272. if (wcd937x->rx_clk_cnt == 0) {
  273. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  274. 0x08, 0x08);
  275. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  276. 0x01, 0x01);
  277. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x01, 0x01);
  278. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_RX0_CTL,
  279. 0x40, 0x00);
  280. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_RX1_CTL,
  281. 0x40, 0x00);
  282. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_RX2_CTL,
  283. 0x40, 0x00);
  284. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  285. 0x02, 0x02);
  286. }
  287. wcd937x->rx_clk_cnt++;
  288. return 0;
  289. }
  290. static int wcd937x_rx_clk_disable(struct snd_soc_codec *codec)
  291. {
  292. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  293. wcd937x->rx_clk_cnt--;
  294. if (wcd937x->rx_clk_cnt == 0) {
  295. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x40, 0x00);
  296. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x80, 0x00);
  297. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x01, 0x00);
  298. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  299. 0x02, 0x00);
  300. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  301. 0x01, 0x00);
  302. }
  303. return 0;
  304. }
  305. /*
  306. * wcd937x_soc_get_mbhc: get wcd937x_mbhc handle of corresponding codec
  307. * @codec: handle to snd_soc_codec *
  308. *
  309. * return wcd937x_mbhc handle or error code in case of failure
  310. */
  311. struct wcd937x_mbhc *wcd937x_soc_get_mbhc(struct snd_soc_codec *codec)
  312. {
  313. struct wcd937x_priv *wcd937x;
  314. if (!codec) {
  315. pr_err("%s: Invalid params, NULL codec\n", __func__);
  316. return NULL;
  317. }
  318. wcd937x = snd_soc_codec_get_drvdata(codec);
  319. if (!wcd937x) {
  320. pr_err("%s: Invalid params, NULL tavil\n", __func__);
  321. return NULL;
  322. }
  323. return wcd937x->mbhc;
  324. }
  325. EXPORT_SYMBOL(wcd937x_soc_get_mbhc);
  326. static int wcd937x_codec_hphl_dac_event(struct snd_soc_dapm_widget *w,
  327. struct snd_kcontrol *kcontrol,
  328. int event)
  329. {
  330. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  331. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  332. int ret = 0;
  333. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  334. w->name, event);
  335. switch (event) {
  336. case SND_SOC_DAPM_PRE_PMU:
  337. wcd937x_rx_clk_enable(codec);
  338. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  339. 0x01, 0x01);
  340. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  341. 0x04, 0x04);
  342. snd_soc_update_bits(codec, WCD937X_HPH_RDAC_CLK_CTL1,
  343. 0x80, 0x00);
  344. break;
  345. case SND_SOC_DAPM_POST_PMU:
  346. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  347. 0x0F, 0x02);
  348. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_COMP_CTL_0,
  349. 0x02, 0x02);
  350. usleep_range(5000, 5010);
  351. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  352. 0x02, 0x00);
  353. break;
  354. case SND_SOC_DAPM_POST_PMD:
  355. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  356. wcd937x->rx_swr_dev->dev_num,
  357. false);
  358. break;
  359. }
  360. return ret;
  361. }
  362. static int wcd937x_codec_hphr_dac_event(struct snd_soc_dapm_widget *w,
  363. struct snd_kcontrol *kcontrol,
  364. int event)
  365. {
  366. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  367. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  368. int ret = 0;
  369. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  370. w->name, event);
  371. switch (event) {
  372. case SND_SOC_DAPM_PRE_PMU:
  373. wcd937x_rx_clk_enable(codec);
  374. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  375. 0x02, 0x02);
  376. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  377. 0x08, 0x08);
  378. snd_soc_update_bits(codec, WCD937X_HPH_RDAC_CLK_CTL1,
  379. 0x80, 0x00);
  380. break;
  381. case SND_SOC_DAPM_POST_PMU:
  382. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_R,
  383. 0x0F, 0x02);
  384. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_COMP_CTL_0,
  385. 0x01, 0x01);
  386. usleep_range(5000, 5010);
  387. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  388. 0x02, 0x00);
  389. break;
  390. case SND_SOC_DAPM_POST_PMD:
  391. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  392. wcd937x->rx_swr_dev->dev_num,
  393. false);
  394. break;
  395. }
  396. return ret;
  397. }
  398. static int wcd937x_codec_ear_dac_event(struct snd_soc_dapm_widget *w,
  399. struct snd_kcontrol *kcontrol,
  400. int event)
  401. {
  402. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  403. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  404. int ret = 0;
  405. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  406. w->name, event);
  407. switch (event) {
  408. case SND_SOC_DAPM_PRE_PMU:
  409. wcd937x_rx_clk_enable(codec);
  410. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  411. 0x04, 0x04);
  412. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  413. 0x01, 0x01);
  414. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_COMP_CTL_0,
  415. 0x02, 0x02);
  416. usleep_range(5000, 5010);
  417. break;
  418. case SND_SOC_DAPM_POST_PMD:
  419. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  420. wcd937x->rx_swr_dev->dev_num,
  421. false);
  422. break;
  423. };
  424. return ret;
  425. }
  426. static int wcd937x_codec_aux_dac_event(struct snd_soc_dapm_widget *w,
  427. struct snd_kcontrol *kcontrol,
  428. int event)
  429. {
  430. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  431. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  432. int ret = 0;
  433. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  434. w->name, event);
  435. switch (event) {
  436. case SND_SOC_DAPM_PRE_PMU:
  437. wcd937x_rx_clk_enable(codec);
  438. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  439. 0x04, 0x04);
  440. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  441. 0x04, 0x04);
  442. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_AUX_GAIN_CTL,
  443. 0x01, 0x01);
  444. break;
  445. case SND_SOC_DAPM_POST_PMD:
  446. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  447. wcd937x->rx_swr_dev->dev_num,
  448. false);
  449. wcd937x_rx_clk_disable(codec);
  450. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  451. 0x04, 0x00);
  452. break;
  453. };
  454. return ret;
  455. }
  456. static int wcd937x_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
  457. struct snd_kcontrol *kcontrol,
  458. int event)
  459. {
  460. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  461. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  462. int ret = 0;
  463. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  464. w->name, event);
  465. switch (event) {
  466. case SND_SOC_DAPM_PRE_PMU:
  467. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x10, 0x10);
  468. usleep_range(100, 110);
  469. break;
  470. case SND_SOC_DAPM_POST_PMU:
  471. usleep_range(7000, 7010);
  472. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  473. 0x02, 0x02);
  474. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  475. 0x02, 0x02);
  476. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  477. wcd937x->rx_swr_dev->dev_num,
  478. true);
  479. break;
  480. case SND_SOC_DAPM_POST_PMD:
  481. usleep_range(7000, 7010);
  482. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x10, 0x00);
  483. break;
  484. };
  485. return ret;
  486. }
  487. static int wcd937x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
  488. struct snd_kcontrol *kcontrol,
  489. int event)
  490. {
  491. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  492. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  493. int ret = 0;
  494. switch (event) {
  495. case SND_SOC_DAPM_PRE_PMU:
  496. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x0C, 0x08);
  497. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x20, 0x20);
  498. usleep_range(100, 110);
  499. break;
  500. case SND_SOC_DAPM_POST_PMU:
  501. usleep_range(7000, 7010);
  502. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  503. 0x02, 0x02);
  504. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  505. 0x02, 0x02);
  506. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  507. wcd937x->rx_swr_dev->dev_num,
  508. true);
  509. break;
  510. case SND_SOC_DAPM_POST_PMD:
  511. usleep_range(7000, 7010);
  512. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x20, 0x00);
  513. break;
  514. };
  515. return ret;
  516. }
  517. static int wcd937x_codec_enable_aux_pa(struct snd_soc_dapm_widget *w,
  518. struct snd_kcontrol *kcontrol,
  519. int event)
  520. {
  521. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  522. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  523. int ret = 0;
  524. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  525. w->name, event);
  526. switch (event) {
  527. case SND_SOC_DAPM_PRE_PMU:
  528. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  529. 0x80, 0x80);
  530. usleep_range(500, 510);
  531. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  532. usleep_range(500, 510);
  533. break;
  534. case SND_SOC_DAPM_POST_PMU:
  535. usleep_range(1000, 1010);
  536. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  537. 0x20, 0x20);
  538. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  539. wcd937x->rx_swr_dev->dev_num,
  540. true);
  541. break;
  542. case SND_SOC_DAPM_POST_PMD:
  543. usleep_range(1000, 1010);
  544. usleep_range(1000, 1010);
  545. break;
  546. };
  547. return ret;
  548. }
  549. static int wcd937x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
  550. struct snd_kcontrol *kcontrol,
  551. int event)
  552. {
  553. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  554. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  555. int ret = 0;
  556. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  557. w->name, event);
  558. switch (event) {
  559. case SND_SOC_DAPM_PRE_PMU:
  560. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  561. 0x08, 0x08);
  562. usleep_range(500, 510);
  563. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  564. usleep_range(500, 510);
  565. break;
  566. case SND_SOC_DAPM_POST_PMU:
  567. usleep_range(6000, 6010);
  568. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  569. 0x02, 0x02);
  570. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  571. wcd937x->rx_swr_dev->dev_num,
  572. true);
  573. break;
  574. case SND_SOC_DAPM_POST_PMD:
  575. usleep_range(7000, 7010);
  576. break;
  577. };
  578. return ret;
  579. }
  580. static int wcd937x_enable_rx1(struct snd_soc_dapm_widget *w,
  581. struct snd_kcontrol *kcontrol,
  582. int event)
  583. {
  584. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  585. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  586. w->name, event);
  587. switch (event) {
  588. case SND_SOC_DAPM_PRE_PMU:
  589. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_4,
  590. 0xF0, 0x80);
  591. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  592. 0xE0, 0xA0);
  593. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_3,
  594. 0x02, 0x02);
  595. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2,
  596. 0xFF, 0x1C);
  597. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  598. 0x40, 0x40);
  599. usleep_range(100, 110);
  600. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  601. 0xE0, 0xE0);
  602. usleep_range(100, 110);
  603. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  604. 0x80, 0x80);
  605. usleep_range(500, 510);
  606. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  607. usleep_range(500, 510);
  608. wcd937x_rx_connect_port(codec, HPH_L, true);
  609. wcd937x_rx_connect_port(codec, COMP_L, true);
  610. break;
  611. case SND_SOC_DAPM_POST_PMD:
  612. wcd937x_rx_connect_port(codec, HPH_L, false);
  613. wcd937x_rx_connect_port(codec, COMP_L, false);
  614. wcd937x_rx_clk_disable(codec);
  615. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  616. 0x01, 0x00);
  617. break;
  618. };
  619. return 0;
  620. }
  621. static int wcd937x_enable_rx2(struct snd_soc_dapm_widget *w,
  622. struct snd_kcontrol *kcontrol, int event)
  623. {
  624. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  625. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  626. w->name, event);
  627. switch (event) {
  628. case SND_SOC_DAPM_PRE_PMU:
  629. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_4,
  630. 0xF0, 0x80);
  631. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  632. 0xE0, 0xA0);
  633. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_3, 0x02, 0x02);
  634. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x1C);
  635. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  636. 0x40, 0x40);
  637. usleep_range(100, 110);
  638. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  639. 0xE0, 0xE0);
  640. usleep_range(100, 110);
  641. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  642. 0x80, 0x80);
  643. usleep_range(500, 510);
  644. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  645. usleep_range(500, 510);
  646. wcd937x_rx_connect_port(codec, HPH_R, true);
  647. wcd937x_rx_connect_port(codec, COMP_R, true);
  648. break;
  649. case SND_SOC_DAPM_POST_PMD:
  650. wcd937x_rx_connect_port(codec, HPH_R, false);
  651. wcd937x_rx_connect_port(codec, COMP_R, false);
  652. wcd937x_rx_clk_disable(codec);
  653. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  654. 0x02, 0x00);
  655. break;
  656. };
  657. return 0;
  658. }
  659. static int wcd937x_enable_rx3(struct snd_soc_dapm_widget *w,
  660. struct snd_kcontrol *kcontrol,
  661. int event)
  662. {
  663. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  664. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  665. w->name, event);
  666. switch (event) {
  667. case SND_SOC_DAPM_PRE_PMU:
  668. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_2,
  669. 0xE0, 0xA0);
  670. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_3, 0x02, 0x02);
  671. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x1C);
  672. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  673. 0x40, 0x40);
  674. usleep_range(100, 110);
  675. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_2,
  676. 0xE0, 0xE0);
  677. usleep_range(100, 110);
  678. wcd937x_rx_connect_port(codec, LO, true);
  679. break;
  680. case SND_SOC_DAPM_POST_PMD:
  681. wcd937x_rx_connect_port(codec, LO, false);
  682. usleep_range(6000, 6010);
  683. wcd937x_rx_clk_disable(codec);
  684. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  685. 0x04, 0x00);
  686. break;
  687. }
  688. return 0;
  689. }
  690. static int wcd937x_codec_enable_dmic(struct snd_soc_dapm_widget *w,
  691. struct snd_kcontrol *kcontrol,
  692. int event)
  693. {
  694. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  695. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  696. u16 dmic_clk_reg;
  697. s32 *dmic_clk_cnt;
  698. unsigned int dmic;
  699. char *wname;
  700. int ret = 0;
  701. wname = strpbrk(w->name, "012345");
  702. if (!wname) {
  703. dev_err(codec->dev, "%s: widget not found\n", __func__);
  704. return -EINVAL;
  705. }
  706. ret = kstrtouint(wname, 10, &dmic);
  707. if (ret < 0) {
  708. dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
  709. __func__);
  710. return -EINVAL;
  711. }
  712. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  713. w->name, event);
  714. switch (dmic) {
  715. case 0:
  716. case 1:
  717. dmic_clk_cnt = &(wcd937x->dmic_0_1_clk_cnt);
  718. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC0_CTL;
  719. break;
  720. case 2:
  721. case 3:
  722. dmic_clk_cnt = &(wcd937x->dmic_2_3_clk_cnt);
  723. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC1_CTL;
  724. break;
  725. case 4:
  726. case 5:
  727. dmic_clk_cnt = &(wcd937x->dmic_4_5_clk_cnt);
  728. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC2_CTL;
  729. break;
  730. default:
  731. dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
  732. __func__);
  733. return -EINVAL;
  734. };
  735. dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_clk_cnt %d\n",
  736. __func__, event, dmic, *dmic_clk_cnt);
  737. switch (event) {
  738. case SND_SOC_DAPM_PRE_PMU:
  739. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  740. 0x80, 0x80);
  741. snd_soc_update_bits(codec, dmic_clk_reg, 0x07, 0x02);
  742. snd_soc_update_bits(codec, dmic_clk_reg, 0x08, 0x08);
  743. snd_soc_update_bits(codec, dmic_clk_reg, 0x70, 0x20);
  744. wcd937x_tx_connect_port(codec, DMIC0 + (w->shift), true);
  745. break;
  746. case SND_SOC_DAPM_POST_PMD:
  747. wcd937x_tx_connect_port(codec, DMIC0 + (w->shift), false);
  748. break;
  749. };
  750. return 0;
  751. }
  752. /*
  753. * wcd937x_get_micb_vout_ctl_val: converts micbias from volts to register value
  754. * @micb_mv: micbias in mv
  755. *
  756. * return register value converted
  757. */
  758. int wcd937x_get_micb_vout_ctl_val(u32 micb_mv)
  759. {
  760. /* min micbias voltage is 1V and maximum is 2.85V */
  761. if (micb_mv < 1000 || micb_mv > 2850) {
  762. pr_err("%s: unsupported micbias voltage\n", __func__);
  763. return -EINVAL;
  764. }
  765. return (micb_mv - 1000) / 50;
  766. }
  767. EXPORT_SYMBOL(wcd937x_get_micb_vout_ctl_val);
  768. /*
  769. * wcd937x_mbhc_micb_adjust_voltage: adjust specific micbias voltage
  770. * @codec: handle to snd_soc_codec *
  771. * @req_volt: micbias voltage to be set
  772. * @micb_num: micbias to be set, e.g. micbias1 or micbias2
  773. *
  774. * return 0 if adjustment is success or error code in case of failure
  775. */
  776. int wcd937x_mbhc_micb_adjust_voltage(struct snd_soc_codec *codec,
  777. int req_volt, int micb_num)
  778. {
  779. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  780. int cur_vout_ctl, req_vout_ctl;
  781. int micb_reg, micb_val, micb_en;
  782. int ret = 0;
  783. switch (micb_num) {
  784. case MIC_BIAS_1:
  785. micb_reg = WCD937X_ANA_MICB1;
  786. break;
  787. case MIC_BIAS_2:
  788. micb_reg = WCD937X_ANA_MICB2;
  789. break;
  790. case MIC_BIAS_3:
  791. micb_reg = WCD937X_ANA_MICB3;
  792. break;
  793. default:
  794. return -EINVAL;
  795. }
  796. mutex_lock(&wcd937x->micb_lock);
  797. /*
  798. * If requested micbias voltage is same as current micbias
  799. * voltage, then just return. Otherwise, adjust voltage as
  800. * per requested value. If micbias is already enabled, then
  801. * to avoid slow micbias ramp-up or down enable pull-up
  802. * momentarily, change the micbias value and then re-enable
  803. * micbias.
  804. */
  805. micb_val = snd_soc_read(codec, micb_reg);
  806. micb_en = (micb_val & 0xC0) >> 6;
  807. cur_vout_ctl = micb_val & 0x3F;
  808. req_vout_ctl = wcd937x_get_micb_vout_ctl_val(req_volt);
  809. if (req_vout_ctl < 0) {
  810. ret = -EINVAL;
  811. goto exit;
  812. }
  813. if (cur_vout_ctl == req_vout_ctl) {
  814. ret = 0;
  815. goto exit;
  816. }
  817. dev_dbg(codec->dev, "%s: micb_num: %d, cur_mv: %d, req_mv: %d, micb_en: %d\n",
  818. __func__, micb_num, WCD_VOUT_CTL_TO_MICB(cur_vout_ctl),
  819. req_volt, micb_en);
  820. if (micb_en == 0x1)
  821. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  822. snd_soc_update_bits(codec, micb_reg, 0x3F, req_vout_ctl);
  823. if (micb_en == 0x1) {
  824. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x40);
  825. /*
  826. * Add 2ms delay as per HW requirement after enabling
  827. * micbias
  828. */
  829. usleep_range(2000, 2100);
  830. }
  831. exit:
  832. mutex_unlock(&wcd937x->micb_lock);
  833. return ret;
  834. }
  835. EXPORT_SYMBOL(wcd937x_mbhc_micb_adjust_voltage);
  836. static int wcd937x_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
  837. struct snd_kcontrol *kcontrol,
  838. int event)
  839. {
  840. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  841. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  842. int ret = 0;
  843. switch (event) {
  844. case SND_SOC_DAPM_PRE_PMU:
  845. ret = swr_slvdev_datapath_control(wcd937x->tx_swr_dev,
  846. wcd937x->tx_swr_dev->dev_num,
  847. true);
  848. break;
  849. case SND_SOC_DAPM_POST_PMD:
  850. ret = swr_slvdev_datapath_control(wcd937x->tx_swr_dev,
  851. wcd937x->tx_swr_dev->dev_num,
  852. false);
  853. break;
  854. };
  855. return ret;
  856. }
  857. static int wcd937x_codec_enable_adc(struct snd_soc_dapm_widget *w,
  858. struct snd_kcontrol *kcontrol,
  859. int event){
  860. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  861. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  862. w->name, event);
  863. switch (event) {
  864. case SND_SOC_DAPM_PRE_PMU:
  865. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  866. 0x80, 0x80);
  867. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  868. 0x08, 0x08);
  869. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  870. 0x10, 0x10);
  871. wcd937x_tx_connect_port(codec, ADC1 + (w->shift), true);
  872. break;
  873. case SND_SOC_DAPM_POST_PMD:
  874. wcd937x_tx_connect_port(codec, ADC1 + (w->shift), false);
  875. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  876. 0x08, 0x00);
  877. break;
  878. };
  879. return 0;
  880. }
  881. static int wcd937x_enable_req(struct snd_soc_dapm_widget *w,
  882. struct snd_kcontrol *kcontrol, int event)
  883. {
  884. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  885. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  886. w->name, event);
  887. switch (event) {
  888. case SND_SOC_DAPM_PRE_PMU:
  889. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_REQ_CTL,
  890. 0x02, 0x02);
  891. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_REQ_CTL, 0x01,
  892. 0x00);
  893. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x40, 0x40);
  894. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  895. 0x30, 0x30);
  896. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH1, 0x80, 0x80);
  897. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x40, 0x00);
  898. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x80, 0x80);
  899. break;
  900. case SND_SOC_DAPM_POST_PMD:
  901. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH1, 0x80, 0x00);
  902. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  903. 0x10, 0x00);
  904. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  905. 0x10, 0x00);
  906. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  907. 0x80, 0x00);
  908. break;
  909. };
  910. return 0;
  911. }
  912. int wcd937x_micbias_control(struct snd_soc_codec *codec,
  913. int micb_num, int req, bool is_dapm)
  914. {
  915. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  916. int micb_index = micb_num - 1;
  917. u16 micb_reg;
  918. int pre_off_event = 0, post_off_event = 0;
  919. int post_on_event = 0, post_dapm_off = 0;
  920. int post_dapm_on = 0;
  921. if ((micb_index < 0) || (micb_index > WCD937X_MAX_MICBIAS - 1)) {
  922. dev_err(codec->dev, "%s: Invalid micbias index, micb_ind:%d\n",
  923. __func__, micb_index);
  924. return -EINVAL;
  925. }
  926. switch (micb_num) {
  927. case MIC_BIAS_1:
  928. micb_reg = WCD937X_ANA_MICB1;
  929. break;
  930. case MIC_BIAS_2:
  931. micb_reg = WCD937X_ANA_MICB2;
  932. pre_off_event = WCD_EVENT_PRE_MICBIAS_2_OFF;
  933. post_off_event = WCD_EVENT_POST_MICBIAS_2_OFF;
  934. post_on_event = WCD_EVENT_POST_MICBIAS_2_ON;
  935. post_dapm_on = WCD_EVENT_POST_DAPM_MICBIAS_2_ON;
  936. post_dapm_off = WCD_EVENT_POST_DAPM_MICBIAS_2_OFF;
  937. break;
  938. case MIC_BIAS_3:
  939. micb_reg = WCD937X_ANA_MICB3;
  940. break;
  941. default:
  942. dev_err(codec->dev, "%s: Invalid micbias number: %d\n",
  943. __func__, micb_num);
  944. return -EINVAL;
  945. };
  946. mutex_lock(&wcd937x->micb_lock);
  947. switch (req) {
  948. case MICB_PULLUP_ENABLE:
  949. wcd937x->pullup_ref[micb_index]++;
  950. if ((wcd937x->pullup_ref[micb_index] == 1) &&
  951. (wcd937x->micb_ref[micb_index] == 0))
  952. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  953. break;
  954. case MICB_PULLUP_DISABLE:
  955. if (wcd937x->pullup_ref[micb_index] > 0)
  956. wcd937x->pullup_ref[micb_index]--;
  957. if ((wcd937x->pullup_ref[micb_index] == 0) &&
  958. (wcd937x->micb_ref[micb_index] == 0))
  959. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x00);
  960. break;
  961. case MICB_ENABLE:
  962. wcd937x->micb_ref[micb_index]++;
  963. if (wcd937x->micb_ref[micb_index] == 1) {
  964. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0xE0, 0xE0);
  965. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x10, 0x10);
  966. snd_soc_update_bits(codec, WCD937X_MICB1_TEST_CTL_2, 0x01, 0x01);
  967. snd_soc_update_bits(codec, WCD937X_MICB2_TEST_CTL_2, 0x01, 0x01);
  968. snd_soc_update_bits(codec, WCD937X_MICB3_TEST_CTL_2, 0x01, 0x01);
  969. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x40);
  970. if (post_on_event)
  971. blocking_notifier_call_chain(&wcd937x->notifier,
  972. post_on_event,
  973. &wcd937x->mbhc);
  974. }
  975. if (is_dapm && post_dapm_on)
  976. blocking_notifier_call_chain(&wcd937x->notifier,
  977. post_dapm_on,
  978. &wcd937x->mbhc);
  979. break;
  980. case MICB_DISABLE:
  981. if (wcd937x->micb_ref[micb_index] > 0)
  982. wcd937x->micb_ref[micb_index]--;
  983. if ((wcd937x->micb_ref[micb_index] == 0) &&
  984. (wcd937x->pullup_ref[micb_index] > 0))
  985. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  986. else if ((wcd937x->micb_ref[micb_index] == 0) &&
  987. (wcd937x->pullup_ref[micb_index] == 0)) {
  988. if (pre_off_event)
  989. blocking_notifier_call_chain(&wcd937x->notifier,
  990. pre_off_event,
  991. &wcd937x->mbhc);
  992. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x00);
  993. if (post_off_event)
  994. blocking_notifier_call_chain(&wcd937x->notifier,
  995. post_off_event,
  996. &wcd937x->mbhc);
  997. }
  998. if (is_dapm && post_dapm_off)
  999. blocking_notifier_call_chain(&wcd937x->notifier,
  1000. post_dapm_off,
  1001. &wcd937x->mbhc);
  1002. break;
  1003. };
  1004. dev_dbg(codec->dev, "%s: micb_num:%d, micb_ref: %d, pullup_ref: %d\n",
  1005. __func__, micb_num, wcd937x->micb_ref[micb_index],
  1006. wcd937x->pullup_ref[micb_index]);
  1007. mutex_unlock(&wcd937x->micb_lock);
  1008. return 0;
  1009. }
  1010. EXPORT_SYMBOL(wcd937x_micbias_control);
  1011. static int __wcd937x_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1012. int event)
  1013. {
  1014. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  1015. int micb_num;
  1016. dev_dbg(codec->dev, "%s: wname: %s, event: %d\n",
  1017. __func__, w->name, event);
  1018. if (strnstr(w->name, "MIC BIAS1", sizeof("MIC BIAS1")))
  1019. micb_num = MIC_BIAS_1;
  1020. else if (strnstr(w->name, "MIC BIAS2", sizeof("MIC BIAS2")))
  1021. micb_num = MIC_BIAS_2;
  1022. else if (strnstr(w->name, "MIC BIAS3", sizeof("MIC BIAS3")))
  1023. micb_num = MIC_BIAS_3;
  1024. else
  1025. return -EINVAL;
  1026. switch (event) {
  1027. case SND_SOC_DAPM_PRE_PMU:
  1028. wcd937x_micbias_control(codec, micb_num, MICB_ENABLE, true);
  1029. break;
  1030. case SND_SOC_DAPM_POST_PMU:
  1031. usleep_range(1000, 1100);
  1032. break;
  1033. case SND_SOC_DAPM_POST_PMD:
  1034. wcd937x_micbias_control(codec, micb_num, MICB_DISABLE, true);
  1035. break;
  1036. };
  1037. return 0;
  1038. }
  1039. static int wcd937x_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1040. struct snd_kcontrol *kcontrol,
  1041. int event)
  1042. {
  1043. return __wcd937x_codec_enable_micbias(w, event);
  1044. }
  1045. static int wcd937x_rx_hph_mode_get(struct snd_kcontrol *kcontrol,
  1046. struct snd_ctl_elem_value *ucontrol)
  1047. {
  1048. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  1049. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1050. ucontrol->value.integer.value[0] = wcd937x->hph_mode;
  1051. return 0;
  1052. }
  1053. static int wcd937x_rx_hph_mode_put(struct snd_kcontrol *kcontrol,
  1054. struct snd_ctl_elem_value *ucontrol)
  1055. {
  1056. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  1057. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1058. u32 mode_val;
  1059. mode_val = ucontrol->value.enumerated.item[0];
  1060. dev_dbg(codec->dev, "%s: mode: %d\n", __func__, mode_val);
  1061. if (mode_val == 0) {
  1062. dev_warn(codec->dev, "%s:Invalid HPH Mode, default to class_AB\n",
  1063. __func__);
  1064. mode_val = 3; /* enum will be updated later */
  1065. }
  1066. wcd937x->hph_mode = mode_val;
  1067. return 0;
  1068. }
  1069. static const char * const rx_hph_mode_mux_text[] = {
  1070. "CLS_H_INVALID", "CLS_H_HIFI", "CLS_H_LP", "CLS_AB", "CLS_H_LOHIFI",
  1071. "CLS_H_ULP", "CLS_AB_HIFI",
  1072. };
  1073. static const struct soc_enum rx_hph_mode_mux_enum =
  1074. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(rx_hph_mode_mux_text),
  1075. rx_hph_mode_mux_text);
  1076. static const struct snd_kcontrol_new wcd937x_snd_controls[] = {
  1077. SOC_ENUM_EXT("RX HPH Mode", rx_hph_mode_mux_enum,
  1078. wcd937x_rx_hph_mode_get, wcd937x_rx_hph_mode_put),
  1079. SOC_SINGLE_TLV("HPHL Volume", WCD937X_HPH_L_EN, 0, 20, 1, line_gain),
  1080. SOC_SINGLE_TLV("HPHR Volume", WCD937X_HPH_R_EN, 0, 20, 1, line_gain),
  1081. SOC_SINGLE_TLV("ADC1 Volume", WCD937X_ANA_TX_CH1, 0, 20, 0, analog_gain),
  1082. SOC_SINGLE_TLV("ADC2 Volume", WCD937X_ANA_TX_CH2, 0, 20, 0, analog_gain),
  1083. SOC_SINGLE_TLV("ADC3 Volume", WCD937X_ANA_TX_CH3, 0, 20, 0, analog_gain),
  1084. };
  1085. static const struct snd_kcontrol_new adc1_switch[] = {
  1086. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1087. };
  1088. static const struct snd_kcontrol_new adc2_switch[] = {
  1089. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1090. };
  1091. static const struct snd_kcontrol_new adc3_switch[] = {
  1092. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1093. };
  1094. static const struct snd_kcontrol_new dmic1_switch[] = {
  1095. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1096. };
  1097. static const struct snd_kcontrol_new dmic2_switch[] = {
  1098. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1099. };
  1100. static const struct snd_kcontrol_new dmic3_switch[] = {
  1101. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1102. };
  1103. static const struct snd_kcontrol_new dmic4_switch[] = {
  1104. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1105. };
  1106. static const struct snd_kcontrol_new dmic5_switch[] = {
  1107. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1108. };
  1109. static const struct snd_kcontrol_new dmic6_switch[] = {
  1110. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1111. };
  1112. static const struct snd_kcontrol_new ear_rdac_switch[] = {
  1113. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1114. };
  1115. static const struct snd_kcontrol_new aux_rdac_switch[] = {
  1116. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1117. };
  1118. static const struct snd_kcontrol_new hphl_rdac_switch[] = {
  1119. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1120. };
  1121. static const struct snd_kcontrol_new hphr_rdac_switch[] = {
  1122. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1123. };
  1124. static const char * const adc2_mux_text[] = {
  1125. "INP2", "INP3"
  1126. };
  1127. static const char * const rdac3_mux_text[] = {
  1128. "RX1", "RX3"
  1129. };
  1130. static const struct soc_enum adc2_enum =
  1131. SOC_ENUM_SINGLE(WCD937X_TX_NEW_TX_CH2_SEL, 7,
  1132. ARRAY_SIZE(adc2_mux_text), adc2_mux_text);
  1133. static const struct soc_enum rdac3_enum =
  1134. SOC_ENUM_SINGLE(WCD937X_DIGITAL_CDC_EAR_PATH_CTL, 0,
  1135. ARRAY_SIZE(rdac3_mux_text), rdac3_mux_text);
  1136. static const struct snd_kcontrol_new tx_adc2_mux =
  1137. SOC_DAPM_ENUM("ADC2 MUX Mux", adc2_enum);
  1138. static const struct snd_kcontrol_new rx_rdac3_mux =
  1139. SOC_DAPM_ENUM("RDAC3_MUX Mux", rdac3_enum);
  1140. static const struct snd_soc_dapm_widget wcd937x_dapm_widgets[] = {
  1141. /*input widgets*/
  1142. SND_SOC_DAPM_INPUT("AMIC1"),
  1143. SND_SOC_DAPM_INPUT("AMIC2"),
  1144. SND_SOC_DAPM_INPUT("AMIC3"),
  1145. SND_SOC_DAPM_INPUT("IN1_HPHL"),
  1146. SND_SOC_DAPM_INPUT("IN2_HPHR"),
  1147. SND_SOC_DAPM_INPUT("IN3_AUX"),
  1148. /*tx widgets*/
  1149. SND_SOC_DAPM_ADC_E("ADC1", NULL, SND_SOC_NOPM, 0, 0,
  1150. wcd937x_codec_enable_adc,
  1151. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1152. SND_SOC_DAPM_ADC_E("ADC2", NULL, SND_SOC_NOPM, 1, 0,
  1153. wcd937x_codec_enable_adc,
  1154. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1155. SND_SOC_DAPM_MIXER_E("ADC1 REQ", SND_SOC_NOPM, 0, 0,
  1156. NULL, 0, wcd937x_enable_req,
  1157. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1158. SND_SOC_DAPM_MIXER_E("ADC2 REQ", SND_SOC_NOPM, 0, 0,
  1159. NULL, 0, wcd937x_enable_req,
  1160. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1161. SND_SOC_DAPM_MUX("ADC2 MUX", SND_SOC_NOPM, 0, 0,
  1162. &tx_adc2_mux),
  1163. /*tx mixers*/
  1164. SND_SOC_DAPM_MIXER_E("ADC1_MIXER", SND_SOC_NOPM, 0, 0,
  1165. adc1_switch, ARRAY_SIZE(adc1_switch),
  1166. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1167. SND_SOC_DAPM_POST_PMD),
  1168. SND_SOC_DAPM_MIXER_E("ADC2_MIXER", SND_SOC_NOPM, 0, 0,
  1169. adc2_switch, ARRAY_SIZE(adc2_switch),
  1170. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1171. SND_SOC_DAPM_POST_PMD),
  1172. /* micbias widgets*/
  1173. SND_SOC_DAPM_MICBIAS_E("MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1174. wcd937x_codec_enable_micbias,
  1175. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1176. SND_SOC_DAPM_POST_PMD),
  1177. SND_SOC_DAPM_MICBIAS_E("MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1178. wcd937x_codec_enable_micbias,
  1179. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1180. SND_SOC_DAPM_POST_PMD),
  1181. SND_SOC_DAPM_MICBIAS_E("MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1182. wcd937x_codec_enable_micbias,
  1183. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1184. SND_SOC_DAPM_POST_PMD),
  1185. /*rx widgets*/
  1186. SND_SOC_DAPM_PGA_E("EAR PGA", WCD937X_ANA_EAR, 7, 0, NULL, 0,
  1187. wcd937x_codec_enable_ear_pa,
  1188. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1189. SND_SOC_DAPM_POST_PMD),
  1190. SND_SOC_DAPM_PGA_E("AUX PGA", WCD937X_AUX_AUXPA, 7, 0, NULL, 0,
  1191. wcd937x_codec_enable_aux_pa,
  1192. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1193. SND_SOC_DAPM_POST_PMD),
  1194. SND_SOC_DAPM_PGA_E("HPHL PGA", WCD937X_ANA_HPH, 7, 0, NULL, 0,
  1195. wcd937x_codec_enable_hphl_pa,
  1196. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1197. SND_SOC_DAPM_POST_PMD),
  1198. SND_SOC_DAPM_PGA_E("HPHR PGA", WCD937X_ANA_HPH, 6, 0, NULL, 0,
  1199. wcd937x_codec_enable_hphr_pa,
  1200. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1201. SND_SOC_DAPM_POST_PMD),
  1202. SND_SOC_DAPM_DAC_E("RDAC1", NULL, SND_SOC_NOPM, 0, 0,
  1203. wcd937x_codec_hphl_dac_event,
  1204. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1205. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1206. SND_SOC_DAPM_DAC_E("RDAC2", NULL, SND_SOC_NOPM, 0, 0,
  1207. wcd937x_codec_hphr_dac_event,
  1208. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1209. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1210. SND_SOC_DAPM_DAC_E("RDAC3", NULL, SND_SOC_NOPM, 0, 0,
  1211. wcd937x_codec_ear_dac_event,
  1212. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1213. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1214. SND_SOC_DAPM_DAC_E("RDAC4", NULL, SND_SOC_NOPM, 0, 0,
  1215. wcd937x_codec_aux_dac_event,
  1216. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1217. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1218. SND_SOC_DAPM_MUX("RDAC3_MUX", SND_SOC_NOPM, 0, 0, &rx_rdac3_mux),
  1219. SND_SOC_DAPM_MIXER_E("RX1", SND_SOC_NOPM, 0, 0, NULL, 0,
  1220. wcd937x_enable_rx1, SND_SOC_DAPM_PRE_PMU |
  1221. SND_SOC_DAPM_POST_PMD),
  1222. SND_SOC_DAPM_MIXER_E("RX2", SND_SOC_NOPM, 0, 0, NULL, 0,
  1223. wcd937x_enable_rx2, SND_SOC_DAPM_PRE_PMU |
  1224. SND_SOC_DAPM_POST_PMD),
  1225. SND_SOC_DAPM_MIXER_E("RX3", SND_SOC_NOPM, 0, 0, NULL, 0,
  1226. wcd937x_enable_rx3, SND_SOC_DAPM_PRE_PMU |
  1227. SND_SOC_DAPM_POST_PMD),
  1228. /* rx mixer widgets*/
  1229. SND_SOC_DAPM_MIXER("EAR_RDAC", SND_SOC_NOPM, 0, 0,
  1230. ear_rdac_switch, ARRAY_SIZE(ear_rdac_switch)),
  1231. SND_SOC_DAPM_MIXER("AUX_RDAC", SND_SOC_NOPM, 0, 0,
  1232. aux_rdac_switch, ARRAY_SIZE(aux_rdac_switch)),
  1233. SND_SOC_DAPM_MIXER("HPHL_RDAC", SND_SOC_NOPM, 0, 0,
  1234. hphl_rdac_switch, ARRAY_SIZE(hphl_rdac_switch)),
  1235. SND_SOC_DAPM_MIXER("HPHR_RDAC", SND_SOC_NOPM, 0, 0,
  1236. hphr_rdac_switch, ARRAY_SIZE(hphr_rdac_switch)),
  1237. /*output widgets tx*/
  1238. SND_SOC_DAPM_OUTPUT("ADC1_OUTPUT"),
  1239. SND_SOC_DAPM_OUTPUT("ADC2_OUTPUT"),
  1240. /*output widgets rx*/
  1241. SND_SOC_DAPM_OUTPUT("EAR"),
  1242. SND_SOC_DAPM_OUTPUT("AUX"),
  1243. SND_SOC_DAPM_OUTPUT("HPHL"),
  1244. SND_SOC_DAPM_OUTPUT("HPHR"),
  1245. };
  1246. static const struct snd_soc_dapm_widget wcd9375_dapm_widgets[] = {
  1247. /*input widgets*/
  1248. SND_SOC_DAPM_INPUT("AMIC4"),
  1249. /*tx widgets*/
  1250. SND_SOC_DAPM_ADC_E("ADC3", NULL, SND_SOC_NOPM, 2, 0,
  1251. wcd937x_codec_enable_adc,
  1252. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1253. SND_SOC_DAPM_MIXER_E("ADC3 REQ", SND_SOC_NOPM, 0, 0,
  1254. NULL, 0, wcd937x_enable_req,
  1255. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1256. SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
  1257. wcd937x_codec_enable_dmic,
  1258. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1259. SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 1, 0,
  1260. wcd937x_codec_enable_dmic,
  1261. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1262. SND_SOC_DAPM_ADC_E("DMIC3", NULL, SND_SOC_NOPM, 2, 0,
  1263. wcd937x_codec_enable_dmic,
  1264. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1265. SND_SOC_DAPM_ADC_E("DMIC4", NULL, SND_SOC_NOPM, 3, 0,
  1266. wcd937x_codec_enable_dmic,
  1267. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1268. SND_SOC_DAPM_ADC_E("DMIC5", NULL, SND_SOC_NOPM, 4, 0,
  1269. wcd937x_codec_enable_dmic,
  1270. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1271. SND_SOC_DAPM_ADC_E("DMIC6", NULL, SND_SOC_NOPM, 5, 0,
  1272. wcd937x_codec_enable_dmic,
  1273. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1274. /*tx mixer widgets*/
  1275. SND_SOC_DAPM_MIXER_E("DMIC1_MIXER", SND_SOC_NOPM, 0,
  1276. 0, dmic1_switch, ARRAY_SIZE(dmic1_switch),
  1277. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1278. SND_SOC_DAPM_POST_PMD),
  1279. SND_SOC_DAPM_MIXER_E("DMIC2_MIXER", SND_SOC_NOPM, 0,
  1280. 0, dmic2_switch, ARRAY_SIZE(dmic2_switch),
  1281. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1282. SND_SOC_DAPM_POST_PMD),
  1283. SND_SOC_DAPM_MIXER_E("DMIC3_MIXER", SND_SOC_NOPM, 0,
  1284. 0, dmic3_switch, ARRAY_SIZE(dmic3_switch),
  1285. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1286. SND_SOC_DAPM_POST_PMD),
  1287. SND_SOC_DAPM_MIXER_E("DMIC4_MIXER", SND_SOC_NOPM, 0,
  1288. 0, dmic4_switch, ARRAY_SIZE(dmic4_switch),
  1289. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1290. SND_SOC_DAPM_POST_PMD),
  1291. SND_SOC_DAPM_MIXER_E("DMIC5_MIXER", SND_SOC_NOPM, 0,
  1292. 0, dmic5_switch, ARRAY_SIZE(dmic5_switch),
  1293. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1294. SND_SOC_DAPM_POST_PMD),
  1295. SND_SOC_DAPM_MIXER_E("DMIC6_MIXER", SND_SOC_NOPM, 0,
  1296. 0, dmic6_switch, ARRAY_SIZE(dmic6_switch),
  1297. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1298. SND_SOC_DAPM_POST_PMD),
  1299. SND_SOC_DAPM_MIXER_E("ADC3_MIXER", SND_SOC_NOPM, 0, 0, adc3_switch,
  1300. ARRAY_SIZE(adc3_switch), wcd937x_tx_swr_ctrl,
  1301. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1302. /*output widgets*/
  1303. SND_SOC_DAPM_OUTPUT("DMIC1_OUTPUT"),
  1304. SND_SOC_DAPM_OUTPUT("DMIC2_OUTPUT"),
  1305. SND_SOC_DAPM_OUTPUT("DMIC3_OUTPUT"),
  1306. SND_SOC_DAPM_OUTPUT("DMIC4_OUTPUT"),
  1307. SND_SOC_DAPM_OUTPUT("DMIC5_OUTPUT"),
  1308. SND_SOC_DAPM_OUTPUT("DMIC6_OUTPUT"),
  1309. SND_SOC_DAPM_OUTPUT("ADC3_OUTPUT"),
  1310. };
  1311. static const struct snd_soc_dapm_route wcd937x_audio_map[] = {
  1312. {"ADC1_OUTPUT", NULL, "ADC1_MIXER"},
  1313. {"ADC1_MIXER", "Switch", "ADC1 REQ"},
  1314. {"ADC1 REQ", NULL, "ADC1"},
  1315. {"ADC1", NULL, "AMIC1"},
  1316. {"ADC2_OUTPUT", NULL, "ADC2_MIXER"},
  1317. {"ADC2_MIXER", "Switch", "ADC2 REQ"},
  1318. {"ADC2 REQ", NULL, "ADC2"},
  1319. {"ADC2", NULL, "ADC2 MUX"},
  1320. {"ADC2 MUX", "INP3", "AMIC3"},
  1321. {"ADC2 MUX", "INP2", "AMIC2"},
  1322. {"RX1", NULL, "IN1_HPHL"},
  1323. {"RDAC1", NULL, "RX1"},
  1324. {"HPHL_RDAC", "Switch", "RDAC1"},
  1325. {"HPHL PGA", NULL, "HPHL_RDAC"},
  1326. {"HPHL", NULL, "HPHL PGA"},
  1327. {"RX2", NULL, "IN2_HPHR"},
  1328. {"RDAC2", NULL, "RX2"},
  1329. {"HPHR_RDAC", "Switch", "RDAC2"},
  1330. {"HPHR PGA", NULL, "HPHR_RDAC"},
  1331. {"HPHR", NULL, "HPHR PGA"},
  1332. {"RX3", NULL, "IN3_AUX"},
  1333. {"RDAC4", NULL, "RX3"},
  1334. {"AUX_RDAC", "Switch", "RDAC4"},
  1335. {"AUX PGA", NULL, "AUX_RDAC"},
  1336. {"AUX", NULL, "AUX PGA"},
  1337. {"RDAC3_MUX", "RX3", "RX3"},
  1338. {"RDAC3_MUX", "RX1", "RX1"},
  1339. {"RDAC3", NULL, "RDAC3_MUX"},
  1340. {"EAR_RDAC", "Switch", "RDAC3"},
  1341. {"EAR PGA", NULL, "EAR_RDAC"},
  1342. {"EAR", NULL, "EAR PGA"},
  1343. };
  1344. static const struct snd_soc_dapm_route wcd9375_audio_map[] = {
  1345. {"ADC3_OUTPUT", NULL, "ADC3_MIXER"},
  1346. {"ADC3_MIXER", "Switch", "ADC3 REQ"},
  1347. {"ADC3 REQ", NULL, "ADC3"},
  1348. {"ADC3", NULL, "AMIC4"},
  1349. {"DMIC1_OUTPUT", NULL, "DMIC1_MIXER"},
  1350. {"DMIC1_MIXER", "Switch", "DMIC1"},
  1351. {"DMIC2_OUTPUT", NULL, "DMIC2_MIXER"},
  1352. {"DMIC2_MIXER", "Switch", "DMIC2"},
  1353. {"DMIC3_OUTPUT", NULL, "DMIC3_MIXER"},
  1354. {"DMIC3_MIXER", "Switch", "DMIC3"},
  1355. {"DMIC4_OUTPUT", NULL, "DMIC4_MIXER"},
  1356. {"DMIC4_MIXER", "Switch", "DMIC4"},
  1357. {"DMIC5_OUTPUT", NULL, "DMIC5_MIXER"},
  1358. {"DMIC5_MIXER", "Switch", "DMIC5"},
  1359. {"DMIC6_OUTPUT", NULL, "DMIC6_MIXER"},
  1360. {"DMIC6_MIXER", "Switch", "DMIC6"},
  1361. };
  1362. static int wcd937x_soc_codec_probe(struct snd_soc_codec *codec)
  1363. {
  1364. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1365. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  1366. int variant;
  1367. int ret = -EINVAL;
  1368. dev_info(codec->dev, "%s()\n", __func__);
  1369. wcd937x = snd_soc_codec_get_drvdata(codec);
  1370. if (!wcd937x)
  1371. return -EINVAL;
  1372. wcd937x->codec = codec;
  1373. variant = (snd_soc_read(codec, WCD937X_DIGITAL_EFUSE_REG_0) & 0x0E) >> 1;
  1374. wcd937x->variant = variant;
  1375. wcd937x->fw_data = devm_kzalloc(codec->dev,
  1376. sizeof(*(wcd937x->fw_data)),
  1377. GFP_KERNEL);
  1378. if (!wcd937x->fw_data) {
  1379. dev_err(codec->dev, "Failed to allocate fw_data\n");
  1380. ret = -ENOMEM;
  1381. goto err;
  1382. }
  1383. set_bit(WCD9XXX_MBHC_CAL, wcd937x->fw_data->cal_bit);
  1384. ret = wcd_cal_create_hwdep(wcd937x->fw_data,
  1385. WCD9XXX_CODEC_HWDEP_NODE, codec);
  1386. if (ret < 0) {
  1387. dev_err(codec->dev, "%s hwdep failed %d\n", __func__, ret);
  1388. goto err_hwdep;
  1389. }
  1390. ret = wcd937x_mbhc_init(&wcd937x->mbhc, codec, wcd937x->fw_data);
  1391. if (ret) {
  1392. pr_err("%s: mbhc initialization failed\n", __func__);
  1393. goto err_hwdep;
  1394. }
  1395. wcd937x_init_reg(codec);
  1396. if (wcd937x->variant == WCD9375_VARIANT) {
  1397. ret = snd_soc_dapm_new_controls(dapm, wcd9375_dapm_widgets,
  1398. ARRAY_SIZE(wcd9375_dapm_widgets));
  1399. if (ret < 0) {
  1400. dev_err(codec->dev, "%s: Failed to add snd_ctls\n",
  1401. __func__);
  1402. goto err_hwdep;
  1403. }
  1404. ret = snd_soc_dapm_add_routes(dapm, wcd9375_audio_map,
  1405. ARRAY_SIZE(wcd9375_audio_map));
  1406. if (ret < 0) {
  1407. dev_err(codec->dev, "%s: Failed to add routes\n",
  1408. __func__);
  1409. goto err_hwdep;
  1410. }
  1411. ret = snd_soc_dapm_new_widgets(dapm->card);
  1412. if (ret < 0) {
  1413. dev_err(codec->dev, "%s: Failed to add widgets\n",
  1414. __func__);
  1415. goto err_hwdep;
  1416. }
  1417. }
  1418. return ret;
  1419. err_hwdep:
  1420. wcd937x->fw_data = NULL;
  1421. err:
  1422. return ret;
  1423. }
  1424. static int wcd937x_soc_codec_remove(struct snd_soc_codec *codec)
  1425. {
  1426. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1427. if (!wcd937x)
  1428. return -EINVAL;
  1429. return 0;
  1430. }
  1431. static struct regmap *wcd937x_get_regmap(struct device *dev)
  1432. {
  1433. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  1434. return wcd937x->regmap;
  1435. }
  1436. static struct snd_soc_codec_driver soc_codec_dev_wcd937x = {
  1437. .probe = wcd937x_soc_codec_probe,
  1438. .remove = wcd937x_soc_codec_remove,
  1439. .get_regmap = wcd937x_get_regmap,
  1440. .component_driver = {
  1441. .controls = wcd937x_snd_controls,
  1442. .num_controls = ARRAY_SIZE(wcd937x_snd_controls),
  1443. .dapm_widgets = wcd937x_dapm_widgets,
  1444. .num_dapm_widgets = ARRAY_SIZE(wcd937x_dapm_widgets),
  1445. .dapm_routes = wcd937x_audio_map,
  1446. .num_dapm_routes = ARRAY_SIZE(wcd937x_audio_map),
  1447. },
  1448. };
  1449. int wcd937x_reset(struct device *dev)
  1450. {
  1451. struct wcd937x_priv *wcd937x = NULL;
  1452. int rc = 0;
  1453. int value = 0;
  1454. if (!dev)
  1455. return -ENODEV;
  1456. wcd937x = dev_get_drvdata(dev);
  1457. if (!wcd937x)
  1458. return -EINVAL;
  1459. if (!wcd937x->rst_np) {
  1460. dev_err(dev, "%s: reset gpio device node not specified\n",
  1461. __func__);
  1462. return -EINVAL;
  1463. }
  1464. value = msm_cdc_pinctrl_get_state(wcd937x->rst_np);
  1465. if (value > 0)
  1466. return 0;
  1467. rc = msm_cdc_pinctrl_select_sleep_state(wcd937x->rst_np);
  1468. if (rc) {
  1469. dev_err(dev, "%s: wcd sleep state request fail!\n",
  1470. __func__);
  1471. return rc;
  1472. }
  1473. /* 20ms sleep required after pulling the reset gpio to LOW */
  1474. usleep_range(20, 30);
  1475. rc = msm_cdc_pinctrl_select_active_state(wcd937x->rst_np);
  1476. if (rc) {
  1477. dev_err(dev, "%s: wcd active state request fail!\n",
  1478. __func__);
  1479. return rc;
  1480. }
  1481. /* 20ms sleep required after pulling the reset gpio to HIGH */
  1482. usleep_range(20, 30);
  1483. return rc;
  1484. }
  1485. static int wcd937x_read_of_property_u32(struct device *dev, const char *name,
  1486. u32 *val)
  1487. {
  1488. int rc = 0;
  1489. rc = of_property_read_u32(dev->of_node, name, val);
  1490. if (rc)
  1491. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  1492. __func__, name, dev->of_node->full_name);
  1493. return rc;
  1494. }
  1495. static void wcd937x_dt_parse_micbias_info(struct device *dev,
  1496. struct wcd937x_micbias_setting *mb)
  1497. {
  1498. u32 prop_val = 0;
  1499. int rc = 0;
  1500. /* MB1 */
  1501. if (of_find_property(dev->of_node, "qcom,cdc-micbias1-mv",
  1502. NULL)) {
  1503. rc = wcd937x_read_of_property_u32(dev,
  1504. "qcom,cdc-micbias1-mv",
  1505. &prop_val);
  1506. if (!rc)
  1507. mb->micb1_mv = prop_val;
  1508. } else {
  1509. dev_info(dev, "%s: Micbias1 DT property not found\n",
  1510. __func__);
  1511. }
  1512. /* MB2 */
  1513. if (of_find_property(dev->of_node, "qcom,cdc-micbias2-mv",
  1514. NULL)) {
  1515. rc = wcd937x_read_of_property_u32(dev,
  1516. "qcom,cdc-micbias2-mv",
  1517. &prop_val);
  1518. if (!rc)
  1519. mb->micb2_mv = prop_val;
  1520. } else {
  1521. dev_info(dev, "%s: Micbias2 DT property not found\n",
  1522. __func__);
  1523. }
  1524. /* MB3 */
  1525. if (of_find_property(dev->of_node, "qcom,cdc-micbias3-mv",
  1526. NULL)) {
  1527. rc = wcd937x_read_of_property_u32(dev,
  1528. "qcom,cdc-micbias3-mv",
  1529. &prop_val);
  1530. if (!rc)
  1531. mb->micb3_mv = prop_val;
  1532. } else {
  1533. dev_info(dev, "%s: Micbias3 DT property not found\n",
  1534. __func__);
  1535. }
  1536. }
  1537. struct wcd937x_pdata *wcd937x_populate_dt_data(struct device *dev)
  1538. {
  1539. struct wcd937x_pdata *pdata = NULL;
  1540. pdata = devm_kzalloc(dev, sizeof(struct wcd937x_pdata),
  1541. GFP_KERNEL);
  1542. if (!pdata)
  1543. return NULL;
  1544. pdata->rst_np = of_parse_phandle(dev->of_node,
  1545. "qcom,wcd-rst-gpio-node", 0);
  1546. if (!pdata->rst_np) {
  1547. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  1548. __func__, "qcom,wcd-rst-gpio-node",
  1549. dev->of_node->full_name);
  1550. return NULL;
  1551. }
  1552. /* Parse power supplies */
  1553. msm_cdc_get_power_supplies(dev, &pdata->regulator,
  1554. &pdata->num_supplies);
  1555. if (!pdata->regulator || (pdata->num_supplies <= 0)) {
  1556. dev_err(dev, "%s: no power supplies defined for codec\n",
  1557. __func__);
  1558. return NULL;
  1559. }
  1560. pdata->rx_slave = of_parse_phandle(dev->of_node, "qcom,rx-slave", 0);
  1561. pdata->tx_slave = of_parse_phandle(dev->of_node, "qcom,tx-slave", 0);
  1562. wcd937x_dt_parse_micbias_info(dev, &pdata->micbias);
  1563. return pdata;
  1564. }
  1565. static int wcd937x_bind(struct device *dev)
  1566. {
  1567. int ret = 0, i = 0;
  1568. struct wcd937x_priv *wcd937x = NULL;
  1569. struct wcd937x_pdata *pdata = NULL;
  1570. wcd937x = devm_kzalloc(dev, sizeof(struct wcd937x_priv), GFP_KERNEL);
  1571. if (!wcd937x)
  1572. return -ENOMEM;
  1573. dev_set_drvdata(dev, wcd937x);
  1574. pdata = wcd937x_populate_dt_data(dev);
  1575. if (!pdata) {
  1576. dev_err(dev, "%s: Fail to obtain platform data\n", __func__);
  1577. return -EINVAL;
  1578. }
  1579. wcd937x->dev = dev;
  1580. wcd937x->dev->platform_data = pdata;
  1581. wcd937x->rst_np = pdata->rst_np;
  1582. ret = msm_cdc_init_supplies(dev, &wcd937x->supplies,
  1583. pdata->regulator, pdata->num_supplies);
  1584. if (!wcd937x->supplies) {
  1585. dev_err(dev, "%s: Cannot init wcd supplies\n",
  1586. __func__);
  1587. return ret;
  1588. }
  1589. ret = msm_cdc_enable_static_supplies(dev, wcd937x->supplies,
  1590. pdata->regulator,
  1591. pdata->num_supplies);
  1592. if (ret) {
  1593. dev_err(dev, "%s: wcd static supply enable failed!\n",
  1594. __func__);
  1595. return ret;
  1596. }
  1597. wcd937x_reset(dev);
  1598. /*
  1599. * Add 5msec delay to provide sufficient time for
  1600. * soundwire auto enumeration of slave devices as
  1601. * as per HW requirement.
  1602. */
  1603. usleep_range(5000, 5010);
  1604. ret = component_bind_all(dev, wcd937x);
  1605. if (ret) {
  1606. dev_err(dev, "%s: Slave bind failed, ret = %d\n",
  1607. __func__, ret);
  1608. return ret;
  1609. }
  1610. ret = wcd937x_parse_port_mapping(dev, "qcom,rx_swr_ch_map", CODEC_RX);
  1611. ret |= wcd937x_parse_port_mapping(dev, "qcom,tx_swr_ch_map", CODEC_TX);
  1612. if (ret) {
  1613. dev_err(dev, "Failed to read port mapping\n");
  1614. goto err;
  1615. }
  1616. wcd937x->rx_swr_dev = get_matching_swr_slave_device(pdata->rx_slave);
  1617. if (!wcd937x->rx_swr_dev) {
  1618. dev_err(dev, "%s: Could not find RX swr slave device\n",
  1619. __func__);
  1620. ret = -ENODEV;
  1621. goto err;
  1622. }
  1623. wcd937x->tx_swr_dev = get_matching_swr_slave_device(pdata->tx_slave);
  1624. if (!wcd937x->tx_swr_dev) {
  1625. dev_err(dev, "%s: Could not find TX swr slave device\n",
  1626. __func__);
  1627. ret = -ENODEV;
  1628. goto err;
  1629. }
  1630. wcd937x->regmap = devm_regmap_init_swr(wcd937x->tx_swr_dev,
  1631. &wcd937x_regmap_config);
  1632. if (!wcd937x->regmap) {
  1633. dev_err(dev, "%s: Regmap init failed\n",
  1634. __func__);
  1635. goto err;
  1636. }
  1637. /* Set all interupts as edge triggered */
  1638. for (i = 0; i < wcd937x_regmap_irq_chip.num_regs; i++)
  1639. regmap_write(wcd937x->regmap,
  1640. (WCD937X_DIGITAL_INTR_LEVEL_0 + i), 0);
  1641. wcd937x_regmap_irq_chip.irq_drv_data = wcd937x;
  1642. wcd937x->irq_info.wcd_regmap_irq_chip = &wcd937x_regmap_irq_chip;
  1643. wcd937x->irq_info.codec_name = "WCD937X";
  1644. wcd937x->irq_info.regmap = wcd937x->regmap;
  1645. wcd937x->irq_info.dev = dev;
  1646. ret = wcd_irq_init(&wcd937x->irq_info, &wcd937x->virq);
  1647. if (ret) {
  1648. dev_err(dev, "%s: IRQ init failed: %d\n",
  1649. __func__, ret);
  1650. goto err;
  1651. }
  1652. wcd937x->tx_swr_dev->slave_irq = wcd937x->virq;
  1653. ret = snd_soc_register_codec(dev, &soc_codec_dev_wcd937x,
  1654. NULL, 0);
  1655. if (ret) {
  1656. dev_err(dev, "%s: Codec registration failed\n",
  1657. __func__);
  1658. goto err_irq;
  1659. }
  1660. return ret;
  1661. err_irq:
  1662. wcd_irq_exit(&wcd937x->irq_info, wcd937x->virq);
  1663. err:
  1664. component_unbind_all(dev, wcd937x);
  1665. return ret;
  1666. }
  1667. static void wcd937x_unbind(struct device *dev)
  1668. {
  1669. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  1670. wcd_irq_exit(&wcd937x->irq_info, wcd937x->virq);
  1671. snd_soc_unregister_codec(dev);
  1672. component_unbind_all(dev, wcd937x);
  1673. }
  1674. static const struct of_device_id wcd937x_dt_match[] = {
  1675. { .compatible = "qcom,wcd937x-codec" },
  1676. {}
  1677. };
  1678. static const struct component_master_ops wcd937x_comp_ops = {
  1679. .bind = wcd937x_bind,
  1680. .unbind = wcd937x_unbind,
  1681. };
  1682. static int wcd937x_compare_of(struct device *dev, void *data)
  1683. {
  1684. return dev->of_node == data;
  1685. }
  1686. static void wcd937x_release_of(struct device *dev, void *data)
  1687. {
  1688. of_node_put(data);
  1689. }
  1690. static int wcd937x_add_slave_components(struct device *dev,
  1691. struct component_match **matchptr)
  1692. {
  1693. struct device_node *np, *rx_node, *tx_node;
  1694. np = dev->of_node;
  1695. rx_node = of_parse_phandle(np, "qcom,rx-slave", 0);
  1696. if (!rx_node) {
  1697. dev_err(dev, "%s: Rx-slave node not defined\n", __func__);
  1698. return -ENODEV;
  1699. }
  1700. of_node_get(rx_node);
  1701. component_match_add_release(dev, matchptr,
  1702. wcd937x_release_of,
  1703. wcd937x_compare_of,
  1704. rx_node);
  1705. tx_node = of_parse_phandle(np, "qcom,tx-slave", 0);
  1706. if (!tx_node) {
  1707. dev_err(dev, "%s: Tx-slave node not defined\n", __func__);
  1708. return -ENODEV;
  1709. }
  1710. of_node_get(tx_node);
  1711. component_match_add_release(dev, matchptr,
  1712. wcd937x_release_of,
  1713. wcd937x_compare_of,
  1714. tx_node);
  1715. return 0;
  1716. }
  1717. static int wcd937x_probe(struct platform_device *pdev)
  1718. {
  1719. struct component_match *match = NULL;
  1720. int ret;
  1721. ret = wcd937x_add_slave_components(&pdev->dev, &match);
  1722. if (ret)
  1723. return ret;
  1724. return component_master_add_with_match(&pdev->dev,
  1725. &wcd937x_comp_ops, match);
  1726. }
  1727. static int wcd937x_remove(struct platform_device *pdev)
  1728. {
  1729. component_master_del(&pdev->dev, &wcd937x_comp_ops);
  1730. return 0;
  1731. }
  1732. static struct platform_driver wcd937x_codec_driver = {
  1733. .probe = wcd937x_probe,
  1734. .remove = wcd937x_remove,
  1735. .driver = {
  1736. .name = "wcd937x_codec",
  1737. .owner = THIS_MODULE,
  1738. .of_match_table = of_match_ptr(wcd937x_dt_match),
  1739. },
  1740. };
  1741. module_platform_driver(wcd937x_codec_driver);
  1742. MODULE_DESCRIPTION("WCD937X Codec driver");
  1743. MODULE_LICENSE("GPL v2");