6840c7f5d7
Add soundwire port parameters for receiver mic using 4.8MHZ bus clock. Change-Id: I207f07c99a79e1061dd5902cbba07cae6ca597f3 Signed-off-by: Vignesh Kulothungan <vigneshk@codeaurora.org>
114 wiersze
3.7 KiB
C
114 wiersze
3.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
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*/
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#ifndef _SWR_SLAVE_PORT_CONFIG
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#define _SWR_SLAVE_PORT_CONFIG
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#include <soc/swr-common.h>
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#define WSA_MSTR_PORT_MASK 0xFF
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/*
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* Add port configuration in the format
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*{ si, off1, off2, hstart, hstop, wd_len, bp_mode, bgp_ctrl, lane_ctrl, dir,
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* stream_type}
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*/
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/* DUMMY */
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static struct port_params tx_dummy[SWR_MSTR_PORT_LEN] = {
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{0, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */
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{0, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */
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{0, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX3 */
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};
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/* AMIC 9.6 MHz clock */
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static struct port_params tx_wcd_9p6MHz[SWR_MSTR_PORT_LEN] = {
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{3, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 1, 0x00, 0x00}, /* TX1 */
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{7, 5, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */
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{7, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX3 */
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{7, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX4 */
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};
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/* AMIC 4.8 MHz clock */
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static struct port_params tx_wcd_4p8MHz[SWR_MSTR_PORT_LEN] = {
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{3, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 1, 0x00, 0x00}, /* TX1 */
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{3, 2, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */
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{7, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX3 */
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{3, 2, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX4 */
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};
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/* 4 Channel configuration */
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/* SWR DMIC0 */
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static struct port_params tx_bottom_mic_9p6MHz[SWR_MSTR_PORT_LEN] = {
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{7, 2, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */
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{7, 6, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */
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};
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/* SWR DMIC1 */
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static struct port_params tx_receiver_mic_9p6MHz[SWR_MSTR_PORT_LEN] = {
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{7, 4, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */
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{7, 7, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */
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};
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/* SWR DMIC2 */
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static struct port_params tx_back_mic_9p6MHz[SWR_MSTR_PORT_LEN] = {
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{7, 3, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */
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{7, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */
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};
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/* SWR DMIC3 */
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static struct port_params tx_top_mic_9p6MHz[SWR_MSTR_PORT_LEN] = {
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{7, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */
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{7, 5, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */
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};
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/* 3 Channel configuration */
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/* SWR DMIC0 */
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static struct port_params tx_bottom_mic_4p8MHz[SWR_MSTR_PORT_LEN] = {
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{3, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */
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{3, 3, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */
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};
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/* SWR DMIC1 */
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static struct port_params tx_receiver_mic_4p8MHz[SWR_MSTR_PORT_LEN] = {
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{3, 2, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */
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{3, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */
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};
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/* SWR DMIC2 */
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static struct port_params tx_back_mic_4p8MHz[SWR_MSTR_PORT_LEN] = {
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{3, 2, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */
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{3, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */
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};
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/* SWR DMIC3 */
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static struct port_params tx_top_mic_4p8MHz[SWR_MSTR_PORT_LEN] = {
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{3, 3, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */
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{3, 2, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */
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};
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struct swr_dev_frame_config {
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struct port_params *pp;
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};
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static struct swr_dev_frame_config swrdev_frame_params_9p6MHz[] = {
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{tx_dummy},
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{tx_wcd_9p6MHz},
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{tx_top_mic_9p6MHz},
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{tx_back_mic_9p6MHz},
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{tx_receiver_mic_9p6MHz},
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{tx_bottom_mic_9p6MHz},
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};
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static struct swr_dev_frame_config swrdev_frame_params_4p8MHz[] = {
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{tx_dummy},
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{tx_wcd_4p8MHz},
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{tx_top_mic_4p8MHz},
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{tx_back_mic_4p8MHz},
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{tx_receiver_mic_4p8MHz},
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{tx_bottom_mic_4p8MHz},
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};
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#endif /* _LAHAINA_PORT_CONFIG */
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