wcd937x.c 96 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/module.h>
  6. #include <linux/slab.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/device.h>
  9. #include <linux/delay.h>
  10. #include <linux/kernel.h>
  11. #include <linux/component.h>
  12. #include <linux/regmap.h>
  13. #include <linux/pm_runtime.h>
  14. #include <sound/soc.h>
  15. #include <sound/tlv.h>
  16. #include <soc/soundwire.h>
  17. #include <sound/soc.h>
  18. #include <sound/soc-dapm.h>
  19. #include <asoc/wcdcal-hwdep.h>
  20. #include <asoc/msm-cdc-pinctrl.h>
  21. #include <dt-bindings/sound/audio-codec-port-types.h>
  22. #include <asoc/msm-cdc-supply.h>
  23. #include "wcd937x-registers.h"
  24. #include "wcd937x.h"
  25. #include "internal.h"
  26. #define WCD9370_VARIANT 0
  27. #define WCD9375_VARIANT 5
  28. #define WCD937X_VARIANT_ENTRY_SIZE 32
  29. #define NUM_SWRS_DT_PARAMS 5
  30. #define WCD937X_VERSION_1_0 1
  31. #define WCD937X_VERSION_ENTRY_SIZE 32
  32. #define EAR_RX_PATH_AUX 1
  33. #define NUM_ATTEMPTS 5
  34. #define WCD937X_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
  35. SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
  36. SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000 |\
  37. SNDRV_PCM_RATE_384000)
  38. /* Fractional Rates */
  39. #define WCD937X_FRAC_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_88200 |\
  40. SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_352800)
  41. #define WCD937X_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
  42. SNDRV_PCM_FMTBIT_S24_LE |\
  43. SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE)
  44. enum {
  45. CODEC_TX = 0,
  46. CODEC_RX,
  47. };
  48. enum {
  49. ALLOW_BUCK_DISABLE,
  50. HPH_COMP_DELAY,
  51. HPH_PA_DELAY,
  52. AMIC2_BCS_ENABLE,
  53. };
  54. static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
  55. static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
  56. static int wcd937x_handle_post_irq(void *data);
  57. static int wcd937x_reset(struct device *dev);
  58. static int wcd937x_reset_low(struct device *dev);
  59. static const struct regmap_irq wcd937x_irqs[WCD937X_NUM_IRQS] = {
  60. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_BUTTON_PRESS_DET, 0, 0x01),
  61. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_BUTTON_RELEASE_DET, 0, 0x02),
  62. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_ELECT_INS_REM_DET, 0, 0x04),
  63. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_ELECT_INS_REM_LEG_DET, 0, 0x08),
  64. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_SW_DET, 0, 0x10),
  65. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_OCP_INT, 0, 0x20),
  66. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_CNP_INT, 0, 0x40),
  67. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_OCP_INT, 0, 0x80),
  68. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_CNP_INT, 1, 0x01),
  69. REGMAP_IRQ_REG(WCD937X_IRQ_EAR_CNP_INT, 1, 0x02),
  70. REGMAP_IRQ_REG(WCD937X_IRQ_EAR_SCD_INT, 1, 0x04),
  71. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_CNP_INT, 1, 0x08),
  72. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_SCD_INT, 1, 0x10),
  73. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_PDM_WD_INT, 1, 0x20),
  74. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_PDM_WD_INT, 1, 0x40),
  75. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_PDM_WD_INT, 1, 0x80),
  76. REGMAP_IRQ_REG(WCD937X_IRQ_LDORT_SCD_INT, 2, 0x01),
  77. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_MOISTURE_INT, 2, 0x02),
  78. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_SURGE_DET_INT, 2, 0x04),
  79. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_SURGE_DET_INT, 2, 0x08),
  80. };
  81. static struct regmap_irq_chip wcd937x_regmap_irq_chip = {
  82. .name = "wcd937x",
  83. .irqs = wcd937x_irqs,
  84. .num_irqs = ARRAY_SIZE(wcd937x_irqs),
  85. .num_regs = 3,
  86. .status_base = WCD937X_DIGITAL_INTR_STATUS_0,
  87. .mask_base = WCD937X_DIGITAL_INTR_MASK_0,
  88. .ack_base = WCD937X_DIGITAL_INTR_CLEAR_0,
  89. .use_ack = 1,
  90. #if IS_ENABLED(CONFIG_AUDIO_QGKI)
  91. .clear_ack = 1,
  92. #endif
  93. .type_base = WCD937X_DIGITAL_INTR_LEVEL_0,
  94. .runtime_pm = false,
  95. .handle_post_irq = wcd937x_handle_post_irq,
  96. .irq_drv_data = NULL,
  97. };
  98. static struct snd_soc_dai_driver wcd937x_dai[] = {
  99. {
  100. .name = "wcd937x_cdc",
  101. .playback = {
  102. .stream_name = "WCD937X_AIF Playback",
  103. .rates = WCD937X_RATES | WCD937X_FRAC_RATES,
  104. .formats = WCD937X_FORMATS,
  105. .rate_max = 384000,
  106. .rate_min = 8000,
  107. .channels_min = 1,
  108. .channels_max = 4,
  109. },
  110. .capture = {
  111. .stream_name = "WCD937X_AIF Capture",
  112. .rates = WCD937X_RATES,
  113. .formats = WCD937X_FORMATS,
  114. .rate_max = 192000,
  115. .rate_min = 8000,
  116. .channels_min = 1,
  117. .channels_max = 4,
  118. },
  119. },
  120. };
  121. static int wcd937x_handle_post_irq(void *data)
  122. {
  123. struct wcd937x_priv *wcd937x = data;
  124. u32 status1 = 0, status2 = 0, status3 = 0;
  125. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_0, &status1);
  126. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_1, &status2);
  127. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_2, &status3);
  128. wcd937x->tx_swr_dev->slave_irq_pending =
  129. ((status1 || status2 || status3) ? true : false);
  130. return IRQ_HANDLED;
  131. }
  132. static int wcd937x_init_reg(struct snd_soc_component *component)
  133. {
  134. snd_soc_component_update_bits(component, WCD937X_SLEEP_CTL,
  135. 0x0E, 0x0E);
  136. snd_soc_component_update_bits(component, WCD937X_SLEEP_CTL,
  137. 0x80, 0x80);
  138. usleep_range(1000, 1010);
  139. snd_soc_component_update_bits(component, WCD937X_SLEEP_CTL,
  140. 0x40, 0x40);
  141. usleep_range(1000, 1010);
  142. snd_soc_component_update_bits(component, WCD937X_LDORXTX_CONFIG,
  143. 0x10, 0x00);
  144. snd_soc_component_update_bits(component, WCD937X_BIAS_VBG_FINE_ADJ,
  145. 0xF0, 0x80);
  146. snd_soc_component_update_bits(component, WCD937X_ANA_BIAS,
  147. 0x80, 0x80);
  148. snd_soc_component_update_bits(component, WCD937X_ANA_BIAS,
  149. 0x40, 0x40);
  150. usleep_range(10000, 10010);
  151. snd_soc_component_update_bits(component, WCD937X_ANA_BIAS,
  152. 0x40, 0x00);
  153. snd_soc_component_update_bits(component,
  154. WCD937X_HPH_SURGE_HPHLR_SURGE_EN,
  155. 0xFF, 0xD9);
  156. snd_soc_component_update_bits(component, WCD937X_MICB1_TEST_CTL_1,
  157. 0xFF, 0xFA);
  158. snd_soc_component_update_bits(component, WCD937X_MICB2_TEST_CTL_1,
  159. 0xFF, 0xFA);
  160. snd_soc_component_update_bits(component, WCD937X_MICB3_TEST_CTL_1,
  161. 0xFF, 0xFA);
  162. return 0;
  163. }
  164. static int wcd937x_set_port_params(struct snd_soc_component *component,
  165. u8 slv_prt_type, u8 *port_id, u8 *num_ch,
  166. u8 *ch_mask, u32 *ch_rate,
  167. u8 *port_type, u8 path)
  168. {
  169. int i, j;
  170. u8 num_ports = 0;
  171. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  172. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  173. switch (path) {
  174. case CODEC_RX:
  175. map = &wcd937x->rx_port_mapping;
  176. num_ports = wcd937x->num_rx_ports;
  177. break;
  178. case CODEC_TX:
  179. map = &wcd937x->tx_port_mapping;
  180. num_ports = wcd937x->num_tx_ports;
  181. break;
  182. default:
  183. dev_err(component->dev, "%s Invalid path selected %u\n",
  184. __func__, path);
  185. return -EINVAL;
  186. }
  187. for (i = 0; i <= num_ports; i++) {
  188. for (j = 0; j < MAX_CH_PER_PORT; j++) {
  189. if ((*map)[i][j].slave_port_type == slv_prt_type)
  190. goto found;
  191. }
  192. }
  193. found:
  194. if (i > num_ports || j == MAX_CH_PER_PORT) {
  195. dev_err(component->dev, "%s Failed to find slave port for type %u\n",
  196. __func__, slv_prt_type);
  197. return -EINVAL;
  198. }
  199. *port_id = i;
  200. *num_ch = (*map)[i][j].num_ch;
  201. *ch_mask = (*map)[i][j].ch_mask;
  202. *ch_rate = (*map)[i][j].ch_rate;
  203. *port_type = (*map)[i][j].master_port_type;
  204. return 0;
  205. }
  206. static int wcd937x_parse_port_mapping(struct device *dev,
  207. char *prop, u8 path)
  208. {
  209. u32 *dt_array, map_size, map_length;
  210. u32 port_num = 0, ch_mask, ch_rate, old_port_num = 0;
  211. u32 slave_port_type, master_port_type;
  212. u32 i, ch_iter = 0;
  213. int ret = 0;
  214. u8 *num_ports = NULL;
  215. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  216. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  217. switch (path) {
  218. case CODEC_RX:
  219. map = &wcd937x->rx_port_mapping;
  220. num_ports = &wcd937x->num_rx_ports;
  221. break;
  222. case CODEC_TX:
  223. map = &wcd937x->tx_port_mapping;
  224. num_ports = &wcd937x->num_tx_ports;
  225. break;
  226. default:
  227. dev_err(dev, "%s Invalid path selected %u\n",
  228. __func__, path);
  229. return -EINVAL;
  230. }
  231. if (!of_find_property(dev->of_node, prop,
  232. &map_size)) {
  233. dev_err(dev, "missing port mapping prop %s\n", prop);
  234. ret = -EINVAL;
  235. goto err;
  236. }
  237. map_length = map_size / (NUM_SWRS_DT_PARAMS * sizeof(u32));
  238. dt_array = kzalloc(map_size, GFP_KERNEL);
  239. if (!dt_array) {
  240. ret = -ENOMEM;
  241. goto err;
  242. }
  243. ret = of_property_read_u32_array(dev->of_node, prop, dt_array,
  244. NUM_SWRS_DT_PARAMS * map_length);
  245. if (ret) {
  246. dev_err(dev, "%s: Failed to read port mapping from prop %s\n",
  247. __func__, prop);
  248. ret = -EINVAL;
  249. goto err_pdata_fail;
  250. }
  251. for (i = 0; i < map_length; i++) {
  252. port_num = dt_array[NUM_SWRS_DT_PARAMS * i];
  253. slave_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 1];
  254. ch_mask = dt_array[NUM_SWRS_DT_PARAMS * i + 2];
  255. ch_rate = dt_array[NUM_SWRS_DT_PARAMS * i + 3];
  256. master_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 4];
  257. if (port_num != old_port_num)
  258. ch_iter = 0;
  259. (*map)[port_num][ch_iter].slave_port_type = slave_port_type;
  260. (*map)[port_num][ch_iter].ch_mask = ch_mask;
  261. (*map)[port_num][ch_iter].master_port_type = master_port_type;
  262. (*map)[port_num][ch_iter].num_ch = __sw_hweight8(ch_mask);
  263. (*map)[port_num][ch_iter++].ch_rate = ch_rate;
  264. old_port_num = port_num;
  265. }
  266. *num_ports = port_num;
  267. kfree(dt_array);
  268. return 0;
  269. err_pdata_fail:
  270. kfree(dt_array);
  271. err:
  272. return ret;
  273. }
  274. static int wcd937x_tx_connect_port(struct snd_soc_component *component,
  275. u8 slv_port_type, u8 enable)
  276. {
  277. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  278. u8 port_id;
  279. u8 num_ch;
  280. u8 ch_mask;
  281. u32 ch_rate;
  282. u8 ch_type = 0;
  283. int slave_ch_idx;
  284. u8 num_port = 1;
  285. int ret = 0;
  286. ret = wcd937x_set_port_params(component, slv_port_type, &port_id,
  287. &num_ch, &ch_mask, &ch_rate,
  288. &ch_type, CODEC_TX);
  289. if (ret)
  290. return ret;
  291. slave_ch_idx = wcd937x_slave_get_slave_ch_val(slv_port_type);
  292. if (slave_ch_idx != -EINVAL)
  293. ch_type = wcd937x->tx_master_ch_map[slave_ch_idx];
  294. dev_dbg(component->dev, "%s slv_ch_idx: %d, mstr_ch_type: %d\n",
  295. __func__, slave_ch_idx, ch_type);
  296. if (enable)
  297. ret = swr_connect_port(wcd937x->tx_swr_dev, &port_id,
  298. num_port, &ch_mask, &ch_rate,
  299. &num_ch, &ch_type);
  300. else
  301. ret = swr_disconnect_port(wcd937x->tx_swr_dev, &port_id,
  302. num_port, &ch_mask, &ch_type);
  303. return ret;
  304. }
  305. static int wcd937x_rx_connect_port(struct snd_soc_component *component,
  306. u8 slv_port_type, u8 enable)
  307. {
  308. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  309. u8 port_id;
  310. u8 num_ch;
  311. u8 ch_mask;
  312. u32 ch_rate;
  313. u8 port_type;
  314. u8 num_port = 1;
  315. int ret = 0;
  316. ret = wcd937x_set_port_params(component, slv_port_type, &port_id,
  317. &num_ch, &ch_mask, &ch_rate,
  318. &port_type, CODEC_RX);
  319. if (ret)
  320. return ret;
  321. if (enable)
  322. ret = swr_connect_port(wcd937x->rx_swr_dev, &port_id,
  323. num_port, &ch_mask, &ch_rate,
  324. &num_ch, &port_type);
  325. else
  326. ret = swr_disconnect_port(wcd937x->rx_swr_dev, &port_id,
  327. num_port, &ch_mask, &port_type);
  328. return ret;
  329. }
  330. static int wcd937x_rx_clk_enable(struct snd_soc_component *component)
  331. {
  332. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  333. if (wcd937x->rx_clk_cnt == 0) {
  334. snd_soc_component_update_bits(component,
  335. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x08, 0x08);
  336. snd_soc_component_update_bits(component,
  337. WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x01, 0x01);
  338. snd_soc_component_update_bits(component,
  339. WCD937X_ANA_RX_SUPPLIES, 0x01, 0x01);
  340. snd_soc_component_update_bits(component,
  341. WCD937X_DIGITAL_CDC_RX0_CTL, 0x40, 0x00);
  342. snd_soc_component_update_bits(component,
  343. WCD937X_DIGITAL_CDC_RX1_CTL, 0x40, 0x00);
  344. snd_soc_component_update_bits(component,
  345. WCD937X_DIGITAL_CDC_RX2_CTL, 0x40, 0x00);
  346. snd_soc_component_update_bits(component,
  347. WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x02, 0x02);
  348. }
  349. wcd937x->rx_clk_cnt++;
  350. return 0;
  351. }
  352. static int wcd937x_rx_clk_disable(struct snd_soc_component *component)
  353. {
  354. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  355. if (wcd937x->rx_clk_cnt == 0) {
  356. dev_dbg(wcd937x->dev, "%s:clk already disabled\n", __func__);
  357. return 0;
  358. }
  359. wcd937x->rx_clk_cnt--;
  360. if (wcd937x->rx_clk_cnt == 0) {
  361. snd_soc_component_update_bits(component,
  362. WCD937X_ANA_RX_SUPPLIES, 0x01, 0x00);
  363. snd_soc_component_update_bits(component,
  364. WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  365. 0x02, 0x00);
  366. snd_soc_component_update_bits(component,
  367. WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  368. 0x01, 0x00);
  369. }
  370. return 0;
  371. }
  372. /*
  373. * wcd937x_soc_get_mbhc: get wcd937x_mbhc handle of corresponding component
  374. * @component: handle to snd_soc_component *
  375. *
  376. * return wcd937x_mbhc handle or error code in case of failure
  377. */
  378. struct wcd937x_mbhc *wcd937x_soc_get_mbhc(struct snd_soc_component *component)
  379. {
  380. struct wcd937x_priv *wcd937x;
  381. if (!component) {
  382. pr_err("%s: Invalid params, NULL component\n", __func__);
  383. return NULL;
  384. }
  385. wcd937x = snd_soc_component_get_drvdata(component);
  386. if (!wcd937x) {
  387. pr_err("%s: Invalid params, NULL tavil\n", __func__);
  388. return NULL;
  389. }
  390. return wcd937x->mbhc;
  391. }
  392. EXPORT_SYMBOL(wcd937x_soc_get_mbhc);
  393. static int wcd937x_codec_hphl_dac_event(struct snd_soc_dapm_widget *w,
  394. struct snd_kcontrol *kcontrol,
  395. int event)
  396. {
  397. struct snd_soc_component *component =
  398. snd_soc_dapm_to_component(w->dapm);
  399. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  400. int hph_mode = wcd937x->hph_mode;
  401. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  402. w->name, event);
  403. switch (event) {
  404. case SND_SOC_DAPM_PRE_PMU:
  405. wcd937x_rx_clk_enable(component);
  406. snd_soc_component_update_bits(component,
  407. WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  408. 0x01, 0x01);
  409. snd_soc_component_update_bits(component,
  410. WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  411. 0x04, 0x04);
  412. snd_soc_component_update_bits(component,
  413. WCD937X_HPH_RDAC_CLK_CTL1,
  414. 0x80, 0x00);
  415. set_bit(HPH_COMP_DELAY, &wcd937x->status_mask);
  416. break;
  417. case SND_SOC_DAPM_POST_PMU:
  418. if (hph_mode == CLS_AB_HIFI || hph_mode == CLS_H_HIFI)
  419. snd_soc_component_update_bits(component,
  420. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  421. 0x0F, 0x02);
  422. else if (hph_mode == CLS_H_LOHIFI)
  423. snd_soc_component_update_bits(component,
  424. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  425. 0x0F, 0x06);
  426. if (wcd937x->comp1_enable) {
  427. snd_soc_component_update_bits(component,
  428. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  429. 0x02, 0x02);
  430. snd_soc_component_update_bits(component,
  431. WCD937X_HPH_L_EN, 0x20, 0x00);
  432. if (wcd937x->comp2_enable) {
  433. snd_soc_component_update_bits(component,
  434. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  435. 0x01, 0x01);
  436. snd_soc_component_update_bits(component,
  437. WCD937X_HPH_R_EN, 0x20, 0x00);
  438. }
  439. /*
  440. * 5ms sleep is required after COMP is enabled as per
  441. * HW requirement
  442. */
  443. if (test_bit(HPH_COMP_DELAY, &wcd937x->status_mask)) {
  444. usleep_range(5000, 5100);
  445. clear_bit(HPH_COMP_DELAY,
  446. &wcd937x->status_mask);
  447. }
  448. } else {
  449. snd_soc_component_update_bits(component,
  450. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  451. 0x02, 0x00);
  452. snd_soc_component_update_bits(component,
  453. WCD937X_HPH_L_EN, 0x20, 0x20);
  454. }
  455. snd_soc_component_update_bits(component,
  456. WCD937X_HPH_NEW_INT_HPH_TIMER1, 0x02, 0x00);
  457. break;
  458. case SND_SOC_DAPM_POST_PMD:
  459. snd_soc_component_update_bits(component,
  460. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  461. 0x0F, 0x01);
  462. break;
  463. }
  464. return 0;
  465. }
  466. static int wcd937x_codec_hphr_dac_event(struct snd_soc_dapm_widget *w,
  467. struct snd_kcontrol *kcontrol,
  468. int event)
  469. {
  470. struct snd_soc_component *component =
  471. snd_soc_dapm_to_component(w->dapm);
  472. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  473. int hph_mode = wcd937x->hph_mode;
  474. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  475. w->name, event);
  476. switch (event) {
  477. case SND_SOC_DAPM_PRE_PMU:
  478. wcd937x_rx_clk_enable(component);
  479. snd_soc_component_update_bits(component,
  480. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x02, 0x02);
  481. snd_soc_component_update_bits(component,
  482. WCD937X_DIGITAL_CDC_HPH_GAIN_CTL, 0x08, 0x08);
  483. snd_soc_component_update_bits(component,
  484. WCD937X_HPH_RDAC_CLK_CTL1, 0x80, 0x00);
  485. set_bit(HPH_COMP_DELAY, &wcd937x->status_mask);
  486. break;
  487. case SND_SOC_DAPM_POST_PMU:
  488. if (hph_mode == CLS_AB_HIFI || hph_mode == CLS_H_HIFI)
  489. snd_soc_component_update_bits(component,
  490. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_R,
  491. 0x0F, 0x02);
  492. else if (hph_mode == CLS_H_LOHIFI)
  493. snd_soc_component_update_bits(component,
  494. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_R,
  495. 0x0F, 0x06);
  496. if (wcd937x->comp2_enable) {
  497. snd_soc_component_update_bits(component,
  498. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  499. 0x01, 0x01);
  500. snd_soc_component_update_bits(component,
  501. WCD937X_HPH_R_EN, 0x20, 0x00);
  502. if (wcd937x->comp1_enable) {
  503. snd_soc_component_update_bits(component,
  504. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  505. 0x02, 0x02);
  506. snd_soc_component_update_bits(component,
  507. WCD937X_HPH_L_EN, 0x20, 0x00);
  508. }
  509. /*
  510. * 5ms sleep is required after COMP is enabled as per
  511. * HW requirement
  512. */
  513. if (test_bit(HPH_COMP_DELAY, &wcd937x->status_mask)) {
  514. usleep_range(5000, 5100);
  515. clear_bit(HPH_COMP_DELAY,
  516. &wcd937x->status_mask);
  517. }
  518. } else {
  519. snd_soc_component_update_bits(component,
  520. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  521. 0x01, 0x00);
  522. snd_soc_component_update_bits(component,
  523. WCD937X_HPH_R_EN, 0x20, 0x20);
  524. }
  525. snd_soc_component_update_bits(component,
  526. WCD937X_HPH_NEW_INT_HPH_TIMER1, 0x02, 0x00);
  527. break;
  528. case SND_SOC_DAPM_POST_PMD:
  529. snd_soc_component_update_bits(component,
  530. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_R,
  531. 0x0F, 0x01);
  532. break;
  533. }
  534. return 0;
  535. }
  536. static int wcd937x_codec_ear_dac_event(struct snd_soc_dapm_widget *w,
  537. struct snd_kcontrol *kcontrol,
  538. int event)
  539. {
  540. struct snd_soc_component *component =
  541. snd_soc_dapm_to_component(w->dapm);
  542. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  543. int hph_mode = wcd937x->hph_mode;
  544. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  545. w->name, event);
  546. switch (event) {
  547. case SND_SOC_DAPM_PRE_PMU:
  548. wcd937x_rx_clk_enable(component);
  549. snd_soc_component_update_bits(component,
  550. WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  551. 0x04, 0x04);
  552. snd_soc_component_update_bits(component,
  553. WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  554. 0x01, 0x01);
  555. if (hph_mode == CLS_AB_HIFI || hph_mode == CLS_H_HIFI)
  556. snd_soc_component_update_bits(component,
  557. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  558. 0x0F, 0x02);
  559. else if (hph_mode == CLS_H_LOHIFI)
  560. snd_soc_component_update_bits(component,
  561. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  562. 0x0F, 0x06);
  563. if (wcd937x->comp1_enable)
  564. snd_soc_component_update_bits(component,
  565. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  566. 0x02, 0x02);
  567. usleep_range(5000, 5010);
  568. snd_soc_component_update_bits(component, WCD937X_FLYBACK_EN,
  569. 0x04, 0x00);
  570. wcd_cls_h_fsm(component, &wcd937x->clsh_info,
  571. WCD_CLSH_EVENT_PRE_DAC,
  572. WCD_CLSH_STATE_EAR,
  573. hph_mode);
  574. break;
  575. case SND_SOC_DAPM_POST_PMD:
  576. if (hph_mode == CLS_AB_HIFI || hph_mode == CLS_H_LOHIFI ||
  577. hph_mode == CLS_H_HIFI)
  578. snd_soc_component_update_bits(component,
  579. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  580. 0x0F, 0x01);
  581. if (wcd937x->comp1_enable)
  582. snd_soc_component_update_bits(component,
  583. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  584. 0x02, 0x00);
  585. break;
  586. };
  587. return 0;
  588. }
  589. static int wcd937x_codec_aux_dac_event(struct snd_soc_dapm_widget *w,
  590. struct snd_kcontrol *kcontrol,
  591. int event)
  592. {
  593. struct snd_soc_component *component =
  594. snd_soc_dapm_to_component(w->dapm);
  595. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  596. int hph_mode = wcd937x->hph_mode;
  597. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  598. w->name, event);
  599. switch (event) {
  600. case SND_SOC_DAPM_PRE_PMU:
  601. wcd937x_rx_clk_enable(component);
  602. snd_soc_component_update_bits(component,
  603. WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  604. 0x04, 0x04);
  605. snd_soc_component_update_bits(component,
  606. WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  607. 0x04, 0x04);
  608. snd_soc_component_update_bits(component,
  609. WCD937X_DIGITAL_CDC_AUX_GAIN_CTL,
  610. 0x01, 0x01);
  611. wcd_cls_h_fsm(component, &wcd937x->clsh_info,
  612. WCD_CLSH_EVENT_PRE_DAC,
  613. WCD_CLSH_STATE_AUX,
  614. hph_mode);
  615. break;
  616. case SND_SOC_DAPM_POST_PMD:
  617. snd_soc_component_update_bits(component,
  618. WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  619. 0x04, 0x00);
  620. break;
  621. };
  622. return 0;
  623. }
  624. static int wcd937x_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
  625. struct snd_kcontrol *kcontrol,
  626. int event)
  627. {
  628. struct snd_soc_component *component =
  629. snd_soc_dapm_to_component(w->dapm);
  630. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  631. int ret = 0;
  632. int hph_mode = wcd937x->hph_mode;
  633. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  634. w->name, event);
  635. switch (event) {
  636. case SND_SOC_DAPM_PRE_PMU:
  637. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  638. wcd937x->rx_swr_dev->dev_num,
  639. true);
  640. wcd_cls_h_fsm(component, &wcd937x->clsh_info,
  641. WCD_CLSH_EVENT_PRE_DAC,
  642. WCD_CLSH_STATE_HPHR,
  643. hph_mode);
  644. snd_soc_component_update_bits(component, WCD937X_ANA_HPH,
  645. 0x10, 0x10);
  646. usleep_range(100, 110);
  647. set_bit(HPH_PA_DELAY, &wcd937x->status_mask);
  648. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  649. wcd937x->rx_swr_dev->dev_num,
  650. true);
  651. snd_soc_component_update_bits(component,
  652. WCD937X_DIGITAL_PDM_WD_CTL1, 0x17, 0x13);
  653. break;
  654. case SND_SOC_DAPM_POST_PMU:
  655. /*
  656. * 7ms sleep is required after PA is enabled as per
  657. * HW requirement. If compander is disabled, then
  658. * 20ms delay is required.
  659. */
  660. if (test_bit(HPH_PA_DELAY, &wcd937x->status_mask)) {
  661. if (!wcd937x->comp2_enable)
  662. usleep_range(20000, 20100);
  663. else
  664. usleep_range(7000, 7100);
  665. clear_bit(HPH_PA_DELAY, &wcd937x->status_mask);
  666. }
  667. snd_soc_component_update_bits(component,
  668. WCD937X_HPH_NEW_INT_HPH_TIMER1,
  669. 0x02, 0x02);
  670. if (hph_mode == CLS_AB || hph_mode == CLS_AB_HIFI)
  671. snd_soc_component_update_bits(component,
  672. WCD937X_ANA_RX_SUPPLIES,
  673. 0x02, 0x02);
  674. if (wcd937x->update_wcd_event)
  675. wcd937x->update_wcd_event(wcd937x->handle,
  676. WCD_BOLERO_EVT_RX_MUTE,
  677. (WCD_RX2 << 0x10));
  678. wcd_enable_irq(&wcd937x->irq_info,
  679. WCD937X_IRQ_HPHR_PDM_WD_INT);
  680. break;
  681. case SND_SOC_DAPM_PRE_PMD:
  682. wcd_disable_irq(&wcd937x->irq_info,
  683. WCD937X_IRQ_HPHR_PDM_WD_INT);
  684. if (wcd937x->update_wcd_event)
  685. wcd937x->update_wcd_event(wcd937x->handle,
  686. WCD_BOLERO_EVT_RX_MUTE,
  687. (WCD_RX2 << 0x10 | 0x1));
  688. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  689. WCD_EVENT_PRE_HPHR_PA_OFF,
  690. &wcd937x->mbhc->wcd_mbhc);
  691. set_bit(HPH_PA_DELAY, &wcd937x->status_mask);
  692. break;
  693. case SND_SOC_DAPM_POST_PMD:
  694. /*
  695. * 7ms sleep is required after PA is disabled as per
  696. * HW requirement. If compander is disabled, then
  697. * 20ms delay is required.
  698. */
  699. if (test_bit(HPH_PA_DELAY, &wcd937x->status_mask)) {
  700. if (!wcd937x->comp2_enable)
  701. usleep_range(20000, 20100);
  702. else
  703. usleep_range(7000, 7100);
  704. clear_bit(HPH_PA_DELAY, &wcd937x->status_mask);
  705. }
  706. snd_soc_component_update_bits(component,
  707. WCD937X_DIGITAL_PDM_WD_CTL1, 0x17, 0x00);
  708. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  709. WCD_EVENT_POST_HPHR_PA_OFF,
  710. &wcd937x->mbhc->wcd_mbhc);
  711. snd_soc_component_update_bits(component, WCD937X_ANA_HPH,
  712. 0x10, 0x00);
  713. wcd_cls_h_fsm(component, &wcd937x->clsh_info,
  714. WCD_CLSH_EVENT_POST_PA,
  715. WCD_CLSH_STATE_HPHR,
  716. hph_mode);
  717. break;
  718. };
  719. return ret;
  720. }
  721. static int wcd937x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
  722. struct snd_kcontrol *kcontrol,
  723. int event)
  724. {
  725. struct snd_soc_component *component =
  726. snd_soc_dapm_to_component(w->dapm);
  727. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  728. int ret = 0;
  729. int hph_mode = wcd937x->hph_mode;
  730. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  731. w->name, event);
  732. switch (event) {
  733. case SND_SOC_DAPM_PRE_PMU:
  734. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  735. wcd937x->rx_swr_dev->dev_num,
  736. true);
  737. wcd_cls_h_fsm(component, &wcd937x->clsh_info,
  738. WCD_CLSH_EVENT_PRE_DAC,
  739. WCD_CLSH_STATE_HPHL,
  740. hph_mode);
  741. snd_soc_component_update_bits(component, WCD937X_ANA_HPH,
  742. 0x20, 0x20);
  743. usleep_range(100, 110);
  744. set_bit(HPH_PA_DELAY, &wcd937x->status_mask);
  745. snd_soc_component_update_bits(component,
  746. WCD937X_DIGITAL_PDM_WD_CTL0, 0x17, 0x13);
  747. break;
  748. case SND_SOC_DAPM_POST_PMU:
  749. /*
  750. * 7ms sleep is required after PA is enabled as per
  751. * HW requirement. If compander is disabled, then
  752. * 20ms delay is required.
  753. */
  754. if (test_bit(HPH_PA_DELAY, &wcd937x->status_mask)) {
  755. if (!wcd937x->comp1_enable)
  756. usleep_range(20000, 20100);
  757. else
  758. usleep_range(7000, 7100);
  759. clear_bit(HPH_PA_DELAY, &wcd937x->status_mask);
  760. }
  761. snd_soc_component_update_bits(component,
  762. WCD937X_HPH_NEW_INT_HPH_TIMER1,
  763. 0x02, 0x02);
  764. if (hph_mode == CLS_AB || hph_mode == CLS_AB_HIFI)
  765. snd_soc_component_update_bits(component,
  766. WCD937X_ANA_RX_SUPPLIES,
  767. 0x02, 0x02);
  768. if (wcd937x->update_wcd_event)
  769. wcd937x->update_wcd_event(wcd937x->handle,
  770. WCD_BOLERO_EVT_RX_MUTE,
  771. (WCD_RX1 << 0x10));
  772. wcd_enable_irq(&wcd937x->irq_info,
  773. WCD937X_IRQ_HPHL_PDM_WD_INT);
  774. break;
  775. case SND_SOC_DAPM_PRE_PMD:
  776. wcd_disable_irq(&wcd937x->irq_info,
  777. WCD937X_IRQ_HPHL_PDM_WD_INT);
  778. if (wcd937x->update_wcd_event)
  779. wcd937x->update_wcd_event(wcd937x->handle,
  780. WCD_BOLERO_EVT_RX_MUTE,
  781. (WCD_RX1 << 0x10 | 0x1));
  782. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  783. WCD_EVENT_PRE_HPHL_PA_OFF,
  784. &wcd937x->mbhc->wcd_mbhc);
  785. set_bit(HPH_PA_DELAY, &wcd937x->status_mask);
  786. break;
  787. case SND_SOC_DAPM_POST_PMD:
  788. /*
  789. * 7ms sleep is required after PA is disabled as per
  790. * HW requirement. If compander is disabled, then
  791. * 20ms delay is required.
  792. */
  793. if (test_bit(HPH_PA_DELAY, &wcd937x->status_mask)) {
  794. if (!wcd937x->comp1_enable)
  795. usleep_range(20000, 20100);
  796. else
  797. usleep_range(7000, 7100);
  798. clear_bit(HPH_PA_DELAY, &wcd937x->status_mask);
  799. }
  800. snd_soc_component_update_bits(component,
  801. WCD937X_DIGITAL_PDM_WD_CTL0, 0x17, 0x00);
  802. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  803. WCD_EVENT_POST_HPHL_PA_OFF,
  804. &wcd937x->mbhc->wcd_mbhc);
  805. snd_soc_component_update_bits(component, WCD937X_ANA_HPH,
  806. 0x20, 0x00);
  807. wcd_cls_h_fsm(component, &wcd937x->clsh_info,
  808. WCD_CLSH_EVENT_POST_PA,
  809. WCD_CLSH_STATE_HPHL,
  810. hph_mode);
  811. break;
  812. };
  813. return ret;
  814. }
  815. static int wcd937x_codec_enable_aux_pa(struct snd_soc_dapm_widget *w,
  816. struct snd_kcontrol *kcontrol,
  817. int event)
  818. {
  819. struct snd_soc_component *component =
  820. snd_soc_dapm_to_component(w->dapm);
  821. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  822. int hph_mode = wcd937x->hph_mode;
  823. int ret = 0;
  824. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  825. w->name, event);
  826. switch (event) {
  827. case SND_SOC_DAPM_PRE_PMU:
  828. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  829. wcd937x->rx_swr_dev->dev_num,
  830. true);
  831. snd_soc_component_update_bits(component,
  832. WCD937X_DIGITAL_PDM_WD_CTL2, 0x05, 0x05);
  833. break;
  834. case SND_SOC_DAPM_POST_PMU:
  835. usleep_range(1000, 1010);
  836. if (hph_mode == CLS_AB || hph_mode == CLS_AB_HIFI)
  837. snd_soc_component_update_bits(component,
  838. WCD937X_ANA_RX_SUPPLIES,
  839. 0x02, 0x02);
  840. if (wcd937x->update_wcd_event)
  841. wcd937x->update_wcd_event(wcd937x->handle,
  842. WCD_BOLERO_EVT_RX_MUTE,
  843. (WCD_RX3 << 0x10));
  844. wcd_enable_irq(&wcd937x->irq_info, WCD937X_IRQ_AUX_PDM_WD_INT);
  845. break;
  846. case SND_SOC_DAPM_PRE_PMD:
  847. wcd_disable_irq(&wcd937x->irq_info, WCD937X_IRQ_AUX_PDM_WD_INT);
  848. if (wcd937x->update_wcd_event)
  849. wcd937x->update_wcd_event(wcd937x->handle,
  850. WCD_BOLERO_EVT_RX_MUTE,
  851. (WCD_RX3 << 0x10 | 0x1));
  852. break;
  853. case SND_SOC_DAPM_POST_PMD:
  854. /* Add delay as per hw requirement */
  855. usleep_range(2000, 2010);
  856. wcd_cls_h_fsm(component, &wcd937x->clsh_info,
  857. WCD_CLSH_EVENT_POST_PA,
  858. WCD_CLSH_STATE_AUX,
  859. hph_mode);
  860. snd_soc_component_update_bits(component,
  861. WCD937X_DIGITAL_PDM_WD_CTL2, 0x05, 0x00);
  862. break;
  863. };
  864. return ret;
  865. }
  866. static int wcd937x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
  867. struct snd_kcontrol *kcontrol,
  868. int event)
  869. {
  870. struct snd_soc_component *component =
  871. snd_soc_dapm_to_component(w->dapm);
  872. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  873. int hph_mode = wcd937x->hph_mode;
  874. int ret = 0;
  875. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  876. w->name, event);
  877. switch (event) {
  878. case SND_SOC_DAPM_PRE_PMU:
  879. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  880. wcd937x->rx_swr_dev->dev_num,
  881. true);
  882. /*
  883. * Enable watchdog interrupt for HPHL or AUX
  884. * depending on mux value
  885. */
  886. wcd937x->ear_rx_path =
  887. snd_soc_component_read32(
  888. component, WCD937X_DIGITAL_CDC_EAR_PATH_CTL);
  889. if (wcd937x->ear_rx_path & EAR_RX_PATH_AUX)
  890. snd_soc_component_update_bits(component,
  891. WCD937X_DIGITAL_PDM_WD_CTL2,
  892. 0x05, 0x05);
  893. else
  894. snd_soc_component_update_bits(component,
  895. WCD937X_DIGITAL_PDM_WD_CTL0,
  896. 0x17, 0x13);
  897. if (!wcd937x->comp1_enable)
  898. snd_soc_component_update_bits(component,
  899. WCD937X_ANA_EAR_COMPANDER_CTL, 0x80, 0x80);
  900. break;
  901. case SND_SOC_DAPM_POST_PMU:
  902. usleep_range(6000, 6010);
  903. if (hph_mode == CLS_AB || hph_mode == CLS_AB_HIFI)
  904. snd_soc_component_update_bits(component,
  905. WCD937X_ANA_RX_SUPPLIES,
  906. 0x02, 0x02);
  907. if (wcd937x->update_wcd_event)
  908. wcd937x->update_wcd_event(wcd937x->handle,
  909. WCD_BOLERO_EVT_RX_MUTE,
  910. (WCD_RX1 << 0x10));
  911. if (wcd937x->ear_rx_path & EAR_RX_PATH_AUX)
  912. wcd_enable_irq(&wcd937x->irq_info,
  913. WCD937X_IRQ_AUX_PDM_WD_INT);
  914. else
  915. wcd_enable_irq(&wcd937x->irq_info,
  916. WCD937X_IRQ_HPHL_PDM_WD_INT);
  917. break;
  918. case SND_SOC_DAPM_PRE_PMD:
  919. if (wcd937x->ear_rx_path & EAR_RX_PATH_AUX)
  920. wcd_disable_irq(&wcd937x->irq_info,
  921. WCD937X_IRQ_AUX_PDM_WD_INT);
  922. else
  923. wcd_disable_irq(&wcd937x->irq_info,
  924. WCD937X_IRQ_HPHL_PDM_WD_INT);
  925. if (wcd937x->update_wcd_event)
  926. wcd937x->update_wcd_event(wcd937x->handle,
  927. WCD_BOLERO_EVT_RX_MUTE,
  928. (WCD_RX1 << 0x10 | 0x1));
  929. break;
  930. case SND_SOC_DAPM_POST_PMD:
  931. if (!wcd937x->comp1_enable)
  932. snd_soc_component_update_bits(component,
  933. WCD937X_ANA_EAR_COMPANDER_CTL, 0x80, 0x00);
  934. usleep_range(7000, 7010);
  935. wcd_cls_h_fsm(component, &wcd937x->clsh_info,
  936. WCD_CLSH_EVENT_POST_PA,
  937. WCD_CLSH_STATE_EAR,
  938. hph_mode);
  939. snd_soc_component_update_bits(component, WCD937X_FLYBACK_EN,
  940. 0x04, 0x04);
  941. if (wcd937x->ear_rx_path & EAR_RX_PATH_AUX)
  942. snd_soc_component_update_bits(component,
  943. WCD937X_DIGITAL_PDM_WD_CTL2,
  944. 0x05, 0x00);
  945. else
  946. snd_soc_component_update_bits(component,
  947. WCD937X_DIGITAL_PDM_WD_CTL0,
  948. 0x17, 0x00);
  949. break;
  950. };
  951. return ret;
  952. }
  953. static int wcd937x_enable_clsh(struct snd_soc_dapm_widget *w,
  954. struct snd_kcontrol *kcontrol,
  955. int event)
  956. {
  957. struct snd_soc_component *component =
  958. snd_soc_dapm_to_component(w->dapm);
  959. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  960. int mode = wcd937x->hph_mode;
  961. int ret = 0;
  962. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  963. w->name, event);
  964. if (mode == CLS_H_LOHIFI || mode == CLS_H_ULP ||
  965. mode == CLS_H_HIFI || mode == CLS_H_LP) {
  966. wcd937x_rx_connect_port(component, CLSH,
  967. SND_SOC_DAPM_EVENT_ON(event));
  968. }
  969. if (SND_SOC_DAPM_EVENT_OFF(event))
  970. ret = swr_slvdev_datapath_control(
  971. wcd937x->rx_swr_dev,
  972. wcd937x->rx_swr_dev->dev_num,
  973. false);
  974. return ret;
  975. }
  976. static int wcd937x_enable_rx1(struct snd_soc_dapm_widget *w,
  977. struct snd_kcontrol *kcontrol,
  978. int event)
  979. {
  980. struct snd_soc_component *component =
  981. snd_soc_dapm_to_component(w->dapm);
  982. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  983. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  984. w->name, event);
  985. switch (event) {
  986. case SND_SOC_DAPM_PRE_PMU:
  987. wcd937x_rx_connect_port(component, HPH_L, true);
  988. if (wcd937x->comp1_enable)
  989. wcd937x_rx_connect_port(component, COMP_L, true);
  990. break;
  991. case SND_SOC_DAPM_POST_PMD:
  992. wcd937x_rx_connect_port(component, HPH_L, false);
  993. if (wcd937x->comp1_enable)
  994. wcd937x_rx_connect_port(component, COMP_L, false);
  995. wcd937x_rx_clk_disable(component);
  996. snd_soc_component_update_bits(component,
  997. WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  998. 0x01, 0x00);
  999. break;
  1000. };
  1001. return 0;
  1002. }
  1003. static int wcd937x_enable_rx2(struct snd_soc_dapm_widget *w,
  1004. struct snd_kcontrol *kcontrol, int event)
  1005. {
  1006. struct snd_soc_component *component =
  1007. snd_soc_dapm_to_component(w->dapm);
  1008. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1009. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  1010. w->name, event);
  1011. switch (event) {
  1012. case SND_SOC_DAPM_PRE_PMU:
  1013. wcd937x_rx_connect_port(component, HPH_R, true);
  1014. if (wcd937x->comp2_enable)
  1015. wcd937x_rx_connect_port(component, COMP_R, true);
  1016. break;
  1017. case SND_SOC_DAPM_POST_PMD:
  1018. wcd937x_rx_connect_port(component, HPH_R, false);
  1019. if (wcd937x->comp2_enable)
  1020. wcd937x_rx_connect_port(component, COMP_R, false);
  1021. wcd937x_rx_clk_disable(component);
  1022. snd_soc_component_update_bits(component,
  1023. WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  1024. 0x02, 0x00);
  1025. break;
  1026. };
  1027. return 0;
  1028. }
  1029. static int wcd937x_enable_rx3(struct snd_soc_dapm_widget *w,
  1030. struct snd_kcontrol *kcontrol,
  1031. int event)
  1032. {
  1033. struct snd_soc_component *component =
  1034. snd_soc_dapm_to_component(w->dapm);
  1035. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  1036. w->name, event);
  1037. switch (event) {
  1038. case SND_SOC_DAPM_PRE_PMU:
  1039. wcd937x_rx_connect_port(component, LO, true);
  1040. break;
  1041. case SND_SOC_DAPM_POST_PMD:
  1042. wcd937x_rx_connect_port(component, LO, false);
  1043. usleep_range(6000, 6010);
  1044. wcd937x_rx_clk_disable(component);
  1045. snd_soc_component_update_bits(component,
  1046. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x04, 0x00);
  1047. break;
  1048. }
  1049. return 0;
  1050. }
  1051. static int wcd937x_codec_enable_dmic(struct snd_soc_dapm_widget *w,
  1052. struct snd_kcontrol *kcontrol,
  1053. int event)
  1054. {
  1055. struct snd_soc_component *component =
  1056. snd_soc_dapm_to_component(w->dapm);
  1057. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1058. u16 dmic_clk_reg;
  1059. s32 *dmic_clk_cnt;
  1060. unsigned int dmic;
  1061. char *wname;
  1062. int ret = 0;
  1063. wname = strpbrk(w->name, "012345");
  1064. if (!wname) {
  1065. dev_err(component->dev, "%s: widget not found\n", __func__);
  1066. return -EINVAL;
  1067. }
  1068. ret = kstrtouint(wname, 10, &dmic);
  1069. if (ret < 0) {
  1070. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  1071. __func__);
  1072. return -EINVAL;
  1073. }
  1074. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  1075. w->name, event);
  1076. switch (dmic) {
  1077. case 0:
  1078. case 1:
  1079. dmic_clk_cnt = &(wcd937x->dmic_0_1_clk_cnt);
  1080. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC1_CTL;
  1081. break;
  1082. case 2:
  1083. case 3:
  1084. dmic_clk_cnt = &(wcd937x->dmic_2_3_clk_cnt);
  1085. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC2_CTL;
  1086. break;
  1087. case 4:
  1088. case 5:
  1089. dmic_clk_cnt = &(wcd937x->dmic_4_5_clk_cnt);
  1090. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC3_CTL;
  1091. break;
  1092. default:
  1093. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  1094. __func__);
  1095. return -EINVAL;
  1096. };
  1097. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_clk_cnt %d\n",
  1098. __func__, event, dmic, *dmic_clk_cnt);
  1099. switch (event) {
  1100. case SND_SOC_DAPM_PRE_PMU:
  1101. snd_soc_component_update_bits(component,
  1102. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x80, 0x80);
  1103. snd_soc_component_update_bits(component,
  1104. dmic_clk_reg, 0x07, 0x02);
  1105. snd_soc_component_update_bits(component,
  1106. dmic_clk_reg, 0x08, 0x08);
  1107. snd_soc_component_update_bits(component,
  1108. dmic_clk_reg, 0x70, 0x20);
  1109. wcd937x_tx_connect_port(component, DMIC0 + (w->shift), true);
  1110. break;
  1111. case SND_SOC_DAPM_POST_PMD:
  1112. wcd937x_tx_connect_port(component, DMIC0 + (w->shift), false);
  1113. break;
  1114. };
  1115. return 0;
  1116. }
  1117. /*
  1118. * wcd937x_get_micb_vout_ctl_val: converts micbias from volts to register value
  1119. * @micb_mv: micbias in mv
  1120. *
  1121. * return register value converted
  1122. */
  1123. int wcd937x_get_micb_vout_ctl_val(u32 micb_mv)
  1124. {
  1125. /* min micbias voltage is 1V and maximum is 2.85V */
  1126. if (micb_mv < 1000 || micb_mv > 2850) {
  1127. pr_err("%s: unsupported micbias voltage\n", __func__);
  1128. return -EINVAL;
  1129. }
  1130. return (micb_mv - 1000) / 50;
  1131. }
  1132. EXPORT_SYMBOL(wcd937x_get_micb_vout_ctl_val);
  1133. /*
  1134. * wcd937x_mbhc_micb_adjust_voltage: adjust specific micbias voltage
  1135. * @component: handle to snd_soc_component *
  1136. * @req_volt: micbias voltage to be set
  1137. * @micb_num: micbias to be set, e.g. micbias1 or micbias2
  1138. *
  1139. * return 0 if adjustment is success or error code in case of failure
  1140. */
  1141. int wcd937x_mbhc_micb_adjust_voltage(struct snd_soc_component *component,
  1142. int req_volt, int micb_num)
  1143. {
  1144. struct wcd937x_priv *wcd937x =
  1145. snd_soc_component_get_drvdata(component);
  1146. int cur_vout_ctl, req_vout_ctl;
  1147. int micb_reg, micb_val, micb_en;
  1148. int ret = 0;
  1149. switch (micb_num) {
  1150. case MIC_BIAS_1:
  1151. micb_reg = WCD937X_ANA_MICB1;
  1152. break;
  1153. case MIC_BIAS_2:
  1154. micb_reg = WCD937X_ANA_MICB2;
  1155. break;
  1156. case MIC_BIAS_3:
  1157. micb_reg = WCD937X_ANA_MICB3;
  1158. break;
  1159. default:
  1160. return -EINVAL;
  1161. }
  1162. mutex_lock(&wcd937x->micb_lock);
  1163. /*
  1164. * If requested micbias voltage is same as current micbias
  1165. * voltage, then just return. Otherwise, adjust voltage as
  1166. * per requested value. If micbias is already enabled, then
  1167. * to avoid slow micbias ramp-up or down enable pull-up
  1168. * momentarily, change the micbias value and then re-enable
  1169. * micbias.
  1170. */
  1171. micb_val = snd_soc_component_read32(component, micb_reg);
  1172. micb_en = (micb_val & 0xC0) >> 6;
  1173. cur_vout_ctl = micb_val & 0x3F;
  1174. req_vout_ctl = wcd937x_get_micb_vout_ctl_val(req_volt);
  1175. if (req_vout_ctl < 0) {
  1176. ret = -EINVAL;
  1177. goto exit;
  1178. }
  1179. if (cur_vout_ctl == req_vout_ctl) {
  1180. ret = 0;
  1181. goto exit;
  1182. }
  1183. dev_dbg(component->dev, "%s: micb_num: %d, cur_mv: %d, req_mv: %d, micb_en: %d\n",
  1184. __func__, micb_num, WCD_VOUT_CTL_TO_MICB(cur_vout_ctl),
  1185. req_volt, micb_en);
  1186. if (micb_en == 0x1)
  1187. snd_soc_component_update_bits(component, micb_reg, 0xC0, 0x80);
  1188. snd_soc_component_update_bits(component, micb_reg, 0x3F, req_vout_ctl);
  1189. if (micb_en == 0x1) {
  1190. snd_soc_component_update_bits(component, micb_reg, 0xC0, 0x40);
  1191. /*
  1192. * Add 2ms delay as per HW requirement after enabling
  1193. * micbias
  1194. */
  1195. usleep_range(2000, 2100);
  1196. }
  1197. exit:
  1198. mutex_unlock(&wcd937x->micb_lock);
  1199. return ret;
  1200. }
  1201. EXPORT_SYMBOL(wcd937x_mbhc_micb_adjust_voltage);
  1202. static int wcd937x_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
  1203. struct snd_kcontrol *kcontrol,
  1204. int event)
  1205. {
  1206. struct snd_soc_component *component =
  1207. snd_soc_dapm_to_component(w->dapm);
  1208. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1209. int ret = 0;
  1210. switch (event) {
  1211. case SND_SOC_DAPM_PRE_PMU:
  1212. ret = swr_slvdev_datapath_control(wcd937x->tx_swr_dev,
  1213. wcd937x->tx_swr_dev->dev_num,
  1214. true);
  1215. break;
  1216. case SND_SOC_DAPM_POST_PMD:
  1217. ret = swr_slvdev_datapath_control(wcd937x->tx_swr_dev,
  1218. wcd937x->tx_swr_dev->dev_num,
  1219. false);
  1220. break;
  1221. };
  1222. return ret;
  1223. }
  1224. static int wcd937x_codec_enable_adc(struct snd_soc_dapm_widget *w,
  1225. struct snd_kcontrol *kcontrol,
  1226. int event){
  1227. struct snd_soc_component *component =
  1228. snd_soc_dapm_to_component(w->dapm);
  1229. struct wcd937x_priv *wcd937x =
  1230. snd_soc_component_get_drvdata(component);
  1231. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  1232. w->name, event);
  1233. switch (event) {
  1234. case SND_SOC_DAPM_PRE_PMU:
  1235. mutex_lock(&wcd937x->ana_tx_clk_lock);
  1236. wcd937x->ana_clk_count++;
  1237. mutex_unlock(&wcd937x->ana_tx_clk_lock);
  1238. snd_soc_component_update_bits(component,
  1239. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x80, 0x80);
  1240. snd_soc_component_update_bits(component,
  1241. WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x08, 0x08);
  1242. snd_soc_component_update_bits(component,
  1243. WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x10, 0x10);
  1244. /* Enable BCS for Headset mic */
  1245. if (w->shift == 1 && !(snd_soc_component_read32(component,
  1246. WCD937X_TX_NEW_TX_CH2_SEL) & 0x80)) {
  1247. wcd937x_tx_connect_port(component, MBHC, true);
  1248. set_bit(AMIC2_BCS_ENABLE, &wcd937x->status_mask);
  1249. }
  1250. wcd937x_tx_connect_port(component, ADC1 + (w->shift), true);
  1251. break;
  1252. case SND_SOC_DAPM_POST_PMD:
  1253. wcd937x_tx_connect_port(component, ADC1 + (w->shift), false);
  1254. if (w->shift == 1 &&
  1255. test_bit(AMIC2_BCS_ENABLE, &wcd937x->status_mask)) {
  1256. wcd937x_tx_connect_port(component, MBHC, false);
  1257. clear_bit(AMIC2_BCS_ENABLE, &wcd937x->status_mask);
  1258. }
  1259. snd_soc_component_update_bits(component,
  1260. WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x08, 0x00);
  1261. break;
  1262. };
  1263. return 0;
  1264. }
  1265. static int wcd937x_enable_req(struct snd_soc_dapm_widget *w,
  1266. struct snd_kcontrol *kcontrol, int event)
  1267. {
  1268. struct snd_soc_component *component =
  1269. snd_soc_dapm_to_component(w->dapm);
  1270. struct wcd937x_priv *wcd937x =
  1271. snd_soc_component_get_drvdata(component);
  1272. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  1273. w->name, event);
  1274. switch (event) {
  1275. case SND_SOC_DAPM_PRE_PMU:
  1276. snd_soc_component_update_bits(component,
  1277. WCD937X_DIGITAL_CDC_REQ_CTL, 0x02, 0x02);
  1278. snd_soc_component_update_bits(component,
  1279. WCD937X_DIGITAL_CDC_REQ_CTL, 0x01, 0x00);
  1280. snd_soc_component_update_bits(component,
  1281. WCD937X_ANA_TX_CH2, 0x40, 0x40);
  1282. snd_soc_component_update_bits(component,
  1283. WCD937X_ANA_TX_CH3_HPF, 0x40, 0x40);
  1284. snd_soc_component_update_bits(component,
  1285. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x70, 0x70);
  1286. snd_soc_component_update_bits(component,
  1287. WCD937X_ANA_TX_CH1, 0x80, 0x80);
  1288. snd_soc_component_update_bits(component,
  1289. WCD937X_ANA_TX_CH2, 0x40, 0x00);
  1290. snd_soc_component_update_bits(component,
  1291. WCD937X_ANA_TX_CH2, 0x80, 0x80);
  1292. snd_soc_component_update_bits(component,
  1293. WCD937X_ANA_TX_CH3, 0x80, 0x80);
  1294. break;
  1295. case SND_SOC_DAPM_POST_PMD:
  1296. snd_soc_component_update_bits(component,
  1297. WCD937X_ANA_TX_CH1, 0x80, 0x00);
  1298. snd_soc_component_update_bits(component,
  1299. WCD937X_ANA_TX_CH2, 0x80, 0x00);
  1300. snd_soc_component_update_bits(component,
  1301. WCD937X_ANA_TX_CH3, 0x80, 0x00);
  1302. snd_soc_component_update_bits(component,
  1303. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x10, 0x00);
  1304. mutex_lock(&wcd937x->ana_tx_clk_lock);
  1305. wcd937x->ana_clk_count--;
  1306. if (wcd937x->ana_clk_count <= 0) {
  1307. snd_soc_component_update_bits(component,
  1308. WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x10, 0x00);
  1309. wcd937x->ana_clk_count = 0;
  1310. }
  1311. mutex_unlock(&wcd937x->ana_tx_clk_lock);
  1312. snd_soc_component_update_bits(component,
  1313. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x80, 0x00);
  1314. break;
  1315. };
  1316. return 0;
  1317. }
  1318. int wcd937x_micbias_control(struct snd_soc_component *component,
  1319. int micb_num, int req, bool is_dapm)
  1320. {
  1321. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1322. int micb_index = micb_num - 1;
  1323. u16 micb_reg;
  1324. int pre_off_event = 0, post_off_event = 0;
  1325. int post_on_event = 0, post_dapm_off = 0;
  1326. int post_dapm_on = 0;
  1327. if ((micb_index < 0) || (micb_index > WCD937X_MAX_MICBIAS - 1)) {
  1328. dev_err(component->dev, "%s: Invalid micbias index, micb_ind:%d\n",
  1329. __func__, micb_index);
  1330. return -EINVAL;
  1331. }
  1332. switch (micb_num) {
  1333. case MIC_BIAS_1:
  1334. micb_reg = WCD937X_ANA_MICB1;
  1335. break;
  1336. case MIC_BIAS_2:
  1337. micb_reg = WCD937X_ANA_MICB2;
  1338. pre_off_event = WCD_EVENT_PRE_MICBIAS_2_OFF;
  1339. post_off_event = WCD_EVENT_POST_MICBIAS_2_OFF;
  1340. post_on_event = WCD_EVENT_POST_MICBIAS_2_ON;
  1341. post_dapm_on = WCD_EVENT_POST_DAPM_MICBIAS_2_ON;
  1342. post_dapm_off = WCD_EVENT_POST_DAPM_MICBIAS_2_OFF;
  1343. break;
  1344. case MIC_BIAS_3:
  1345. micb_reg = WCD937X_ANA_MICB3;
  1346. break;
  1347. default:
  1348. dev_err(component->dev, "%s: Invalid micbias number: %d\n",
  1349. __func__, micb_num);
  1350. return -EINVAL;
  1351. };
  1352. mutex_lock(&wcd937x->micb_lock);
  1353. switch (req) {
  1354. case MICB_PULLUP_ENABLE:
  1355. wcd937x->pullup_ref[micb_index]++;
  1356. if ((wcd937x->pullup_ref[micb_index] == 1) &&
  1357. (wcd937x->micb_ref[micb_index] == 0))
  1358. snd_soc_component_update_bits(component, micb_reg,
  1359. 0xC0, 0x80);
  1360. break;
  1361. case MICB_PULLUP_DISABLE:
  1362. if (wcd937x->pullup_ref[micb_index] > 0)
  1363. wcd937x->pullup_ref[micb_index]--;
  1364. if ((wcd937x->pullup_ref[micb_index] == 0) &&
  1365. (wcd937x->micb_ref[micb_index] == 0))
  1366. snd_soc_component_update_bits(component, micb_reg,
  1367. 0xC0, 0x00);
  1368. break;
  1369. case MICB_ENABLE:
  1370. wcd937x->micb_ref[micb_index]++;
  1371. mutex_lock(&wcd937x->ana_tx_clk_lock);
  1372. wcd937x->ana_clk_count++;
  1373. mutex_unlock(&wcd937x->ana_tx_clk_lock);
  1374. if (wcd937x->micb_ref[micb_index] == 1) {
  1375. snd_soc_component_update_bits(component,
  1376. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0xF0, 0xF0);
  1377. snd_soc_component_update_bits(component,
  1378. WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x10, 0x10);
  1379. snd_soc_component_update_bits(component,
  1380. WCD937X_MICB1_TEST_CTL_2, 0x01, 0x01);
  1381. snd_soc_component_update_bits(component,
  1382. WCD937X_MICB2_TEST_CTL_2, 0x01, 0x01);
  1383. snd_soc_component_update_bits(component,
  1384. WCD937X_MICB3_TEST_CTL_2, 0x01, 0x01);
  1385. snd_soc_component_update_bits(component,
  1386. micb_reg, 0xC0, 0x40);
  1387. if (post_on_event)
  1388. blocking_notifier_call_chain(
  1389. &wcd937x->mbhc->notifier, post_on_event,
  1390. &wcd937x->mbhc->wcd_mbhc);
  1391. }
  1392. if (is_dapm && post_dapm_on && wcd937x->mbhc)
  1393. blocking_notifier_call_chain(
  1394. &wcd937x->mbhc->notifier, post_dapm_on,
  1395. &wcd937x->mbhc->wcd_mbhc);
  1396. break;
  1397. case MICB_DISABLE:
  1398. mutex_lock(&wcd937x->ana_tx_clk_lock);
  1399. wcd937x->ana_clk_count--;
  1400. mutex_unlock(&wcd937x->ana_tx_clk_lock);
  1401. if (wcd937x->micb_ref[micb_index] > 0)
  1402. wcd937x->micb_ref[micb_index]--;
  1403. if ((wcd937x->micb_ref[micb_index] == 0) &&
  1404. (wcd937x->pullup_ref[micb_index] > 0))
  1405. snd_soc_component_update_bits(component, micb_reg,
  1406. 0xC0, 0x80);
  1407. else if ((wcd937x->micb_ref[micb_index] == 0) &&
  1408. (wcd937x->pullup_ref[micb_index] == 0)) {
  1409. if (pre_off_event && wcd937x->mbhc)
  1410. blocking_notifier_call_chain(
  1411. &wcd937x->mbhc->notifier, pre_off_event,
  1412. &wcd937x->mbhc->wcd_mbhc);
  1413. snd_soc_component_update_bits(component, micb_reg,
  1414. 0xC0, 0x00);
  1415. if (post_off_event && wcd937x->mbhc)
  1416. blocking_notifier_call_chain(
  1417. &wcd937x->mbhc->notifier,
  1418. post_off_event,
  1419. &wcd937x->mbhc->wcd_mbhc);
  1420. }
  1421. mutex_lock(&wcd937x->ana_tx_clk_lock);
  1422. if (wcd937x->ana_clk_count <= 0) {
  1423. snd_soc_component_update_bits(component,
  1424. WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  1425. 0x10, 0x00);
  1426. wcd937x->ana_clk_count = 0;
  1427. }
  1428. mutex_unlock(&wcd937x->ana_tx_clk_lock);
  1429. if (is_dapm && post_dapm_off && wcd937x->mbhc)
  1430. blocking_notifier_call_chain(
  1431. &wcd937x->mbhc->notifier, post_dapm_off,
  1432. &wcd937x->mbhc->wcd_mbhc);
  1433. break;
  1434. };
  1435. dev_dbg(component->dev, "%s: micb_num:%d, micb_ref: %d, pullup_ref: %d\n",
  1436. __func__, micb_num, wcd937x->micb_ref[micb_index],
  1437. wcd937x->pullup_ref[micb_index]);
  1438. mutex_unlock(&wcd937x->micb_lock);
  1439. return 0;
  1440. }
  1441. EXPORT_SYMBOL(wcd937x_micbias_control);
  1442. void wcd937x_disable_bcs_before_slow_insert(struct snd_soc_component *component,
  1443. bool bcs_disable)
  1444. {
  1445. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1446. if (wcd937x->update_wcd_event) {
  1447. if (bcs_disable)
  1448. wcd937x->update_wcd_event(wcd937x->handle,
  1449. WCD_BOLERO_EVT_BCS_CLK_OFF, 0);
  1450. else
  1451. wcd937x->update_wcd_event(wcd937x->handle,
  1452. WCD_BOLERO_EVT_BCS_CLK_OFF, 1);
  1453. }
  1454. }
  1455. static int wcd937x_get_logical_addr(struct swr_device *swr_dev)
  1456. {
  1457. int ret = 0;
  1458. uint8_t devnum = 0;
  1459. int num_retry = NUM_ATTEMPTS;
  1460. do {
  1461. ret = swr_get_logical_dev_num(swr_dev, swr_dev->addr, &devnum);
  1462. if (ret) {
  1463. dev_err(&swr_dev->dev,
  1464. "%s get devnum %d for dev addr %lx failed\n",
  1465. __func__, devnum, swr_dev->addr);
  1466. /* retry after 1ms */
  1467. usleep_range(1000, 1010);
  1468. }
  1469. } while (ret && --num_retry);
  1470. swr_dev->dev_num = devnum;
  1471. return 0;
  1472. }
  1473. static bool get_usbc_hs_status(struct snd_soc_component *component,
  1474. struct wcd_mbhc_config *mbhc_cfg)
  1475. {
  1476. if (mbhc_cfg->enable_usbc_analog) {
  1477. if (!(snd_soc_component_read32(component, WCD937X_ANA_MBHC_MECH)
  1478. & 0x20))
  1479. return true;
  1480. }
  1481. return false;
  1482. }
  1483. static int wcd937x_event_notify(struct notifier_block *block,
  1484. unsigned long val,
  1485. void *data)
  1486. {
  1487. u16 event = (val & 0xffff);
  1488. u16 amic = (val >> 0x10);
  1489. u16 mask = 0x40, reg = 0x0;
  1490. int ret = 0;
  1491. struct wcd937x_priv *wcd937x = dev_get_drvdata((struct device *)data);
  1492. struct snd_soc_component *component = wcd937x->component;
  1493. struct wcd_mbhc *mbhc;
  1494. switch (event) {
  1495. case BOLERO_WCD_EVT_TX_CH_HOLD_CLEAR:
  1496. if (amic == 0x1 || amic == 0x2)
  1497. reg = WCD937X_ANA_TX_CH2;
  1498. else if (amic == 0x3)
  1499. reg = WCD937X_ANA_TX_CH3_HPF;
  1500. else
  1501. return 0;
  1502. if (amic == 0x2)
  1503. mask = 0x20;
  1504. snd_soc_component_update_bits(component, reg, mask, 0x00);
  1505. break;
  1506. case BOLERO_WCD_EVT_PA_OFF_PRE_SSR:
  1507. snd_soc_component_update_bits(component, WCD937X_ANA_HPH,
  1508. 0xC0, 0x00);
  1509. snd_soc_component_update_bits(component, WCD937X_ANA_EAR,
  1510. 0x80, 0x00);
  1511. snd_soc_component_update_bits(component, WCD937X_AUX_AUXPA,
  1512. 0x80, 0x00);
  1513. break;
  1514. case BOLERO_WCD_EVT_SSR_DOWN:
  1515. wcd937x->mbhc->wcd_mbhc.deinit_in_progress = true;
  1516. mbhc = &wcd937x->mbhc->wcd_mbhc;
  1517. wcd937x->usbc_hs_status = get_usbc_hs_status(component,
  1518. mbhc->mbhc_cfg);
  1519. wcd937x_mbhc_ssr_down(wcd937x->mbhc, component);
  1520. wcd937x_reset_low(wcd937x->dev);
  1521. break;
  1522. case BOLERO_WCD_EVT_SSR_UP:
  1523. wcd937x_reset(wcd937x->dev);
  1524. /* allow reset to take effect */
  1525. usleep_range(10000, 10010);
  1526. wcd937x_get_logical_addr(wcd937x->tx_swr_dev);
  1527. wcd937x_get_logical_addr(wcd937x->rx_swr_dev);
  1528. wcd937x_init_reg(component);
  1529. regcache_mark_dirty(wcd937x->regmap);
  1530. regcache_sync(wcd937x->regmap);
  1531. /* Initialize MBHC module */
  1532. mbhc = &wcd937x->mbhc->wcd_mbhc;
  1533. ret = wcd937x_mbhc_post_ssr_init(wcd937x->mbhc, component);
  1534. if (ret) {
  1535. dev_err(component->dev, "%s: mbhc initialization failed\n",
  1536. __func__);
  1537. } else {
  1538. wcd937x_mbhc_hs_detect(component, mbhc->mbhc_cfg);
  1539. if (wcd937x->usbc_hs_status)
  1540. mdelay(500);
  1541. }
  1542. wcd937x->mbhc->wcd_mbhc.deinit_in_progress = false;
  1543. break;
  1544. default:
  1545. dev_err(component->dev, "%s: invalid event %d\n", __func__,
  1546. event);
  1547. break;
  1548. }
  1549. return 0;
  1550. }
  1551. static int __wcd937x_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1552. int event)
  1553. {
  1554. struct snd_soc_component *component =
  1555. snd_soc_dapm_to_component(w->dapm);
  1556. int micb_num;
  1557. dev_dbg(component->dev, "%s: wname: %s, event: %d\n",
  1558. __func__, w->name, event);
  1559. if (strnstr(w->name, "MIC BIAS1", sizeof("MIC BIAS1")))
  1560. micb_num = MIC_BIAS_1;
  1561. else if (strnstr(w->name, "MIC BIAS2", sizeof("MIC BIAS2")))
  1562. micb_num = MIC_BIAS_2;
  1563. else if (strnstr(w->name, "MIC BIAS3", sizeof("MIC BIAS3")))
  1564. micb_num = MIC_BIAS_3;
  1565. else
  1566. return -EINVAL;
  1567. switch (event) {
  1568. case SND_SOC_DAPM_PRE_PMU:
  1569. wcd937x_micbias_control(component, micb_num,
  1570. MICB_ENABLE, true);
  1571. break;
  1572. case SND_SOC_DAPM_POST_PMU:
  1573. usleep_range(1000, 1100);
  1574. break;
  1575. case SND_SOC_DAPM_POST_PMD:
  1576. wcd937x_micbias_control(component, micb_num,
  1577. MICB_DISABLE, true);
  1578. break;
  1579. };
  1580. return 0;
  1581. }
  1582. static int wcd937x_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1583. struct snd_kcontrol *kcontrol,
  1584. int event)
  1585. {
  1586. return __wcd937x_codec_enable_micbias(w, event);
  1587. }
  1588. static int __wcd937x_codec_enable_micbias_pullup(struct snd_soc_dapm_widget *w,
  1589. int event)
  1590. {
  1591. struct snd_soc_component *component =
  1592. snd_soc_dapm_to_component(w->dapm);
  1593. int micb_num;
  1594. dev_dbg(component->dev, "%s: wname: %s, event: %d\n",
  1595. __func__, w->name, event);
  1596. if (strnstr(w->name, "VA MIC BIAS1", sizeof("VA MIC BIAS1")))
  1597. micb_num = MIC_BIAS_1;
  1598. else if (strnstr(w->name, "VA MIC BIAS2", sizeof("VA MIC BIAS2")))
  1599. micb_num = MIC_BIAS_2;
  1600. else if (strnstr(w->name, "VA MIC BIAS3", sizeof("VA MIC BIAS3")))
  1601. micb_num = MIC_BIAS_3;
  1602. else
  1603. return -EINVAL;
  1604. switch (event) {
  1605. case SND_SOC_DAPM_PRE_PMU:
  1606. wcd937x_micbias_control(component, micb_num,
  1607. MICB_PULLUP_ENABLE, true);
  1608. break;
  1609. case SND_SOC_DAPM_POST_PMU:
  1610. /* 1 msec delay as per HW requirement */
  1611. usleep_range(1000, 1100);
  1612. break;
  1613. case SND_SOC_DAPM_POST_PMD:
  1614. wcd937x_micbias_control(component, micb_num,
  1615. MICB_PULLUP_DISABLE, true);
  1616. break;
  1617. };
  1618. return 0;
  1619. }
  1620. static int wcd937x_codec_enable_micbias_pullup(struct snd_soc_dapm_widget *w,
  1621. struct snd_kcontrol *kcontrol,
  1622. int event)
  1623. {
  1624. return __wcd937x_codec_enable_micbias_pullup(w, event);
  1625. }
  1626. static int wcd937x_rx_hph_mode_get(struct snd_kcontrol *kcontrol,
  1627. struct snd_ctl_elem_value *ucontrol)
  1628. {
  1629. struct snd_soc_component *component =
  1630. snd_soc_kcontrol_component(kcontrol);
  1631. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1632. ucontrol->value.integer.value[0] = wcd937x->hph_mode;
  1633. return 0;
  1634. }
  1635. static int wcd937x_rx_hph_mode_put(struct snd_kcontrol *kcontrol,
  1636. struct snd_ctl_elem_value *ucontrol)
  1637. {
  1638. struct snd_soc_component *component =
  1639. snd_soc_kcontrol_component(kcontrol);
  1640. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1641. u32 mode_val;
  1642. mode_val = ucontrol->value.enumerated.item[0];
  1643. dev_dbg(component->dev, "%s: mode: %d\n", __func__, mode_val);
  1644. if (mode_val == 0) {
  1645. dev_warn(component->dev, "%s:Invalid HPH Mode, default to class_AB\n",
  1646. __func__);
  1647. mode_val = 3; /* enum will be updated later */
  1648. }
  1649. wcd937x->hph_mode = mode_val;
  1650. return 0;
  1651. }
  1652. static int wcd937x_tx_ch_pwr_level_get(struct snd_kcontrol *kcontrol,
  1653. struct snd_ctl_elem_value *ucontrol)
  1654. {
  1655. struct snd_soc_component *component =
  1656. snd_soc_kcontrol_component(kcontrol);
  1657. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1658. if (strnstr(kcontrol->id.name, "CH1", sizeof(kcontrol->id.name)))
  1659. ucontrol->value.integer.value[0] = wcd937x->tx_ch_pwr[0];
  1660. else if (strnstr(kcontrol->id.name, "CH3", sizeof(kcontrol->id.name)))
  1661. ucontrol->value.integer.value[0] = wcd937x->tx_ch_pwr[1];
  1662. return 0;
  1663. }
  1664. static int wcd937x_tx_ch_pwr_level_put(struct snd_kcontrol *kcontrol,
  1665. struct snd_ctl_elem_value *ucontrol)
  1666. {
  1667. struct snd_soc_component *component =
  1668. snd_soc_kcontrol_component(kcontrol);
  1669. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1670. u32 pwr_level = ucontrol->value.enumerated.item[0];
  1671. dev_dbg(component->dev, "%s: tx ch pwr_level: %d\n",
  1672. __func__, pwr_level);
  1673. if (strnstr(kcontrol->id.name, "CH1",
  1674. sizeof(kcontrol->id.name))) {
  1675. snd_soc_component_update_bits(component,
  1676. WCD937X_ANA_TX_CH1, 0x60,
  1677. pwr_level << 0x5);
  1678. wcd937x->tx_ch_pwr[0] = pwr_level;
  1679. } else if (strnstr(kcontrol->id.name, "CH3",
  1680. sizeof(kcontrol->id.name))) {
  1681. snd_soc_component_update_bits(component,
  1682. WCD937X_ANA_TX_CH3, 0x60,
  1683. pwr_level << 0x5);
  1684. wcd937x->tx_ch_pwr[1] = pwr_level;
  1685. }
  1686. return 0;
  1687. }
  1688. static int wcd937x_ear_pa_gain_get(struct snd_kcontrol *kcontrol,
  1689. struct snd_ctl_elem_value *ucontrol)
  1690. {
  1691. u8 ear_pa_gain = 0;
  1692. struct snd_soc_component *component =
  1693. snd_soc_kcontrol_component(kcontrol);
  1694. ear_pa_gain = snd_soc_component_read32(component,
  1695. WCD937X_ANA_EAR_COMPANDER_CTL);
  1696. ear_pa_gain = (ear_pa_gain & 0x7C) >> 2;
  1697. ucontrol->value.integer.value[0] = ear_pa_gain;
  1698. dev_dbg(component->dev, "%s: ear_pa_gain = 0x%x\n", __func__,
  1699. ear_pa_gain);
  1700. return 0;
  1701. }
  1702. static int wcd937x_ear_pa_gain_put(struct snd_kcontrol *kcontrol,
  1703. struct snd_ctl_elem_value *ucontrol)
  1704. {
  1705. u8 ear_pa_gain = 0;
  1706. struct snd_soc_component *component =
  1707. snd_soc_kcontrol_component(kcontrol);
  1708. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1709. dev_dbg(component->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  1710. __func__, ucontrol->value.integer.value[0]);
  1711. ear_pa_gain = ucontrol->value.integer.value[0] << 2;
  1712. if (!wcd937x->comp1_enable) {
  1713. snd_soc_component_update_bits(component,
  1714. WCD937X_ANA_EAR_COMPANDER_CTL,
  1715. 0x7C, ear_pa_gain);
  1716. }
  1717. return 0;
  1718. }
  1719. static int wcd937x_get_compander(struct snd_kcontrol *kcontrol,
  1720. struct snd_ctl_elem_value *ucontrol)
  1721. {
  1722. struct snd_soc_component *component =
  1723. snd_soc_kcontrol_component(kcontrol);
  1724. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1725. bool hphr;
  1726. struct soc_multi_mixer_control *mc;
  1727. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1728. hphr = mc->shift;
  1729. ucontrol->value.integer.value[0] = hphr ? wcd937x->comp2_enable :
  1730. wcd937x->comp1_enable;
  1731. return 0;
  1732. }
  1733. static int wcd937x_set_compander(struct snd_kcontrol *kcontrol,
  1734. struct snd_ctl_elem_value *ucontrol)
  1735. {
  1736. struct snd_soc_component *component =
  1737. snd_soc_kcontrol_component(kcontrol);
  1738. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1739. int value = ucontrol->value.integer.value[0];
  1740. bool hphr;
  1741. struct soc_multi_mixer_control *mc;
  1742. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1743. hphr = mc->shift;
  1744. if (hphr)
  1745. wcd937x->comp2_enable = value;
  1746. else
  1747. wcd937x->comp1_enable = value;
  1748. return 0;
  1749. }
  1750. static int wcd937x_codec_enable_vdd_buck(struct snd_soc_dapm_widget *w,
  1751. struct snd_kcontrol *kcontrol,
  1752. int event)
  1753. {
  1754. struct snd_soc_component *component =
  1755. snd_soc_dapm_to_component(w->dapm);
  1756. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1757. struct wcd937x_pdata *pdata = NULL;
  1758. int ret = 0;
  1759. pdata = dev_get_platdata(wcd937x->dev);
  1760. if (!pdata) {
  1761. dev_err(component->dev, "%s: pdata is NULL\n", __func__);
  1762. return -EINVAL;
  1763. }
  1764. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  1765. w->name, event);
  1766. switch (event) {
  1767. case SND_SOC_DAPM_PRE_PMU:
  1768. if (test_bit(ALLOW_BUCK_DISABLE, &wcd937x->status_mask)) {
  1769. dev_dbg(component->dev,
  1770. "%s: buck already in enabled state\n",
  1771. __func__);
  1772. clear_bit(ALLOW_BUCK_DISABLE, &wcd937x->status_mask);
  1773. return 0;
  1774. }
  1775. ret = msm_cdc_enable_ondemand_supply(wcd937x->dev,
  1776. wcd937x->supplies,
  1777. pdata->regulator,
  1778. pdata->num_supplies,
  1779. "cdc-vdd-buck");
  1780. if (ret == -EINVAL) {
  1781. dev_err(component->dev, "%s: vdd buck is not enabled\n",
  1782. __func__);
  1783. return ret;
  1784. }
  1785. clear_bit(ALLOW_BUCK_DISABLE, &wcd937x->status_mask);
  1786. /*
  1787. * 200us sleep is required after LDO15 is enabled as per
  1788. * HW requirement
  1789. */
  1790. usleep_range(200, 250);
  1791. break;
  1792. case SND_SOC_DAPM_POST_PMD:
  1793. set_bit(ALLOW_BUCK_DISABLE, &wcd937x->status_mask);
  1794. break;
  1795. }
  1796. return 0;
  1797. }
  1798. static const char * const rx_hph_mode_mux_text[] = {
  1799. "CLS_H_INVALID", "CLS_H_HIFI", "CLS_H_LP", "CLS_AB", "CLS_H_LOHIFI",
  1800. "CLS_H_ULP", "CLS_AB_HIFI",
  1801. };
  1802. const char * const tx_master_ch_text[] = {
  1803. "ZERO", "SWRM_TX1_CH1", "SWRM_TX1_CH2", "SWRM_TX1_CH3", "SWRM_TX1_CH4",
  1804. "SWRM_TX2_CH1", "SWRM_TX2_CH2", "SWRM_TX2_CH3", "SWRM_TX2_CH4",
  1805. "SWRM_TX3_CH1", "SWRM_TX3_CH2", "SWRM_TX3_CH3", "SWRM_TX3_CH4",
  1806. "SWRM_PCM_IN",
  1807. };
  1808. const struct soc_enum tx_master_ch_enum =
  1809. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(tx_master_ch_text),
  1810. tx_master_ch_text);
  1811. static void wcd937x_tx_get_slave_ch_type_idx(const char *wname, int *ch_idx)
  1812. {
  1813. u8 ch_type = 0;
  1814. if (strnstr(wname, "ADC1", sizeof("ADC1")))
  1815. ch_type = ADC1;
  1816. else if (strnstr(wname, "ADC2", sizeof("ADC2")))
  1817. ch_type = ADC2;
  1818. else if (strnstr(wname, "ADC3", sizeof("ADC3")))
  1819. ch_type = ADC3;
  1820. else if (strnstr(wname, "DMIC0", sizeof("DMIC0")))
  1821. ch_type = DMIC0;
  1822. else if (strnstr(wname, "DMIC1", sizeof("DMIC1")))
  1823. ch_type = DMIC1;
  1824. else if (strnstr(wname, "MBHC", sizeof("MBHC")))
  1825. ch_type = MBHC;
  1826. else if (strnstr(wname, "DMIC2", sizeof("DMIC2")))
  1827. ch_type = DMIC2;
  1828. else if (strnstr(wname, "DMIC3", sizeof("DMIC3")))
  1829. ch_type = DMIC3;
  1830. else if (strnstr(wname, "DMIC4", sizeof("DMIC4")))
  1831. ch_type = DMIC4;
  1832. else if (strnstr(wname, "DMIC5", sizeof("DMIC5")))
  1833. ch_type = DMIC5;
  1834. else
  1835. pr_err("%s: ch name: %s is not listed\n", __func__, wname);
  1836. if (ch_type)
  1837. *ch_idx = wcd937x_slave_get_slave_ch_val(ch_type);
  1838. else
  1839. *ch_idx = -EINVAL;
  1840. }
  1841. static int wcd937x_tx_master_ch_get(struct snd_kcontrol *kcontrol,
  1842. struct snd_ctl_elem_value *ucontrol)
  1843. {
  1844. struct snd_soc_component *component =
  1845. snd_soc_kcontrol_component(kcontrol);
  1846. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1847. int slave_ch_idx;
  1848. wcd937x_tx_get_slave_ch_type_idx(kcontrol->id.name, &slave_ch_idx);
  1849. if (slave_ch_idx != -EINVAL)
  1850. ucontrol->value.integer.value[0] =
  1851. wcd937x_slave_get_master_ch_val(
  1852. wcd937x->tx_master_ch_map[slave_ch_idx]);
  1853. dev_dbg(component->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  1854. __func__, ucontrol->value.integer.value[0]);
  1855. return 0;
  1856. }
  1857. static int wcd937x_tx_master_ch_put(struct snd_kcontrol *kcontrol,
  1858. struct snd_ctl_elem_value *ucontrol)
  1859. {
  1860. struct snd_soc_component *component =
  1861. snd_soc_kcontrol_component(kcontrol);
  1862. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1863. int slave_ch_idx;
  1864. wcd937x_tx_get_slave_ch_type_idx(kcontrol->id.name, &slave_ch_idx);
  1865. dev_dbg(component->dev, "%s: slave_ch_idx: %d", __func__, slave_ch_idx);
  1866. dev_dbg(component->dev, "%s: ucontrol->value.enumerated.item[0] = %ld\n",
  1867. __func__, ucontrol->value.enumerated.item[0]);
  1868. if (slave_ch_idx != -EINVAL)
  1869. wcd937x->tx_master_ch_map[slave_ch_idx] =
  1870. wcd937x_slave_get_master_ch(
  1871. ucontrol->value.enumerated.item[0]);
  1872. return 0;
  1873. }
  1874. static const char * const wcd937x_tx_ch_pwr_level_text[] = {
  1875. "L0", "L1", "L2", "L3",
  1876. };
  1877. static const char * const wcd937x_ear_pa_gain_text[] = {
  1878. "G_6_DB", "G_4P5_DB", "G_3_DB", "G_1P5_DB", "G_0_DB",
  1879. "G_M1P5_DB", "G_M3_DB", "G_M4P5_DB",
  1880. "G_M6_DB", "G_7P5_DB", "G_M9_DB",
  1881. "G_M10P5_DB", "G_M12_DB", "G_M13P5_DB",
  1882. "G_M15_DB", "G_M16P5_DB", "G_M18_DB",
  1883. };
  1884. static const struct soc_enum rx_hph_mode_mux_enum =
  1885. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(rx_hph_mode_mux_text),
  1886. rx_hph_mode_mux_text);
  1887. static SOC_ENUM_SINGLE_EXT_DECL(wcd937x_ear_pa_gain_enum,
  1888. wcd937x_ear_pa_gain_text);
  1889. static SOC_ENUM_SINGLE_EXT_DECL(wcd937x_tx_ch_pwr_level_enum,
  1890. wcd937x_tx_ch_pwr_level_text);
  1891. static const struct snd_kcontrol_new wcd937x_snd_controls[] = {
  1892. SOC_ENUM_EXT("EAR PA GAIN", wcd937x_ear_pa_gain_enum,
  1893. wcd937x_ear_pa_gain_get, wcd937x_ear_pa_gain_put),
  1894. SOC_ENUM_EXT("RX HPH Mode", rx_hph_mode_mux_enum,
  1895. wcd937x_rx_hph_mode_get, wcd937x_rx_hph_mode_put),
  1896. SOC_SINGLE_EXT("HPHL_COMP Switch", SND_SOC_NOPM, 0, 1, 0,
  1897. wcd937x_get_compander, wcd937x_set_compander),
  1898. SOC_SINGLE_EXT("HPHR_COMP Switch", SND_SOC_NOPM, 1, 1, 0,
  1899. wcd937x_get_compander, wcd937x_set_compander),
  1900. SOC_SINGLE_TLV("HPHL Volume", WCD937X_HPH_L_EN, 0, 20, 1, line_gain),
  1901. SOC_SINGLE_TLV("HPHR Volume", WCD937X_HPH_R_EN, 0, 20, 1, line_gain),
  1902. SOC_SINGLE_TLV("ADC1 Volume", WCD937X_ANA_TX_CH1, 0, 20, 0,
  1903. analog_gain),
  1904. SOC_SINGLE_TLV("ADC2 Volume", WCD937X_ANA_TX_CH2, 0, 20, 0,
  1905. analog_gain),
  1906. SOC_SINGLE_TLV("ADC3 Volume", WCD937X_ANA_TX_CH3, 0, 20, 0,
  1907. analog_gain),
  1908. SOC_ENUM_EXT("ADC1 ChMap", tx_master_ch_enum,
  1909. wcd937x_tx_master_ch_get, wcd937x_tx_master_ch_put),
  1910. SOC_ENUM_EXT("ADC2 ChMap", tx_master_ch_enum,
  1911. wcd937x_tx_master_ch_get, wcd937x_tx_master_ch_put),
  1912. SOC_ENUM_EXT("ADC3 ChMap", tx_master_ch_enum,
  1913. wcd937x_tx_master_ch_get, wcd937x_tx_master_ch_put),
  1914. SOC_ENUM_EXT("DMIC0 ChMap", tx_master_ch_enum,
  1915. wcd937x_tx_master_ch_get, wcd937x_tx_master_ch_put),
  1916. SOC_ENUM_EXT("DMIC1 ChMap", tx_master_ch_enum,
  1917. wcd937x_tx_master_ch_get, wcd937x_tx_master_ch_put),
  1918. SOC_ENUM_EXT("MBHC ChMap", tx_master_ch_enum,
  1919. wcd937x_tx_master_ch_get, wcd937x_tx_master_ch_put),
  1920. SOC_ENUM_EXT("DMIC2 ChMap", tx_master_ch_enum,
  1921. wcd937x_tx_master_ch_get, wcd937x_tx_master_ch_put),
  1922. SOC_ENUM_EXT("DMIC3 ChMap", tx_master_ch_enum,
  1923. wcd937x_tx_master_ch_get, wcd937x_tx_master_ch_put),
  1924. SOC_ENUM_EXT("DMIC4 ChMap", tx_master_ch_enum,
  1925. wcd937x_tx_master_ch_get, wcd937x_tx_master_ch_put),
  1926. SOC_ENUM_EXT("DMIC5 ChMap", tx_master_ch_enum,
  1927. wcd937x_tx_master_ch_get, wcd937x_tx_master_ch_put),
  1928. SOC_ENUM_EXT("TX CH1 PWR", wcd937x_tx_ch_pwr_level_enum,
  1929. wcd937x_tx_ch_pwr_level_get, wcd937x_tx_ch_pwr_level_put),
  1930. SOC_ENUM_EXT("TX CH3 PWR", wcd937x_tx_ch_pwr_level_enum,
  1931. wcd937x_tx_ch_pwr_level_get, wcd937x_tx_ch_pwr_level_put),
  1932. };
  1933. static const struct snd_kcontrol_new adc1_switch[] = {
  1934. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1935. };
  1936. static const struct snd_kcontrol_new adc2_switch[] = {
  1937. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1938. };
  1939. static const struct snd_kcontrol_new adc3_switch[] = {
  1940. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1941. };
  1942. static const struct snd_kcontrol_new dmic1_switch[] = {
  1943. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1944. };
  1945. static const struct snd_kcontrol_new dmic2_switch[] = {
  1946. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1947. };
  1948. static const struct snd_kcontrol_new dmic3_switch[] = {
  1949. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1950. };
  1951. static const struct snd_kcontrol_new dmic4_switch[] = {
  1952. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1953. };
  1954. static const struct snd_kcontrol_new dmic5_switch[] = {
  1955. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1956. };
  1957. static const struct snd_kcontrol_new dmic6_switch[] = {
  1958. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1959. };
  1960. static const struct snd_kcontrol_new ear_rdac_switch[] = {
  1961. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1962. };
  1963. static const struct snd_kcontrol_new aux_rdac_switch[] = {
  1964. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1965. };
  1966. static const struct snd_kcontrol_new hphl_rdac_switch[] = {
  1967. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1968. };
  1969. static const struct snd_kcontrol_new hphr_rdac_switch[] = {
  1970. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1971. };
  1972. static const char * const adc2_mux_text[] = {
  1973. "INP2", "INP3"
  1974. };
  1975. static const char * const rdac3_mux_text[] = {
  1976. "RX1", "RX3"
  1977. };
  1978. static const struct soc_enum adc2_enum =
  1979. SOC_ENUM_SINGLE(WCD937X_TX_NEW_TX_CH2_SEL, 7,
  1980. ARRAY_SIZE(adc2_mux_text), adc2_mux_text);
  1981. static const struct soc_enum rdac3_enum =
  1982. SOC_ENUM_SINGLE(WCD937X_DIGITAL_CDC_EAR_PATH_CTL, 0,
  1983. ARRAY_SIZE(rdac3_mux_text), rdac3_mux_text);
  1984. static const struct snd_kcontrol_new tx_adc2_mux =
  1985. SOC_DAPM_ENUM("ADC2 MUX Mux", adc2_enum);
  1986. static const struct snd_kcontrol_new rx_rdac3_mux =
  1987. SOC_DAPM_ENUM("RDAC3_MUX Mux", rdac3_enum);
  1988. static const struct snd_soc_dapm_widget wcd937x_dapm_widgets[] = {
  1989. /*input widgets*/
  1990. SND_SOC_DAPM_INPUT("AMIC1"),
  1991. SND_SOC_DAPM_INPUT("AMIC2"),
  1992. SND_SOC_DAPM_INPUT("AMIC3"),
  1993. SND_SOC_DAPM_INPUT("IN1_HPHL"),
  1994. SND_SOC_DAPM_INPUT("IN2_HPHR"),
  1995. SND_SOC_DAPM_INPUT("IN3_AUX"),
  1996. /*
  1997. * These dummy widgets are null connected to WCD937x dapm input and
  1998. * output widgets which are not actual path endpoints. This ensures
  1999. * dapm doesnt set these dapm input and output widgets as endpoints.
  2000. */
  2001. SND_SOC_DAPM_INPUT("WCD_TX_DUMMY"),
  2002. SND_SOC_DAPM_OUTPUT("WCD_RX_DUMMY"),
  2003. /*tx widgets*/
  2004. SND_SOC_DAPM_ADC_E("ADC1", NULL, SND_SOC_NOPM, 0, 0,
  2005. wcd937x_codec_enable_adc,
  2006. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  2007. SND_SOC_DAPM_ADC_E("ADC2", NULL, SND_SOC_NOPM, 1, 0,
  2008. wcd937x_codec_enable_adc,
  2009. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  2010. SND_SOC_DAPM_MIXER_E("ADC1 REQ", SND_SOC_NOPM, 0, 0,
  2011. NULL, 0, wcd937x_enable_req,
  2012. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  2013. SND_SOC_DAPM_MIXER_E("ADC2 REQ", SND_SOC_NOPM, 0, 0,
  2014. NULL, 0, wcd937x_enable_req,
  2015. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  2016. SND_SOC_DAPM_MUX("ADC2 MUX", SND_SOC_NOPM, 0, 0,
  2017. &tx_adc2_mux),
  2018. /*tx mixers*/
  2019. SND_SOC_DAPM_MIXER_E("ADC1_MIXER", SND_SOC_NOPM, 0, 0,
  2020. adc1_switch, ARRAY_SIZE(adc1_switch),
  2021. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  2022. SND_SOC_DAPM_POST_PMD),
  2023. SND_SOC_DAPM_MIXER_E("ADC2_MIXER", SND_SOC_NOPM, 0, 0,
  2024. adc2_switch, ARRAY_SIZE(adc2_switch),
  2025. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  2026. SND_SOC_DAPM_POST_PMD),
  2027. /* micbias widgets*/
  2028. SND_SOC_DAPM_SUPPLY("MIC BIAS1", SND_SOC_NOPM, 0, 0,
  2029. wcd937x_codec_enable_micbias,
  2030. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  2031. SND_SOC_DAPM_POST_PMD),
  2032. SND_SOC_DAPM_SUPPLY("MIC BIAS2", SND_SOC_NOPM, 0, 0,
  2033. wcd937x_codec_enable_micbias,
  2034. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  2035. SND_SOC_DAPM_POST_PMD),
  2036. SND_SOC_DAPM_SUPPLY("MIC BIAS3", SND_SOC_NOPM, 0, 0,
  2037. wcd937x_codec_enable_micbias,
  2038. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  2039. SND_SOC_DAPM_POST_PMD),
  2040. SND_SOC_DAPM_SUPPLY("VDD_BUCK", SND_SOC_NOPM, 0, 0,
  2041. wcd937x_codec_enable_vdd_buck,
  2042. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  2043. SND_SOC_DAPM_SUPPLY_S("CLS_H_PORT", 1, SND_SOC_NOPM, 0, 0,
  2044. wcd937x_enable_clsh,
  2045. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  2046. /*rx widgets*/
  2047. SND_SOC_DAPM_PGA_E("EAR PGA", WCD937X_ANA_EAR, 7, 0, NULL, 0,
  2048. wcd937x_codec_enable_ear_pa,
  2049. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  2050. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  2051. SND_SOC_DAPM_PGA_E("AUX PGA", WCD937X_AUX_AUXPA, 7, 0, NULL, 0,
  2052. wcd937x_codec_enable_aux_pa,
  2053. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  2054. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  2055. SND_SOC_DAPM_PGA_E("HPHL PGA", WCD937X_ANA_HPH, 7, 0, NULL, 0,
  2056. wcd937x_codec_enable_hphl_pa,
  2057. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  2058. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  2059. SND_SOC_DAPM_PGA_E("HPHR PGA", WCD937X_ANA_HPH, 6, 0, NULL, 0,
  2060. wcd937x_codec_enable_hphr_pa,
  2061. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  2062. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  2063. SND_SOC_DAPM_DAC_E("RDAC1", NULL, SND_SOC_NOPM, 0, 0,
  2064. wcd937x_codec_hphl_dac_event,
  2065. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  2066. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  2067. SND_SOC_DAPM_DAC_E("RDAC2", NULL, SND_SOC_NOPM, 0, 0,
  2068. wcd937x_codec_hphr_dac_event,
  2069. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  2070. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  2071. SND_SOC_DAPM_DAC_E("RDAC3", NULL, SND_SOC_NOPM, 0, 0,
  2072. wcd937x_codec_ear_dac_event,
  2073. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  2074. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  2075. SND_SOC_DAPM_DAC_E("RDAC4", NULL, SND_SOC_NOPM, 0, 0,
  2076. wcd937x_codec_aux_dac_event,
  2077. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  2078. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  2079. SND_SOC_DAPM_MUX("RDAC3_MUX", SND_SOC_NOPM, 0, 0, &rx_rdac3_mux),
  2080. SND_SOC_DAPM_MIXER_E("RX1", SND_SOC_NOPM, 0, 0, NULL, 0,
  2081. wcd937x_enable_rx1, SND_SOC_DAPM_PRE_PMU |
  2082. SND_SOC_DAPM_POST_PMD),
  2083. SND_SOC_DAPM_MIXER_E("RX2", SND_SOC_NOPM, 0, 0, NULL, 0,
  2084. wcd937x_enable_rx2, SND_SOC_DAPM_PRE_PMU |
  2085. SND_SOC_DAPM_POST_PMD),
  2086. SND_SOC_DAPM_MIXER_E("RX3", SND_SOC_NOPM, 0, 0, NULL, 0,
  2087. wcd937x_enable_rx3, SND_SOC_DAPM_PRE_PMU |
  2088. SND_SOC_DAPM_POST_PMD),
  2089. /* rx mixer widgets*/
  2090. SND_SOC_DAPM_MIXER("EAR_RDAC", SND_SOC_NOPM, 0, 0,
  2091. ear_rdac_switch, ARRAY_SIZE(ear_rdac_switch)),
  2092. SND_SOC_DAPM_MIXER("AUX_RDAC", SND_SOC_NOPM, 0, 0,
  2093. aux_rdac_switch, ARRAY_SIZE(aux_rdac_switch)),
  2094. SND_SOC_DAPM_MIXER("HPHL_RDAC", SND_SOC_NOPM, 0, 0,
  2095. hphl_rdac_switch, ARRAY_SIZE(hphl_rdac_switch)),
  2096. SND_SOC_DAPM_MIXER("HPHR_RDAC", SND_SOC_NOPM, 0, 0,
  2097. hphr_rdac_switch, ARRAY_SIZE(hphr_rdac_switch)),
  2098. /*output widgets tx*/
  2099. SND_SOC_DAPM_OUTPUT("ADC1_OUTPUT"),
  2100. SND_SOC_DAPM_OUTPUT("ADC2_OUTPUT"),
  2101. SND_SOC_DAPM_OUTPUT("WCD_TX_OUTPUT"),
  2102. /*output widgets rx*/
  2103. SND_SOC_DAPM_OUTPUT("EAR"),
  2104. SND_SOC_DAPM_OUTPUT("AUX"),
  2105. SND_SOC_DAPM_OUTPUT("HPHL"),
  2106. SND_SOC_DAPM_OUTPUT("HPHR"),
  2107. /* micbias pull up widgets*/
  2108. SND_SOC_DAPM_SUPPLY("VA MIC BIAS1", SND_SOC_NOPM, 0, 0,
  2109. wcd937x_codec_enable_micbias_pullup,
  2110. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  2111. SND_SOC_DAPM_POST_PMD),
  2112. SND_SOC_DAPM_SUPPLY("VA MIC BIAS2", SND_SOC_NOPM, 0, 0,
  2113. wcd937x_codec_enable_micbias_pullup,
  2114. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  2115. SND_SOC_DAPM_POST_PMD),
  2116. SND_SOC_DAPM_SUPPLY("VA MIC BIAS3", SND_SOC_NOPM, 0, 0,
  2117. wcd937x_codec_enable_micbias_pullup,
  2118. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  2119. SND_SOC_DAPM_POST_PMD),
  2120. };
  2121. static const struct snd_soc_dapm_widget wcd9375_dapm_widgets[] = {
  2122. /*input widgets*/
  2123. SND_SOC_DAPM_INPUT("AMIC4"),
  2124. /*tx widgets*/
  2125. SND_SOC_DAPM_ADC_E("ADC3", NULL, SND_SOC_NOPM, 2, 0,
  2126. wcd937x_codec_enable_adc,
  2127. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  2128. SND_SOC_DAPM_MIXER_E("ADC3 REQ", SND_SOC_NOPM, 0, 0,
  2129. NULL, 0, wcd937x_enable_req,
  2130. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  2131. SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
  2132. wcd937x_codec_enable_dmic,
  2133. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  2134. SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 1, 0,
  2135. wcd937x_codec_enable_dmic,
  2136. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  2137. SND_SOC_DAPM_ADC_E("DMIC3", NULL, SND_SOC_NOPM, 2, 0,
  2138. wcd937x_codec_enable_dmic,
  2139. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  2140. SND_SOC_DAPM_ADC_E("DMIC4", NULL, SND_SOC_NOPM, 3, 0,
  2141. wcd937x_codec_enable_dmic,
  2142. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  2143. SND_SOC_DAPM_ADC_E("DMIC5", NULL, SND_SOC_NOPM, 4, 0,
  2144. wcd937x_codec_enable_dmic,
  2145. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  2146. SND_SOC_DAPM_ADC_E("DMIC6", NULL, SND_SOC_NOPM, 5, 0,
  2147. wcd937x_codec_enable_dmic,
  2148. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  2149. /*tx mixer widgets*/
  2150. SND_SOC_DAPM_MIXER_E("DMIC1_MIXER", SND_SOC_NOPM, 0,
  2151. 0, dmic1_switch, ARRAY_SIZE(dmic1_switch),
  2152. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  2153. SND_SOC_DAPM_POST_PMD),
  2154. SND_SOC_DAPM_MIXER_E("DMIC2_MIXER", SND_SOC_NOPM, 0,
  2155. 0, dmic2_switch, ARRAY_SIZE(dmic2_switch),
  2156. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  2157. SND_SOC_DAPM_POST_PMD),
  2158. SND_SOC_DAPM_MIXER_E("DMIC3_MIXER", SND_SOC_NOPM, 0,
  2159. 0, dmic3_switch, ARRAY_SIZE(dmic3_switch),
  2160. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  2161. SND_SOC_DAPM_POST_PMD),
  2162. SND_SOC_DAPM_MIXER_E("DMIC4_MIXER", SND_SOC_NOPM, 0,
  2163. 0, dmic4_switch, ARRAY_SIZE(dmic4_switch),
  2164. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  2165. SND_SOC_DAPM_POST_PMD),
  2166. SND_SOC_DAPM_MIXER_E("DMIC5_MIXER", SND_SOC_NOPM, 0,
  2167. 0, dmic5_switch, ARRAY_SIZE(dmic5_switch),
  2168. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  2169. SND_SOC_DAPM_POST_PMD),
  2170. SND_SOC_DAPM_MIXER_E("DMIC6_MIXER", SND_SOC_NOPM, 0,
  2171. 0, dmic6_switch, ARRAY_SIZE(dmic6_switch),
  2172. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  2173. SND_SOC_DAPM_POST_PMD),
  2174. SND_SOC_DAPM_MIXER_E("ADC3_MIXER", SND_SOC_NOPM, 0, 0, adc3_switch,
  2175. ARRAY_SIZE(adc3_switch), wcd937x_tx_swr_ctrl,
  2176. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  2177. /*output widgets*/
  2178. SND_SOC_DAPM_OUTPUT("DMIC1_OUTPUT"),
  2179. SND_SOC_DAPM_OUTPUT("DMIC2_OUTPUT"),
  2180. SND_SOC_DAPM_OUTPUT("DMIC3_OUTPUT"),
  2181. SND_SOC_DAPM_OUTPUT("DMIC4_OUTPUT"),
  2182. SND_SOC_DAPM_OUTPUT("DMIC5_OUTPUT"),
  2183. SND_SOC_DAPM_OUTPUT("DMIC6_OUTPUT"),
  2184. SND_SOC_DAPM_OUTPUT("ADC3_OUTPUT"),
  2185. };
  2186. static const struct snd_soc_dapm_route wcd937x_audio_map[] = {
  2187. {"WCD_TX_DUMMY", NULL, "WCD_TX_OUTPUT"},
  2188. {"WCD_TX_OUTPUT", NULL, "ADC1_MIXER"},
  2189. {"ADC1_MIXER", "Switch", "ADC1 REQ"},
  2190. {"ADC1 REQ", NULL, "ADC1"},
  2191. {"ADC1", NULL, "AMIC1"},
  2192. {"WCD_TX_OUTPUT", NULL, "ADC2_MIXER"},
  2193. {"ADC2_MIXER", "Switch", "ADC2 REQ"},
  2194. {"ADC2 REQ", NULL, "ADC2"},
  2195. {"ADC2", NULL, "ADC2 MUX"},
  2196. {"ADC2 MUX", "INP3", "AMIC3"},
  2197. {"ADC2 MUX", "INP2", "AMIC2"},
  2198. {"IN1_HPHL", NULL, "WCD_RX_DUMMY"},
  2199. {"IN1_HPHL", NULL, "VDD_BUCK"},
  2200. {"IN1_HPHL", NULL, "CLS_H_PORT"},
  2201. {"RX1", NULL, "IN1_HPHL"},
  2202. {"RDAC1", NULL, "RX1"},
  2203. {"HPHL_RDAC", "Switch", "RDAC1"},
  2204. {"HPHL PGA", NULL, "HPHL_RDAC"},
  2205. {"HPHL", NULL, "HPHL PGA"},
  2206. {"IN2_HPHR", NULL, "WCD_RX_DUMMY"},
  2207. {"IN2_HPHR", NULL, "VDD_BUCK"},
  2208. {"IN2_HPHR", NULL, "CLS_H_PORT"},
  2209. {"RX2", NULL, "IN2_HPHR"},
  2210. {"RDAC2", NULL, "RX2"},
  2211. {"HPHR_RDAC", "Switch", "RDAC2"},
  2212. {"HPHR PGA", NULL, "HPHR_RDAC"},
  2213. {"HPHR", NULL, "HPHR PGA"},
  2214. {"IN3_AUX", NULL, "WCD_RX_DUMMY"},
  2215. {"IN3_AUX", NULL, "VDD_BUCK"},
  2216. {"IN3_AUX", NULL, "CLS_H_PORT"},
  2217. {"RX3", NULL, "IN3_AUX"},
  2218. {"RDAC4", NULL, "RX3"},
  2219. {"AUX_RDAC", "Switch", "RDAC4"},
  2220. {"AUX PGA", NULL, "AUX_RDAC"},
  2221. {"AUX", NULL, "AUX PGA"},
  2222. {"RDAC3_MUX", "RX3", "RX3"},
  2223. {"RDAC3_MUX", "RX1", "RX1"},
  2224. {"RDAC3", NULL, "RDAC3_MUX"},
  2225. {"EAR_RDAC", "Switch", "RDAC3"},
  2226. {"EAR PGA", NULL, "EAR_RDAC"},
  2227. {"EAR", NULL, "EAR PGA"},
  2228. };
  2229. static const struct snd_soc_dapm_route wcd9375_audio_map[] = {
  2230. {"WCD_TX_DUMMY", NULL, "WCD_TX_OUTPUT"},
  2231. {"WCD_TX_OUTPUT", NULL, "ADC3_MIXER"},
  2232. {"ADC3_OUTPUT", NULL, "ADC3_MIXER"},
  2233. {"ADC3_MIXER", "Switch", "ADC3 REQ"},
  2234. {"ADC3 REQ", NULL, "ADC3"},
  2235. {"ADC3", NULL, "AMIC4"},
  2236. {"WCD_TX_OUTPUT", NULL, "DMIC1_MIXER"},
  2237. {"DMIC1_OUTPUT", NULL, "DMIC1_MIXER"},
  2238. {"DMIC1_MIXER", "Switch", "DMIC1"},
  2239. {"WCD_TX_OUTPUT", NULL, "DMIC2_MIXER"},
  2240. {"DMIC2_OUTPUT", NULL, "DMIC2_MIXER"},
  2241. {"DMIC2_MIXER", "Switch", "DMIC2"},
  2242. {"WCD_TX_OUTPUT", NULL, "DMIC3_MIXER"},
  2243. {"DMIC3_OUTPUT", NULL, "DMIC3_MIXER"},
  2244. {"DMIC3_MIXER", "Switch", "DMIC3"},
  2245. {"WCD_TX_OUTPUT", NULL, "DMIC4_MIXER"},
  2246. {"DMIC4_OUTPUT", NULL, "DMIC4_MIXER"},
  2247. {"DMIC4_MIXER", "Switch", "DMIC4"},
  2248. {"WCD_TX_OUTPUT", NULL, "DMIC5_MIXER"},
  2249. {"DMIC5_OUTPUT", NULL, "DMIC5_MIXER"},
  2250. {"DMIC5_MIXER", "Switch", "DMIC5"},
  2251. {"WCD_TX_OUTPUT", NULL, "DMIC6_MIXER"},
  2252. {"DMIC6_OUTPUT", NULL, "DMIC6_MIXER"},
  2253. {"DMIC6_MIXER", "Switch", "DMIC6"},
  2254. };
  2255. static ssize_t wcd937x_version_read(struct snd_info_entry *entry,
  2256. void *file_private_data,
  2257. struct file *file,
  2258. char __user *buf, size_t count,
  2259. loff_t pos)
  2260. {
  2261. struct wcd937x_priv *priv;
  2262. char buffer[WCD937X_VERSION_ENTRY_SIZE];
  2263. int len = 0;
  2264. priv = (struct wcd937x_priv *) entry->private_data;
  2265. if (!priv) {
  2266. pr_err("%s: wcd937x priv is null\n", __func__);
  2267. return -EINVAL;
  2268. }
  2269. switch (priv->version) {
  2270. case WCD937X_VERSION_1_0:
  2271. len = snprintf(buffer, sizeof(buffer), "WCD937X_1_0\n");
  2272. break;
  2273. default:
  2274. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  2275. }
  2276. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  2277. }
  2278. static struct snd_info_entry_ops wcd937x_info_ops = {
  2279. .read = wcd937x_version_read,
  2280. };
  2281. static ssize_t wcd937x_variant_read(struct snd_info_entry *entry,
  2282. void *file_private_data,
  2283. struct file *file,
  2284. char __user *buf, size_t count,
  2285. loff_t pos)
  2286. {
  2287. struct wcd937x_priv *priv;
  2288. char buffer[WCD937X_VARIANT_ENTRY_SIZE];
  2289. int len = 0;
  2290. priv = (struct wcd937x_priv *) entry->private_data;
  2291. if (!priv) {
  2292. pr_err("%s: wcd937x priv is null\n", __func__);
  2293. return -EINVAL;
  2294. }
  2295. switch (priv->variant) {
  2296. case WCD9370_VARIANT:
  2297. len = snprintf(buffer, sizeof(buffer), "WCD9370\n");
  2298. break;
  2299. case WCD9375_VARIANT:
  2300. len = snprintf(buffer, sizeof(buffer), "WCD9375\n");
  2301. break;
  2302. default:
  2303. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  2304. }
  2305. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  2306. }
  2307. static struct snd_info_entry_ops wcd937x_variant_ops = {
  2308. .read = wcd937x_variant_read,
  2309. };
  2310. /*
  2311. * wcd937x_info_create_codec_entry - creates wcd937x module
  2312. * @codec_root: The parent directory
  2313. * @component: component instance
  2314. *
  2315. * Creates wcd937x module, variant and version entry under the given
  2316. * parent directory.
  2317. *
  2318. * Return: 0 on success or negative error code on failure.
  2319. */
  2320. int wcd937x_info_create_codec_entry(struct snd_info_entry *codec_root,
  2321. struct snd_soc_component *component)
  2322. {
  2323. struct snd_info_entry *version_entry;
  2324. struct snd_info_entry *variant_entry;
  2325. struct wcd937x_priv *priv;
  2326. struct snd_soc_card *card;
  2327. if (!codec_root || !component)
  2328. return -EINVAL;
  2329. priv = snd_soc_component_get_drvdata(component);
  2330. if (priv->entry) {
  2331. dev_dbg(priv->dev,
  2332. "%s:wcd937x module already created\n", __func__);
  2333. return 0;
  2334. }
  2335. card = component->card;
  2336. priv->entry = snd_info_create_module_entry(codec_root->module,
  2337. "wcd937x", codec_root);
  2338. if (!priv->entry) {
  2339. dev_dbg(component->dev, "%s: failed to create wcd937x entry\n",
  2340. __func__);
  2341. return -ENOMEM;
  2342. }
  2343. priv->entry->mode = S_IFDIR | 0555;
  2344. if (snd_info_register(priv->entry) < 0) {
  2345. snd_info_free_entry(priv->entry);
  2346. return -ENOMEM;
  2347. }
  2348. version_entry = snd_info_create_card_entry(card->snd_card,
  2349. "version",
  2350. priv->entry);
  2351. if (!version_entry) {
  2352. dev_dbg(component->dev, "%s: failed to create wcd937x version entry\n",
  2353. __func__);
  2354. snd_info_free_entry(priv->entry);
  2355. return -ENOMEM;
  2356. }
  2357. version_entry->private_data = priv;
  2358. version_entry->size = WCD937X_VERSION_ENTRY_SIZE;
  2359. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  2360. version_entry->c.ops = &wcd937x_info_ops;
  2361. if (snd_info_register(version_entry) < 0) {
  2362. snd_info_free_entry(version_entry);
  2363. snd_info_free_entry(priv->entry);
  2364. return -ENOMEM;
  2365. }
  2366. priv->version_entry = version_entry;
  2367. variant_entry = snd_info_create_card_entry(card->snd_card,
  2368. "variant",
  2369. priv->entry);
  2370. if (!variant_entry) {
  2371. dev_dbg(component->dev,
  2372. "%s: failed to create wcd937x variant entry\n",
  2373. __func__);
  2374. snd_info_free_entry(version_entry);
  2375. snd_info_free_entry(priv->entry);
  2376. return -ENOMEM;
  2377. }
  2378. variant_entry->private_data = priv;
  2379. variant_entry->size = WCD937X_VARIANT_ENTRY_SIZE;
  2380. variant_entry->content = SNDRV_INFO_CONTENT_DATA;
  2381. variant_entry->c.ops = &wcd937x_variant_ops;
  2382. if (snd_info_register(variant_entry) < 0) {
  2383. snd_info_free_entry(variant_entry);
  2384. snd_info_free_entry(version_entry);
  2385. snd_info_free_entry(priv->entry);
  2386. return -ENOMEM;
  2387. }
  2388. priv->variant_entry = variant_entry;
  2389. return 0;
  2390. }
  2391. EXPORT_SYMBOL(wcd937x_info_create_codec_entry);
  2392. static int wcd937x_set_micbias_data(struct wcd937x_priv *wcd937x,
  2393. struct wcd937x_pdata *pdata)
  2394. {
  2395. int vout_ctl_1 = 0, vout_ctl_2 = 0, vout_ctl_3 = 0;
  2396. int rc = 0;
  2397. if (!pdata) {
  2398. dev_err(wcd937x->dev, "%s: NULL pdata\n", __func__);
  2399. return -ENODEV;
  2400. }
  2401. /* set micbias voltage */
  2402. vout_ctl_1 = wcd937x_get_micb_vout_ctl_val(pdata->micbias.micb1_mv);
  2403. vout_ctl_2 = wcd937x_get_micb_vout_ctl_val(pdata->micbias.micb2_mv);
  2404. vout_ctl_3 = wcd937x_get_micb_vout_ctl_val(pdata->micbias.micb3_mv);
  2405. if (vout_ctl_1 < 0 || vout_ctl_2 < 0 || vout_ctl_3 < 0) {
  2406. rc = -EINVAL;
  2407. goto done;
  2408. }
  2409. regmap_update_bits(wcd937x->regmap, WCD937X_ANA_MICB1, 0x3F,
  2410. vout_ctl_1);
  2411. regmap_update_bits(wcd937x->regmap, WCD937X_ANA_MICB2, 0x3F,
  2412. vout_ctl_2);
  2413. regmap_update_bits(wcd937x->regmap, WCD937X_ANA_MICB3, 0x3F,
  2414. vout_ctl_3);
  2415. done:
  2416. return rc;
  2417. }
  2418. static int wcd937x_soc_codec_probe(struct snd_soc_component *component)
  2419. {
  2420. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  2421. struct snd_soc_dapm_context *dapm =
  2422. snd_soc_component_get_dapm(component);
  2423. int variant;
  2424. int ret = -EINVAL;
  2425. dev_info(component->dev, "%s()\n", __func__);
  2426. wcd937x = snd_soc_component_get_drvdata(component);
  2427. if (!wcd937x)
  2428. return -EINVAL;
  2429. wcd937x->component = component;
  2430. snd_soc_component_init_regmap(component, wcd937x->regmap);
  2431. variant = (snd_soc_component_read32(
  2432. component, WCD937X_DIGITAL_EFUSE_REG_0) & 0x1E) >> 1;
  2433. wcd937x->variant = variant;
  2434. wcd937x->fw_data = devm_kzalloc(component->dev,
  2435. sizeof(*(wcd937x->fw_data)),
  2436. GFP_KERNEL);
  2437. if (!wcd937x->fw_data) {
  2438. dev_err(component->dev, "Failed to allocate fw_data\n");
  2439. ret = -ENOMEM;
  2440. goto err;
  2441. }
  2442. set_bit(WCD9XXX_MBHC_CAL, wcd937x->fw_data->cal_bit);
  2443. ret = wcd_cal_create_hwdep(wcd937x->fw_data,
  2444. WCD9XXX_CODEC_HWDEP_NODE, component);
  2445. if (ret < 0) {
  2446. dev_err(component->dev, "%s hwdep failed %d\n", __func__, ret);
  2447. goto err_hwdep;
  2448. }
  2449. ret = wcd937x_mbhc_init(&wcd937x->mbhc, component, wcd937x->fw_data);
  2450. if (ret) {
  2451. pr_err("%s: mbhc initialization failed\n", __func__);
  2452. goto err_hwdep;
  2453. }
  2454. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  2455. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  2456. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  2457. snd_soc_dapm_ignore_suspend(dapm, "IN1_HPHL");
  2458. snd_soc_dapm_ignore_suspend(dapm, "IN2_HPHR");
  2459. snd_soc_dapm_ignore_suspend(dapm, "IN3_AUX");
  2460. snd_soc_dapm_ignore_suspend(dapm, "ADC1_OUTPUT");
  2461. snd_soc_dapm_ignore_suspend(dapm, "ADC2_OUTPUT");
  2462. snd_soc_dapm_ignore_suspend(dapm, "WCD_TX_OUTPUT");
  2463. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  2464. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  2465. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  2466. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  2467. snd_soc_dapm_ignore_suspend(dapm, "WCD_TX_DUMMY");
  2468. snd_soc_dapm_ignore_suspend(dapm, "WCD_RX_DUMMY");
  2469. snd_soc_dapm_sync(dapm);
  2470. wcd_cls_h_init(&wcd937x->clsh_info);
  2471. wcd937x_init_reg(component);
  2472. if (wcd937x->variant == WCD9375_VARIANT) {
  2473. ret = snd_soc_dapm_new_controls(dapm, wcd9375_dapm_widgets,
  2474. ARRAY_SIZE(wcd9375_dapm_widgets));
  2475. if (ret < 0) {
  2476. dev_err(component->dev, "%s: Failed to add snd_ctls\n",
  2477. __func__);
  2478. goto err_hwdep;
  2479. }
  2480. ret = snd_soc_dapm_add_routes(dapm, wcd9375_audio_map,
  2481. ARRAY_SIZE(wcd9375_audio_map));
  2482. if (ret < 0) {
  2483. dev_err(component->dev, "%s: Failed to add routes\n",
  2484. __func__);
  2485. goto err_hwdep;
  2486. }
  2487. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  2488. snd_soc_dapm_ignore_suspend(dapm, "DMIC1_OUTPUT");
  2489. snd_soc_dapm_ignore_suspend(dapm, "DMIC2_OUTPUT");
  2490. snd_soc_dapm_ignore_suspend(dapm, "DMIC3_OUTPUT");
  2491. snd_soc_dapm_ignore_suspend(dapm, "DMIC4_OUTPUT");
  2492. snd_soc_dapm_ignore_suspend(dapm, "DMIC5_OUTPUT");
  2493. snd_soc_dapm_ignore_suspend(dapm, "DMIC6_OUTPUT");
  2494. snd_soc_dapm_ignore_suspend(dapm, "ADC3_OUTPUT");
  2495. snd_soc_dapm_sync(dapm);
  2496. }
  2497. wcd937x->version = WCD937X_VERSION_1_0;
  2498. /* Register event notifier */
  2499. wcd937x->nblock.notifier_call = wcd937x_event_notify;
  2500. if (wcd937x->register_notifier) {
  2501. ret = wcd937x->register_notifier(wcd937x->handle,
  2502. &wcd937x->nblock,
  2503. true);
  2504. if (ret) {
  2505. dev_err(component->dev,
  2506. "%s: Failed to register notifier %d\n",
  2507. __func__, ret);
  2508. return ret;
  2509. }
  2510. }
  2511. return ret;
  2512. err_hwdep:
  2513. wcd937x->fw_data = NULL;
  2514. err:
  2515. return ret;
  2516. }
  2517. static void wcd937x_soc_codec_remove(struct snd_soc_component *component)
  2518. {
  2519. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  2520. if (!wcd937x)
  2521. return;
  2522. if (wcd937x->register_notifier)
  2523. wcd937x->register_notifier(wcd937x->handle,
  2524. &wcd937x->nblock,
  2525. false);
  2526. return;
  2527. }
  2528. static const struct snd_soc_component_driver soc_codec_dev_wcd937x = {
  2529. .name = WCD937X_DRV_NAME,
  2530. .probe = wcd937x_soc_codec_probe,
  2531. .remove = wcd937x_soc_codec_remove,
  2532. .controls = wcd937x_snd_controls,
  2533. .num_controls = ARRAY_SIZE(wcd937x_snd_controls),
  2534. .dapm_widgets = wcd937x_dapm_widgets,
  2535. .num_dapm_widgets = ARRAY_SIZE(wcd937x_dapm_widgets),
  2536. .dapm_routes = wcd937x_audio_map,
  2537. .num_dapm_routes = ARRAY_SIZE(wcd937x_audio_map),
  2538. };
  2539. #ifdef CONFIG_PM_SLEEP
  2540. static int wcd937x_suspend(struct device *dev)
  2541. {
  2542. struct wcd937x_priv *wcd937x = NULL;
  2543. int ret = 0;
  2544. struct wcd937x_pdata *pdata = NULL;
  2545. if (!dev)
  2546. return -ENODEV;
  2547. wcd937x = dev_get_drvdata(dev);
  2548. if (!wcd937x)
  2549. return -EINVAL;
  2550. pdata = dev_get_platdata(wcd937x->dev);
  2551. if (!pdata) {
  2552. dev_err(dev, "%s: pdata is NULL\n", __func__);
  2553. return -EINVAL;
  2554. }
  2555. if (test_bit(ALLOW_BUCK_DISABLE, &wcd937x->status_mask)) {
  2556. ret = msm_cdc_disable_ondemand_supply(wcd937x->dev,
  2557. wcd937x->supplies,
  2558. pdata->regulator,
  2559. pdata->num_supplies,
  2560. "cdc-vdd-buck");
  2561. if (ret == -EINVAL) {
  2562. dev_err(dev, "%s: vdd buck is not disabled\n",
  2563. __func__);
  2564. return 0;
  2565. }
  2566. clear_bit(ALLOW_BUCK_DISABLE, &wcd937x->status_mask);
  2567. }
  2568. return 0;
  2569. }
  2570. static int wcd937x_resume(struct device *dev)
  2571. {
  2572. return 0;
  2573. }
  2574. #endif
  2575. static int wcd937x_reset(struct device *dev)
  2576. {
  2577. struct wcd937x_priv *wcd937x = NULL;
  2578. int rc = 0;
  2579. int value = 0;
  2580. if (!dev)
  2581. return -ENODEV;
  2582. wcd937x = dev_get_drvdata(dev);
  2583. if (!wcd937x)
  2584. return -EINVAL;
  2585. if (!wcd937x->rst_np) {
  2586. dev_err(dev, "%s: reset gpio device node not specified\n",
  2587. __func__);
  2588. return -EINVAL;
  2589. }
  2590. value = msm_cdc_pinctrl_get_state(wcd937x->rst_np);
  2591. if (value > 0)
  2592. return 0;
  2593. rc = msm_cdc_pinctrl_select_sleep_state(wcd937x->rst_np);
  2594. if (rc) {
  2595. dev_err(dev, "%s: wcd sleep state request fail!\n",
  2596. __func__);
  2597. return rc;
  2598. }
  2599. /* 20ms sleep required after pulling the reset gpio to LOW */
  2600. usleep_range(20, 30);
  2601. rc = msm_cdc_pinctrl_select_active_state(wcd937x->rst_np);
  2602. if (rc) {
  2603. dev_err(dev, "%s: wcd active state request fail!\n",
  2604. __func__);
  2605. return rc;
  2606. }
  2607. /* 20ms sleep required after pulling the reset gpio to HIGH */
  2608. usleep_range(20, 30);
  2609. return rc;
  2610. }
  2611. static int wcd937x_read_of_property_u32(struct device *dev, const char *name,
  2612. u32 *val)
  2613. {
  2614. int rc = 0;
  2615. rc = of_property_read_u32(dev->of_node, name, val);
  2616. if (rc)
  2617. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  2618. __func__, name, dev->of_node->full_name);
  2619. return rc;
  2620. }
  2621. static void wcd937x_dt_parse_micbias_info(struct device *dev,
  2622. struct wcd937x_micbias_setting *mb)
  2623. {
  2624. u32 prop_val = 0;
  2625. int rc = 0;
  2626. /* MB1 */
  2627. if (of_find_property(dev->of_node, "qcom,cdc-micbias1-mv",
  2628. NULL)) {
  2629. rc = wcd937x_read_of_property_u32(dev,
  2630. "qcom,cdc-micbias1-mv",
  2631. &prop_val);
  2632. if (!rc)
  2633. mb->micb1_mv = prop_val;
  2634. } else {
  2635. dev_info(dev, "%s: Micbias1 DT property not found\n",
  2636. __func__);
  2637. }
  2638. /* MB2 */
  2639. if (of_find_property(dev->of_node, "qcom,cdc-micbias2-mv",
  2640. NULL)) {
  2641. rc = wcd937x_read_of_property_u32(dev,
  2642. "qcom,cdc-micbias2-mv",
  2643. &prop_val);
  2644. if (!rc)
  2645. mb->micb2_mv = prop_val;
  2646. } else {
  2647. dev_info(dev, "%s: Micbias2 DT property not found\n",
  2648. __func__);
  2649. }
  2650. /* MB3 */
  2651. if (of_find_property(dev->of_node, "qcom,cdc-micbias3-mv",
  2652. NULL)) {
  2653. rc = wcd937x_read_of_property_u32(dev,
  2654. "qcom,cdc-micbias3-mv",
  2655. &prop_val);
  2656. if (!rc)
  2657. mb->micb3_mv = prop_val;
  2658. } else {
  2659. dev_info(dev, "%s: Micbias3 DT property not found\n",
  2660. __func__);
  2661. }
  2662. }
  2663. static int wcd937x_reset_low(struct device *dev)
  2664. {
  2665. struct wcd937x_priv *wcd937x = NULL;
  2666. int rc = 0;
  2667. if (!dev)
  2668. return -ENODEV;
  2669. wcd937x = dev_get_drvdata(dev);
  2670. if (!wcd937x)
  2671. return -EINVAL;
  2672. if (!wcd937x->rst_np) {
  2673. dev_err(dev, "%s: reset gpio device node not specified\n",
  2674. __func__);
  2675. return -EINVAL;
  2676. }
  2677. rc = msm_cdc_pinctrl_select_sleep_state(wcd937x->rst_np);
  2678. if (rc) {
  2679. dev_err(dev, "%s: wcd sleep state request fail!\n",
  2680. __func__);
  2681. return rc;
  2682. }
  2683. /* 20ms sleep required after pulling the reset gpio to LOW */
  2684. usleep_range(20, 30);
  2685. return rc;
  2686. }
  2687. struct wcd937x_pdata *wcd937x_populate_dt_data(struct device *dev)
  2688. {
  2689. struct wcd937x_pdata *pdata = NULL;
  2690. pdata = kzalloc(sizeof(struct wcd937x_pdata),
  2691. GFP_KERNEL);
  2692. if (!pdata)
  2693. return NULL;
  2694. pdata->rst_np = of_parse_phandle(dev->of_node,
  2695. "qcom,wcd-rst-gpio-node", 0);
  2696. if (!pdata->rst_np) {
  2697. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  2698. __func__, "qcom,wcd-rst-gpio-node",
  2699. dev->of_node->full_name);
  2700. return NULL;
  2701. }
  2702. /* Parse power supplies */
  2703. msm_cdc_get_power_supplies(dev, &pdata->regulator,
  2704. &pdata->num_supplies);
  2705. if (!pdata->regulator || (pdata->num_supplies <= 0)) {
  2706. dev_err(dev, "%s: no power supplies defined for codec\n",
  2707. __func__);
  2708. return NULL;
  2709. }
  2710. pdata->rx_slave = of_parse_phandle(dev->of_node, "qcom,rx-slave", 0);
  2711. pdata->tx_slave = of_parse_phandle(dev->of_node, "qcom,tx-slave", 0);
  2712. wcd937x_dt_parse_micbias_info(dev, &pdata->micbias);
  2713. return pdata;
  2714. }
  2715. static int wcd937x_wakeup(void *handle, bool enable)
  2716. {
  2717. struct wcd937x_priv *priv;
  2718. if (!handle) {
  2719. pr_err("%s: NULL handle\n", __func__);
  2720. return -EINVAL;
  2721. }
  2722. priv = (struct wcd937x_priv *)handle;
  2723. if (!priv->tx_swr_dev) {
  2724. pr_err("%s: tx swr dev is NULL\n", __func__);
  2725. return -EINVAL;
  2726. }
  2727. if (enable)
  2728. return swr_device_wakeup_vote(priv->tx_swr_dev);
  2729. else
  2730. return swr_device_wakeup_unvote(priv->tx_swr_dev);
  2731. }
  2732. static irqreturn_t wcd937x_wd_handle_irq(int irq, void *data)
  2733. {
  2734. pr_err_ratelimited("%s: Watchdog interrupt for irq =%d triggered\n",
  2735. __func__, irq);
  2736. return IRQ_HANDLED;
  2737. }
  2738. static int wcd937x_bind(struct device *dev)
  2739. {
  2740. int ret = 0, i = 0;
  2741. struct wcd937x_priv *wcd937x = NULL;
  2742. struct wcd937x_pdata *pdata = NULL;
  2743. struct wcd_ctrl_platform_data *plat_data = NULL;
  2744. wcd937x = kzalloc(sizeof(struct wcd937x_priv), GFP_KERNEL);
  2745. if (!wcd937x)
  2746. return -ENOMEM;
  2747. dev_set_drvdata(dev, wcd937x);
  2748. pdata = wcd937x_populate_dt_data(dev);
  2749. if (!pdata) {
  2750. dev_err(dev, "%s: Fail to obtain platform data\n", __func__);
  2751. return -EINVAL;
  2752. }
  2753. wcd937x->dev = dev;
  2754. wcd937x->dev->platform_data = pdata;
  2755. wcd937x->rst_np = pdata->rst_np;
  2756. ret = msm_cdc_init_supplies(dev, &wcd937x->supplies,
  2757. pdata->regulator, pdata->num_supplies);
  2758. if (!wcd937x->supplies) {
  2759. dev_err(dev, "%s: Cannot init wcd supplies\n",
  2760. __func__);
  2761. goto err_bind_all;
  2762. }
  2763. plat_data = dev_get_platdata(dev->parent);
  2764. if (!plat_data) {
  2765. dev_err(dev, "%s: platform data from parent is NULL\n",
  2766. __func__);
  2767. ret = -EINVAL;
  2768. goto err_bind_all;
  2769. }
  2770. wcd937x->handle = (void *)plat_data->handle;
  2771. if (!wcd937x->handle) {
  2772. dev_err(dev, "%s: handle is NULL\n", __func__);
  2773. ret = -EINVAL;
  2774. goto err_bind_all;
  2775. }
  2776. wcd937x->update_wcd_event = plat_data->update_wcd_event;
  2777. if (!wcd937x->update_wcd_event) {
  2778. dev_err(dev, "%s: update_wcd_event api is null!\n",
  2779. __func__);
  2780. ret = -EINVAL;
  2781. goto err_bind_all;
  2782. }
  2783. wcd937x->register_notifier = plat_data->register_notifier;
  2784. if (!wcd937x->register_notifier) {
  2785. dev_err(dev, "%s: register_notifier api is null!\n",
  2786. __func__);
  2787. ret = -EINVAL;
  2788. goto err_bind_all;
  2789. }
  2790. ret = msm_cdc_enable_static_supplies(dev, wcd937x->supplies,
  2791. pdata->regulator,
  2792. pdata->num_supplies);
  2793. if (ret) {
  2794. dev_err(dev, "%s: wcd static supply enable failed!\n",
  2795. __func__);
  2796. goto err_bind_all;
  2797. }
  2798. wcd937x_reset(dev);
  2799. /*
  2800. * Add 5msec delay to provide sufficient time for
  2801. * soundwire auto enumeration of slave devices as
  2802. * as per HW requirement.
  2803. */
  2804. usleep_range(5000, 5010);
  2805. wcd937x->wakeup = wcd937x_wakeup;
  2806. ret = component_bind_all(dev, wcd937x);
  2807. if (ret) {
  2808. dev_err(dev, "%s: Slave bind failed, ret = %d\n",
  2809. __func__, ret);
  2810. goto err_bind_all;
  2811. }
  2812. ret = wcd937x_parse_port_mapping(dev, "qcom,rx_swr_ch_map", CODEC_RX);
  2813. ret |= wcd937x_parse_port_mapping(dev, "qcom,tx_swr_ch_map", CODEC_TX);
  2814. if (ret) {
  2815. dev_err(dev, "Failed to read port mapping\n");
  2816. goto err;
  2817. }
  2818. wcd937x->rx_swr_dev = get_matching_swr_slave_device(pdata->rx_slave);
  2819. if (!wcd937x->rx_swr_dev) {
  2820. dev_err(dev, "%s: Could not find RX swr slave device\n",
  2821. __func__);
  2822. ret = -ENODEV;
  2823. goto err;
  2824. }
  2825. wcd937x->tx_swr_dev = get_matching_swr_slave_device(pdata->tx_slave);
  2826. if (!wcd937x->tx_swr_dev) {
  2827. dev_err(dev, "%s: Could not find TX swr slave device\n",
  2828. __func__);
  2829. ret = -ENODEV;
  2830. goto err;
  2831. }
  2832. wcd937x->regmap = devm_regmap_init_swr(wcd937x->tx_swr_dev,
  2833. &wcd937x_regmap_config);
  2834. if (!wcd937x->regmap) {
  2835. dev_err(dev, "%s: Regmap init failed\n",
  2836. __func__);
  2837. goto err;
  2838. }
  2839. /* Set all interupts as edge triggered */
  2840. for (i = 0; i < wcd937x_regmap_irq_chip.num_regs; i++)
  2841. regmap_write(wcd937x->regmap,
  2842. (WCD937X_DIGITAL_INTR_LEVEL_0 + i), 0);
  2843. wcd937x_regmap_irq_chip.irq_drv_data = wcd937x;
  2844. wcd937x->irq_info.wcd_regmap_irq_chip = &wcd937x_regmap_irq_chip;
  2845. wcd937x->irq_info.codec_name = "WCD937X";
  2846. wcd937x->irq_info.regmap = wcd937x->regmap;
  2847. wcd937x->irq_info.dev = dev;
  2848. ret = wcd_irq_init(&wcd937x->irq_info, &wcd937x->virq);
  2849. if (ret) {
  2850. dev_err(dev, "%s: IRQ init failed: %d\n",
  2851. __func__, ret);
  2852. goto err;
  2853. }
  2854. wcd937x->tx_swr_dev->slave_irq = wcd937x->virq;
  2855. ret = wcd937x_set_micbias_data(wcd937x, pdata);
  2856. if (ret < 0) {
  2857. dev_err(dev, "%s: bad micbias pdata\n", __func__);
  2858. goto err_irq;
  2859. }
  2860. /* default L1 power setting */
  2861. wcd937x->tx_ch_pwr[0] = 1;
  2862. wcd937x->tx_ch_pwr[1] = 1;
  2863. mutex_init(&wcd937x->micb_lock);
  2864. mutex_init(&wcd937x->ana_tx_clk_lock);
  2865. /* Request for watchdog interrupt */
  2866. wcd_request_irq(&wcd937x->irq_info, WCD937X_IRQ_HPHR_PDM_WD_INT,
  2867. "HPHR PDM WD INT", wcd937x_wd_handle_irq, NULL);
  2868. wcd_request_irq(&wcd937x->irq_info, WCD937X_IRQ_HPHL_PDM_WD_INT,
  2869. "HPHL PDM WD INT", wcd937x_wd_handle_irq, NULL);
  2870. wcd_request_irq(&wcd937x->irq_info, WCD937X_IRQ_AUX_PDM_WD_INT,
  2871. "AUX PDM WD INT", wcd937x_wd_handle_irq, NULL);
  2872. /* Disable watchdog interrupt for HPH and AUX */
  2873. wcd_disable_irq(&wcd937x->irq_info, WCD937X_IRQ_HPHR_PDM_WD_INT);
  2874. wcd_disable_irq(&wcd937x->irq_info, WCD937X_IRQ_HPHL_PDM_WD_INT);
  2875. wcd_disable_irq(&wcd937x->irq_info, WCD937X_IRQ_AUX_PDM_WD_INT);
  2876. ret = snd_soc_register_component(dev, &soc_codec_dev_wcd937x,
  2877. wcd937x_dai, ARRAY_SIZE(wcd937x_dai));
  2878. if (ret) {
  2879. dev_err(dev, "%s: Codec registration failed\n",
  2880. __func__);
  2881. goto err_irq;
  2882. }
  2883. return ret;
  2884. err_irq:
  2885. wcd_irq_exit(&wcd937x->irq_info, wcd937x->virq);
  2886. err:
  2887. component_unbind_all(dev, wcd937x);
  2888. err_bind_all:
  2889. dev_set_drvdata(dev, NULL);
  2890. kfree(pdata);
  2891. kfree(wcd937x);
  2892. return ret;
  2893. }
  2894. static void wcd937x_unbind(struct device *dev)
  2895. {
  2896. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  2897. struct wcd937x_pdata *pdata = dev_get_platdata(wcd937x->dev);
  2898. wcd_irq_exit(&wcd937x->irq_info, wcd937x->virq);
  2899. snd_soc_unregister_component(dev);
  2900. component_unbind_all(dev, wcd937x);
  2901. mutex_destroy(&wcd937x->micb_lock);
  2902. mutex_destroy(&wcd937x->ana_tx_clk_lock);
  2903. dev_set_drvdata(dev, NULL);
  2904. kfree(pdata);
  2905. kfree(wcd937x);
  2906. }
  2907. static const struct of_device_id wcd937x_dt_match[] = {
  2908. { .compatible = "qcom,wcd937x-codec" , .data = "wcd937x" },
  2909. {}
  2910. };
  2911. static const struct component_master_ops wcd937x_comp_ops = {
  2912. .bind = wcd937x_bind,
  2913. .unbind = wcd937x_unbind,
  2914. };
  2915. static int wcd937x_compare_of(struct device *dev, void *data)
  2916. {
  2917. return dev->of_node == data;
  2918. }
  2919. static void wcd937x_release_of(struct device *dev, void *data)
  2920. {
  2921. of_node_put(data);
  2922. }
  2923. static int wcd937x_add_slave_components(struct device *dev,
  2924. struct component_match **matchptr)
  2925. {
  2926. struct device_node *np, *rx_node, *tx_node;
  2927. np = dev->of_node;
  2928. rx_node = of_parse_phandle(np, "qcom,rx-slave", 0);
  2929. if (!rx_node) {
  2930. dev_err(dev, "%s: Rx-slave node not defined\n", __func__);
  2931. return -ENODEV;
  2932. }
  2933. of_node_get(rx_node);
  2934. component_match_add_release(dev, matchptr,
  2935. wcd937x_release_of,
  2936. wcd937x_compare_of,
  2937. rx_node);
  2938. tx_node = of_parse_phandle(np, "qcom,tx-slave", 0);
  2939. if (!tx_node) {
  2940. dev_err(dev, "%s: Tx-slave node not defined\n", __func__);
  2941. return -ENODEV;
  2942. }
  2943. of_node_get(tx_node);
  2944. component_match_add_release(dev, matchptr,
  2945. wcd937x_release_of,
  2946. wcd937x_compare_of,
  2947. tx_node);
  2948. return 0;
  2949. }
  2950. static int wcd937x_probe(struct platform_device *pdev)
  2951. {
  2952. struct component_match *match = NULL;
  2953. int ret;
  2954. ret = wcd937x_add_slave_components(&pdev->dev, &match);
  2955. if (ret)
  2956. return ret;
  2957. return component_master_add_with_match(&pdev->dev,
  2958. &wcd937x_comp_ops, match);
  2959. }
  2960. static int wcd937x_remove(struct platform_device *pdev)
  2961. {
  2962. component_master_del(&pdev->dev, &wcd937x_comp_ops);
  2963. dev_set_drvdata(&pdev->dev, NULL);
  2964. return 0;
  2965. }
  2966. #ifdef CONFIG_PM_SLEEP
  2967. static const struct dev_pm_ops wcd937x_dev_pm_ops = {
  2968. SET_SYSTEM_SLEEP_PM_OPS(
  2969. wcd937x_suspend,
  2970. wcd937x_resume
  2971. )
  2972. };
  2973. #endif
  2974. static struct platform_driver wcd937x_codec_driver = {
  2975. .probe = wcd937x_probe,
  2976. .remove = wcd937x_remove,
  2977. .driver = {
  2978. .name = "wcd937x_codec",
  2979. .owner = THIS_MODULE,
  2980. .of_match_table = of_match_ptr(wcd937x_dt_match),
  2981. #ifdef CONFIG_PM_SLEEP
  2982. .pm = &wcd937x_dev_pm_ops,
  2983. #endif
  2984. .suppress_bind_attrs = true,
  2985. },
  2986. };
  2987. module_platform_driver(wcd937x_codec_driver);
  2988. MODULE_DESCRIPTION("WCD937X Codec driver");
  2989. MODULE_LICENSE("GPL v2");