b27dcac106
Update HW include header files to DV release version R102 from R81. This is required to support emulation version E3 for all platforms. Note that this change only updates the _EXISTING_ header files, which already existed in the earlier version, and is also present in R102. Files which are required to be newly added to the git repository from the HW repository, as part of R102 upgrade will be added using a separate change. Change-Id: I934a343998d965457d2c5ffbc7dee31ec5208935 CRs-Fixed: 1105853
306 líneas
7.6 KiB
C
306 líneas
7.6 KiB
C
/*
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* Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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* above copyright notice and this permission notice appear in all
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* copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
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* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
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* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
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* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
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* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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// $ATH_LICENSE_HW_HDR_C$
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//
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// DO NOT EDIT! This file is automatically generated
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// These definitions are tied to a particular hardware layout
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#ifndef _REO_GET_QUEUE_STATS_H_
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#define _REO_GET_QUEUE_STATS_H_
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#if !defined(__ASSEMBLER__)
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#endif
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#include "uniform_reo_cmd_header.h"
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// ################ START SUMMARY #################
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//
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// Dword Fields
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// 0 struct uniform_reo_cmd_header cmd_header;
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// 1 rx_reo_queue_desc_addr_31_0[31:0]
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// 2 rx_reo_queue_desc_addr_39_32[7:0], clear_stats[8], reserved_2a[31:9]
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// 3 reserved_3a[31:0]
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// 4 reserved_4a[31:0]
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// 5 reserved_5a[31:0]
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// 6 reserved_6a[31:0]
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// 7 reserved_7a[31:0]
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// 8 reserved_8a[31:0]
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//
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// ################ END SUMMARY #################
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#define NUM_OF_DWORDS_REO_GET_QUEUE_STATS 9
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struct reo_get_queue_stats {
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struct uniform_reo_cmd_header cmd_header;
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uint32_t rx_reo_queue_desc_addr_31_0 : 32; //[31:0]
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uint32_t rx_reo_queue_desc_addr_39_32 : 8, //[7:0]
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clear_stats : 1, //[8]
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reserved_2a : 23; //[31:9]
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uint32_t reserved_3a : 32; //[31:0]
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uint32_t reserved_4a : 32; //[31:0]
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uint32_t reserved_5a : 32; //[31:0]
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uint32_t reserved_6a : 32; //[31:0]
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uint32_t reserved_7a : 32; //[31:0]
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uint32_t reserved_8a : 32; //[31:0]
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};
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/*
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struct uniform_reo_cmd_header cmd_header
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Consumer: REO
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Producer: SW
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Details for command execution tracking purposes.
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rx_reo_queue_desc_addr_31_0
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Consumer: REO
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Producer: SW
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Address (lower 32 bits) of the REO queue descriptor
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<legal all>
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rx_reo_queue_desc_addr_39_32
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Consumer: REO
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Producer: SW
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Address (upper 8 bits) of the REO queue descriptor
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<legal all>
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clear_stats
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Clear stat settings....
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<enum 0 no_clear> Do NOT clear the stats after
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generating the status
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<enum 1 clear_the_stats> Clear the stats after
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generating the status.
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The stats actually cleared are:
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Timeout_count
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Forward_due_to_bar_count
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Duplicate_count
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Frames_in_order_count
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BAR_received_count
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MPDU_Frames_processed_count
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MSDU_Frames_processed_count
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Total_processed_byte_count
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Late_receive_MPDU_count
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window_jump_2k
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Hole_count
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<legal 0-1>
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reserved_2a
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<legal 0>
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reserved_3a
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<legal 0>
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reserved_4a
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<legal 0>
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reserved_5a
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<legal 0>
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reserved_6a
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<legal 0>
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reserved_7a
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<legal 0>
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reserved_8a
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<legal 0>
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*/
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#define REO_GET_QUEUE_STATS_0_UNIFORM_REO_CMD_HEADER_CMD_HEADER_OFFSET 0x00000000
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#define REO_GET_QUEUE_STATS_0_UNIFORM_REO_CMD_HEADER_CMD_HEADER_LSB 0
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#define REO_GET_QUEUE_STATS_0_UNIFORM_REO_CMD_HEADER_CMD_HEADER_MASK 0xffffffff
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/* Description REO_GET_QUEUE_STATS_1_RX_REO_QUEUE_DESC_ADDR_31_0
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Consumer: REO
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Producer: SW
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Address (lower 32 bits) of the REO queue descriptor
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<legal all>
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*/
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#define REO_GET_QUEUE_STATS_1_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x00000004
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#define REO_GET_QUEUE_STATS_1_RX_REO_QUEUE_DESC_ADDR_31_0_LSB 0
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#define REO_GET_QUEUE_STATS_1_RX_REO_QUEUE_DESC_ADDR_31_0_MASK 0xffffffff
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/* Description REO_GET_QUEUE_STATS_2_RX_REO_QUEUE_DESC_ADDR_39_32
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Consumer: REO
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Producer: SW
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Address (upper 8 bits) of the REO queue descriptor
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<legal all>
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*/
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#define REO_GET_QUEUE_STATS_2_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x00000008
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#define REO_GET_QUEUE_STATS_2_RX_REO_QUEUE_DESC_ADDR_39_32_LSB 0
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#define REO_GET_QUEUE_STATS_2_RX_REO_QUEUE_DESC_ADDR_39_32_MASK 0x000000ff
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/* Description REO_GET_QUEUE_STATS_2_CLEAR_STATS
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Clear stat settings....
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<enum 0 no_clear> Do NOT clear the stats after
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generating the status
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<enum 1 clear_the_stats> Clear the stats after
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generating the status.
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The stats actually cleared are:
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Timeout_count
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Forward_due_to_bar_count
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Duplicate_count
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Frames_in_order_count
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BAR_received_count
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MPDU_Frames_processed_count
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MSDU_Frames_processed_count
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Total_processed_byte_count
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Late_receive_MPDU_count
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window_jump_2k
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Hole_count
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<legal 0-1>
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*/
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#define REO_GET_QUEUE_STATS_2_CLEAR_STATS_OFFSET 0x00000008
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#define REO_GET_QUEUE_STATS_2_CLEAR_STATS_LSB 8
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#define REO_GET_QUEUE_STATS_2_CLEAR_STATS_MASK 0x00000100
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/* Description REO_GET_QUEUE_STATS_2_RESERVED_2A
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<legal 0>
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*/
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#define REO_GET_QUEUE_STATS_2_RESERVED_2A_OFFSET 0x00000008
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#define REO_GET_QUEUE_STATS_2_RESERVED_2A_LSB 9
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#define REO_GET_QUEUE_STATS_2_RESERVED_2A_MASK 0xfffffe00
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/* Description REO_GET_QUEUE_STATS_3_RESERVED_3A
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<legal 0>
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*/
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#define REO_GET_QUEUE_STATS_3_RESERVED_3A_OFFSET 0x0000000c
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#define REO_GET_QUEUE_STATS_3_RESERVED_3A_LSB 0
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#define REO_GET_QUEUE_STATS_3_RESERVED_3A_MASK 0xffffffff
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/* Description REO_GET_QUEUE_STATS_4_RESERVED_4A
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<legal 0>
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*/
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#define REO_GET_QUEUE_STATS_4_RESERVED_4A_OFFSET 0x00000010
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#define REO_GET_QUEUE_STATS_4_RESERVED_4A_LSB 0
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#define REO_GET_QUEUE_STATS_4_RESERVED_4A_MASK 0xffffffff
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/* Description REO_GET_QUEUE_STATS_5_RESERVED_5A
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<legal 0>
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*/
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#define REO_GET_QUEUE_STATS_5_RESERVED_5A_OFFSET 0x00000014
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#define REO_GET_QUEUE_STATS_5_RESERVED_5A_LSB 0
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#define REO_GET_QUEUE_STATS_5_RESERVED_5A_MASK 0xffffffff
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/* Description REO_GET_QUEUE_STATS_6_RESERVED_6A
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<legal 0>
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*/
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#define REO_GET_QUEUE_STATS_6_RESERVED_6A_OFFSET 0x00000018
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#define REO_GET_QUEUE_STATS_6_RESERVED_6A_LSB 0
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#define REO_GET_QUEUE_STATS_6_RESERVED_6A_MASK 0xffffffff
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/* Description REO_GET_QUEUE_STATS_7_RESERVED_7A
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<legal 0>
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*/
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#define REO_GET_QUEUE_STATS_7_RESERVED_7A_OFFSET 0x0000001c
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#define REO_GET_QUEUE_STATS_7_RESERVED_7A_LSB 0
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#define REO_GET_QUEUE_STATS_7_RESERVED_7A_MASK 0xffffffff
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/* Description REO_GET_QUEUE_STATS_8_RESERVED_8A
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<legal 0>
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*/
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#define REO_GET_QUEUE_STATS_8_RESERVED_8A_OFFSET 0x00000020
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#define REO_GET_QUEUE_STATS_8_RESERVED_8A_LSB 0
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#define REO_GET_QUEUE_STATS_8_RESERVED_8A_MASK 0xffffffff
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#endif // _REO_GET_QUEUE_STATS_H_
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