36637cf177
Added ipq5332 target header files under qca5332 to make fw-api project compatible to host. Change-Id: Iee6b3f2a809f31e62b45a0f6e9a7cbb66e070fa0
195 regels
7.6 KiB
C
195 regels
7.6 KiB
C
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/* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _RX_MSDU_EXT_DESC_INFO_H_
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#define _RX_MSDU_EXT_DESC_INFO_H_
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#if !defined(__ASSEMBLER__)
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#endif
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#define NUM_OF_DWORDS_RX_MSDU_EXT_DESC_INFO 1
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struct rx_msdu_ext_desc_info {
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#ifndef WIFI_BIT_ORDER_BIG_ENDIAN
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uint32_t reo_destination_indication : 5, // [4:0]
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service_code : 9, // [13:5]
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priority_valid : 1, // [14:14]
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data_offset : 12, // [26:15]
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src_link_id : 3, // [29:27]
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reserved_0a : 2; // [31:30]
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#else
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uint32_t reserved_0a : 2, // [31:30]
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src_link_id : 3, // [29:27]
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data_offset : 12, // [26:15]
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priority_valid : 1, // [14:14]
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service_code : 9, // [13:5]
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reo_destination_indication : 5; // [4:0]
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#endif
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};
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/* Description REO_DESTINATION_INDICATION
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Parsed from RX_MSDU_END TLV . In the case MSDU spans over
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multiple buffers, this field will be valid in the Last
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buffer used by the MSDU
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The ID of the REO exit ring where the MSDU frame shall push
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after (MPDU level) reordering has finished.
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<enum 0 reo_destination_sw0> Reo will push the frame into
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the REO2SW0 ring
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<enum 1 reo_destination_sw1> Reo will push the frame into
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the REO2SW1 ring
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<enum 2 reo_destination_sw2> Reo will push the frame into
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the REO2SW2 ring
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<enum 3 reo_destination_sw3> Reo will push the frame into
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the REO2SW3 ring
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<enum 4 reo_destination_sw4> Reo will push the frame into
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the REO2SW4 ring
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<enum 5 reo_destination_release> Reo will push the frame
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into the REO_release ring
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<enum 6 reo_destination_fw> Reo will push the frame into
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the REO2FW ring
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<enum 7 reo_destination_sw5> Reo will push the frame into
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the REO2SW5 ring (REO remaps this in chips without REO2SW5
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ring, e.g. Pine)
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<enum 8 reo_destination_sw6> Reo will push the frame into
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the REO2SW6 ring (REO remaps this in chips without REO2SW6
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ring, e.g. Pine)
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<enum 9 reo_destination_sw7> Reo will push the frame into
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the REO2SW7 ring (REO remaps this in chips without REO2SW7
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ring)
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<enum 10 reo_destination_sw8> Reo will push the frame into
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the REO2SW8 ring (REO remaps this in chips without REO2SW8
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ring)
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<enum 11 reo_destination_11> REO remaps this
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<enum 12 reo_destination_12> REO remaps this <enum 13 reo_destination_13>
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REO remaps this
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<enum 14 reo_destination_14> REO remaps this
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<enum 15 reo_destination_15> REO remaps this
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<enum 16 reo_destination_16> REO remaps this
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<enum 17 reo_destination_17> REO remaps this
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<enum 18 reo_destination_18> REO remaps this
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<enum 19 reo_destination_19> REO remaps this
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<enum 20 reo_destination_20> REO remaps this
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<enum 21 reo_destination_21> REO remaps this
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<enum 22 reo_destination_22> REO remaps this
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<enum 23 reo_destination_23> REO remaps this
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<enum 24 reo_destination_24> REO remaps this
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<enum 25 reo_destination_25> REO remaps this
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<enum 26 reo_destination_26> REO remaps this
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<enum 27 reo_destination_27> REO remaps this
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<enum 28 reo_destination_28> REO remaps this
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<enum 29 reo_destination_29> REO remaps this
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<enum 30 reo_destination_30> REO remaps this
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<enum 31 reo_destination_31> REO remaps this
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<legal all>
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*/
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#define RX_MSDU_EXT_DESC_INFO_REO_DESTINATION_INDICATION_OFFSET 0x00000000
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#define RX_MSDU_EXT_DESC_INFO_REO_DESTINATION_INDICATION_LSB 0
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#define RX_MSDU_EXT_DESC_INFO_REO_DESTINATION_INDICATION_MSB 4
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#define RX_MSDU_EXT_DESC_INFO_REO_DESTINATION_INDICATION_MASK 0x0000001f
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/* Description SERVICE_CODE
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Opaque service code between PPE and Wi-Fi
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This field gets passed on by REO to PPE in the EDMA descriptor
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('REO_TO_PPE_RING').
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<legal all>
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*/
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#define RX_MSDU_EXT_DESC_INFO_SERVICE_CODE_OFFSET 0x00000000
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#define RX_MSDU_EXT_DESC_INFO_SERVICE_CODE_LSB 5
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#define RX_MSDU_EXT_DESC_INFO_SERVICE_CODE_MSB 13
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#define RX_MSDU_EXT_DESC_INFO_SERVICE_CODE_MASK 0x00003fe0
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/* Description PRIORITY_VALID
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This field gets passed on by REO to PPE in the EDMA descriptor
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('REO_TO_PPE_RING').
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<legal all>
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*/
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#define RX_MSDU_EXT_DESC_INFO_PRIORITY_VALID_OFFSET 0x00000000
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#define RX_MSDU_EXT_DESC_INFO_PRIORITY_VALID_LSB 14
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#define RX_MSDU_EXT_DESC_INFO_PRIORITY_VALID_MSB 14
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#define RX_MSDU_EXT_DESC_INFO_PRIORITY_VALID_MASK 0x00004000
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/* Description DATA_OFFSET
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The offset to Rx packet data within the buffer (including
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Rx DMA offset programming and L3 header padding inserted
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by Rx OLE).
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This field gets passed on by REO to PPE in the EDMA descriptor
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('REO_TO_PPE_RING').
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<legal all>
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*/
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#define RX_MSDU_EXT_DESC_INFO_DATA_OFFSET_OFFSET 0x00000000
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#define RX_MSDU_EXT_DESC_INFO_DATA_OFFSET_LSB 15
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#define RX_MSDU_EXT_DESC_INFO_DATA_OFFSET_MSB 26
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#define RX_MSDU_EXT_DESC_INFO_DATA_OFFSET_MASK 0x07ff8000
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/* Description SRC_LINK_ID
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Consumer: SW
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Producer: RXDMA
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Set to the link ID of the PMAC that received the frame
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<legal all>
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*/
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#define RX_MSDU_EXT_DESC_INFO_SRC_LINK_ID_OFFSET 0x00000000
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#define RX_MSDU_EXT_DESC_INFO_SRC_LINK_ID_LSB 27
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#define RX_MSDU_EXT_DESC_INFO_SRC_LINK_ID_MSB 29
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#define RX_MSDU_EXT_DESC_INFO_SRC_LINK_ID_MASK 0x38000000
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/* Description RESERVED_0A
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<legal 0>
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*/
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#define RX_MSDU_EXT_DESC_INFO_RESERVED_0A_OFFSET 0x00000000
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#define RX_MSDU_EXT_DESC_INFO_RESERVED_0A_LSB 30
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#define RX_MSDU_EXT_DESC_INFO_RESERVED_0A_MSB 31
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#define RX_MSDU_EXT_DESC_INFO_RESERVED_0A_MASK 0xc0000000
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#endif // RX_MSDU_EXT_DESC_INFO
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