36637cf177
Added ipq5332 target header files under qca5332 to make fw-api project compatible to host. Change-Id: Iee6b3f2a809f31e62b45a0f6e9a7cbb66e070fa0
224 строки
9.0 KiB
C
224 строки
9.0 KiB
C
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/* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _HE_SIG_B2_MU_INFO_H_
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#define _HE_SIG_B2_MU_INFO_H_
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#if !defined(__ASSEMBLER__)
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#endif
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#define NUM_OF_DWORDS_HE_SIG_B2_MU_INFO 2
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struct he_sig_b2_mu_info {
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#ifndef WIFI_BIT_ORDER_BIG_ENDIAN
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uint32_t sta_id : 11, // [10:0]
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sta_spatial_config : 4, // [14:11]
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sta_mcs : 4, // [18:15]
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reserved_set_to_1 : 1, // [19:19]
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sta_coding : 1, // [20:20]
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reserved_0a : 7, // [27:21]
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nsts : 3, // [30:28]
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rx_integrity_check_passed : 1; // [31:31]
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uint32_t user_order : 8, // [7:0]
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cc_mask : 8, // [15:8]
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reserved_1a : 16; // [31:16]
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#else
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uint32_t rx_integrity_check_passed : 1, // [31:31]
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nsts : 3, // [30:28]
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reserved_0a : 7, // [27:21]
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sta_coding : 1, // [20:20]
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reserved_set_to_1 : 1, // [19:19]
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sta_mcs : 4, // [18:15]
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sta_spatial_config : 4, // [14:11]
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sta_id : 11; // [10:0]
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uint32_t reserved_1a : 16, // [31:16]
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cc_mask : 8, // [15:8]
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user_order : 8; // [7:0]
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#endif
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};
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/* Description STA_ID
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Identifies the STA that is addressed. Details of STA ID
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are TBD
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*/
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#define HE_SIG_B2_MU_INFO_STA_ID_OFFSET 0x00000000
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#define HE_SIG_B2_MU_INFO_STA_ID_LSB 0
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#define HE_SIG_B2_MU_INFO_STA_ID_MSB 10
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#define HE_SIG_B2_MU_INFO_STA_ID_MASK 0x000007ff
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/* Description STA_SPATIAL_CONFIG
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Number of assigned spatial streams and their corresponding
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index.
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Total number of spatial streams assigned for the MU-MIMO
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allocation is also signaled.
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*/
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#define HE_SIG_B2_MU_INFO_STA_SPATIAL_CONFIG_OFFSET 0x00000000
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#define HE_SIG_B2_MU_INFO_STA_SPATIAL_CONFIG_LSB 11
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#define HE_SIG_B2_MU_INFO_STA_SPATIAL_CONFIG_MSB 14
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#define HE_SIG_B2_MU_INFO_STA_SPATIAL_CONFIG_MASK 0x00007800
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/* Description STA_MCS
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Indicates the data MCS
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*/
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#define HE_SIG_B2_MU_INFO_STA_MCS_OFFSET 0x00000000
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#define HE_SIG_B2_MU_INFO_STA_MCS_LSB 15
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#define HE_SIG_B2_MU_INFO_STA_MCS_MSB 18
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#define HE_SIG_B2_MU_INFO_STA_MCS_MASK 0x00078000
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/* Description RESERVED_SET_TO_1
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<legal 1>
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*/
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#define HE_SIG_B2_MU_INFO_RESERVED_SET_TO_1_OFFSET 0x00000000
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#define HE_SIG_B2_MU_INFO_RESERVED_SET_TO_1_LSB 19
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#define HE_SIG_B2_MU_INFO_RESERVED_SET_TO_1_MSB 19
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#define HE_SIG_B2_MU_INFO_RESERVED_SET_TO_1_MASK 0x00080000
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/* Description STA_CODING
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Distinguishes between BCC/LDPC
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0: BCC
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1: LDPC
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<legal all>
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*/
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#define HE_SIG_B2_MU_INFO_STA_CODING_OFFSET 0x00000000
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#define HE_SIG_B2_MU_INFO_STA_CODING_LSB 20
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#define HE_SIG_B2_MU_INFO_STA_CODING_MSB 20
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#define HE_SIG_B2_MU_INFO_STA_CODING_MASK 0x00100000
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/* Description RESERVED_0A
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<legal 0>
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*/
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#define HE_SIG_B2_MU_INFO_RESERVED_0A_OFFSET 0x00000000
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#define HE_SIG_B2_MU_INFO_RESERVED_0A_LSB 21
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#define HE_SIG_B2_MU_INFO_RESERVED_0A_MSB 27
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#define HE_SIG_B2_MU_INFO_RESERVED_0A_MASK 0x0fe00000
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/* Description NSTS
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MAC RX side usage only:
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Needed by RXPCU. Provided by PHY so that RXPCU does not
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need to have the RU number decoding logic.
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Number of spatial streams for this user
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<enum 0 1_spatial_stream>Single spatial stream
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<enum 1 2_spatial_streams>2 spatial streams
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<enum 2 3_spatial_streams>3 spatial streams
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<enum 3 4_spatial_streams>4 spatial streams
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<enum 4 5_spatial_streams>5 spatial streams
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<enum 5 6_spatial_streams>6 spatial streams
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<enum 6 7_spatial_streams>7 spatial streams
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<enum 7 8_spatial_streams>8 spatial streams
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*/
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#define HE_SIG_B2_MU_INFO_NSTS_OFFSET 0x00000000
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#define HE_SIG_B2_MU_INFO_NSTS_LSB 28
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#define HE_SIG_B2_MU_INFO_NSTS_MSB 30
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#define HE_SIG_B2_MU_INFO_NSTS_MASK 0x70000000
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/* Description RX_INTEGRITY_CHECK_PASSED
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TX side: Set to 0
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RX side: Set to 1 if PHY determines the CRC check of the
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codeblock containing this HE-SIG-B user info has passed,
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else set to 0
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<legal all>
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*/
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#define HE_SIG_B2_MU_INFO_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x00000000
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#define HE_SIG_B2_MU_INFO_RX_INTEGRITY_CHECK_PASSED_LSB 31
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#define HE_SIG_B2_MU_INFO_RX_INTEGRITY_CHECK_PASSED_MSB 31
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#define HE_SIG_B2_MU_INFO_RX_INTEGRITY_CHECK_PASSED_MASK 0x80000000
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/* Description USER_ORDER
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RX side: Set to 0
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TX side: Ordering index of the User field
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Gaps between the ordering indices of User fields indicate
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that the microcode shall generate "unallocated RU" User
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fields (STAID=2046) to fill the gaps.
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<legal all>
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*/
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#define HE_SIG_B2_MU_INFO_USER_ORDER_OFFSET 0x00000004
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#define HE_SIG_B2_MU_INFO_USER_ORDER_LSB 0
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#define HE_SIG_B2_MU_INFO_USER_ORDER_MSB 7
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#define HE_SIG_B2_MU_INFO_USER_ORDER_MASK 0x000000ff
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/* Description CC_MASK
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RX side: Set to 0
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TX side: Indicates what content channel this User field
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can go to
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Bit 0: content channel 0
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Bit 1: content channel 1
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The other bits are unused, but could repeat the above pattern
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for compatibility with 'EHT_SIG_USR_MU_MIMO_INFO.'
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<legal all>
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*/
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#define HE_SIG_B2_MU_INFO_CC_MASK_OFFSET 0x00000004
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#define HE_SIG_B2_MU_INFO_CC_MASK_LSB 8
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#define HE_SIG_B2_MU_INFO_CC_MASK_MSB 15
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#define HE_SIG_B2_MU_INFO_CC_MASK_MASK 0x0000ff00
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/* Description RESERVED_1A
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<legal 0>
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*/
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#define HE_SIG_B2_MU_INFO_RESERVED_1A_OFFSET 0x00000004
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#define HE_SIG_B2_MU_INFO_RESERVED_1A_LSB 16
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#define HE_SIG_B2_MU_INFO_RESERVED_1A_MSB 31
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#define HE_SIG_B2_MU_INFO_RESERVED_1A_MASK 0xffff0000
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#endif // HE_SIG_B2_MU_INFO
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