a855ce2006
Bring in E3.R38 HW header files for kiwi, as the final set of header files from emulation drop. In addition cleanup header files w.r.t comments, add appropriate copyright header. Change-Id: I3cee05e506c4171f8641193a0f12456f5cfaf890 CRs-Fixed: 2850521
174 行
7.2 KiB
C
174 行
7.2 KiB
C
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/*
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* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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* above copyright notice and this permission notice appear in all
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* copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
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* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
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* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
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* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
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* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _REO_GET_QUEUE_STATS_H_
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#define _REO_GET_QUEUE_STATS_H_
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#if !defined(__ASSEMBLER__)
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#endif
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#include "uniform_reo_cmd_header.h"
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#define NUM_OF_DWORDS_REO_GET_QUEUE_STATS 10
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#define NUM_OF_QWORDS_REO_GET_QUEUE_STATS 5
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struct reo_get_queue_stats {
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struct uniform_reo_cmd_header cmd_header;
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uint32_t rx_reo_queue_desc_addr_31_0 : 32;
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uint32_t rx_reo_queue_desc_addr_39_32 : 8,
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clear_stats : 1,
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reserved_2a : 23;
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uint32_t reserved_3a : 32;
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uint32_t reserved_4a : 32;
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uint32_t reserved_5a : 32;
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uint32_t reserved_6a : 32;
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uint32_t reserved_7a : 32;
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uint32_t reserved_8a : 32;
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uint32_t tlv64_padding : 32;
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};
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#define REO_GET_QUEUE_STATS_CMD_HEADER_REO_CMD_NUMBER_OFFSET 0x0000000000000000
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#define REO_GET_QUEUE_STATS_CMD_HEADER_REO_CMD_NUMBER_LSB 0
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#define REO_GET_QUEUE_STATS_CMD_HEADER_REO_CMD_NUMBER_MSB 15
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#define REO_GET_QUEUE_STATS_CMD_HEADER_REO_CMD_NUMBER_MASK 0x000000000000ffff
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#define REO_GET_QUEUE_STATS_CMD_HEADER_REO_STATUS_REQUIRED_OFFSET 0x0000000000000000
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#define REO_GET_QUEUE_STATS_CMD_HEADER_REO_STATUS_REQUIRED_LSB 16
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#define REO_GET_QUEUE_STATS_CMD_HEADER_REO_STATUS_REQUIRED_MSB 16
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#define REO_GET_QUEUE_STATS_CMD_HEADER_REO_STATUS_REQUIRED_MASK 0x0000000000010000
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#define REO_GET_QUEUE_STATS_CMD_HEADER_RESERVED_0A_OFFSET 0x0000000000000000
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#define REO_GET_QUEUE_STATS_CMD_HEADER_RESERVED_0A_LSB 17
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#define REO_GET_QUEUE_STATS_CMD_HEADER_RESERVED_0A_MSB 31
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#define REO_GET_QUEUE_STATS_CMD_HEADER_RESERVED_0A_MASK 0x00000000fffe0000
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#define REO_GET_QUEUE_STATS_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x0000000000000000
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#define REO_GET_QUEUE_STATS_RX_REO_QUEUE_DESC_ADDR_31_0_LSB 32
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#define REO_GET_QUEUE_STATS_RX_REO_QUEUE_DESC_ADDR_31_0_MSB 63
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#define REO_GET_QUEUE_STATS_RX_REO_QUEUE_DESC_ADDR_31_0_MASK 0xffffffff00000000
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#define REO_GET_QUEUE_STATS_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x0000000000000008
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#define REO_GET_QUEUE_STATS_RX_REO_QUEUE_DESC_ADDR_39_32_LSB 0
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#define REO_GET_QUEUE_STATS_RX_REO_QUEUE_DESC_ADDR_39_32_MSB 7
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#define REO_GET_QUEUE_STATS_RX_REO_QUEUE_DESC_ADDR_39_32_MASK 0x00000000000000ff
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#define REO_GET_QUEUE_STATS_CLEAR_STATS_OFFSET 0x0000000000000008
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#define REO_GET_QUEUE_STATS_CLEAR_STATS_LSB 8
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#define REO_GET_QUEUE_STATS_CLEAR_STATS_MSB 8
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#define REO_GET_QUEUE_STATS_CLEAR_STATS_MASK 0x0000000000000100
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#define REO_GET_QUEUE_STATS_RESERVED_2A_OFFSET 0x0000000000000008
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#define REO_GET_QUEUE_STATS_RESERVED_2A_LSB 9
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#define REO_GET_QUEUE_STATS_RESERVED_2A_MSB 31
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#define REO_GET_QUEUE_STATS_RESERVED_2A_MASK 0x00000000fffffe00
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#define REO_GET_QUEUE_STATS_RESERVED_3A_OFFSET 0x0000000000000008
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#define REO_GET_QUEUE_STATS_RESERVED_3A_LSB 32
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#define REO_GET_QUEUE_STATS_RESERVED_3A_MSB 63
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#define REO_GET_QUEUE_STATS_RESERVED_3A_MASK 0xffffffff00000000
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#define REO_GET_QUEUE_STATS_RESERVED_4A_OFFSET 0x0000000000000010
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#define REO_GET_QUEUE_STATS_RESERVED_4A_LSB 0
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#define REO_GET_QUEUE_STATS_RESERVED_4A_MSB 31
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#define REO_GET_QUEUE_STATS_RESERVED_4A_MASK 0x00000000ffffffff
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#define REO_GET_QUEUE_STATS_RESERVED_5A_OFFSET 0x0000000000000010
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#define REO_GET_QUEUE_STATS_RESERVED_5A_LSB 32
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#define REO_GET_QUEUE_STATS_RESERVED_5A_MSB 63
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#define REO_GET_QUEUE_STATS_RESERVED_5A_MASK 0xffffffff00000000
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#define REO_GET_QUEUE_STATS_RESERVED_6A_OFFSET 0x0000000000000018
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#define REO_GET_QUEUE_STATS_RESERVED_6A_LSB 0
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#define REO_GET_QUEUE_STATS_RESERVED_6A_MSB 31
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#define REO_GET_QUEUE_STATS_RESERVED_6A_MASK 0x00000000ffffffff
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#define REO_GET_QUEUE_STATS_RESERVED_7A_OFFSET 0x0000000000000018
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#define REO_GET_QUEUE_STATS_RESERVED_7A_LSB 32
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#define REO_GET_QUEUE_STATS_RESERVED_7A_MSB 63
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#define REO_GET_QUEUE_STATS_RESERVED_7A_MASK 0xffffffff00000000
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#define REO_GET_QUEUE_STATS_RESERVED_8A_OFFSET 0x0000000000000020
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#define REO_GET_QUEUE_STATS_RESERVED_8A_LSB 0
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#define REO_GET_QUEUE_STATS_RESERVED_8A_MSB 31
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#define REO_GET_QUEUE_STATS_RESERVED_8A_MASK 0x00000000ffffffff
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#define REO_GET_QUEUE_STATS_TLV64_PADDING_OFFSET 0x0000000000000020
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#define REO_GET_QUEUE_STATS_TLV64_PADDING_LSB 32
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#define REO_GET_QUEUE_STATS_TLV64_PADDING_MSB 63
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#define REO_GET_QUEUE_STATS_TLV64_PADDING_MASK 0xffffffff00000000
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#endif
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