dp_main.c 234 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529453045314532453345344535453645374538453945404541454245434544454545464547454845494550455145524553455445554556455745584559456045614562456345644565456645674568456945704571457245734574457545764577457845794580458145824583458445854586458745884589459045914592459345944595459645974598459946004601460246034604460546064607460846094610461146124613461446154616461746184619462046214622462346244625462646274628462946304631463246334634463546364637463846394640464146424643464446454646464746484649465046514652465346544655465646574658465946604661466246634664466546664667466846694670467146724673467446754676467746784679468046814682468346844685468646874688468946904691469246934694469546964697469846994700470147024703470447054706470747084709471047114712471347144715471647174718471947204721472247234724472547264727472847294730473147324733473447354736473747384739474047414742474347444745474647474748474947504751475247534754475547564757475847594760476147624763476447654766476747684769477047714772477347744775477647774778477947804781478247834784478547864787478847894790479147924793479447954796479747984799480048014802480348044805480648074808480948104811481248134814481548164817481848194820482148224823482448254826482748284829483048314832483348344835483648374838483948404841484248434844484548464847484848494850485148524853485448554856485748584859486048614862486348644865486648674868486948704871487248734874487548764877487848794880488148824883488448854886488748884889489048914892489348944895489648974898489949004901490249034904490549064907490849094910491149124913491449154916491749184919492049214922492349244925492649274928492949304931493249334934493549364937493849394940494149424943494449454946494749484949495049514952495349544955495649574958495949604961496249634964496549664967496849694970497149724973497449754976497749784979498049814982498349844985498649874988498949904991499249934994499549964997499849995000500150025003500450055006500750085009501050115012501350145015501650175018501950205021502250235024502550265027502850295030503150325033503450355036503750385039504050415042504350445045504650475048504950505051505250535054505550565057505850595060506150625063506450655066506750685069507050715072507350745075507650775078507950805081508250835084508550865087508850895090509150925093509450955096509750985099510051015102510351045105510651075108510951105111511251135114511551165117511851195120512151225123512451255126512751285129513051315132513351345135513651375138513951405141514251435144514551465147514851495150515151525153515451555156515751585159516051615162516351645165516651675168516951705171517251735174517551765177517851795180518151825183518451855186518751885189519051915192519351945195519651975198519952005201520252035204520552065207520852095210521152125213521452155216521752185219522052215222522352245225522652275228522952305231523252335234523552365237523852395240524152425243524452455246524752485249525052515252525352545255525652575258525952605261526252635264526552665267526852695270527152725273527452755276527752785279528052815282528352845285528652875288528952905291529252935294529552965297529852995300530153025303530453055306530753085309531053115312531353145315531653175318531953205321532253235324532553265327532853295330533153325333533453355336533753385339534053415342534353445345534653475348534953505351535253535354535553565357535853595360536153625363536453655366536753685369537053715372537353745375537653775378537953805381538253835384538553865387538853895390539153925393539453955396539753985399540054015402540354045405540654075408540954105411541254135414541554165417541854195420542154225423542454255426542754285429543054315432543354345435543654375438543954405441544254435444544554465447544854495450545154525453545454555456545754585459546054615462546354645465546654675468546954705471547254735474547554765477547854795480548154825483548454855486548754885489549054915492549354945495549654975498549955005501550255035504550555065507550855095510551155125513551455155516551755185519552055215522552355245525552655275528552955305531553255335534553555365537553855395540554155425543554455455546554755485549555055515552555355545555555655575558555955605561556255635564556555665567556855695570557155725573557455755576557755785579558055815582558355845585558655875588558955905591559255935594559555965597559855995600560156025603560456055606560756085609561056115612561356145615561656175618561956205621562256235624562556265627562856295630563156325633563456355636563756385639564056415642564356445645564656475648564956505651565256535654565556565657565856595660566156625663566456655666566756685669567056715672567356745675567656775678567956805681568256835684568556865687568856895690569156925693569456955696569756985699570057015702570357045705570657075708570957105711571257135714571557165717571857195720572157225723572457255726572757285729573057315732573357345735573657375738573957405741574257435744574557465747574857495750575157525753575457555756575757585759576057615762576357645765576657675768576957705771577257735774577557765777577857795780578157825783578457855786578757885789579057915792579357945795579657975798579958005801580258035804580558065807580858095810581158125813581458155816581758185819582058215822582358245825582658275828582958305831583258335834583558365837583858395840584158425843584458455846584758485849585058515852585358545855585658575858585958605861586258635864586558665867586858695870587158725873587458755876587758785879588058815882588358845885588658875888588958905891589258935894589558965897589858995900590159025903590459055906590759085909591059115912591359145915591659175918591959205921592259235924592559265927592859295930593159325933593459355936593759385939594059415942594359445945594659475948594959505951595259535954595559565957595859595960596159625963596459655966596759685969597059715972597359745975597659775978597959805981598259835984598559865987598859895990599159925993599459955996599759985999600060016002600360046005600660076008600960106011601260136014601560166017601860196020602160226023602460256026602760286029603060316032603360346035603660376038603960406041604260436044604560466047604860496050605160526053605460556056605760586059606060616062606360646065606660676068606960706071607260736074607560766077607860796080608160826083608460856086608760886089609060916092609360946095609660976098609961006101610261036104610561066107610861096110611161126113611461156116611761186119612061216122612361246125612661276128612961306131613261336134613561366137613861396140614161426143614461456146614761486149615061516152615361546155615661576158615961606161616261636164616561666167616861696170617161726173617461756176617761786179618061816182618361846185618661876188618961906191619261936194619561966197619861996200620162026203620462056206620762086209621062116212621362146215621662176218621962206221622262236224622562266227622862296230623162326233623462356236623762386239624062416242624362446245624662476248624962506251625262536254625562566257625862596260626162626263626462656266626762686269627062716272627362746275627662776278627962806281628262836284628562866287628862896290629162926293629462956296629762986299630063016302630363046305630663076308630963106311631263136314631563166317631863196320632163226323632463256326632763286329633063316332633363346335633663376338633963406341634263436344634563466347634863496350635163526353635463556356635763586359636063616362636363646365636663676368636963706371637263736374637563766377637863796380638163826383638463856386638763886389639063916392639363946395639663976398639964006401640264036404640564066407640864096410641164126413641464156416641764186419642064216422642364246425642664276428642964306431643264336434643564366437643864396440644164426443644464456446644764486449645064516452645364546455645664576458645964606461646264636464646564666467646864696470647164726473647464756476647764786479648064816482648364846485648664876488648964906491649264936494649564966497649864996500650165026503650465056506650765086509651065116512651365146515651665176518651965206521652265236524652565266527652865296530653165326533653465356536653765386539654065416542654365446545654665476548654965506551655265536554655565566557655865596560656165626563656465656566656765686569657065716572657365746575657665776578657965806581658265836584658565866587658865896590659165926593659465956596659765986599660066016602660366046605660666076608660966106611661266136614661566166617661866196620662166226623662466256626662766286629663066316632663366346635663666376638663966406641664266436644664566466647664866496650665166526653665466556656665766586659666066616662666366646665666666676668666966706671667266736674667566766677667866796680668166826683668466856686668766886689669066916692669366946695669666976698669967006701670267036704670567066707670867096710671167126713671467156716671767186719672067216722672367246725672667276728672967306731673267336734673567366737673867396740674167426743674467456746674767486749675067516752675367546755675667576758675967606761676267636764676567666767676867696770677167726773677467756776677767786779678067816782678367846785678667876788678967906791679267936794679567966797679867996800680168026803680468056806680768086809681068116812681368146815681668176818681968206821682268236824682568266827682868296830683168326833683468356836683768386839684068416842684368446845684668476848684968506851685268536854685568566857685868596860686168626863686468656866686768686869687068716872687368746875687668776878687968806881688268836884688568866887688868896890689168926893689468956896689768986899690069016902690369046905690669076908690969106911691269136914691569166917691869196920692169226923692469256926692769286929693069316932693369346935693669376938693969406941694269436944694569466947694869496950695169526953695469556956695769586959696069616962696369646965696669676968696969706971697269736974697569766977697869796980698169826983698469856986698769886989699069916992699369946995699669976998699970007001700270037004700570067007700870097010701170127013701470157016701770187019702070217022702370247025702670277028702970307031703270337034703570367037703870397040704170427043704470457046704770487049705070517052705370547055705670577058705970607061706270637064706570667067706870697070707170727073707470757076707770787079708070817082708370847085708670877088708970907091709270937094709570967097709870997100710171027103710471057106710771087109711071117112711371147115711671177118711971207121712271237124712571267127712871297130713171327133713471357136713771387139714071417142714371447145714671477148714971507151715271537154715571567157715871597160716171627163716471657166716771687169717071717172717371747175717671777178717971807181718271837184718571867187718871897190719171927193719471957196719771987199720072017202720372047205720672077208720972107211721272137214721572167217721872197220722172227223722472257226722772287229723072317232723372347235723672377238723972407241724272437244724572467247724872497250725172527253725472557256725772587259726072617262726372647265726672677268726972707271727272737274727572767277727872797280728172827283728472857286728772887289729072917292729372947295729672977298729973007301730273037304730573067307730873097310731173127313731473157316731773187319732073217322732373247325732673277328732973307331733273337334733573367337733873397340734173427343734473457346734773487349735073517352735373547355735673577358735973607361736273637364736573667367736873697370737173727373737473757376737773787379738073817382738373847385738673877388738973907391739273937394739573967397739873997400740174027403740474057406740774087409741074117412741374147415741674177418741974207421742274237424742574267427742874297430743174327433743474357436743774387439744074417442744374447445744674477448744974507451745274537454745574567457745874597460746174627463746474657466746774687469747074717472747374747475747674777478747974807481748274837484748574867487748874897490749174927493749474957496749774987499750075017502750375047505750675077508750975107511751275137514751575167517751875197520752175227523752475257526752775287529753075317532753375347535753675377538753975407541754275437544754575467547754875497550755175527553755475557556755775587559756075617562756375647565756675677568756975707571757275737574757575767577757875797580758175827583758475857586758775887589759075917592759375947595759675977598759976007601760276037604760576067607760876097610761176127613761476157616761776187619762076217622762376247625762676277628762976307631763276337634763576367637763876397640764176427643764476457646764776487649765076517652765376547655765676577658765976607661766276637664766576667667766876697670767176727673767476757676767776787679768076817682768376847685768676877688768976907691769276937694769576967697769876997700770177027703770477057706770777087709771077117712771377147715771677177718771977207721772277237724772577267727772877297730773177327733773477357736773777387739774077417742774377447745774677477748774977507751775277537754775577567757775877597760776177627763776477657766776777687769777077717772777377747775777677777778777977807781778277837784778577867787778877897790779177927793779477957796779777987799780078017802780378047805780678077808780978107811781278137814781578167817781878197820782178227823782478257826782778287829783078317832783378347835783678377838783978407841784278437844784578467847784878497850785178527853785478557856785778587859786078617862786378647865786678677868786978707871787278737874787578767877787878797880788178827883788478857886788778887889789078917892789378947895789678977898789979007901790279037904790579067907790879097910791179127913791479157916791779187919792079217922792379247925792679277928792979307931793279337934793579367937793879397940794179427943794479457946794779487949795079517952795379547955795679577958795979607961796279637964796579667967796879697970797179727973797479757976797779787979798079817982798379847985798679877988798979907991799279937994799579967997799879998000800180028003800480058006800780088009801080118012801380148015801680178018801980208021802280238024802580268027802880298030803180328033803480358036803780388039804080418042804380448045804680478048804980508051805280538054805580568057805880598060806180628063806480658066806780688069807080718072807380748075807680778078807980808081808280838084808580868087808880898090809180928093809480958096809780988099810081018102810381048105810681078108810981108111811281138114811581168117811881198120812181228123812481258126812781288129813081318132813381348135813681378138813981408141814281438144814581468147814881498150815181528153815481558156815781588159816081618162816381648165816681678168816981708171817281738174817581768177817881798180818181828183818481858186818781888189819081918192819381948195819681978198819982008201820282038204820582068207820882098210821182128213821482158216821782188219822082218222822382248225822682278228822982308231823282338234823582368237823882398240824182428243824482458246824782488249825082518252825382548255825682578258825982608261826282638264826582668267826882698270827182728273827482758276827782788279828082818282828382848285828682878288828982908291829282938294829582968297829882998300830183028303830483058306830783088309831083118312831383148315831683178318831983208321832283238324832583268327832883298330833183328333833483358336833783388339834083418342834383448345834683478348834983508351835283538354835583568357835883598360836183628363836483658366836783688369837083718372837383748375837683778378837983808381838283838384838583868387838883898390839183928393839483958396839783988399840084018402840384048405840684078408840984108411841284138414841584168417841884198420842184228423842484258426842784288429843084318432843384348435843684378438843984408441844284438444844584468447844884498450845184528453845484558456845784588459846084618462846384648465846684678468846984708471847284738474847584768477847884798480848184828483848484858486848784888489849084918492849384948495849684978498849985008501850285038504850585068507850885098510851185128513851485158516851785188519852085218522852385248525852685278528852985308531853285338534853585368537853885398540854185428543854485458546854785488549855085518552855385548555855685578558855985608561
  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <qdf_module.h>
  23. #include <hal_hw_headers.h>
  24. #include <hal_api.h>
  25. #include <hif.h>
  26. #include <htt.h>
  27. #include <wdi_event.h>
  28. #include <queue.h>
  29. #include "dp_htt.h"
  30. #include "dp_types.h"
  31. #include "dp_internal.h"
  32. #include "dp_tx.h"
  33. #include "dp_tx_desc.h"
  34. #include "dp_rx.h"
  35. #include <cdp_txrx_handle.h>
  36. #include <wlan_cfg.h>
  37. #include "cdp_txrx_cmn_struct.h"
  38. #include "cdp_txrx_stats_struct.h"
  39. #include "cdp_txrx_cmn_reg.h"
  40. #include <qdf_util.h>
  41. #include "dp_peer.h"
  42. #include "dp_rx_mon.h"
  43. #include "htt_stats.h"
  44. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  45. #include "cfg_ucfg_api.h"
  46. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  47. #include "cdp_txrx_flow_ctrl_v2.h"
  48. #else
  49. static inline void
  50. cdp_dump_flow_pool_info(struct cdp_soc_t *soc)
  51. {
  52. return;
  53. }
  54. #endif
  55. #include "dp_ipa.h"
  56. #include "dp_cal_client_api.h"
  57. #ifdef CONFIG_MCL
  58. #ifndef REMOVE_PKT_LOG
  59. #include <pktlog_ac_api.h>
  60. #include <pktlog_ac.h>
  61. #endif
  62. #endif
  63. static void dp_pktlogmod_exit(struct dp_pdev *handle);
  64. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  65. uint8_t *peer_mac_addr,
  66. struct cdp_ctrl_objmgr_peer *ctrl_peer);
  67. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap);
  68. static void dp_ppdu_ring_reset(struct dp_pdev *pdev);
  69. static void dp_ppdu_ring_cfg(struct dp_pdev *pdev);
  70. #define DP_INTR_POLL_TIMER_MS 10
  71. #define DP_WDS_AGING_TIMER_DEFAULT_MS 120000
  72. #define DP_MCS_LENGTH (6*MAX_MCS)
  73. #define DP_NSS_LENGTH (6*SS_COUNT)
  74. #define DP_RXDMA_ERR_LENGTH (6*HAL_RXDMA_ERR_MAX)
  75. #define DP_REO_ERR_LENGTH (6*HAL_REO_ERR_MAX)
  76. #define DP_MAX_MCS_STRING_LEN 30
  77. #define DP_CURR_FW_STATS_AVAIL 19
  78. #define DP_HTT_DBG_EXT_STATS_MAX 256
  79. #define DP_MAX_SLEEP_TIME 100
  80. #ifdef IPA_OFFLOAD
  81. /* Exclude IPA rings from the interrupt context */
  82. #define TX_RING_MASK_VAL 0xb
  83. #define RX_RING_MASK_VAL 0x7
  84. #else
  85. #define TX_RING_MASK_VAL 0xF
  86. #define RX_RING_MASK_VAL 0xF
  87. #endif
  88. #define STR_MAXLEN 64
  89. #define DP_PPDU_STATS_CFG_ALL 0xFFFF
  90. /* PPDU stats mask sent to FW to enable enhanced stats */
  91. #define DP_PPDU_STATS_CFG_ENH_STATS 0xE67
  92. /* PPDU stats mask sent to FW to support debug sniffer feature */
  93. #define DP_PPDU_STATS_CFG_SNIFFER 0x2FFF
  94. /* PPDU stats mask sent to FW to support BPR feature*/
  95. #define DP_PPDU_STATS_CFG_BPR 0x2000
  96. /* PPDU stats mask sent to FW to support BPR and enhanced stats feature */
  97. #define DP_PPDU_STATS_CFG_BPR_ENH (DP_PPDU_STATS_CFG_BPR | \
  98. DP_PPDU_STATS_CFG_ENH_STATS)
  99. /* PPDU stats mask sent to FW to support BPR and pcktlog stats feature */
  100. #define DP_PPDU_STATS_CFG_BPR_PKTLOG (DP_PPDU_STATS_CFG_BPR | \
  101. DP_PPDU_TXLITE_STATS_BITMASK_CFG)
  102. #define RNG_ERR "SRNG setup failed for"
  103. /**
  104. * default_dscp_tid_map - Default DSCP-TID mapping
  105. *
  106. * DSCP TID
  107. * 000000 0
  108. * 001000 1
  109. * 010000 2
  110. * 011000 3
  111. * 100000 4
  112. * 101000 5
  113. * 110000 6
  114. * 111000 7
  115. */
  116. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  117. 0, 0, 0, 0, 0, 0, 0, 0,
  118. 1, 1, 1, 1, 1, 1, 1, 1,
  119. 2, 2, 2, 2, 2, 2, 2, 2,
  120. 3, 3, 3, 3, 3, 3, 3, 3,
  121. 4, 4, 4, 4, 4, 4, 4, 4,
  122. 5, 5, 5, 5, 5, 5, 5, 5,
  123. 6, 6, 6, 6, 6, 6, 6, 6,
  124. 7, 7, 7, 7, 7, 7, 7, 7,
  125. };
  126. /*
  127. * struct dp_rate_debug
  128. *
  129. * @mcs_type: print string for a given mcs
  130. * @valid: valid mcs rate?
  131. */
  132. struct dp_rate_debug {
  133. char mcs_type[DP_MAX_MCS_STRING_LEN];
  134. uint8_t valid;
  135. };
  136. #define MCS_VALID 1
  137. #define MCS_INVALID 0
  138. static const struct dp_rate_debug dp_rate_string[DOT11_MAX][MAX_MCS] = {
  139. {
  140. {"OFDM 48 Mbps", MCS_VALID},
  141. {"OFDM 24 Mbps", MCS_VALID},
  142. {"OFDM 12 Mbps", MCS_VALID},
  143. {"OFDM 6 Mbps ", MCS_VALID},
  144. {"OFDM 54 Mbps", MCS_VALID},
  145. {"OFDM 36 Mbps", MCS_VALID},
  146. {"OFDM 18 Mbps", MCS_VALID},
  147. {"OFDM 9 Mbps ", MCS_VALID},
  148. {"INVALID ", MCS_INVALID},
  149. {"INVALID ", MCS_INVALID},
  150. {"INVALID ", MCS_INVALID},
  151. {"INVALID ", MCS_INVALID},
  152. {"INVALID ", MCS_VALID},
  153. },
  154. {
  155. {"CCK 11 Mbps Long ", MCS_VALID},
  156. {"CCK 5.5 Mbps Long ", MCS_VALID},
  157. {"CCK 2 Mbps Long ", MCS_VALID},
  158. {"CCK 1 Mbps Long ", MCS_VALID},
  159. {"CCK 11 Mbps Short ", MCS_VALID},
  160. {"CCK 5.5 Mbps Short", MCS_VALID},
  161. {"CCK 2 Mbps Short ", MCS_VALID},
  162. {"INVALID ", MCS_INVALID},
  163. {"INVALID ", MCS_INVALID},
  164. {"INVALID ", MCS_INVALID},
  165. {"INVALID ", MCS_INVALID},
  166. {"INVALID ", MCS_INVALID},
  167. {"INVALID ", MCS_VALID},
  168. },
  169. {
  170. {"HT MCS 0 (BPSK 1/2) ", MCS_VALID},
  171. {"HT MCS 1 (QPSK 1/2) ", MCS_VALID},
  172. {"HT MCS 2 (QPSK 3/4) ", MCS_VALID},
  173. {"HT MCS 3 (16-QAM 1/2)", MCS_VALID},
  174. {"HT MCS 4 (16-QAM 3/4)", MCS_VALID},
  175. {"HT MCS 5 (64-QAM 2/3)", MCS_VALID},
  176. {"HT MCS 6 (64-QAM 3/4)", MCS_VALID},
  177. {"HT MCS 7 (64-QAM 5/6)", MCS_VALID},
  178. {"INVALID ", MCS_INVALID},
  179. {"INVALID ", MCS_INVALID},
  180. {"INVALID ", MCS_INVALID},
  181. {"INVALID ", MCS_INVALID},
  182. {"INVALID ", MCS_VALID},
  183. },
  184. {
  185. {"VHT MCS 0 (BPSK 1/2) ", MCS_VALID},
  186. {"VHT MCS 1 (QPSK 1/2) ", MCS_VALID},
  187. {"VHT MCS 2 (QPSK 3/4) ", MCS_VALID},
  188. {"VHT MCS 3 (16-QAM 1/2) ", MCS_VALID},
  189. {"VHT MCS 4 (16-QAM 3/4) ", MCS_VALID},
  190. {"VHT MCS 5 (64-QAM 2/3) ", MCS_VALID},
  191. {"VHT MCS 6 (64-QAM 3/4) ", MCS_VALID},
  192. {"VHT MCS 7 (64-QAM 5/6) ", MCS_VALID},
  193. {"VHT MCS 8 (256-QAM 3/4) ", MCS_VALID},
  194. {"VHT MCS 9 (256-QAM 5/6) ", MCS_VALID},
  195. {"VHT MCS 10 (1024-QAM 3/4)", MCS_VALID},
  196. {"VHT MCS 11 (1024-QAM 5/6)", MCS_VALID},
  197. {"INVALID ", MCS_VALID},
  198. },
  199. {
  200. {"HE MCS 0 (BPSK 1/2) ", MCS_VALID},
  201. {"HE MCS 1 (QPSK 1/2) ", MCS_VALID},
  202. {"HE MCS 2 (QPSK 3/4) ", MCS_VALID},
  203. {"HE MCS 3 (16-QAM 1/2) ", MCS_VALID},
  204. {"HE MCS 4 (16-QAM 3/4) ", MCS_VALID},
  205. {"HE MCS 5 (64-QAM 2/3) ", MCS_VALID},
  206. {"HE MCS 6 (64-QAM 3/4) ", MCS_VALID},
  207. {"HE MCS 7 (64-QAM 5/6) ", MCS_VALID},
  208. {"HE MCS 8 (256-QAM 3/4) ", MCS_VALID},
  209. {"HE MCS 9 (256-QAM 5/6) ", MCS_VALID},
  210. {"HE MCS 10 (1024-QAM 3/4)", MCS_VALID},
  211. {"HE MCS 11 (1024-QAM 5/6)", MCS_VALID},
  212. {"INVALID ", MCS_VALID},
  213. }
  214. };
  215. /**
  216. * @brief Cpu ring map types
  217. */
  218. enum dp_cpu_ring_map_types {
  219. DP_DEFAULT_MAP,
  220. DP_NSS_FIRST_RADIO_OFFLOADED_MAP,
  221. DP_NSS_SECOND_RADIO_OFFLOADED_MAP,
  222. DP_NSS_ALL_RADIO_OFFLOADED_MAP,
  223. DP_CPU_RING_MAP_MAX
  224. };
  225. /**
  226. * @brief Cpu to tx ring map
  227. */
  228. static uint8_t dp_cpu_ring_map[DP_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  229. {0x0, 0x1, 0x2, 0x0},
  230. {0x1, 0x2, 0x1, 0x2},
  231. {0x0, 0x2, 0x0, 0x2},
  232. {0x2, 0x2, 0x2, 0x2}
  233. };
  234. /**
  235. * @brief Select the type of statistics
  236. */
  237. enum dp_stats_type {
  238. STATS_FW = 0,
  239. STATS_HOST = 1,
  240. STATS_TYPE_MAX = 2,
  241. };
  242. /**
  243. * @brief General Firmware statistics options
  244. *
  245. */
  246. enum dp_fw_stats {
  247. TXRX_FW_STATS_INVALID = -1,
  248. };
  249. /**
  250. * dp_stats_mapping_table - Firmware and Host statistics
  251. * currently supported
  252. */
  253. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  254. {HTT_DBG_EXT_STATS_RESET, TXRX_HOST_STATS_INVALID},
  255. {HTT_DBG_EXT_STATS_PDEV_TX, TXRX_HOST_STATS_INVALID},
  256. {HTT_DBG_EXT_STATS_PDEV_RX, TXRX_HOST_STATS_INVALID},
  257. {HTT_DBG_EXT_STATS_PDEV_TX_HWQ, TXRX_HOST_STATS_INVALID},
  258. {HTT_DBG_EXT_STATS_PDEV_TX_SCHED, TXRX_HOST_STATS_INVALID},
  259. {HTT_DBG_EXT_STATS_PDEV_ERROR, TXRX_HOST_STATS_INVALID},
  260. {HTT_DBG_EXT_STATS_PDEV_TQM, TXRX_HOST_STATS_INVALID},
  261. {HTT_DBG_EXT_STATS_TQM_CMDQ, TXRX_HOST_STATS_INVALID},
  262. {HTT_DBG_EXT_STATS_TX_DE_INFO, TXRX_HOST_STATS_INVALID},
  263. {HTT_DBG_EXT_STATS_PDEV_TX_RATE, TXRX_HOST_STATS_INVALID},
  264. {HTT_DBG_EXT_STATS_PDEV_RX_RATE, TXRX_HOST_STATS_INVALID},
  265. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  266. {HTT_DBG_EXT_STATS_TX_SELFGEN_INFO, TXRX_HOST_STATS_INVALID},
  267. {HTT_DBG_EXT_STATS_TX_MU_HWQ, TXRX_HOST_STATS_INVALID},
  268. {HTT_DBG_EXT_STATS_RING_IF_INFO, TXRX_HOST_STATS_INVALID},
  269. {HTT_DBG_EXT_STATS_SRNG_INFO, TXRX_HOST_STATS_INVALID},
  270. {HTT_DBG_EXT_STATS_SFM_INFO, TXRX_HOST_STATS_INVALID},
  271. {HTT_DBG_EXT_STATS_PDEV_TX_MU, TXRX_HOST_STATS_INVALID},
  272. {HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST, TXRX_HOST_STATS_INVALID},
  273. /* Last ENUM for HTT FW STATS */
  274. {DP_HTT_DBG_EXT_STATS_MAX, TXRX_HOST_STATS_INVALID},
  275. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  276. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  277. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  278. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  279. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  280. {TXRX_FW_STATS_INVALID, TXRX_AST_STATS},
  281. {TXRX_FW_STATS_INVALID, TXRX_SRNG_PTR_STATS},
  282. {TXRX_FW_STATS_INVALID, TXRX_RX_MON_STATS},
  283. {TXRX_FW_STATS_INVALID, TXRX_REO_QUEUE_STATS},
  284. };
  285. /* MCL specific functions */
  286. #ifdef CONFIG_MCL
  287. /**
  288. * dp_soc_get_mon_mask_for_interrupt_mode() - get mon mode mask for intr mode
  289. * @soc: pointer to dp_soc handle
  290. * @intr_ctx_num: interrupt context number for which mon mask is needed
  291. *
  292. * For MCL, monitor mode rings are being processed in timer contexts (polled).
  293. * This function is returning 0, since in interrupt mode(softirq based RX),
  294. * we donot want to process monitor mode rings in a softirq.
  295. *
  296. * So, in case packet log is enabled for SAP/STA/P2P modes,
  297. * regular interrupt processing will not process monitor mode rings. It would be
  298. * done in a separate timer context.
  299. *
  300. * Return: 0
  301. */
  302. static inline
  303. uint32_t dp_soc_get_mon_mask_for_interrupt_mode(struct dp_soc *soc, int intr_ctx_num)
  304. {
  305. return 0;
  306. }
  307. /*
  308. * dp_service_mon_rings()- timer to reap monitor rings
  309. * reqd as we are not getting ppdu end interrupts
  310. * @arg: SoC Handle
  311. *
  312. * Return:
  313. *
  314. */
  315. static void dp_service_mon_rings(void *arg)
  316. {
  317. struct dp_soc *soc = (struct dp_soc *)arg;
  318. int ring = 0, work_done, mac_id;
  319. struct dp_pdev *pdev = NULL;
  320. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  321. pdev = soc->pdev_list[ring];
  322. if (!pdev)
  323. continue;
  324. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  325. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  326. pdev->pdev_id);
  327. work_done = dp_mon_process(soc, mac_for_pdev,
  328. QCA_NAPI_BUDGET);
  329. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  330. FL("Reaped %d descs from Monitor rings"),
  331. work_done);
  332. }
  333. }
  334. qdf_timer_mod(&soc->mon_reap_timer, DP_INTR_POLL_TIMER_MS);
  335. }
  336. #ifndef REMOVE_PKT_LOG
  337. /**
  338. * dp_pkt_log_init() - API to initialize packet log
  339. * @ppdev: physical device handle
  340. * @scn: HIF context
  341. *
  342. * Return: none
  343. */
  344. void dp_pkt_log_init(struct cdp_pdev *ppdev, void *scn)
  345. {
  346. struct dp_pdev *handle = (struct dp_pdev *)ppdev;
  347. if (handle->pkt_log_init) {
  348. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  349. "%s: Packet log not initialized", __func__);
  350. return;
  351. }
  352. pktlog_sethandle(&handle->pl_dev, scn);
  353. pktlog_set_callback_regtype(PKTLOG_LITE_CALLBACK_REGISTRATION);
  354. if (pktlogmod_init(scn)) {
  355. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  356. "%s: pktlogmod_init failed", __func__);
  357. handle->pkt_log_init = false;
  358. } else {
  359. handle->pkt_log_init = true;
  360. }
  361. }
  362. /**
  363. * dp_pkt_log_con_service() - connect packet log service
  364. * @ppdev: physical device handle
  365. * @scn: device context
  366. *
  367. * Return: none
  368. */
  369. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn)
  370. {
  371. struct dp_pdev *pdev = (struct dp_pdev *)ppdev;
  372. dp_pkt_log_init((struct cdp_pdev *)pdev, scn);
  373. pktlog_htc_attach();
  374. }
  375. /**
  376. * dp_pktlogmod_exit() - API to cleanup pktlog info
  377. * @handle: Pdev handle
  378. *
  379. * Return: none
  380. */
  381. static void dp_pktlogmod_exit(struct dp_pdev *handle)
  382. {
  383. void *scn = (void *)handle->soc->hif_handle;
  384. if (!scn) {
  385. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  386. "%s: Invalid hif(scn) handle", __func__);
  387. return;
  388. }
  389. pktlogmod_exit(scn);
  390. handle->pkt_log_init = false;
  391. }
  392. #endif
  393. #else
  394. static void dp_pktlogmod_exit(struct dp_pdev *handle) { }
  395. /**
  396. * dp_soc_get_mon_mask_for_interrupt_mode() - get mon mode mask for intr mode
  397. * @soc: pointer to dp_soc handle
  398. * @intr_ctx_num: interrupt context number for which mon mask is needed
  399. *
  400. * Return: mon mask value
  401. */
  402. static inline
  403. uint32_t dp_soc_get_mon_mask_for_interrupt_mode(struct dp_soc *soc, int intr_ctx_num)
  404. {
  405. return wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  406. }
  407. #endif
  408. /**
  409. * dp_get_dp_vdev_from_cdp_vdev() - get dp_vdev from cdp_vdev by type-casting
  410. * @cdp_opaque_vdev: pointer to cdp_vdev
  411. *
  412. * Return: pointer to dp_vdev
  413. */
  414. static
  415. struct dp_vdev * dp_get_dp_vdev_from_cdp_vdev(struct cdp_vdev *cdp_opaque_vdev)
  416. {
  417. return (struct dp_vdev *)cdp_opaque_vdev;
  418. }
  419. static int dp_peer_add_ast_wifi3(struct cdp_soc_t *soc_hdl,
  420. struct cdp_peer *peer_hdl,
  421. uint8_t *mac_addr,
  422. enum cdp_txrx_ast_entry_type type,
  423. uint32_t flags)
  424. {
  425. return dp_peer_add_ast((struct dp_soc *)soc_hdl,
  426. (struct dp_peer *)peer_hdl,
  427. mac_addr,
  428. type,
  429. flags);
  430. }
  431. static void dp_peer_del_ast_wifi3(struct cdp_soc_t *soc_hdl,
  432. void *ast_entry_hdl)
  433. {
  434. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  435. qdf_spin_lock_bh(&soc->ast_lock);
  436. dp_peer_del_ast((struct dp_soc *)soc_hdl,
  437. (struct dp_ast_entry *)ast_entry_hdl);
  438. qdf_spin_unlock_bh(&soc->ast_lock);
  439. }
  440. static int dp_peer_update_ast_wifi3(struct cdp_soc_t *soc_hdl,
  441. struct cdp_peer *peer_hdl,
  442. uint8_t *wds_macaddr,
  443. uint32_t flags)
  444. {
  445. int status = -1;
  446. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  447. struct dp_ast_entry *ast_entry = NULL;
  448. qdf_spin_lock_bh(&soc->ast_lock);
  449. ast_entry = dp_peer_ast_hash_find(soc, wds_macaddr);
  450. if (ast_entry) {
  451. status = dp_peer_update_ast(soc,
  452. (struct dp_peer *)peer_hdl,
  453. ast_entry, flags);
  454. }
  455. qdf_spin_unlock_bh(&soc->ast_lock);
  456. return status;
  457. }
  458. /*
  459. * dp_wds_reset_ast_wifi3() - Reset the is_active param for ast entry
  460. * @soc_handle: Datapath SOC handle
  461. * @wds_macaddr: WDS entry MAC Address
  462. * Return: None
  463. */
  464. static void dp_wds_reset_ast_wifi3(struct cdp_soc_t *soc_hdl,
  465. uint8_t *wds_macaddr, void *vdev_handle)
  466. {
  467. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  468. struct dp_ast_entry *ast_entry = NULL;
  469. qdf_spin_lock_bh(&soc->ast_lock);
  470. ast_entry = dp_peer_ast_hash_find(soc, wds_macaddr);
  471. if (ast_entry) {
  472. if ((ast_entry->type != CDP_TXRX_AST_TYPE_STATIC) &&
  473. (ast_entry->type != CDP_TXRX_AST_TYPE_SELF) &&
  474. (ast_entry->type != CDP_TXRX_AST_TYPE_STA_BSS)) {
  475. ast_entry->is_active = TRUE;
  476. }
  477. }
  478. qdf_spin_unlock_bh(&soc->ast_lock);
  479. }
  480. /*
  481. * dp_wds_reset_ast_table_wifi3() - Reset the is_active param for all ast entry
  482. * @soc: Datapath SOC handle
  483. *
  484. * Return: None
  485. */
  486. static void dp_wds_reset_ast_table_wifi3(struct cdp_soc_t *soc_hdl,
  487. void *vdev_hdl)
  488. {
  489. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  490. struct dp_pdev *pdev;
  491. struct dp_vdev *vdev;
  492. struct dp_peer *peer;
  493. struct dp_ast_entry *ase, *temp_ase;
  494. int i;
  495. qdf_spin_lock_bh(&soc->ast_lock);
  496. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  497. pdev = soc->pdev_list[i];
  498. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  499. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  500. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  501. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  502. if ((ase->type ==
  503. CDP_TXRX_AST_TYPE_STATIC) ||
  504. (ase->type ==
  505. CDP_TXRX_AST_TYPE_SELF) ||
  506. (ase->type ==
  507. CDP_TXRX_AST_TYPE_STA_BSS))
  508. continue;
  509. ase->is_active = TRUE;
  510. }
  511. }
  512. }
  513. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  514. }
  515. qdf_spin_unlock_bh(&soc->ast_lock);
  516. }
  517. /*
  518. * dp_wds_flush_ast_table_wifi3() - Delete all wds and hmwds ast entry
  519. * @soc: Datapath SOC handle
  520. *
  521. * Return: None
  522. */
  523. static void dp_wds_flush_ast_table_wifi3(struct cdp_soc_t *soc_hdl)
  524. {
  525. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  526. struct dp_pdev *pdev;
  527. struct dp_vdev *vdev;
  528. struct dp_peer *peer;
  529. struct dp_ast_entry *ase, *temp_ase;
  530. int i;
  531. qdf_spin_lock_bh(&soc->ast_lock);
  532. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  533. pdev = soc->pdev_list[i];
  534. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  535. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  536. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  537. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  538. if ((ase->type ==
  539. CDP_TXRX_AST_TYPE_STATIC) ||
  540. (ase->type ==
  541. CDP_TXRX_AST_TYPE_SELF) ||
  542. (ase->type ==
  543. CDP_TXRX_AST_TYPE_STA_BSS))
  544. continue;
  545. dp_peer_del_ast(soc, ase);
  546. }
  547. }
  548. }
  549. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  550. }
  551. qdf_spin_unlock_bh(&soc->ast_lock);
  552. }
  553. static void *dp_peer_ast_hash_find_wifi3(struct cdp_soc_t *soc_hdl,
  554. uint8_t *ast_mac_addr)
  555. {
  556. struct dp_ast_entry *ast_entry;
  557. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  558. qdf_spin_lock_bh(&soc->ast_lock);
  559. ast_entry = dp_peer_ast_hash_find(soc, ast_mac_addr);
  560. qdf_spin_unlock_bh(&soc->ast_lock);
  561. return (void *)ast_entry;
  562. }
  563. static uint8_t dp_peer_ast_get_pdev_id_wifi3(struct cdp_soc_t *soc_hdl,
  564. void *ast_entry_hdl)
  565. {
  566. return dp_peer_ast_get_pdev_id((struct dp_soc *)soc_hdl,
  567. (struct dp_ast_entry *)ast_entry_hdl);
  568. }
  569. static uint8_t dp_peer_ast_get_next_hop_wifi3(struct cdp_soc_t *soc_hdl,
  570. void *ast_entry_hdl)
  571. {
  572. return dp_peer_ast_get_next_hop((struct dp_soc *)soc_hdl,
  573. (struct dp_ast_entry *)ast_entry_hdl);
  574. }
  575. static void dp_peer_ast_set_type_wifi3(
  576. struct cdp_soc_t *soc_hdl,
  577. void *ast_entry_hdl,
  578. enum cdp_txrx_ast_entry_type type)
  579. {
  580. dp_peer_ast_set_type((struct dp_soc *)soc_hdl,
  581. (struct dp_ast_entry *)ast_entry_hdl,
  582. type);
  583. }
  584. static enum cdp_txrx_ast_entry_type dp_peer_ast_get_type_wifi3(
  585. struct cdp_soc_t *soc_hdl,
  586. void *ast_entry_hdl)
  587. {
  588. return ((struct dp_ast_entry *)ast_entry_hdl)->type;
  589. }
  590. #if defined(FEATURE_AST) && defined(AST_HKV1_WORKAROUND)
  591. void dp_peer_ast_set_cp_ctx_wifi3(struct cdp_soc_t *soc_handle,
  592. void *ast_entry,
  593. void *cp_ctx)
  594. {
  595. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  596. qdf_spin_lock_bh(&soc->ast_lock);
  597. dp_peer_ast_set_cp_ctx(soc,
  598. (struct dp_ast_entry *)ast_entry, cp_ctx);
  599. qdf_spin_unlock_bh(&soc->ast_lock);
  600. }
  601. void *dp_peer_ast_get_cp_ctx_wifi3(struct cdp_soc_t *soc_handle,
  602. void *ast_entry)
  603. {
  604. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  605. void *cp_ctx = NULL;
  606. qdf_spin_lock_bh(&soc->ast_lock);
  607. cp_ctx = dp_peer_ast_get_cp_ctx(soc,
  608. (struct dp_ast_entry *)ast_entry);
  609. qdf_spin_unlock_bh(&soc->ast_lock);
  610. return cp_ctx;
  611. }
  612. bool dp_peer_ast_get_wmi_sent_wifi3(struct cdp_soc_t *soc_handle,
  613. void *ast_entry)
  614. {
  615. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  616. bool wmi_sent = false;
  617. qdf_spin_lock_bh(&soc->ast_lock);
  618. wmi_sent = dp_peer_ast_get_wmi_sent(soc,
  619. (struct dp_ast_entry *)ast_entry);
  620. qdf_spin_unlock_bh(&soc->ast_lock);
  621. return wmi_sent;
  622. }
  623. void dp_peer_ast_free_entry_wifi3(struct cdp_soc_t *soc_handle,
  624. void *ast_entry)
  625. {
  626. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  627. qdf_spin_lock_bh(&soc->ast_lock);
  628. dp_peer_ast_free_entry(soc, (struct dp_ast_entry *)ast_entry);
  629. qdf_spin_unlock_bh(&soc->ast_lock);
  630. }
  631. #endif
  632. /**
  633. * dp_srng_find_ring_in_mask() - find which ext_group a ring belongs
  634. * @ring_num: ring num of the ring being queried
  635. * @grp_mask: the grp_mask array for the ring type in question.
  636. *
  637. * The grp_mask array is indexed by group number and the bit fields correspond
  638. * to ring numbers. We are finding which interrupt group a ring belongs to.
  639. *
  640. * Return: the index in the grp_mask array with the ring number.
  641. * -QDF_STATUS_E_NOENT if no entry is found
  642. */
  643. static int dp_srng_find_ring_in_mask(int ring_num, int *grp_mask)
  644. {
  645. int ext_group_num;
  646. int mask = 1 << ring_num;
  647. for (ext_group_num = 0; ext_group_num < WLAN_CFG_INT_NUM_CONTEXTS;
  648. ext_group_num++) {
  649. if (mask & grp_mask[ext_group_num])
  650. return ext_group_num;
  651. }
  652. return -QDF_STATUS_E_NOENT;
  653. }
  654. static int dp_srng_calculate_msi_group(struct dp_soc *soc,
  655. enum hal_ring_type ring_type,
  656. int ring_num)
  657. {
  658. int *grp_mask;
  659. switch (ring_type) {
  660. case WBM2SW_RELEASE:
  661. /* dp_tx_comp_handler - soc->tx_comp_ring */
  662. if (ring_num < 3)
  663. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  664. /* dp_rx_wbm_err_process - soc->rx_rel_ring */
  665. else if (ring_num == 3) {
  666. /* sw treats this as a separate ring type */
  667. grp_mask = &soc->wlan_cfg_ctx->
  668. int_rx_wbm_rel_ring_mask[0];
  669. ring_num = 0;
  670. } else {
  671. qdf_assert(0);
  672. return -QDF_STATUS_E_NOENT;
  673. }
  674. break;
  675. case REO_EXCEPTION:
  676. /* dp_rx_err_process - &soc->reo_exception_ring */
  677. grp_mask = &soc->wlan_cfg_ctx->int_rx_err_ring_mask[0];
  678. break;
  679. case REO_DST:
  680. /* dp_rx_process - soc->reo_dest_ring */
  681. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  682. break;
  683. case REO_STATUS:
  684. /* dp_reo_status_ring_handler - soc->reo_status_ring */
  685. grp_mask = &soc->wlan_cfg_ctx->int_reo_status_ring_mask[0];
  686. break;
  687. /* dp_rx_mon_status_srng_process - pdev->rxdma_mon_status_ring*/
  688. case RXDMA_MONITOR_STATUS:
  689. /* dp_rx_mon_dest_process - pdev->rxdma_mon_dst_ring */
  690. case RXDMA_MONITOR_DST:
  691. /* dp_mon_process */
  692. grp_mask = &soc->wlan_cfg_ctx->int_rx_mon_ring_mask[0];
  693. break;
  694. case RXDMA_DST:
  695. /* dp_rxdma_err_process */
  696. grp_mask = &soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[0];
  697. break;
  698. case RXDMA_BUF:
  699. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  700. break;
  701. case RXDMA_MONITOR_BUF:
  702. /* TODO: support low_thresh interrupt */
  703. return -QDF_STATUS_E_NOENT;
  704. break;
  705. case TCL_DATA:
  706. case TCL_CMD:
  707. case REO_CMD:
  708. case SW2WBM_RELEASE:
  709. case WBM_IDLE_LINK:
  710. /* normally empty SW_TO_HW rings */
  711. return -QDF_STATUS_E_NOENT;
  712. break;
  713. case TCL_STATUS:
  714. case REO_REINJECT:
  715. /* misc unused rings */
  716. return -QDF_STATUS_E_NOENT;
  717. break;
  718. case CE_SRC:
  719. case CE_DST:
  720. case CE_DST_STATUS:
  721. /* CE_rings - currently handled by hif */
  722. default:
  723. return -QDF_STATUS_E_NOENT;
  724. break;
  725. }
  726. return dp_srng_find_ring_in_mask(ring_num, grp_mask);
  727. }
  728. static void dp_srng_msi_setup(struct dp_soc *soc, struct hal_srng_params
  729. *ring_params, int ring_type, int ring_num)
  730. {
  731. int msi_group_number;
  732. int msi_data_count;
  733. int ret;
  734. uint32_t msi_data_start, msi_irq_start, addr_low, addr_high;
  735. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  736. &msi_data_count, &msi_data_start,
  737. &msi_irq_start);
  738. if (ret)
  739. return;
  740. msi_group_number = dp_srng_calculate_msi_group(soc, ring_type,
  741. ring_num);
  742. if (msi_group_number < 0) {
  743. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  744. FL("ring not part of an ext_group; ring_type: %d,ring_num %d"),
  745. ring_type, ring_num);
  746. ring_params->msi_addr = 0;
  747. ring_params->msi_data = 0;
  748. return;
  749. }
  750. if (msi_group_number > msi_data_count) {
  751. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  752. FL("2 msi_groups will share an msi; msi_group_num %d"),
  753. msi_group_number);
  754. QDF_ASSERT(0);
  755. }
  756. pld_get_msi_address(soc->osdev->dev, &addr_low, &addr_high);
  757. ring_params->msi_addr = addr_low;
  758. ring_params->msi_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
  759. ring_params->msi_data = (msi_group_number % msi_data_count)
  760. + msi_data_start;
  761. ring_params->flags |= HAL_SRNG_MSI_INTR;
  762. }
  763. /**
  764. * dp_print_ast_stats() - Dump AST table contents
  765. * @soc: Datapath soc handle
  766. *
  767. * return void
  768. */
  769. #ifdef FEATURE_AST
  770. static void dp_print_ast_stats(struct dp_soc *soc)
  771. {
  772. uint8_t i;
  773. uint8_t num_entries = 0;
  774. struct dp_vdev *vdev;
  775. struct dp_pdev *pdev;
  776. struct dp_peer *peer;
  777. struct dp_ast_entry *ase, *tmp_ase;
  778. char type[CDP_TXRX_AST_TYPE_MAX][10] = {
  779. "NONE", "STATIC", "SELF", "WDS", "MEC", "HMWDS", "BSS"};
  780. DP_PRINT_STATS("AST Stats:");
  781. DP_PRINT_STATS(" Entries Added = %d", soc->stats.ast.added);
  782. DP_PRINT_STATS(" Entries Deleted = %d", soc->stats.ast.deleted);
  783. DP_PRINT_STATS(" Entries Agedout = %d", soc->stats.ast.aged_out);
  784. DP_PRINT_STATS("AST Table:");
  785. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  786. pdev = soc->pdev_list[i];
  787. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  788. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  789. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  790. DP_PEER_ITERATE_ASE_LIST(peer, ase, tmp_ase) {
  791. DP_PRINT_STATS("%6d mac_addr = %pM"
  792. " peer_mac_addr = %pM"
  793. " type = %s"
  794. " next_hop = %d"
  795. " is_active = %d"
  796. " is_bss = %d"
  797. " ast_idx = %d"
  798. " pdev_id = %d"
  799. " vdev_id = %d",
  800. ++num_entries,
  801. ase->mac_addr.raw,
  802. ase->peer->mac_addr.raw,
  803. type[ase->type],
  804. ase->next_hop,
  805. ase->is_active,
  806. ase->is_bss,
  807. ase->ast_idx,
  808. ase->pdev_id,
  809. ase->vdev_id);
  810. }
  811. }
  812. }
  813. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  814. }
  815. }
  816. #else
  817. static void dp_print_ast_stats(struct dp_soc *soc)
  818. {
  819. DP_PRINT_STATS("AST Stats not available.Enable FEATURE_AST");
  820. return;
  821. }
  822. #endif
  823. static void dp_print_peer_table(struct dp_vdev *vdev)
  824. {
  825. struct dp_peer *peer = NULL;
  826. DP_PRINT_STATS("Dumping Peer Table Stats:");
  827. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  828. if (!peer) {
  829. DP_PRINT_STATS("Invalid Peer");
  830. return;
  831. }
  832. DP_PRINT_STATS(" peer_mac_addr = %pM"
  833. " nawds_enabled = %d"
  834. " bss_peer = %d"
  835. " wapi = %d"
  836. " wds_enabled = %d"
  837. " delete in progress = %d",
  838. peer->mac_addr.raw,
  839. peer->nawds_enabled,
  840. peer->bss_peer,
  841. peer->wapi,
  842. peer->wds_enabled,
  843. peer->delete_in_progress);
  844. }
  845. }
  846. /*
  847. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  848. */
  849. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  850. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  851. {
  852. void *hal_soc = soc->hal_soc;
  853. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  854. /* TODO: See if we should get align size from hal */
  855. uint32_t ring_base_align = 8;
  856. struct hal_srng_params ring_params;
  857. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  858. /* TODO: Currently hal layer takes care of endianness related settings.
  859. * See if these settings need to passed from DP layer
  860. */
  861. ring_params.flags = 0;
  862. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  863. FL("Ring type: %d, num:%d"), ring_type, ring_num);
  864. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  865. srng->hal_srng = NULL;
  866. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  867. srng->num_entries = num_entries;
  868. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  869. soc->osdev, soc->osdev->dev, srng->alloc_size,
  870. &(srng->base_paddr_unaligned));
  871. if (!srng->base_vaddr_unaligned) {
  872. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  873. FL("alloc failed - ring_type: %d, ring_num %d"),
  874. ring_type, ring_num);
  875. return QDF_STATUS_E_NOMEM;
  876. }
  877. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  878. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  879. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  880. ((unsigned long)(ring_params.ring_base_vaddr) -
  881. (unsigned long)srng->base_vaddr_unaligned);
  882. ring_params.num_entries = num_entries;
  883. if (soc->intr_mode == DP_INTR_MSI) {
  884. dp_srng_msi_setup(soc, &ring_params, ring_type, ring_num);
  885. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  886. FL("Using MSI for ring_type: %d, ring_num %d"),
  887. ring_type, ring_num);
  888. } else {
  889. ring_params.msi_data = 0;
  890. ring_params.msi_addr = 0;
  891. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  892. FL("Skipping MSI for ring_type: %d, ring_num %d"),
  893. ring_type, ring_num);
  894. }
  895. /*
  896. * Setup interrupt timer and batch counter thresholds for
  897. * interrupt mitigation based on ring type
  898. */
  899. if (ring_type == REO_DST) {
  900. ring_params.intr_timer_thres_us =
  901. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  902. ring_params.intr_batch_cntr_thres_entries =
  903. wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
  904. } else if (ring_type == WBM2SW_RELEASE && (ring_num < 3)) {
  905. ring_params.intr_timer_thres_us =
  906. wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
  907. ring_params.intr_batch_cntr_thres_entries =
  908. wlan_cfg_get_int_batch_threshold_tx(soc->wlan_cfg_ctx);
  909. } else {
  910. ring_params.intr_timer_thres_us =
  911. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  912. ring_params.intr_batch_cntr_thres_entries =
  913. wlan_cfg_get_int_batch_threshold_other(soc->wlan_cfg_ctx);
  914. }
  915. /* Enable low threshold interrupts for rx buffer rings (regular and
  916. * monitor buffer rings.
  917. * TODO: See if this is required for any other ring
  918. */
  919. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF) ||
  920. (ring_type == RXDMA_MONITOR_STATUS)) {
  921. /* TODO: Setting low threshold to 1/8th of ring size
  922. * see if this needs to be configurable
  923. */
  924. ring_params.low_threshold = num_entries >> 3;
  925. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  926. ring_params.intr_timer_thres_us =
  927. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  928. ring_params.intr_batch_cntr_thres_entries = 0;
  929. }
  930. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  931. mac_id, &ring_params);
  932. if (!srng->hal_srng) {
  933. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  934. srng->alloc_size,
  935. srng->base_vaddr_unaligned,
  936. srng->base_paddr_unaligned, 0);
  937. }
  938. return 0;
  939. }
  940. /**
  941. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  942. * Any buffers allocated and attached to ring entries are expected to be freed
  943. * before calling this function.
  944. */
  945. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  946. int ring_type, int ring_num)
  947. {
  948. if (!srng->hal_srng) {
  949. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  950. FL("Ring type: %d, num:%d not setup"),
  951. ring_type, ring_num);
  952. return;
  953. }
  954. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  955. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  956. srng->alloc_size,
  957. srng->base_vaddr_unaligned,
  958. srng->base_paddr_unaligned, 0);
  959. srng->hal_srng = NULL;
  960. }
  961. /* TODO: Need this interface from HIF */
  962. void *hif_get_hal_handle(void *hif_handle);
  963. /*
  964. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  965. * @dp_ctx: DP SOC handle
  966. * @budget: Number of frames/descriptors that can be processed in one shot
  967. *
  968. * Return: remaining budget/quota for the soc device
  969. */
  970. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  971. {
  972. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  973. struct dp_soc *soc = int_ctx->soc;
  974. int ring = 0;
  975. uint32_t work_done = 0;
  976. int budget = dp_budget;
  977. uint8_t tx_mask = int_ctx->tx_ring_mask;
  978. uint8_t rx_mask = int_ctx->rx_ring_mask;
  979. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  980. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  981. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  982. uint32_t remaining_quota = dp_budget;
  983. struct dp_pdev *pdev = NULL;
  984. int mac_id;
  985. /* Process Tx completion interrupts first to return back buffers */
  986. while (tx_mask) {
  987. if (tx_mask & 0x1) {
  988. work_done = dp_tx_comp_handler(soc,
  989. soc->tx_comp_ring[ring].hal_srng,
  990. remaining_quota);
  991. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  992. "tx mask 0x%x ring %d, budget %d, work_done %d",
  993. tx_mask, ring, budget, work_done);
  994. budget -= work_done;
  995. if (budget <= 0)
  996. goto budget_done;
  997. remaining_quota = budget;
  998. }
  999. tx_mask = tx_mask >> 1;
  1000. ring++;
  1001. }
  1002. /* Process REO Exception ring interrupt */
  1003. if (rx_err_mask) {
  1004. work_done = dp_rx_err_process(soc,
  1005. soc->reo_exception_ring.hal_srng,
  1006. remaining_quota);
  1007. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1008. "REO Exception Ring: work_done %d budget %d",
  1009. work_done, budget);
  1010. budget -= work_done;
  1011. if (budget <= 0) {
  1012. goto budget_done;
  1013. }
  1014. remaining_quota = budget;
  1015. }
  1016. /* Process Rx WBM release ring interrupt */
  1017. if (rx_wbm_rel_mask) {
  1018. work_done = dp_rx_wbm_err_process(soc,
  1019. soc->rx_rel_ring.hal_srng, remaining_quota);
  1020. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1021. "WBM Release Ring: work_done %d budget %d",
  1022. work_done, budget);
  1023. budget -= work_done;
  1024. if (budget <= 0) {
  1025. goto budget_done;
  1026. }
  1027. remaining_quota = budget;
  1028. }
  1029. /* Process Rx interrupts */
  1030. if (rx_mask) {
  1031. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  1032. if (rx_mask & (1 << ring)) {
  1033. work_done = dp_rx_process(int_ctx,
  1034. soc->reo_dest_ring[ring].hal_srng,
  1035. ring,
  1036. remaining_quota);
  1037. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1038. "rx mask 0x%x ring %d, work_done %d budget %d",
  1039. rx_mask, ring, work_done, budget);
  1040. budget -= work_done;
  1041. if (budget <= 0)
  1042. goto budget_done;
  1043. remaining_quota = budget;
  1044. }
  1045. }
  1046. for (ring = 0; ring < MAX_RX_MAC_RINGS; ring++) {
  1047. work_done = dp_rxdma_err_process(soc, ring,
  1048. remaining_quota);
  1049. budget -= work_done;
  1050. }
  1051. }
  1052. if (reo_status_mask)
  1053. dp_reo_status_ring_handler(soc);
  1054. /* Process LMAC interrupts */
  1055. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  1056. pdev = soc->pdev_list[ring];
  1057. if (pdev == NULL)
  1058. continue;
  1059. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1060. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  1061. pdev->pdev_id);
  1062. if (int_ctx->rx_mon_ring_mask & (1 << mac_for_pdev)) {
  1063. work_done = dp_mon_process(soc, mac_for_pdev,
  1064. remaining_quota);
  1065. budget -= work_done;
  1066. if (budget <= 0)
  1067. goto budget_done;
  1068. remaining_quota = budget;
  1069. }
  1070. if (int_ctx->rxdma2host_ring_mask &
  1071. (1 << mac_for_pdev)) {
  1072. work_done = dp_rxdma_err_process(soc,
  1073. mac_for_pdev,
  1074. remaining_quota);
  1075. budget -= work_done;
  1076. if (budget <= 0)
  1077. goto budget_done;
  1078. remaining_quota = budget;
  1079. }
  1080. if (int_ctx->host2rxdma_ring_mask &
  1081. (1 << mac_for_pdev)) {
  1082. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1083. union dp_rx_desc_list_elem_t *tail = NULL;
  1084. struct dp_srng *rx_refill_buf_ring =
  1085. &pdev->rx_refill_buf_ring;
  1086. DP_STATS_INC(pdev, replenish.low_thresh_intrs,
  1087. 1);
  1088. dp_rx_buffers_replenish(soc, mac_for_pdev,
  1089. rx_refill_buf_ring,
  1090. &soc->rx_desc_buf[mac_for_pdev], 0,
  1091. &desc_list, &tail);
  1092. }
  1093. }
  1094. }
  1095. qdf_lro_flush(int_ctx->lro_ctx);
  1096. budget_done:
  1097. return dp_budget - budget;
  1098. }
  1099. /* dp_interrupt_timer()- timer poll for interrupts
  1100. *
  1101. * @arg: SoC Handle
  1102. *
  1103. * Return:
  1104. *
  1105. */
  1106. static void dp_interrupt_timer(void *arg)
  1107. {
  1108. struct dp_soc *soc = (struct dp_soc *) arg;
  1109. int i;
  1110. if (qdf_atomic_read(&soc->cmn_init_done)) {
  1111. for (i = 0;
  1112. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  1113. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  1114. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  1115. }
  1116. }
  1117. /*
  1118. * dp_soc_interrupt_attach_poll() - Register handlers for DP interrupts
  1119. * @txrx_soc: DP SOC handle
  1120. *
  1121. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  1122. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  1123. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  1124. *
  1125. * Return: 0 for success. nonzero for failure.
  1126. */
  1127. static QDF_STATUS dp_soc_attach_poll(void *txrx_soc)
  1128. {
  1129. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1130. int i;
  1131. soc->intr_mode = DP_INTR_POLL;
  1132. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1133. soc->intr_ctx[i].dp_intr_id = i;
  1134. soc->intr_ctx[i].tx_ring_mask =
  1135. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  1136. soc->intr_ctx[i].rx_ring_mask =
  1137. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  1138. soc->intr_ctx[i].rx_mon_ring_mask =
  1139. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  1140. soc->intr_ctx[i].rx_err_ring_mask =
  1141. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  1142. soc->intr_ctx[i].rx_wbm_rel_ring_mask =
  1143. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  1144. soc->intr_ctx[i].reo_status_ring_mask =
  1145. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  1146. soc->intr_ctx[i].rxdma2host_ring_mask =
  1147. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  1148. soc->intr_ctx[i].soc = soc;
  1149. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1150. }
  1151. qdf_timer_init(soc->osdev, &soc->int_timer,
  1152. dp_interrupt_timer, (void *)soc,
  1153. QDF_TIMER_TYPE_WAKE_APPS);
  1154. return QDF_STATUS_SUCCESS;
  1155. }
  1156. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc);
  1157. #if defined(CONFIG_MCL)
  1158. extern int con_mode_monitor;
  1159. /*
  1160. * dp_soc_interrupt_attach_wrapper() - Register handlers for DP interrupts
  1161. * @txrx_soc: DP SOC handle
  1162. *
  1163. * Call the appropriate attach function based on the mode of operation.
  1164. * This is a WAR for enabling monitor mode.
  1165. *
  1166. * Return: 0 for success. nonzero for failure.
  1167. */
  1168. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  1169. {
  1170. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1171. if (!(soc->wlan_cfg_ctx->napi_enabled) ||
  1172. con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  1173. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1174. "%s: Poll mode", __func__);
  1175. return dp_soc_attach_poll(txrx_soc);
  1176. } else {
  1177. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1178. "%s: Interrupt mode", __func__);
  1179. return dp_soc_interrupt_attach(txrx_soc);
  1180. }
  1181. }
  1182. #else
  1183. #if defined(DP_INTR_POLL_BASED) && DP_INTR_POLL_BASED
  1184. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  1185. {
  1186. return dp_soc_attach_poll(txrx_soc);
  1187. }
  1188. #else
  1189. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  1190. {
  1191. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1192. if (hif_is_polled_mode_enabled(soc->hif_handle))
  1193. return dp_soc_attach_poll(txrx_soc);
  1194. else
  1195. return dp_soc_interrupt_attach(txrx_soc);
  1196. }
  1197. #endif
  1198. #endif
  1199. static void dp_soc_interrupt_map_calculate_integrated(struct dp_soc *soc,
  1200. int intr_ctx_num, int *irq_id_map, int *num_irq_r)
  1201. {
  1202. int j;
  1203. int num_irq = 0;
  1204. int tx_mask =
  1205. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1206. int rx_mask =
  1207. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1208. int rx_mon_mask =
  1209. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1210. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1211. soc->wlan_cfg_ctx, intr_ctx_num);
  1212. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1213. soc->wlan_cfg_ctx, intr_ctx_num);
  1214. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1215. soc->wlan_cfg_ctx, intr_ctx_num);
  1216. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1217. soc->wlan_cfg_ctx, intr_ctx_num);
  1218. int host2rxdma_ring_mask = wlan_cfg_get_host2rxdma_ring_mask(
  1219. soc->wlan_cfg_ctx, intr_ctx_num);
  1220. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  1221. if (tx_mask & (1 << j)) {
  1222. irq_id_map[num_irq++] =
  1223. (wbm2host_tx_completions_ring1 - j);
  1224. }
  1225. if (rx_mask & (1 << j)) {
  1226. irq_id_map[num_irq++] =
  1227. (reo2host_destination_ring1 - j);
  1228. }
  1229. if (rxdma2host_ring_mask & (1 << j)) {
  1230. irq_id_map[num_irq++] =
  1231. rxdma2host_destination_ring_mac1 -
  1232. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1233. }
  1234. if (host2rxdma_ring_mask & (1 << j)) {
  1235. irq_id_map[num_irq++] =
  1236. host2rxdma_host_buf_ring_mac1 -
  1237. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1238. }
  1239. if (rx_mon_mask & (1 << j)) {
  1240. irq_id_map[num_irq++] =
  1241. ppdu_end_interrupts_mac1 -
  1242. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1243. irq_id_map[num_irq++] =
  1244. rxdma2host_monitor_status_ring_mac1 -
  1245. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1246. }
  1247. if (rx_wbm_rel_ring_mask & (1 << j))
  1248. irq_id_map[num_irq++] = wbm2host_rx_release;
  1249. if (rx_err_ring_mask & (1 << j))
  1250. irq_id_map[num_irq++] = reo2host_exception;
  1251. if (reo_status_ring_mask & (1 << j))
  1252. irq_id_map[num_irq++] = reo2host_status;
  1253. }
  1254. *num_irq_r = num_irq;
  1255. }
  1256. static void dp_soc_interrupt_map_calculate_msi(struct dp_soc *soc,
  1257. int intr_ctx_num, int *irq_id_map, int *num_irq_r,
  1258. int msi_vector_count, int msi_vector_start)
  1259. {
  1260. int tx_mask = wlan_cfg_get_tx_ring_mask(
  1261. soc->wlan_cfg_ctx, intr_ctx_num);
  1262. int rx_mask = wlan_cfg_get_rx_ring_mask(
  1263. soc->wlan_cfg_ctx, intr_ctx_num);
  1264. int rx_mon_mask = wlan_cfg_get_rx_mon_ring_mask(
  1265. soc->wlan_cfg_ctx, intr_ctx_num);
  1266. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1267. soc->wlan_cfg_ctx, intr_ctx_num);
  1268. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1269. soc->wlan_cfg_ctx, intr_ctx_num);
  1270. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1271. soc->wlan_cfg_ctx, intr_ctx_num);
  1272. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1273. soc->wlan_cfg_ctx, intr_ctx_num);
  1274. unsigned int vector =
  1275. (intr_ctx_num % msi_vector_count) + msi_vector_start;
  1276. int num_irq = 0;
  1277. soc->intr_mode = DP_INTR_MSI;
  1278. if (tx_mask | rx_mask | rx_mon_mask | rx_err_ring_mask |
  1279. rx_wbm_rel_ring_mask | reo_status_ring_mask | rxdma2host_ring_mask)
  1280. irq_id_map[num_irq++] =
  1281. pld_get_msi_irq(soc->osdev->dev, vector);
  1282. *num_irq_r = num_irq;
  1283. }
  1284. static void dp_soc_interrupt_map_calculate(struct dp_soc *soc, int intr_ctx_num,
  1285. int *irq_id_map, int *num_irq)
  1286. {
  1287. int msi_vector_count, ret;
  1288. uint32_t msi_base_data, msi_vector_start;
  1289. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  1290. &msi_vector_count,
  1291. &msi_base_data,
  1292. &msi_vector_start);
  1293. if (ret)
  1294. return dp_soc_interrupt_map_calculate_integrated(soc,
  1295. intr_ctx_num, irq_id_map, num_irq);
  1296. else
  1297. dp_soc_interrupt_map_calculate_msi(soc,
  1298. intr_ctx_num, irq_id_map, num_irq,
  1299. msi_vector_count, msi_vector_start);
  1300. }
  1301. /*
  1302. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  1303. * @txrx_soc: DP SOC handle
  1304. *
  1305. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  1306. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  1307. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  1308. *
  1309. * Return: 0 for success. nonzero for failure.
  1310. */
  1311. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  1312. {
  1313. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1314. int i = 0;
  1315. int num_irq = 0;
  1316. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1317. int ret = 0;
  1318. /* Map of IRQ ids registered with one interrupt context */
  1319. int irq_id_map[HIF_MAX_GRP_IRQ];
  1320. int tx_mask =
  1321. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  1322. int rx_mask =
  1323. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  1324. int rx_mon_mask =
  1325. dp_soc_get_mon_mask_for_interrupt_mode(soc, i);
  1326. int rx_err_ring_mask =
  1327. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  1328. int rx_wbm_rel_ring_mask =
  1329. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  1330. int reo_status_ring_mask =
  1331. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  1332. int rxdma2host_ring_mask =
  1333. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  1334. int host2rxdma_ring_mask =
  1335. wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx, i);
  1336. soc->intr_ctx[i].dp_intr_id = i;
  1337. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  1338. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  1339. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  1340. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  1341. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  1342. soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask;
  1343. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  1344. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  1345. soc->intr_ctx[i].soc = soc;
  1346. num_irq = 0;
  1347. dp_soc_interrupt_map_calculate(soc, i, &irq_id_map[0],
  1348. &num_irq);
  1349. ret = hif_register_ext_group(soc->hif_handle,
  1350. num_irq, irq_id_map, dp_service_srngs,
  1351. &soc->intr_ctx[i], "dp_intr",
  1352. HIF_EXEC_NAPI_TYPE, QCA_NAPI_DEF_SCALE_BIN_SHIFT);
  1353. if (ret) {
  1354. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1355. FL("failed, ret = %d"), ret);
  1356. return QDF_STATUS_E_FAILURE;
  1357. }
  1358. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1359. }
  1360. hif_configure_ext_group_interrupts(soc->hif_handle);
  1361. return QDF_STATUS_SUCCESS;
  1362. }
  1363. /*
  1364. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  1365. * @txrx_soc: DP SOC handle
  1366. *
  1367. * Return: void
  1368. */
  1369. static void dp_soc_interrupt_detach(void *txrx_soc)
  1370. {
  1371. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1372. int i;
  1373. if (soc->intr_mode == DP_INTR_POLL) {
  1374. qdf_timer_stop(&soc->int_timer);
  1375. qdf_timer_free(&soc->int_timer);
  1376. } else {
  1377. hif_deregister_exec_group(soc->hif_handle, "dp_intr");
  1378. }
  1379. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1380. soc->intr_ctx[i].tx_ring_mask = 0;
  1381. soc->intr_ctx[i].rx_ring_mask = 0;
  1382. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  1383. soc->intr_ctx[i].rx_err_ring_mask = 0;
  1384. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  1385. soc->intr_ctx[i].reo_status_ring_mask = 0;
  1386. soc->intr_ctx[i].rxdma2host_ring_mask = 0;
  1387. soc->intr_ctx[i].host2rxdma_ring_mask = 0;
  1388. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  1389. }
  1390. }
  1391. #define AVG_MAX_MPDUS_PER_TID 128
  1392. #define AVG_TIDS_PER_CLIENT 2
  1393. #define AVG_FLOWS_PER_TID 2
  1394. #define AVG_MSDUS_PER_FLOW 128
  1395. #define AVG_MSDUS_PER_MPDU 4
  1396. /*
  1397. * Allocate and setup link descriptor pool that will be used by HW for
  1398. * various link and queue descriptors and managed by WBM
  1399. */
  1400. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  1401. {
  1402. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  1403. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  1404. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  1405. uint32_t num_mpdus_per_link_desc =
  1406. hal_num_mpdus_per_link_desc(soc->hal_soc);
  1407. uint32_t num_msdus_per_link_desc =
  1408. hal_num_msdus_per_link_desc(soc->hal_soc);
  1409. uint32_t num_mpdu_links_per_queue_desc =
  1410. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  1411. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  1412. uint32_t total_link_descs, total_mem_size;
  1413. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  1414. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  1415. uint32_t num_link_desc_banks;
  1416. uint32_t last_bank_size = 0;
  1417. uint32_t entry_size, num_entries;
  1418. int i;
  1419. uint32_t desc_id = 0;
  1420. /* Only Tx queue descriptors are allocated from common link descriptor
  1421. * pool Rx queue descriptors are not included in this because (REO queue
  1422. * extension descriptors) they are expected to be allocated contiguously
  1423. * with REO queue descriptors
  1424. */
  1425. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1426. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  1427. num_mpdu_queue_descs = num_mpdu_link_descs /
  1428. num_mpdu_links_per_queue_desc;
  1429. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1430. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  1431. num_msdus_per_link_desc;
  1432. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1433. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  1434. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  1435. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  1436. /* Round up to power of 2 */
  1437. total_link_descs = 1;
  1438. while (total_link_descs < num_entries)
  1439. total_link_descs <<= 1;
  1440. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1441. FL("total_link_descs: %u, link_desc_size: %d"),
  1442. total_link_descs, link_desc_size);
  1443. total_mem_size = total_link_descs * link_desc_size;
  1444. total_mem_size += link_desc_align;
  1445. if (total_mem_size <= max_alloc_size) {
  1446. num_link_desc_banks = 0;
  1447. last_bank_size = total_mem_size;
  1448. } else {
  1449. num_link_desc_banks = (total_mem_size) /
  1450. (max_alloc_size - link_desc_align);
  1451. last_bank_size = total_mem_size %
  1452. (max_alloc_size - link_desc_align);
  1453. }
  1454. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1455. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  1456. total_mem_size, num_link_desc_banks);
  1457. for (i = 0; i < num_link_desc_banks; i++) {
  1458. soc->link_desc_banks[i].base_vaddr_unaligned =
  1459. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1460. max_alloc_size,
  1461. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1462. soc->link_desc_banks[i].size = max_alloc_size;
  1463. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  1464. soc->link_desc_banks[i].base_vaddr_unaligned) +
  1465. ((unsigned long)(
  1466. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1467. link_desc_align));
  1468. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  1469. soc->link_desc_banks[i].base_paddr_unaligned) +
  1470. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1471. (unsigned long)(
  1472. soc->link_desc_banks[i].base_vaddr_unaligned));
  1473. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  1474. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1475. FL("Link descriptor memory alloc failed"));
  1476. goto fail;
  1477. }
  1478. }
  1479. if (last_bank_size) {
  1480. /* Allocate last bank in case total memory required is not exact
  1481. * multiple of max_alloc_size
  1482. */
  1483. soc->link_desc_banks[i].base_vaddr_unaligned =
  1484. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1485. last_bank_size,
  1486. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1487. soc->link_desc_banks[i].size = last_bank_size;
  1488. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  1489. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  1490. ((unsigned long)(
  1491. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1492. link_desc_align));
  1493. soc->link_desc_banks[i].base_paddr =
  1494. (unsigned long)(
  1495. soc->link_desc_banks[i].base_paddr_unaligned) +
  1496. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1497. (unsigned long)(
  1498. soc->link_desc_banks[i].base_vaddr_unaligned));
  1499. }
  1500. /* Allocate and setup link descriptor idle list for HW internal use */
  1501. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  1502. total_mem_size = entry_size * total_link_descs;
  1503. if (total_mem_size <= max_alloc_size) {
  1504. void *desc;
  1505. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  1506. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  1507. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1508. FL("Link desc idle ring setup failed"));
  1509. goto fail;
  1510. }
  1511. hal_srng_access_start_unlocked(soc->hal_soc,
  1512. soc->wbm_idle_link_ring.hal_srng);
  1513. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1514. soc->link_desc_banks[i].base_paddr; i++) {
  1515. uint32_t num_entries = (soc->link_desc_banks[i].size -
  1516. ((unsigned long)(
  1517. soc->link_desc_banks[i].base_vaddr) -
  1518. (unsigned long)(
  1519. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1520. / link_desc_size;
  1521. unsigned long paddr = (unsigned long)(
  1522. soc->link_desc_banks[i].base_paddr);
  1523. while (num_entries && (desc = hal_srng_src_get_next(
  1524. soc->hal_soc,
  1525. soc->wbm_idle_link_ring.hal_srng))) {
  1526. hal_set_link_desc_addr(desc,
  1527. LINK_DESC_COOKIE(desc_id, i), paddr);
  1528. num_entries--;
  1529. desc_id++;
  1530. paddr += link_desc_size;
  1531. }
  1532. }
  1533. hal_srng_access_end_unlocked(soc->hal_soc,
  1534. soc->wbm_idle_link_ring.hal_srng);
  1535. } else {
  1536. uint32_t num_scatter_bufs;
  1537. uint32_t num_entries_per_buf;
  1538. uint32_t rem_entries;
  1539. uint8_t *scatter_buf_ptr;
  1540. uint16_t scatter_buf_num;
  1541. soc->wbm_idle_scatter_buf_size =
  1542. hal_idle_list_scatter_buf_size(soc->hal_soc);
  1543. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  1544. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  1545. num_scatter_bufs = hal_idle_list_num_scatter_bufs(
  1546. soc->hal_soc, total_mem_size,
  1547. soc->wbm_idle_scatter_buf_size);
  1548. if (num_scatter_bufs > MAX_IDLE_SCATTER_BUFS) {
  1549. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1550. FL("scatter bufs size out of bounds"));
  1551. goto fail;
  1552. }
  1553. for (i = 0; i < num_scatter_bufs; i++) {
  1554. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  1555. qdf_mem_alloc_consistent(soc->osdev,
  1556. soc->osdev->dev,
  1557. soc->wbm_idle_scatter_buf_size,
  1558. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  1559. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  1560. QDF_TRACE(QDF_MODULE_ID_DP,
  1561. QDF_TRACE_LEVEL_ERROR,
  1562. FL("Scatter list memory alloc failed"));
  1563. goto fail;
  1564. }
  1565. }
  1566. /* Populate idle list scatter buffers with link descriptor
  1567. * pointers
  1568. */
  1569. scatter_buf_num = 0;
  1570. scatter_buf_ptr = (uint8_t *)(
  1571. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  1572. rem_entries = num_entries_per_buf;
  1573. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1574. soc->link_desc_banks[i].base_paddr; i++) {
  1575. uint32_t num_link_descs =
  1576. (soc->link_desc_banks[i].size -
  1577. ((unsigned long)(
  1578. soc->link_desc_banks[i].base_vaddr) -
  1579. (unsigned long)(
  1580. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1581. / link_desc_size;
  1582. unsigned long paddr = (unsigned long)(
  1583. soc->link_desc_banks[i].base_paddr);
  1584. while (num_link_descs) {
  1585. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  1586. LINK_DESC_COOKIE(desc_id, i), paddr);
  1587. num_link_descs--;
  1588. desc_id++;
  1589. paddr += link_desc_size;
  1590. rem_entries--;
  1591. if (rem_entries) {
  1592. scatter_buf_ptr += entry_size;
  1593. } else {
  1594. rem_entries = num_entries_per_buf;
  1595. scatter_buf_num++;
  1596. if (scatter_buf_num >= num_scatter_bufs)
  1597. break;
  1598. scatter_buf_ptr = (uint8_t *)(
  1599. soc->wbm_idle_scatter_buf_base_vaddr[
  1600. scatter_buf_num]);
  1601. }
  1602. }
  1603. }
  1604. /* Setup link descriptor idle list in HW */
  1605. hal_setup_link_idle_list(soc->hal_soc,
  1606. soc->wbm_idle_scatter_buf_base_paddr,
  1607. soc->wbm_idle_scatter_buf_base_vaddr,
  1608. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  1609. (uint32_t)(scatter_buf_ptr -
  1610. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  1611. scatter_buf_num-1])), total_link_descs);
  1612. }
  1613. return 0;
  1614. fail:
  1615. if (soc->wbm_idle_link_ring.hal_srng) {
  1616. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1617. WBM_IDLE_LINK, 0);
  1618. }
  1619. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1620. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1621. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1622. soc->wbm_idle_scatter_buf_size,
  1623. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1624. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1625. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1626. }
  1627. }
  1628. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1629. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1630. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1631. soc->link_desc_banks[i].size,
  1632. soc->link_desc_banks[i].base_vaddr_unaligned,
  1633. soc->link_desc_banks[i].base_paddr_unaligned,
  1634. 0);
  1635. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1636. }
  1637. }
  1638. return QDF_STATUS_E_FAILURE;
  1639. }
  1640. /*
  1641. * Free link descriptor pool that was setup HW
  1642. */
  1643. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  1644. {
  1645. int i;
  1646. if (soc->wbm_idle_link_ring.hal_srng) {
  1647. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1648. WBM_IDLE_LINK, 0);
  1649. }
  1650. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1651. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1652. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1653. soc->wbm_idle_scatter_buf_size,
  1654. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1655. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1656. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1657. }
  1658. }
  1659. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1660. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1661. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1662. soc->link_desc_banks[i].size,
  1663. soc->link_desc_banks[i].base_vaddr_unaligned,
  1664. soc->link_desc_banks[i].base_paddr_unaligned,
  1665. 0);
  1666. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1667. }
  1668. }
  1669. }
  1670. #define REO_DST_RING_SIZE_QCA6290 1024
  1671. #ifndef QCA_WIFI_QCA8074_VP
  1672. #define REO_DST_RING_SIZE_QCA8074 2048
  1673. #else
  1674. #define REO_DST_RING_SIZE_QCA8074 8
  1675. #endif
  1676. /*
  1677. * dp_wds_aging_timer_fn() - Timer callback function for WDS aging
  1678. * @soc: Datapath SOC handle
  1679. *
  1680. * This is a timer function used to age out stale AST nodes from
  1681. * AST table
  1682. */
  1683. #ifdef FEATURE_WDS
  1684. static void dp_wds_aging_timer_fn(void *soc_hdl)
  1685. {
  1686. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  1687. struct dp_pdev *pdev;
  1688. struct dp_vdev *vdev;
  1689. struct dp_peer *peer;
  1690. struct dp_ast_entry *ase, *temp_ase;
  1691. int i;
  1692. qdf_spin_lock_bh(&soc->ast_lock);
  1693. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  1694. pdev = soc->pdev_list[i];
  1695. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  1696. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1697. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  1698. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  1699. /*
  1700. * Do not expire static ast entries
  1701. * and HM WDS entries
  1702. */
  1703. if (ase->type != CDP_TXRX_AST_TYPE_WDS)
  1704. continue;
  1705. if (ase->is_active) {
  1706. ase->is_active = FALSE;
  1707. continue;
  1708. }
  1709. DP_STATS_INC(soc, ast.aged_out, 1);
  1710. dp_peer_del_ast(soc, ase);
  1711. }
  1712. }
  1713. }
  1714. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1715. }
  1716. qdf_spin_unlock_bh(&soc->ast_lock);
  1717. if (qdf_atomic_read(&soc->cmn_init_done))
  1718. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1719. }
  1720. /*
  1721. * dp_soc_wds_attach() - Setup WDS timer and AST table
  1722. * @soc: Datapath SOC handle
  1723. *
  1724. * Return: None
  1725. */
  1726. static void dp_soc_wds_attach(struct dp_soc *soc)
  1727. {
  1728. qdf_timer_init(soc->osdev, &soc->wds_aging_timer,
  1729. dp_wds_aging_timer_fn, (void *)soc,
  1730. QDF_TIMER_TYPE_WAKE_APPS);
  1731. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1732. }
  1733. /*
  1734. * dp_soc_wds_detach() - Detach WDS data structures and timers
  1735. * @txrx_soc: DP SOC handle
  1736. *
  1737. * Return: None
  1738. */
  1739. static void dp_soc_wds_detach(struct dp_soc *soc)
  1740. {
  1741. qdf_timer_stop(&soc->wds_aging_timer);
  1742. qdf_timer_free(&soc->wds_aging_timer);
  1743. }
  1744. #else
  1745. static void dp_soc_wds_attach(struct dp_soc *soc)
  1746. {
  1747. }
  1748. static void dp_soc_wds_detach(struct dp_soc *soc)
  1749. {
  1750. }
  1751. #endif
  1752. /*
  1753. * dp_soc_reset_ring_map() - Reset cpu ring map
  1754. * @soc: Datapath soc handler
  1755. *
  1756. * This api resets the default cpu ring map
  1757. */
  1758. static void dp_soc_reset_cpu_ring_map(struct dp_soc *soc)
  1759. {
  1760. uint8_t i;
  1761. int nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1762. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  1763. if (nss_config == 1) {
  1764. /*
  1765. * Setting Tx ring map for one nss offloaded radio
  1766. */
  1767. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_FIRST_RADIO_OFFLOADED_MAP][i];
  1768. } else if (nss_config == 2) {
  1769. /*
  1770. * Setting Tx ring for two nss offloaded radios
  1771. */
  1772. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_SECOND_RADIO_OFFLOADED_MAP][i];
  1773. } else {
  1774. /*
  1775. * Setting Tx ring map for all nss offloaded radios
  1776. */
  1777. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_ALL_RADIO_OFFLOADED_MAP][i];
  1778. }
  1779. }
  1780. }
  1781. /*
  1782. * dp_soc_ring_if_nss_offloaded() - find if ring is offloaded to NSS
  1783. * @dp_soc - DP soc handle
  1784. * @ring_type - ring type
  1785. * @ring_num - ring_num
  1786. *
  1787. * return 0 or 1
  1788. */
  1789. static uint8_t dp_soc_ring_if_nss_offloaded(struct dp_soc *soc, enum hal_ring_type ring_type, int ring_num)
  1790. {
  1791. uint8_t nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1792. uint8_t status = 0;
  1793. switch (ring_type) {
  1794. case WBM2SW_RELEASE:
  1795. case REO_DST:
  1796. case RXDMA_BUF:
  1797. status = ((nss_config) & (1 << ring_num));
  1798. break;
  1799. default:
  1800. break;
  1801. }
  1802. return status;
  1803. }
  1804. /*
  1805. * dp_soc_reset_intr_mask() - reset interrupt mask
  1806. * @dp_soc - DP Soc handle
  1807. *
  1808. * Return: Return void
  1809. */
  1810. static void dp_soc_reset_intr_mask(struct dp_soc *soc)
  1811. {
  1812. uint8_t j;
  1813. int *grp_mask = NULL;
  1814. int group_number, mask, num_ring;
  1815. /* number of tx ring */
  1816. num_ring = wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1817. /*
  1818. * group mask for tx completion ring.
  1819. */
  1820. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  1821. /* loop and reset the mask for only offloaded ring */
  1822. for (j = 0; j < num_ring; j++) {
  1823. if (!dp_soc_ring_if_nss_offloaded(soc, WBM2SW_RELEASE, j)) {
  1824. continue;
  1825. }
  1826. /*
  1827. * Group number corresponding to tx offloaded ring.
  1828. */
  1829. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1830. if (group_number < 0) {
  1831. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1832. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1833. WBM2SW_RELEASE, j);
  1834. return;
  1835. }
  1836. /* reset the tx mask for offloaded ring */
  1837. mask = wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1838. mask &= (~(1 << j));
  1839. /*
  1840. * reset the interrupt mask for offloaded ring.
  1841. */
  1842. wlan_cfg_set_tx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1843. }
  1844. /* number of rx rings */
  1845. num_ring = wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1846. /*
  1847. * group mask for reo destination ring.
  1848. */
  1849. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  1850. /* loop and reset the mask for only offloaded ring */
  1851. for (j = 0; j < num_ring; j++) {
  1852. if (!dp_soc_ring_if_nss_offloaded(soc, REO_DST, j)) {
  1853. continue;
  1854. }
  1855. /*
  1856. * Group number corresponding to rx offloaded ring.
  1857. */
  1858. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1859. if (group_number < 0) {
  1860. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1861. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1862. REO_DST, j);
  1863. return;
  1864. }
  1865. /* set the interrupt mask for offloaded ring */
  1866. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1867. mask &= (~(1 << j));
  1868. /*
  1869. * set the interrupt mask to zero for rx offloaded radio.
  1870. */
  1871. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1872. }
  1873. /*
  1874. * group mask for Rx buffer refill ring
  1875. */
  1876. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  1877. /* loop and reset the mask for only offloaded ring */
  1878. for (j = 0; j < MAX_PDEV_CNT; j++) {
  1879. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF, j)) {
  1880. continue;
  1881. }
  1882. /*
  1883. * Group number corresponding to rx offloaded ring.
  1884. */
  1885. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1886. if (group_number < 0) {
  1887. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1888. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1889. REO_DST, j);
  1890. return;
  1891. }
  1892. /* set the interrupt mask for offloaded ring */
  1893. mask = wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1894. group_number);
  1895. mask &= (~(1 << j));
  1896. /*
  1897. * set the interrupt mask to zero for rx offloaded radio.
  1898. */
  1899. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1900. group_number, mask);
  1901. }
  1902. }
  1903. #ifdef IPA_OFFLOAD
  1904. /**
  1905. * dp_reo_remap_config() - configure reo remap register value based
  1906. * nss configuration.
  1907. * based on offload_radio value below remap configuration
  1908. * get applied.
  1909. * 0 - both Radios handled by host (remap rings 1, 2, 3 & 4)
  1910. * 1 - 1st Radio handled by NSS (remap rings 2, 3 & 4)
  1911. * 2 - 2nd Radio handled by NSS (remap rings 1, 2 & 4)
  1912. * 3 - both Radios handled by NSS (remap not required)
  1913. * 4 - IPA OFFLOAD enabled (remap rings 1,2 & 3)
  1914. *
  1915. * @remap1: output parameter indicates reo remap 1 register value
  1916. * @remap2: output parameter indicates reo remap 2 register value
  1917. * Return: bool type, true if remap is configured else false.
  1918. */
  1919. static bool dp_reo_remap_config(struct dp_soc *soc,
  1920. uint32_t *remap1,
  1921. uint32_t *remap2)
  1922. {
  1923. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | (0x1 << 9) |
  1924. (0x2 << 12) | (0x3 << 15) | (0x1 << 18) | (0x2 << 21)) << 8;
  1925. *remap2 = ((0x3 << 0) | (0x1 << 3) | (0x2 << 6) | (0x3 << 9) |
  1926. (0x1 << 12) | (0x2 << 15) | (0x3 << 18) | (0x1 << 21)) << 8;
  1927. return true;
  1928. }
  1929. #else
  1930. static bool dp_reo_remap_config(struct dp_soc *soc,
  1931. uint32_t *remap1,
  1932. uint32_t *remap2)
  1933. {
  1934. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1935. switch (offload_radio) {
  1936. case 0:
  1937. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1938. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1939. (0x3 << 18) | (0x4 << 21)) << 8;
  1940. *remap2 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1941. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1942. (0x3 << 18) | (0x4 << 21)) << 8;
  1943. break;
  1944. case 1:
  1945. *remap1 = ((0x2 << 0) | (0x3 << 3) | (0x4 << 6) |
  1946. (0x2 << 9) | (0x3 << 12) | (0x4 << 15) |
  1947. (0x2 << 18) | (0x3 << 21)) << 8;
  1948. *remap2 = ((0x4 << 0) | (0x2 << 3) | (0x3 << 6) |
  1949. (0x4 << 9) | (0x2 << 12) | (0x3 << 15) |
  1950. (0x4 << 18) | (0x2 << 21)) << 8;
  1951. break;
  1952. case 2:
  1953. *remap1 = ((0x1 << 0) | (0x3 << 3) | (0x4 << 6) |
  1954. (0x1 << 9) | (0x3 << 12) | (0x4 << 15) |
  1955. (0x1 << 18) | (0x3 << 21)) << 8;
  1956. *remap2 = ((0x4 << 0) | (0x1 << 3) | (0x3 << 6) |
  1957. (0x4 << 9) | (0x1 << 12) | (0x3 << 15) |
  1958. (0x4 << 18) | (0x1 << 21)) << 8;
  1959. break;
  1960. case 3:
  1961. /* return false if both radios are offloaded to NSS */
  1962. return false;
  1963. }
  1964. return true;
  1965. }
  1966. #endif
  1967. /*
  1968. * dp_reo_frag_dst_set() - configure reo register to set the
  1969. * fragment destination ring
  1970. * @soc : Datapath soc
  1971. * @frag_dst_ring : output parameter to set fragment destination ring
  1972. *
  1973. * Based on offload_radio below fragment destination rings is selected
  1974. * 0 - TCL
  1975. * 1 - SW1
  1976. * 2 - SW2
  1977. * 3 - SW3
  1978. * 4 - SW4
  1979. * 5 - Release
  1980. * 6 - FW
  1981. * 7 - alternate select
  1982. *
  1983. * return: void
  1984. */
  1985. static void dp_reo_frag_dst_set(struct dp_soc *soc, uint8_t *frag_dst_ring)
  1986. {
  1987. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1988. switch (offload_radio) {
  1989. case 0:
  1990. *frag_dst_ring = HAL_SRNG_REO_EXCEPTION;
  1991. break;
  1992. case 3:
  1993. *frag_dst_ring = HAL_SRNG_REO_ALTERNATE_SELECT;
  1994. break;
  1995. default:
  1996. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1997. FL("dp_reo_frag_dst_set invalid offload radio config"));
  1998. break;
  1999. }
  2000. }
  2001. /*
  2002. * dp_soc_cmn_setup() - Common SoC level initializion
  2003. * @soc: Datapath SOC handle
  2004. *
  2005. * This is an internal function used to setup common SOC data structures,
  2006. * to be called from PDEV attach after receiving HW mode capabilities from FW
  2007. */
  2008. static int dp_soc_cmn_setup(struct dp_soc *soc)
  2009. {
  2010. int i;
  2011. struct hal_reo_params reo_params;
  2012. int tx_ring_size;
  2013. int tx_comp_ring_size;
  2014. int reo_dst_ring_size;
  2015. uint32_t entries;
  2016. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  2017. if (qdf_atomic_read(&soc->cmn_init_done))
  2018. return 0;
  2019. if (dp_hw_link_desc_pool_setup(soc))
  2020. goto fail1;
  2021. soc_cfg_ctx = soc->wlan_cfg_ctx;
  2022. /* Setup SRNG rings */
  2023. /* Common rings */
  2024. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  2025. wlan_cfg_get_dp_soc_wbm_release_ring_size(soc_cfg_ctx))) {
  2026. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2027. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  2028. goto fail1;
  2029. }
  2030. soc->num_tcl_data_rings = 0;
  2031. /* Tx data rings */
  2032. if (!wlan_cfg_per_pdev_tx_ring(soc_cfg_ctx)) {
  2033. soc->num_tcl_data_rings =
  2034. wlan_cfg_num_tcl_data_rings(soc_cfg_ctx);
  2035. tx_comp_ring_size =
  2036. wlan_cfg_tx_comp_ring_size(soc_cfg_ctx);
  2037. tx_ring_size =
  2038. wlan_cfg_tx_ring_size(soc_cfg_ctx);
  2039. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2040. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  2041. TCL_DATA, i, 0, tx_ring_size)) {
  2042. QDF_TRACE(QDF_MODULE_ID_DP,
  2043. QDF_TRACE_LEVEL_ERROR,
  2044. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  2045. goto fail1;
  2046. }
  2047. /*
  2048. * TBD: Set IPA WBM ring size with ini IPA UC tx buffer
  2049. * count
  2050. */
  2051. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  2052. WBM2SW_RELEASE, i, 0, tx_comp_ring_size)) {
  2053. QDF_TRACE(QDF_MODULE_ID_DP,
  2054. QDF_TRACE_LEVEL_ERROR,
  2055. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  2056. goto fail1;
  2057. }
  2058. }
  2059. } else {
  2060. /* This will be incremented during per pdev ring setup */
  2061. soc->num_tcl_data_rings = 0;
  2062. }
  2063. if (dp_tx_soc_attach(soc)) {
  2064. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2065. FL("dp_tx_soc_attach failed"));
  2066. goto fail1;
  2067. }
  2068. entries = wlan_cfg_get_dp_soc_tcl_cmd_ring_size(soc_cfg_ctx);
  2069. /* TCL command and status rings */
  2070. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  2071. entries)) {
  2072. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2073. FL("dp_srng_setup failed for tcl_cmd_ring"));
  2074. goto fail1;
  2075. }
  2076. entries = wlan_cfg_get_dp_soc_tcl_status_ring_size(soc_cfg_ctx);
  2077. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  2078. entries)) {
  2079. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2080. FL("dp_srng_setup failed for tcl_status_ring"));
  2081. goto fail1;
  2082. }
  2083. reo_dst_ring_size = wlan_cfg_get_reo_dst_ring_size(soc->wlan_cfg_ctx);
  2084. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  2085. * descriptors
  2086. */
  2087. /* Rx data rings */
  2088. if (!wlan_cfg_per_pdev_rx_ring(soc_cfg_ctx)) {
  2089. soc->num_reo_dest_rings =
  2090. wlan_cfg_num_reo_dest_rings(soc_cfg_ctx);
  2091. QDF_TRACE(QDF_MODULE_ID_DP,
  2092. QDF_TRACE_LEVEL_INFO,
  2093. FL("num_reo_dest_rings %d"), soc->num_reo_dest_rings);
  2094. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2095. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  2096. i, 0, reo_dst_ring_size)) {
  2097. QDF_TRACE(QDF_MODULE_ID_DP,
  2098. QDF_TRACE_LEVEL_ERROR,
  2099. FL(RNG_ERR "reo_dest_ring [%d]"), i);
  2100. goto fail1;
  2101. }
  2102. }
  2103. } else {
  2104. /* This will be incremented during per pdev ring setup */
  2105. soc->num_reo_dest_rings = 0;
  2106. }
  2107. entries = wlan_cfg_get_dp_soc_rxdma_err_dst_ring_size(soc_cfg_ctx);
  2108. /* LMAC RxDMA to SW Rings configuration */
  2109. if (!wlan_cfg_per_pdev_lmac_ring(soc_cfg_ctx)) {
  2110. /* Only valid for MCL */
  2111. struct dp_pdev *pdev = soc->pdev_list[0];
  2112. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  2113. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[i],
  2114. RXDMA_DST, 0, i,
  2115. entries)) {
  2116. QDF_TRACE(QDF_MODULE_ID_DP,
  2117. QDF_TRACE_LEVEL_ERROR,
  2118. FL(RNG_ERR "rxdma_err_dst_ring"));
  2119. goto fail1;
  2120. }
  2121. }
  2122. }
  2123. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  2124. /* REO reinjection ring */
  2125. entries = wlan_cfg_get_dp_soc_reo_reinject_ring_size(soc_cfg_ctx);
  2126. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  2127. entries)) {
  2128. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2129. FL("dp_srng_setup failed for reo_reinject_ring"));
  2130. goto fail1;
  2131. }
  2132. /* Rx release ring */
  2133. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  2134. wlan_cfg_get_dp_soc_rx_release_ring_size(soc_cfg_ctx))) {
  2135. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2136. FL("dp_srng_setup failed for rx_rel_ring"));
  2137. goto fail1;
  2138. }
  2139. /* Rx exception ring */
  2140. entries = wlan_cfg_get_dp_soc_reo_exception_ring_size(soc_cfg_ctx);
  2141. if (dp_srng_setup(soc, &soc->reo_exception_ring,
  2142. REO_EXCEPTION, 0, MAX_REO_DEST_RINGS, entries)) {
  2143. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2144. FL("dp_srng_setup failed for reo_exception_ring"));
  2145. goto fail1;
  2146. }
  2147. /* REO command and status rings */
  2148. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  2149. wlan_cfg_get_dp_soc_reo_cmd_ring_size(soc_cfg_ctx))) {
  2150. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2151. FL("dp_srng_setup failed for reo_cmd_ring"));
  2152. goto fail1;
  2153. }
  2154. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  2155. TAILQ_INIT(&soc->rx.reo_cmd_list);
  2156. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  2157. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  2158. wlan_cfg_get_dp_soc_reo_status_ring_size(soc_cfg_ctx))) {
  2159. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2160. FL("dp_srng_setup failed for reo_status_ring"));
  2161. goto fail1;
  2162. }
  2163. qdf_spinlock_create(&soc->ast_lock);
  2164. dp_soc_wds_attach(soc);
  2165. /* Reset the cpu ring map if radio is NSS offloaded */
  2166. if (wlan_cfg_get_dp_soc_nss_cfg(soc_cfg_ctx)) {
  2167. dp_soc_reset_cpu_ring_map(soc);
  2168. dp_soc_reset_intr_mask(soc);
  2169. }
  2170. /* Setup HW REO */
  2171. qdf_mem_zero(&reo_params, sizeof(reo_params));
  2172. if (wlan_cfg_is_rx_hash_enabled(soc_cfg_ctx)) {
  2173. /*
  2174. * Reo ring remap is not required if both radios
  2175. * are offloaded to NSS
  2176. */
  2177. if (!dp_reo_remap_config(soc,
  2178. &reo_params.remap1,
  2179. &reo_params.remap2))
  2180. goto out;
  2181. reo_params.rx_hash_enabled = true;
  2182. }
  2183. /* setup the global rx defrag waitlist */
  2184. TAILQ_INIT(&soc->rx.defrag.waitlist);
  2185. soc->rx.defrag.timeout_ms =
  2186. wlan_cfg_get_rx_defrag_min_timeout(soc_cfg_ctx);
  2187. soc->rx.flags.defrag_timeout_check =
  2188. wlan_cfg_get_defrag_timeout_check(soc_cfg_ctx);
  2189. qdf_spinlock_create(&soc->rx.defrag.defrag_lock);
  2190. out:
  2191. /*
  2192. * set the fragment destination ring
  2193. */
  2194. dp_reo_frag_dst_set(soc, &reo_params.frag_dst_ring);
  2195. hal_reo_setup(soc->hal_soc, &reo_params);
  2196. qdf_atomic_set(&soc->cmn_init_done, 1);
  2197. qdf_nbuf_queue_init(&soc->htt_stats.msg);
  2198. return 0;
  2199. fail1:
  2200. /*
  2201. * Cleanup will be done as part of soc_detach, which will
  2202. * be called on pdev attach failure
  2203. */
  2204. return QDF_STATUS_E_FAILURE;
  2205. }
  2206. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  2207. static void dp_lro_hash_setup(struct dp_soc *soc)
  2208. {
  2209. struct cdp_lro_hash_config lro_hash;
  2210. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  2211. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  2212. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2213. FL("LRO disabled RX hash disabled"));
  2214. return;
  2215. }
  2216. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  2217. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx)) {
  2218. lro_hash.lro_enable = 1;
  2219. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  2220. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  2221. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  2222. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  2223. }
  2224. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW, FL("enabled"));
  2225. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  2226. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2227. LRO_IPV4_SEED_ARR_SZ));
  2228. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  2229. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2230. LRO_IPV6_SEED_ARR_SZ));
  2231. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  2232. "lro_hash: lro_enable: 0x%x tcp_flag 0x%x tcp_flag_mask 0x%x",
  2233. lro_hash.lro_enable, lro_hash.tcp_flag,
  2234. lro_hash.tcp_flag_mask);
  2235. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  2236. QDF_TRACE_LEVEL_ERROR,
  2237. (void *)lro_hash.toeplitz_hash_ipv4,
  2238. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2239. LRO_IPV4_SEED_ARR_SZ));
  2240. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  2241. QDF_TRACE_LEVEL_ERROR,
  2242. (void *)lro_hash.toeplitz_hash_ipv6,
  2243. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2244. LRO_IPV6_SEED_ARR_SZ));
  2245. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  2246. if (soc->cdp_soc.ol_ops->lro_hash_config)
  2247. (void)soc->cdp_soc.ol_ops->lro_hash_config
  2248. (soc->ctrl_psoc, &lro_hash);
  2249. }
  2250. /*
  2251. * dp_rxdma_ring_setup() - configure the RX DMA rings
  2252. * @soc: data path SoC handle
  2253. * @pdev: Physical device handle
  2254. *
  2255. * Return: 0 - success, > 0 - failure
  2256. */
  2257. #ifdef QCA_HOST2FW_RXBUF_RING
  2258. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2259. struct dp_pdev *pdev)
  2260. {
  2261. struct wlan_cfg_dp_pdev_ctxt *pdev_cfg_ctx;
  2262. int max_mac_rings;
  2263. int i;
  2264. pdev_cfg_ctx = pdev->wlan_cfg_ctx;
  2265. max_mac_rings = wlan_cfg_get_num_mac_rings(pdev_cfg_ctx);
  2266. for (i = 0; i < max_mac_rings; i++) {
  2267. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2268. "%s: pdev_id %d mac_id %d",
  2269. __func__, pdev->pdev_id, i);
  2270. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  2271. RXDMA_BUF, 1, i,
  2272. wlan_cfg_get_rx_dma_buf_ring_size(pdev_cfg_ctx))) {
  2273. QDF_TRACE(QDF_MODULE_ID_DP,
  2274. QDF_TRACE_LEVEL_ERROR,
  2275. FL("failed rx mac ring setup"));
  2276. return QDF_STATUS_E_FAILURE;
  2277. }
  2278. }
  2279. return QDF_STATUS_SUCCESS;
  2280. }
  2281. #else
  2282. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2283. struct dp_pdev *pdev)
  2284. {
  2285. return QDF_STATUS_SUCCESS;
  2286. }
  2287. #endif
  2288. /**
  2289. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  2290. * @pdev - DP_PDEV handle
  2291. *
  2292. * Return: void
  2293. */
  2294. static inline void
  2295. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  2296. {
  2297. uint8_t map_id;
  2298. struct dp_soc *soc = pdev->soc;
  2299. if (!soc)
  2300. return;
  2301. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  2302. qdf_mem_copy(pdev->dscp_tid_map[map_id],
  2303. default_dscp_tid_map,
  2304. sizeof(default_dscp_tid_map));
  2305. }
  2306. for (map_id = 0; map_id < soc->num_hw_dscp_tid_map; map_id++) {
  2307. hal_tx_set_dscp_tid_map(soc->hal_soc,
  2308. default_dscp_tid_map,
  2309. map_id);
  2310. }
  2311. }
  2312. #ifdef QCA_SUPPORT_SON
  2313. /**
  2314. * dp_mark_peer_inact(): Update peer inactivity status
  2315. * @peer_handle - datapath peer handle
  2316. *
  2317. * Return: void
  2318. */
  2319. void dp_mark_peer_inact(void *peer_handle, bool inactive)
  2320. {
  2321. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  2322. struct dp_pdev *pdev;
  2323. struct dp_soc *soc;
  2324. bool inactive_old;
  2325. if (!peer)
  2326. return;
  2327. pdev = peer->vdev->pdev;
  2328. soc = pdev->soc;
  2329. inactive_old = peer->peer_bs_inact_flag == 1;
  2330. if (!inactive)
  2331. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2332. peer->peer_bs_inact_flag = inactive ? 1 : 0;
  2333. if (inactive_old != inactive) {
  2334. /**
  2335. * Note: a node lookup can happen in RX datapath context
  2336. * when a node changes from inactive to active (at most once
  2337. * per inactivity timeout threshold)
  2338. */
  2339. if (soc->cdp_soc.ol_ops->record_act_change) {
  2340. soc->cdp_soc.ol_ops->record_act_change(
  2341. (void *)pdev->ctrl_pdev,
  2342. peer->mac_addr.raw, !inactive);
  2343. }
  2344. }
  2345. }
  2346. /**
  2347. * dp_txrx_peer_find_inact_timeout_handler(): Inactivity timeout function
  2348. *
  2349. * Periodically checks the inactivity status
  2350. */
  2351. static os_timer_func(dp_txrx_peer_find_inact_timeout_handler)
  2352. {
  2353. struct dp_pdev *pdev;
  2354. struct dp_vdev *vdev;
  2355. struct dp_peer *peer;
  2356. struct dp_soc *soc;
  2357. int i;
  2358. OS_GET_TIMER_ARG(soc, struct dp_soc *);
  2359. qdf_spin_lock(&soc->peer_ref_mutex);
  2360. for (i = 0; i < soc->pdev_count; i++) {
  2361. pdev = soc->pdev_list[i];
  2362. if (!pdev)
  2363. continue;
  2364. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  2365. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2366. if (vdev->opmode != wlan_op_mode_ap)
  2367. continue;
  2368. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2369. if (!peer->authorize) {
  2370. /**
  2371. * Inactivity check only interested in
  2372. * connected node
  2373. */
  2374. continue;
  2375. }
  2376. if (peer->peer_bs_inact > soc->pdev_bs_inact_reload) {
  2377. /**
  2378. * This check ensures we do not wait extra long
  2379. * due to the potential race condition
  2380. */
  2381. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2382. }
  2383. if (peer->peer_bs_inact > 0) {
  2384. /* Do not let it wrap around */
  2385. peer->peer_bs_inact--;
  2386. }
  2387. if (peer->peer_bs_inact == 0)
  2388. dp_mark_peer_inact(peer, true);
  2389. }
  2390. }
  2391. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  2392. }
  2393. qdf_spin_unlock(&soc->peer_ref_mutex);
  2394. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  2395. soc->pdev_bs_inact_interval * 1000);
  2396. }
  2397. /**
  2398. * dp_free_inact_timer(): free inact timer
  2399. * @timer - inact timer handle
  2400. *
  2401. * Return: bool
  2402. */
  2403. void dp_free_inact_timer(struct dp_soc *soc)
  2404. {
  2405. qdf_timer_free(&soc->pdev_bs_inact_timer);
  2406. }
  2407. #else
  2408. void dp_mark_peer_inact(void *peer, bool inactive)
  2409. {
  2410. return;
  2411. }
  2412. void dp_free_inact_timer(struct dp_soc *soc)
  2413. {
  2414. return;
  2415. }
  2416. #endif
  2417. #ifdef IPA_OFFLOAD
  2418. /**
  2419. * dp_setup_ipa_rx_refill_buf_ring - Setup second Rx refill buffer ring
  2420. * @soc: data path instance
  2421. * @pdev: core txrx pdev context
  2422. *
  2423. * Return: QDF_STATUS_SUCCESS: success
  2424. * QDF_STATUS_E_RESOURCES: Error return
  2425. */
  2426. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2427. struct dp_pdev *pdev)
  2428. {
  2429. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  2430. int entries;
  2431. soc_cfg_ctx = soc->wlan_cfg_ctx;
  2432. entries = wlan_cfg_get_dp_soc_rxdma_refill_ring_size(soc_cfg_ctx);
  2433. /* Setup second Rx refill buffer ring */
  2434. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2435. IPA_RX_REFILL_BUF_RING_IDX,
  2436. pdev->pdev_id,
  2437. entries)) {
  2438. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2439. FL("dp_srng_setup failed second rx refill ring"));
  2440. return QDF_STATUS_E_FAILURE;
  2441. }
  2442. return QDF_STATUS_SUCCESS;
  2443. }
  2444. /**
  2445. * dp_cleanup_ipa_rx_refill_buf_ring - Cleanup second Rx refill buffer ring
  2446. * @soc: data path instance
  2447. * @pdev: core txrx pdev context
  2448. *
  2449. * Return: void
  2450. */
  2451. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2452. struct dp_pdev *pdev)
  2453. {
  2454. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2455. IPA_RX_REFILL_BUF_RING_IDX);
  2456. }
  2457. #else
  2458. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2459. struct dp_pdev *pdev)
  2460. {
  2461. return QDF_STATUS_SUCCESS;
  2462. }
  2463. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2464. struct dp_pdev *pdev)
  2465. {
  2466. }
  2467. #endif
  2468. #if !defined(QCA_WIFI_QCA6390) && !defined(DISABLE_MON_CONFIG)
  2469. static
  2470. QDF_STATUS dp_mon_rings_setup(struct dp_soc *soc, struct dp_pdev *pdev)
  2471. {
  2472. int mac_id = 0;
  2473. int pdev_id = pdev->pdev_id;
  2474. int entries;
  2475. struct wlan_cfg_dp_pdev_ctxt *pdev_cfg_ctx;
  2476. pdev_cfg_ctx = pdev->wlan_cfg_ctx;
  2477. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2478. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  2479. entries = wlan_cfg_get_dma_mon_buf_ring_size(pdev_cfg_ctx);
  2480. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring[mac_id],
  2481. RXDMA_MONITOR_BUF, 0, mac_for_pdev,
  2482. entries)) {
  2483. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2484. FL(RNG_ERR "rxdma_mon_buf_ring "));
  2485. return QDF_STATUS_E_NOMEM;
  2486. }
  2487. entries = wlan_cfg_get_dma_mon_dest_ring_size(pdev_cfg_ctx);
  2488. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring[mac_id],
  2489. RXDMA_MONITOR_DST, 0, mac_for_pdev,
  2490. entries)) {
  2491. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2492. FL(RNG_ERR "rxdma_mon_dst_ring"));
  2493. return QDF_STATUS_E_NOMEM;
  2494. }
  2495. entries = wlan_cfg_get_dma_mon_stat_ring_size(pdev_cfg_ctx);
  2496. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring[mac_id],
  2497. RXDMA_MONITOR_STATUS, 0, mac_for_pdev,
  2498. entries)) {
  2499. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2500. FL(RNG_ERR "rxdma_mon_status_ring"));
  2501. return QDF_STATUS_E_NOMEM;
  2502. }
  2503. entries = wlan_cfg_get_dma_mon_desc_ring_size(pdev_cfg_ctx);
  2504. if (dp_srng_setup(soc, &pdev->rxdma_mon_desc_ring[mac_id],
  2505. RXDMA_MONITOR_DESC, 0, mac_for_pdev,
  2506. entries)) {
  2507. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2508. FL(RNG_ERR "rxdma_mon_desc_ring"));
  2509. return QDF_STATUS_E_NOMEM;
  2510. }
  2511. }
  2512. return QDF_STATUS_SUCCESS;
  2513. }
  2514. #else
  2515. static QDF_STATUS dp_mon_rings_setup(struct dp_soc *soc, struct dp_pdev *pdev)
  2516. {
  2517. return QDF_STATUS_SUCCESS;
  2518. }
  2519. #endif
  2520. /*dp_iterate_update_peer_list - update peer stats on cal client timer
  2521. * @pdev_hdl: pdev handle
  2522. */
  2523. #ifdef ATH_SUPPORT_EXT_STAT
  2524. void dp_iterate_update_peer_list(void *pdev_hdl)
  2525. {
  2526. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  2527. struct dp_vdev *vdev = NULL;
  2528. struct dp_peer *peer = NULL;
  2529. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  2530. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  2531. dp_cal_client_update_peer_stats(&peer->stats);
  2532. }
  2533. }
  2534. }
  2535. #else
  2536. void dp_iterate_update_peer_list(void *pdev_hdl)
  2537. {
  2538. }
  2539. #endif
  2540. /*
  2541. * dp_pdev_attach_wifi3() - attach txrx pdev
  2542. * @ctrl_pdev: Opaque PDEV object
  2543. * @txrx_soc: Datapath SOC handle
  2544. * @htc_handle: HTC handle for host-target interface
  2545. * @qdf_osdev: QDF OS device
  2546. * @pdev_id: PDEV ID
  2547. *
  2548. * Return: DP PDEV handle on success, NULL on failure
  2549. */
  2550. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  2551. struct cdp_ctrl_objmgr_pdev *ctrl_pdev,
  2552. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  2553. {
  2554. int tx_ring_size;
  2555. int tx_comp_ring_size;
  2556. int reo_dst_ring_size;
  2557. int entries;
  2558. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  2559. int nss_cfg;
  2560. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2561. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  2562. if (!pdev) {
  2563. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2564. FL("DP PDEV memory allocation failed"));
  2565. goto fail0;
  2566. }
  2567. soc_cfg_ctx = soc->wlan_cfg_ctx;
  2568. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach(soc->ctrl_psoc);
  2569. if (!pdev->wlan_cfg_ctx) {
  2570. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2571. FL("pdev cfg_attach failed"));
  2572. qdf_mem_free(pdev);
  2573. goto fail0;
  2574. }
  2575. /*
  2576. * set nss pdev config based on soc config
  2577. */
  2578. nss_cfg = wlan_cfg_get_dp_soc_nss_cfg(soc_cfg_ctx);
  2579. wlan_cfg_set_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx,
  2580. (nss_cfg & (1 << pdev_id)));
  2581. pdev->soc = soc;
  2582. pdev->ctrl_pdev = ctrl_pdev;
  2583. pdev->pdev_id = pdev_id;
  2584. soc->pdev_list[pdev_id] = pdev;
  2585. soc->pdev_count++;
  2586. TAILQ_INIT(&pdev->vdev_list);
  2587. qdf_spinlock_create(&pdev->vdev_list_lock);
  2588. pdev->vdev_count = 0;
  2589. qdf_spinlock_create(&pdev->tx_mutex);
  2590. qdf_spinlock_create(&pdev->neighbour_peer_mutex);
  2591. TAILQ_INIT(&pdev->neighbour_peers_list);
  2592. pdev->neighbour_peers_added = false;
  2593. if (dp_soc_cmn_setup(soc)) {
  2594. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2595. FL("dp_soc_cmn_setup failed"));
  2596. goto fail1;
  2597. }
  2598. /* Setup per PDEV TCL rings if configured */
  2599. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2600. tx_ring_size =
  2601. wlan_cfg_tx_ring_size(soc_cfg_ctx);
  2602. tx_comp_ring_size =
  2603. wlan_cfg_tx_comp_ring_size(soc_cfg_ctx);
  2604. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  2605. pdev_id, pdev_id, tx_ring_size)) {
  2606. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2607. FL("dp_srng_setup failed for tcl_data_ring"));
  2608. goto fail1;
  2609. }
  2610. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  2611. WBM2SW_RELEASE, pdev_id, pdev_id, tx_comp_ring_size)) {
  2612. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2613. FL("dp_srng_setup failed for tx_comp_ring"));
  2614. goto fail1;
  2615. }
  2616. soc->num_tcl_data_rings++;
  2617. }
  2618. /* Tx specific init */
  2619. if (dp_tx_pdev_attach(pdev)) {
  2620. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2621. FL("dp_tx_pdev_attach failed"));
  2622. goto fail1;
  2623. }
  2624. reo_dst_ring_size = wlan_cfg_get_reo_dst_ring_size(soc->wlan_cfg_ctx);
  2625. /* Setup per PDEV REO rings if configured */
  2626. if (wlan_cfg_per_pdev_rx_ring(soc_cfg_ctx)) {
  2627. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  2628. pdev_id, pdev_id, reo_dst_ring_size)) {
  2629. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2630. FL("dp_srng_setup failed for reo_dest_ringn"));
  2631. goto fail1;
  2632. }
  2633. soc->num_reo_dest_rings++;
  2634. }
  2635. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  2636. wlan_cfg_get_dp_soc_rxdma_refill_ring_size(soc_cfg_ctx))) {
  2637. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2638. FL("dp_srng_setup failed rx refill ring"));
  2639. goto fail1;
  2640. }
  2641. if (dp_rxdma_ring_setup(soc, pdev)) {
  2642. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2643. FL("RXDMA ring config failed"));
  2644. goto fail1;
  2645. }
  2646. if (dp_mon_rings_setup(soc, pdev)) {
  2647. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2648. FL("MONITOR rings setup failed"));
  2649. goto fail1;
  2650. }
  2651. entries = wlan_cfg_get_dp_soc_rxdma_err_dst_ring_size(soc_cfg_ctx);
  2652. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2653. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST,
  2654. 0, pdev_id,
  2655. entries)) {
  2656. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2657. FL(RNG_ERR "rxdma_err_dst_ring"));
  2658. goto fail1;
  2659. }
  2660. }
  2661. if (dp_setup_ipa_rx_refill_buf_ring(soc, pdev))
  2662. goto fail1;
  2663. if (dp_ipa_ring_resource_setup(soc, pdev))
  2664. goto fail1;
  2665. if (dp_ipa_uc_attach(soc, pdev) != QDF_STATUS_SUCCESS) {
  2666. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2667. FL("dp_ipa_uc_attach failed"));
  2668. goto fail1;
  2669. }
  2670. /* Rx specific init */
  2671. if (dp_rx_pdev_attach(pdev)) {
  2672. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2673. FL("dp_rx_pdev_attach failed"));
  2674. goto fail0;
  2675. }
  2676. DP_STATS_INIT(pdev);
  2677. /* Monitor filter init */
  2678. pdev->mon_filter_mode = MON_FILTER_ALL;
  2679. pdev->fp_mgmt_filter = FILTER_MGMT_ALL;
  2680. pdev->fp_ctrl_filter = FILTER_CTRL_ALL;
  2681. pdev->fp_data_filter = FILTER_DATA_ALL;
  2682. pdev->mo_mgmt_filter = FILTER_MGMT_ALL;
  2683. pdev->mo_ctrl_filter = FILTER_CTRL_ALL;
  2684. pdev->mo_data_filter = FILTER_DATA_ALL;
  2685. dp_local_peer_id_pool_init(pdev);
  2686. dp_dscp_tid_map_setup(pdev);
  2687. /* Rx monitor mode specific init */
  2688. if (dp_rx_pdev_mon_attach(pdev)) {
  2689. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2690. "dp_rx_pdev_attach failed");
  2691. goto fail1;
  2692. }
  2693. if (dp_wdi_event_attach(pdev)) {
  2694. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2695. "dp_wdi_evet_attach failed");
  2696. goto fail1;
  2697. }
  2698. /* set the reo destination during initialization */
  2699. pdev->reo_dest = pdev->pdev_id + 1;
  2700. /*
  2701. * initialize ppdu tlv list
  2702. */
  2703. TAILQ_INIT(&pdev->ppdu_info_list);
  2704. pdev->tlv_count = 0;
  2705. pdev->list_depth = 0;
  2706. qdf_mem_zero(&pdev->sojourn_stats, sizeof(struct cdp_tx_sojourn_stats));
  2707. pdev->sojourn_buf = qdf_nbuf_alloc(pdev->soc->osdev,
  2708. sizeof(struct cdp_tx_sojourn_stats), 0, 4,
  2709. TRUE);
  2710. /* initlialize cal client timer */
  2711. dp_cal_client_attach(&pdev->cal_client_ctx, pdev, pdev->soc->osdev,
  2712. &dp_iterate_update_peer_list);
  2713. return (struct cdp_pdev *)pdev;
  2714. fail1:
  2715. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  2716. fail0:
  2717. return NULL;
  2718. }
  2719. /*
  2720. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  2721. * @soc: data path SoC handle
  2722. * @pdev: Physical device handle
  2723. *
  2724. * Return: void
  2725. */
  2726. #ifdef QCA_HOST2FW_RXBUF_RING
  2727. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2728. struct dp_pdev *pdev)
  2729. {
  2730. int max_mac_rings =
  2731. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  2732. int i;
  2733. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  2734. max_mac_rings : MAX_RX_MAC_RINGS;
  2735. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  2736. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  2737. RXDMA_BUF, 1);
  2738. qdf_timer_free(&soc->mon_reap_timer);
  2739. }
  2740. #else
  2741. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2742. struct dp_pdev *pdev)
  2743. {
  2744. }
  2745. #endif
  2746. /*
  2747. * dp_neighbour_peers_detach() - Detach neighbour peers(nac clients)
  2748. * @pdev: device object
  2749. *
  2750. * Return: void
  2751. */
  2752. static void dp_neighbour_peers_detach(struct dp_pdev *pdev)
  2753. {
  2754. struct dp_neighbour_peer *peer = NULL;
  2755. struct dp_neighbour_peer *temp_peer = NULL;
  2756. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  2757. neighbour_peer_list_elem, temp_peer) {
  2758. /* delete this peer from the list */
  2759. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  2760. peer, neighbour_peer_list_elem);
  2761. qdf_mem_free(peer);
  2762. }
  2763. qdf_spinlock_destroy(&pdev->neighbour_peer_mutex);
  2764. }
  2765. /**
  2766. * dp_htt_ppdu_stats_detach() - detach stats resources
  2767. * @pdev: Datapath PDEV handle
  2768. *
  2769. * Return: void
  2770. */
  2771. static void dp_htt_ppdu_stats_detach(struct dp_pdev *pdev)
  2772. {
  2773. struct ppdu_info *ppdu_info, *ppdu_info_next;
  2774. TAILQ_FOREACH_SAFE(ppdu_info, &pdev->ppdu_info_list,
  2775. ppdu_info_list_elem, ppdu_info_next) {
  2776. if (!ppdu_info)
  2777. break;
  2778. qdf_assert_always(ppdu_info->nbuf);
  2779. qdf_nbuf_free(ppdu_info->nbuf);
  2780. qdf_mem_free(ppdu_info);
  2781. }
  2782. }
  2783. #if !defined(QCA_WIFI_QCA6390) && !defined(DISABLE_MON_CONFIG)
  2784. static
  2785. void dp_mon_ring_deinit(struct dp_soc *soc, struct dp_pdev *pdev,
  2786. int mac_id)
  2787. {
  2788. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring[mac_id],
  2789. RXDMA_MONITOR_BUF, 0);
  2790. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring[mac_id],
  2791. RXDMA_MONITOR_DST, 0);
  2792. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring[mac_id],
  2793. RXDMA_MONITOR_STATUS, 0);
  2794. dp_srng_cleanup(soc, &pdev->rxdma_mon_desc_ring[mac_id],
  2795. RXDMA_MONITOR_DESC, 0);
  2796. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[mac_id],
  2797. RXDMA_DST, 0);
  2798. }
  2799. #else
  2800. static void dp_mon_ring_deinit(struct dp_soc *soc, struct dp_pdev *pdev,
  2801. int mac_id)
  2802. {
  2803. }
  2804. #endif
  2805. /*
  2806. * dp_pdev_detach_wifi3() - detach txrx pdev
  2807. * @txrx_pdev: Datapath PDEV handle
  2808. * @force: Force detach
  2809. *
  2810. */
  2811. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  2812. {
  2813. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2814. struct dp_soc *soc = pdev->soc;
  2815. qdf_nbuf_t curr_nbuf, next_nbuf;
  2816. int mac_id;
  2817. dp_wdi_event_detach(pdev);
  2818. dp_tx_pdev_detach(pdev);
  2819. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2820. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  2821. TCL_DATA, pdev->pdev_id);
  2822. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  2823. WBM2SW_RELEASE, pdev->pdev_id);
  2824. }
  2825. dp_pktlogmod_exit(pdev);
  2826. dp_rx_pdev_detach(pdev);
  2827. dp_rx_pdev_mon_detach(pdev);
  2828. dp_neighbour_peers_detach(pdev);
  2829. qdf_spinlock_destroy(&pdev->tx_mutex);
  2830. qdf_spinlock_destroy(&pdev->vdev_list_lock);
  2831. dp_ipa_uc_detach(soc, pdev);
  2832. dp_cleanup_ipa_rx_refill_buf_ring(soc, pdev);
  2833. /* Cleanup per PDEV REO rings if configured */
  2834. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2835. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  2836. REO_DST, pdev->pdev_id);
  2837. }
  2838. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  2839. dp_rxdma_ring_cleanup(soc, pdev);
  2840. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2841. dp_mon_ring_deinit(soc, pdev, mac_id);
  2842. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[mac_id],
  2843. RXDMA_DST, 0);
  2844. }
  2845. curr_nbuf = pdev->invalid_peer_head_msdu;
  2846. while (curr_nbuf) {
  2847. next_nbuf = qdf_nbuf_next(curr_nbuf);
  2848. qdf_nbuf_free(curr_nbuf);
  2849. curr_nbuf = next_nbuf;
  2850. }
  2851. dp_htt_ppdu_stats_detach(pdev);
  2852. qdf_nbuf_free(pdev->sojourn_buf);
  2853. dp_cal_client_detach(&pdev->cal_client_ctx);
  2854. soc->pdev_list[pdev->pdev_id] = NULL;
  2855. soc->pdev_count--;
  2856. wlan_cfg_pdev_detach(pdev->wlan_cfg_ctx);
  2857. qdf_mem_free(pdev->dp_txrx_handle);
  2858. qdf_mem_free(pdev);
  2859. }
  2860. /*
  2861. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  2862. * @soc: DP SOC handle
  2863. */
  2864. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  2865. {
  2866. struct reo_desc_list_node *desc;
  2867. struct dp_rx_tid *rx_tid;
  2868. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  2869. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  2870. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  2871. rx_tid = &desc->rx_tid;
  2872. qdf_mem_unmap_nbytes_single(soc->osdev,
  2873. rx_tid->hw_qdesc_paddr,
  2874. QDF_DMA_BIDIRECTIONAL,
  2875. rx_tid->hw_qdesc_alloc_size);
  2876. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  2877. qdf_mem_free(desc);
  2878. }
  2879. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  2880. qdf_list_destroy(&soc->reo_desc_freelist);
  2881. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  2882. }
  2883. /*
  2884. * dp_soc_detach_wifi3() - Detach txrx SOC
  2885. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  2886. */
  2887. static void dp_soc_detach_wifi3(void *txrx_soc)
  2888. {
  2889. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2890. int i;
  2891. qdf_atomic_set(&soc->cmn_init_done, 0);
  2892. qdf_flush_work(&soc->htt_stats.work);
  2893. qdf_disable_work(&soc->htt_stats.work);
  2894. /* Free pending htt stats messages */
  2895. qdf_nbuf_queue_free(&soc->htt_stats.msg);
  2896. dp_free_inact_timer(soc);
  2897. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2898. if (soc->pdev_list[i])
  2899. dp_pdev_detach_wifi3(
  2900. (struct cdp_pdev *)soc->pdev_list[i], 1);
  2901. }
  2902. dp_peer_find_detach(soc);
  2903. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  2904. * SW descriptors
  2905. */
  2906. /* Free the ring memories */
  2907. /* Common rings */
  2908. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  2909. dp_tx_soc_detach(soc);
  2910. /* Tx data rings */
  2911. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2912. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2913. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  2914. TCL_DATA, i);
  2915. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  2916. WBM2SW_RELEASE, i);
  2917. }
  2918. }
  2919. /* TCL command and status rings */
  2920. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  2921. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  2922. /* Rx data rings */
  2923. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2924. soc->num_reo_dest_rings =
  2925. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  2926. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2927. /* TODO: Get number of rings and ring sizes
  2928. * from wlan_cfg
  2929. */
  2930. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  2931. REO_DST, i);
  2932. }
  2933. }
  2934. /* REO reinjection ring */
  2935. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  2936. /* Rx release ring */
  2937. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  2938. /* Rx exception ring */
  2939. /* TODO: Better to store ring_type and ring_num in
  2940. * dp_srng during setup
  2941. */
  2942. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  2943. /* REO command and status rings */
  2944. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  2945. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  2946. dp_hw_link_desc_pool_cleanup(soc);
  2947. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  2948. qdf_spinlock_destroy(&soc->htt_stats.lock);
  2949. htt_soc_detach(soc->htt_handle);
  2950. qdf_spinlock_destroy(&soc->rx.defrag.defrag_lock);
  2951. dp_reo_cmdlist_destroy(soc);
  2952. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  2953. dp_reo_desc_freelist_destroy(soc);
  2954. wlan_cfg_soc_detach(soc->wlan_cfg_ctx);
  2955. dp_soc_wds_detach(soc);
  2956. qdf_spinlock_destroy(&soc->ast_lock);
  2957. qdf_mem_free(soc);
  2958. }
  2959. #if !defined(QCA_WIFI_QCA6390) && !defined(DISABLE_MON_CONFIG)
  2960. static void dp_mon_htt_srng_setup(struct dp_soc *soc,
  2961. struct dp_pdev *pdev,
  2962. int mac_id,
  2963. int mac_for_pdev)
  2964. {
  2965. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2966. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  2967. RXDMA_MONITOR_BUF);
  2968. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2969. pdev->rxdma_mon_dst_ring[mac_id].hal_srng,
  2970. RXDMA_MONITOR_DST);
  2971. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2972. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  2973. RXDMA_MONITOR_STATUS);
  2974. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2975. pdev->rxdma_mon_desc_ring[mac_id].hal_srng,
  2976. RXDMA_MONITOR_DESC);
  2977. }
  2978. #else
  2979. static void dp_mon_htt_srng_setup(struct dp_soc *soc,
  2980. struct dp_pdev *pdev,
  2981. int mac_id,
  2982. int mac_for_pdev)
  2983. {
  2984. }
  2985. #endif
  2986. /*
  2987. * dp_rxdma_ring_config() - configure the RX DMA rings
  2988. *
  2989. * This function is used to configure the MAC rings.
  2990. * On MCL host provides buffers in Host2FW ring
  2991. * FW refills (copies) buffers to the ring and updates
  2992. * ring_idx in register
  2993. *
  2994. * @soc: data path SoC handle
  2995. *
  2996. * Return: void
  2997. */
  2998. #ifdef QCA_HOST2FW_RXBUF_RING
  2999. static void dp_rxdma_ring_config(struct dp_soc *soc)
  3000. {
  3001. int i;
  3002. for (i = 0; i < MAX_PDEV_CNT; i++) {
  3003. struct dp_pdev *pdev = soc->pdev_list[i];
  3004. if (pdev) {
  3005. int mac_id;
  3006. bool dbs_enable = 0;
  3007. int max_mac_rings =
  3008. wlan_cfg_get_num_mac_rings
  3009. (pdev->wlan_cfg_ctx);
  3010. htt_srng_setup(soc->htt_handle, 0,
  3011. pdev->rx_refill_buf_ring.hal_srng,
  3012. RXDMA_BUF);
  3013. if (pdev->rx_refill_buf_ring2.hal_srng)
  3014. htt_srng_setup(soc->htt_handle, 0,
  3015. pdev->rx_refill_buf_ring2.hal_srng,
  3016. RXDMA_BUF);
  3017. if (soc->cdp_soc.ol_ops->
  3018. is_hw_dbs_2x2_capable) {
  3019. dbs_enable = soc->cdp_soc.ol_ops->
  3020. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  3021. }
  3022. if (dbs_enable) {
  3023. QDF_TRACE(QDF_MODULE_ID_TXRX,
  3024. QDF_TRACE_LEVEL_ERROR,
  3025. FL("DBS enabled max_mac_rings %d"),
  3026. max_mac_rings);
  3027. } else {
  3028. max_mac_rings = 1;
  3029. QDF_TRACE(QDF_MODULE_ID_TXRX,
  3030. QDF_TRACE_LEVEL_ERROR,
  3031. FL("DBS disabled, max_mac_rings %d"),
  3032. max_mac_rings);
  3033. }
  3034. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3035. FL("pdev_id %d max_mac_rings %d"),
  3036. pdev->pdev_id, max_mac_rings);
  3037. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  3038. int mac_for_pdev = dp_get_mac_id_for_pdev(
  3039. mac_id, pdev->pdev_id);
  3040. QDF_TRACE(QDF_MODULE_ID_TXRX,
  3041. QDF_TRACE_LEVEL_ERROR,
  3042. FL("mac_id %d"), mac_for_pdev);
  3043. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3044. pdev->rx_mac_buf_ring[mac_id]
  3045. .hal_srng,
  3046. RXDMA_BUF);
  3047. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3048. pdev->rxdma_err_dst_ring[mac_id]
  3049. .hal_srng,
  3050. RXDMA_DST);
  3051. /* Configure monitor mode rings */
  3052. dp_mon_htt_srng_setup(soc, pdev, mac_id,
  3053. mac_for_pdev);
  3054. }
  3055. }
  3056. }
  3057. /*
  3058. * Timer to reap rxdma status rings.
  3059. * Needed until we enable ppdu end interrupts
  3060. */
  3061. qdf_timer_init(soc->osdev, &soc->mon_reap_timer,
  3062. dp_service_mon_rings, (void *)soc,
  3063. QDF_TIMER_TYPE_WAKE_APPS);
  3064. soc->reap_timer_init = 1;
  3065. }
  3066. #else
  3067. /* This is only for WIN */
  3068. static void dp_rxdma_ring_config(struct dp_soc *soc)
  3069. {
  3070. int i;
  3071. int mac_id;
  3072. for (i = 0; i < MAX_PDEV_CNT; i++) {
  3073. struct dp_pdev *pdev = soc->pdev_list[i];
  3074. if (pdev == NULL)
  3075. continue;
  3076. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3077. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, i);
  3078. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3079. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  3080. #ifndef DISABLE_MON_CONFIG
  3081. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3082. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3083. RXDMA_MONITOR_BUF);
  3084. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3085. pdev->rxdma_mon_dst_ring[mac_id].hal_srng,
  3086. RXDMA_MONITOR_DST);
  3087. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3088. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3089. RXDMA_MONITOR_STATUS);
  3090. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3091. pdev->rxdma_mon_desc_ring[mac_id].hal_srng,
  3092. RXDMA_MONITOR_DESC);
  3093. #endif
  3094. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3095. pdev->rxdma_err_dst_ring[mac_id].hal_srng,
  3096. RXDMA_DST);
  3097. }
  3098. }
  3099. }
  3100. #endif
  3101. /*
  3102. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  3103. * @txrx_soc: Datapath SOC handle
  3104. */
  3105. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  3106. {
  3107. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  3108. htt_soc_attach_target(soc->htt_handle);
  3109. dp_rxdma_ring_config(soc);
  3110. DP_STATS_INIT(soc);
  3111. /* initialize work queue for stats processing */
  3112. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  3113. return 0;
  3114. }
  3115. /*
  3116. * dp_soc_get_nss_cfg_wifi3() - SOC get nss config
  3117. * @txrx_soc: Datapath SOC handle
  3118. */
  3119. static int dp_soc_get_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc)
  3120. {
  3121. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  3122. return wlan_cfg_get_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx);
  3123. }
  3124. /*
  3125. * dp_soc_set_nss_cfg_wifi3() - SOC set nss config
  3126. * @txrx_soc: Datapath SOC handle
  3127. * @nss_cfg: nss config
  3128. */
  3129. static void dp_soc_set_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc, int config)
  3130. {
  3131. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  3132. struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx = dsoc->wlan_cfg_ctx;
  3133. wlan_cfg_set_dp_soc_nss_cfg(wlan_cfg_ctx, config);
  3134. /*
  3135. * TODO: masked out based on the per offloaded radio
  3136. */
  3137. if (config == dp_nss_cfg_dbdc) {
  3138. wlan_cfg_set_num_tx_desc_pool(wlan_cfg_ctx, 0);
  3139. wlan_cfg_set_num_tx_ext_desc_pool(wlan_cfg_ctx, 0);
  3140. wlan_cfg_set_num_tx_desc(wlan_cfg_ctx, 0);
  3141. wlan_cfg_set_num_tx_ext_desc(wlan_cfg_ctx, 0);
  3142. }
  3143. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3144. FL("nss-wifi<0> nss config is enabled"));
  3145. }
  3146. /*
  3147. * dp_vdev_attach_wifi3() - attach txrx vdev
  3148. * @txrx_pdev: Datapath PDEV handle
  3149. * @vdev_mac_addr: MAC address of the virtual interface
  3150. * @vdev_id: VDEV Id
  3151. * @wlan_op_mode: VDEV operating mode
  3152. *
  3153. * Return: DP VDEV handle on success, NULL on failure
  3154. */
  3155. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  3156. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  3157. {
  3158. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  3159. struct dp_soc *soc = pdev->soc;
  3160. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  3161. if (!vdev) {
  3162. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3163. FL("DP VDEV memory allocation failed"));
  3164. goto fail0;
  3165. }
  3166. vdev->pdev = pdev;
  3167. vdev->vdev_id = vdev_id;
  3168. vdev->opmode = op_mode;
  3169. vdev->osdev = soc->osdev;
  3170. vdev->osif_rx = NULL;
  3171. vdev->osif_rsim_rx_decap = NULL;
  3172. vdev->osif_get_key = NULL;
  3173. vdev->osif_rx_mon = NULL;
  3174. vdev->osif_tx_free_ext = NULL;
  3175. vdev->osif_vdev = NULL;
  3176. vdev->delete.pending = 0;
  3177. vdev->safemode = 0;
  3178. vdev->drop_unenc = 1;
  3179. vdev->sec_type = cdp_sec_type_none;
  3180. #ifdef notyet
  3181. vdev->filters_num = 0;
  3182. #endif
  3183. qdf_mem_copy(
  3184. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  3185. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  3186. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  3187. vdev->dscp_tid_map_id = 0;
  3188. vdev->mcast_enhancement_en = 0;
  3189. vdev->raw_mode_war = wlan_cfg_get_raw_mode_war(soc->wlan_cfg_ctx);
  3190. /* TODO: Initialize default HTT meta data that will be used in
  3191. * TCL descriptors for packets transmitted from this VDEV
  3192. */
  3193. TAILQ_INIT(&vdev->peer_list);
  3194. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3195. /* add this vdev into the pdev's list */
  3196. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  3197. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3198. pdev->vdev_count++;
  3199. dp_tx_vdev_attach(vdev);
  3200. if ((soc->intr_mode == DP_INTR_POLL) &&
  3201. wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx) != 0) {
  3202. if (pdev->vdev_count == 1)
  3203. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  3204. }
  3205. dp_lro_hash_setup(soc);
  3206. /* LRO */
  3207. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  3208. wlan_op_mode_sta == vdev->opmode)
  3209. vdev->lro_enable = true;
  3210. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3211. "LRO: vdev_id %d lro_enable %d", vdev_id, vdev->lro_enable);
  3212. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3213. "Created vdev %pK (%pM)", vdev, vdev->mac_addr.raw);
  3214. DP_STATS_INIT(vdev);
  3215. if (wlan_op_mode_sta == vdev->opmode)
  3216. dp_peer_create_wifi3((struct cdp_vdev *)vdev,
  3217. vdev->mac_addr.raw,
  3218. NULL);
  3219. return (struct cdp_vdev *)vdev;
  3220. fail0:
  3221. return NULL;
  3222. }
  3223. /**
  3224. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  3225. * @vdev: Datapath VDEV handle
  3226. * @osif_vdev: OSIF vdev handle
  3227. * @ctrl_vdev: UMAC vdev handle
  3228. * @txrx_ops: Tx and Rx operations
  3229. *
  3230. * Return: DP VDEV handle on success, NULL on failure
  3231. */
  3232. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  3233. void *osif_vdev, struct cdp_ctrl_objmgr_vdev *ctrl_vdev,
  3234. struct ol_txrx_ops *txrx_ops)
  3235. {
  3236. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3237. vdev->osif_vdev = osif_vdev;
  3238. vdev->ctrl_vdev = ctrl_vdev;
  3239. vdev->osif_rx = txrx_ops->rx.rx;
  3240. vdev->osif_rx_stack = txrx_ops->rx.rx_stack;
  3241. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  3242. vdev->osif_get_key = txrx_ops->get_key;
  3243. vdev->osif_rx_mon = txrx_ops->rx.mon;
  3244. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  3245. #ifdef notyet
  3246. #if ATH_SUPPORT_WAPI
  3247. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  3248. #endif
  3249. #endif
  3250. #ifdef UMAC_SUPPORT_PROXY_ARP
  3251. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  3252. #endif
  3253. vdev->me_convert = txrx_ops->me_convert;
  3254. /* TODO: Enable the following once Tx code is integrated */
  3255. if (vdev->mesh_vdev)
  3256. txrx_ops->tx.tx = dp_tx_send_mesh;
  3257. else
  3258. txrx_ops->tx.tx = dp_tx_send;
  3259. txrx_ops->tx.tx_exception = dp_tx_send_exception;
  3260. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  3261. "DP Vdev Register success");
  3262. }
  3263. /**
  3264. * dp_vdev_flush_peers() - Forcibily Flush peers of vdev
  3265. * @vdev: Datapath VDEV handle
  3266. *
  3267. * Return: void
  3268. */
  3269. static void dp_vdev_flush_peers(struct dp_vdev *vdev)
  3270. {
  3271. struct dp_pdev *pdev = vdev->pdev;
  3272. struct dp_soc *soc = pdev->soc;
  3273. struct dp_peer *peer;
  3274. uint16_t *peer_ids;
  3275. uint8_t i = 0, j = 0;
  3276. peer_ids = qdf_mem_malloc(soc->max_peers * sizeof(peer_ids[0]));
  3277. if (!peer_ids) {
  3278. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3279. "DP alloc failure - unable to flush peers");
  3280. return;
  3281. }
  3282. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3283. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3284. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  3285. if (peer->peer_ids[i] != HTT_INVALID_PEER)
  3286. if (j < soc->max_peers)
  3287. peer_ids[j++] = peer->peer_ids[i];
  3288. }
  3289. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3290. for (i = 0; i < j ; i++)
  3291. dp_rx_peer_unmap_handler(soc, peer_ids[i], vdev->vdev_id,
  3292. NULL, 0);
  3293. qdf_mem_free(peer_ids);
  3294. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3295. FL("Flushed peers for vdev object %pK "), vdev);
  3296. }
  3297. /*
  3298. * dp_vdev_detach_wifi3() - Detach txrx vdev
  3299. * @txrx_vdev: Datapath VDEV handle
  3300. * @callback: Callback OL_IF on completion of detach
  3301. * @cb_context: Callback context
  3302. *
  3303. */
  3304. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  3305. ol_txrx_vdev_delete_cb callback, void *cb_context)
  3306. {
  3307. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3308. struct dp_pdev *pdev = vdev->pdev;
  3309. struct dp_soc *soc = pdev->soc;
  3310. struct dp_neighbour_peer *peer = NULL;
  3311. /* preconditions */
  3312. qdf_assert(vdev);
  3313. if (wlan_op_mode_sta == vdev->opmode)
  3314. dp_peer_delete_wifi3(vdev->vap_bss_peer, 0);
  3315. /*
  3316. * If Target is hung, flush all peers before detaching vdev
  3317. * this will free all references held due to missing
  3318. * unmap commands from Target
  3319. */
  3320. if (hif_get_target_status(soc->hif_handle) == TARGET_STATUS_RESET)
  3321. dp_vdev_flush_peers(vdev);
  3322. /*
  3323. * Use peer_ref_mutex while accessing peer_list, in case
  3324. * a peer is in the process of being removed from the list.
  3325. */
  3326. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3327. /* check that the vdev has no peers allocated */
  3328. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  3329. /* debug print - will be removed later */
  3330. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  3331. FL("not deleting vdev object %pK (%pM)"
  3332. "until deletion finishes for all its peers"),
  3333. vdev, vdev->mac_addr.raw);
  3334. /* indicate that the vdev needs to be deleted */
  3335. vdev->delete.pending = 1;
  3336. vdev->delete.callback = callback;
  3337. vdev->delete.context = cb_context;
  3338. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3339. return;
  3340. }
  3341. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3342. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3343. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  3344. neighbour_peer_list_elem) {
  3345. QDF_ASSERT(peer->vdev != vdev);
  3346. }
  3347. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3348. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3349. dp_tx_vdev_detach(vdev);
  3350. /* remove the vdev from its parent pdev's list */
  3351. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  3352. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3353. FL("deleting vdev object %pK (%pM)"), vdev, vdev->mac_addr.raw);
  3354. qdf_mem_free(vdev);
  3355. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3356. if (callback)
  3357. callback(cb_context);
  3358. }
  3359. /*
  3360. * dp_peer_delete_ast_entries(): Delete all AST entries for a peer
  3361. * @soc - datapath soc handle
  3362. * @peer - datapath peer handle
  3363. *
  3364. * Delete the AST entries belonging to a peer
  3365. */
  3366. #ifdef FEATURE_AST
  3367. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  3368. struct dp_peer *peer)
  3369. {
  3370. struct dp_ast_entry *ast_entry, *temp_ast_entry;
  3371. qdf_spin_lock_bh(&soc->ast_lock);
  3372. DP_PEER_ITERATE_ASE_LIST(peer, ast_entry, temp_ast_entry)
  3373. dp_peer_del_ast(soc, ast_entry);
  3374. peer->self_ast_entry = NULL;
  3375. TAILQ_INIT(&peer->ast_entry_list);
  3376. qdf_spin_unlock_bh(&soc->ast_lock);
  3377. }
  3378. #else
  3379. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  3380. struct dp_peer *peer)
  3381. {
  3382. }
  3383. #endif
  3384. #if ATH_SUPPORT_WRAP
  3385. static inline struct dp_peer *dp_peer_can_reuse(struct dp_vdev *vdev,
  3386. uint8_t *peer_mac_addr)
  3387. {
  3388. struct dp_peer *peer;
  3389. peer = dp_peer_find_hash_find(vdev->pdev->soc, peer_mac_addr,
  3390. 0, vdev->vdev_id);
  3391. if (!peer)
  3392. return NULL;
  3393. if (peer->bss_peer)
  3394. return peer;
  3395. qdf_atomic_dec(&peer->ref_cnt);
  3396. return NULL;
  3397. }
  3398. #else
  3399. static inline struct dp_peer *dp_peer_can_reuse(struct dp_vdev *vdev,
  3400. uint8_t *peer_mac_addr)
  3401. {
  3402. struct dp_peer *peer;
  3403. peer = dp_peer_find_hash_find(vdev->pdev->soc, peer_mac_addr,
  3404. 0, vdev->vdev_id);
  3405. if (!peer)
  3406. return NULL;
  3407. if (peer->bss_peer && (peer->vdev->vdev_id == vdev->vdev_id))
  3408. return peer;
  3409. qdf_atomic_dec(&peer->ref_cnt);
  3410. return NULL;
  3411. }
  3412. #endif
  3413. /*
  3414. * dp_peer_create_wifi3() - attach txrx peer
  3415. * @txrx_vdev: Datapath VDEV handle
  3416. * @peer_mac_addr: Peer MAC address
  3417. *
  3418. * Return: DP peeer handle on success, NULL on failure
  3419. */
  3420. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  3421. uint8_t *peer_mac_addr, struct cdp_ctrl_objmgr_peer *ctrl_peer)
  3422. {
  3423. struct dp_peer *peer;
  3424. int i;
  3425. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3426. struct dp_pdev *pdev;
  3427. struct dp_soc *soc;
  3428. struct dp_ast_entry *ast_entry;
  3429. enum cdp_txrx_ast_entry_type ast_type = CDP_TXRX_AST_TYPE_STATIC;
  3430. /* preconditions */
  3431. qdf_assert(vdev);
  3432. qdf_assert(peer_mac_addr);
  3433. pdev = vdev->pdev;
  3434. soc = pdev->soc;
  3435. /*
  3436. * If a peer entry with given MAC address already exists,
  3437. * reuse the peer and reset the state of peer.
  3438. */
  3439. peer = dp_peer_can_reuse(vdev, peer_mac_addr);
  3440. if (peer) {
  3441. peer->delete_in_progress = false;
  3442. dp_peer_delete_ast_entries(soc, peer);
  3443. if ((vdev->opmode == wlan_op_mode_sta) &&
  3444. !qdf_mem_cmp(peer_mac_addr, &vdev->mac_addr.raw[0],
  3445. DP_MAC_ADDR_LEN)) {
  3446. ast_type = CDP_TXRX_AST_TYPE_SELF;
  3447. }
  3448. dp_peer_add_ast(soc, peer, peer_mac_addr, ast_type, 0);
  3449. /*
  3450. * Control path maintains a node count which is incremented
  3451. * for every new peer create command. Since new peer is not being
  3452. * created and earlier reference is reused here,
  3453. * peer_unref_delete event is sent to control path to
  3454. * increment the count back.
  3455. */
  3456. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  3457. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->ctrl_pdev,
  3458. vdev->vdev_id, peer->mac_addr.raw);
  3459. }
  3460. peer->ctrl_peer = ctrl_peer;
  3461. dp_local_peer_id_alloc(pdev, peer);
  3462. DP_STATS_INIT(peer);
  3463. return (void *)peer;
  3464. } else {
  3465. /*
  3466. * When a STA roams from RPTR AP to ROOT AP and vice versa, we
  3467. * need to remove the AST entry which was earlier added as a WDS
  3468. * entry.
  3469. * If an AST entry exists, but no peer entry exists with a given
  3470. * MAC addresses, we could deduce it as a WDS entry
  3471. */
  3472. qdf_spin_lock_bh(&soc->ast_lock);
  3473. ast_entry = dp_peer_ast_hash_find(soc, peer_mac_addr);
  3474. if (ast_entry)
  3475. dp_peer_del_ast(soc, ast_entry);
  3476. qdf_spin_unlock_bh(&soc->ast_lock);
  3477. }
  3478. #ifdef notyet
  3479. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  3480. soc->mempool_ol_ath_peer);
  3481. #else
  3482. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  3483. #endif
  3484. if (!peer)
  3485. return NULL; /* failure */
  3486. qdf_mem_zero(peer, sizeof(struct dp_peer));
  3487. TAILQ_INIT(&peer->ast_entry_list);
  3488. /* store provided params */
  3489. peer->vdev = vdev;
  3490. peer->ctrl_peer = ctrl_peer;
  3491. if ((vdev->opmode == wlan_op_mode_sta) &&
  3492. !qdf_mem_cmp(peer_mac_addr, &vdev->mac_addr.raw[0],
  3493. DP_MAC_ADDR_LEN)) {
  3494. ast_type = CDP_TXRX_AST_TYPE_SELF;
  3495. }
  3496. dp_peer_add_ast(soc, peer, peer_mac_addr, ast_type, 0);
  3497. qdf_spinlock_create(&peer->peer_info_lock);
  3498. qdf_mem_copy(
  3499. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  3500. /* TODO: See of rx_opt_proc is really required */
  3501. peer->rx_opt_proc = soc->rx_opt_proc;
  3502. /* initialize the peer_id */
  3503. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  3504. peer->peer_ids[i] = HTT_INVALID_PEER;
  3505. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3506. qdf_atomic_init(&peer->ref_cnt);
  3507. /* keep one reference for attach */
  3508. qdf_atomic_inc(&peer->ref_cnt);
  3509. /* add this peer into the vdev's list */
  3510. if (wlan_op_mode_sta == vdev->opmode)
  3511. TAILQ_INSERT_HEAD(&vdev->peer_list, peer, peer_list_elem);
  3512. else
  3513. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  3514. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3515. /* TODO: See if hash based search is required */
  3516. dp_peer_find_hash_add(soc, peer);
  3517. /* Initialize the peer state */
  3518. peer->state = OL_TXRX_PEER_STATE_DISC;
  3519. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3520. "vdev %pK created peer %pK (%pM) ref_cnt: %d",
  3521. vdev, peer, peer->mac_addr.raw,
  3522. qdf_atomic_read(&peer->ref_cnt));
  3523. /*
  3524. * For every peer MAp message search and set if bss_peer
  3525. */
  3526. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  3527. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3528. "vdev bss_peer!!!!");
  3529. peer->bss_peer = 1;
  3530. vdev->vap_bss_peer = peer;
  3531. }
  3532. for (i = 0; i < DP_MAX_TIDS; i++)
  3533. qdf_spinlock_create(&peer->rx_tid[i].tid_lock);
  3534. dp_local_peer_id_alloc(pdev, peer);
  3535. DP_STATS_INIT(peer);
  3536. return (void *)peer;
  3537. }
  3538. /*
  3539. * dp_peer_setup_wifi3() - initialize the peer
  3540. * @vdev_hdl: virtual device object
  3541. * @peer: Peer object
  3542. *
  3543. * Return: void
  3544. */
  3545. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  3546. {
  3547. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  3548. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  3549. struct dp_pdev *pdev;
  3550. struct dp_soc *soc;
  3551. bool hash_based = 0;
  3552. enum cdp_host_reo_dest_ring reo_dest;
  3553. /* preconditions */
  3554. qdf_assert(vdev);
  3555. qdf_assert(peer);
  3556. pdev = vdev->pdev;
  3557. soc = pdev->soc;
  3558. peer->last_assoc_rcvd = 0;
  3559. peer->last_disassoc_rcvd = 0;
  3560. peer->last_deauth_rcvd = 0;
  3561. /*
  3562. * hash based steering is disabled for Radios which are offloaded
  3563. * to NSS
  3564. */
  3565. if (!wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx))
  3566. hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  3567. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3568. FL("hash based steering for pdev: %d is %d"),
  3569. pdev->pdev_id, hash_based);
  3570. /*
  3571. * Below line of code will ensure the proper reo_dest ring is chosen
  3572. * for cases where toeplitz hash cannot be generated (ex: non TCP/UDP)
  3573. */
  3574. reo_dest = pdev->reo_dest;
  3575. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  3576. /* TODO: Check the destination ring number to be passed to FW */
  3577. soc->cdp_soc.ol_ops->peer_set_default_routing(
  3578. pdev->ctrl_pdev, peer->mac_addr.raw,
  3579. peer->vdev->vdev_id, hash_based, reo_dest);
  3580. }
  3581. dp_peer_rx_init(pdev, peer);
  3582. return;
  3583. }
  3584. /*
  3585. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  3586. * @vdev_handle: virtual device object
  3587. * @htt_pkt_type: type of pkt
  3588. *
  3589. * Return: void
  3590. */
  3591. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  3592. enum htt_cmn_pkt_type val)
  3593. {
  3594. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3595. vdev->tx_encap_type = val;
  3596. }
  3597. /*
  3598. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  3599. * @vdev_handle: virtual device object
  3600. * @htt_pkt_type: type of pkt
  3601. *
  3602. * Return: void
  3603. */
  3604. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  3605. enum htt_cmn_pkt_type val)
  3606. {
  3607. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3608. vdev->rx_decap_type = val;
  3609. }
  3610. /*
  3611. * dp_set_ba_aging_timeout() - set ba aging timeout per AC
  3612. * @txrx_soc: cdp soc handle
  3613. * @ac: Access category
  3614. * @value: timeout value in millisec
  3615. *
  3616. * Return: void
  3617. */
  3618. static void dp_set_ba_aging_timeout(struct cdp_soc_t *txrx_soc,
  3619. uint8_t ac, uint32_t value)
  3620. {
  3621. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3622. hal_set_ba_aging_timeout(soc->hal_soc, ac, value);
  3623. }
  3624. /*
  3625. * dp_get_ba_aging_timeout() - get ba aging timeout per AC
  3626. * @txrx_soc: cdp soc handle
  3627. * @ac: access category
  3628. * @value: timeout value in millisec
  3629. *
  3630. * Return: void
  3631. */
  3632. static void dp_get_ba_aging_timeout(struct cdp_soc_t *txrx_soc,
  3633. uint8_t ac, uint32_t *value)
  3634. {
  3635. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3636. hal_get_ba_aging_timeout(soc->hal_soc, ac, value);
  3637. }
  3638. /*
  3639. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  3640. * @pdev_handle: physical device object
  3641. * @val: reo destination ring index (1 - 4)
  3642. *
  3643. * Return: void
  3644. */
  3645. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  3646. enum cdp_host_reo_dest_ring val)
  3647. {
  3648. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3649. if (pdev)
  3650. pdev->reo_dest = val;
  3651. }
  3652. /*
  3653. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  3654. * @pdev_handle: physical device object
  3655. *
  3656. * Return: reo destination ring index
  3657. */
  3658. static enum cdp_host_reo_dest_ring
  3659. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  3660. {
  3661. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3662. if (pdev)
  3663. return pdev->reo_dest;
  3664. else
  3665. return cdp_host_reo_dest_ring_unknown;
  3666. }
  3667. #ifdef QCA_SUPPORT_SON
  3668. static void dp_son_peer_authorize(struct dp_peer *peer)
  3669. {
  3670. struct dp_soc *soc;
  3671. soc = peer->vdev->pdev->soc;
  3672. peer->peer_bs_inact_flag = 0;
  3673. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  3674. return;
  3675. }
  3676. #else
  3677. static void dp_son_peer_authorize(struct dp_peer *peer)
  3678. {
  3679. return;
  3680. }
  3681. #endif
  3682. /*
  3683. * dp_set_filter_neighbour_peers() - set filter neighbour peers for smart mesh
  3684. * @pdev_handle: device object
  3685. * @val: value to be set
  3686. *
  3687. * Return: void
  3688. */
  3689. static int dp_set_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  3690. uint32_t val)
  3691. {
  3692. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3693. /* Enable/Disable smart mesh filtering. This flag will be checked
  3694. * during rx processing to check if packets are from NAC clients.
  3695. */
  3696. pdev->filter_neighbour_peers = val;
  3697. return 0;
  3698. }
  3699. /*
  3700. * dp_update_filter_neighbour_peers() - set neighbour peers(nac clients)
  3701. * address for smart mesh filtering
  3702. * @vdev_handle: virtual device object
  3703. * @cmd: Add/Del command
  3704. * @macaddr: nac client mac address
  3705. *
  3706. * Return: void
  3707. */
  3708. static int dp_update_filter_neighbour_peers(struct cdp_vdev *vdev_handle,
  3709. uint32_t cmd, uint8_t *macaddr)
  3710. {
  3711. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3712. struct dp_pdev *pdev = vdev->pdev;
  3713. struct dp_neighbour_peer *peer = NULL;
  3714. if (!macaddr)
  3715. goto fail0;
  3716. /* Store address of NAC (neighbour peer) which will be checked
  3717. * against TA of received packets.
  3718. */
  3719. if (cmd == DP_NAC_PARAM_ADD) {
  3720. peer = (struct dp_neighbour_peer *) qdf_mem_malloc(
  3721. sizeof(*peer));
  3722. if (!peer) {
  3723. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3724. FL("DP neighbour peer node memory allocation failed"));
  3725. goto fail0;
  3726. }
  3727. qdf_mem_copy(&peer->neighbour_peers_macaddr.raw[0],
  3728. macaddr, DP_MAC_ADDR_LEN);
  3729. peer->vdev = vdev;
  3730. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3731. /* add this neighbour peer into the list */
  3732. TAILQ_INSERT_TAIL(&pdev->neighbour_peers_list, peer,
  3733. neighbour_peer_list_elem);
  3734. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3735. /* first neighbour */
  3736. if (!pdev->neighbour_peers_added) {
  3737. pdev->neighbour_peers_added = true;
  3738. dp_ppdu_ring_cfg(pdev);
  3739. }
  3740. return 1;
  3741. } else if (cmd == DP_NAC_PARAM_DEL) {
  3742. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3743. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  3744. neighbour_peer_list_elem) {
  3745. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  3746. macaddr, DP_MAC_ADDR_LEN)) {
  3747. /* delete this peer from the list */
  3748. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  3749. peer, neighbour_peer_list_elem);
  3750. qdf_mem_free(peer);
  3751. break;
  3752. }
  3753. }
  3754. /* last neighbour deleted */
  3755. if (TAILQ_EMPTY(&pdev->neighbour_peers_list))
  3756. pdev->neighbour_peers_added = false;
  3757. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3758. if (!pdev->mcopy_mode && !pdev->neighbour_peers_added &&
  3759. !pdev->enhanced_stats_en)
  3760. dp_ppdu_ring_reset(pdev);
  3761. return 1;
  3762. }
  3763. fail0:
  3764. return 0;
  3765. }
  3766. /*
  3767. * dp_get_sec_type() - Get the security type
  3768. * @peer: Datapath peer handle
  3769. * @sec_idx: Security id (mcast, ucast)
  3770. *
  3771. * return sec_type: Security type
  3772. */
  3773. static int dp_get_sec_type(struct cdp_peer *peer, uint8_t sec_idx)
  3774. {
  3775. struct dp_peer *dpeer = (struct dp_peer *)peer;
  3776. return dpeer->security[sec_idx].sec_type;
  3777. }
  3778. /*
  3779. * dp_peer_authorize() - authorize txrx peer
  3780. * @peer_handle: Datapath peer handle
  3781. * @authorize
  3782. *
  3783. */
  3784. static void dp_peer_authorize(struct cdp_peer *peer_handle, uint32_t authorize)
  3785. {
  3786. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3787. struct dp_soc *soc;
  3788. if (peer != NULL) {
  3789. soc = peer->vdev->pdev->soc;
  3790. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3791. dp_son_peer_authorize(peer);
  3792. peer->authorize = authorize ? 1 : 0;
  3793. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3794. }
  3795. }
  3796. #ifdef QCA_SUPPORT_SON
  3797. /*
  3798. * dp_txrx_update_inact_threshold() - Update inact timer threshold
  3799. * @pdev_handle: Device handle
  3800. * @new_threshold : updated threshold value
  3801. *
  3802. */
  3803. static void
  3804. dp_txrx_update_inact_threshold(struct cdp_pdev *pdev_handle,
  3805. u_int16_t new_threshold)
  3806. {
  3807. struct dp_vdev *vdev;
  3808. struct dp_peer *peer;
  3809. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3810. struct dp_soc *soc = pdev->soc;
  3811. u_int16_t old_threshold = soc->pdev_bs_inact_reload;
  3812. if (old_threshold == new_threshold)
  3813. return;
  3814. soc->pdev_bs_inact_reload = new_threshold;
  3815. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3816. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3817. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3818. if (vdev->opmode != wlan_op_mode_ap)
  3819. continue;
  3820. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3821. if (!peer->authorize)
  3822. continue;
  3823. if (old_threshold - peer->peer_bs_inact >=
  3824. new_threshold) {
  3825. dp_mark_peer_inact((void *)peer, true);
  3826. peer->peer_bs_inact = 0;
  3827. } else {
  3828. peer->peer_bs_inact = new_threshold -
  3829. (old_threshold - peer->peer_bs_inact);
  3830. }
  3831. }
  3832. }
  3833. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3834. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3835. }
  3836. /**
  3837. * dp_txrx_reset_inact_count(): Reset inact count
  3838. * @pdev_handle - device handle
  3839. *
  3840. * Return: void
  3841. */
  3842. static void
  3843. dp_txrx_reset_inact_count(struct cdp_pdev *pdev_handle)
  3844. {
  3845. struct dp_vdev *vdev = NULL;
  3846. struct dp_peer *peer = NULL;
  3847. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3848. struct dp_soc *soc = pdev->soc;
  3849. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3850. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3851. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3852. if (vdev->opmode != wlan_op_mode_ap)
  3853. continue;
  3854. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3855. if (!peer->authorize)
  3856. continue;
  3857. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  3858. }
  3859. }
  3860. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3861. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3862. }
  3863. /**
  3864. * dp_set_inact_params(): set inactivity params
  3865. * @pdev_handle - device handle
  3866. * @inact_check_interval - inactivity interval
  3867. * @inact_normal - Inactivity normal
  3868. * @inact_overload - Inactivity overload
  3869. *
  3870. * Return: bool
  3871. */
  3872. bool dp_set_inact_params(struct cdp_pdev *pdev_handle,
  3873. u_int16_t inact_check_interval,
  3874. u_int16_t inact_normal, u_int16_t inact_overload)
  3875. {
  3876. struct dp_soc *soc;
  3877. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3878. if (!pdev)
  3879. return false;
  3880. soc = pdev->soc;
  3881. if (!soc)
  3882. return false;
  3883. soc->pdev_bs_inact_interval = inact_check_interval;
  3884. soc->pdev_bs_inact_normal = inact_normal;
  3885. soc->pdev_bs_inact_overload = inact_overload;
  3886. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3887. soc->pdev_bs_inact_normal);
  3888. return true;
  3889. }
  3890. /**
  3891. * dp_start_inact_timer(): Inactivity timer start
  3892. * @pdev_handle - device handle
  3893. * @enable - Inactivity timer start/stop
  3894. *
  3895. * Return: bool
  3896. */
  3897. bool dp_start_inact_timer(struct cdp_pdev *pdev_handle, bool enable)
  3898. {
  3899. struct dp_soc *soc;
  3900. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3901. if (!pdev)
  3902. return false;
  3903. soc = pdev->soc;
  3904. if (!soc)
  3905. return false;
  3906. if (enable) {
  3907. dp_txrx_reset_inact_count((struct cdp_pdev *)pdev);
  3908. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  3909. soc->pdev_bs_inact_interval * 1000);
  3910. } else {
  3911. qdf_timer_stop(&soc->pdev_bs_inact_timer);
  3912. }
  3913. return true;
  3914. }
  3915. /**
  3916. * dp_set_overload(): Set inactivity overload
  3917. * @pdev_handle - device handle
  3918. * @overload - overload status
  3919. *
  3920. * Return: void
  3921. */
  3922. void dp_set_overload(struct cdp_pdev *pdev_handle, bool overload)
  3923. {
  3924. struct dp_soc *soc;
  3925. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3926. if (!pdev)
  3927. return;
  3928. soc = pdev->soc;
  3929. if (!soc)
  3930. return;
  3931. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3932. overload ? soc->pdev_bs_inact_overload :
  3933. soc->pdev_bs_inact_normal);
  3934. }
  3935. /**
  3936. * dp_peer_is_inact(): check whether peer is inactive
  3937. * @peer_handle - datapath peer handle
  3938. *
  3939. * Return: bool
  3940. */
  3941. bool dp_peer_is_inact(void *peer_handle)
  3942. {
  3943. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3944. if (!peer)
  3945. return false;
  3946. return peer->peer_bs_inact_flag == 1;
  3947. }
  3948. /**
  3949. * dp_init_inact_timer: initialize the inact timer
  3950. * @soc - SOC handle
  3951. *
  3952. * Return: void
  3953. */
  3954. void dp_init_inact_timer(struct dp_soc *soc)
  3955. {
  3956. qdf_timer_init(soc->osdev, &soc->pdev_bs_inact_timer,
  3957. dp_txrx_peer_find_inact_timeout_handler,
  3958. (void *)soc, QDF_TIMER_TYPE_WAKE_APPS);
  3959. }
  3960. #else
  3961. bool dp_set_inact_params(struct cdp_pdev *pdev, u_int16_t inact_check_interval,
  3962. u_int16_t inact_normal, u_int16_t inact_overload)
  3963. {
  3964. return false;
  3965. }
  3966. bool dp_start_inact_timer(struct cdp_pdev *pdev, bool enable)
  3967. {
  3968. return false;
  3969. }
  3970. void dp_set_overload(struct cdp_pdev *pdev, bool overload)
  3971. {
  3972. return;
  3973. }
  3974. void dp_init_inact_timer(struct dp_soc *soc)
  3975. {
  3976. return;
  3977. }
  3978. bool dp_peer_is_inact(void *peer)
  3979. {
  3980. return false;
  3981. }
  3982. #endif
  3983. static void dp_reset_and_release_peer_mem(struct dp_soc *soc,
  3984. struct dp_pdev *pdev,
  3985. struct dp_peer *peer,
  3986. uint32_t vdev_id)
  3987. {
  3988. struct dp_vdev *vdev = NULL;
  3989. struct dp_peer *bss_peer = NULL;
  3990. uint8_t *m_addr = NULL;
  3991. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3992. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3993. if (vdev->vdev_id == vdev_id)
  3994. break;
  3995. }
  3996. if (!vdev) {
  3997. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3998. "vdev is NULL");
  3999. } else {
  4000. if (vdev->vap_bss_peer == peer)
  4001. vdev->vap_bss_peer = NULL;
  4002. m_addr = peer->mac_addr.raw;
  4003. if (soc->cdp_soc.ol_ops->peer_unref_delete)
  4004. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->ctrl_pdev,
  4005. vdev_id, m_addr);
  4006. if (vdev && vdev->vap_bss_peer) {
  4007. bss_peer = vdev->vap_bss_peer;
  4008. DP_UPDATE_STATS(vdev, peer);
  4009. }
  4010. }
  4011. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4012. qdf_mem_free(peer);
  4013. }
  4014. static void dp_delete_pending_vdev(struct dp_pdev *pdev, uint32_t vdev_id)
  4015. {
  4016. struct dp_vdev *vdev = NULL;
  4017. ol_txrx_vdev_delete_cb vdev_delete_cb = NULL;
  4018. void *vdev_delete_context = NULL;
  4019. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4020. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4021. if (vdev->vdev_id == vdev_id)
  4022. break;
  4023. }
  4024. if (!vdev) {
  4025. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4026. "vdev is NULL");
  4027. } else if (vdev->delete.pending) {
  4028. vdev_delete_cb = vdev->delete.callback;
  4029. vdev_delete_context = vdev->delete.context;
  4030. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4031. FL("deleting vdev object %pK (%pM)- its last peer is done"),
  4032. vdev, vdev->mac_addr.raw);
  4033. /* all peers are gone, go ahead and delete it */
  4034. dp_tx_flow_pool_unmap_handler(pdev, vdev_id,
  4035. FLOW_TYPE_VDEV, vdev_id);
  4036. dp_tx_vdev_detach(vdev);
  4037. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  4038. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4039. FL("deleting vdev object %pK (%pM)"),
  4040. vdev, vdev->mac_addr.raw);
  4041. qdf_mem_free(vdev);
  4042. vdev = NULL;
  4043. }
  4044. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4045. if (vdev_delete_cb)
  4046. vdev_delete_cb(vdev_delete_context);
  4047. }
  4048. /*
  4049. * dp_peer_unref_delete() - unref and delete peer
  4050. * @peer_handle: Datapath peer handle
  4051. *
  4052. */
  4053. void dp_peer_unref_delete(void *peer_handle)
  4054. {
  4055. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4056. struct dp_vdev *vdev = peer->vdev;
  4057. struct dp_pdev *pdev = vdev->pdev;
  4058. struct dp_soc *soc = pdev->soc;
  4059. struct dp_peer *tmppeer;
  4060. int found = 0;
  4061. uint16_t peer_id;
  4062. uint16_t vdev_id;
  4063. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  4064. "%s: peer %pK ref_cnt(before decrement): %d\n", __func__,
  4065. peer, qdf_atomic_read(&peer->ref_cnt));
  4066. /*
  4067. * Hold the lock all the way from checking if the peer ref count
  4068. * is zero until the peer references are removed from the hash
  4069. * table and vdev list (if the peer ref count is zero).
  4070. * This protects against a new HL tx operation starting to use the
  4071. * peer object just after this function concludes it's done being used.
  4072. * Furthermore, the lock needs to be held while checking whether the
  4073. * vdev's list of peers is empty, to make sure that list is not modified
  4074. * concurrently with the empty check.
  4075. */
  4076. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  4077. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  4078. peer_id = peer->peer_ids[0];
  4079. vdev_id = vdev->vdev_id;
  4080. /*
  4081. * Make sure that the reference to the peer in
  4082. * peer object map is removed
  4083. */
  4084. if (peer_id != HTT_INVALID_PEER)
  4085. soc->peer_id_to_obj_map[peer_id] = NULL;
  4086. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4087. "Deleting peer %pK (%pM)", peer, peer->mac_addr.raw);
  4088. /* remove the reference to the peer from the hash table */
  4089. dp_peer_find_hash_remove(soc, peer);
  4090. qdf_spin_lock_bh(&soc->ast_lock);
  4091. if (peer->self_ast_entry) {
  4092. dp_peer_del_ast(soc, peer->self_ast_entry);
  4093. peer->self_ast_entry = NULL;
  4094. }
  4095. qdf_spin_unlock_bh(&soc->ast_lock);
  4096. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  4097. if (tmppeer == peer) {
  4098. found = 1;
  4099. break;
  4100. }
  4101. }
  4102. if (found) {
  4103. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  4104. peer_list_elem);
  4105. } else {
  4106. /*Ignoring the remove operation as peer not found*/
  4107. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4108. "peer:%pK not found in vdev:%pK peerlist:%pK",
  4109. peer, vdev, &peer->vdev->peer_list);
  4110. }
  4111. /* cleanup the peer data */
  4112. dp_peer_cleanup(vdev, peer);
  4113. /* check whether the parent vdev has no peers left */
  4114. if (TAILQ_EMPTY(&vdev->peer_list)) {
  4115. /*
  4116. * Now that there are no references to the peer, we can
  4117. * release the peer reference lock.
  4118. */
  4119. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4120. /*
  4121. * Check if the parent vdev was waiting for its peers
  4122. * to be deleted, in order for it to be deleted too.
  4123. */
  4124. dp_delete_pending_vdev(pdev, vdev_id);
  4125. } else {
  4126. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4127. }
  4128. dp_reset_and_release_peer_mem(soc, pdev, peer, vdev_id);
  4129. } else {
  4130. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4131. }
  4132. }
  4133. /*
  4134. * dp_peer_detach_wifi3() – Detach txrx peer
  4135. * @peer_handle: Datapath peer handle
  4136. * @bitmap: bitmap indicating special handling of request.
  4137. *
  4138. */
  4139. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap)
  4140. {
  4141. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4142. /* redirect the peer's rx delivery function to point to a
  4143. * discard func
  4144. */
  4145. peer->rx_opt_proc = dp_rx_discard;
  4146. peer->ctrl_peer = NULL;
  4147. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4148. FL("peer %pK (%pM)"), peer, peer->mac_addr.raw);
  4149. dp_local_peer_id_free(peer->vdev->pdev, peer);
  4150. qdf_spinlock_destroy(&peer->peer_info_lock);
  4151. /*
  4152. * Remove the reference added during peer_attach.
  4153. * The peer will still be left allocated until the
  4154. * PEER_UNMAP message arrives to remove the other
  4155. * reference, added by the PEER_MAP message.
  4156. */
  4157. dp_peer_unref_delete(peer_handle);
  4158. }
  4159. /*
  4160. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  4161. * @peer_handle: Datapath peer handle
  4162. *
  4163. */
  4164. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  4165. {
  4166. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  4167. return vdev->mac_addr.raw;
  4168. }
  4169. /*
  4170. * dp_vdev_set_wds() - Enable per packet stats
  4171. * @vdev_handle: DP VDEV handle
  4172. * @val: value
  4173. *
  4174. * Return: none
  4175. */
  4176. static int dp_vdev_set_wds(void *vdev_handle, uint32_t val)
  4177. {
  4178. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4179. vdev->wds_enabled = val;
  4180. return 0;
  4181. }
  4182. /*
  4183. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  4184. * @peer_handle: Datapath peer handle
  4185. *
  4186. */
  4187. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  4188. uint8_t vdev_id)
  4189. {
  4190. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  4191. struct dp_vdev *vdev = NULL;
  4192. if (qdf_unlikely(!pdev))
  4193. return NULL;
  4194. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4195. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4196. if (vdev->vdev_id == vdev_id)
  4197. break;
  4198. }
  4199. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4200. return (struct cdp_vdev *)vdev;
  4201. }
  4202. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  4203. {
  4204. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4205. return vdev->opmode;
  4206. }
  4207. static
  4208. void dp_get_os_rx_handles_from_vdev_wifi3(struct cdp_vdev *pvdev,
  4209. ol_txrx_rx_fp *stack_fn_p,
  4210. ol_osif_vdev_handle *osif_vdev_p)
  4211. {
  4212. struct dp_vdev *vdev = dp_get_dp_vdev_from_cdp_vdev(pvdev);
  4213. qdf_assert(vdev);
  4214. *stack_fn_p = vdev->osif_rx_stack;
  4215. *osif_vdev_p = vdev->osif_vdev;
  4216. }
  4217. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  4218. {
  4219. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  4220. struct dp_pdev *pdev = vdev->pdev;
  4221. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  4222. }
  4223. /**
  4224. * dp_reset_monitor_mode() - Disable monitor mode
  4225. * @pdev_handle: Datapath PDEV handle
  4226. *
  4227. * Return: 0 on success, not 0 on failure
  4228. */
  4229. static int dp_reset_monitor_mode(struct cdp_pdev *pdev_handle)
  4230. {
  4231. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4232. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  4233. struct dp_soc *soc = pdev->soc;
  4234. uint8_t pdev_id;
  4235. int mac_id;
  4236. pdev_id = pdev->pdev_id;
  4237. soc = pdev->soc;
  4238. qdf_spin_lock_bh(&pdev->mon_lock);
  4239. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4240. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4241. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  4242. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4243. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  4244. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  4245. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4246. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4247. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  4248. }
  4249. pdev->monitor_vdev = NULL;
  4250. qdf_spin_unlock_bh(&pdev->mon_lock);
  4251. return 0;
  4252. }
  4253. /**
  4254. * dp_set_nac() - set peer_nac
  4255. * @peer_handle: Datapath PEER handle
  4256. *
  4257. * Return: void
  4258. */
  4259. static void dp_set_nac(struct cdp_peer *peer_handle)
  4260. {
  4261. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4262. peer->nac = 1;
  4263. }
  4264. /**
  4265. * dp_get_tx_pending() - read pending tx
  4266. * @pdev_handle: Datapath PDEV handle
  4267. *
  4268. * Return: outstanding tx
  4269. */
  4270. static int dp_get_tx_pending(struct cdp_pdev *pdev_handle)
  4271. {
  4272. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4273. return qdf_atomic_read(&pdev->num_tx_outstanding);
  4274. }
  4275. /**
  4276. * dp_get_peer_mac_from_peer_id() - get peer mac
  4277. * @pdev_handle: Datapath PDEV handle
  4278. * @peer_id: Peer ID
  4279. * @peer_mac: MAC addr of PEER
  4280. *
  4281. * Return: void
  4282. */
  4283. static void dp_get_peer_mac_from_peer_id(struct cdp_pdev *pdev_handle,
  4284. uint32_t peer_id, uint8_t *peer_mac)
  4285. {
  4286. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4287. struct dp_peer *peer;
  4288. if (pdev && peer_mac) {
  4289. peer = dp_peer_find_by_id(pdev->soc, (uint16_t)peer_id);
  4290. if (peer && peer->mac_addr.raw) {
  4291. qdf_mem_copy(peer_mac, peer->mac_addr.raw,
  4292. DP_MAC_ADDR_LEN);
  4293. }
  4294. }
  4295. }
  4296. /**
  4297. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  4298. * @vdev_handle: Datapath VDEV handle
  4299. * @smart_monitor: Flag to denote if its smart monitor mode
  4300. *
  4301. * Return: 0 on success, not 0 on failure
  4302. */
  4303. static int dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle,
  4304. uint8_t smart_monitor)
  4305. {
  4306. /* Many monitor VAPs can exists in a system but only one can be up at
  4307. * anytime
  4308. */
  4309. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4310. struct dp_pdev *pdev;
  4311. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  4312. struct dp_soc *soc;
  4313. uint8_t pdev_id;
  4314. int mac_id;
  4315. qdf_assert(vdev);
  4316. pdev = vdev->pdev;
  4317. pdev_id = pdev->pdev_id;
  4318. soc = pdev->soc;
  4319. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  4320. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK",
  4321. pdev, pdev_id, soc, vdev);
  4322. /*Check if current pdev's monitor_vdev exists */
  4323. if (pdev->monitor_vdev) {
  4324. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4325. "vdev=%pK", vdev);
  4326. qdf_assert(vdev);
  4327. }
  4328. pdev->monitor_vdev = vdev;
  4329. /* If smart monitor mode, do not configure monitor ring */
  4330. if (smart_monitor)
  4331. return QDF_STATUS_SUCCESS;
  4332. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  4333. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]",
  4334. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  4335. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  4336. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  4337. pdev->mo_data_filter);
  4338. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4339. htt_tlv_filter.mpdu_start = 1;
  4340. htt_tlv_filter.msdu_start = 1;
  4341. htt_tlv_filter.packet = 1;
  4342. htt_tlv_filter.msdu_end = 1;
  4343. htt_tlv_filter.mpdu_end = 1;
  4344. htt_tlv_filter.packet_header = 1;
  4345. htt_tlv_filter.attention = 1;
  4346. htt_tlv_filter.ppdu_start = 0;
  4347. htt_tlv_filter.ppdu_end = 0;
  4348. htt_tlv_filter.ppdu_end_user_stats = 0;
  4349. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  4350. htt_tlv_filter.ppdu_end_status_done = 0;
  4351. htt_tlv_filter.header_per_msdu = 1;
  4352. htt_tlv_filter.enable_fp =
  4353. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  4354. htt_tlv_filter.enable_md = 0;
  4355. htt_tlv_filter.enable_mo =
  4356. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  4357. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  4358. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  4359. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  4360. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  4361. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  4362. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  4363. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4364. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  4365. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4366. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  4367. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  4368. }
  4369. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4370. htt_tlv_filter.mpdu_start = 1;
  4371. htt_tlv_filter.msdu_start = 0;
  4372. htt_tlv_filter.packet = 0;
  4373. htt_tlv_filter.msdu_end = 0;
  4374. htt_tlv_filter.mpdu_end = 0;
  4375. htt_tlv_filter.attention = 0;
  4376. htt_tlv_filter.ppdu_start = 1;
  4377. htt_tlv_filter.ppdu_end = 1;
  4378. htt_tlv_filter.ppdu_end_user_stats = 1;
  4379. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  4380. htt_tlv_filter.ppdu_end_status_done = 1;
  4381. htt_tlv_filter.enable_fp = 1;
  4382. htt_tlv_filter.enable_md = 0;
  4383. htt_tlv_filter.enable_mo = 1;
  4384. if (pdev->mcopy_mode) {
  4385. htt_tlv_filter.packet_header = 1;
  4386. }
  4387. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  4388. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  4389. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  4390. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  4391. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  4392. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  4393. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4394. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  4395. pdev->pdev_id);
  4396. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4397. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4398. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  4399. }
  4400. return QDF_STATUS_SUCCESS;
  4401. }
  4402. /**
  4403. * dp_pdev_set_advance_monitor_filter() - Set DP PDEV monitor filter
  4404. * @pdev_handle: Datapath PDEV handle
  4405. * @filter_val: Flag to select Filter for monitor mode
  4406. * Return: 0 on success, not 0 on failure
  4407. */
  4408. static int dp_pdev_set_advance_monitor_filter(struct cdp_pdev *pdev_handle,
  4409. struct cdp_monitor_filter *filter_val)
  4410. {
  4411. /* Many monitor VAPs can exists in a system but only one can be up at
  4412. * anytime
  4413. */
  4414. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4415. struct dp_vdev *vdev = pdev->monitor_vdev;
  4416. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  4417. struct dp_soc *soc;
  4418. uint8_t pdev_id;
  4419. int mac_id;
  4420. pdev_id = pdev->pdev_id;
  4421. soc = pdev->soc;
  4422. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  4423. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK",
  4424. pdev, pdev_id, soc, vdev);
  4425. /*Check if current pdev's monitor_vdev exists */
  4426. if (!pdev->monitor_vdev) {
  4427. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4428. "vdev=%pK", vdev);
  4429. qdf_assert(vdev);
  4430. }
  4431. /* update filter mode, type in pdev structure */
  4432. pdev->mon_filter_mode = filter_val->mode;
  4433. pdev->fp_mgmt_filter = filter_val->fp_mgmt;
  4434. pdev->fp_ctrl_filter = filter_val->fp_ctrl;
  4435. pdev->fp_data_filter = filter_val->fp_data;
  4436. pdev->mo_mgmt_filter = filter_val->mo_mgmt;
  4437. pdev->mo_ctrl_filter = filter_val->mo_ctrl;
  4438. pdev->mo_data_filter = filter_val->mo_data;
  4439. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  4440. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]",
  4441. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  4442. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  4443. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  4444. pdev->mo_data_filter);
  4445. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4446. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4447. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  4448. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4449. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  4450. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  4451. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4452. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4453. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  4454. }
  4455. htt_tlv_filter.mpdu_start = 1;
  4456. htt_tlv_filter.msdu_start = 1;
  4457. htt_tlv_filter.packet = 1;
  4458. htt_tlv_filter.msdu_end = 1;
  4459. htt_tlv_filter.mpdu_end = 1;
  4460. htt_tlv_filter.packet_header = 1;
  4461. htt_tlv_filter.attention = 1;
  4462. htt_tlv_filter.ppdu_start = 0;
  4463. htt_tlv_filter.ppdu_end = 0;
  4464. htt_tlv_filter.ppdu_end_user_stats = 0;
  4465. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  4466. htt_tlv_filter.ppdu_end_status_done = 0;
  4467. htt_tlv_filter.header_per_msdu = 1;
  4468. htt_tlv_filter.enable_fp =
  4469. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  4470. htt_tlv_filter.enable_md = 0;
  4471. htt_tlv_filter.enable_mo =
  4472. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  4473. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  4474. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  4475. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  4476. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  4477. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  4478. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  4479. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4480. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  4481. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4482. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  4483. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  4484. }
  4485. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4486. htt_tlv_filter.mpdu_start = 1;
  4487. htt_tlv_filter.msdu_start = 0;
  4488. htt_tlv_filter.packet = 0;
  4489. htt_tlv_filter.msdu_end = 0;
  4490. htt_tlv_filter.mpdu_end = 0;
  4491. htt_tlv_filter.attention = 0;
  4492. htt_tlv_filter.ppdu_start = 1;
  4493. htt_tlv_filter.ppdu_end = 1;
  4494. htt_tlv_filter.ppdu_end_user_stats = 1;
  4495. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  4496. htt_tlv_filter.ppdu_end_status_done = 1;
  4497. htt_tlv_filter.enable_fp = 1;
  4498. htt_tlv_filter.enable_md = 0;
  4499. htt_tlv_filter.enable_mo = 1;
  4500. if (pdev->mcopy_mode) {
  4501. htt_tlv_filter.packet_header = 1;
  4502. }
  4503. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  4504. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  4505. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  4506. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  4507. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  4508. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  4509. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4510. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  4511. pdev->pdev_id);
  4512. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4513. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4514. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  4515. }
  4516. return QDF_STATUS_SUCCESS;
  4517. }
  4518. /**
  4519. * dp_get_pdev_id_frm_pdev() - get pdev_id
  4520. * @pdev_handle: Datapath PDEV handle
  4521. *
  4522. * Return: pdev_id
  4523. */
  4524. static
  4525. uint8_t dp_get_pdev_id_frm_pdev(struct cdp_pdev *pdev_handle)
  4526. {
  4527. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4528. return pdev->pdev_id;
  4529. }
  4530. /**
  4531. * dp_pdev_set_chan_noise_floor() - set channel noise floor
  4532. * @pdev_handle: Datapath PDEV handle
  4533. * @chan_noise_floor: Channel Noise Floor
  4534. *
  4535. * Return: void
  4536. */
  4537. static
  4538. void dp_pdev_set_chan_noise_floor(struct cdp_pdev *pdev_handle,
  4539. int16_t chan_noise_floor)
  4540. {
  4541. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4542. pdev->chan_noise_floor = chan_noise_floor;
  4543. }
  4544. /**
  4545. * dp_vdev_get_filter_ucast_data() - get DP VDEV monitor ucast filter
  4546. * @vdev_handle: Datapath VDEV handle
  4547. * Return: true on ucast filter flag set
  4548. */
  4549. static bool dp_vdev_get_filter_ucast_data(struct cdp_vdev *vdev_handle)
  4550. {
  4551. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4552. struct dp_pdev *pdev;
  4553. pdev = vdev->pdev;
  4554. if ((pdev->fp_data_filter & FILTER_DATA_UCAST) ||
  4555. (pdev->mo_data_filter & FILTER_DATA_UCAST))
  4556. return true;
  4557. return false;
  4558. }
  4559. /**
  4560. * dp_vdev_get_filter_mcast_data() - get DP VDEV monitor mcast filter
  4561. * @vdev_handle: Datapath VDEV handle
  4562. * Return: true on mcast filter flag set
  4563. */
  4564. static bool dp_vdev_get_filter_mcast_data(struct cdp_vdev *vdev_handle)
  4565. {
  4566. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4567. struct dp_pdev *pdev;
  4568. pdev = vdev->pdev;
  4569. if ((pdev->fp_data_filter & FILTER_DATA_MCAST) ||
  4570. (pdev->mo_data_filter & FILTER_DATA_MCAST))
  4571. return true;
  4572. return false;
  4573. }
  4574. /**
  4575. * dp_vdev_get_filter_non_data() - get DP VDEV monitor non_data filter
  4576. * @vdev_handle: Datapath VDEV handle
  4577. * Return: true on non data filter flag set
  4578. */
  4579. static bool dp_vdev_get_filter_non_data(struct cdp_vdev *vdev_handle)
  4580. {
  4581. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4582. struct dp_pdev *pdev;
  4583. pdev = vdev->pdev;
  4584. if ((pdev->fp_mgmt_filter & FILTER_MGMT_ALL) ||
  4585. (pdev->mo_mgmt_filter & FILTER_MGMT_ALL)) {
  4586. if ((pdev->fp_ctrl_filter & FILTER_CTRL_ALL) ||
  4587. (pdev->mo_ctrl_filter & FILTER_CTRL_ALL)) {
  4588. return true;
  4589. }
  4590. }
  4591. return false;
  4592. }
  4593. #ifdef MESH_MODE_SUPPORT
  4594. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  4595. {
  4596. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  4597. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4598. FL("val %d"), val);
  4599. vdev->mesh_vdev = val;
  4600. }
  4601. /*
  4602. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  4603. * @vdev_hdl: virtual device object
  4604. * @val: value to be set
  4605. *
  4606. * Return: void
  4607. */
  4608. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  4609. {
  4610. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  4611. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4612. FL("val %d"), val);
  4613. vdev->mesh_rx_filter = val;
  4614. }
  4615. #endif
  4616. /*
  4617. * dp_aggregate_pdev_ctrl_frames_stats()- function to agreegate peer stats
  4618. * Current scope is bar received count
  4619. *
  4620. * @pdev_handle: DP_PDEV handle
  4621. *
  4622. * Return: void
  4623. */
  4624. #define STATS_PROC_TIMEOUT (HZ/1000)
  4625. static void
  4626. dp_aggregate_pdev_ctrl_frames_stats(struct dp_pdev *pdev)
  4627. {
  4628. struct dp_vdev *vdev;
  4629. struct dp_peer *peer;
  4630. uint32_t waitcnt;
  4631. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4632. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  4633. if (!peer) {
  4634. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4635. FL("DP Invalid Peer refernce"));
  4636. return;
  4637. }
  4638. if (peer->delete_in_progress) {
  4639. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4640. FL("DP Peer deletion in progress"));
  4641. continue;
  4642. }
  4643. qdf_atomic_inc(&peer->ref_cnt);
  4644. waitcnt = 0;
  4645. dp_peer_rxtid_stats(peer, dp_rx_bar_stats_cb, pdev);
  4646. while (!(qdf_atomic_read(&(pdev->stats_cmd_complete)))
  4647. && waitcnt < 10) {
  4648. schedule_timeout_interruptible(
  4649. STATS_PROC_TIMEOUT);
  4650. waitcnt++;
  4651. }
  4652. qdf_atomic_set(&(pdev->stats_cmd_complete), 0);
  4653. dp_peer_unref_delete(peer);
  4654. }
  4655. }
  4656. }
  4657. /**
  4658. * dp_rx_bar_stats_cb(): BAR received stats callback
  4659. * @soc: SOC handle
  4660. * @cb_ctxt: Call back context
  4661. * @reo_status: Reo status
  4662. *
  4663. * return: void
  4664. */
  4665. void dp_rx_bar_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  4666. union hal_reo_status *reo_status)
  4667. {
  4668. struct dp_pdev *pdev = (struct dp_pdev *)cb_ctxt;
  4669. struct hal_reo_queue_status *queue_status = &(reo_status->queue_status);
  4670. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  4671. DP_TRACE_STATS(FATAL, "REO stats failure %d \n",
  4672. queue_status->header.status);
  4673. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  4674. return;
  4675. }
  4676. pdev->stats.rx.bar_recv_cnt += queue_status->bar_rcvd_cnt;
  4677. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  4678. }
  4679. /**
  4680. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  4681. * @vdev: DP VDEV handle
  4682. *
  4683. * return: void
  4684. */
  4685. void dp_aggregate_vdev_stats(struct dp_vdev *vdev,
  4686. struct cdp_vdev_stats *vdev_stats)
  4687. {
  4688. struct dp_peer *peer = NULL;
  4689. struct dp_soc *soc = vdev->pdev->soc;
  4690. qdf_mem_copy(vdev_stats, &vdev->stats, sizeof(vdev->stats));
  4691. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem)
  4692. dp_update_vdev_stats(vdev_stats, peer);
  4693. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4694. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->ctrl_pdev,
  4695. &vdev->stats, (uint16_t) vdev->vdev_id,
  4696. UPDATE_VDEV_STATS);
  4697. }
  4698. /**
  4699. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  4700. * @pdev: DP PDEV handle
  4701. *
  4702. * return: void
  4703. */
  4704. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  4705. {
  4706. struct dp_vdev *vdev = NULL;
  4707. struct dp_soc *soc = pdev->soc;
  4708. struct cdp_vdev_stats *vdev_stats =
  4709. qdf_mem_malloc(sizeof(struct cdp_vdev_stats));
  4710. if (!vdev_stats) {
  4711. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4712. "DP alloc failure - unable to get alloc vdev stats");
  4713. return;
  4714. }
  4715. qdf_mem_set(&(pdev->stats.tx), sizeof(pdev->stats.tx), 0x0);
  4716. qdf_mem_set(&(pdev->stats.rx), sizeof(pdev->stats.rx), 0x0);
  4717. qdf_mem_set(&(pdev->stats.tx_i), sizeof(pdev->stats.tx_i), 0x0);
  4718. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4719. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4720. dp_aggregate_vdev_stats(vdev, vdev_stats);
  4721. dp_update_pdev_stats(pdev, vdev_stats);
  4722. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.nawds_mcast);
  4723. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.rcvd);
  4724. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.processed);
  4725. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.reinject_pkts);
  4726. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.inspect_pkts);
  4727. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.raw.raw_pkt);
  4728. DP_STATS_AGGR(pdev, vdev, tx_i.raw.dma_map_error);
  4729. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.tso.tso_pkt);
  4730. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_host.num);
  4731. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_target);
  4732. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_host.num);
  4733. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_target);
  4734. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.sg.sg_pkt);
  4735. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.mcast_en.mcast_pkt);
  4736. DP_STATS_AGGR(pdev, vdev,
  4737. tx_i.mcast_en.dropped_map_error);
  4738. DP_STATS_AGGR(pdev, vdev,
  4739. tx_i.mcast_en.dropped_self_mac);
  4740. DP_STATS_AGGR(pdev, vdev,
  4741. tx_i.mcast_en.dropped_send_fail);
  4742. DP_STATS_AGGR(pdev, vdev, tx_i.mcast_en.ucast);
  4743. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.dma_error);
  4744. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.ring_full);
  4745. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.enqueue_fail);
  4746. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.desc_na.num);
  4747. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.res_full);
  4748. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified);
  4749. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified_raw);
  4750. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.exception_fw);
  4751. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.completion_fw);
  4752. pdev->stats.tx_i.dropped.dropped_pkt.num =
  4753. pdev->stats.tx_i.dropped.dma_error +
  4754. pdev->stats.tx_i.dropped.ring_full +
  4755. pdev->stats.tx_i.dropped.enqueue_fail +
  4756. pdev->stats.tx_i.dropped.desc_na.num +
  4757. pdev->stats.tx_i.dropped.res_full;
  4758. pdev->stats.tx.last_ack_rssi =
  4759. vdev->stats.tx.last_ack_rssi;
  4760. pdev->stats.tx_i.tso.num_seg =
  4761. vdev->stats.tx_i.tso.num_seg;
  4762. }
  4763. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4764. qdf_mem_free(vdev_stats);
  4765. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4766. soc->cdp_soc.ol_ops->update_dp_stats(pdev->ctrl_pdev,
  4767. &pdev->stats, pdev->pdev_id, UPDATE_PDEV_STATS);
  4768. }
  4769. /**
  4770. * dp_vdev_getstats() - get vdev packet level stats
  4771. * @vdev_handle: Datapath VDEV handle
  4772. * @stats: cdp network device stats structure
  4773. *
  4774. * Return: void
  4775. */
  4776. static void dp_vdev_getstats(void *vdev_handle,
  4777. struct cdp_dev_stats *stats)
  4778. {
  4779. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4780. struct cdp_vdev_stats *vdev_stats =
  4781. qdf_mem_malloc(sizeof(struct cdp_vdev_stats));
  4782. if (!vdev_stats) {
  4783. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4784. "DP alloc failure - unable to get alloc vdev stats");
  4785. return;
  4786. }
  4787. dp_aggregate_vdev_stats(vdev, vdev_stats);
  4788. stats->tx_packets = vdev_stats->tx_i.rcvd.num;
  4789. stats->tx_bytes = vdev_stats->tx_i.rcvd.bytes;
  4790. stats->tx_errors = vdev_stats->tx.tx_failed +
  4791. vdev_stats->tx_i.dropped.dropped_pkt.num;
  4792. stats->tx_dropped = stats->tx_errors;
  4793. stats->rx_packets = vdev_stats->rx.unicast.num +
  4794. vdev_stats->rx.multicast.num +
  4795. vdev_stats->rx.bcast.num;
  4796. stats->rx_bytes = vdev_stats->rx.unicast.bytes +
  4797. vdev_stats->rx.multicast.bytes +
  4798. vdev_stats->rx.bcast.bytes;
  4799. }
  4800. /**
  4801. * dp_pdev_getstats() - get pdev packet level stats
  4802. * @pdev_handle: Datapath PDEV handle
  4803. * @stats: cdp network device stats structure
  4804. *
  4805. * Return: void
  4806. */
  4807. static void dp_pdev_getstats(void *pdev_handle,
  4808. struct cdp_dev_stats *stats)
  4809. {
  4810. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4811. dp_aggregate_pdev_stats(pdev);
  4812. stats->tx_packets = pdev->stats.tx_i.rcvd.num;
  4813. stats->tx_bytes = pdev->stats.tx_i.rcvd.bytes;
  4814. stats->tx_errors = pdev->stats.tx.tx_failed +
  4815. pdev->stats.tx_i.dropped.dropped_pkt.num;
  4816. stats->tx_dropped = stats->tx_errors;
  4817. stats->rx_packets = pdev->stats.rx.unicast.num +
  4818. pdev->stats.rx.multicast.num +
  4819. pdev->stats.rx.bcast.num;
  4820. stats->rx_bytes = pdev->stats.rx.unicast.bytes +
  4821. pdev->stats.rx.multicast.bytes +
  4822. pdev->stats.rx.bcast.bytes;
  4823. }
  4824. /**
  4825. * dp_get_device_stats() - get interface level packet stats
  4826. * @handle: device handle
  4827. * @stats: cdp network device stats structure
  4828. * @type: device type pdev/vdev
  4829. *
  4830. * Return: void
  4831. */
  4832. static void dp_get_device_stats(void *handle,
  4833. struct cdp_dev_stats *stats, uint8_t type)
  4834. {
  4835. switch (type) {
  4836. case UPDATE_VDEV_STATS:
  4837. dp_vdev_getstats(handle, stats);
  4838. break;
  4839. case UPDATE_PDEV_STATS:
  4840. dp_pdev_getstats(handle, stats);
  4841. break;
  4842. default:
  4843. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4844. "apstats cannot be updated for this input "
  4845. "type %d", type);
  4846. break;
  4847. }
  4848. }
  4849. /**
  4850. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  4851. * @pdev: DP_PDEV Handle
  4852. *
  4853. * Return:void
  4854. */
  4855. static inline void
  4856. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  4857. {
  4858. uint8_t index = 0;
  4859. DP_PRINT_STATS("PDEV Tx Stats:\n");
  4860. DP_PRINT_STATS("Received From Stack:");
  4861. DP_PRINT_STATS(" Packets = %d",
  4862. pdev->stats.tx_i.rcvd.num);
  4863. DP_PRINT_STATS(" Bytes = %llu",
  4864. pdev->stats.tx_i.rcvd.bytes);
  4865. DP_PRINT_STATS("Processed:");
  4866. DP_PRINT_STATS(" Packets = %d",
  4867. pdev->stats.tx_i.processed.num);
  4868. DP_PRINT_STATS(" Bytes = %llu",
  4869. pdev->stats.tx_i.processed.bytes);
  4870. DP_PRINT_STATS("Total Completions:");
  4871. DP_PRINT_STATS(" Packets = %u",
  4872. pdev->stats.tx.comp_pkt.num);
  4873. DP_PRINT_STATS(" Bytes = %llu",
  4874. pdev->stats.tx.comp_pkt.bytes);
  4875. DP_PRINT_STATS("Successful Completions:");
  4876. DP_PRINT_STATS(" Packets = %u",
  4877. pdev->stats.tx.tx_success.num);
  4878. DP_PRINT_STATS(" Bytes = %llu",
  4879. pdev->stats.tx.tx_success.bytes);
  4880. DP_PRINT_STATS("Dropped:");
  4881. DP_PRINT_STATS(" Total = %d",
  4882. pdev->stats.tx_i.dropped.dropped_pkt.num);
  4883. DP_PRINT_STATS(" Dma_map_error = %d",
  4884. pdev->stats.tx_i.dropped.dma_error);
  4885. DP_PRINT_STATS(" Ring Full = %d",
  4886. pdev->stats.tx_i.dropped.ring_full);
  4887. DP_PRINT_STATS(" Descriptor Not available = %d",
  4888. pdev->stats.tx_i.dropped.desc_na.num);
  4889. DP_PRINT_STATS(" HW enqueue failed= %d",
  4890. pdev->stats.tx_i.dropped.enqueue_fail);
  4891. DP_PRINT_STATS(" Resources Full = %d",
  4892. pdev->stats.tx_i.dropped.res_full);
  4893. DP_PRINT_STATS(" FW removed = %d",
  4894. pdev->stats.tx.dropped.fw_rem);
  4895. DP_PRINT_STATS(" FW removed transmitted = %d",
  4896. pdev->stats.tx.dropped.fw_rem_tx);
  4897. DP_PRINT_STATS(" FW removed untransmitted = %d",
  4898. pdev->stats.tx.dropped.fw_rem_notx);
  4899. DP_PRINT_STATS(" FW removed untransmitted fw_reason1 = %d",
  4900. pdev->stats.tx.dropped.fw_reason1);
  4901. DP_PRINT_STATS(" FW removed untransmitted fw_reason2 = %d",
  4902. pdev->stats.tx.dropped.fw_reason2);
  4903. DP_PRINT_STATS(" FW removed untransmitted fw_reason3 = %d",
  4904. pdev->stats.tx.dropped.fw_reason3);
  4905. DP_PRINT_STATS(" Aged Out from msdu/mpdu queues = %d",
  4906. pdev->stats.tx.dropped.age_out);
  4907. DP_PRINT_STATS(" Multicast:");
  4908. DP_PRINT_STATS(" Packets: %u",
  4909. pdev->stats.tx.mcast.num);
  4910. DP_PRINT_STATS(" Bytes: %llu",
  4911. pdev->stats.tx.mcast.bytes);
  4912. DP_PRINT_STATS("Scatter Gather:");
  4913. DP_PRINT_STATS(" Packets = %d",
  4914. pdev->stats.tx_i.sg.sg_pkt.num);
  4915. DP_PRINT_STATS(" Bytes = %llu",
  4916. pdev->stats.tx_i.sg.sg_pkt.bytes);
  4917. DP_PRINT_STATS(" Dropped By Host = %d",
  4918. pdev->stats.tx_i.sg.dropped_host.num);
  4919. DP_PRINT_STATS(" Dropped By Target = %d",
  4920. pdev->stats.tx_i.sg.dropped_target);
  4921. DP_PRINT_STATS("TSO:");
  4922. DP_PRINT_STATS(" Number of Segments = %d",
  4923. pdev->stats.tx_i.tso.num_seg);
  4924. DP_PRINT_STATS(" Packets = %d",
  4925. pdev->stats.tx_i.tso.tso_pkt.num);
  4926. DP_PRINT_STATS(" Bytes = %llu",
  4927. pdev->stats.tx_i.tso.tso_pkt.bytes);
  4928. DP_PRINT_STATS(" Dropped By Host = %d",
  4929. pdev->stats.tx_i.tso.dropped_host.num);
  4930. DP_PRINT_STATS("Mcast Enhancement:");
  4931. DP_PRINT_STATS(" Packets = %d",
  4932. pdev->stats.tx_i.mcast_en.mcast_pkt.num);
  4933. DP_PRINT_STATS(" Bytes = %llu",
  4934. pdev->stats.tx_i.mcast_en.mcast_pkt.bytes);
  4935. DP_PRINT_STATS(" Dropped: Map Errors = %d",
  4936. pdev->stats.tx_i.mcast_en.dropped_map_error);
  4937. DP_PRINT_STATS(" Dropped: Self Mac = %d",
  4938. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  4939. DP_PRINT_STATS(" Dropped: Send Fail = %d",
  4940. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  4941. DP_PRINT_STATS(" Unicast sent = %d",
  4942. pdev->stats.tx_i.mcast_en.ucast);
  4943. DP_PRINT_STATS("Raw:");
  4944. DP_PRINT_STATS(" Packets = %d",
  4945. pdev->stats.tx_i.raw.raw_pkt.num);
  4946. DP_PRINT_STATS(" Bytes = %llu",
  4947. pdev->stats.tx_i.raw.raw_pkt.bytes);
  4948. DP_PRINT_STATS(" DMA map error = %d",
  4949. pdev->stats.tx_i.raw.dma_map_error);
  4950. DP_PRINT_STATS("Reinjected:");
  4951. DP_PRINT_STATS(" Packets = %d",
  4952. pdev->stats.tx_i.reinject_pkts.num);
  4953. DP_PRINT_STATS(" Bytes = %llu\n",
  4954. pdev->stats.tx_i.reinject_pkts.bytes);
  4955. DP_PRINT_STATS("Inspected:");
  4956. DP_PRINT_STATS(" Packets = %d",
  4957. pdev->stats.tx_i.inspect_pkts.num);
  4958. DP_PRINT_STATS(" Bytes = %llu",
  4959. pdev->stats.tx_i.inspect_pkts.bytes);
  4960. DP_PRINT_STATS("Nawds Multicast:");
  4961. DP_PRINT_STATS(" Packets = %d",
  4962. pdev->stats.tx_i.nawds_mcast.num);
  4963. DP_PRINT_STATS(" Bytes = %llu",
  4964. pdev->stats.tx_i.nawds_mcast.bytes);
  4965. DP_PRINT_STATS("CCE Classified:");
  4966. DP_PRINT_STATS(" CCE Classified Packets: %u",
  4967. pdev->stats.tx_i.cce_classified);
  4968. DP_PRINT_STATS(" RAW CCE Classified Packets: %u",
  4969. pdev->stats.tx_i.cce_classified_raw);
  4970. DP_PRINT_STATS("Mesh stats:");
  4971. DP_PRINT_STATS(" frames to firmware: %u",
  4972. pdev->stats.tx_i.mesh.exception_fw);
  4973. DP_PRINT_STATS(" completions from fw: %u",
  4974. pdev->stats.tx_i.mesh.completion_fw);
  4975. DP_PRINT_STATS("PPDU stats counter");
  4976. for (index = 0; index < CDP_PPDU_STATS_MAX_TAG; index++) {
  4977. DP_PRINT_STATS(" Tag[%d] = %llu", index,
  4978. pdev->stats.ppdu_stats_counter[index]);
  4979. }
  4980. }
  4981. /**
  4982. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  4983. * @pdev: DP_PDEV Handle
  4984. *
  4985. * Return: void
  4986. */
  4987. static inline void
  4988. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  4989. {
  4990. DP_PRINT_STATS("PDEV Rx Stats:\n");
  4991. DP_PRINT_STATS("Received From HW (Per Rx Ring):");
  4992. DP_PRINT_STATS(" Packets = %d %d %d %d",
  4993. pdev->stats.rx.rcvd_reo[0].num,
  4994. pdev->stats.rx.rcvd_reo[1].num,
  4995. pdev->stats.rx.rcvd_reo[2].num,
  4996. pdev->stats.rx.rcvd_reo[3].num);
  4997. DP_PRINT_STATS(" Bytes = %llu %llu %llu %llu",
  4998. pdev->stats.rx.rcvd_reo[0].bytes,
  4999. pdev->stats.rx.rcvd_reo[1].bytes,
  5000. pdev->stats.rx.rcvd_reo[2].bytes,
  5001. pdev->stats.rx.rcvd_reo[3].bytes);
  5002. DP_PRINT_STATS("Replenished:");
  5003. DP_PRINT_STATS(" Packets = %d",
  5004. pdev->stats.replenish.pkts.num);
  5005. DP_PRINT_STATS(" Bytes = %llu",
  5006. pdev->stats.replenish.pkts.bytes);
  5007. DP_PRINT_STATS(" Buffers Added To Freelist = %d",
  5008. pdev->stats.buf_freelist);
  5009. DP_PRINT_STATS(" Low threshold intr = %d",
  5010. pdev->stats.replenish.low_thresh_intrs);
  5011. DP_PRINT_STATS("Dropped:");
  5012. DP_PRINT_STATS(" msdu_not_done = %d",
  5013. pdev->stats.dropped.msdu_not_done);
  5014. DP_PRINT_STATS(" mon_rx_drop = %d",
  5015. pdev->stats.dropped.mon_rx_drop);
  5016. DP_PRINT_STATS("Sent To Stack:");
  5017. DP_PRINT_STATS(" Packets = %d",
  5018. pdev->stats.rx.to_stack.num);
  5019. DP_PRINT_STATS(" Bytes = %llu",
  5020. pdev->stats.rx.to_stack.bytes);
  5021. DP_PRINT_STATS("Multicast/Broadcast:");
  5022. DP_PRINT_STATS(" Packets = %d",
  5023. (pdev->stats.rx.multicast.num +
  5024. pdev->stats.rx.bcast.num));
  5025. DP_PRINT_STATS(" Bytes = %llu",
  5026. (pdev->stats.rx.multicast.bytes +
  5027. pdev->stats.rx.bcast.bytes));
  5028. DP_PRINT_STATS("Errors:");
  5029. DP_PRINT_STATS(" Rxdma Ring Un-inititalized = %d",
  5030. pdev->stats.replenish.rxdma_err);
  5031. DP_PRINT_STATS(" Desc Alloc Failed: = %d",
  5032. pdev->stats.err.desc_alloc_fail);
  5033. DP_PRINT_STATS(" IP checksum error = %d",
  5034. pdev->stats.err.ip_csum_err);
  5035. DP_PRINT_STATS(" TCP/UDP checksum error = %d",
  5036. pdev->stats.err.tcp_udp_csum_err);
  5037. /* Get bar_recv_cnt */
  5038. dp_aggregate_pdev_ctrl_frames_stats(pdev);
  5039. DP_PRINT_STATS("BAR Received Count: = %d",
  5040. pdev->stats.rx.bar_recv_cnt);
  5041. }
  5042. /**
  5043. * dp_print_pdev_rx_mon_stats(): Print Pdev level RX monitor stats
  5044. * @pdev: DP_PDEV Handle
  5045. *
  5046. * Return: void
  5047. */
  5048. static inline void
  5049. dp_print_pdev_rx_mon_stats(struct dp_pdev *pdev)
  5050. {
  5051. struct cdp_pdev_mon_stats *rx_mon_stats;
  5052. rx_mon_stats = &pdev->rx_mon_stats;
  5053. DP_PRINT_STATS("PDEV Rx Monitor Stats:\n");
  5054. dp_rx_mon_print_dbg_ppdu_stats(rx_mon_stats);
  5055. DP_PRINT_STATS("status_ppdu_done_cnt = %d",
  5056. rx_mon_stats->status_ppdu_done);
  5057. DP_PRINT_STATS("dest_ppdu_done_cnt = %d",
  5058. rx_mon_stats->dest_ppdu_done);
  5059. DP_PRINT_STATS("dest_mpdu_done_cnt = %d",
  5060. rx_mon_stats->dest_mpdu_done);
  5061. DP_PRINT_STATS("dest_mpdu_drop_cnt = %d",
  5062. rx_mon_stats->dest_mpdu_drop);
  5063. }
  5064. /**
  5065. * dp_print_soc_tx_stats(): Print SOC level stats
  5066. * @soc DP_SOC Handle
  5067. *
  5068. * Return: void
  5069. */
  5070. static inline void
  5071. dp_print_soc_tx_stats(struct dp_soc *soc)
  5072. {
  5073. uint8_t desc_pool_id;
  5074. soc->stats.tx.desc_in_use = 0;
  5075. DP_PRINT_STATS("SOC Tx Stats:\n");
  5076. for (desc_pool_id = 0;
  5077. desc_pool_id < wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5078. desc_pool_id++)
  5079. soc->stats.tx.desc_in_use +=
  5080. soc->tx_desc[desc_pool_id].num_allocated;
  5081. DP_PRINT_STATS("Tx Descriptors In Use = %d",
  5082. soc->stats.tx.desc_in_use);
  5083. DP_PRINT_STATS("Invalid peer:");
  5084. DP_PRINT_STATS(" Packets = %d",
  5085. soc->stats.tx.tx_invalid_peer.num);
  5086. DP_PRINT_STATS(" Bytes = %llu",
  5087. soc->stats.tx.tx_invalid_peer.bytes);
  5088. DP_PRINT_STATS("Packets dropped due to TCL ring full = %d %d %d",
  5089. soc->stats.tx.tcl_ring_full[0],
  5090. soc->stats.tx.tcl_ring_full[1],
  5091. soc->stats.tx.tcl_ring_full[2]);
  5092. }
  5093. /**
  5094. * dp_print_soc_rx_stats: Print SOC level Rx stats
  5095. * @soc: DP_SOC Handle
  5096. *
  5097. * Return:void
  5098. */
  5099. static inline void
  5100. dp_print_soc_rx_stats(struct dp_soc *soc)
  5101. {
  5102. uint32_t i;
  5103. char reo_error[DP_REO_ERR_LENGTH];
  5104. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  5105. uint8_t index = 0;
  5106. DP_PRINT_STATS("SOC Rx Stats:\n");
  5107. DP_PRINT_STATS("Fragmented packets: %u",
  5108. soc->stats.rx.rx_frags);
  5109. DP_PRINT_STATS("Reo reinjected packets: %u",
  5110. soc->stats.rx.reo_reinject);
  5111. DP_PRINT_STATS("Errors:\n");
  5112. DP_PRINT_STATS("Rx Decrypt Errors = %d",
  5113. (soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_DECRYPT] +
  5114. soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_TKIP_MIC]));
  5115. DP_PRINT_STATS("Invalid RBM = %d",
  5116. soc->stats.rx.err.invalid_rbm);
  5117. DP_PRINT_STATS("Invalid Vdev = %d",
  5118. soc->stats.rx.err.invalid_vdev);
  5119. DP_PRINT_STATS("Invalid Pdev = %d",
  5120. soc->stats.rx.err.invalid_pdev);
  5121. DP_PRINT_STATS("Invalid Peer = %d",
  5122. soc->stats.rx.err.rx_invalid_peer.num);
  5123. DP_PRINT_STATS("HAL Ring Access Fail = %d",
  5124. soc->stats.rx.err.hal_ring_access_fail);
  5125. for (i = 0; i < HAL_RXDMA_ERR_MAX; i++) {
  5126. index += qdf_snprint(&rxdma_error[index],
  5127. DP_RXDMA_ERR_LENGTH - index,
  5128. " %d", soc->stats.rx.err.rxdma_error[i]);
  5129. }
  5130. DP_PRINT_STATS("RXDMA Error (0-31):%s",
  5131. rxdma_error);
  5132. index = 0;
  5133. for (i = 0; i < HAL_REO_ERR_MAX; i++) {
  5134. index += qdf_snprint(&reo_error[index],
  5135. DP_REO_ERR_LENGTH - index,
  5136. " %d", soc->stats.rx.err.reo_error[i]);
  5137. }
  5138. DP_PRINT_STATS("REO Error(0-14):%s",
  5139. reo_error);
  5140. }
  5141. /**
  5142. * dp_print_ring_stat_from_hal(): Print hal level ring stats
  5143. * @soc: DP_SOC handle
  5144. * @srng: DP_SRNG handle
  5145. * @ring_name: SRNG name
  5146. *
  5147. * Return: void
  5148. */
  5149. static inline void
  5150. dp_print_ring_stat_from_hal(struct dp_soc *soc, struct dp_srng *srng,
  5151. char *ring_name)
  5152. {
  5153. uint32_t tailp;
  5154. uint32_t headp;
  5155. if (srng->hal_srng != NULL) {
  5156. hal_api_get_tphp(soc->hal_soc, srng->hal_srng, &tailp, &headp);
  5157. DP_PRINT_STATS("%s : Head pointer = %d Tail Pointer = %d\n",
  5158. ring_name, headp, tailp);
  5159. }
  5160. }
  5161. /**
  5162. * dp_print_ring_stats(): Print tail and head pointer
  5163. * @pdev: DP_PDEV handle
  5164. *
  5165. * Return:void
  5166. */
  5167. static inline void
  5168. dp_print_ring_stats(struct dp_pdev *pdev)
  5169. {
  5170. uint32_t i;
  5171. char ring_name[STR_MAXLEN + 1];
  5172. int mac_id;
  5173. dp_print_ring_stat_from_hal(pdev->soc,
  5174. &pdev->soc->reo_exception_ring,
  5175. "Reo Exception Ring");
  5176. dp_print_ring_stat_from_hal(pdev->soc,
  5177. &pdev->soc->reo_reinject_ring,
  5178. "Reo Inject Ring");
  5179. dp_print_ring_stat_from_hal(pdev->soc,
  5180. &pdev->soc->reo_cmd_ring,
  5181. "Reo Command Ring");
  5182. dp_print_ring_stat_from_hal(pdev->soc,
  5183. &pdev->soc->reo_status_ring,
  5184. "Reo Status Ring");
  5185. dp_print_ring_stat_from_hal(pdev->soc,
  5186. &pdev->soc->rx_rel_ring,
  5187. "Rx Release ring");
  5188. dp_print_ring_stat_from_hal(pdev->soc,
  5189. &pdev->soc->tcl_cmd_ring,
  5190. "Tcl command Ring");
  5191. dp_print_ring_stat_from_hal(pdev->soc,
  5192. &pdev->soc->tcl_status_ring,
  5193. "Tcl Status Ring");
  5194. dp_print_ring_stat_from_hal(pdev->soc,
  5195. &pdev->soc->wbm_desc_rel_ring,
  5196. "Wbm Desc Rel Ring");
  5197. for (i = 0; i < MAX_REO_DEST_RINGS; i++) {
  5198. snprintf(ring_name, STR_MAXLEN, "Reo Dest Ring %d", i);
  5199. dp_print_ring_stat_from_hal(pdev->soc,
  5200. &pdev->soc->reo_dest_ring[i],
  5201. ring_name);
  5202. }
  5203. for (i = 0; i < pdev->soc->num_tcl_data_rings; i++) {
  5204. snprintf(ring_name, STR_MAXLEN, "Tcl Data Ring %d", i);
  5205. dp_print_ring_stat_from_hal(pdev->soc,
  5206. &pdev->soc->tcl_data_ring[i],
  5207. ring_name);
  5208. }
  5209. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  5210. snprintf(ring_name, STR_MAXLEN, "Tx Comp Ring %d", i);
  5211. dp_print_ring_stat_from_hal(pdev->soc,
  5212. &pdev->soc->tx_comp_ring[i],
  5213. ring_name);
  5214. }
  5215. dp_print_ring_stat_from_hal(pdev->soc,
  5216. &pdev->rx_refill_buf_ring,
  5217. "Rx Refill Buf Ring");
  5218. dp_print_ring_stat_from_hal(pdev->soc,
  5219. &pdev->rx_refill_buf_ring2,
  5220. "Second Rx Refill Buf Ring");
  5221. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5222. dp_print_ring_stat_from_hal(pdev->soc,
  5223. &pdev->rxdma_mon_buf_ring[mac_id],
  5224. "Rxdma Mon Buf Ring");
  5225. dp_print_ring_stat_from_hal(pdev->soc,
  5226. &pdev->rxdma_mon_dst_ring[mac_id],
  5227. "Rxdma Mon Dst Ring");
  5228. dp_print_ring_stat_from_hal(pdev->soc,
  5229. &pdev->rxdma_mon_status_ring[mac_id],
  5230. "Rxdma Mon Status Ring");
  5231. dp_print_ring_stat_from_hal(pdev->soc,
  5232. &pdev->rxdma_mon_desc_ring[mac_id],
  5233. "Rxdma mon desc Ring");
  5234. }
  5235. for (i = 0; i < NUM_RXDMA_RINGS_PER_PDEV; i++) {
  5236. snprintf(ring_name, STR_MAXLEN, "Rxdma err dst ring %d", i);
  5237. dp_print_ring_stat_from_hal(pdev->soc,
  5238. &pdev->rxdma_err_dst_ring[i],
  5239. ring_name);
  5240. }
  5241. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  5242. snprintf(ring_name, STR_MAXLEN, "Rx mac buf ring %d", i);
  5243. dp_print_ring_stat_from_hal(pdev->soc,
  5244. &pdev->rx_mac_buf_ring[i],
  5245. ring_name);
  5246. }
  5247. }
  5248. /**
  5249. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  5250. * @vdev: DP_VDEV handle
  5251. *
  5252. * Return:void
  5253. */
  5254. static inline void
  5255. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  5256. {
  5257. struct dp_peer *peer = NULL;
  5258. struct dp_soc *soc = (struct dp_soc *)vdev->pdev->soc;
  5259. DP_STATS_CLR(vdev->pdev);
  5260. DP_STATS_CLR(vdev->pdev->soc);
  5261. DP_STATS_CLR(vdev);
  5262. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  5263. if (!peer)
  5264. return;
  5265. DP_STATS_CLR(peer);
  5266. if (soc->cdp_soc.ol_ops->update_dp_stats) {
  5267. soc->cdp_soc.ol_ops->update_dp_stats(
  5268. vdev->pdev->ctrl_pdev,
  5269. &peer->stats,
  5270. peer->peer_ids[0],
  5271. UPDATE_PEER_STATS);
  5272. }
  5273. }
  5274. if (soc->cdp_soc.ol_ops->update_dp_stats)
  5275. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->ctrl_pdev,
  5276. &vdev->stats, (uint16_t)vdev->vdev_id,
  5277. UPDATE_VDEV_STATS);
  5278. }
  5279. /**
  5280. * dp_print_common_rates_info(): Print common rate for tx or rx
  5281. * @pkt_type_array: rate type array contains rate info
  5282. *
  5283. * Return:void
  5284. */
  5285. static inline void
  5286. dp_print_common_rates_info(struct cdp_pkt_type *pkt_type_array)
  5287. {
  5288. uint8_t mcs, pkt_type;
  5289. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  5290. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  5291. if (!dp_rate_string[pkt_type][mcs].valid)
  5292. continue;
  5293. DP_PRINT_STATS(" %s = %d",
  5294. dp_rate_string[pkt_type][mcs].mcs_type,
  5295. pkt_type_array[pkt_type].mcs_count[mcs]);
  5296. }
  5297. DP_PRINT_STATS("\n");
  5298. }
  5299. }
  5300. /**
  5301. * dp_print_rx_rates(): Print Rx rate stats
  5302. * @vdev: DP_VDEV handle
  5303. *
  5304. * Return:void
  5305. */
  5306. static inline void
  5307. dp_print_rx_rates(struct dp_vdev *vdev)
  5308. {
  5309. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  5310. uint8_t i;
  5311. uint8_t index = 0;
  5312. char nss[DP_NSS_LENGTH];
  5313. DP_PRINT_STATS("Rx Rate Info:\n");
  5314. dp_print_common_rates_info(pdev->stats.rx.pkt_type);
  5315. index = 0;
  5316. for (i = 0; i < SS_COUNT; i++) {
  5317. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  5318. " %d", pdev->stats.rx.nss[i]);
  5319. }
  5320. DP_PRINT_STATS("NSS(1-8) = %s",
  5321. nss);
  5322. DP_PRINT_STATS("SGI ="
  5323. " 0.8us %d,"
  5324. " 0.4us %d,"
  5325. " 1.6us %d,"
  5326. " 3.2us %d,",
  5327. pdev->stats.rx.sgi_count[0],
  5328. pdev->stats.rx.sgi_count[1],
  5329. pdev->stats.rx.sgi_count[2],
  5330. pdev->stats.rx.sgi_count[3]);
  5331. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  5332. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  5333. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  5334. DP_PRINT_STATS("Reception Type ="
  5335. " SU: %d,"
  5336. " MU_MIMO:%d,"
  5337. " MU_OFDMA:%d,"
  5338. " MU_OFDMA_MIMO:%d\n",
  5339. pdev->stats.rx.reception_type[0],
  5340. pdev->stats.rx.reception_type[1],
  5341. pdev->stats.rx.reception_type[2],
  5342. pdev->stats.rx.reception_type[3]);
  5343. DP_PRINT_STATS("Aggregation:\n");
  5344. DP_PRINT_STATS("Number of Msdu's Part of Ampdus = %d",
  5345. pdev->stats.rx.ampdu_cnt);
  5346. DP_PRINT_STATS("Number of Msdu's With No Mpdu Level Aggregation : %d",
  5347. pdev->stats.rx.non_ampdu_cnt);
  5348. DP_PRINT_STATS("Number of Msdu's Part of Amsdu: %d",
  5349. pdev->stats.rx.amsdu_cnt);
  5350. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation: %d",
  5351. pdev->stats.rx.non_amsdu_cnt);
  5352. }
  5353. /**
  5354. * dp_print_tx_rates(): Print tx rates
  5355. * @vdev: DP_VDEV handle
  5356. *
  5357. * Return:void
  5358. */
  5359. static inline void
  5360. dp_print_tx_rates(struct dp_vdev *vdev)
  5361. {
  5362. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  5363. uint8_t index;
  5364. char nss[DP_NSS_LENGTH];
  5365. int nss_index;
  5366. DP_PRINT_STATS("Tx Rate Info:\n");
  5367. dp_print_common_rates_info(pdev->stats.tx.pkt_type);
  5368. DP_PRINT_STATS("SGI ="
  5369. " 0.8us %d"
  5370. " 0.4us %d"
  5371. " 1.6us %d"
  5372. " 3.2us %d",
  5373. pdev->stats.tx.sgi_count[0],
  5374. pdev->stats.tx.sgi_count[1],
  5375. pdev->stats.tx.sgi_count[2],
  5376. pdev->stats.tx.sgi_count[3]);
  5377. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  5378. pdev->stats.tx.bw[0], pdev->stats.tx.bw[1],
  5379. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3]);
  5380. index = 0;
  5381. for (nss_index = 0; nss_index < SS_COUNT; nss_index++) {
  5382. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  5383. " %d", pdev->stats.tx.nss[nss_index]);
  5384. }
  5385. DP_PRINT_STATS("NSS(1-8) = %s", nss);
  5386. DP_PRINT_STATS("OFDMA = %d", pdev->stats.tx.ofdma);
  5387. DP_PRINT_STATS("STBC = %d", pdev->stats.tx.stbc);
  5388. DP_PRINT_STATS("LDPC = %d", pdev->stats.tx.ldpc);
  5389. DP_PRINT_STATS("Retries = %d", pdev->stats.tx.retries);
  5390. DP_PRINT_STATS("Last ack rssi = %d\n", pdev->stats.tx.last_ack_rssi);
  5391. DP_PRINT_STATS("Aggregation:\n");
  5392. DP_PRINT_STATS("Number of Msdu's Part of Amsdu = %d",
  5393. pdev->stats.tx.amsdu_cnt);
  5394. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation = %d",
  5395. pdev->stats.tx.non_amsdu_cnt);
  5396. }
  5397. /**
  5398. * dp_print_peer_stats():print peer stats
  5399. * @peer: DP_PEER handle
  5400. *
  5401. * return void
  5402. */
  5403. static inline void dp_print_peer_stats(struct dp_peer *peer)
  5404. {
  5405. uint8_t i;
  5406. uint32_t index;
  5407. char nss[DP_NSS_LENGTH];
  5408. DP_PRINT_STATS("Node Tx Stats:\n");
  5409. DP_PRINT_STATS("Total Packet Completions = %d",
  5410. peer->stats.tx.comp_pkt.num);
  5411. DP_PRINT_STATS("Total Bytes Completions = %llu",
  5412. peer->stats.tx.comp_pkt.bytes);
  5413. DP_PRINT_STATS("Success Packets = %d",
  5414. peer->stats.tx.tx_success.num);
  5415. DP_PRINT_STATS("Success Bytes = %llu",
  5416. peer->stats.tx.tx_success.bytes);
  5417. DP_PRINT_STATS("Unicast Success Packets = %d",
  5418. peer->stats.tx.ucast.num);
  5419. DP_PRINT_STATS("Unicast Success Bytes = %llu",
  5420. peer->stats.tx.ucast.bytes);
  5421. DP_PRINT_STATS("Multicast Success Packets = %d",
  5422. peer->stats.tx.mcast.num);
  5423. DP_PRINT_STATS("Multicast Success Bytes = %llu",
  5424. peer->stats.tx.mcast.bytes);
  5425. DP_PRINT_STATS("Broadcast Success Packets = %d",
  5426. peer->stats.tx.bcast.num);
  5427. DP_PRINT_STATS("Broadcast Success Bytes = %llu",
  5428. peer->stats.tx.bcast.bytes);
  5429. DP_PRINT_STATS("Packets Failed = %d",
  5430. peer->stats.tx.tx_failed);
  5431. DP_PRINT_STATS("Packets In OFDMA = %d",
  5432. peer->stats.tx.ofdma);
  5433. DP_PRINT_STATS("Packets In STBC = %d",
  5434. peer->stats.tx.stbc);
  5435. DP_PRINT_STATS("Packets In LDPC = %d",
  5436. peer->stats.tx.ldpc);
  5437. DP_PRINT_STATS("Packet Retries = %d",
  5438. peer->stats.tx.retries);
  5439. DP_PRINT_STATS("MSDU's Part of AMSDU = %d",
  5440. peer->stats.tx.amsdu_cnt);
  5441. DP_PRINT_STATS("Last Packet RSSI = %d",
  5442. peer->stats.tx.last_ack_rssi);
  5443. DP_PRINT_STATS("Dropped At FW: Removed = %d",
  5444. peer->stats.tx.dropped.fw_rem);
  5445. DP_PRINT_STATS("Dropped At FW: Removed transmitted = %d",
  5446. peer->stats.tx.dropped.fw_rem_tx);
  5447. DP_PRINT_STATS("Dropped At FW: Removed Untransmitted = %d",
  5448. peer->stats.tx.dropped.fw_rem_notx);
  5449. DP_PRINT_STATS("Dropped : Age Out = %d",
  5450. peer->stats.tx.dropped.age_out);
  5451. DP_PRINT_STATS("NAWDS : ");
  5452. DP_PRINT_STATS(" Nawds multicast Drop Tx Packet = %d",
  5453. peer->stats.tx.nawds_mcast_drop);
  5454. DP_PRINT_STATS(" Nawds multicast Tx Packet Count = %d",
  5455. peer->stats.tx.nawds_mcast.num);
  5456. DP_PRINT_STATS(" Nawds multicast Tx Packet Bytes = %llu",
  5457. peer->stats.tx.nawds_mcast.bytes);
  5458. DP_PRINT_STATS("Rate Info:");
  5459. dp_print_common_rates_info(peer->stats.tx.pkt_type);
  5460. DP_PRINT_STATS("SGI = "
  5461. " 0.8us %d"
  5462. " 0.4us %d"
  5463. " 1.6us %d"
  5464. " 3.2us %d",
  5465. peer->stats.tx.sgi_count[0],
  5466. peer->stats.tx.sgi_count[1],
  5467. peer->stats.tx.sgi_count[2],
  5468. peer->stats.tx.sgi_count[3]);
  5469. DP_PRINT_STATS("Excess Retries per AC ");
  5470. DP_PRINT_STATS(" Best effort = %d",
  5471. peer->stats.tx.excess_retries_per_ac[0]);
  5472. DP_PRINT_STATS(" Background= %d",
  5473. peer->stats.tx.excess_retries_per_ac[1]);
  5474. DP_PRINT_STATS(" Video = %d",
  5475. peer->stats.tx.excess_retries_per_ac[2]);
  5476. DP_PRINT_STATS(" Voice = %d",
  5477. peer->stats.tx.excess_retries_per_ac[3]);
  5478. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d\n",
  5479. peer->stats.tx.bw[2], peer->stats.tx.bw[3],
  5480. peer->stats.tx.bw[4], peer->stats.tx.bw[5]);
  5481. index = 0;
  5482. for (i = 0; i < SS_COUNT; i++) {
  5483. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  5484. " %d", peer->stats.tx.nss[i]);
  5485. }
  5486. DP_PRINT_STATS("NSS(1-8) = %s",
  5487. nss);
  5488. DP_PRINT_STATS("Aggregation:");
  5489. DP_PRINT_STATS(" Number of Msdu's Part of Amsdu = %d",
  5490. peer->stats.tx.amsdu_cnt);
  5491. DP_PRINT_STATS(" Number of Msdu's With No Msdu Level Aggregation = %d\n",
  5492. peer->stats.tx.non_amsdu_cnt);
  5493. DP_PRINT_STATS("Bytes and Packets transmitted in last one sec:");
  5494. DP_PRINT_STATS(" Bytes transmitted in last sec: %d",
  5495. peer->stats.tx.tx_byte_rate);
  5496. DP_PRINT_STATS(" Data transmitted in last sec: %d",
  5497. peer->stats.tx.tx_data_rate);
  5498. DP_PRINT_STATS("Node Rx Stats:");
  5499. DP_PRINT_STATS("Packets Sent To Stack = %d",
  5500. peer->stats.rx.to_stack.num);
  5501. DP_PRINT_STATS("Bytes Sent To Stack = %llu",
  5502. peer->stats.rx.to_stack.bytes);
  5503. for (i = 0; i < CDP_MAX_RX_RINGS; i++) {
  5504. DP_PRINT_STATS("Ring Id = %d", i);
  5505. DP_PRINT_STATS(" Packets Received = %d",
  5506. peer->stats.rx.rcvd_reo[i].num);
  5507. DP_PRINT_STATS(" Bytes Received = %llu",
  5508. peer->stats.rx.rcvd_reo[i].bytes);
  5509. }
  5510. DP_PRINT_STATS("Multicast Packets Received = %d",
  5511. peer->stats.rx.multicast.num);
  5512. DP_PRINT_STATS("Multicast Bytes Received = %llu",
  5513. peer->stats.rx.multicast.bytes);
  5514. DP_PRINT_STATS("Broadcast Packets Received = %d",
  5515. peer->stats.rx.bcast.num);
  5516. DP_PRINT_STATS("Broadcast Bytes Received = %llu",
  5517. peer->stats.rx.bcast.bytes);
  5518. DP_PRINT_STATS("Intra BSS Packets Received = %d",
  5519. peer->stats.rx.intra_bss.pkts.num);
  5520. DP_PRINT_STATS("Intra BSS Bytes Received = %llu",
  5521. peer->stats.rx.intra_bss.pkts.bytes);
  5522. DP_PRINT_STATS("Raw Packets Received = %d",
  5523. peer->stats.rx.raw.num);
  5524. DP_PRINT_STATS("Raw Bytes Received = %llu",
  5525. peer->stats.rx.raw.bytes);
  5526. DP_PRINT_STATS("Errors: MIC Errors = %d",
  5527. peer->stats.rx.err.mic_err);
  5528. DP_PRINT_STATS("Erros: Decryption Errors = %d",
  5529. peer->stats.rx.err.decrypt_err);
  5530. DP_PRINT_STATS("Msdu's Received As Part of Ampdu = %d",
  5531. peer->stats.rx.non_ampdu_cnt);
  5532. DP_PRINT_STATS("Msdu's Recived As Ampdu = %d",
  5533. peer->stats.rx.ampdu_cnt);
  5534. DP_PRINT_STATS("Msdu's Received Not Part of Amsdu's = %d",
  5535. peer->stats.rx.non_amsdu_cnt);
  5536. DP_PRINT_STATS("MSDUs Received As Part of Amsdu = %d",
  5537. peer->stats.rx.amsdu_cnt);
  5538. DP_PRINT_STATS("NAWDS : ");
  5539. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet = %d",
  5540. peer->stats.rx.nawds_mcast_drop);
  5541. DP_PRINT_STATS("SGI ="
  5542. " 0.8us %d"
  5543. " 0.4us %d"
  5544. " 1.6us %d"
  5545. " 3.2us %d",
  5546. peer->stats.rx.sgi_count[0],
  5547. peer->stats.rx.sgi_count[1],
  5548. peer->stats.rx.sgi_count[2],
  5549. peer->stats.rx.sgi_count[3]);
  5550. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d",
  5551. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  5552. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  5553. DP_PRINT_STATS("Reception Type ="
  5554. " SU %d,"
  5555. " MU_MIMO %d,"
  5556. " MU_OFDMA %d,"
  5557. " MU_OFDMA_MIMO %d",
  5558. peer->stats.rx.reception_type[0],
  5559. peer->stats.rx.reception_type[1],
  5560. peer->stats.rx.reception_type[2],
  5561. peer->stats.rx.reception_type[3]);
  5562. dp_print_common_rates_info(peer->stats.rx.pkt_type);
  5563. index = 0;
  5564. for (i = 0; i < SS_COUNT; i++) {
  5565. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  5566. " %d", peer->stats.rx.nss[i]);
  5567. }
  5568. DP_PRINT_STATS("NSS(1-8) = %s",
  5569. nss);
  5570. DP_PRINT_STATS("Aggregation:");
  5571. DP_PRINT_STATS(" Msdu's Part of Ampdu = %d",
  5572. peer->stats.rx.ampdu_cnt);
  5573. DP_PRINT_STATS(" Msdu's With No Mpdu Level Aggregation = %d",
  5574. peer->stats.rx.non_ampdu_cnt);
  5575. DP_PRINT_STATS(" Msdu's Part of Amsdu = %d",
  5576. peer->stats.rx.amsdu_cnt);
  5577. DP_PRINT_STATS(" Msdu's With No Msdu Level Aggregation = %d",
  5578. peer->stats.rx.non_amsdu_cnt);
  5579. DP_PRINT_STATS("Bytes and Packets received in last one sec:");
  5580. DP_PRINT_STATS(" Bytes received in last sec: %d",
  5581. peer->stats.rx.rx_byte_rate);
  5582. DP_PRINT_STATS(" Data received in last sec: %d",
  5583. peer->stats.rx.rx_data_rate);
  5584. }
  5585. /*
  5586. * dp_get_host_peer_stats()- function to print peer stats
  5587. * @pdev_handle: DP_PDEV handle
  5588. * @mac_addr: mac address of the peer
  5589. *
  5590. * Return: void
  5591. */
  5592. static void
  5593. dp_get_host_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  5594. {
  5595. struct dp_peer *peer;
  5596. uint8_t local_id;
  5597. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  5598. &local_id);
  5599. if (!peer) {
  5600. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  5601. "%s: Invalid peer\n", __func__);
  5602. return;
  5603. }
  5604. dp_print_peer_stats(peer);
  5605. dp_peer_rxtid_stats(peer, dp_rx_tid_stats_cb, NULL);
  5606. }
  5607. /**
  5608. * dp_print_host_stats()- Function to print the stats aggregated at host
  5609. * @vdev_handle: DP_VDEV handle
  5610. * @type: host stats type
  5611. *
  5612. * Available Stat types
  5613. * TXRX_CLEAR_STATS : Clear the stats
  5614. * TXRX_RX_RATE_STATS: Print Rx Rate Info
  5615. * TXRX_TX_RATE_STATS: Print Tx Rate Info
  5616. * TXRX_TX_HOST_STATS: Print Tx Stats
  5617. * TXRX_RX_HOST_STATS: Print Rx Stats
  5618. * TXRX_AST_STATS: Print AST Stats
  5619. * TXRX_SRNG_PTR_STATS: Print SRNG ring pointer stats
  5620. *
  5621. * Return: 0 on success, print error message in case of failure
  5622. */
  5623. static int
  5624. dp_print_host_stats(struct cdp_vdev *vdev_handle,
  5625. struct cdp_txrx_stats_req *req)
  5626. {
  5627. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5628. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  5629. enum cdp_host_txrx_stats type =
  5630. dp_stats_mapping_table[req->stats][STATS_HOST];
  5631. dp_aggregate_pdev_stats(pdev);
  5632. switch (type) {
  5633. case TXRX_CLEAR_STATS:
  5634. dp_txrx_host_stats_clr(vdev);
  5635. break;
  5636. case TXRX_RX_RATE_STATS:
  5637. dp_print_rx_rates(vdev);
  5638. break;
  5639. case TXRX_TX_RATE_STATS:
  5640. dp_print_tx_rates(vdev);
  5641. break;
  5642. case TXRX_TX_HOST_STATS:
  5643. dp_print_pdev_tx_stats(pdev);
  5644. dp_print_soc_tx_stats(pdev->soc);
  5645. break;
  5646. case TXRX_RX_HOST_STATS:
  5647. dp_print_pdev_rx_stats(pdev);
  5648. dp_print_soc_rx_stats(pdev->soc);
  5649. break;
  5650. case TXRX_AST_STATS:
  5651. dp_print_ast_stats(pdev->soc);
  5652. dp_print_peer_table(vdev);
  5653. break;
  5654. case TXRX_SRNG_PTR_STATS:
  5655. dp_print_ring_stats(pdev);
  5656. break;
  5657. case TXRX_RX_MON_STATS:
  5658. dp_print_pdev_rx_mon_stats(pdev);
  5659. break;
  5660. case TXRX_REO_QUEUE_STATS:
  5661. dp_get_host_peer_stats((struct cdp_pdev *)pdev, req->peer_addr);
  5662. break;
  5663. default:
  5664. DP_TRACE(FATAL, "Wrong Input For TxRx Host Stats");
  5665. break;
  5666. }
  5667. return 0;
  5668. }
  5669. /*
  5670. * dp_ppdu_ring_reset()- Reset PPDU Stats ring
  5671. * @pdev: DP_PDEV handle
  5672. *
  5673. * Return: void
  5674. */
  5675. static void
  5676. dp_ppdu_ring_reset(struct dp_pdev *pdev)
  5677. {
  5678. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  5679. int mac_id;
  5680. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  5681. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5682. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  5683. pdev->pdev_id);
  5684. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  5685. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5686. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5687. }
  5688. }
  5689. /*
  5690. * dp_ppdu_ring_cfg()- Configure PPDU Stats ring
  5691. * @pdev: DP_PDEV handle
  5692. *
  5693. * Return: void
  5694. */
  5695. static void
  5696. dp_ppdu_ring_cfg(struct dp_pdev *pdev)
  5697. {
  5698. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  5699. int mac_id;
  5700. htt_tlv_filter.mpdu_start = 1;
  5701. htt_tlv_filter.msdu_start = 0;
  5702. htt_tlv_filter.packet = 0;
  5703. htt_tlv_filter.msdu_end = 0;
  5704. htt_tlv_filter.mpdu_end = 0;
  5705. htt_tlv_filter.attention = 0;
  5706. htt_tlv_filter.ppdu_start = 1;
  5707. htt_tlv_filter.ppdu_end = 1;
  5708. htt_tlv_filter.ppdu_end_user_stats = 1;
  5709. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  5710. htt_tlv_filter.ppdu_end_status_done = 1;
  5711. htt_tlv_filter.enable_fp = 1;
  5712. htt_tlv_filter.enable_md = 0;
  5713. if (pdev->neighbour_peers_added &&
  5714. pdev->soc->hw_nac_monitor_support) {
  5715. htt_tlv_filter.enable_md = 1;
  5716. htt_tlv_filter.packet_header = 1;
  5717. }
  5718. if (pdev->mcopy_mode) {
  5719. htt_tlv_filter.packet_header = 1;
  5720. htt_tlv_filter.enable_mo = 1;
  5721. }
  5722. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  5723. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  5724. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  5725. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  5726. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  5727. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  5728. if (pdev->neighbour_peers_added &&
  5729. pdev->soc->hw_nac_monitor_support)
  5730. htt_tlv_filter.md_data_filter = FILTER_DATA_ALL;
  5731. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5732. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  5733. pdev->pdev_id);
  5734. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  5735. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5736. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5737. }
  5738. }
  5739. /*
  5740. * is_ppdu_txrx_capture_enabled() - API to check both pktlog and debug_sniffer
  5741. * modes are enabled or not.
  5742. * @dp_pdev: dp pdev handle.
  5743. *
  5744. * Return: bool
  5745. */
  5746. static inline bool is_ppdu_txrx_capture_enabled(struct dp_pdev *pdev)
  5747. {
  5748. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable &&
  5749. !pdev->mcopy_mode)
  5750. return true;
  5751. else
  5752. return false;
  5753. }
  5754. /*
  5755. *dp_set_bpr_enable() - API to enable/disable bpr feature
  5756. *@pdev_handle: DP_PDEV handle.
  5757. *@val: Provided value.
  5758. *
  5759. *Return: void
  5760. */
  5761. static void
  5762. dp_set_bpr_enable(struct cdp_pdev *pdev_handle, int val)
  5763. {
  5764. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5765. switch (val) {
  5766. case CDP_BPR_DISABLE:
  5767. pdev->bpr_enable = CDP_BPR_DISABLE;
  5768. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en &&
  5769. !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  5770. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  5771. } else if (pdev->enhanced_stats_en &&
  5772. !pdev->tx_sniffer_enable && !pdev->mcopy_mode &&
  5773. !pdev->pktlog_ppdu_stats) {
  5774. dp_h2t_cfg_stats_msg_send(pdev,
  5775. DP_PPDU_STATS_CFG_ENH_STATS,
  5776. pdev->pdev_id);
  5777. }
  5778. break;
  5779. case CDP_BPR_ENABLE:
  5780. pdev->bpr_enable = CDP_BPR_ENABLE;
  5781. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable &&
  5782. !pdev->mcopy_mode && !pdev->pktlog_ppdu_stats) {
  5783. dp_h2t_cfg_stats_msg_send(pdev,
  5784. DP_PPDU_STATS_CFG_BPR,
  5785. pdev->pdev_id);
  5786. } else if (pdev->enhanced_stats_en &&
  5787. !pdev->tx_sniffer_enable && !pdev->mcopy_mode &&
  5788. !pdev->pktlog_ppdu_stats) {
  5789. dp_h2t_cfg_stats_msg_send(pdev,
  5790. DP_PPDU_STATS_CFG_BPR_ENH,
  5791. pdev->pdev_id);
  5792. } else if (pdev->pktlog_ppdu_stats) {
  5793. dp_h2t_cfg_stats_msg_send(pdev,
  5794. DP_PPDU_STATS_CFG_BPR_PKTLOG,
  5795. pdev->pdev_id);
  5796. }
  5797. break;
  5798. default:
  5799. break;
  5800. }
  5801. }
  5802. /*
  5803. * dp_config_debug_sniffer()- API to enable/disable debug sniffer
  5804. * @pdev_handle: DP_PDEV handle
  5805. * @val: user provided value
  5806. *
  5807. * Return: void
  5808. */
  5809. static void
  5810. dp_config_debug_sniffer(struct cdp_pdev *pdev_handle, int val)
  5811. {
  5812. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5813. switch (val) {
  5814. case 0:
  5815. pdev->tx_sniffer_enable = 0;
  5816. pdev->mcopy_mode = 0;
  5817. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en &&
  5818. !pdev->bpr_enable) {
  5819. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  5820. dp_ppdu_ring_reset(pdev);
  5821. } else if (pdev->enhanced_stats_en && !pdev->bpr_enable) {
  5822. dp_h2t_cfg_stats_msg_send(pdev,
  5823. DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  5824. } else if (!pdev->enhanced_stats_en && pdev->bpr_enable) {
  5825. dp_h2t_cfg_stats_msg_send(pdev,
  5826. DP_PPDU_STATS_CFG_BPR_ENH,
  5827. pdev->pdev_id);
  5828. } else {
  5829. dp_h2t_cfg_stats_msg_send(pdev,
  5830. DP_PPDU_STATS_CFG_BPR,
  5831. pdev->pdev_id);
  5832. }
  5833. break;
  5834. case 1:
  5835. pdev->tx_sniffer_enable = 1;
  5836. pdev->mcopy_mode = 0;
  5837. if (!pdev->pktlog_ppdu_stats)
  5838. dp_h2t_cfg_stats_msg_send(pdev,
  5839. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  5840. break;
  5841. case 2:
  5842. pdev->mcopy_mode = 1;
  5843. pdev->tx_sniffer_enable = 0;
  5844. dp_ppdu_ring_cfg(pdev);
  5845. if (!pdev->pktlog_ppdu_stats)
  5846. dp_h2t_cfg_stats_msg_send(pdev,
  5847. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  5848. break;
  5849. default:
  5850. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5851. "Invalid value");
  5852. break;
  5853. }
  5854. }
  5855. /*
  5856. * dp_enable_enhanced_stats()- API to enable enhanced statistcs
  5857. * @pdev_handle: DP_PDEV handle
  5858. *
  5859. * Return: void
  5860. */
  5861. static void
  5862. dp_enable_enhanced_stats(struct cdp_pdev *pdev_handle)
  5863. {
  5864. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5865. if (pdev->enhanced_stats_en == 0)
  5866. dp_cal_client_timer_start(pdev->cal_client_ctx);
  5867. pdev->enhanced_stats_en = 1;
  5868. if (!pdev->mcopy_mode && !pdev->neighbour_peers_added &&
  5869. !pdev->monitor_vdev)
  5870. dp_ppdu_ring_cfg(pdev);
  5871. if (is_ppdu_txrx_capture_enabled(pdev) && !pdev->bpr_enable) {
  5872. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  5873. } else if (is_ppdu_txrx_capture_enabled(pdev) && pdev->bpr_enable) {
  5874. dp_h2t_cfg_stats_msg_send(pdev,
  5875. DP_PPDU_STATS_CFG_BPR_ENH,
  5876. pdev->pdev_id);
  5877. }
  5878. }
  5879. /*
  5880. * dp_disable_enhanced_stats()- API to disable enhanced statistcs
  5881. * @pdev_handle: DP_PDEV handle
  5882. *
  5883. * Return: void
  5884. */
  5885. static void
  5886. dp_disable_enhanced_stats(struct cdp_pdev *pdev_handle)
  5887. {
  5888. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5889. if (pdev->enhanced_stats_en == 1)
  5890. dp_cal_client_timer_stop(pdev->cal_client_ctx);
  5891. pdev->enhanced_stats_en = 0;
  5892. if (is_ppdu_txrx_capture_enabled(pdev) && !pdev->bpr_enable) {
  5893. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  5894. } else if (is_ppdu_txrx_capture_enabled(pdev) && pdev->bpr_enable) {
  5895. dp_h2t_cfg_stats_msg_send(pdev,
  5896. DP_PPDU_STATS_CFG_BPR,
  5897. pdev->pdev_id);
  5898. }
  5899. if (!pdev->mcopy_mode && !pdev->neighbour_peers_added &&
  5900. !pdev->monitor_vdev)
  5901. dp_ppdu_ring_reset(pdev);
  5902. }
  5903. /*
  5904. * dp_get_fw_peer_stats()- function to print peer stats
  5905. * @pdev_handle: DP_PDEV handle
  5906. * @mac_addr: mac address of the peer
  5907. * @cap: Type of htt stats requested
  5908. *
  5909. * Currently Supporting only MAC ID based requests Only
  5910. * 1: HTT_PEER_STATS_REQ_MODE_NO_QUERY
  5911. * 2: HTT_PEER_STATS_REQ_MODE_QUERY_TQM
  5912. * 3: HTT_PEER_STATS_REQ_MODE_FLUSH_TQM
  5913. *
  5914. * Return: void
  5915. */
  5916. static void
  5917. dp_get_fw_peer_stats(struct cdp_pdev *pdev_handle, uint8_t *mac_addr,
  5918. uint32_t cap)
  5919. {
  5920. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5921. int i;
  5922. uint32_t config_param0 = 0;
  5923. uint32_t config_param1 = 0;
  5924. uint32_t config_param2 = 0;
  5925. uint32_t config_param3 = 0;
  5926. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(config_param0, 1);
  5927. config_param0 |= (1 << (cap + 1));
  5928. for (i = 0; i < HTT_PEER_STATS_MAX_TLV; i++) {
  5929. config_param1 |= (1 << i);
  5930. }
  5931. config_param2 |= (mac_addr[0] & 0x000000ff);
  5932. config_param2 |= ((mac_addr[1] << 8) & 0x0000ff00);
  5933. config_param2 |= ((mac_addr[2] << 16) & 0x00ff0000);
  5934. config_param2 |= ((mac_addr[3] << 24) & 0xff000000);
  5935. config_param3 |= (mac_addr[4] & 0x000000ff);
  5936. config_param3 |= ((mac_addr[5] << 8) & 0x0000ff00);
  5937. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  5938. config_param0, config_param1, config_param2,
  5939. config_param3, 0, 0, 0);
  5940. }
  5941. /* This struct definition will be removed from here
  5942. * once it get added in FW headers*/
  5943. struct httstats_cmd_req {
  5944. uint32_t config_param0;
  5945. uint32_t config_param1;
  5946. uint32_t config_param2;
  5947. uint32_t config_param3;
  5948. int cookie;
  5949. u_int8_t stats_id;
  5950. };
  5951. /*
  5952. * dp_get_htt_stats: function to process the httstas request
  5953. * @pdev_handle: DP pdev handle
  5954. * @data: pointer to request data
  5955. * @data_len: length for request data
  5956. *
  5957. * return: void
  5958. */
  5959. static void
  5960. dp_get_htt_stats(struct cdp_pdev *pdev_handle, void *data, uint32_t data_len)
  5961. {
  5962. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5963. struct httstats_cmd_req *req = (struct httstats_cmd_req *)data;
  5964. QDF_ASSERT(data_len == sizeof(struct httstats_cmd_req));
  5965. dp_h2t_ext_stats_msg_send(pdev, req->stats_id,
  5966. req->config_param0, req->config_param1,
  5967. req->config_param2, req->config_param3,
  5968. req->cookie, 0, 0);
  5969. }
  5970. /*
  5971. * dp_set_pdev_param: function to set parameters in pdev
  5972. * @pdev_handle: DP pdev handle
  5973. * @param: parameter type to be set
  5974. * @val: value of parameter to be set
  5975. *
  5976. * return: void
  5977. */
  5978. static void dp_set_pdev_param(struct cdp_pdev *pdev_handle,
  5979. enum cdp_pdev_param_type param, uint8_t val)
  5980. {
  5981. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5982. switch (param) {
  5983. case CDP_CONFIG_DEBUG_SNIFFER:
  5984. dp_config_debug_sniffer(pdev_handle, val);
  5985. break;
  5986. case CDP_CONFIG_BPR_ENABLE:
  5987. dp_set_bpr_enable(pdev_handle, val);
  5988. break;
  5989. case CDP_CONFIG_PRIMARY_RADIO:
  5990. pdev->is_primary = val;
  5991. break;
  5992. default:
  5993. break;
  5994. }
  5995. }
  5996. /*
  5997. * dp_set_vdev_param: function to set parameters in vdev
  5998. * @param: parameter type to be set
  5999. * @val: value of parameter to be set
  6000. *
  6001. * return: void
  6002. */
  6003. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  6004. enum cdp_vdev_param_type param, uint32_t val)
  6005. {
  6006. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6007. switch (param) {
  6008. case CDP_ENABLE_WDS:
  6009. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6010. "wds_enable %d for vdev(%p) id(%d)\n",
  6011. val, vdev, vdev->vdev_id);
  6012. vdev->wds_enabled = val;
  6013. break;
  6014. case CDP_ENABLE_NAWDS:
  6015. vdev->nawds_enabled = val;
  6016. break;
  6017. case CDP_ENABLE_MCAST_EN:
  6018. vdev->mcast_enhancement_en = val;
  6019. break;
  6020. case CDP_ENABLE_PROXYSTA:
  6021. vdev->proxysta_vdev = val;
  6022. break;
  6023. case CDP_UPDATE_TDLS_FLAGS:
  6024. vdev->tdls_link_connected = val;
  6025. break;
  6026. case CDP_CFG_WDS_AGING_TIMER:
  6027. if (val == 0)
  6028. qdf_timer_stop(&vdev->pdev->soc->wds_aging_timer);
  6029. else if (val != vdev->wds_aging_timer_val)
  6030. qdf_timer_mod(&vdev->pdev->soc->wds_aging_timer, val);
  6031. vdev->wds_aging_timer_val = val;
  6032. break;
  6033. case CDP_ENABLE_AP_BRIDGE:
  6034. if (wlan_op_mode_sta != vdev->opmode)
  6035. vdev->ap_bridge_enabled = val;
  6036. else
  6037. vdev->ap_bridge_enabled = false;
  6038. break;
  6039. case CDP_ENABLE_CIPHER:
  6040. vdev->sec_type = val;
  6041. break;
  6042. case CDP_ENABLE_QWRAP_ISOLATION:
  6043. vdev->isolation_vdev = val;
  6044. break;
  6045. default:
  6046. break;
  6047. }
  6048. dp_tx_vdev_update_search_flags(vdev);
  6049. }
  6050. /**
  6051. * dp_peer_set_nawds: set nawds bit in peer
  6052. * @peer_handle: pointer to peer
  6053. * @value: enable/disable nawds
  6054. *
  6055. * return: void
  6056. */
  6057. static void dp_peer_set_nawds(struct cdp_peer *peer_handle, uint8_t value)
  6058. {
  6059. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  6060. peer->nawds_enabled = value;
  6061. }
  6062. /*
  6063. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  6064. * @vdev_handle: DP_VDEV handle
  6065. * @map_id:ID of map that needs to be updated
  6066. *
  6067. * Return: void
  6068. */
  6069. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  6070. uint8_t map_id)
  6071. {
  6072. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6073. vdev->dscp_tid_map_id = map_id;
  6074. return;
  6075. }
  6076. /* dp_txrx_get_peer_stats - will return cdp_peer_stats
  6077. * @peer_handle: DP_PEER handle
  6078. *
  6079. * return : cdp_peer_stats pointer
  6080. */
  6081. static struct cdp_peer_stats*
  6082. dp_txrx_get_peer_stats(struct cdp_peer *peer_handle)
  6083. {
  6084. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  6085. qdf_assert(peer);
  6086. return &peer->stats;
  6087. }
  6088. /* dp_txrx_reset_peer_stats - reset cdp_peer_stats for particular peer
  6089. * @peer_handle: DP_PEER handle
  6090. *
  6091. * return : void
  6092. */
  6093. static void dp_txrx_reset_peer_stats(struct cdp_peer *peer_handle)
  6094. {
  6095. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  6096. qdf_assert(peer);
  6097. qdf_mem_set(&peer->stats, sizeof(peer->stats), 0);
  6098. }
  6099. /* dp_txrx_get_vdev_stats - Update buffer with cdp_vdev_stats
  6100. * @vdev_handle: DP_VDEV handle
  6101. * @buf: buffer for vdev stats
  6102. *
  6103. * return : int
  6104. */
  6105. static int dp_txrx_get_vdev_stats(struct cdp_vdev *vdev_handle, void *buf,
  6106. bool is_aggregate)
  6107. {
  6108. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6109. struct cdp_vdev_stats *vdev_stats = (struct cdp_vdev_stats *)buf;
  6110. if (is_aggregate)
  6111. dp_aggregate_vdev_stats(vdev, buf);
  6112. else
  6113. qdf_mem_copy(vdev_stats, &vdev->stats, sizeof(vdev->stats));
  6114. return 0;
  6115. }
  6116. /*
  6117. * dp_txrx_stats_publish(): publish pdev stats into a buffer
  6118. * @pdev_handle: DP_PDEV handle
  6119. * @buf: to hold pdev_stats
  6120. *
  6121. * Return: int
  6122. */
  6123. static int
  6124. dp_txrx_stats_publish(struct cdp_pdev *pdev_handle, void *buf)
  6125. {
  6126. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6127. struct cdp_pdev_stats *buffer = (struct cdp_pdev_stats *) buf;
  6128. struct cdp_txrx_stats_req req = {0,};
  6129. dp_aggregate_pdev_stats(pdev);
  6130. req.stats = HTT_DBG_EXT_STATS_PDEV_TX;
  6131. req.cookie_val = 1;
  6132. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  6133. req.param1, req.param2, req.param3, 0,
  6134. req.cookie_val, 0);
  6135. msleep(DP_MAX_SLEEP_TIME);
  6136. req.stats = HTT_DBG_EXT_STATS_PDEV_RX;
  6137. req.cookie_val = 1;
  6138. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  6139. req.param1, req.param2, req.param3, 0,
  6140. req.cookie_val, 0);
  6141. msleep(DP_MAX_SLEEP_TIME);
  6142. qdf_mem_copy(buffer, &pdev->stats, sizeof(pdev->stats));
  6143. return TXRX_STATS_LEVEL;
  6144. }
  6145. /**
  6146. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  6147. * @pdev: DP_PDEV handle
  6148. * @map_id: ID of map that needs to be updated
  6149. * @tos: index value in map
  6150. * @tid: tid value passed by the user
  6151. *
  6152. * Return: void
  6153. */
  6154. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  6155. uint8_t map_id, uint8_t tos, uint8_t tid)
  6156. {
  6157. uint8_t dscp;
  6158. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  6159. struct dp_soc *soc = pdev->soc;
  6160. if (!soc)
  6161. return;
  6162. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  6163. pdev->dscp_tid_map[map_id][dscp] = tid;
  6164. if (map_id < soc->num_hw_dscp_tid_map)
  6165. hal_tx_update_dscp_tid(soc->hal_soc, tid,
  6166. map_id, dscp);
  6167. return;
  6168. }
  6169. /**
  6170. * dp_fw_stats_process(): Process TxRX FW stats request
  6171. * @vdev_handle: DP VDEV handle
  6172. * @req: stats request
  6173. *
  6174. * return: int
  6175. */
  6176. static int dp_fw_stats_process(struct cdp_vdev *vdev_handle,
  6177. struct cdp_txrx_stats_req *req)
  6178. {
  6179. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6180. struct dp_pdev *pdev = NULL;
  6181. uint32_t stats = req->stats;
  6182. uint8_t mac_id = req->mac_id;
  6183. if (!vdev) {
  6184. DP_TRACE(NONE, "VDEV not found");
  6185. return 1;
  6186. }
  6187. pdev = vdev->pdev;
  6188. /*
  6189. * For HTT_DBG_EXT_STATS_RESET command, FW need to config
  6190. * from param0 to param3 according to below rule:
  6191. *
  6192. * PARAM:
  6193. * - config_param0 : start_offset (stats type)
  6194. * - config_param1 : stats bmask from start offset
  6195. * - config_param2 : stats bmask from start offset + 32
  6196. * - config_param3 : stats bmask from start offset + 64
  6197. */
  6198. if (req->stats == CDP_TXRX_STATS_0) {
  6199. req->param0 = HTT_DBG_EXT_STATS_PDEV_TX;
  6200. req->param1 = 0xFFFFFFFF;
  6201. req->param2 = 0xFFFFFFFF;
  6202. req->param3 = 0xFFFFFFFF;
  6203. }
  6204. return dp_h2t_ext_stats_msg_send(pdev, stats, req->param0,
  6205. req->param1, req->param2, req->param3,
  6206. 0, 0, mac_id);
  6207. }
  6208. /**
  6209. * dp_txrx_stats_request - function to map to firmware and host stats
  6210. * @vdev: virtual handle
  6211. * @req: stats request
  6212. *
  6213. * Return: QDF_STATUS
  6214. */
  6215. static
  6216. QDF_STATUS dp_txrx_stats_request(struct cdp_vdev *vdev,
  6217. struct cdp_txrx_stats_req *req)
  6218. {
  6219. int host_stats;
  6220. int fw_stats;
  6221. enum cdp_stats stats;
  6222. int num_stats;
  6223. if (!vdev || !req) {
  6224. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6225. "Invalid vdev/req instance");
  6226. return QDF_STATUS_E_INVAL;
  6227. }
  6228. stats = req->stats;
  6229. if (stats >= CDP_TXRX_MAX_STATS)
  6230. return QDF_STATUS_E_INVAL;
  6231. /*
  6232. * DP_CURR_FW_STATS_AVAIL: no of FW stats currently available
  6233. * has to be updated if new FW HTT stats added
  6234. */
  6235. if (stats > CDP_TXRX_STATS_HTT_MAX)
  6236. stats = stats + DP_CURR_FW_STATS_AVAIL - DP_HTT_DBG_EXT_STATS_MAX;
  6237. num_stats = QDF_ARRAY_SIZE(dp_stats_mapping_table);
  6238. if (stats >= num_stats) {
  6239. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6240. "%s: Invalid stats option: %d", __func__, stats);
  6241. return QDF_STATUS_E_INVAL;
  6242. }
  6243. req->stats = stats;
  6244. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  6245. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  6246. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  6247. "stats: %u fw_stats_type: %d host_stats: %d",
  6248. stats, fw_stats, host_stats);
  6249. if (fw_stats != TXRX_FW_STATS_INVALID) {
  6250. /* update request with FW stats type */
  6251. req->stats = fw_stats;
  6252. return dp_fw_stats_process(vdev, req);
  6253. }
  6254. if ((host_stats != TXRX_HOST_STATS_INVALID) &&
  6255. (host_stats <= TXRX_HOST_STATS_MAX))
  6256. return dp_print_host_stats(vdev, req);
  6257. else
  6258. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  6259. "Wrong Input for TxRx Stats");
  6260. return QDF_STATUS_SUCCESS;
  6261. }
  6262. /*
  6263. * dp_print_napi_stats(): NAPI stats
  6264. * @soc - soc handle
  6265. */
  6266. static void dp_print_napi_stats(struct dp_soc *soc)
  6267. {
  6268. hif_print_napi_stats(soc->hif_handle);
  6269. }
  6270. /*
  6271. * dp_print_per_ring_stats(): Packet count per ring
  6272. * @soc - soc handle
  6273. */
  6274. static void dp_print_per_ring_stats(struct dp_soc *soc)
  6275. {
  6276. uint8_t ring;
  6277. uint16_t core;
  6278. uint64_t total_packets;
  6279. DP_TRACE_STATS(INFO_HIGH, "Reo packets per ring:");
  6280. for (ring = 0; ring < MAX_REO_DEST_RINGS; ring++) {
  6281. total_packets = 0;
  6282. DP_TRACE_STATS(INFO_HIGH,
  6283. "Packets on ring %u:", ring);
  6284. for (core = 0; core < NR_CPUS; core++) {
  6285. DP_TRACE_STATS(INFO_HIGH,
  6286. "Packets arriving on core %u: %llu",
  6287. core,
  6288. soc->stats.rx.ring_packets[core][ring]);
  6289. total_packets += soc->stats.rx.ring_packets[core][ring];
  6290. }
  6291. DP_TRACE_STATS(INFO_HIGH,
  6292. "Total packets on ring %u: %llu",
  6293. ring, total_packets);
  6294. }
  6295. }
  6296. /*
  6297. * dp_txrx_path_stats() - Function to display dump stats
  6298. * @soc - soc handle
  6299. *
  6300. * return: none
  6301. */
  6302. static void dp_txrx_path_stats(struct dp_soc *soc)
  6303. {
  6304. uint8_t error_code;
  6305. uint8_t loop_pdev;
  6306. struct dp_pdev *pdev;
  6307. uint8_t i;
  6308. if (!soc) {
  6309. DP_TRACE(ERROR, "%s: Invalid access",
  6310. __func__);
  6311. return;
  6312. }
  6313. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  6314. pdev = soc->pdev_list[loop_pdev];
  6315. dp_aggregate_pdev_stats(pdev);
  6316. DP_TRACE_STATS(INFO_HIGH, "Tx path Statistics:");
  6317. DP_TRACE_STATS(INFO_HIGH, "from stack: %u msdus (%llu bytes)",
  6318. pdev->stats.tx_i.rcvd.num,
  6319. pdev->stats.tx_i.rcvd.bytes);
  6320. DP_TRACE_STATS(INFO_HIGH,
  6321. "processed from host: %u msdus (%llu bytes)",
  6322. pdev->stats.tx_i.processed.num,
  6323. pdev->stats.tx_i.processed.bytes);
  6324. DP_TRACE_STATS(INFO_HIGH,
  6325. "successfully transmitted: %u msdus (%llu bytes)",
  6326. pdev->stats.tx.tx_success.num,
  6327. pdev->stats.tx.tx_success.bytes);
  6328. DP_TRACE_STATS(INFO_HIGH, "Dropped in host:");
  6329. DP_TRACE_STATS(INFO_HIGH, "Total packets dropped: %u,",
  6330. pdev->stats.tx_i.dropped.dropped_pkt.num);
  6331. DP_TRACE_STATS(INFO_HIGH, "Descriptor not available: %u",
  6332. pdev->stats.tx_i.dropped.desc_na.num);
  6333. DP_TRACE_STATS(INFO_HIGH, "Ring full: %u",
  6334. pdev->stats.tx_i.dropped.ring_full);
  6335. DP_TRACE_STATS(INFO_HIGH, "Enqueue fail: %u",
  6336. pdev->stats.tx_i.dropped.enqueue_fail);
  6337. DP_TRACE_STATS(INFO_HIGH, "DMA Error: %u",
  6338. pdev->stats.tx_i.dropped.dma_error);
  6339. DP_TRACE_STATS(INFO_HIGH, "Dropped in hardware:");
  6340. DP_TRACE_STATS(INFO_HIGH, "total packets dropped: %u",
  6341. pdev->stats.tx.tx_failed);
  6342. DP_TRACE_STATS(INFO_HIGH, "mpdu age out: %u",
  6343. pdev->stats.tx.dropped.age_out);
  6344. DP_TRACE_STATS(INFO_HIGH, "firmware removed: %u",
  6345. pdev->stats.tx.dropped.fw_rem);
  6346. DP_TRACE_STATS(INFO_HIGH, "firmware removed tx: %u",
  6347. pdev->stats.tx.dropped.fw_rem_tx);
  6348. DP_TRACE_STATS(INFO_HIGH, "firmware removed notx %u",
  6349. pdev->stats.tx.dropped.fw_rem_notx);
  6350. DP_TRACE_STATS(INFO_HIGH, "peer_invalid: %u",
  6351. pdev->soc->stats.tx.tx_invalid_peer.num);
  6352. DP_TRACE_STATS(INFO_HIGH, "Tx packets sent per interrupt:");
  6353. DP_TRACE_STATS(INFO_HIGH, "Single Packet: %u",
  6354. pdev->stats.tx_comp_histogram.pkts_1);
  6355. DP_TRACE_STATS(INFO_HIGH, "2-20 Packets: %u",
  6356. pdev->stats.tx_comp_histogram.pkts_2_20);
  6357. DP_TRACE_STATS(INFO_HIGH, "21-40 Packets: %u",
  6358. pdev->stats.tx_comp_histogram.pkts_21_40);
  6359. DP_TRACE_STATS(INFO_HIGH, "41-60 Packets: %u",
  6360. pdev->stats.tx_comp_histogram.pkts_41_60);
  6361. DP_TRACE_STATS(INFO_HIGH, "61-80 Packets: %u",
  6362. pdev->stats.tx_comp_histogram.pkts_61_80);
  6363. DP_TRACE_STATS(INFO_HIGH, "81-100 Packets: %u",
  6364. pdev->stats.tx_comp_histogram.pkts_81_100);
  6365. DP_TRACE_STATS(INFO_HIGH, "101-200 Packets: %u",
  6366. pdev->stats.tx_comp_histogram.pkts_101_200);
  6367. DP_TRACE_STATS(INFO_HIGH, " 201+ Packets: %u",
  6368. pdev->stats.tx_comp_histogram.pkts_201_plus);
  6369. DP_TRACE_STATS(INFO_HIGH, "Rx path statistics");
  6370. DP_TRACE_STATS(INFO_HIGH,
  6371. "delivered %u msdus ( %llu bytes),",
  6372. pdev->stats.rx.to_stack.num,
  6373. pdev->stats.rx.to_stack.bytes);
  6374. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  6375. DP_TRACE_STATS(INFO_HIGH,
  6376. "received on reo[%d] %u msdus( %llu bytes),",
  6377. i, pdev->stats.rx.rcvd_reo[i].num,
  6378. pdev->stats.rx.rcvd_reo[i].bytes);
  6379. DP_TRACE_STATS(INFO_HIGH,
  6380. "intra-bss packets %u msdus ( %llu bytes),",
  6381. pdev->stats.rx.intra_bss.pkts.num,
  6382. pdev->stats.rx.intra_bss.pkts.bytes);
  6383. DP_TRACE_STATS(INFO_HIGH,
  6384. "intra-bss fails %u msdus ( %llu bytes),",
  6385. pdev->stats.rx.intra_bss.fail.num,
  6386. pdev->stats.rx.intra_bss.fail.bytes);
  6387. DP_TRACE_STATS(INFO_HIGH,
  6388. "raw packets %u msdus ( %llu bytes),",
  6389. pdev->stats.rx.raw.num,
  6390. pdev->stats.rx.raw.bytes);
  6391. DP_TRACE_STATS(INFO_HIGH, "dropped: error %u msdus",
  6392. pdev->stats.rx.err.mic_err);
  6393. DP_TRACE_STATS(INFO_HIGH, "peer invalid %u",
  6394. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  6395. DP_TRACE_STATS(INFO_HIGH, "Reo Statistics");
  6396. DP_TRACE_STATS(INFO_HIGH, "rbm error: %u msdus",
  6397. pdev->soc->stats.rx.err.invalid_rbm);
  6398. DP_TRACE_STATS(INFO_HIGH, "hal ring access fail: %u msdus",
  6399. pdev->soc->stats.rx.err.hal_ring_access_fail);
  6400. for (error_code = 0; error_code < HAL_REO_ERR_MAX;
  6401. error_code++) {
  6402. if (!pdev->soc->stats.rx.err.reo_error[error_code])
  6403. continue;
  6404. DP_TRACE_STATS(INFO_HIGH,
  6405. "Reo error number (%u): %u msdus",
  6406. error_code,
  6407. pdev->soc->stats.rx.err
  6408. .reo_error[error_code]);
  6409. }
  6410. for (error_code = 0; error_code < HAL_RXDMA_ERR_MAX;
  6411. error_code++) {
  6412. if (!pdev->soc->stats.rx.err.rxdma_error[error_code])
  6413. continue;
  6414. DP_TRACE_STATS(INFO_HIGH,
  6415. "Rxdma error number (%u): %u msdus",
  6416. error_code,
  6417. pdev->soc->stats.rx.err
  6418. .rxdma_error[error_code]);
  6419. }
  6420. DP_TRACE_STATS(INFO_HIGH, "Rx packets reaped per interrupt:");
  6421. DP_TRACE_STATS(INFO_HIGH, "Single Packet: %u",
  6422. pdev->stats.rx_ind_histogram.pkts_1);
  6423. DP_TRACE_STATS(INFO_HIGH, "2-20 Packets: %u",
  6424. pdev->stats.rx_ind_histogram.pkts_2_20);
  6425. DP_TRACE_STATS(INFO_HIGH, "21-40 Packets: %u",
  6426. pdev->stats.rx_ind_histogram.pkts_21_40);
  6427. DP_TRACE_STATS(INFO_HIGH, "41-60 Packets: %u",
  6428. pdev->stats.rx_ind_histogram.pkts_41_60);
  6429. DP_TRACE_STATS(INFO_HIGH, "61-80 Packets: %u",
  6430. pdev->stats.rx_ind_histogram.pkts_61_80);
  6431. DP_TRACE_STATS(INFO_HIGH, "81-100 Packets: %u",
  6432. pdev->stats.rx_ind_histogram.pkts_81_100);
  6433. DP_TRACE_STATS(INFO_HIGH, "101-200 Packets: %u",
  6434. pdev->stats.rx_ind_histogram.pkts_101_200);
  6435. DP_TRACE_STATS(INFO_HIGH, " 201+ Packets: %u",
  6436. pdev->stats.rx_ind_histogram.pkts_201_plus);
  6437. DP_TRACE_STATS(INFO_HIGH, "%s: tso_enable: %u lro_enable: %u rx_hash: %u napi_enable: %u",
  6438. __func__,
  6439. pdev->soc->wlan_cfg_ctx
  6440. ->tso_enabled,
  6441. pdev->soc->wlan_cfg_ctx
  6442. ->lro_enabled,
  6443. pdev->soc->wlan_cfg_ctx
  6444. ->rx_hash,
  6445. pdev->soc->wlan_cfg_ctx
  6446. ->napi_enabled);
  6447. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  6448. DP_TRACE_STATS(INFO_HIGH, "%s: Tx flow stop queue: %u tx flow start queue offset: %u",
  6449. __func__,
  6450. pdev->soc->wlan_cfg_ctx
  6451. ->tx_flow_stop_queue_threshold,
  6452. pdev->soc->wlan_cfg_ctx
  6453. ->tx_flow_start_queue_offset);
  6454. #endif
  6455. }
  6456. }
  6457. /*
  6458. * dp_txrx_dump_stats() - Dump statistics
  6459. * @value - Statistics option
  6460. */
  6461. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value,
  6462. enum qdf_stats_verbosity_level level)
  6463. {
  6464. struct dp_soc *soc =
  6465. (struct dp_soc *)psoc;
  6466. QDF_STATUS status = QDF_STATUS_SUCCESS;
  6467. if (!soc) {
  6468. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6469. "%s: soc is NULL", __func__);
  6470. return QDF_STATUS_E_INVAL;
  6471. }
  6472. switch (value) {
  6473. case CDP_TXRX_PATH_STATS:
  6474. dp_txrx_path_stats(soc);
  6475. break;
  6476. case CDP_RX_RING_STATS:
  6477. dp_print_per_ring_stats(soc);
  6478. break;
  6479. case CDP_TXRX_TSO_STATS:
  6480. /* TODO: NOT IMPLEMENTED */
  6481. break;
  6482. case CDP_DUMP_TX_FLOW_POOL_INFO:
  6483. cdp_dump_flow_pool_info((struct cdp_soc_t *)soc);
  6484. break;
  6485. case CDP_DP_NAPI_STATS:
  6486. dp_print_napi_stats(soc);
  6487. break;
  6488. case CDP_TXRX_DESC_STATS:
  6489. /* TODO: NOT IMPLEMENTED */
  6490. break;
  6491. default:
  6492. status = QDF_STATUS_E_INVAL;
  6493. break;
  6494. }
  6495. return status;
  6496. }
  6497. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  6498. /**
  6499. * dp_update_flow_control_parameters() - API to store datapath
  6500. * config parameters
  6501. * @soc: soc handle
  6502. * @cfg: ini parameter handle
  6503. *
  6504. * Return: void
  6505. */
  6506. static inline
  6507. void dp_update_flow_control_parameters(struct dp_soc *soc,
  6508. struct cdp_config_params *params)
  6509. {
  6510. soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold =
  6511. params->tx_flow_stop_queue_threshold;
  6512. soc->wlan_cfg_ctx->tx_flow_start_queue_offset =
  6513. params->tx_flow_start_queue_offset;
  6514. }
  6515. #else
  6516. static inline
  6517. void dp_update_flow_control_parameters(struct dp_soc *soc,
  6518. struct cdp_config_params *params)
  6519. {
  6520. }
  6521. #endif
  6522. /**
  6523. * dp_update_config_parameters() - API to store datapath
  6524. * config parameters
  6525. * @soc: soc handle
  6526. * @cfg: ini parameter handle
  6527. *
  6528. * Return: status
  6529. */
  6530. static
  6531. QDF_STATUS dp_update_config_parameters(struct cdp_soc *psoc,
  6532. struct cdp_config_params *params)
  6533. {
  6534. struct dp_soc *soc = (struct dp_soc *)psoc;
  6535. if (!(soc)) {
  6536. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6537. "%s: Invalid handle", __func__);
  6538. return QDF_STATUS_E_INVAL;
  6539. }
  6540. soc->wlan_cfg_ctx->tso_enabled = params->tso_enable;
  6541. soc->wlan_cfg_ctx->lro_enabled = params->lro_enable;
  6542. soc->wlan_cfg_ctx->rx_hash = params->flow_steering_enable;
  6543. soc->wlan_cfg_ctx->tcp_udp_checksumoffload =
  6544. params->tcp_udp_checksumoffload;
  6545. soc->wlan_cfg_ctx->napi_enabled = params->napi_enable;
  6546. dp_update_flow_control_parameters(soc, params);
  6547. return QDF_STATUS_SUCCESS;
  6548. }
  6549. /**
  6550. * dp_txrx_set_wds_rx_policy() - API to store datapath
  6551. * config parameters
  6552. * @vdev_handle - datapath vdev handle
  6553. * @cfg: ini parameter handle
  6554. *
  6555. * Return: status
  6556. */
  6557. #ifdef WDS_VENDOR_EXTENSION
  6558. void
  6559. dp_txrx_set_wds_rx_policy(
  6560. struct cdp_vdev *vdev_handle,
  6561. u_int32_t val)
  6562. {
  6563. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6564. struct dp_peer *peer;
  6565. if (vdev->opmode == wlan_op_mode_ap) {
  6566. /* for ap, set it on bss_peer */
  6567. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  6568. if (peer->bss_peer) {
  6569. peer->wds_ecm.wds_rx_filter = 1;
  6570. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  6571. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  6572. break;
  6573. }
  6574. }
  6575. } else if (vdev->opmode == wlan_op_mode_sta) {
  6576. peer = TAILQ_FIRST(&vdev->peer_list);
  6577. peer->wds_ecm.wds_rx_filter = 1;
  6578. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  6579. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  6580. }
  6581. }
  6582. /**
  6583. * dp_txrx_peer_wds_tx_policy_update() - API to set tx wds policy
  6584. *
  6585. * @peer_handle - datapath peer handle
  6586. * @wds_tx_ucast: policy for unicast transmission
  6587. * @wds_tx_mcast: policy for multicast transmission
  6588. *
  6589. * Return: void
  6590. */
  6591. void
  6592. dp_txrx_peer_wds_tx_policy_update(struct cdp_peer *peer_handle,
  6593. int wds_tx_ucast, int wds_tx_mcast)
  6594. {
  6595. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  6596. if (wds_tx_ucast || wds_tx_mcast) {
  6597. peer->wds_enabled = 1;
  6598. peer->wds_ecm.wds_tx_ucast_4addr = wds_tx_ucast;
  6599. peer->wds_ecm.wds_tx_mcast_4addr = wds_tx_mcast;
  6600. } else {
  6601. peer->wds_enabled = 0;
  6602. peer->wds_ecm.wds_tx_ucast_4addr = 0;
  6603. peer->wds_ecm.wds_tx_mcast_4addr = 0;
  6604. }
  6605. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  6606. FL("Policy Update set to :\
  6607. peer->wds_enabled %d\
  6608. peer->wds_ecm.wds_tx_ucast_4addr %d\
  6609. peer->wds_ecm.wds_tx_mcast_4addr %d"),
  6610. peer->wds_enabled, peer->wds_ecm.wds_tx_ucast_4addr,
  6611. peer->wds_ecm.wds_tx_mcast_4addr);
  6612. return;
  6613. }
  6614. #endif
  6615. static struct cdp_wds_ops dp_ops_wds = {
  6616. .vdev_set_wds = dp_vdev_set_wds,
  6617. #ifdef WDS_VENDOR_EXTENSION
  6618. .txrx_set_wds_rx_policy = dp_txrx_set_wds_rx_policy,
  6619. .txrx_wds_peer_tx_policy_update = dp_txrx_peer_wds_tx_policy_update,
  6620. #endif
  6621. };
  6622. /*
  6623. * dp_txrx_data_tx_cb_set(): set the callback for non standard tx
  6624. * @vdev_handle - datapath vdev handle
  6625. * @callback - callback function
  6626. * @ctxt: callback context
  6627. *
  6628. */
  6629. static void
  6630. dp_txrx_data_tx_cb_set(struct cdp_vdev *vdev_handle,
  6631. ol_txrx_data_tx_cb callback, void *ctxt)
  6632. {
  6633. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6634. vdev->tx_non_std_data_callback.func = callback;
  6635. vdev->tx_non_std_data_callback.ctxt = ctxt;
  6636. }
  6637. /**
  6638. * dp_pdev_get_dp_txrx_handle() - get dp handle from pdev
  6639. * @pdev_hdl: datapath pdev handle
  6640. *
  6641. * Return: opaque pointer to dp txrx handle
  6642. */
  6643. static void *dp_pdev_get_dp_txrx_handle(struct cdp_pdev *pdev_hdl)
  6644. {
  6645. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  6646. return pdev->dp_txrx_handle;
  6647. }
  6648. /**
  6649. * dp_pdev_set_dp_txrx_handle() - set dp handle in pdev
  6650. * @pdev_hdl: datapath pdev handle
  6651. * @dp_txrx_hdl: opaque pointer for dp_txrx_handle
  6652. *
  6653. * Return: void
  6654. */
  6655. static void
  6656. dp_pdev_set_dp_txrx_handle(struct cdp_pdev *pdev_hdl, void *dp_txrx_hdl)
  6657. {
  6658. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  6659. pdev->dp_txrx_handle = dp_txrx_hdl;
  6660. }
  6661. /**
  6662. * dp_soc_get_dp_txrx_handle() - get context for external-dp from dp soc
  6663. * @soc_handle: datapath soc handle
  6664. *
  6665. * Return: opaque pointer to external dp (non-core DP)
  6666. */
  6667. static void *dp_soc_get_dp_txrx_handle(struct cdp_soc *soc_handle)
  6668. {
  6669. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  6670. return soc->external_txrx_handle;
  6671. }
  6672. /**
  6673. * dp_soc_set_dp_txrx_handle() - set external dp handle in soc
  6674. * @soc_handle: datapath soc handle
  6675. * @txrx_handle: opaque pointer to external dp (non-core DP)
  6676. *
  6677. * Return: void
  6678. */
  6679. static void
  6680. dp_soc_set_dp_txrx_handle(struct cdp_soc *soc_handle, void *txrx_handle)
  6681. {
  6682. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  6683. soc->external_txrx_handle = txrx_handle;
  6684. }
  6685. #ifdef FEATURE_AST
  6686. static void dp_peer_teardown_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  6687. {
  6688. struct dp_vdev *vdev = (struct dp_vdev *) vdev_hdl;
  6689. struct dp_peer *peer = (struct dp_peer *) peer_hdl;
  6690. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  6691. /*
  6692. * For BSS peer, new peer is not created on alloc_node if the
  6693. * peer with same address already exists , instead refcnt is
  6694. * increased for existing peer. Correspondingly in delete path,
  6695. * only refcnt is decreased; and peer is only deleted , when all
  6696. * references are deleted. So delete_in_progress should not be set
  6697. * for bss_peer, unless only 2 reference remains (peer map reference
  6698. * and peer hash table reference).
  6699. */
  6700. if (peer->bss_peer && (qdf_atomic_read(&peer->ref_cnt) > 2)) {
  6701. return;
  6702. }
  6703. peer->delete_in_progress = true;
  6704. dp_peer_delete_ast_entries(soc, peer);
  6705. }
  6706. #endif
  6707. #ifdef ATH_SUPPORT_NAC_RSSI
  6708. /**
  6709. * dp_vdev_get_neighbour_rssi(): Store RSSI for configured NAC
  6710. * @vdev_hdl: DP vdev handle
  6711. * @rssi: rssi value
  6712. *
  6713. * Return: 0 for success. nonzero for failure.
  6714. */
  6715. QDF_STATUS dp_vdev_get_neighbour_rssi(struct cdp_vdev *vdev_hdl,
  6716. char *mac_addr,
  6717. uint8_t *rssi)
  6718. {
  6719. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  6720. struct dp_pdev *pdev = vdev->pdev;
  6721. struct dp_neighbour_peer *peer = NULL;
  6722. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  6723. *rssi = 0;
  6724. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  6725. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  6726. neighbour_peer_list_elem) {
  6727. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  6728. mac_addr, DP_MAC_ADDR_LEN) == 0) {
  6729. *rssi = peer->rssi;
  6730. status = QDF_STATUS_SUCCESS;
  6731. break;
  6732. }
  6733. }
  6734. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  6735. return status;
  6736. }
  6737. static QDF_STATUS dp_config_for_nac_rssi(struct cdp_vdev *vdev_handle,
  6738. enum cdp_nac_param_cmd cmd, char *bssid, char *client_macaddr,
  6739. uint8_t chan_num)
  6740. {
  6741. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6742. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  6743. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  6744. pdev->nac_rssi_filtering = 1;
  6745. /* Store address of NAC (neighbour peer) which will be checked
  6746. * against TA of received packets.
  6747. */
  6748. if (cmd == CDP_NAC_PARAM_ADD) {
  6749. dp_update_filter_neighbour_peers(vdev_handle, DP_NAC_PARAM_ADD,
  6750. client_macaddr);
  6751. } else if (cmd == CDP_NAC_PARAM_DEL) {
  6752. dp_update_filter_neighbour_peers(vdev_handle,
  6753. DP_NAC_PARAM_DEL,
  6754. client_macaddr);
  6755. }
  6756. if (soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi)
  6757. soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi
  6758. ((void *)vdev->pdev->ctrl_pdev,
  6759. vdev->vdev_id, cmd, bssid);
  6760. return QDF_STATUS_SUCCESS;
  6761. }
  6762. #endif
  6763. static QDF_STATUS dp_peer_map_attach_wifi3(struct cdp_soc_t *soc_hdl,
  6764. uint32_t max_peers,
  6765. bool peer_map_unmap_v2)
  6766. {
  6767. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  6768. soc->max_peers = max_peers;
  6769. qdf_print ("%s max_peers %u\n", __func__, max_peers);
  6770. if (dp_peer_find_attach(soc))
  6771. return QDF_STATUS_E_FAILURE;
  6772. soc->is_peer_map_unmap_v2 = peer_map_unmap_v2;
  6773. return QDF_STATUS_SUCCESS;
  6774. }
  6775. /**
  6776. * dp_pdev_set_ctrl_pdev() - set ctrl pdev handle in dp pdev
  6777. * @dp_pdev: dp pdev handle
  6778. * @ctrl_pdev: UMAC ctrl pdev handle
  6779. *
  6780. * Return: void
  6781. */
  6782. static void dp_pdev_set_ctrl_pdev(struct cdp_pdev *dp_pdev,
  6783. struct cdp_ctrl_objmgr_pdev *ctrl_pdev)
  6784. {
  6785. struct dp_pdev *pdev = (struct dp_pdev *)dp_pdev;
  6786. pdev->ctrl_pdev = ctrl_pdev;
  6787. }
  6788. static struct cdp_cmn_ops dp_ops_cmn = {
  6789. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  6790. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  6791. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  6792. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  6793. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  6794. .txrx_peer_create = dp_peer_create_wifi3,
  6795. .txrx_peer_setup = dp_peer_setup_wifi3,
  6796. #ifdef FEATURE_AST
  6797. .txrx_peer_teardown = dp_peer_teardown_wifi3,
  6798. #else
  6799. .txrx_peer_teardown = NULL,
  6800. #endif
  6801. .txrx_peer_add_ast = dp_peer_add_ast_wifi3,
  6802. .txrx_peer_del_ast = dp_peer_del_ast_wifi3,
  6803. .txrx_peer_update_ast = dp_peer_update_ast_wifi3,
  6804. .txrx_peer_ast_hash_find = dp_peer_ast_hash_find_wifi3,
  6805. .txrx_peer_ast_get_pdev_id = dp_peer_ast_get_pdev_id_wifi3,
  6806. .txrx_peer_ast_get_next_hop = dp_peer_ast_get_next_hop_wifi3,
  6807. .txrx_peer_ast_set_type = dp_peer_ast_set_type_wifi3,
  6808. .txrx_peer_ast_get_type = dp_peer_ast_get_type_wifi3,
  6809. #if defined(FEATURE_AST) && defined(AST_HKV1_WORKAROUND)
  6810. .txrx_peer_ast_set_cp_ctx = dp_peer_ast_set_cp_ctx_wifi3,
  6811. .txrx_peer_ast_get_cp_ctx = dp_peer_ast_get_cp_ctx_wifi3,
  6812. .txrx_peer_ast_get_wmi_sent = dp_peer_ast_get_wmi_sent_wifi3,
  6813. .txrx_peer_ast_free_entry = dp_peer_ast_free_entry_wifi3,
  6814. #endif
  6815. .txrx_peer_delete = dp_peer_delete_wifi3,
  6816. .txrx_vdev_register = dp_vdev_register_wifi3,
  6817. .txrx_soc_detach = dp_soc_detach_wifi3,
  6818. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  6819. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  6820. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  6821. .txrx_ath_getstats = dp_get_device_stats,
  6822. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  6823. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  6824. .addba_resp_tx_completion = dp_addba_resp_tx_completion_wifi3,
  6825. .delba_process = dp_delba_process_wifi3,
  6826. .set_addba_response = dp_set_addba_response,
  6827. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  6828. .flush_cache_rx_queue = NULL,
  6829. /* TODO: get API's for dscp-tid need to be added*/
  6830. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  6831. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  6832. .txrx_stats_request = dp_txrx_stats_request,
  6833. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  6834. .txrx_get_pdev_id_frm_pdev = dp_get_pdev_id_frm_pdev,
  6835. .txrx_pdev_set_chan_noise_floor = dp_pdev_set_chan_noise_floor,
  6836. .txrx_set_nac = dp_set_nac,
  6837. .txrx_get_tx_pending = dp_get_tx_pending,
  6838. .txrx_set_pdev_tx_capture = dp_config_debug_sniffer,
  6839. .txrx_get_peer_mac_from_peer_id = dp_get_peer_mac_from_peer_id,
  6840. .display_stats = dp_txrx_dump_stats,
  6841. .txrx_soc_set_nss_cfg = dp_soc_set_nss_cfg_wifi3,
  6842. .txrx_soc_get_nss_cfg = dp_soc_get_nss_cfg_wifi3,
  6843. .txrx_intr_attach = dp_soc_interrupt_attach_wrapper,
  6844. .txrx_intr_detach = dp_soc_interrupt_detach,
  6845. .set_pn_check = dp_set_pn_check_wifi3,
  6846. .update_config_parameters = dp_update_config_parameters,
  6847. /* TODO: Add other functions */
  6848. .txrx_data_tx_cb_set = dp_txrx_data_tx_cb_set,
  6849. .get_dp_txrx_handle = dp_pdev_get_dp_txrx_handle,
  6850. .set_dp_txrx_handle = dp_pdev_set_dp_txrx_handle,
  6851. .get_soc_dp_txrx_handle = dp_soc_get_dp_txrx_handle,
  6852. .set_soc_dp_txrx_handle = dp_soc_set_dp_txrx_handle,
  6853. .txrx_set_ba_aging_timeout = dp_set_ba_aging_timeout,
  6854. .txrx_get_ba_aging_timeout = dp_get_ba_aging_timeout,
  6855. .tx_send = dp_tx_send,
  6856. .txrx_peer_reset_ast = dp_wds_reset_ast_wifi3,
  6857. .txrx_peer_reset_ast_table = dp_wds_reset_ast_table_wifi3,
  6858. .txrx_peer_flush_ast_table = dp_wds_flush_ast_table_wifi3,
  6859. .txrx_peer_map_attach = dp_peer_map_attach_wifi3,
  6860. .txrx_pdev_set_ctrl_pdev = dp_pdev_set_ctrl_pdev,
  6861. .txrx_get_os_rx_handles_from_vdev =
  6862. dp_get_os_rx_handles_from_vdev_wifi3,
  6863. .delba_tx_completion = dp_delba_tx_completion_wifi3,
  6864. };
  6865. static struct cdp_ctrl_ops dp_ops_ctrl = {
  6866. .txrx_peer_authorize = dp_peer_authorize,
  6867. #ifdef QCA_SUPPORT_SON
  6868. .txrx_set_inact_params = dp_set_inact_params,
  6869. .txrx_start_inact_timer = dp_start_inact_timer,
  6870. .txrx_set_overload = dp_set_overload,
  6871. .txrx_peer_is_inact = dp_peer_is_inact,
  6872. .txrx_mark_peer_inact = dp_mark_peer_inact,
  6873. #endif
  6874. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  6875. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  6876. #ifdef MESH_MODE_SUPPORT
  6877. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  6878. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  6879. #endif
  6880. .txrx_set_vdev_param = dp_set_vdev_param,
  6881. .txrx_peer_set_nawds = dp_peer_set_nawds,
  6882. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  6883. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  6884. .txrx_set_filter_neighbour_peers = dp_set_filter_neighbour_peers,
  6885. .txrx_update_filter_neighbour_peers =
  6886. dp_update_filter_neighbour_peers,
  6887. .txrx_get_sec_type = dp_get_sec_type,
  6888. /* TODO: Add other functions */
  6889. .txrx_wdi_event_sub = dp_wdi_event_sub,
  6890. .txrx_wdi_event_unsub = dp_wdi_event_unsub,
  6891. #ifdef WDI_EVENT_ENABLE
  6892. .txrx_get_pldev = dp_get_pldev,
  6893. #endif
  6894. .txrx_set_pdev_param = dp_set_pdev_param,
  6895. #ifdef ATH_SUPPORT_NAC_RSSI
  6896. .txrx_vdev_config_for_nac_rssi = dp_config_for_nac_rssi,
  6897. .txrx_vdev_get_neighbour_rssi = dp_vdev_get_neighbour_rssi,
  6898. #endif
  6899. .set_key = dp_set_michael_key,
  6900. };
  6901. static struct cdp_me_ops dp_ops_me = {
  6902. #ifdef ATH_SUPPORT_IQUE
  6903. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  6904. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  6905. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  6906. #endif
  6907. };
  6908. static struct cdp_mon_ops dp_ops_mon = {
  6909. .txrx_monitor_set_filter_ucast_data = NULL,
  6910. .txrx_monitor_set_filter_mcast_data = NULL,
  6911. .txrx_monitor_set_filter_non_data = NULL,
  6912. .txrx_monitor_get_filter_ucast_data = dp_vdev_get_filter_ucast_data,
  6913. .txrx_monitor_get_filter_mcast_data = dp_vdev_get_filter_mcast_data,
  6914. .txrx_monitor_get_filter_non_data = dp_vdev_get_filter_non_data,
  6915. .txrx_reset_monitor_mode = dp_reset_monitor_mode,
  6916. /* Added support for HK advance filter */
  6917. .txrx_set_advance_monitor_filter = dp_pdev_set_advance_monitor_filter,
  6918. };
  6919. static struct cdp_host_stats_ops dp_ops_host_stats = {
  6920. .txrx_per_peer_stats = dp_get_host_peer_stats,
  6921. .get_fw_peer_stats = dp_get_fw_peer_stats,
  6922. .get_htt_stats = dp_get_htt_stats,
  6923. .txrx_enable_enhanced_stats = dp_enable_enhanced_stats,
  6924. .txrx_disable_enhanced_stats = dp_disable_enhanced_stats,
  6925. .txrx_stats_publish = dp_txrx_stats_publish,
  6926. .txrx_get_vdev_stats = dp_txrx_get_vdev_stats,
  6927. .txrx_get_peer_stats = dp_txrx_get_peer_stats,
  6928. .txrx_reset_peer_stats = dp_txrx_reset_peer_stats,
  6929. /* TODO */
  6930. };
  6931. static struct cdp_raw_ops dp_ops_raw = {
  6932. /* TODO */
  6933. };
  6934. #ifdef CONFIG_WIN
  6935. static struct cdp_pflow_ops dp_ops_pflow = {
  6936. /* TODO */
  6937. };
  6938. #endif /* CONFIG_WIN */
  6939. #ifdef FEATURE_RUNTIME_PM
  6940. /**
  6941. * dp_runtime_suspend() - ensure DP is ready to runtime suspend
  6942. * @opaque_pdev: DP pdev context
  6943. *
  6944. * DP is ready to runtime suspend if there are no pending TX packets.
  6945. *
  6946. * Return: QDF_STATUS
  6947. */
  6948. static QDF_STATUS dp_runtime_suspend(struct cdp_pdev *opaque_pdev)
  6949. {
  6950. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6951. struct dp_soc *soc = pdev->soc;
  6952. /* Abort if there are any pending TX packets */
  6953. if (dp_get_tx_pending(opaque_pdev) > 0) {
  6954. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  6955. FL("Abort suspend due to pending TX packets"));
  6956. return QDF_STATUS_E_AGAIN;
  6957. }
  6958. if (soc->intr_mode == DP_INTR_POLL)
  6959. qdf_timer_stop(&soc->int_timer);
  6960. return QDF_STATUS_SUCCESS;
  6961. }
  6962. /**
  6963. * dp_runtime_resume() - ensure DP is ready to runtime resume
  6964. * @opaque_pdev: DP pdev context
  6965. *
  6966. * Resume DP for runtime PM.
  6967. *
  6968. * Return: QDF_STATUS
  6969. */
  6970. static QDF_STATUS dp_runtime_resume(struct cdp_pdev *opaque_pdev)
  6971. {
  6972. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6973. struct dp_soc *soc = pdev->soc;
  6974. void *hal_srng;
  6975. int i;
  6976. if (soc->intr_mode == DP_INTR_POLL)
  6977. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  6978. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  6979. hal_srng = soc->tcl_data_ring[i].hal_srng;
  6980. if (hal_srng) {
  6981. /* We actually only need to acquire the lock */
  6982. hal_srng_access_start(soc->hal_soc, hal_srng);
  6983. /* Update SRC ring head pointer for HW to send
  6984. all pending packets */
  6985. hal_srng_access_end(soc->hal_soc, hal_srng);
  6986. }
  6987. }
  6988. return QDF_STATUS_SUCCESS;
  6989. }
  6990. #endif /* FEATURE_RUNTIME_PM */
  6991. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  6992. {
  6993. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6994. struct dp_soc *soc = pdev->soc;
  6995. if (soc->intr_mode == DP_INTR_POLL)
  6996. qdf_timer_stop(&soc->int_timer);
  6997. return QDF_STATUS_SUCCESS;
  6998. }
  6999. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  7000. {
  7001. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  7002. struct dp_soc *soc = pdev->soc;
  7003. if (soc->intr_mode == DP_INTR_POLL)
  7004. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  7005. return QDF_STATUS_SUCCESS;
  7006. }
  7007. #ifndef CONFIG_WIN
  7008. static struct cdp_misc_ops dp_ops_misc = {
  7009. .tx_non_std = dp_tx_non_std,
  7010. .get_opmode = dp_get_opmode,
  7011. #ifdef FEATURE_RUNTIME_PM
  7012. .runtime_suspend = dp_runtime_suspend,
  7013. .runtime_resume = dp_runtime_resume,
  7014. #endif /* FEATURE_RUNTIME_PM */
  7015. .pkt_log_init = dp_pkt_log_init,
  7016. .pkt_log_con_service = dp_pkt_log_con_service,
  7017. };
  7018. static struct cdp_flowctl_ops dp_ops_flowctl = {
  7019. /* WIFI 3.0 DP implement as required. */
  7020. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  7021. .flow_pool_map_handler = dp_tx_flow_pool_map,
  7022. .flow_pool_unmap_handler = dp_tx_flow_pool_unmap,
  7023. .register_pause_cb = dp_txrx_register_pause_cb,
  7024. .dump_flow_pool_info = dp_tx_dump_flow_pool_info,
  7025. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  7026. };
  7027. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  7028. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  7029. };
  7030. #ifdef IPA_OFFLOAD
  7031. static struct cdp_ipa_ops dp_ops_ipa = {
  7032. .ipa_get_resource = dp_ipa_get_resource,
  7033. .ipa_set_doorbell_paddr = dp_ipa_set_doorbell_paddr,
  7034. .ipa_op_response = dp_ipa_op_response,
  7035. .ipa_register_op_cb = dp_ipa_register_op_cb,
  7036. .ipa_get_stat = dp_ipa_get_stat,
  7037. .ipa_tx_data_frame = dp_tx_send_ipa_data_frame,
  7038. .ipa_enable_autonomy = dp_ipa_enable_autonomy,
  7039. .ipa_disable_autonomy = dp_ipa_disable_autonomy,
  7040. .ipa_setup = dp_ipa_setup,
  7041. .ipa_cleanup = dp_ipa_cleanup,
  7042. .ipa_setup_iface = dp_ipa_setup_iface,
  7043. .ipa_cleanup_iface = dp_ipa_cleanup_iface,
  7044. .ipa_enable_pipes = dp_ipa_enable_pipes,
  7045. .ipa_disable_pipes = dp_ipa_disable_pipes,
  7046. .ipa_set_perf_level = dp_ipa_set_perf_level
  7047. };
  7048. #endif
  7049. static struct cdp_bus_ops dp_ops_bus = {
  7050. .bus_suspend = dp_bus_suspend,
  7051. .bus_resume = dp_bus_resume
  7052. };
  7053. static struct cdp_ocb_ops dp_ops_ocb = {
  7054. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  7055. };
  7056. static struct cdp_throttle_ops dp_ops_throttle = {
  7057. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  7058. };
  7059. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  7060. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  7061. };
  7062. static struct cdp_cfg_ops dp_ops_cfg = {
  7063. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  7064. };
  7065. /*
  7066. * dp_peer_get_ref_find_by_addr - get peer with addr by ref count inc
  7067. * @dev: physical device instance
  7068. * @peer_mac_addr: peer mac address
  7069. * @local_id: local id for the peer
  7070. * @debug_id: to track enum peer access
  7071. *
  7072. * Return: peer instance pointer
  7073. */
  7074. static inline void *
  7075. dp_peer_get_ref_find_by_addr(struct cdp_pdev *dev, u8 *peer_mac_addr,
  7076. u8 *local_id, enum peer_debug_id_type debug_id)
  7077. {
  7078. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  7079. struct dp_peer *peer;
  7080. peer = dp_peer_find_hash_find(pdev->soc, peer_mac_addr, 0, DP_VDEV_ALL);
  7081. if (!peer)
  7082. return NULL;
  7083. *local_id = peer->local_id;
  7084. DP_TRACE(INFO, "%s: peer %pK id %d", __func__, peer, *local_id);
  7085. return peer;
  7086. }
  7087. /*
  7088. * dp_peer_release_ref - release peer ref count
  7089. * @peer: peer handle
  7090. * @debug_id: to track enum peer access
  7091. *
  7092. * Return: None
  7093. */
  7094. static inline
  7095. void dp_peer_release_ref(void *peer, enum peer_debug_id_type debug_id)
  7096. {
  7097. dp_peer_unref_delete(peer);
  7098. }
  7099. static struct cdp_peer_ops dp_ops_peer = {
  7100. .register_peer = dp_register_peer,
  7101. .clear_peer = dp_clear_peer,
  7102. .find_peer_by_addr = dp_find_peer_by_addr,
  7103. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  7104. .peer_get_ref_by_addr = dp_peer_get_ref_find_by_addr,
  7105. .peer_release_ref = dp_peer_release_ref,
  7106. .local_peer_id = dp_local_peer_id,
  7107. .peer_find_by_local_id = dp_peer_find_by_local_id,
  7108. .peer_state_update = dp_peer_state_update,
  7109. .get_vdevid = dp_get_vdevid,
  7110. .get_vdev_by_sta_id = dp_get_vdev_by_sta_id,
  7111. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  7112. .get_vdev_for_peer = dp_get_vdev_for_peer,
  7113. .get_peer_state = dp_get_peer_state,
  7114. };
  7115. #endif
  7116. static struct cdp_ops dp_txrx_ops = {
  7117. .cmn_drv_ops = &dp_ops_cmn,
  7118. .ctrl_ops = &dp_ops_ctrl,
  7119. .me_ops = &dp_ops_me,
  7120. .mon_ops = &dp_ops_mon,
  7121. .host_stats_ops = &dp_ops_host_stats,
  7122. .wds_ops = &dp_ops_wds,
  7123. .raw_ops = &dp_ops_raw,
  7124. #ifdef CONFIG_WIN
  7125. .pflow_ops = &dp_ops_pflow,
  7126. #endif /* CONFIG_WIN */
  7127. #ifndef CONFIG_WIN
  7128. .misc_ops = &dp_ops_misc,
  7129. .cfg_ops = &dp_ops_cfg,
  7130. .flowctl_ops = &dp_ops_flowctl,
  7131. .l_flowctl_ops = &dp_ops_l_flowctl,
  7132. #ifdef IPA_OFFLOAD
  7133. .ipa_ops = &dp_ops_ipa,
  7134. #endif
  7135. .bus_ops = &dp_ops_bus,
  7136. .ocb_ops = &dp_ops_ocb,
  7137. .peer_ops = &dp_ops_peer,
  7138. .throttle_ops = &dp_ops_throttle,
  7139. .mob_stats_ops = &dp_ops_mob_stats,
  7140. #endif
  7141. };
  7142. /*
  7143. * dp_soc_set_txrx_ring_map()
  7144. * @dp_soc: DP handler for soc
  7145. *
  7146. * Return: Void
  7147. */
  7148. static void dp_soc_set_txrx_ring_map(struct dp_soc *soc)
  7149. {
  7150. uint32_t i;
  7151. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  7152. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_DEFAULT_MAP][i];
  7153. }
  7154. }
  7155. #ifdef QCA_WIFI_QCA8074
  7156. /**
  7157. * dp_soc_attach_wifi3() - Attach txrx SOC
  7158. * @ctrl_psoc: Opaque SOC handle from control plane
  7159. * @htc_handle: Opaque HTC handle
  7160. * @hif_handle: Opaque HIF handle
  7161. * @qdf_osdev: QDF device
  7162. * @ol_ops: Offload Operations
  7163. * @device_id: Device ID
  7164. *
  7165. * Return: DP SOC handle on success, NULL on failure
  7166. */
  7167. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  7168. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  7169. struct ol_if_ops *ol_ops, uint16_t device_id)
  7170. {
  7171. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  7172. int target_type;
  7173. if (!soc) {
  7174. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7175. FL("DP SOC memory allocation failed"));
  7176. goto fail0;
  7177. }
  7178. soc->device_id = device_id;
  7179. soc->cdp_soc.ops = &dp_txrx_ops;
  7180. soc->cdp_soc.ol_ops = ol_ops;
  7181. soc->ctrl_psoc = ctrl_psoc;
  7182. soc->osdev = qdf_osdev;
  7183. soc->hif_handle = hif_handle;
  7184. soc->hal_soc = hif_get_hal_handle(hif_handle);
  7185. soc->htt_handle = htt_soc_attach(soc, ctrl_psoc, htc_handle,
  7186. soc->hal_soc, qdf_osdev);
  7187. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_MAPS;
  7188. if (!soc->htt_handle) {
  7189. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7190. FL("HTT attach failed"));
  7191. goto fail1;
  7192. }
  7193. soc->wlan_cfg_ctx = wlan_cfg_soc_attach(soc->ctrl_psoc);
  7194. if (!soc->wlan_cfg_ctx) {
  7195. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7196. FL("wlan_cfg_soc_attach failed"));
  7197. goto fail2;
  7198. }
  7199. target_type = hal_get_target_type(soc->hal_soc);
  7200. switch (target_type) {
  7201. case TARGET_TYPE_QCA6290:
  7202. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  7203. REO_DST_RING_SIZE_QCA6290);
  7204. soc->ast_override_support = 1;
  7205. break;
  7206. #ifdef QCA_WIFI_QCA6390
  7207. case TARGET_TYPE_QCA6390:
  7208. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  7209. REO_DST_RING_SIZE_QCA6290);
  7210. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, true);
  7211. soc->ast_override_support = 1;
  7212. break;
  7213. #endif
  7214. case TARGET_TYPE_QCA8074:
  7215. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  7216. REO_DST_RING_SIZE_QCA8074);
  7217. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, true);
  7218. soc->hw_nac_monitor_support = 1;
  7219. break;
  7220. case TARGET_TYPE_QCA8074V2:
  7221. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  7222. REO_DST_RING_SIZE_QCA8074);
  7223. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, false);
  7224. soc->hw_nac_monitor_support = 1;
  7225. soc->ast_override_support = 1;
  7226. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_V2_MAPS;
  7227. break;
  7228. default:
  7229. qdf_print("%s: Unknown tgt type %d\n", __func__, target_type);
  7230. qdf_assert_always(0);
  7231. break;
  7232. }
  7233. wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx,
  7234. cfg_get(ctrl_psoc, CFG_DP_RX_HASH));
  7235. soc->cce_disable = false;
  7236. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  7237. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  7238. CDP_CFG_MAX_PEER_ID);
  7239. if (ret != -EINVAL) {
  7240. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  7241. }
  7242. ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  7243. CDP_CFG_CCE_DISABLE);
  7244. if (ret == 1)
  7245. soc->cce_disable = true;
  7246. }
  7247. qdf_spinlock_create(&soc->peer_ref_mutex);
  7248. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  7249. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  7250. /* fill the tx/rx cpu ring map*/
  7251. dp_soc_set_txrx_ring_map(soc);
  7252. qdf_spinlock_create(&soc->htt_stats.lock);
  7253. /* initialize work queue for stats processing */
  7254. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  7255. /*Initialize inactivity timer for wifison */
  7256. dp_init_inact_timer(soc);
  7257. return (void *)soc;
  7258. fail2:
  7259. htt_soc_detach(soc->htt_handle);
  7260. fail1:
  7261. qdf_mem_free(soc);
  7262. fail0:
  7263. return NULL;
  7264. }
  7265. #endif
  7266. /*
  7267. * dp_get_pdev_for_mac_id() - Return pdev for mac_id
  7268. *
  7269. * @soc: handle to DP soc
  7270. * @mac_id: MAC id
  7271. *
  7272. * Return: Return pdev corresponding to MAC
  7273. */
  7274. void *dp_get_pdev_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  7275. {
  7276. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  7277. return soc->pdev_list[mac_id];
  7278. /* Typically for MCL as there only 1 PDEV*/
  7279. return soc->pdev_list[0];
  7280. }
  7281. /*
  7282. * dp_is_hw_dbs_enable() - Procedure to check if DBS is supported
  7283. * @soc: DP SoC context
  7284. * @max_mac_rings: No of MAC rings
  7285. *
  7286. * Return: None
  7287. */
  7288. static
  7289. void dp_is_hw_dbs_enable(struct dp_soc *soc,
  7290. int *max_mac_rings)
  7291. {
  7292. bool dbs_enable = false;
  7293. if (soc->cdp_soc.ol_ops->is_hw_dbs_2x2_capable)
  7294. dbs_enable = soc->cdp_soc.ol_ops->
  7295. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  7296. *max_mac_rings = (dbs_enable)?(*max_mac_rings):1;
  7297. }
  7298. /*
  7299. * dp_set_pktlog_wifi3() - attach txrx vdev
  7300. * @pdev: Datapath PDEV handle
  7301. * @event: which event's notifications are being subscribed to
  7302. * @enable: WDI event subscribe or not. (True or False)
  7303. *
  7304. * Return: Success, NULL on failure
  7305. */
  7306. #ifdef WDI_EVENT_ENABLE
  7307. int dp_set_pktlog_wifi3(struct dp_pdev *pdev, uint32_t event,
  7308. bool enable)
  7309. {
  7310. struct dp_soc *soc = pdev->soc;
  7311. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  7312. int max_mac_rings = wlan_cfg_get_num_mac_rings
  7313. (pdev->wlan_cfg_ctx);
  7314. uint8_t mac_id = 0;
  7315. dp_is_hw_dbs_enable(soc, &max_mac_rings);
  7316. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  7317. FL("Max_mac_rings %d "),
  7318. max_mac_rings);
  7319. if (enable) {
  7320. switch (event) {
  7321. case WDI_EVENT_RX_DESC:
  7322. if (pdev->monitor_vdev) {
  7323. /* Nothing needs to be done if monitor mode is
  7324. * enabled
  7325. */
  7326. return 0;
  7327. }
  7328. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_FULL) {
  7329. pdev->rx_pktlog_mode = DP_RX_PKTLOG_FULL;
  7330. htt_tlv_filter.mpdu_start = 1;
  7331. htt_tlv_filter.msdu_start = 1;
  7332. htt_tlv_filter.msdu_end = 1;
  7333. htt_tlv_filter.mpdu_end = 1;
  7334. htt_tlv_filter.packet_header = 1;
  7335. htt_tlv_filter.attention = 1;
  7336. htt_tlv_filter.ppdu_start = 1;
  7337. htt_tlv_filter.ppdu_end = 1;
  7338. htt_tlv_filter.ppdu_end_user_stats = 1;
  7339. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  7340. htt_tlv_filter.ppdu_end_status_done = 1;
  7341. htt_tlv_filter.enable_fp = 1;
  7342. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  7343. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  7344. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  7345. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  7346. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  7347. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  7348. for (mac_id = 0; mac_id < max_mac_rings;
  7349. mac_id++) {
  7350. int mac_for_pdev =
  7351. dp_get_mac_id_for_pdev(mac_id,
  7352. pdev->pdev_id);
  7353. htt_h2t_rx_ring_cfg(soc->htt_handle,
  7354. mac_for_pdev,
  7355. pdev->rxdma_mon_status_ring[mac_id]
  7356. .hal_srng,
  7357. RXDMA_MONITOR_STATUS,
  7358. RX_BUFFER_SIZE,
  7359. &htt_tlv_filter);
  7360. }
  7361. if (soc->reap_timer_init)
  7362. qdf_timer_mod(&soc->mon_reap_timer,
  7363. DP_INTR_POLL_TIMER_MS);
  7364. }
  7365. break;
  7366. case WDI_EVENT_LITE_RX:
  7367. if (pdev->monitor_vdev) {
  7368. /* Nothing needs to be done if monitor mode is
  7369. * enabled
  7370. */
  7371. return 0;
  7372. }
  7373. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_LITE) {
  7374. pdev->rx_pktlog_mode = DP_RX_PKTLOG_LITE;
  7375. htt_tlv_filter.ppdu_start = 1;
  7376. htt_tlv_filter.ppdu_end = 1;
  7377. htt_tlv_filter.ppdu_end_user_stats = 1;
  7378. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  7379. htt_tlv_filter.ppdu_end_status_done = 1;
  7380. htt_tlv_filter.mpdu_start = 1;
  7381. htt_tlv_filter.enable_fp = 1;
  7382. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  7383. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  7384. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  7385. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  7386. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  7387. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  7388. for (mac_id = 0; mac_id < max_mac_rings;
  7389. mac_id++) {
  7390. int mac_for_pdev =
  7391. dp_get_mac_id_for_pdev(mac_id,
  7392. pdev->pdev_id);
  7393. htt_h2t_rx_ring_cfg(soc->htt_handle,
  7394. mac_for_pdev,
  7395. pdev->rxdma_mon_status_ring[mac_id]
  7396. .hal_srng,
  7397. RXDMA_MONITOR_STATUS,
  7398. RX_BUFFER_SIZE_PKTLOG_LITE,
  7399. &htt_tlv_filter);
  7400. }
  7401. if (soc->reap_timer_init)
  7402. qdf_timer_mod(&soc->mon_reap_timer,
  7403. DP_INTR_POLL_TIMER_MS);
  7404. }
  7405. break;
  7406. case WDI_EVENT_LITE_T2H:
  7407. if (pdev->monitor_vdev) {
  7408. /* Nothing needs to be done if monitor mode is
  7409. * enabled
  7410. */
  7411. return 0;
  7412. }
  7413. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  7414. int mac_for_pdev = dp_get_mac_id_for_pdev(
  7415. mac_id, pdev->pdev_id);
  7416. pdev->pktlog_ppdu_stats = true;
  7417. dp_h2t_cfg_stats_msg_send(pdev,
  7418. DP_PPDU_TXLITE_STATS_BITMASK_CFG,
  7419. mac_for_pdev);
  7420. }
  7421. break;
  7422. default:
  7423. /* Nothing needs to be done for other pktlog types */
  7424. break;
  7425. }
  7426. } else {
  7427. switch (event) {
  7428. case WDI_EVENT_RX_DESC:
  7429. case WDI_EVENT_LITE_RX:
  7430. if (pdev->monitor_vdev) {
  7431. /* Nothing needs to be done if monitor mode is
  7432. * enabled
  7433. */
  7434. return 0;
  7435. }
  7436. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_DISABLED) {
  7437. pdev->rx_pktlog_mode = DP_RX_PKTLOG_DISABLED;
  7438. for (mac_id = 0; mac_id < max_mac_rings;
  7439. mac_id++) {
  7440. int mac_for_pdev =
  7441. dp_get_mac_id_for_pdev(mac_id,
  7442. pdev->pdev_id);
  7443. htt_h2t_rx_ring_cfg(soc->htt_handle,
  7444. mac_for_pdev,
  7445. pdev->rxdma_mon_status_ring[mac_id]
  7446. .hal_srng,
  7447. RXDMA_MONITOR_STATUS,
  7448. RX_BUFFER_SIZE,
  7449. &htt_tlv_filter);
  7450. }
  7451. if (soc->reap_timer_init)
  7452. qdf_timer_stop(&soc->mon_reap_timer);
  7453. }
  7454. break;
  7455. case WDI_EVENT_LITE_T2H:
  7456. if (pdev->monitor_vdev) {
  7457. /* Nothing needs to be done if monitor mode is
  7458. * enabled
  7459. */
  7460. return 0;
  7461. }
  7462. /* To disable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  7463. * passing value 0. Once these macros will define in htt
  7464. * header file will use proper macros
  7465. */
  7466. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  7467. int mac_for_pdev =
  7468. dp_get_mac_id_for_pdev(mac_id,
  7469. pdev->pdev_id);
  7470. pdev->pktlog_ppdu_stats = false;
  7471. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  7472. dp_h2t_cfg_stats_msg_send(pdev, 0,
  7473. mac_for_pdev);
  7474. } else if (pdev->tx_sniffer_enable || pdev->mcopy_mode) {
  7475. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_SNIFFER,
  7476. mac_for_pdev);
  7477. } else if (pdev->enhanced_stats_en) {
  7478. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS,
  7479. mac_for_pdev);
  7480. }
  7481. }
  7482. break;
  7483. default:
  7484. /* Nothing needs to be done for other pktlog types */
  7485. break;
  7486. }
  7487. }
  7488. return 0;
  7489. }
  7490. #endif