cvp_hfi.c 108 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <asm/memory.h>
  6. #include <linux/coresight-stm.h>
  7. #include <linux/delay.h>
  8. #include <linux/devfreq.h>
  9. #include <linux/hash.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/io.h>
  12. #include <linux/iommu.h>
  13. #include <linux/iopoll.h>
  14. #include <linux/of.h>
  15. #include <linux/pm_qos.h>
  16. #include <linux/regulator/consumer.h>
  17. #include <linux/slab.h>
  18. #include <linux/workqueue.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/soc/qcom/llcc-qcom.h>
  21. #include <linux/qcom_scm.h>
  22. #include <linux/soc/qcom/smem.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/reset.h>
  25. #include "hfi_packetization.h"
  26. #include "msm_cvp_debug.h"
  27. #include "cvp_core_hfi.h"
  28. #include "cvp_hfi_helper.h"
  29. #include "cvp_hfi_io.h"
  30. #include "msm_cvp_dsp.h"
  31. #include "msm_cvp_clocks.h"
  32. #define FIRMWARE_SIZE 0X00A00000
  33. #define REG_ADDR_OFFSET_BITMASK 0x000FFFFF
  34. #define QDSS_IOVA_START 0x80001000
  35. #define MIN_PAYLOAD_SIZE 3
  36. struct cvp_tzbsp_memprot {
  37. u32 cp_start;
  38. u32 cp_size;
  39. u32 cp_nonpixel_start;
  40. u32 cp_nonpixel_size;
  41. };
  42. #define TZBSP_PIL_SET_STATE 0xA
  43. #define TZBSP_CVP_PAS_ID 26
  44. /* Poll interval in uS */
  45. #define POLL_INTERVAL_US 50
  46. enum tzbsp_subsys_state {
  47. TZ_SUBSYS_STATE_SUSPEND = 0,
  48. TZ_SUBSYS_STATE_RESUME = 1,
  49. TZ_SUBSYS_STATE_RESTORE_THRESHOLD = 2,
  50. };
  51. const struct msm_cvp_gov_data CVP_DEFAULT_BUS_VOTE = {
  52. .data = NULL,
  53. .data_count = 0,
  54. };
  55. const int cvp_max_packets = 32;
  56. static void iris_hfi_pm_handler(struct work_struct *work);
  57. static DECLARE_DELAYED_WORK(iris_hfi_pm_work, iris_hfi_pm_handler);
  58. static inline int __resume(struct iris_hfi_device *device);
  59. static inline int __suspend(struct iris_hfi_device *device);
  60. static int __disable_regulators(struct iris_hfi_device *device);
  61. static int __enable_regulators(struct iris_hfi_device *device);
  62. static void __flush_debug_queue(struct iris_hfi_device *device, u8 *packet);
  63. static int __initialize_packetization(struct iris_hfi_device *device);
  64. static struct cvp_hal_session *__get_session(struct iris_hfi_device *device,
  65. u32 session_id);
  66. static bool __is_session_valid(struct iris_hfi_device *device,
  67. struct cvp_hal_session *session, const char *func);
  68. static int __iface_cmdq_write(struct iris_hfi_device *device,
  69. void *pkt);
  70. static int __load_fw(struct iris_hfi_device *device);
  71. static void __unload_fw(struct iris_hfi_device *device);
  72. static int __tzbsp_set_cvp_state(enum tzbsp_subsys_state state);
  73. static int __enable_subcaches(struct iris_hfi_device *device);
  74. static int __set_subcaches(struct iris_hfi_device *device);
  75. static int __release_subcaches(struct iris_hfi_device *device);
  76. static int __disable_subcaches(struct iris_hfi_device *device);
  77. static int __power_collapse(struct iris_hfi_device *device, bool force);
  78. static int iris_hfi_noc_error_info(void *dev);
  79. static void interrupt_init_iris2(struct iris_hfi_device *device);
  80. static void setup_dsp_uc_memmap_vpu5(struct iris_hfi_device *device);
  81. static void clock_config_on_enable_vpu5(struct iris_hfi_device *device);
  82. static int reset_ahb2axi_bridge(struct iris_hfi_device *device);
  83. static void power_off_iris2(struct iris_hfi_device *device);
  84. static int __set_ubwc_config(struct iris_hfi_device *device);
  85. static void __noc_error_info_iris2(struct iris_hfi_device *device);
  86. static int __enable_hw_power_collapse(struct iris_hfi_device *device);
  87. static struct iris_hfi_vpu_ops iris2_ops = {
  88. .interrupt_init = interrupt_init_iris2,
  89. .setup_dsp_uc_memmap = setup_dsp_uc_memmap_vpu5,
  90. .clock_config_on_enable = clock_config_on_enable_vpu5,
  91. .reset_ahb2axi_bridge = reset_ahb2axi_bridge,
  92. .power_off = power_off_iris2,
  93. .noc_error_info = __noc_error_info_iris2,
  94. };
  95. /**
  96. * Utility function to enforce some of our assumptions. Spam calls to this
  97. * in hotspots in code to double check some of the assumptions that we hold.
  98. */
  99. static inline void __strict_check(struct iris_hfi_device *device)
  100. {
  101. msm_cvp_res_handle_fatal_hw_error(device->res,
  102. !mutex_is_locked(&device->lock));
  103. }
  104. static inline void __set_state(struct iris_hfi_device *device,
  105. enum iris_hfi_state state)
  106. {
  107. device->state = state;
  108. }
  109. static inline bool __core_in_valid_state(struct iris_hfi_device *device)
  110. {
  111. return device->state != IRIS_STATE_DEINIT;
  112. }
  113. static inline bool is_sys_cache_present(struct iris_hfi_device *device)
  114. {
  115. return device->res->sys_cache_present;
  116. }
  117. #define ROW_SIZE 32
  118. int get_hfi_version(void)
  119. {
  120. struct msm_cvp_core *core;
  121. struct iris_hfi_device *hfi;
  122. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  123. hfi = (struct iris_hfi_device *)core->device->hfi_device_data;
  124. return hfi->version;
  125. }
  126. unsigned int get_msg_size(struct cvp_hfi_msg_session_hdr *hdr)
  127. {
  128. struct msm_cvp_core *core;
  129. struct iris_hfi_device *device;
  130. u32 minor_ver;
  131. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  132. if (core)
  133. device = core->device->hfi_device_data;
  134. else
  135. return 0;
  136. if (!device) {
  137. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  138. return 0;
  139. }
  140. minor_ver = (device->version & HFI_VERSION_MINOR_MASK) >>
  141. HFI_VERSION_MINOR_SHIFT;
  142. if (minor_ver < 2)
  143. return sizeof(struct cvp_hfi_msg_session_hdr);
  144. if (hdr->packet_type == HFI_MSG_SESSION_CVP_FD)
  145. return sizeof(struct cvp_hfi_msg_session_hdr_ext);
  146. else
  147. return sizeof(struct cvp_hfi_msg_session_hdr);
  148. }
  149. unsigned int get_msg_session_id(void *msg)
  150. {
  151. struct cvp_hfi_msg_session_hdr *hdr =
  152. (struct cvp_hfi_msg_session_hdr *)msg;
  153. return hdr->session_id;
  154. }
  155. unsigned int get_msg_errorcode(void *msg)
  156. {
  157. struct cvp_hfi_msg_session_hdr *hdr =
  158. (struct cvp_hfi_msg_session_hdr *)msg;
  159. return hdr->error_type;
  160. }
  161. int get_msg_opconfigs(void *msg, unsigned int *session_id,
  162. unsigned int *error_type, unsigned int *config_id)
  163. {
  164. struct cvp_hfi_msg_session_op_cfg_packet *cfg =
  165. (struct cvp_hfi_msg_session_op_cfg_packet *)msg;
  166. *session_id = cfg->session_id;
  167. *error_type = cfg->error_type;
  168. *config_id = cfg->op_conf_id;
  169. return 0;
  170. }
  171. static void __dump_packet(u8 *packet, enum cvp_msg_prio log_level)
  172. {
  173. u32 c = 0, packet_size = *(u32 *)packet;
  174. /*
  175. * row must contain enough for 0xdeadbaad * 8 to be converted into
  176. * "de ad ba ab " * 8 + '\0'
  177. */
  178. char row[3 * ROW_SIZE];
  179. for (c = 0; c * ROW_SIZE < packet_size; ++c) {
  180. int bytes_to_read = ((c + 1) * ROW_SIZE > packet_size) ?
  181. packet_size % ROW_SIZE : ROW_SIZE;
  182. hex_dump_to_buffer(packet + c * ROW_SIZE, bytes_to_read,
  183. ROW_SIZE, 4, row, sizeof(row), false);
  184. dprintk(log_level, "%s\n", row);
  185. }
  186. }
  187. static int __dsp_suspend(struct iris_hfi_device *device, bool force, u32 flags)
  188. {
  189. int rc;
  190. struct cvp_hal_session *temp;
  191. if (msm_cvp_dsp_disable)
  192. return 0;
  193. list_for_each_entry(temp, &device->sess_head, list) {
  194. /* if forceful suspend, don't check session pause info */
  195. if (force)
  196. continue;
  197. /* don't suspend if cvp session is not paused */
  198. if (!(temp->flags & SESSION_PAUSE)) {
  199. dprintk(CVP_DSP,
  200. "%s: cvp session %x not paused\n",
  201. __func__, hash32_ptr(temp));
  202. return -EBUSY;
  203. }
  204. }
  205. dprintk(CVP_DSP, "%s: suspend dsp\n", __func__);
  206. rc = cvp_dsp_suspend(flags);
  207. if (rc) {
  208. dprintk(CVP_ERR, "%s: dsp suspend failed with error %d\n",
  209. __func__, rc);
  210. return -EINVAL;
  211. }
  212. dprintk(CVP_DSP, "%s: dsp suspended\n", __func__);
  213. return 0;
  214. }
  215. static int __dsp_resume(struct iris_hfi_device *device, u32 flags)
  216. {
  217. int rc;
  218. if (msm_cvp_dsp_disable)
  219. return 0;
  220. dprintk(CVP_DSP, "%s: resume dsp\n", __func__);
  221. rc = cvp_dsp_resume(flags);
  222. if (rc) {
  223. dprintk(CVP_ERR,
  224. "%s: dsp resume failed with error %d\n",
  225. __func__, rc);
  226. return rc;
  227. }
  228. dprintk(CVP_DSP, "%s: dsp resumed\n", __func__);
  229. return rc;
  230. }
  231. static int __dsp_shutdown(struct iris_hfi_device *device, u32 flags)
  232. {
  233. int rc;
  234. if (msm_cvp_dsp_disable)
  235. return 0;
  236. dprintk(CVP_DSP, "%s: shutdown dsp\n", __func__);
  237. rc = cvp_dsp_shutdown(flags);
  238. if (rc) {
  239. dprintk(CVP_ERR,
  240. "%s: dsp shutdown failed with error %d\n",
  241. __func__, rc);
  242. WARN_ON(1);
  243. }
  244. dprintk(CVP_DSP, "%s: dsp shutdown successful\n", __func__);
  245. return rc;
  246. }
  247. static int __acquire_regulator(struct regulator_info *rinfo,
  248. struct iris_hfi_device *device)
  249. {
  250. int rc = 0;
  251. if (rinfo->has_hw_power_collapse) {
  252. rc = regulator_set_mode(rinfo->regulator,
  253. REGULATOR_MODE_NORMAL);
  254. if (rc) {
  255. /*
  256. * This is somewhat fatal, but nothing we can do
  257. * about it. We can't disable the regulator w/o
  258. * getting it back under s/w control
  259. */
  260. dprintk(CVP_WARN,
  261. "Failed to acquire regulator control: %s\n",
  262. rinfo->name);
  263. } else {
  264. dprintk(CVP_PWR,
  265. "Acquire regulator control from HW: %s\n",
  266. rinfo->name);
  267. }
  268. }
  269. if (!regulator_is_enabled(rinfo->regulator)) {
  270. dprintk(CVP_WARN, "Regulator is not enabled %s\n",
  271. rinfo->name);
  272. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  273. }
  274. return rc;
  275. }
  276. static int __hand_off_regulator(struct regulator_info *rinfo)
  277. {
  278. int rc = 0;
  279. if (rinfo->has_hw_power_collapse) {
  280. rc = regulator_set_mode(rinfo->regulator,
  281. REGULATOR_MODE_FAST);
  282. if (rc) {
  283. dprintk(CVP_WARN,
  284. "Failed to hand off regulator control: %s\n",
  285. rinfo->name);
  286. } else {
  287. dprintk(CVP_PWR,
  288. "Hand off regulator control to HW: %s\n",
  289. rinfo->name);
  290. }
  291. }
  292. return rc;
  293. }
  294. static int __hand_off_regulators(struct iris_hfi_device *device)
  295. {
  296. struct regulator_info *rinfo;
  297. int rc = 0, c = 0;
  298. iris_hfi_for_each_regulator(device, rinfo) {
  299. rc = __hand_off_regulator(rinfo);
  300. /*
  301. * If one regulator hand off failed, driver should take
  302. * the control for other regulators back.
  303. */
  304. if (rc)
  305. goto err_reg_handoff_failed;
  306. c++;
  307. }
  308. return rc;
  309. err_reg_handoff_failed:
  310. iris_hfi_for_each_regulator_reverse_continue(device, rinfo, c)
  311. __acquire_regulator(rinfo, device);
  312. return rc;
  313. }
  314. static int __write_queue(struct cvp_iface_q_info *qinfo, u8 *packet,
  315. bool *rx_req_is_set)
  316. {
  317. struct cvp_hfi_queue_header *queue;
  318. u32 packet_size_in_words, new_write_idx;
  319. u32 empty_space, read_idx, write_idx;
  320. u32 *write_ptr;
  321. if (!qinfo || !packet) {
  322. dprintk(CVP_ERR, "Invalid Params\n");
  323. return -EINVAL;
  324. } else if (!qinfo->q_array.align_virtual_addr) {
  325. dprintk(CVP_WARN, "Queues have already been freed\n");
  326. return -EINVAL;
  327. }
  328. queue = (struct cvp_hfi_queue_header *) qinfo->q_hdr;
  329. if (!queue) {
  330. dprintk(CVP_ERR, "queue not present\n");
  331. return -ENOENT;
  332. }
  333. if (msm_cvp_debug & CVP_PKT) {
  334. dprintk(CVP_PKT, "%s: %pK\n", __func__, qinfo);
  335. __dump_packet(packet, CVP_PKT);
  336. }
  337. packet_size_in_words = (*(u32 *)packet) >> 2;
  338. if (!packet_size_in_words || packet_size_in_words >
  339. qinfo->q_array.mem_size>>2) {
  340. dprintk(CVP_ERR, "Invalid packet size\n");
  341. return -ENODATA;
  342. }
  343. spin_lock(&qinfo->hfi_lock);
  344. read_idx = queue->qhdr_read_idx;
  345. write_idx = queue->qhdr_write_idx;
  346. empty_space = (write_idx >= read_idx) ?
  347. ((qinfo->q_array.mem_size>>2) - (write_idx - read_idx)) :
  348. (read_idx - write_idx);
  349. if (empty_space <= packet_size_in_words) {
  350. queue->qhdr_tx_req = 1;
  351. spin_unlock(&qinfo->hfi_lock);
  352. dprintk(CVP_ERR, "Insufficient size (%d) to write (%d)\n",
  353. empty_space, packet_size_in_words);
  354. return -ENOTEMPTY;
  355. }
  356. queue->qhdr_tx_req = 0;
  357. new_write_idx = write_idx + packet_size_in_words;
  358. write_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) +
  359. (write_idx << 2));
  360. if (write_ptr < (u32 *)qinfo->q_array.align_virtual_addr ||
  361. write_ptr > (u32 *)(qinfo->q_array.align_virtual_addr +
  362. qinfo->q_array.mem_size)) {
  363. spin_unlock(&qinfo->hfi_lock);
  364. dprintk(CVP_ERR, "Invalid write index\n");
  365. return -ENODATA;
  366. }
  367. if (new_write_idx < (qinfo->q_array.mem_size >> 2)) {
  368. memcpy(write_ptr, packet, packet_size_in_words << 2);
  369. } else {
  370. new_write_idx -= qinfo->q_array.mem_size >> 2;
  371. memcpy(write_ptr, packet, (packet_size_in_words -
  372. new_write_idx) << 2);
  373. memcpy((void *)qinfo->q_array.align_virtual_addr,
  374. packet + ((packet_size_in_words - new_write_idx) << 2),
  375. new_write_idx << 2);
  376. }
  377. /*
  378. * Memory barrier to make sure packet is written before updating the
  379. * write index
  380. */
  381. mb();
  382. queue->qhdr_write_idx = new_write_idx;
  383. if (rx_req_is_set)
  384. *rx_req_is_set = queue->qhdr_rx_req == 1;
  385. /*
  386. * Memory barrier to make sure write index is updated before an
  387. * interrupt is raised.
  388. */
  389. mb();
  390. spin_unlock(&qinfo->hfi_lock);
  391. return 0;
  392. }
  393. static int __read_queue(struct cvp_iface_q_info *qinfo, u8 *packet,
  394. u32 *pb_tx_req_is_set)
  395. {
  396. struct cvp_hfi_queue_header *queue;
  397. u32 packet_size_in_words, new_read_idx;
  398. u32 *read_ptr;
  399. u32 receive_request = 0;
  400. u32 read_idx, write_idx;
  401. int rc = 0;
  402. if (!qinfo || !packet || !pb_tx_req_is_set) {
  403. dprintk(CVP_ERR, "Invalid Params\n");
  404. return -EINVAL;
  405. } else if (!qinfo->q_array.align_virtual_addr) {
  406. dprintk(CVP_WARN, "Queues have already been freed\n");
  407. return -EINVAL;
  408. }
  409. /*
  410. * Memory barrier to make sure data is valid before
  411. *reading it
  412. */
  413. mb();
  414. queue = (struct cvp_hfi_queue_header *) qinfo->q_hdr;
  415. if (!queue) {
  416. dprintk(CVP_ERR, "Queue memory is not allocated\n");
  417. return -ENOMEM;
  418. }
  419. /*
  420. * Do not set receive request for debug queue, if set,
  421. * Iris generates interrupt for debug messages even
  422. * when there is no response message available.
  423. * In general debug queue will not become full as it
  424. * is being emptied out for every interrupt from Iris.
  425. * Iris will anyway generates interrupt if it is full.
  426. */
  427. spin_lock(&qinfo->hfi_lock);
  428. if (queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_MSG_Q)
  429. receive_request = 1;
  430. read_idx = queue->qhdr_read_idx;
  431. write_idx = queue->qhdr_write_idx;
  432. if (read_idx == write_idx) {
  433. queue->qhdr_rx_req = receive_request;
  434. /*
  435. * mb() to ensure qhdr is updated in main memory
  436. * so that iris reads the updated header values
  437. */
  438. mb();
  439. *pb_tx_req_is_set = 0;
  440. if (write_idx != queue->qhdr_write_idx) {
  441. queue->qhdr_rx_req = 0;
  442. } else {
  443. spin_unlock(&qinfo->hfi_lock);
  444. dprintk(CVP_HFI,
  445. "%s queue is empty, rx_req = %u, tx_req = %u, read_idx = %u\n",
  446. receive_request ? "message" : "debug",
  447. queue->qhdr_rx_req, queue->qhdr_tx_req,
  448. queue->qhdr_read_idx);
  449. return -ENODATA;
  450. }
  451. }
  452. read_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) +
  453. (read_idx << 2));
  454. if (read_ptr < (u32 *)qinfo->q_array.align_virtual_addr ||
  455. read_ptr > (u32 *)(qinfo->q_array.align_virtual_addr +
  456. qinfo->q_array.mem_size - sizeof(*read_ptr))) {
  457. spin_unlock(&qinfo->hfi_lock);
  458. dprintk(CVP_ERR, "Invalid read index\n");
  459. return -ENODATA;
  460. }
  461. packet_size_in_words = (*read_ptr) >> 2;
  462. if (!packet_size_in_words) {
  463. spin_unlock(&qinfo->hfi_lock);
  464. dprintk(CVP_ERR, "Zero packet size\n");
  465. return -ENODATA;
  466. }
  467. new_read_idx = read_idx + packet_size_in_words;
  468. if (((packet_size_in_words << 2) <= CVP_IFACEQ_VAR_HUGE_PKT_SIZE)
  469. && read_idx <= (qinfo->q_array.mem_size >> 2)) {
  470. if (new_read_idx < (qinfo->q_array.mem_size >> 2)) {
  471. memcpy(packet, read_ptr,
  472. packet_size_in_words << 2);
  473. } else {
  474. new_read_idx -= (qinfo->q_array.mem_size >> 2);
  475. memcpy(packet, read_ptr,
  476. (packet_size_in_words - new_read_idx) << 2);
  477. memcpy(packet + ((packet_size_in_words -
  478. new_read_idx) << 2),
  479. (u8 *)qinfo->q_array.align_virtual_addr,
  480. new_read_idx << 2);
  481. }
  482. } else {
  483. dprintk(CVP_WARN,
  484. "BAD packet received, read_idx: %#x, pkt_size: %d\n",
  485. read_idx, packet_size_in_words << 2);
  486. dprintk(CVP_WARN, "Dropping this packet\n");
  487. new_read_idx = write_idx;
  488. rc = -ENODATA;
  489. }
  490. if (new_read_idx != queue->qhdr_write_idx)
  491. queue->qhdr_rx_req = 0;
  492. else
  493. queue->qhdr_rx_req = receive_request;
  494. queue->qhdr_read_idx = new_read_idx;
  495. /*
  496. * mb() to ensure qhdr is updated in main memory
  497. * so that iris reads the updated header values
  498. */
  499. mb();
  500. *pb_tx_req_is_set = (queue->qhdr_tx_req == 1) ? 1 : 0;
  501. spin_unlock(&qinfo->hfi_lock);
  502. if ((msm_cvp_debug & CVP_PKT) &&
  503. !(queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q)) {
  504. dprintk(CVP_PKT, "%s: %pK\n", __func__, qinfo);
  505. __dump_packet(packet, CVP_PKT);
  506. }
  507. return rc;
  508. }
  509. static int __smem_alloc(struct iris_hfi_device *dev, struct cvp_mem_addr *mem,
  510. u32 size, u32 align, u32 flags)
  511. {
  512. struct msm_cvp_smem *alloc = &mem->mem_data;
  513. int rc = 0;
  514. if (!dev || !mem || !size) {
  515. dprintk(CVP_ERR, "Invalid Params\n");
  516. return -EINVAL;
  517. }
  518. dprintk(CVP_INFO, "start to alloc size: %d, flags: %d\n", size, flags);
  519. alloc->flags = flags;
  520. rc = msm_cvp_smem_alloc(size, align, 1, (void *)dev->res, alloc);
  521. if (rc) {
  522. dprintk(CVP_ERR, "Alloc failed\n");
  523. rc = -ENOMEM;
  524. goto fail_smem_alloc;
  525. }
  526. dprintk(CVP_MEM, "%s: ptr = %pK, size = %d\n", __func__,
  527. alloc->kvaddr, size);
  528. mem->mem_size = alloc->size;
  529. mem->align_virtual_addr = alloc->kvaddr;
  530. mem->align_device_addr = alloc->device_addr;
  531. return rc;
  532. fail_smem_alloc:
  533. return rc;
  534. }
  535. static void __smem_free(struct iris_hfi_device *dev, struct msm_cvp_smem *mem)
  536. {
  537. if (!dev || !mem) {
  538. dprintk(CVP_ERR, "invalid param %pK %pK\n", dev, mem);
  539. return;
  540. }
  541. msm_cvp_smem_free(mem);
  542. }
  543. static void __write_register(struct iris_hfi_device *device,
  544. u32 reg, u32 value)
  545. {
  546. u32 hwiosymaddr = reg;
  547. u8 *base_addr;
  548. if (!device) {
  549. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  550. return;
  551. }
  552. __strict_check(device);
  553. if (!device->power_enabled) {
  554. dprintk(CVP_WARN,
  555. "HFI Write register failed : Power is OFF\n");
  556. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  557. return;
  558. }
  559. base_addr = device->cvp_hal_data->register_base;
  560. dprintk(CVP_REG, "Base addr: %pK, written to: %#x, Value: %#x...\n",
  561. base_addr, hwiosymaddr, value);
  562. base_addr += hwiosymaddr;
  563. writel_relaxed(value, base_addr);
  564. /*
  565. * Memory barrier to make sure value is written into the register.
  566. */
  567. wmb();
  568. }
  569. static int __read_register(struct iris_hfi_device *device, u32 reg)
  570. {
  571. int rc = 0;
  572. u8 *base_addr;
  573. if (!device) {
  574. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  575. return -EINVAL;
  576. }
  577. __strict_check(device);
  578. if (!device->power_enabled) {
  579. dprintk(CVP_WARN,
  580. "HFI Read register failed : Power is OFF\n");
  581. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  582. return -EINVAL;
  583. }
  584. base_addr = device->cvp_hal_data->register_base;
  585. rc = readl_relaxed(base_addr + reg);
  586. /*
  587. * Memory barrier to make sure value is read correctly from the
  588. * register.
  589. */
  590. rmb();
  591. dprintk(CVP_REG, "Base addr: %pK, read from: %#x, value: %#x...\n",
  592. base_addr, reg, rc);
  593. return rc;
  594. }
  595. static void __set_registers(struct iris_hfi_device *device)
  596. {
  597. struct reg_set *reg_set;
  598. int i;
  599. if (!device->res) {
  600. dprintk(CVP_ERR,
  601. "device resources null, cannot set registers\n");
  602. return;
  603. }
  604. reg_set = &device->res->reg_set;
  605. for (i = 0; i < reg_set->count; i++) {
  606. __write_register(device, reg_set->reg_tbl[i].reg,
  607. reg_set->reg_tbl[i].value);
  608. dprintk(CVP_REG, "write_reg offset=%x, val=%x\n",
  609. reg_set->reg_tbl[i].reg,
  610. reg_set->reg_tbl[i].value);
  611. }
  612. }
  613. /*
  614. * The existence of this function is a hack for 8996 (or certain Iris versions)
  615. * to overcome a hardware bug. Whenever the GDSCs momentarily power collapse
  616. * (after calling __hand_off_regulators()), the values of the threshold
  617. * registers (typically programmed by TZ) are incorrectly reset. As a result
  618. * reprogram these registers at certain agreed upon points.
  619. */
  620. static void __set_threshold_registers(struct iris_hfi_device *device)
  621. {
  622. u32 version = __read_register(device, CVP_WRAPPER_HW_VERSION);
  623. version &= ~GENMASK(15, 0);
  624. if (version != (0x3 << 28 | 0x43 << 16))
  625. return;
  626. if (__tzbsp_set_cvp_state(TZ_SUBSYS_STATE_RESTORE_THRESHOLD))
  627. dprintk(CVP_ERR, "Failed to restore threshold values\n");
  628. }
  629. static int __unvote_buses(struct iris_hfi_device *device)
  630. {
  631. int rc = 0;
  632. struct bus_info *bus = NULL;
  633. kfree(device->bus_vote.data);
  634. device->bus_vote.data = NULL;
  635. device->bus_vote.data_count = 0;
  636. iris_hfi_for_each_bus(device, bus) {
  637. rc = icc_set_bw(bus->client, 0, 0);
  638. if (rc) {
  639. dprintk(CVP_ERR,
  640. "%s: Failed unvoting bus\n", __func__);
  641. goto err_unknown_device;
  642. }
  643. }
  644. err_unknown_device:
  645. return rc;
  646. }
  647. static int __vote_buses(struct iris_hfi_device *device,
  648. struct cvp_bus_vote_data *data, int num_data)
  649. {
  650. int rc = 0;
  651. struct bus_info *bus = NULL;
  652. struct cvp_bus_vote_data *new_data = NULL;
  653. if (!num_data) {
  654. dprintk(CVP_PWR, "No vote data available\n");
  655. goto no_data_count;
  656. } else if (!data) {
  657. dprintk(CVP_ERR, "Invalid voting data\n");
  658. return -EINVAL;
  659. }
  660. new_data = kmemdup(data, num_data * sizeof(*new_data), GFP_KERNEL);
  661. if (!new_data) {
  662. dprintk(CVP_ERR, "Can't alloc memory to cache bus votes\n");
  663. rc = -ENOMEM;
  664. goto err_no_mem;
  665. }
  666. no_data_count:
  667. kfree(device->bus_vote.data);
  668. device->bus_vote.data = new_data;
  669. device->bus_vote.data_count = num_data;
  670. iris_hfi_for_each_bus(device, bus) {
  671. if (bus) {
  672. rc = icc_set_bw(bus->client, bus->range[1], 0);
  673. if (rc)
  674. dprintk(CVP_ERR,
  675. "Failed voting bus %s to ab %u\n",
  676. bus->name, bus->range[1]*1000);
  677. }
  678. }
  679. err_no_mem:
  680. return rc;
  681. }
  682. static int iris_hfi_vote_buses(void *dev, struct cvp_bus_vote_data *d, int n)
  683. {
  684. int rc = 0;
  685. struct iris_hfi_device *device = dev;
  686. if (!device)
  687. return -EINVAL;
  688. mutex_lock(&device->lock);
  689. rc = __vote_buses(device, d, n);
  690. mutex_unlock(&device->lock);
  691. return rc;
  692. }
  693. static int __core_set_resource(struct iris_hfi_device *device,
  694. struct cvp_resource_hdr *resource_hdr, void *resource_value)
  695. {
  696. struct cvp_hfi_cmd_sys_set_resource_packet *pkt;
  697. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  698. int rc = 0;
  699. if (!device || !resource_hdr || !resource_value) {
  700. dprintk(CVP_ERR, "set_res: Invalid Params\n");
  701. return -EINVAL;
  702. }
  703. pkt = (struct cvp_hfi_cmd_sys_set_resource_packet *) packet;
  704. rc = call_hfi_pkt_op(device, sys_set_resource,
  705. pkt, resource_hdr, resource_value);
  706. if (rc) {
  707. dprintk(CVP_ERR, "set_res: failed to create packet\n");
  708. goto err_create_pkt;
  709. }
  710. rc = __iface_cmdq_write(device, pkt);
  711. if (rc)
  712. rc = -ENOTEMPTY;
  713. err_create_pkt:
  714. return rc;
  715. }
  716. static int __core_release_resource(struct iris_hfi_device *device,
  717. struct cvp_resource_hdr *resource_hdr)
  718. {
  719. struct cvp_hfi_cmd_sys_release_resource_packet *pkt;
  720. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  721. int rc = 0;
  722. if (!device || !resource_hdr) {
  723. dprintk(CVP_ERR, "release_res: Invalid Params\n");
  724. return -EINVAL;
  725. }
  726. pkt = (struct cvp_hfi_cmd_sys_release_resource_packet *) packet;
  727. rc = call_hfi_pkt_op(device, sys_release_resource,
  728. pkt, resource_hdr);
  729. if (rc) {
  730. dprintk(CVP_ERR, "release_res: failed to create packet\n");
  731. goto err_create_pkt;
  732. }
  733. rc = __iface_cmdq_write(device, pkt);
  734. if (rc)
  735. rc = -ENOTEMPTY;
  736. err_create_pkt:
  737. return rc;
  738. }
  739. static int __tzbsp_set_cvp_state(enum tzbsp_subsys_state state)
  740. {
  741. int rc = 0;
  742. rc = qcom_scm_set_remote_state(state, TZBSP_CVP_PAS_ID);
  743. dprintk(CVP_CORE, "Set state %d, resp %d\n", state, rc);
  744. if (rc) {
  745. dprintk(CVP_ERR, "Failed qcom_scm_set_remote_state %d\n", rc);
  746. return rc;
  747. }
  748. return 0;
  749. }
  750. static inline int __boot_firmware(struct iris_hfi_device *device)
  751. {
  752. int rc = 0, loop = 10;
  753. u32 ctrl_init_val = 0, ctrl_status = 0, count = 0, max_tries = 1000;
  754. u32 reg_gdsc;
  755. /*
  756. * Hand off control of regulators to h/w _after_ enabling clocks.
  757. * Note that the GDSC will turn off when switching from normal
  758. * (s/w triggered) to fast (HW triggered) unless the h/w vote is
  759. * present. Since Iris isn't up yet, the GDSC will be off briefly.
  760. */
  761. if (__enable_hw_power_collapse(device))
  762. dprintk(CVP_ERR, "Failed to enabled inter-frame PC\n");
  763. while (loop) {
  764. reg_gdsc = __read_register(device, CVP_CC_MVS1_GDSCR);
  765. if (reg_gdsc & 0x80000000) {
  766. usleep_range(100, 200);
  767. loop--;
  768. } else {
  769. break;
  770. }
  771. }
  772. if (!loop)
  773. dprintk(CVP_ERR, "fail to power off CORE during resume\n");
  774. ctrl_init_val = BIT(0);
  775. __write_register(device, CVP_CTRL_INIT, ctrl_init_val);
  776. while (!ctrl_status && count < max_tries) {
  777. ctrl_status = __read_register(device, CVP_CTRL_STATUS);
  778. if ((ctrl_status & CVP_CTRL_ERROR_STATUS__M) == 0x4) {
  779. dprintk(CVP_ERR, "invalid setting for UC_REGION\n");
  780. rc = -ENODATA;
  781. break;
  782. }
  783. /* Reduce to 1/100th and x100 of max_tries */
  784. usleep_range(500, 1000);
  785. count++;
  786. }
  787. if (!(ctrl_status & CVP_CTRL_INIT_STATUS__M)) {
  788. dprintk(CVP_ERR, "Failed to boot FW status: %x\n",
  789. ctrl_status);
  790. rc = -ENODEV;
  791. }
  792. /* Enable interrupt before sending commands to tensilica */
  793. __write_register(device, CVP_CPU_CS_H2XSOFTINTEN, 0x1);
  794. __write_register(device, CVP_CPU_CS_X2RPMh, 0x0);
  795. return rc;
  796. }
  797. static int iris_hfi_resume(void *dev)
  798. {
  799. int rc = 0;
  800. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  801. if (!device) {
  802. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  803. return -EINVAL;
  804. }
  805. dprintk(CVP_CORE, "Resuming Iris\n");
  806. mutex_lock(&device->lock);
  807. rc = __resume(device);
  808. mutex_unlock(&device->lock);
  809. return rc;
  810. }
  811. static int iris_hfi_suspend(void *dev)
  812. {
  813. int rc = 0;
  814. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  815. if (!device) {
  816. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  817. return -EINVAL;
  818. } else if (!device->res->sw_power_collapsible) {
  819. return -ENOTSUPP;
  820. }
  821. dprintk(CVP_CORE, "Suspending Iris\n");
  822. mutex_lock(&device->lock);
  823. rc = __power_collapse(device, true);
  824. if (rc) {
  825. dprintk(CVP_WARN, "%s: Iris is busy\n", __func__);
  826. rc = -EBUSY;
  827. }
  828. mutex_unlock(&device->lock);
  829. /* Cancel pending delayed works if any */
  830. if (!rc)
  831. cancel_delayed_work(&iris_hfi_pm_work);
  832. return rc;
  833. }
  834. static void cvp_dump_csr(struct iris_hfi_device *dev)
  835. {
  836. u32 reg;
  837. if (!dev)
  838. return;
  839. if (!dev->power_enabled || dev->reg_dumped)
  840. return;
  841. reg = __read_register(dev, CVP_WRAPPER_CPU_STATUS);
  842. dprintk(CVP_ERR, "CVP_WRAPPER_CPU_STATUS: %x\n", reg);
  843. reg = __read_register(dev, CVP_CPU_CS_SCIACMDARG0);
  844. dprintk(CVP_ERR, "CVP_CPU_CS_SCIACMDARG0: %x\n", reg);
  845. reg = __read_register(dev, CVP_WRAPPER_CPU_CLOCK_CONFIG);
  846. dprintk(CVP_ERR, "CVP_WRAPPER_CPU_CLOCK_CONFIG: %x\n", reg);
  847. reg = __read_register(dev, CVP_WRAPPER_CORE_CLOCK_CONFIG);
  848. dprintk(CVP_ERR, "CVP_WRAPPER_CORE_CLOCK_CONFIG: %x\n", reg);
  849. reg = __read_register(dev, CVP_WRAPPER_INTR_STATUS);
  850. dprintk(CVP_ERR, "CVP_WRAPPER_INTR_STATUS: %x\n", reg);
  851. reg = __read_register(dev, CVP_CPU_CS_H2ASOFTINT);
  852. dprintk(CVP_ERR, "CVP_CPU_CS_H2ASOFTINT: %x\n", reg);
  853. reg = __read_register(dev, CVP_CPU_CS_A2HSOFTINT);
  854. dprintk(CVP_ERR, "CVP_CPU_CS_A2HSOFTINT: %x\n", reg);
  855. reg = __read_register(dev, CVP_CC_MVS1C_GDSCR);
  856. dprintk(CVP_ERR, "CVP_CC_MVS1C_GDSCR: %x\n", reg);
  857. reg = __read_register(dev, CVP_CC_MVS1C_CBCR);
  858. dprintk(CVP_ERR, "CVP_CC_MVS1C_CBCR: %x\n", reg);
  859. dev->reg_dumped = true;
  860. }
  861. static int iris_hfi_flush_debug_queue(void *dev)
  862. {
  863. int rc = 0;
  864. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  865. if (!device) {
  866. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  867. return -EINVAL;
  868. }
  869. cvp_dump_csr(device);
  870. mutex_lock(&device->lock);
  871. if (!device->power_enabled) {
  872. dprintk(CVP_WARN, "%s: iris power off\n", __func__);
  873. rc = -EINVAL;
  874. goto exit;
  875. }
  876. __flush_debug_queue(device, NULL);
  877. exit:
  878. mutex_unlock(&device->lock);
  879. return rc;
  880. }
  881. static int iris_hfi_scale_clocks(void *dev, u32 freq)
  882. {
  883. int rc = 0;
  884. struct iris_hfi_device *device = dev;
  885. if (!device) {
  886. dprintk(CVP_ERR, "Invalid args: %pK\n", device);
  887. return -EINVAL;
  888. }
  889. mutex_lock(&device->lock);
  890. if (__resume(device)) {
  891. dprintk(CVP_ERR, "Resume from power collapse failed\n");
  892. rc = -ENODEV;
  893. goto exit;
  894. }
  895. rc = msm_cvp_set_clocks_impl(device, freq);
  896. exit:
  897. mutex_unlock(&device->lock);
  898. return rc;
  899. }
  900. /* Writes into cmdq without raising an interrupt */
  901. static int __iface_cmdq_write_relaxed(struct iris_hfi_device *device,
  902. void *pkt, bool *requires_interrupt)
  903. {
  904. struct cvp_iface_q_info *q_info;
  905. struct cvp_hal_cmd_pkt_hdr *cmd_packet;
  906. int result = -E2BIG;
  907. if (!device || !pkt) {
  908. dprintk(CVP_ERR, "Invalid Params\n");
  909. return -EINVAL;
  910. }
  911. __strict_check(device);
  912. if (!__core_in_valid_state(device)) {
  913. dprintk(CVP_ERR, "%s - fw not in init state\n", __func__);
  914. result = -EINVAL;
  915. goto err_q_null;
  916. }
  917. cmd_packet = (struct cvp_hal_cmd_pkt_hdr *)pkt;
  918. device->last_packet_type = cmd_packet->packet_type;
  919. q_info = &device->iface_queues[CVP_IFACEQ_CMDQ_IDX];
  920. if (!q_info) {
  921. dprintk(CVP_ERR, "cannot write to shared Q's\n");
  922. goto err_q_null;
  923. }
  924. if (!q_info->q_array.align_virtual_addr) {
  925. dprintk(CVP_ERR, "cannot write to shared CMD Q's\n");
  926. result = -ENODATA;
  927. goto err_q_null;
  928. }
  929. if (__resume(device)) {
  930. dprintk(CVP_ERR, "%s: Power on failed\n", __func__);
  931. goto err_q_write;
  932. }
  933. if (!__write_queue(q_info, (u8 *)pkt, requires_interrupt)) {
  934. if (device->res->sw_power_collapsible) {
  935. cancel_delayed_work(&iris_hfi_pm_work);
  936. if (!queue_delayed_work(device->iris_pm_workq,
  937. &iris_hfi_pm_work,
  938. msecs_to_jiffies(
  939. device->res->msm_cvp_pwr_collapse_delay))) {
  940. dprintk(CVP_PWR,
  941. "PM work already scheduled\n");
  942. }
  943. }
  944. result = 0;
  945. } else {
  946. dprintk(CVP_ERR, "__iface_cmdq_write: queue full\n");
  947. }
  948. err_q_write:
  949. err_q_null:
  950. return result;
  951. }
  952. static int __iface_cmdq_write(struct iris_hfi_device *device, void *pkt)
  953. {
  954. bool needs_interrupt = false;
  955. int rc = __iface_cmdq_write_relaxed(device, pkt, &needs_interrupt);
  956. if (!rc && needs_interrupt) {
  957. /* Consumer of cmdq prefers that we raise an interrupt */
  958. rc = 0;
  959. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  960. }
  961. return rc;
  962. }
  963. static int __iface_msgq_read(struct iris_hfi_device *device, void *pkt)
  964. {
  965. u32 tx_req_is_set = 0;
  966. int rc = 0;
  967. struct cvp_iface_q_info *q_info;
  968. if (!pkt) {
  969. dprintk(CVP_ERR, "Invalid Params\n");
  970. return -EINVAL;
  971. }
  972. __strict_check(device);
  973. if (!__core_in_valid_state(device)) {
  974. dprintk(CVP_WARN, "%s - fw not in init state\n", __func__);
  975. rc = -EINVAL;
  976. goto read_error_null;
  977. }
  978. q_info = &device->iface_queues[CVP_IFACEQ_MSGQ_IDX];
  979. if (q_info->q_array.align_virtual_addr == NULL) {
  980. dprintk(CVP_ERR, "cannot read from shared MSG Q's\n");
  981. rc = -ENODATA;
  982. goto read_error_null;
  983. }
  984. if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) {
  985. if (tx_req_is_set)
  986. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  987. rc = 0;
  988. } else
  989. rc = -ENODATA;
  990. read_error_null:
  991. return rc;
  992. }
  993. static int __iface_dbgq_read(struct iris_hfi_device *device, void *pkt)
  994. {
  995. u32 tx_req_is_set = 0;
  996. int rc = 0;
  997. struct cvp_iface_q_info *q_info;
  998. if (!pkt) {
  999. dprintk(CVP_ERR, "Invalid Params\n");
  1000. return -EINVAL;
  1001. }
  1002. __strict_check(device);
  1003. q_info = &device->iface_queues[CVP_IFACEQ_DBGQ_IDX];
  1004. if (q_info->q_array.align_virtual_addr == NULL) {
  1005. dprintk(CVP_ERR, "cannot read from shared DBG Q's\n");
  1006. rc = -ENODATA;
  1007. goto dbg_error_null;
  1008. }
  1009. if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) {
  1010. if (tx_req_is_set)
  1011. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1012. rc = 0;
  1013. } else
  1014. rc = -ENODATA;
  1015. dbg_error_null:
  1016. return rc;
  1017. }
  1018. static void __set_queue_hdr_defaults(struct cvp_hfi_queue_header *q_hdr)
  1019. {
  1020. q_hdr->qhdr_status = 0x1;
  1021. q_hdr->qhdr_type = CVP_IFACEQ_DFLT_QHDR;
  1022. q_hdr->qhdr_q_size = CVP_IFACEQ_QUEUE_SIZE / 4;
  1023. q_hdr->qhdr_pkt_size = 0;
  1024. q_hdr->qhdr_rx_wm = 0x1;
  1025. q_hdr->qhdr_tx_wm = 0x1;
  1026. q_hdr->qhdr_rx_req = 0x1;
  1027. q_hdr->qhdr_tx_req = 0x0;
  1028. q_hdr->qhdr_rx_irq_status = 0x0;
  1029. q_hdr->qhdr_tx_irq_status = 0x0;
  1030. q_hdr->qhdr_read_idx = 0x0;
  1031. q_hdr->qhdr_write_idx = 0x0;
  1032. }
  1033. static void __interface_dsp_queues_release(struct iris_hfi_device *device)
  1034. {
  1035. int i;
  1036. struct msm_cvp_smem *mem_data = &device->dsp_iface_q_table.mem_data;
  1037. struct context_bank_info *cb = mem_data->mapping_info.cb_info;
  1038. if (!device->dsp_iface_q_table.align_virtual_addr) {
  1039. dprintk(CVP_ERR, "%s: already released\n", __func__);
  1040. return;
  1041. }
  1042. dma_unmap_single_attrs(cb->dev, mem_data->device_addr,
  1043. mem_data->size, DMA_BIDIRECTIONAL, 0);
  1044. dma_free_coherent(device->res->mem_cdsp.dev, mem_data->size,
  1045. mem_data->kvaddr, mem_data->dma_handle);
  1046. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1047. device->dsp_iface_queues[i].q_hdr = NULL;
  1048. device->dsp_iface_queues[i].q_array.align_virtual_addr = NULL;
  1049. device->dsp_iface_queues[i].q_array.align_device_addr = 0;
  1050. }
  1051. device->dsp_iface_q_table.align_virtual_addr = NULL;
  1052. device->dsp_iface_q_table.align_device_addr = 0;
  1053. }
  1054. static int __interface_dsp_queues_init(struct iris_hfi_device *dev)
  1055. {
  1056. int rc = 0;
  1057. u32 i;
  1058. struct cvp_iface_q_info *iface_q;
  1059. int offset = 0;
  1060. phys_addr_t fw_bias = 0;
  1061. size_t q_size;
  1062. struct msm_cvp_smem *mem_data;
  1063. void *kvaddr;
  1064. dma_addr_t dma_handle;
  1065. dma_addr_t iova;
  1066. struct context_bank_info *cb;
  1067. q_size = ALIGN(QUEUE_SIZE, SZ_1M);
  1068. mem_data = &dev->dsp_iface_q_table.mem_data;
  1069. /* Allocate dsp queues from CDSP device memory */
  1070. kvaddr = dma_alloc_coherent(dev->res->mem_cdsp.dev, q_size,
  1071. &dma_handle, GFP_KERNEL);
  1072. if (IS_ERR_OR_NULL(kvaddr)) {
  1073. dprintk(CVP_ERR, "%s: failed dma allocation\n", __func__);
  1074. goto fail_dma_alloc;
  1075. }
  1076. cb = msm_cvp_smem_get_context_bank(dev->res, 0);
  1077. if (!cb) {
  1078. dprintk(CVP_ERR,
  1079. "%s: failed to get context bank\n", __func__);
  1080. goto fail_dma_map;
  1081. }
  1082. iova = dma_map_single_attrs(cb->dev, phys_to_virt(dma_handle),
  1083. q_size, DMA_BIDIRECTIONAL, 0);
  1084. if (dma_mapping_error(cb->dev, iova)) {
  1085. dprintk(CVP_ERR, "%s: failed dma mapping\n", __func__);
  1086. goto fail_dma_map;
  1087. }
  1088. dprintk(CVP_DSP,
  1089. "%s: kvaddr %pK dma_handle %#llx iova %#llx size %zd\n",
  1090. __func__, kvaddr, dma_handle, iova, q_size);
  1091. memset(mem_data, 0, sizeof(struct msm_cvp_smem));
  1092. mem_data->kvaddr = kvaddr;
  1093. mem_data->device_addr = iova;
  1094. mem_data->dma_handle = dma_handle;
  1095. mem_data->size = q_size;
  1096. mem_data->mapping_info.cb_info = cb;
  1097. if (!is_iommu_present(dev->res))
  1098. fw_bias = dev->cvp_hal_data->firmware_base;
  1099. dev->dsp_iface_q_table.align_virtual_addr = kvaddr;
  1100. dev->dsp_iface_q_table.align_device_addr = iova - fw_bias;
  1101. dev->dsp_iface_q_table.mem_size = CVP_IFACEQ_TABLE_SIZE;
  1102. offset = dev->dsp_iface_q_table.mem_size;
  1103. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1104. iface_q = &dev->dsp_iface_queues[i];
  1105. iface_q->q_array.align_device_addr = iova + offset - fw_bias;
  1106. iface_q->q_array.align_virtual_addr = kvaddr + offset;
  1107. iface_q->q_array.mem_size = CVP_IFACEQ_QUEUE_SIZE;
  1108. offset += iface_q->q_array.mem_size;
  1109. spin_lock_init(&iface_q->hfi_lock);
  1110. }
  1111. cvp_dsp_init_hfi_queue_hdr(dev);
  1112. return rc;
  1113. fail_dma_map:
  1114. dma_free_coherent(dev->res->mem_cdsp.dev, q_size, kvaddr, dma_handle);
  1115. fail_dma_alloc:
  1116. return -ENOMEM;
  1117. }
  1118. static void __interface_queues_release(struct iris_hfi_device *device)
  1119. {
  1120. int i;
  1121. struct cvp_hfi_mem_map_table *qdss;
  1122. struct cvp_hfi_mem_map *mem_map;
  1123. int num_entries = device->res->qdss_addr_set.count;
  1124. unsigned long mem_map_table_base_addr;
  1125. struct context_bank_info *cb;
  1126. if (device->qdss.align_virtual_addr) {
  1127. qdss = (struct cvp_hfi_mem_map_table *)
  1128. device->qdss.align_virtual_addr;
  1129. qdss->mem_map_num_entries = num_entries;
  1130. mem_map_table_base_addr =
  1131. device->qdss.align_device_addr +
  1132. sizeof(struct cvp_hfi_mem_map_table);
  1133. qdss->mem_map_table_base_addr =
  1134. (u32)mem_map_table_base_addr;
  1135. if ((unsigned long)qdss->mem_map_table_base_addr !=
  1136. mem_map_table_base_addr) {
  1137. dprintk(CVP_ERR,
  1138. "Invalid mem_map_table_base_addr %#lx",
  1139. mem_map_table_base_addr);
  1140. }
  1141. mem_map = (struct cvp_hfi_mem_map *)(qdss + 1);
  1142. cb = msm_cvp_smem_get_context_bank(device->res, 0);
  1143. for (i = 0; cb && i < num_entries; i++) {
  1144. iommu_unmap(cb->domain,
  1145. mem_map[i].virtual_addr,
  1146. mem_map[i].size);
  1147. }
  1148. __smem_free(device, &device->qdss.mem_data);
  1149. }
  1150. __smem_free(device, &device->iface_q_table.mem_data);
  1151. __smem_free(device, &device->sfr.mem_data);
  1152. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1153. device->iface_queues[i].q_hdr = NULL;
  1154. device->iface_queues[i].q_array.align_virtual_addr = NULL;
  1155. device->iface_queues[i].q_array.align_device_addr = 0;
  1156. }
  1157. device->iface_q_table.align_virtual_addr = NULL;
  1158. device->iface_q_table.align_device_addr = 0;
  1159. device->qdss.align_virtual_addr = NULL;
  1160. device->qdss.align_device_addr = 0;
  1161. device->sfr.align_virtual_addr = NULL;
  1162. device->sfr.align_device_addr = 0;
  1163. device->mem_addr.align_virtual_addr = NULL;
  1164. device->mem_addr.align_device_addr = 0;
  1165. __interface_dsp_queues_release(device);
  1166. }
  1167. static int __get_qdss_iommu_virtual_addr(struct iris_hfi_device *dev,
  1168. struct cvp_hfi_mem_map *mem_map,
  1169. struct iommu_domain *domain)
  1170. {
  1171. int i;
  1172. int rc = 0;
  1173. dma_addr_t iova = QDSS_IOVA_START;
  1174. int num_entries = dev->res->qdss_addr_set.count;
  1175. struct addr_range *qdss_addr_tbl = dev->res->qdss_addr_set.addr_tbl;
  1176. if (!num_entries)
  1177. return -ENODATA;
  1178. for (i = 0; i < num_entries; i++) {
  1179. if (domain) {
  1180. rc = iommu_map(domain, iova,
  1181. qdss_addr_tbl[i].start,
  1182. qdss_addr_tbl[i].size,
  1183. IOMMU_READ | IOMMU_WRITE);
  1184. if (rc) {
  1185. dprintk(CVP_ERR,
  1186. "IOMMU QDSS mapping failed for addr %#x\n",
  1187. qdss_addr_tbl[i].start);
  1188. rc = -ENOMEM;
  1189. break;
  1190. }
  1191. } else {
  1192. iova = qdss_addr_tbl[i].start;
  1193. }
  1194. mem_map[i].virtual_addr = (u32)iova;
  1195. mem_map[i].physical_addr = qdss_addr_tbl[i].start;
  1196. mem_map[i].size = qdss_addr_tbl[i].size;
  1197. mem_map[i].attr = 0x0;
  1198. iova += mem_map[i].size;
  1199. }
  1200. if (i < num_entries) {
  1201. dprintk(CVP_ERR,
  1202. "QDSS mapping failed, Freeing other entries %d\n", i);
  1203. for (--i; domain && i >= 0; i--) {
  1204. iommu_unmap(domain,
  1205. mem_map[i].virtual_addr,
  1206. mem_map[i].size);
  1207. }
  1208. }
  1209. return rc;
  1210. }
  1211. static void __setup_ucregion_memory_map(struct iris_hfi_device *device)
  1212. {
  1213. __write_register(device, CVP_UC_REGION_ADDR,
  1214. (u32)device->iface_q_table.align_device_addr);
  1215. __write_register(device, CVP_UC_REGION_SIZE, SHARED_QSIZE);
  1216. __write_register(device, CVP_QTBL_ADDR,
  1217. (u32)device->iface_q_table.align_device_addr);
  1218. __write_register(device, CVP_QTBL_INFO, 0x01);
  1219. if (device->sfr.align_device_addr)
  1220. __write_register(device, CVP_SFR_ADDR,
  1221. (u32)device->sfr.align_device_addr);
  1222. if (device->qdss.align_device_addr)
  1223. __write_register(device, CVP_MMAP_ADDR,
  1224. (u32)device->qdss.align_device_addr);
  1225. call_iris_op(device, setup_dsp_uc_memmap, device);
  1226. }
  1227. static int __interface_queues_init(struct iris_hfi_device *dev)
  1228. {
  1229. struct cvp_hfi_queue_table_header *q_tbl_hdr;
  1230. struct cvp_hfi_queue_header *q_hdr;
  1231. u32 i;
  1232. int rc = 0;
  1233. struct cvp_hfi_mem_map_table *qdss;
  1234. struct cvp_hfi_mem_map *mem_map;
  1235. struct cvp_iface_q_info *iface_q;
  1236. struct cvp_hfi_sfr_struct *vsfr;
  1237. struct cvp_mem_addr *mem_addr;
  1238. int offset = 0;
  1239. int num_entries = dev->res->qdss_addr_set.count;
  1240. phys_addr_t fw_bias = 0;
  1241. size_t q_size;
  1242. unsigned long mem_map_table_base_addr;
  1243. struct context_bank_info *cb;
  1244. q_size = SHARED_QSIZE - ALIGNED_SFR_SIZE - ALIGNED_QDSS_SIZE;
  1245. mem_addr = &dev->mem_addr;
  1246. if (!is_iommu_present(dev->res))
  1247. fw_bias = dev->cvp_hal_data->firmware_base;
  1248. rc = __smem_alloc(dev, mem_addr, q_size, 1, SMEM_UNCACHED);
  1249. if (rc) {
  1250. dprintk(CVP_ERR, "iface_q_table_alloc_fail\n");
  1251. goto fail_alloc_queue;
  1252. }
  1253. dev->iface_q_table.align_virtual_addr = mem_addr->align_virtual_addr;
  1254. dev->iface_q_table.align_device_addr = mem_addr->align_device_addr -
  1255. fw_bias;
  1256. dev->iface_q_table.mem_size = CVP_IFACEQ_TABLE_SIZE;
  1257. dev->iface_q_table.mem_data = mem_addr->mem_data;
  1258. offset += dev->iface_q_table.mem_size;
  1259. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1260. iface_q = &dev->iface_queues[i];
  1261. iface_q->q_array.align_device_addr = mem_addr->align_device_addr
  1262. + offset - fw_bias;
  1263. iface_q->q_array.align_virtual_addr =
  1264. mem_addr->align_virtual_addr + offset;
  1265. iface_q->q_array.mem_size = CVP_IFACEQ_QUEUE_SIZE;
  1266. offset += iface_q->q_array.mem_size;
  1267. iface_q->q_hdr = CVP_IFACEQ_GET_QHDR_START_ADDR(
  1268. dev->iface_q_table.align_virtual_addr, i);
  1269. __set_queue_hdr_defaults(iface_q->q_hdr);
  1270. spin_lock_init(&iface_q->hfi_lock);
  1271. }
  1272. if ((msm_cvp_fw_debug_mode & HFI_DEBUG_MODE_QDSS) && num_entries) {
  1273. rc = __smem_alloc(dev, mem_addr, ALIGNED_QDSS_SIZE, 1,
  1274. SMEM_UNCACHED);
  1275. if (rc) {
  1276. dprintk(CVP_WARN,
  1277. "qdss_alloc_fail: QDSS messages logging will not work\n");
  1278. dev->qdss.align_device_addr = 0;
  1279. } else {
  1280. dev->qdss.align_device_addr =
  1281. mem_addr->align_device_addr - fw_bias;
  1282. dev->qdss.align_virtual_addr =
  1283. mem_addr->align_virtual_addr;
  1284. dev->qdss.mem_size = ALIGNED_QDSS_SIZE;
  1285. dev->qdss.mem_data = mem_addr->mem_data;
  1286. }
  1287. }
  1288. rc = __smem_alloc(dev, mem_addr, ALIGNED_SFR_SIZE, 1, SMEM_UNCACHED);
  1289. if (rc) {
  1290. dprintk(CVP_WARN, "sfr_alloc_fail: SFR not will work\n");
  1291. dev->sfr.align_device_addr = 0;
  1292. } else {
  1293. dev->sfr.align_device_addr = mem_addr->align_device_addr -
  1294. fw_bias;
  1295. dev->sfr.align_virtual_addr = mem_addr->align_virtual_addr;
  1296. dev->sfr.mem_size = ALIGNED_SFR_SIZE;
  1297. dev->sfr.mem_data = mem_addr->mem_data;
  1298. }
  1299. q_tbl_hdr = (struct cvp_hfi_queue_table_header *)
  1300. dev->iface_q_table.align_virtual_addr;
  1301. q_tbl_hdr->qtbl_version = 0;
  1302. q_tbl_hdr->device_addr = (void *)dev;
  1303. strlcpy(q_tbl_hdr->name, "msm_cvp", sizeof(q_tbl_hdr->name));
  1304. q_tbl_hdr->qtbl_size = CVP_IFACEQ_TABLE_SIZE;
  1305. q_tbl_hdr->qtbl_qhdr0_offset =
  1306. sizeof(struct cvp_hfi_queue_table_header);
  1307. q_tbl_hdr->qtbl_qhdr_size = sizeof(struct cvp_hfi_queue_header);
  1308. q_tbl_hdr->qtbl_num_q = CVP_IFACEQ_NUMQ;
  1309. q_tbl_hdr->qtbl_num_active_q = CVP_IFACEQ_NUMQ;
  1310. iface_q = &dev->iface_queues[CVP_IFACEQ_CMDQ_IDX];
  1311. q_hdr = iface_q->q_hdr;
  1312. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1313. q_hdr->qhdr_type |= HFI_Q_ID_HOST_TO_CTRL_CMD_Q;
  1314. iface_q = &dev->iface_queues[CVP_IFACEQ_MSGQ_IDX];
  1315. q_hdr = iface_q->q_hdr;
  1316. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1317. q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_MSG_Q;
  1318. iface_q = &dev->iface_queues[CVP_IFACEQ_DBGQ_IDX];
  1319. q_hdr = iface_q->q_hdr;
  1320. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1321. q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q;
  1322. /*
  1323. * Set receive request to zero on debug queue as there is no
  1324. * need of interrupt from cvp hardware for debug messages
  1325. */
  1326. q_hdr->qhdr_rx_req = 0;
  1327. if (dev->qdss.align_virtual_addr) {
  1328. qdss =
  1329. (struct cvp_hfi_mem_map_table *)dev->qdss.align_virtual_addr;
  1330. qdss->mem_map_num_entries = num_entries;
  1331. mem_map_table_base_addr = dev->qdss.align_device_addr +
  1332. sizeof(struct cvp_hfi_mem_map_table);
  1333. qdss->mem_map_table_base_addr = mem_map_table_base_addr;
  1334. mem_map = (struct cvp_hfi_mem_map *)(qdss + 1);
  1335. cb = msm_cvp_smem_get_context_bank(dev->res, 0);
  1336. if (!cb) {
  1337. dprintk(CVP_ERR,
  1338. "%s: failed to get context bank\n", __func__);
  1339. return -EINVAL;
  1340. }
  1341. rc = __get_qdss_iommu_virtual_addr(dev, mem_map, cb->domain);
  1342. if (rc) {
  1343. dprintk(CVP_ERR,
  1344. "IOMMU mapping failed, Freeing qdss memdata\n");
  1345. __smem_free(dev, &dev->qdss.mem_data);
  1346. dev->qdss.align_virtual_addr = NULL;
  1347. dev->qdss.align_device_addr = 0;
  1348. }
  1349. }
  1350. vsfr = (struct cvp_hfi_sfr_struct *) dev->sfr.align_virtual_addr;
  1351. if (vsfr)
  1352. vsfr->bufSize = ALIGNED_SFR_SIZE;
  1353. rc = __interface_dsp_queues_init(dev);
  1354. if (rc) {
  1355. dprintk(CVP_ERR, "dsp_queues_init failed\n");
  1356. goto fail_alloc_queue;
  1357. }
  1358. __setup_ucregion_memory_map(dev);
  1359. return 0;
  1360. fail_alloc_queue:
  1361. return -ENOMEM;
  1362. }
  1363. static int __sys_set_debug(struct iris_hfi_device *device, u32 debug)
  1364. {
  1365. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1366. int rc = 0;
  1367. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1368. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1369. rc = call_hfi_pkt_op(device, sys_debug_config, pkt, debug);
  1370. if (rc) {
  1371. dprintk(CVP_WARN,
  1372. "Debug mode setting to FW failed\n");
  1373. return -ENOTEMPTY;
  1374. }
  1375. if (__iface_cmdq_write(device, pkt))
  1376. return -ENOTEMPTY;
  1377. return 0;
  1378. }
  1379. static int __sys_set_idle_indicator(struct iris_hfi_device *device,
  1380. bool enable)
  1381. {
  1382. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1383. int rc = 0;
  1384. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1385. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1386. rc = call_hfi_pkt_op(device, sys_set_idle_indicator, pkt, enable);
  1387. if (__iface_cmdq_write(device, pkt))
  1388. return -ENOTEMPTY;
  1389. return 0;
  1390. }
  1391. static int __sys_set_coverage(struct iris_hfi_device *device, u32 mode)
  1392. {
  1393. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1394. int rc = 0;
  1395. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1396. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1397. rc = call_hfi_pkt_op(device, sys_coverage_config,
  1398. pkt, mode);
  1399. if (rc) {
  1400. dprintk(CVP_WARN,
  1401. "Coverage mode setting to FW failed\n");
  1402. return -ENOTEMPTY;
  1403. }
  1404. if (__iface_cmdq_write(device, pkt)) {
  1405. dprintk(CVP_WARN, "Failed to send coverage pkt to f/w\n");
  1406. return -ENOTEMPTY;
  1407. }
  1408. return 0;
  1409. }
  1410. static int __sys_set_power_control(struct iris_hfi_device *device,
  1411. bool enable)
  1412. {
  1413. struct regulator_info *rinfo;
  1414. bool supported = false;
  1415. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1416. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1417. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1418. iris_hfi_for_each_regulator(device, rinfo) {
  1419. if (rinfo->has_hw_power_collapse) {
  1420. supported = true;
  1421. break;
  1422. }
  1423. }
  1424. if (!supported)
  1425. return 0;
  1426. call_hfi_pkt_op(device, sys_power_control, pkt, enable);
  1427. if (__iface_cmdq_write(device, pkt))
  1428. return -ENOTEMPTY;
  1429. return 0;
  1430. }
  1431. static int iris_hfi_core_init(void *device)
  1432. {
  1433. int rc = 0;
  1434. u32 ipcc_iova;
  1435. struct cvp_hfi_cmd_sys_init_packet pkt;
  1436. struct cvp_hfi_cmd_sys_get_property_packet version_pkt;
  1437. struct iris_hfi_device *dev;
  1438. if (!device) {
  1439. dprintk(CVP_ERR, "Invalid device\n");
  1440. return -ENODEV;
  1441. }
  1442. dev = device;
  1443. dprintk(CVP_CORE, "Core initializing\n");
  1444. mutex_lock(&dev->lock);
  1445. dev->bus_vote.data =
  1446. kzalloc(sizeof(struct cvp_bus_vote_data), GFP_KERNEL);
  1447. if (!dev->bus_vote.data) {
  1448. dprintk(CVP_ERR, "Bus vote data memory is not allocated\n");
  1449. rc = -ENOMEM;
  1450. goto err_no_mem;
  1451. }
  1452. dev->bus_vote.data_count = 1;
  1453. dev->bus_vote.data->power_mode = CVP_POWER_TURBO;
  1454. rc = __load_fw(dev);
  1455. if (rc) {
  1456. dprintk(CVP_ERR, "Failed to load Iris FW\n");
  1457. goto err_load_fw;
  1458. }
  1459. __set_state(dev, IRIS_STATE_INIT);
  1460. dev->reg_dumped = false;
  1461. dprintk(CVP_CORE, "Dev_Virt: %pa, Reg_Virt: %pK\n",
  1462. &dev->cvp_hal_data->firmware_base,
  1463. dev->cvp_hal_data->register_base);
  1464. rc = __interface_queues_init(dev);
  1465. if (rc) {
  1466. dprintk(CVP_ERR, "failed to init queues\n");
  1467. rc = -ENOMEM;
  1468. goto err_core_init;
  1469. }
  1470. rc = msm_cvp_map_ipcc_regs(&ipcc_iova);
  1471. if (!rc) {
  1472. dprintk(CVP_CORE, "IPCC iova 0x%x\n", ipcc_iova);
  1473. __write_register(dev, CVP_MMAP_ADDR, ipcc_iova);
  1474. }
  1475. rc = __boot_firmware(dev);
  1476. if (rc) {
  1477. dprintk(CVP_ERR, "Failed to start core\n");
  1478. rc = -ENODEV;
  1479. goto err_core_init;
  1480. }
  1481. dev->version = __read_register(dev, CVP_VERSION_INFO);
  1482. rc = call_hfi_pkt_op(dev, sys_init, &pkt, 0);
  1483. if (rc) {
  1484. dprintk(CVP_ERR, "Failed to create sys init pkt\n");
  1485. goto err_core_init;
  1486. }
  1487. if (__iface_cmdq_write(dev, &pkt)) {
  1488. rc = -ENOTEMPTY;
  1489. goto err_core_init;
  1490. }
  1491. rc = call_hfi_pkt_op(dev, sys_image_version, &version_pkt);
  1492. if (rc || __iface_cmdq_write(dev, &version_pkt))
  1493. dprintk(CVP_WARN, "Failed to send image version pkt to f/w\n");
  1494. __sys_set_debug(device, msm_cvp_fw_debug);
  1495. __enable_subcaches(device);
  1496. __set_subcaches(device);
  1497. __set_ubwc_config(device);
  1498. __sys_set_idle_indicator(device, true);
  1499. if (dev->res->pm_qos_latency_us)
  1500. cpu_latency_qos_add_request(&dev->qos,
  1501. dev->res->pm_qos_latency_us);
  1502. /* mmrm registration */
  1503. if (msm_cvp_mmrm_enabled) {
  1504. rc = msm_cvp_mmrm_register(device);
  1505. if (rc) {
  1506. dprintk(CVP_ERR, "Failed to register mmrm client\n");
  1507. goto err_core_init;
  1508. }
  1509. }
  1510. mutex_unlock(&dev->lock);
  1511. cvp_dsp_send_hfi_queue();
  1512. dprintk(CVP_CORE, "Core inited successfully\n");
  1513. return 0;
  1514. err_core_init:
  1515. __set_state(dev, IRIS_STATE_DEINIT);
  1516. __unload_fw(dev);
  1517. err_load_fw:
  1518. err_no_mem:
  1519. dprintk(CVP_ERR, "Core init failed\n");
  1520. mutex_unlock(&dev->lock);
  1521. return rc;
  1522. }
  1523. static int iris_hfi_core_release(void *dev)
  1524. {
  1525. int rc = 0;
  1526. struct iris_hfi_device *device = dev;
  1527. struct cvp_hal_session *session, *next;
  1528. if (!device) {
  1529. dprintk(CVP_ERR, "invalid device\n");
  1530. return -ENODEV;
  1531. }
  1532. mutex_lock(&device->lock);
  1533. dprintk(CVP_WARN, "Core releasing\n");
  1534. if (device->res->pm_qos_latency_us &&
  1535. cpu_latency_qos_request_active(&device->qos))
  1536. cpu_latency_qos_remove_request(&device->qos);
  1537. __resume(device);
  1538. __set_state(device, IRIS_STATE_DEINIT);
  1539. __dsp_shutdown(device, 0);
  1540. if (msm_cvp_mmrm_enabled) {
  1541. rc = mmrm_client_deregister(device->mmrm_cvp);
  1542. if (rc) {
  1543. dprintk(CVP_ERR,
  1544. "%s: Failed mmrm_client_deregister with rc: %d\n",
  1545. __func__, rc);
  1546. } else {
  1547. dprintk(CVP_PWR,
  1548. "%s: Succeed mmrm_client_deregister for mmrm_cvp:%p, type:%d, uid:%ld\n",
  1549. __func__, device->mmrm_cvp, device->mmrm_cvp->client_type,
  1550. device->mmrm_cvp->client_uid);
  1551. device->mmrm_cvp = NULL;
  1552. }
  1553. }
  1554. __unload_fw(device);
  1555. /* unlink all sessions from device */
  1556. list_for_each_entry_safe(session, next, &device->sess_head, list) {
  1557. list_del(&session->list);
  1558. session->device = NULL;
  1559. }
  1560. dprintk(CVP_CORE, "Core released successfully\n");
  1561. mutex_unlock(&device->lock);
  1562. return rc;
  1563. }
  1564. static void __core_clear_interrupt(struct iris_hfi_device *device)
  1565. {
  1566. u32 intr_status = 0, mask = 0;
  1567. if (!device) {
  1568. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  1569. return;
  1570. }
  1571. intr_status = __read_register(device, CVP_WRAPPER_INTR_STATUS);
  1572. mask = (CVP_WRAPPER_INTR_MASK_A2HCPU_BMSK | CVP_FATAL_INTR_BMSK);
  1573. if (intr_status & mask) {
  1574. device->intr_status |= intr_status;
  1575. device->reg_count++;
  1576. dprintk(CVP_CORE,
  1577. "INTERRUPT for device: %pK: times: %d status: %d\n",
  1578. device, device->reg_count, intr_status);
  1579. } else {
  1580. device->spur_count++;
  1581. }
  1582. __write_register(device, CVP_CPU_CS_A2HSOFTINTCLR, 1);
  1583. }
  1584. static int iris_hfi_core_trigger_ssr(void *device,
  1585. enum hal_ssr_trigger_type type)
  1586. {
  1587. struct cvp_hfi_cmd_sys_test_ssr_packet pkt;
  1588. int rc = 0;
  1589. struct iris_hfi_device *dev;
  1590. if (!device) {
  1591. dprintk(CVP_ERR, "invalid device\n");
  1592. return -ENODEV;
  1593. }
  1594. dev = device;
  1595. if (mutex_trylock(&dev->lock)) {
  1596. rc = call_hfi_pkt_op(dev, ssr_cmd, type, &pkt);
  1597. if (rc) {
  1598. dprintk(CVP_ERR, "%s: failed to create packet\n",
  1599. __func__);
  1600. goto err_create_pkt;
  1601. }
  1602. if (__iface_cmdq_write(dev, &pkt))
  1603. rc = -ENOTEMPTY;
  1604. } else {
  1605. return -EAGAIN;
  1606. }
  1607. err_create_pkt:
  1608. mutex_unlock(&dev->lock);
  1609. return rc;
  1610. }
  1611. static void __set_default_sys_properties(struct iris_hfi_device *device)
  1612. {
  1613. if (__sys_set_debug(device, msm_cvp_fw_debug))
  1614. dprintk(CVP_WARN, "Setting fw_debug msg ON failed\n");
  1615. if (__sys_set_power_control(device, msm_cvp_fw_low_power_mode))
  1616. dprintk(CVP_WARN, "Setting h/w power collapse ON failed\n");
  1617. }
  1618. static void __session_clean(struct cvp_hal_session *session)
  1619. {
  1620. struct cvp_hal_session *temp, *next;
  1621. struct iris_hfi_device *device;
  1622. if (!session || !session->device) {
  1623. dprintk(CVP_WARN, "%s: invalid params\n", __func__);
  1624. return;
  1625. }
  1626. device = session->device;
  1627. dprintk(CVP_SESS, "deleted the session: %pK\n", session);
  1628. /*
  1629. * session might have been removed from the device list in
  1630. * core_release, so check and remove if it is in the list
  1631. */
  1632. list_for_each_entry_safe(temp, next, &device->sess_head, list) {
  1633. if (session == temp) {
  1634. list_del(&session->list);
  1635. break;
  1636. }
  1637. }
  1638. /* Poison the session handle with zeros */
  1639. *session = (struct cvp_hal_session){ {0} };
  1640. kfree(session);
  1641. }
  1642. static int iris_hfi_session_clean(void *session)
  1643. {
  1644. struct cvp_hal_session *sess_close;
  1645. struct iris_hfi_device *device;
  1646. if (!session) {
  1647. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  1648. return -EINVAL;
  1649. }
  1650. sess_close = session;
  1651. device = sess_close->device;
  1652. if (!device) {
  1653. dprintk(CVP_ERR, "Invalid device handle %s\n", __func__);
  1654. return -EINVAL;
  1655. }
  1656. mutex_lock(&device->lock);
  1657. __session_clean(sess_close);
  1658. mutex_unlock(&device->lock);
  1659. return 0;
  1660. }
  1661. static int iris_hfi_session_init(void *device, void *session_id,
  1662. void **new_session)
  1663. {
  1664. struct cvp_hfi_cmd_sys_session_init_packet pkt;
  1665. struct iris_hfi_device *dev;
  1666. struct cvp_hal_session *s;
  1667. if (!device || !new_session) {
  1668. dprintk(CVP_ERR, "%s - invalid input\n", __func__);
  1669. return -EINVAL;
  1670. }
  1671. dev = device;
  1672. mutex_lock(&dev->lock);
  1673. s = kzalloc(sizeof(*s), GFP_KERNEL);
  1674. if (!s) {
  1675. dprintk(CVP_ERR, "new session fail: Out of memory\n");
  1676. goto err_session_init_fail;
  1677. }
  1678. s->session_id = session_id;
  1679. s->device = dev;
  1680. dprintk(CVP_SESS,
  1681. "%s: inst %pK, session %pK\n", __func__, session_id, s);
  1682. list_add_tail(&s->list, &dev->sess_head);
  1683. __set_default_sys_properties(device);
  1684. if (call_hfi_pkt_op(dev, session_init, &pkt, s)) {
  1685. dprintk(CVP_ERR, "session_init: failed to create packet\n");
  1686. goto err_session_init_fail;
  1687. }
  1688. *new_session = s;
  1689. if (__iface_cmdq_write(dev, &pkt))
  1690. goto err_session_init_fail;
  1691. mutex_unlock(&dev->lock);
  1692. return 0;
  1693. err_session_init_fail:
  1694. if (s)
  1695. __session_clean(s);
  1696. *new_session = NULL;
  1697. mutex_unlock(&dev->lock);
  1698. return -EINVAL;
  1699. }
  1700. static int __send_session_cmd(struct cvp_hal_session *session, int pkt_type)
  1701. {
  1702. struct cvp_hal_session_cmd_pkt pkt;
  1703. int rc = 0;
  1704. struct iris_hfi_device *device = session->device;
  1705. if (!__is_session_valid(device, session, __func__))
  1706. return -ECONNRESET;
  1707. rc = call_hfi_pkt_op(device, session_cmd,
  1708. &pkt, pkt_type, session);
  1709. if (rc == -EPERM)
  1710. return 0;
  1711. if (rc) {
  1712. dprintk(CVP_ERR, "send session cmd: create pkt failed\n");
  1713. goto err_create_pkt;
  1714. }
  1715. if (__iface_cmdq_write(session->device, &pkt))
  1716. rc = -ENOTEMPTY;
  1717. err_create_pkt:
  1718. return rc;
  1719. }
  1720. static int iris_hfi_session_end(void *session)
  1721. {
  1722. struct cvp_hal_session *sess;
  1723. struct iris_hfi_device *device;
  1724. int rc = 0;
  1725. if (!session) {
  1726. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  1727. return -EINVAL;
  1728. }
  1729. sess = session;
  1730. device = sess->device;
  1731. if (!device) {
  1732. dprintk(CVP_ERR, "Invalid session %s\n", __func__);
  1733. return -EINVAL;
  1734. }
  1735. mutex_lock(&device->lock);
  1736. if (msm_cvp_fw_coverage) {
  1737. if (__sys_set_coverage(sess->device, msm_cvp_fw_coverage))
  1738. dprintk(CVP_WARN, "Fw_coverage msg ON failed\n");
  1739. }
  1740. rc = __send_session_cmd(session, HFI_CMD_SYS_SESSION_END);
  1741. mutex_unlock(&device->lock);
  1742. return rc;
  1743. }
  1744. static int iris_hfi_session_abort(void *sess)
  1745. {
  1746. struct cvp_hal_session *session = sess;
  1747. struct iris_hfi_device *device;
  1748. int rc = 0;
  1749. if (!session || !session->device) {
  1750. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  1751. return -EINVAL;
  1752. }
  1753. device = session->device;
  1754. mutex_lock(&device->lock);
  1755. rc = __send_session_cmd(session, HFI_CMD_SYS_SESSION_ABORT);
  1756. mutex_unlock(&device->lock);
  1757. return rc;
  1758. }
  1759. static int iris_hfi_session_set_buffers(void *sess, u32 iova, u32 size)
  1760. {
  1761. struct cvp_hfi_cmd_session_set_buffers_packet pkt;
  1762. int rc = 0;
  1763. struct cvp_hal_session *session = sess;
  1764. struct iris_hfi_device *device;
  1765. if (!session || !session->device || !iova || !size) {
  1766. dprintk(CVP_ERR, "Invalid Params\n");
  1767. return -EINVAL;
  1768. }
  1769. device = session->device;
  1770. mutex_lock(&device->lock);
  1771. if (!__is_session_valid(device, session, __func__)) {
  1772. rc = -ECONNRESET;
  1773. goto err_create_pkt;
  1774. }
  1775. rc = call_hfi_pkt_op(device, session_set_buffers,
  1776. &pkt, session, iova, size);
  1777. if (rc) {
  1778. dprintk(CVP_ERR, "set buffers: failed to create packet\n");
  1779. goto err_create_pkt;
  1780. }
  1781. if (__iface_cmdq_write(session->device, &pkt))
  1782. rc = -ENOTEMPTY;
  1783. err_create_pkt:
  1784. mutex_unlock(&device->lock);
  1785. return rc;
  1786. }
  1787. static int iris_hfi_session_release_buffers(void *sess)
  1788. {
  1789. struct cvp_session_release_buffers_packet pkt;
  1790. int rc = 0;
  1791. struct cvp_hal_session *session = sess;
  1792. struct iris_hfi_device *device;
  1793. if (!session || !session->device) {
  1794. dprintk(CVP_ERR, "Invalid Params\n");
  1795. return -EINVAL;
  1796. }
  1797. device = session->device;
  1798. mutex_lock(&device->lock);
  1799. if (!__is_session_valid(device, session, __func__)) {
  1800. rc = -ECONNRESET;
  1801. goto err_create_pkt;
  1802. }
  1803. rc = call_hfi_pkt_op(device, session_release_buffers, &pkt, session);
  1804. if (rc) {
  1805. dprintk(CVP_ERR, "release buffers: failed to create packet\n");
  1806. goto err_create_pkt;
  1807. }
  1808. if (__iface_cmdq_write(session->device, &pkt))
  1809. rc = -ENOTEMPTY;
  1810. err_create_pkt:
  1811. mutex_unlock(&device->lock);
  1812. return rc;
  1813. }
  1814. static int iris_hfi_session_send(void *sess,
  1815. struct eva_kmd_hfi_packet *in_pkt)
  1816. {
  1817. int rc = 0;
  1818. struct eva_kmd_hfi_packet pkt;
  1819. struct cvp_hal_session *session = sess;
  1820. struct iris_hfi_device *device;
  1821. if (!session || !session->device) {
  1822. dprintk(CVP_ERR, "invalid session");
  1823. return -ENODEV;
  1824. }
  1825. device = session->device;
  1826. mutex_lock(&device->lock);
  1827. if (!__is_session_valid(device, session, __func__)) {
  1828. rc = -ECONNRESET;
  1829. goto err_send_pkt;
  1830. }
  1831. rc = call_hfi_pkt_op(device, session_send,
  1832. &pkt, session, in_pkt);
  1833. if (rc) {
  1834. dprintk(CVP_ERR,
  1835. "failed to create pkt\n");
  1836. goto err_send_pkt;
  1837. }
  1838. if (__iface_cmdq_write(session->device, &pkt))
  1839. rc = -ENOTEMPTY;
  1840. err_send_pkt:
  1841. mutex_unlock(&device->lock);
  1842. return rc;
  1843. return rc;
  1844. }
  1845. static int iris_hfi_session_flush(void *sess)
  1846. {
  1847. struct cvp_hal_session *session = sess;
  1848. struct iris_hfi_device *device;
  1849. int rc = 0;
  1850. if (!session || !session->device) {
  1851. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  1852. return -EINVAL;
  1853. }
  1854. device = session->device;
  1855. mutex_lock(&device->lock);
  1856. rc = __send_session_cmd(session, HFI_CMD_SESSION_CVP_FLUSH);
  1857. mutex_unlock(&device->lock);
  1858. return rc;
  1859. }
  1860. static int __check_core_registered(struct iris_hfi_device *device,
  1861. phys_addr_t fw_addr, u8 *reg_addr, u32 reg_size,
  1862. phys_addr_t irq)
  1863. {
  1864. struct cvp_hal_data *cvp_hal_data;
  1865. if (!device) {
  1866. dprintk(CVP_INFO, "no device Registered\n");
  1867. return -EINVAL;
  1868. }
  1869. cvp_hal_data = device->cvp_hal_data;
  1870. if (!cvp_hal_data)
  1871. return -EINVAL;
  1872. if (cvp_hal_data->irq == irq &&
  1873. (CONTAINS(cvp_hal_data->firmware_base,
  1874. FIRMWARE_SIZE, fw_addr) ||
  1875. CONTAINS(fw_addr, FIRMWARE_SIZE,
  1876. cvp_hal_data->firmware_base) ||
  1877. CONTAINS(cvp_hal_data->register_base,
  1878. reg_size, reg_addr) ||
  1879. CONTAINS(reg_addr, reg_size,
  1880. cvp_hal_data->register_base) ||
  1881. OVERLAPS(cvp_hal_data->register_base,
  1882. reg_size, reg_addr, reg_size) ||
  1883. OVERLAPS(reg_addr, reg_size,
  1884. cvp_hal_data->register_base,
  1885. reg_size) ||
  1886. OVERLAPS(cvp_hal_data->firmware_base,
  1887. FIRMWARE_SIZE, fw_addr,
  1888. FIRMWARE_SIZE) ||
  1889. OVERLAPS(fw_addr, FIRMWARE_SIZE,
  1890. cvp_hal_data->firmware_base,
  1891. FIRMWARE_SIZE))) {
  1892. return 0;
  1893. }
  1894. dprintk(CVP_INFO, "Device not registered\n");
  1895. return -EINVAL;
  1896. }
  1897. static void __process_fatal_error(
  1898. struct iris_hfi_device *device)
  1899. {
  1900. struct msm_cvp_cb_cmd_done cmd_done = {0};
  1901. cmd_done.device_id = device->device_id;
  1902. device->callback(HAL_SYS_ERROR, &cmd_done);
  1903. }
  1904. static int __prepare_pc(struct iris_hfi_device *device)
  1905. {
  1906. int rc = 0;
  1907. struct cvp_hfi_cmd_sys_pc_prep_packet pkt;
  1908. rc = call_hfi_pkt_op(device, sys_pc_prep, &pkt);
  1909. if (rc) {
  1910. dprintk(CVP_ERR, "Failed to create sys pc prep pkt\n");
  1911. goto err_pc_prep;
  1912. }
  1913. if (__iface_cmdq_write(device, &pkt))
  1914. rc = -ENOTEMPTY;
  1915. if (rc)
  1916. dprintk(CVP_ERR, "Failed to prepare iris for power off");
  1917. err_pc_prep:
  1918. return rc;
  1919. }
  1920. static void iris_hfi_pm_handler(struct work_struct *work)
  1921. {
  1922. int rc = 0;
  1923. struct msm_cvp_core *core;
  1924. struct iris_hfi_device *device;
  1925. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  1926. if (core)
  1927. device = core->device->hfi_device_data;
  1928. else
  1929. return;
  1930. if (!device) {
  1931. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  1932. return;
  1933. }
  1934. dprintk(CVP_PWR,
  1935. "Entering %s\n", __func__);
  1936. /*
  1937. * It is ok to check this variable outside the lock since
  1938. * it is being updated in this context only
  1939. */
  1940. if (device->skip_pc_count >= CVP_MAX_PC_SKIP_COUNT) {
  1941. dprintk(CVP_WARN, "Failed to PC for %d times\n",
  1942. device->skip_pc_count);
  1943. device->skip_pc_count = 0;
  1944. __process_fatal_error(device);
  1945. return;
  1946. }
  1947. mutex_lock(&device->lock);
  1948. if (gfa_cv.state == DSP_SUSPEND)
  1949. rc = __power_collapse(device, true);
  1950. else
  1951. rc = __power_collapse(device, false);
  1952. mutex_unlock(&device->lock);
  1953. switch (rc) {
  1954. case 0:
  1955. device->skip_pc_count = 0;
  1956. /* Cancel pending delayed works if any */
  1957. cancel_delayed_work(&iris_hfi_pm_work);
  1958. dprintk(CVP_PWR, "%s: power collapse successful!\n",
  1959. __func__);
  1960. break;
  1961. case -EBUSY:
  1962. device->skip_pc_count = 0;
  1963. dprintk(CVP_PWR, "%s: retry PC as cvp is busy\n", __func__);
  1964. queue_delayed_work(device->iris_pm_workq,
  1965. &iris_hfi_pm_work, msecs_to_jiffies(
  1966. device->res->msm_cvp_pwr_collapse_delay));
  1967. break;
  1968. case -EAGAIN:
  1969. device->skip_pc_count++;
  1970. dprintk(CVP_WARN, "%s: retry power collapse (count %d)\n",
  1971. __func__, device->skip_pc_count);
  1972. queue_delayed_work(device->iris_pm_workq,
  1973. &iris_hfi_pm_work, msecs_to_jiffies(
  1974. device->res->msm_cvp_pwr_collapse_delay));
  1975. break;
  1976. default:
  1977. dprintk(CVP_ERR, "%s: power collapse failed\n", __func__);
  1978. break;
  1979. }
  1980. }
  1981. static int __power_collapse(struct iris_hfi_device *device, bool force)
  1982. {
  1983. int rc = 0;
  1984. u32 wfi_status = 0, idle_status = 0, pc_ready = 0;
  1985. u32 flags = 0;
  1986. int count = 0;
  1987. const int max_tries = 150;
  1988. if (!device) {
  1989. dprintk(CVP_ERR, "%s: invalid params\n", __func__);
  1990. return -EINVAL;
  1991. }
  1992. if (!device->power_enabled) {
  1993. dprintk(CVP_PWR, "%s: Power already disabled\n",
  1994. __func__);
  1995. goto exit;
  1996. }
  1997. rc = __core_in_valid_state(device);
  1998. if (!rc) {
  1999. dprintk(CVP_WARN,
  2000. "Core is in bad state, Skipping power collapse\n");
  2001. return -EINVAL;
  2002. }
  2003. rc = __dsp_suspend(device, force, flags);
  2004. if (rc == -EBUSY)
  2005. goto exit;
  2006. else if (rc)
  2007. goto skip_power_off;
  2008. pc_ready = __read_register(device, CVP_CTRL_STATUS) &
  2009. CVP_CTRL_STATUS_PC_READY;
  2010. if (!pc_ready) {
  2011. wfi_status = __read_register(device,
  2012. CVP_WRAPPER_CPU_STATUS);
  2013. idle_status = __read_register(device,
  2014. CVP_CTRL_STATUS);
  2015. if (!(wfi_status & BIT(0))) {
  2016. dprintk(CVP_WARN,
  2017. "Skipping PC as wfi_status (%#x) bit not set\n",
  2018. wfi_status);
  2019. goto skip_power_off;
  2020. }
  2021. if (!(idle_status & BIT(30))) {
  2022. dprintk(CVP_WARN,
  2023. "Skipping PC as idle_status (%#x) bit not set\n",
  2024. idle_status);
  2025. goto skip_power_off;
  2026. }
  2027. rc = __prepare_pc(device);
  2028. if (rc) {
  2029. dprintk(CVP_WARN, "Failed PC %d\n", rc);
  2030. goto skip_power_off;
  2031. }
  2032. while (count < max_tries) {
  2033. wfi_status = __read_register(device,
  2034. CVP_WRAPPER_CPU_STATUS);
  2035. pc_ready = __read_register(device,
  2036. CVP_CTRL_STATUS);
  2037. if ((wfi_status & BIT(0)) && (pc_ready &
  2038. CVP_CTRL_STATUS_PC_READY))
  2039. break;
  2040. usleep_range(150, 250);
  2041. count++;
  2042. }
  2043. if (count == max_tries) {
  2044. dprintk(CVP_ERR,
  2045. "Skip PC. Core is not in right state (%#x, %#x)\n",
  2046. wfi_status, pc_ready);
  2047. goto skip_power_off;
  2048. }
  2049. }
  2050. __flush_debug_queue(device, device->raw_packet);
  2051. rc = __suspend(device);
  2052. if (rc)
  2053. dprintk(CVP_ERR, "Failed __suspend\n");
  2054. exit:
  2055. return rc;
  2056. skip_power_off:
  2057. dprintk(CVP_PWR, "Skip PC(%#x, %#x, %#x)\n",
  2058. wfi_status, idle_status, pc_ready);
  2059. __flush_debug_queue(device, device->raw_packet);
  2060. return -EAGAIN;
  2061. }
  2062. static void __process_sys_error(struct iris_hfi_device *device)
  2063. {
  2064. struct cvp_hfi_sfr_struct *vsfr = NULL;
  2065. vsfr = (struct cvp_hfi_sfr_struct *)device->sfr.align_virtual_addr;
  2066. if (vsfr) {
  2067. void *p = memchr(vsfr->rg_data, '\0', vsfr->bufSize);
  2068. /*
  2069. * SFR isn't guaranteed to be NULL terminated
  2070. * since SYS_ERROR indicates that Iris is in the
  2071. * process of crashing.
  2072. */
  2073. if (p == NULL)
  2074. vsfr->rg_data[vsfr->bufSize - 1] = '\0';
  2075. dprintk(CVP_ERR, "SFR Message from FW: %s\n",
  2076. vsfr->rg_data);
  2077. }
  2078. }
  2079. static void __flush_debug_queue(struct iris_hfi_device *device, u8 *packet)
  2080. {
  2081. bool local_packet = false;
  2082. enum cvp_msg_prio log_level = CVP_FW;
  2083. if (!device) {
  2084. dprintk(CVP_ERR, "%s: Invalid params\n", __func__);
  2085. return;
  2086. }
  2087. if (!packet) {
  2088. packet = kzalloc(CVP_IFACEQ_VAR_HUGE_PKT_SIZE, GFP_KERNEL);
  2089. if (!packet) {
  2090. dprintk(CVP_ERR, "In %s() Fail to allocate mem\n",
  2091. __func__);
  2092. return;
  2093. }
  2094. local_packet = true;
  2095. /*
  2096. * Local packek is used when something FATAL occurred.
  2097. * It is good to print these logs by default.
  2098. */
  2099. log_level = CVP_ERR;
  2100. }
  2101. #define SKIP_INVALID_PKT(pkt_size, payload_size, pkt_hdr_size) ({ \
  2102. if (pkt_size < pkt_hdr_size || \
  2103. payload_size < MIN_PAYLOAD_SIZE || \
  2104. payload_size > \
  2105. (pkt_size - pkt_hdr_size + sizeof(u8))) { \
  2106. dprintk(CVP_ERR, \
  2107. "%s: invalid msg size - %d\n", \
  2108. __func__, pkt->msg_size); \
  2109. continue; \
  2110. } \
  2111. })
  2112. while (!__iface_dbgq_read(device, packet)) {
  2113. struct cvp_hfi_packet_header *pkt =
  2114. (struct cvp_hfi_packet_header *) packet;
  2115. if (pkt->size < sizeof(struct cvp_hfi_packet_header)) {
  2116. dprintk(CVP_ERR, "Invalid pkt size - %s\n",
  2117. __func__);
  2118. continue;
  2119. }
  2120. if (pkt->packet_type == HFI_MSG_SYS_DEBUG) {
  2121. struct cvp_hfi_msg_sys_debug_packet *pkt =
  2122. (struct cvp_hfi_msg_sys_debug_packet *) packet;
  2123. SKIP_INVALID_PKT(pkt->size,
  2124. pkt->msg_size, sizeof(*pkt));
  2125. /*
  2126. * All fw messages starts with new line character. This
  2127. * causes dprintk to print this message in two lines
  2128. * in the kernel log. Ignoring the first character
  2129. * from the message fixes this to print it in a single
  2130. * line.
  2131. */
  2132. pkt->rg_msg_data[pkt->msg_size-1] = '\0';
  2133. dprintk(log_level, "%s", &pkt->rg_msg_data[1]);
  2134. }
  2135. }
  2136. #undef SKIP_INVALID_PKT
  2137. if (local_packet)
  2138. kfree(packet);
  2139. }
  2140. static bool __is_session_valid(struct iris_hfi_device *device,
  2141. struct cvp_hal_session *session, const char *func)
  2142. {
  2143. struct cvp_hal_session *temp = NULL;
  2144. if (!device || !session)
  2145. goto invalid;
  2146. list_for_each_entry(temp, &device->sess_head, list)
  2147. if (session == temp)
  2148. return true;
  2149. invalid:
  2150. dprintk(CVP_WARN, "%s: device %pK, invalid session %pK\n",
  2151. func, device, session);
  2152. return false;
  2153. }
  2154. static struct cvp_hal_session *__get_session(struct iris_hfi_device *device,
  2155. u32 session_id)
  2156. {
  2157. struct cvp_hal_session *temp = NULL;
  2158. list_for_each_entry(temp, &device->sess_head, list) {
  2159. if (session_id == hash32_ptr(temp))
  2160. return temp;
  2161. }
  2162. return NULL;
  2163. }
  2164. #define _INVALID_MSG_ "Unrecognized MSG (%#x) session (%pK), discarding\n"
  2165. #define _INVALID_STATE_ "Ignore responses from %d to %d invalid state\n"
  2166. #define _DEVFREQ_FAIL_ "Failed to add devfreq device bus %s governor %s: %d\n"
  2167. static void process_system_msg(struct msm_cvp_cb_info *info,
  2168. struct iris_hfi_device *device,
  2169. void *raw_packet)
  2170. {
  2171. struct cvp_hal_sys_init_done sys_init_done = {0};
  2172. switch (info->response_type) {
  2173. case HAL_SYS_ERROR:
  2174. __process_sys_error(device);
  2175. break;
  2176. case HAL_SYS_RELEASE_RESOURCE_DONE:
  2177. dprintk(CVP_CORE, "Received SYS_RELEASE_RESOURCE\n");
  2178. break;
  2179. case HAL_SYS_INIT_DONE:
  2180. dprintk(CVP_CORE, "Received SYS_INIT_DONE\n");
  2181. sys_init_done.capabilities =
  2182. device->sys_init_capabilities;
  2183. cvp_hfi_process_sys_init_done_prop_read(
  2184. (struct cvp_hfi_msg_sys_init_done_packet *)
  2185. raw_packet, &sys_init_done);
  2186. info->response.cmd.data.sys_init_done = sys_init_done;
  2187. break;
  2188. default:
  2189. break;
  2190. }
  2191. }
  2192. static void **get_session_id(struct msm_cvp_cb_info *info)
  2193. {
  2194. void **session_id = NULL;
  2195. /* For session-related packets, validate session */
  2196. switch (info->response_type) {
  2197. case HAL_SESSION_INIT_DONE:
  2198. case HAL_SESSION_END_DONE:
  2199. case HAL_SESSION_ABORT_DONE:
  2200. case HAL_SESSION_STOP_DONE:
  2201. case HAL_SESSION_FLUSH_DONE:
  2202. case HAL_SESSION_SET_BUFFER_DONE:
  2203. case HAL_SESSION_SUSPEND_DONE:
  2204. case HAL_SESSION_RESUME_DONE:
  2205. case HAL_SESSION_SET_PROP_DONE:
  2206. case HAL_SESSION_GET_PROP_DONE:
  2207. case HAL_SESSION_RELEASE_BUFFER_DONE:
  2208. case HAL_SESSION_REGISTER_BUFFER_DONE:
  2209. case HAL_SESSION_UNREGISTER_BUFFER_DONE:
  2210. case HAL_SESSION_PROPERTY_INFO:
  2211. case HAL_SESSION_EVENT_CHANGE:
  2212. case HAL_SESSION_DUMP_NOTIFY:
  2213. session_id = &info->response.cmd.session_id;
  2214. break;
  2215. case HAL_SESSION_ERROR:
  2216. session_id = &info->response.data.session_id;
  2217. break;
  2218. case HAL_RESPONSE_UNUSED:
  2219. default:
  2220. session_id = NULL;
  2221. break;
  2222. }
  2223. return session_id;
  2224. }
  2225. static void print_msg_hdr(void *hdr)
  2226. {
  2227. struct cvp_hfi_msg_session_hdr *new_hdr =
  2228. (struct cvp_hfi_msg_session_hdr *)hdr;
  2229. dprintk(CVP_HFI, "HFI MSG received: %x %x %x %x %x %x %x\n",
  2230. new_hdr->size, new_hdr->packet_type,
  2231. new_hdr->session_id,
  2232. new_hdr->client_data.transaction_id,
  2233. new_hdr->client_data.data1,
  2234. new_hdr->client_data.data2,
  2235. new_hdr->error_type);
  2236. }
  2237. static int __response_handler(struct iris_hfi_device *device)
  2238. {
  2239. struct msm_cvp_cb_info *packets;
  2240. int packet_count = 0;
  2241. u8 *raw_packet = NULL;
  2242. bool requeue_pm_work = true;
  2243. if (!device || device->state != IRIS_STATE_INIT)
  2244. return 0;
  2245. packets = device->response_pkt;
  2246. raw_packet = device->raw_packet;
  2247. if (!raw_packet || !packets) {
  2248. dprintk(CVP_ERR,
  2249. "%s: Invalid args : Res packet = %p, Raw packet = %p\n",
  2250. __func__, packets, raw_packet);
  2251. return 0;
  2252. }
  2253. if (device->intr_status & CVP_FATAL_INTR_BMSK) {
  2254. struct cvp_hfi_sfr_struct *vsfr = (struct cvp_hfi_sfr_struct *)
  2255. device->sfr.align_virtual_addr;
  2256. struct msm_cvp_cb_info info = {
  2257. .response_type = HAL_SYS_WATCHDOG_TIMEOUT,
  2258. .response.cmd = {
  2259. .device_id = device->device_id,
  2260. }
  2261. };
  2262. if (vsfr)
  2263. dprintk(CVP_ERR, "SFR Message from FW: %s\n",
  2264. vsfr->rg_data);
  2265. if (device->intr_status & CVP_WRAPPER_INTR_MASK_CPU_NOC_BMSK)
  2266. dprintk(CVP_ERR, "Received Xtensa NOC error\n");
  2267. if (device->intr_status & CVP_WRAPPER_INTR_MASK_CORE_NOC_BMSK)
  2268. dprintk(CVP_ERR, "Received CVP core NOC error\n");
  2269. if (device->intr_status & CVP_WRAPPER_INTR_MASK_A2HWD_BMSK)
  2270. dprintk(CVP_ERR, "Received CVP watchdog timeout\n");
  2271. packets[packet_count++] = info;
  2272. goto exit;
  2273. }
  2274. /* Bleed the msg queue dry of packets */
  2275. while (!__iface_msgq_read(device, raw_packet)) {
  2276. void **session_id = NULL;
  2277. struct msm_cvp_cb_info *info = &packets[packet_count++];
  2278. struct cvp_hfi_msg_session_hdr *hdr =
  2279. (struct cvp_hfi_msg_session_hdr *)raw_packet;
  2280. int rc = 0;
  2281. print_msg_hdr(hdr);
  2282. rc = cvp_hfi_process_msg_packet(device->device_id,
  2283. raw_packet, info);
  2284. if (rc) {
  2285. dprintk(CVP_WARN,
  2286. "Corrupt/unknown packet found, discarding\n");
  2287. --packet_count;
  2288. continue;
  2289. } else if (info->response_type == HAL_NO_RESP) {
  2290. --packet_count;
  2291. continue;
  2292. }
  2293. /* Process the packet types that we're interested in */
  2294. process_system_msg(info, device, raw_packet);
  2295. session_id = get_session_id(info);
  2296. /*
  2297. * hfi_process_msg_packet provides a session_id that's a hashed
  2298. * value of struct cvp_hal_session, we need to coerce the hashed
  2299. * value back to pointer that we can use. Ideally, hfi_process\
  2300. * _msg_packet should take care of this, but it doesn't have
  2301. * required information for it
  2302. */
  2303. if (session_id) {
  2304. struct cvp_hal_session *session = NULL;
  2305. if (upper_32_bits((uintptr_t)*session_id) != 0) {
  2306. dprintk(CVP_ERR,
  2307. "Upper 32-bits != 0 for sess_id=%pK\n",
  2308. *session_id);
  2309. }
  2310. session = __get_session(device,
  2311. (u32)(uintptr_t)*session_id);
  2312. if (!session) {
  2313. dprintk(CVP_ERR, _INVALID_MSG_,
  2314. info->response_type,
  2315. *session_id);
  2316. --packet_count;
  2317. continue;
  2318. }
  2319. *session_id = session->session_id;
  2320. }
  2321. if (packet_count >= cvp_max_packets) {
  2322. dprintk(CVP_WARN,
  2323. "Too many packets in message queue!\n");
  2324. break;
  2325. }
  2326. /* do not read packets after sys error packet */
  2327. if (info->response_type == HAL_SYS_ERROR)
  2328. break;
  2329. }
  2330. if (requeue_pm_work && device->res->sw_power_collapsible) {
  2331. cancel_delayed_work(&iris_hfi_pm_work);
  2332. if (!queue_delayed_work(device->iris_pm_workq,
  2333. &iris_hfi_pm_work,
  2334. msecs_to_jiffies(
  2335. device->res->msm_cvp_pwr_collapse_delay))) {
  2336. dprintk(CVP_ERR, "PM work already scheduled\n");
  2337. }
  2338. }
  2339. exit:
  2340. __flush_debug_queue(device, raw_packet);
  2341. return packet_count;
  2342. }
  2343. static void iris_hfi_core_work_handler(struct work_struct *work)
  2344. {
  2345. struct msm_cvp_core *core;
  2346. struct iris_hfi_device *device;
  2347. int num_responses = 0, i = 0;
  2348. u32 intr_status;
  2349. static bool warning_on = true;
  2350. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  2351. if (core)
  2352. device = core->device->hfi_device_data;
  2353. else
  2354. return;
  2355. mutex_lock(&device->lock);
  2356. if (!__core_in_valid_state(device)) {
  2357. if (warning_on) {
  2358. dprintk(CVP_WARN, "%s Core not in init state\n",
  2359. __func__);
  2360. warning_on = false;
  2361. }
  2362. goto err_no_work;
  2363. }
  2364. warning_on = true;
  2365. if (!device->callback) {
  2366. dprintk(CVP_ERR, "No interrupt callback function: %pK\n",
  2367. device);
  2368. goto err_no_work;
  2369. }
  2370. if (__resume(device)) {
  2371. dprintk(CVP_ERR, "%s: Power enable failed\n", __func__);
  2372. goto err_no_work;
  2373. }
  2374. __core_clear_interrupt(device);
  2375. num_responses = __response_handler(device);
  2376. dprintk(CVP_HFI, "%s:: cvp_driver_debug num_responses = %d ",
  2377. __func__, num_responses);
  2378. err_no_work:
  2379. /* Keep the interrupt status before releasing device lock */
  2380. intr_status = device->intr_status;
  2381. mutex_unlock(&device->lock);
  2382. /*
  2383. * Issue the callbacks outside of the locked contex to preserve
  2384. * re-entrancy.
  2385. */
  2386. for (i = 0; !IS_ERR_OR_NULL(device->response_pkt) &&
  2387. i < num_responses; ++i) {
  2388. struct msm_cvp_cb_info *r = &device->response_pkt[i];
  2389. void *rsp = (void *)&r->response;
  2390. if (!__core_in_valid_state(device)) {
  2391. dprintk(CVP_ERR,
  2392. _INVALID_STATE_, (i + 1), num_responses);
  2393. break;
  2394. }
  2395. dprintk(CVP_HFI, "Processing response %d of %d, type %d\n",
  2396. (i + 1), num_responses, r->response_type);
  2397. device->callback(r->response_type, rsp);
  2398. }
  2399. /* We need re-enable the irq which was disabled in ISR handler */
  2400. if (!(intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  2401. enable_irq(device->cvp_hal_data->irq);
  2402. /*
  2403. * XXX: Don't add any code beyond here. Reacquiring locks after release
  2404. * it above doesn't guarantee the atomicity that we're aiming for.
  2405. */
  2406. }
  2407. static DECLARE_WORK(iris_hfi_work, iris_hfi_core_work_handler);
  2408. static irqreturn_t iris_hfi_isr(int irq, void *dev)
  2409. {
  2410. struct iris_hfi_device *device = dev;
  2411. disable_irq_nosync(irq);
  2412. queue_work(device->cvp_workq, &iris_hfi_work);
  2413. return IRQ_HANDLED;
  2414. }
  2415. static int __init_regs_and_interrupts(struct iris_hfi_device *device,
  2416. struct msm_cvp_platform_resources *res)
  2417. {
  2418. struct cvp_hal_data *hal = NULL;
  2419. int rc = 0;
  2420. rc = __check_core_registered(device, res->firmware_base,
  2421. (u8 *)(uintptr_t)res->register_base,
  2422. res->register_size, res->irq);
  2423. if (!rc) {
  2424. dprintk(CVP_ERR, "Core present/Already added\n");
  2425. rc = -EEXIST;
  2426. goto err_core_init;
  2427. }
  2428. hal = kzalloc(sizeof(*hal), GFP_KERNEL);
  2429. if (!hal) {
  2430. dprintk(CVP_ERR, "Failed to alloc\n");
  2431. rc = -ENOMEM;
  2432. goto err_core_init;
  2433. }
  2434. hal->irq = res->irq;
  2435. hal->firmware_base = res->firmware_base;
  2436. hal->register_base = devm_ioremap(&res->pdev->dev,
  2437. res->register_base, res->register_size);
  2438. hal->register_size = res->register_size;
  2439. if (!hal->register_base) {
  2440. dprintk(CVP_ERR,
  2441. "could not map reg addr %pa of size %d\n",
  2442. &res->register_base, res->register_size);
  2443. goto error_irq_fail;
  2444. }
  2445. if (res->gcc_reg_base) {
  2446. hal->gcc_reg_base = devm_ioremap(&res->pdev->dev,
  2447. res->gcc_reg_base, res->gcc_reg_size);
  2448. hal->gcc_reg_size = res->gcc_reg_size;
  2449. if (!hal->gcc_reg_base)
  2450. dprintk(CVP_ERR,
  2451. "could not map gcc reg addr %pa of size %d\n",
  2452. &res->gcc_reg_base, res->gcc_reg_size);
  2453. }
  2454. device->cvp_hal_data = hal;
  2455. rc = request_irq(res->irq, iris_hfi_isr, IRQF_TRIGGER_HIGH,
  2456. "msm_cvp", device);
  2457. if (unlikely(rc)) {
  2458. dprintk(CVP_ERR, "() :request_irq failed\n");
  2459. goto error_irq_fail;
  2460. }
  2461. disable_irq_nosync(res->irq);
  2462. dprintk(CVP_INFO,
  2463. "firmware_base = %pa, register_base = %pa, register_size = %d\n",
  2464. &res->firmware_base, &res->register_base,
  2465. res->register_size);
  2466. return rc;
  2467. error_irq_fail:
  2468. kfree(hal);
  2469. err_core_init:
  2470. return rc;
  2471. }
  2472. static int __handle_reset_clk(struct msm_cvp_platform_resources *res,
  2473. int reset_index, enum reset_state state,
  2474. enum power_state pwr_state)
  2475. {
  2476. int rc = 0;
  2477. struct reset_control *rst;
  2478. struct reset_info rst_info;
  2479. struct reset_set *rst_set = &res->reset_set;
  2480. if (!rst_set->reset_tbl)
  2481. return 0;
  2482. rst_info = rst_set->reset_tbl[reset_index];
  2483. rst = rst_info.rst;
  2484. dprintk(CVP_PWR, "reset_clk: name %s reset_state %d rst %pK ps=%d\n",
  2485. rst_set->reset_tbl[reset_index].name, state, rst, pwr_state);
  2486. switch (state) {
  2487. case INIT:
  2488. if (rst)
  2489. goto skip_reset_init;
  2490. rst = devm_reset_control_get(&res->pdev->dev,
  2491. rst_set->reset_tbl[reset_index].name);
  2492. if (IS_ERR(rst))
  2493. rc = PTR_ERR(rst);
  2494. rst_set->reset_tbl[reset_index].rst = rst;
  2495. break;
  2496. case ASSERT:
  2497. if (!rst) {
  2498. rc = PTR_ERR(rst);
  2499. goto failed_to_reset;
  2500. }
  2501. if (pwr_state != rst_info.required_state)
  2502. break;
  2503. rc = reset_control_assert(rst);
  2504. break;
  2505. case DEASSERT:
  2506. if (!rst) {
  2507. rc = PTR_ERR(rst);
  2508. goto failed_to_reset;
  2509. }
  2510. if (pwr_state != rst_info.required_state)
  2511. break;
  2512. rc = reset_control_deassert(rst);
  2513. break;
  2514. default:
  2515. dprintk(CVP_ERR, "Invalid reset request\n");
  2516. if (rc)
  2517. goto failed_to_reset;
  2518. }
  2519. return 0;
  2520. skip_reset_init:
  2521. failed_to_reset:
  2522. return rc;
  2523. }
  2524. static int reset_ahb2axi_bridge(struct iris_hfi_device *device)
  2525. {
  2526. int rc, i;
  2527. enum power_state s;
  2528. if (!device) {
  2529. dprintk(CVP_ERR, "NULL device\n");
  2530. rc = -EINVAL;
  2531. goto failed_to_reset;
  2532. }
  2533. if (device->power_enabled)
  2534. s = CVP_POWER_ON;
  2535. else
  2536. s = CVP_POWER_OFF;
  2537. for (i = 0; i < device->res->reset_set.count; i++) {
  2538. rc = __handle_reset_clk(device->res, i, ASSERT, s);
  2539. if (rc) {
  2540. dprintk(CVP_ERR,
  2541. "failed to assert reset clocks\n");
  2542. goto failed_to_reset;
  2543. }
  2544. /* wait for deassert */
  2545. usleep_range(1000, 1050);
  2546. rc = __handle_reset_clk(device->res, i, DEASSERT, s);
  2547. if (rc) {
  2548. dprintk(CVP_ERR,
  2549. "failed to deassert reset clocks\n");
  2550. goto failed_to_reset;
  2551. }
  2552. }
  2553. return 0;
  2554. failed_to_reset:
  2555. return rc;
  2556. }
  2557. static void __deinit_bus(struct iris_hfi_device *device)
  2558. {
  2559. struct bus_info *bus = NULL;
  2560. if (!device)
  2561. return;
  2562. kfree(device->bus_vote.data);
  2563. device->bus_vote = CVP_DEFAULT_BUS_VOTE;
  2564. iris_hfi_for_each_bus_reverse(device, bus) {
  2565. dev_set_drvdata(bus->dev, NULL);
  2566. icc_put(bus->client);
  2567. bus->client = NULL;
  2568. }
  2569. }
  2570. static int __init_bus(struct iris_hfi_device *device)
  2571. {
  2572. struct bus_info *bus = NULL;
  2573. int rc = 0;
  2574. if (!device)
  2575. return -EINVAL;
  2576. iris_hfi_for_each_bus(device, bus) {
  2577. /*
  2578. * This is stupid, but there's no other easy way to ahold
  2579. * of struct bus_info in iris_hfi_devfreq_*()
  2580. */
  2581. WARN(dev_get_drvdata(bus->dev), "%s's drvdata already set\n",
  2582. dev_name(bus->dev));
  2583. dev_set_drvdata(bus->dev, device);
  2584. bus->client = icc_get(&device->res->pdev->dev,
  2585. bus->master, bus->slave);
  2586. if (IS_ERR_OR_NULL(bus->client)) {
  2587. rc = PTR_ERR(bus->client) ?: -EBADHANDLE;
  2588. dprintk(CVP_ERR, "Failed to register bus %s: %d\n",
  2589. bus->name, rc);
  2590. bus->client = NULL;
  2591. goto err_add_dev;
  2592. }
  2593. }
  2594. return 0;
  2595. err_add_dev:
  2596. __deinit_bus(device);
  2597. return rc;
  2598. }
  2599. static void __deinit_regulators(struct iris_hfi_device *device)
  2600. {
  2601. struct regulator_info *rinfo = NULL;
  2602. iris_hfi_for_each_regulator_reverse(device, rinfo) {
  2603. if (rinfo->regulator) {
  2604. regulator_put(rinfo->regulator);
  2605. rinfo->regulator = NULL;
  2606. }
  2607. }
  2608. }
  2609. static int __init_regulators(struct iris_hfi_device *device)
  2610. {
  2611. int rc = 0;
  2612. struct regulator_info *rinfo = NULL;
  2613. iris_hfi_for_each_regulator(device, rinfo) {
  2614. rinfo->regulator = regulator_get(&device->res->pdev->dev,
  2615. rinfo->name);
  2616. if (IS_ERR_OR_NULL(rinfo->regulator)) {
  2617. rc = PTR_ERR(rinfo->regulator) ?: -EBADHANDLE;
  2618. dprintk(CVP_ERR, "Failed to get regulator: %s\n",
  2619. rinfo->name);
  2620. rinfo->regulator = NULL;
  2621. goto err_reg_get;
  2622. }
  2623. }
  2624. return 0;
  2625. err_reg_get:
  2626. __deinit_regulators(device);
  2627. return rc;
  2628. }
  2629. static void __deinit_subcaches(struct iris_hfi_device *device)
  2630. {
  2631. struct subcache_info *sinfo = NULL;
  2632. if (!device) {
  2633. dprintk(CVP_ERR, "deinit_subcaches: invalid device %pK\n",
  2634. device);
  2635. goto exit;
  2636. }
  2637. if (!is_sys_cache_present(device))
  2638. goto exit;
  2639. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  2640. if (sinfo->subcache) {
  2641. dprintk(CVP_CORE, "deinit_subcaches: %s\n",
  2642. sinfo->name);
  2643. llcc_slice_putd(sinfo->subcache);
  2644. sinfo->subcache = NULL;
  2645. }
  2646. }
  2647. exit:
  2648. return;
  2649. }
  2650. static int __init_subcaches(struct iris_hfi_device *device)
  2651. {
  2652. int rc = 0;
  2653. struct subcache_info *sinfo = NULL;
  2654. if (!device) {
  2655. dprintk(CVP_ERR, "init_subcaches: invalid device %pK\n",
  2656. device);
  2657. return -EINVAL;
  2658. }
  2659. if (!is_sys_cache_present(device))
  2660. return 0;
  2661. iris_hfi_for_each_subcache(device, sinfo) {
  2662. if (!strcmp("cvp", sinfo->name)) {
  2663. sinfo->subcache = llcc_slice_getd(LLCC_CVP);
  2664. } else if (!strcmp("cvpfw", sinfo->name)) {
  2665. sinfo->subcache = llcc_slice_getd(LLCC_CVPFW);
  2666. } else {
  2667. dprintk(CVP_ERR, "Invalid subcache name %s\n",
  2668. sinfo->name);
  2669. }
  2670. if (IS_ERR_OR_NULL(sinfo->subcache)) {
  2671. rc = PTR_ERR(sinfo->subcache) ?
  2672. PTR_ERR(sinfo->subcache) : -EBADHANDLE;
  2673. dprintk(CVP_ERR,
  2674. "init_subcaches: invalid subcache: %s rc %d\n",
  2675. sinfo->name, rc);
  2676. sinfo->subcache = NULL;
  2677. goto err_subcache_get;
  2678. }
  2679. dprintk(CVP_CORE, "init_subcaches: %s\n",
  2680. sinfo->name);
  2681. }
  2682. return 0;
  2683. err_subcache_get:
  2684. __deinit_subcaches(device);
  2685. return rc;
  2686. }
  2687. static int __init_resources(struct iris_hfi_device *device,
  2688. struct msm_cvp_platform_resources *res)
  2689. {
  2690. int i, rc = 0;
  2691. rc = __init_regulators(device);
  2692. if (rc) {
  2693. dprintk(CVP_ERR, "Failed to get all regulators\n");
  2694. return -ENODEV;
  2695. }
  2696. rc = msm_cvp_init_clocks(device);
  2697. if (rc) {
  2698. dprintk(CVP_ERR, "Failed to init clocks\n");
  2699. rc = -ENODEV;
  2700. goto err_init_clocks;
  2701. }
  2702. for (i = 0; i < device->res->reset_set.count; i++) {
  2703. rc = __handle_reset_clk(res, i, INIT, 0);
  2704. if (rc) {
  2705. dprintk(CVP_ERR, "Failed to init reset clocks\n");
  2706. rc = -ENODEV;
  2707. goto err_init_reset_clk;
  2708. }
  2709. }
  2710. rc = __init_bus(device);
  2711. if (rc) {
  2712. dprintk(CVP_ERR, "Failed to init bus: %d\n", rc);
  2713. goto err_init_bus;
  2714. }
  2715. rc = __init_subcaches(device);
  2716. if (rc)
  2717. dprintk(CVP_WARN, "Failed to init subcaches: %d\n", rc);
  2718. device->sys_init_capabilities =
  2719. kzalloc(sizeof(struct msm_cvp_capability)
  2720. * CVP_MAX_SESSIONS, GFP_KERNEL);
  2721. return rc;
  2722. err_init_reset_clk:
  2723. err_init_bus:
  2724. msm_cvp_deinit_clocks(device);
  2725. err_init_clocks:
  2726. __deinit_regulators(device);
  2727. return rc;
  2728. }
  2729. static void __deinit_resources(struct iris_hfi_device *device)
  2730. {
  2731. __deinit_subcaches(device);
  2732. __deinit_bus(device);
  2733. msm_cvp_deinit_clocks(device);
  2734. __deinit_regulators(device);
  2735. kfree(device->sys_init_capabilities);
  2736. device->sys_init_capabilities = NULL;
  2737. }
  2738. static int __disable_regulator(struct regulator_info *rinfo,
  2739. struct iris_hfi_device *device)
  2740. {
  2741. int rc = 0;
  2742. dprintk(CVP_PWR, "Disabling regulator %s\n", rinfo->name);
  2743. /*
  2744. * This call is needed. Driver needs to acquire the control back
  2745. * from HW in order to disable the regualtor. Else the behavior
  2746. * is unknown.
  2747. */
  2748. rc = __acquire_regulator(rinfo, device);
  2749. if (rc) {
  2750. /*
  2751. * This is somewhat fatal, but nothing we can do
  2752. * about it. We can't disable the regulator w/o
  2753. * getting it back under s/w control
  2754. */
  2755. dprintk(CVP_WARN,
  2756. "Failed to acquire control on %s\n",
  2757. rinfo->name);
  2758. goto disable_regulator_failed;
  2759. }
  2760. rc = regulator_disable(rinfo->regulator);
  2761. if (rc) {
  2762. dprintk(CVP_WARN,
  2763. "Failed to disable %s: %d\n",
  2764. rinfo->name, rc);
  2765. goto disable_regulator_failed;
  2766. }
  2767. return 0;
  2768. disable_regulator_failed:
  2769. /* Bring attention to this issue */
  2770. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  2771. return rc;
  2772. }
  2773. static int __enable_hw_power_collapse(struct iris_hfi_device *device)
  2774. {
  2775. int rc = 0;
  2776. if (!msm_cvp_fw_low_power_mode) {
  2777. dprintk(CVP_PWR, "Not enabling hardware power collapse\n");
  2778. return 0;
  2779. }
  2780. rc = __hand_off_regulators(device);
  2781. if (rc)
  2782. dprintk(CVP_WARN,
  2783. "%s : Failed to enable HW power collapse %d\n",
  2784. __func__, rc);
  2785. return rc;
  2786. }
  2787. static int __enable_regulators(struct iris_hfi_device *device)
  2788. {
  2789. int rc = 0, c = 0;
  2790. struct regulator_info *rinfo;
  2791. dprintk(CVP_PWR, "Enabling regulators\n");
  2792. iris_hfi_for_each_regulator(device, rinfo) {
  2793. rc = regulator_enable(rinfo->regulator);
  2794. if (rc) {
  2795. dprintk(CVP_ERR, "Failed to enable %s: %d\n",
  2796. rinfo->name, rc);
  2797. goto err_reg_enable_failed;
  2798. }
  2799. dprintk(CVP_PWR, "Enabled regulator %s\n", rinfo->name);
  2800. c++;
  2801. }
  2802. return 0;
  2803. err_reg_enable_failed:
  2804. iris_hfi_for_each_regulator_reverse_continue(device, rinfo, c)
  2805. __disable_regulator(rinfo, device);
  2806. return rc;
  2807. }
  2808. static int __disable_regulators(struct iris_hfi_device *device)
  2809. {
  2810. struct regulator_info *rinfo;
  2811. dprintk(CVP_PWR, "Disabling regulators\n");
  2812. iris_hfi_for_each_regulator_reverse(device, rinfo) {
  2813. __disable_regulator(rinfo, device);
  2814. if (rinfo->has_hw_power_collapse)
  2815. regulator_set_mode(rinfo->regulator,
  2816. REGULATOR_MODE_NORMAL);
  2817. }
  2818. return 0;
  2819. }
  2820. static int __enable_subcaches(struct iris_hfi_device *device)
  2821. {
  2822. int rc = 0;
  2823. u32 c = 0;
  2824. struct subcache_info *sinfo;
  2825. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  2826. return 0;
  2827. /* Activate subcaches */
  2828. iris_hfi_for_each_subcache(device, sinfo) {
  2829. rc = llcc_slice_activate(sinfo->subcache);
  2830. if (rc) {
  2831. dprintk(CVP_WARN, "Failed to activate %s: %d\n",
  2832. sinfo->name, rc);
  2833. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  2834. goto err_activate_fail;
  2835. }
  2836. sinfo->isactive = true;
  2837. dprintk(CVP_CORE, "Activated subcache %s\n", sinfo->name);
  2838. c++;
  2839. }
  2840. dprintk(CVP_CORE, "Activated %d Subcaches to CVP\n", c);
  2841. return 0;
  2842. err_activate_fail:
  2843. __release_subcaches(device);
  2844. __disable_subcaches(device);
  2845. return 0;
  2846. }
  2847. static int __set_subcaches(struct iris_hfi_device *device)
  2848. {
  2849. int rc = 0;
  2850. u32 c = 0;
  2851. struct subcache_info *sinfo;
  2852. u32 resource[CVP_MAX_SUBCACHE_SIZE];
  2853. struct cvp_hfi_resource_syscache_info_type *sc_res_info;
  2854. struct cvp_hfi_resource_subcache_type *sc_res;
  2855. struct cvp_resource_hdr rhdr;
  2856. if (device->res->sys_cache_res_set || msm_cvp_syscache_disable) {
  2857. dprintk(CVP_CORE, "Subcaches already set or disabled\n");
  2858. return 0;
  2859. }
  2860. memset((void *)resource, 0x0, (sizeof(u32) * CVP_MAX_SUBCACHE_SIZE));
  2861. sc_res_info = (struct cvp_hfi_resource_syscache_info_type *)resource;
  2862. sc_res = &(sc_res_info->rg_subcache_entries[0]);
  2863. iris_hfi_for_each_subcache(device, sinfo) {
  2864. if (sinfo->isactive) {
  2865. sc_res[c].size = sinfo->subcache->slice_size;
  2866. sc_res[c].sc_id = sinfo->subcache->slice_id;
  2867. c++;
  2868. }
  2869. }
  2870. /* Set resource to CVP for activated subcaches */
  2871. if (c) {
  2872. dprintk(CVP_CORE, "Setting %d Subcaches\n", c);
  2873. rhdr.resource_handle = sc_res_info; /* cookie */
  2874. rhdr.resource_id = CVP_RESOURCE_SYSCACHE;
  2875. sc_res_info->num_entries = c;
  2876. rc = __core_set_resource(device, &rhdr, (void *)sc_res_info);
  2877. if (rc) {
  2878. dprintk(CVP_WARN, "Failed to set subcaches %d\n", rc);
  2879. goto err_fail_set_subacaches;
  2880. }
  2881. iris_hfi_for_each_subcache(device, sinfo) {
  2882. if (sinfo->isactive)
  2883. sinfo->isset = true;
  2884. }
  2885. dprintk(CVP_CORE, "Set Subcaches done to CVP\n");
  2886. device->res->sys_cache_res_set = true;
  2887. }
  2888. return 0;
  2889. err_fail_set_subacaches:
  2890. __disable_subcaches(device);
  2891. return 0;
  2892. }
  2893. static int __release_subcaches(struct iris_hfi_device *device)
  2894. {
  2895. struct subcache_info *sinfo;
  2896. int rc = 0;
  2897. u32 c = 0;
  2898. u32 resource[CVP_MAX_SUBCACHE_SIZE];
  2899. struct cvp_hfi_resource_syscache_info_type *sc_res_info;
  2900. struct cvp_hfi_resource_subcache_type *sc_res;
  2901. struct cvp_resource_hdr rhdr;
  2902. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  2903. return 0;
  2904. memset((void *)resource, 0x0, (sizeof(u32) * CVP_MAX_SUBCACHE_SIZE));
  2905. sc_res_info = (struct cvp_hfi_resource_syscache_info_type *)resource;
  2906. sc_res = &(sc_res_info->rg_subcache_entries[0]);
  2907. /* Release resource command to Iris */
  2908. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  2909. if (sinfo->isset) {
  2910. /* Update the entry */
  2911. sc_res[c].size = sinfo->subcache->slice_size;
  2912. sc_res[c].sc_id = sinfo->subcache->slice_id;
  2913. c++;
  2914. sinfo->isset = false;
  2915. }
  2916. }
  2917. if (c > 0) {
  2918. dprintk(CVP_CORE, "Releasing %d subcaches\n", c);
  2919. rhdr.resource_handle = sc_res_info; /* cookie */
  2920. rhdr.resource_id = CVP_RESOURCE_SYSCACHE;
  2921. rc = __core_release_resource(device, &rhdr);
  2922. if (rc)
  2923. dprintk(CVP_WARN,
  2924. "Failed to release %d subcaches\n", c);
  2925. }
  2926. device->res->sys_cache_res_set = false;
  2927. return 0;
  2928. }
  2929. static int __disable_subcaches(struct iris_hfi_device *device)
  2930. {
  2931. struct subcache_info *sinfo;
  2932. int rc = 0;
  2933. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  2934. return 0;
  2935. /* De-activate subcaches */
  2936. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  2937. if (sinfo->isactive) {
  2938. dprintk(CVP_CORE, "De-activate subcache %s\n",
  2939. sinfo->name);
  2940. rc = llcc_slice_deactivate(sinfo->subcache);
  2941. if (rc) {
  2942. dprintk(CVP_WARN,
  2943. "Failed to de-activate %s: %d\n",
  2944. sinfo->name, rc);
  2945. }
  2946. sinfo->isactive = false;
  2947. }
  2948. }
  2949. return 0;
  2950. }
  2951. static void interrupt_init_iris2(struct iris_hfi_device *device)
  2952. {
  2953. u32 mask_val = 0;
  2954. /* All interrupts should be disabled initially 0x1F6 : Reset value */
  2955. mask_val = __read_register(device, CVP_WRAPPER_INTR_MASK);
  2956. /* Write 0 to unmask CPU and WD interrupts */
  2957. mask_val &= ~(CVP_FATAL_INTR_BMSK | CVP_WRAPPER_INTR_MASK_A2HCPU_BMSK);
  2958. __write_register(device, CVP_WRAPPER_INTR_MASK, mask_val);
  2959. dprintk(CVP_REG, "Init irq: reg: %x, mask value %x\n",
  2960. CVP_WRAPPER_INTR_MASK, mask_val);
  2961. }
  2962. static void setup_dsp_uc_memmap_vpu5(struct iris_hfi_device *device)
  2963. {
  2964. /* initialize DSP QTBL & UCREGION with CPU queues */
  2965. __write_register(device, HFI_DSP_QTBL_ADDR,
  2966. (u32)device->dsp_iface_q_table.align_device_addr);
  2967. __write_register(device, HFI_DSP_UC_REGION_ADDR,
  2968. (u32)device->dsp_iface_q_table.align_device_addr);
  2969. __write_register(device, HFI_DSP_UC_REGION_SIZE,
  2970. device->dsp_iface_q_table.mem_data.size);
  2971. }
  2972. static void clock_config_on_enable_vpu5(struct iris_hfi_device *device)
  2973. {
  2974. __write_register(device, CVP_WRAPPER_CPU_CLOCK_CONFIG, 0);
  2975. }
  2976. static int __set_ubwc_config(struct iris_hfi_device *device)
  2977. {
  2978. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  2979. int rc = 0;
  2980. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  2981. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  2982. if (!device->res->ubwc_config)
  2983. return 0;
  2984. rc = call_hfi_pkt_op(device, sys_ubwc_config, pkt,
  2985. device->res->ubwc_config);
  2986. if (rc) {
  2987. dprintk(CVP_WARN,
  2988. "ubwc config setting to FW failed\n");
  2989. rc = -ENOTEMPTY;
  2990. goto fail_to_set_ubwc_config;
  2991. }
  2992. if (__iface_cmdq_write(device, pkt)) {
  2993. rc = -ENOTEMPTY;
  2994. goto fail_to_set_ubwc_config;
  2995. }
  2996. fail_to_set_ubwc_config:
  2997. return rc;
  2998. }
  2999. static int __iris_power_on(struct iris_hfi_device *device)
  3000. {
  3001. int rc = 0;
  3002. if (device->power_enabled)
  3003. return 0;
  3004. /* Vote for all hardware resources */
  3005. rc = __vote_buses(device, device->bus_vote.data,
  3006. device->bus_vote.data_count);
  3007. if (rc) {
  3008. dprintk(CVP_ERR, "Failed to vote buses, err: %d\n", rc);
  3009. goto fail_vote_buses;
  3010. }
  3011. rc = __enable_regulators(device);
  3012. if (rc) {
  3013. dprintk(CVP_ERR, "Failed to enable GDSC, err = %d\n", rc);
  3014. goto fail_enable_gdsc;
  3015. }
  3016. rc = call_iris_op(device, reset_ahb2axi_bridge, device);
  3017. if (rc) {
  3018. dprintk(CVP_ERR, "Failed to reset ahb2axi: %d\n", rc);
  3019. goto fail_enable_clks;
  3020. }
  3021. rc = msm_cvp_prepare_enable_clks(device);
  3022. if (rc) {
  3023. dprintk(CVP_ERR, "Failed to enable clocks: %d\n", rc);
  3024. goto fail_enable_clks;
  3025. }
  3026. rc = msm_cvp_scale_clocks(device);
  3027. if (rc) {
  3028. dprintk(CVP_WARN,
  3029. "Failed to scale clocks, perf may regress\n");
  3030. rc = 0;
  3031. }
  3032. /*Do not access registers before this point!*/
  3033. device->power_enabled = true;
  3034. dprintk(CVP_PWR, "Done with scaling\n");
  3035. /*
  3036. * Re-program all of the registers that get reset as a result of
  3037. * regulator_disable() and _enable()
  3038. */
  3039. __set_registers(device);
  3040. dprintk(CVP_CORE, "Done with register set\n");
  3041. call_iris_op(device, interrupt_init, device);
  3042. dprintk(CVP_CORE, "Done with interrupt enabling\n");
  3043. device->intr_status = 0;
  3044. enable_irq(device->cvp_hal_data->irq);
  3045. return rc;
  3046. fail_enable_clks:
  3047. __disable_regulators(device);
  3048. fail_enable_gdsc:
  3049. __unvote_buses(device);
  3050. fail_vote_buses:
  3051. device->power_enabled = false;
  3052. return rc;
  3053. }
  3054. void power_off_common(struct iris_hfi_device *device)
  3055. {
  3056. if (!device->power_enabled)
  3057. return;
  3058. if (!(device->intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  3059. disable_irq_nosync(device->cvp_hal_data->irq);
  3060. device->intr_status = 0;
  3061. msm_cvp_disable_unprepare_clks(device);
  3062. if (__disable_regulators(device))
  3063. dprintk(CVP_WARN, "Failed to disable regulators\n");
  3064. if (__unvote_buses(device))
  3065. dprintk(CVP_WARN, "Failed to unvote for buses\n");
  3066. device->power_enabled = false;
  3067. }
  3068. static inline int __suspend(struct iris_hfi_device *device)
  3069. {
  3070. int rc = 0;
  3071. if (!device) {
  3072. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  3073. return -EINVAL;
  3074. } else if (!device->power_enabled) {
  3075. dprintk(CVP_PWR, "Power already disabled\n");
  3076. return 0;
  3077. }
  3078. dprintk(CVP_PWR, "Entering suspend\n");
  3079. if (device->res->pm_qos_latency_us &&
  3080. cpu_latency_qos_request_active(&device->qos))
  3081. cpu_latency_qos_remove_request(&device->qos);
  3082. rc = __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_SUSPEND);
  3083. if (rc) {
  3084. dprintk(CVP_WARN, "Failed to suspend cvp core %d\n", rc);
  3085. goto err_tzbsp_suspend;
  3086. }
  3087. __disable_subcaches(device);
  3088. call_iris_op(device, power_off, device);
  3089. dprintk(CVP_PWR, "Iris power off\n");
  3090. return rc;
  3091. err_tzbsp_suspend:
  3092. return rc;
  3093. }
  3094. static void power_off_iris2(struct iris_hfi_device *device)
  3095. {
  3096. u32 lpi_status, reg_status = 0, count = 0, max_count = 1000;
  3097. if (!device->power_enabled || !device->res->sw_power_collapsible)
  3098. return;
  3099. if (!(device->intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  3100. disable_irq_nosync(device->cvp_hal_data->irq);
  3101. device->intr_status = 0;
  3102. /* HPG 6.1.2 Step 1 */
  3103. __write_register(device, CVP_CPU_CS_X2RPMh, 0x3);
  3104. /* HPG 6.1.2 Step 2, noc to low power */
  3105. __write_register(device, CVP_AON_WRAPPER_MVP_NOC_LPI_CONTROL, 0x1);
  3106. while (!reg_status && count < max_count) {
  3107. lpi_status =
  3108. __read_register(device,
  3109. CVP_AON_WRAPPER_MVP_NOC_LPI_STATUS);
  3110. reg_status = lpi_status & BIT(0);
  3111. /* Wait for noc lpi status to be set */
  3112. usleep_range(50, 100);
  3113. count++;
  3114. }
  3115. dprintk(CVP_PWR,
  3116. "Noc: lpi_status %x noc_status %x (count %d)\n",
  3117. lpi_status, reg_status, count);
  3118. if (count == max_count) {
  3119. u32 pc_ready, wfi_status, sbm_ln0_low;
  3120. u32 main_sbm_ln0_low, main_sbm_ln1_high;
  3121. u32 cpu_cs_x2rpmh;
  3122. wfi_status = __read_register(device, CVP_WRAPPER_CPU_STATUS);
  3123. pc_ready = __read_register(device, CVP_CTRL_STATUS);
  3124. sbm_ln0_low =
  3125. __read_register(device, CVP_NOC_SBM_SENSELN0_LOW);
  3126. cpu_cs_x2rpmh = __read_register(device,
  3127. CVP_CPU_CS_X2RPMh);
  3128. __write_register(device, CVP_CPU_CS_X2RPMh,
  3129. (cpu_cs_x2rpmh | CVP_CPU_CS_X2RPMh_SWOVERRIDE_BMSK));
  3130. cpu_cs_x2rpmh = __read_register(device,
  3131. CVP_CPU_CS_X2RPMh);
  3132. dprintk(CVP_PWR, "cpu_cs_x2rpmh (%#x)\n",
  3133. cpu_cs_x2rpmh);
  3134. main_sbm_ln0_low = __read_register(device,
  3135. CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN0_LOW);
  3136. main_sbm_ln1_high = __read_register(device,
  3137. CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN1_HIGH);
  3138. __write_register(device, CVP_CPU_CS_X2RPMh,
  3139. (cpu_cs_x2rpmh & (~CVP_CPU_CS_X2RPMh_SWOVERRIDE_BMSK)));
  3140. dprintk(CVP_WARN,
  3141. "NOC not in qaccept status %x %x %x %x %x\n",
  3142. reg_status, lpi_status, wfi_status, pc_ready,
  3143. sbm_ln0_low);
  3144. }
  3145. /* HPG 6.1.2 Step 3, debug bridge to low power BYPASSED */
  3146. /* HPG 6.1.2 Step 4, debug bridge to lpi release */
  3147. __write_register(device,
  3148. CVP_WRAPPER_DEBUG_BRIDGE_LPI_CONTROL, 0x0);
  3149. lpi_status = 0x1;
  3150. count = 0;
  3151. while (lpi_status && count < max_count) {
  3152. lpi_status = __read_register(device,
  3153. CVP_WRAPPER_DEBUG_BRIDGE_LPI_STATUS);
  3154. usleep_range(50, 100);
  3155. count++;
  3156. }
  3157. dprintk(CVP_PWR,
  3158. "DBLP Release: lpi_status %d(count %d)\n",
  3159. lpi_status, count);
  3160. if (count == max_count) {
  3161. dprintk(CVP_WARN,
  3162. "DBLP Release: lpi_status %x\n", lpi_status);
  3163. }
  3164. /* HPG 6.1.2 Step 6 */
  3165. msm_cvp_disable_unprepare_clks(device);
  3166. /*
  3167. * HPG 6.1.2 Step 7 & 8
  3168. * per new HPG update, core clock reset will be unnecessary
  3169. */
  3170. if (__unvote_buses(device))
  3171. dprintk(CVP_WARN, "Failed to unvote for buses\n");
  3172. /* HPG 6.1.2 Step 5 */
  3173. if (__disable_regulators(device))
  3174. dprintk(CVP_WARN, "Failed to disable regulators\n");
  3175. /*Do not access registers after this point!*/
  3176. device->power_enabled = false;
  3177. }
  3178. static inline int __resume(struct iris_hfi_device *device)
  3179. {
  3180. int rc = 0;
  3181. u32 flags = 0, reg_gdsc, reg_cbcr;
  3182. if (!device) {
  3183. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  3184. return -EINVAL;
  3185. } else if (device->power_enabled) {
  3186. goto exit;
  3187. } else if (!__core_in_valid_state(device)) {
  3188. dprintk(CVP_PWR, "iris_hfi_device in deinit state.");
  3189. return -EINVAL;
  3190. }
  3191. dprintk(CVP_PWR, "Resuming from power collapse\n");
  3192. rc = __iris_power_on(device);
  3193. if (rc) {
  3194. dprintk(CVP_ERR, "Failed to power on cvp\n");
  3195. goto err_iris_power_on;
  3196. }
  3197. reg_gdsc = __read_register(device, CVP_CC_MVS1C_GDSCR);
  3198. reg_cbcr = __read_register(device, CVP_CC_MVS1C_CBCR);
  3199. if (!(reg_gdsc & 0x80000000) || (reg_cbcr & 0x80000000))
  3200. dprintk(CVP_ERR, "CVP power on failed gdsc %x cbcr %x\n",
  3201. reg_gdsc, reg_cbcr);
  3202. /* Reboot the firmware */
  3203. rc = __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_RESUME);
  3204. if (rc) {
  3205. dprintk(CVP_ERR, "Failed to resume cvp core %d\n", rc);
  3206. goto err_set_cvp_state;
  3207. }
  3208. __setup_ucregion_memory_map(device);
  3209. /* Wait for boot completion */
  3210. rc = __boot_firmware(device);
  3211. if (rc) {
  3212. dprintk(CVP_ERR, "Failed to reset cvp core\n");
  3213. goto err_reset_core;
  3214. }
  3215. /*
  3216. * Work around for H/W bug, need to reprogram these registers once
  3217. * firmware is out reset
  3218. */
  3219. __set_threshold_registers(device);
  3220. if (device->res->pm_qos_latency_us)
  3221. cpu_latency_qos_add_request(&device->qos,
  3222. device->res->pm_qos_latency_us);
  3223. __sys_set_debug(device, msm_cvp_fw_debug);
  3224. __enable_subcaches(device);
  3225. __set_subcaches(device);
  3226. __dsp_resume(device, flags);
  3227. dprintk(CVP_PWR, "Resumed from power collapse\n");
  3228. exit:
  3229. /* Don't reset skip_pc_count for SYS_PC_PREP cmd */
  3230. if (device->last_packet_type != HFI_CMD_SYS_PC_PREP)
  3231. device->skip_pc_count = 0;
  3232. return rc;
  3233. err_reset_core:
  3234. __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_SUSPEND);
  3235. err_set_cvp_state:
  3236. call_iris_op(device, power_off, device);
  3237. err_iris_power_on:
  3238. dprintk(CVP_ERR, "Failed to resume from power collapse\n");
  3239. return rc;
  3240. }
  3241. static int __load_fw(struct iris_hfi_device *device)
  3242. {
  3243. int rc = 0;
  3244. /* Initialize resources */
  3245. rc = __init_resources(device, device->res);
  3246. if (rc) {
  3247. dprintk(CVP_ERR, "Failed to init resources: %d\n", rc);
  3248. goto fail_init_res;
  3249. }
  3250. rc = __initialize_packetization(device);
  3251. if (rc) {
  3252. dprintk(CVP_ERR, "Failed to initialize packetization\n");
  3253. goto fail_init_pkt;
  3254. }
  3255. rc = __iris_power_on(device);
  3256. if (rc) {
  3257. dprintk(CVP_ERR, "Failed to power on iris in in load_fw\n");
  3258. goto fail_iris_power_on;
  3259. }
  3260. if ((!device->res->use_non_secure_pil && !device->res->firmware_base)
  3261. || device->res->use_non_secure_pil) {
  3262. rc = load_cvp_fw_impl(device);
  3263. if (rc)
  3264. goto fail_load_fw;
  3265. }
  3266. return rc;
  3267. fail_load_fw:
  3268. call_iris_op(device, power_off, device);
  3269. fail_iris_power_on:
  3270. fail_init_pkt:
  3271. __deinit_resources(device);
  3272. fail_init_res:
  3273. return rc;
  3274. }
  3275. static void __unload_fw(struct iris_hfi_device *device)
  3276. {
  3277. if (!device->resources.fw.cookie)
  3278. return;
  3279. cancel_delayed_work(&iris_hfi_pm_work);
  3280. if (device->state != IRIS_STATE_DEINIT)
  3281. flush_workqueue(device->iris_pm_workq);
  3282. unload_cvp_fw_impl(device);
  3283. __interface_queues_release(device);
  3284. call_iris_op(device, power_off, device);
  3285. __deinit_resources(device);
  3286. dprintk(CVP_WARN, "Firmware unloaded\n");
  3287. }
  3288. static int iris_hfi_get_fw_info(void *dev, struct cvp_hal_fw_info *fw_info)
  3289. {
  3290. int i = 0;
  3291. struct iris_hfi_device *device = dev;
  3292. if (!device || !fw_info) {
  3293. dprintk(CVP_ERR,
  3294. "%s Invalid parameter: device = %pK fw_info = %pK\n",
  3295. __func__, device, fw_info);
  3296. return -EINVAL;
  3297. }
  3298. mutex_lock(&device->lock);
  3299. while (cvp_driver->fw_version[i++] != 'V' && i < CVP_VERSION_LENGTH)
  3300. ;
  3301. if (i == CVP_VERSION_LENGTH - 1) {
  3302. dprintk(CVP_WARN, "Iris version string is not proper\n");
  3303. fw_info->version[0] = '\0';
  3304. goto fail_version_string;
  3305. }
  3306. memcpy(&fw_info->version[0], &cvp_driver->fw_version[0],
  3307. CVP_VERSION_LENGTH);
  3308. fw_info->version[CVP_VERSION_LENGTH - 1] = '\0';
  3309. fail_version_string:
  3310. dprintk(CVP_CORE, "F/W version retrieved : %s\n", fw_info->version);
  3311. fw_info->base_addr = device->cvp_hal_data->firmware_base;
  3312. fw_info->register_base = device->res->register_base;
  3313. fw_info->register_size = device->cvp_hal_data->register_size;
  3314. fw_info->irq = device->cvp_hal_data->irq;
  3315. mutex_unlock(&device->lock);
  3316. return 0;
  3317. }
  3318. static int iris_hfi_get_core_capabilities(void *dev)
  3319. {
  3320. dprintk(CVP_CORE, "%s not supported yet!\n", __func__);
  3321. return 0;
  3322. }
  3323. static u32 cvp_arp_test_regs[16];
  3324. static u32 cvp_dma_test_regs[512];
  3325. static const char * const mid_names[16] = {
  3326. "CVP_FW",
  3327. "ARP_DATA",
  3328. "CVP_OD_NON_PIXEL",
  3329. "CVP_OD_ORIG_PIXEL",
  3330. "CVP_OD_WR_PIXEL",
  3331. "CVP_MPU_ORIG_PIXEL",
  3332. "CVP_MPU_REF_PIXEL",
  3333. "CVP_MPU_NON_PIXEL",
  3334. "CVP_MPU_DFS",
  3335. "CVP_FDU_NON_PIXEL",
  3336. "CVP_FDU_PIXEL",
  3337. "CVP_ICA_PIXEL",
  3338. "Invalid",
  3339. "Invalid",
  3340. "Invalid",
  3341. "Invalid"
  3342. };
  3343. static void __print_reg_details(u32 val)
  3344. {
  3345. u32 mid, sid;
  3346. mid = (val >> 5) & 0xF;
  3347. sid = (val >> 2) & 0x7;
  3348. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG3_LOW: %#x\n", val);
  3349. dprintk(CVP_ERR, "Sub-client:%s, SID: %d\n", mid_names[mid], sid);
  3350. }
  3351. static void __noc_error_info_iris2(struct iris_hfi_device *device)
  3352. {
  3353. u32 val = 0, regi, i;
  3354. val = __read_register(device, CVP_NOC_ERR_SWID_LOW_OFFS);
  3355. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_SWID_LOW: %#x\n", val);
  3356. val = __read_register(device, CVP_NOC_ERR_SWID_HIGH_OFFS);
  3357. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_SWID_HIGH: %#x\n", val);
  3358. val = __read_register(device, CVP_NOC_ERR_MAINCTL_LOW_OFFS);
  3359. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_MAINCTL_LOW: %#x\n", val);
  3360. val = __read_register(device, CVP_NOC_ERR_ERRVLD_LOW_OFFS);
  3361. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRVLD_LOW: %#x\n", val);
  3362. val = __read_register(device, CVP_NOC_ERR_ERRCLR_LOW_OFFS);
  3363. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRCLR_LOW: %#x\n", val);
  3364. val = __read_register(device, CVP_NOC_ERR_ERRLOG0_LOW_OFFS);
  3365. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG0_LOW: %#x\n", val);
  3366. val = __read_register(device, CVP_NOC_ERR_ERRLOG0_HIGH_OFFS);
  3367. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG0_HIGH: %#x\n", val);
  3368. val = __read_register(device, CVP_NOC_ERR_ERRLOG1_LOW_OFFS);
  3369. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG1_LOW: %#x\n", val);
  3370. val = __read_register(device, CVP_NOC_ERR_ERRLOG1_HIGH_OFFS);
  3371. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG1_HIGH: %#x\n", val);
  3372. val = __read_register(device, CVP_NOC_ERR_ERRLOG2_LOW_OFFS);
  3373. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG2_LOW: %#x\n", val);
  3374. val = __read_register(device, CVP_NOC_ERR_ERRLOG2_HIGH_OFFS);
  3375. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG2_HIGH: %#x\n", val);
  3376. val = __read_register(device, CVP_NOC_ERR_ERRLOG3_LOW_OFFS);
  3377. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG3_LOW: %#x\n", val);
  3378. val = __read_register(device, CVP_NOC_ERR_ERRLOG3_HIGH_OFFS);
  3379. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG3_HIGH: %#x\n", val);
  3380. val = __read_register(device, CVP_NOC_CORE_ERR_SWID_LOW_OFFS);
  3381. dprintk(CVP_ERR, "CVP_NOC__CORE_ERL_MAIN_SWID_LOW: %#x\n", val);
  3382. val = __read_register(device, CVP_NOC_CORE_ERR_SWID_HIGH_OFFS);
  3383. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_SWID_HIGH: %#x\n", val);
  3384. val = __read_register(device, CVP_NOC_CORE_ERR_MAINCTL_LOW_OFFS);
  3385. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_MAINCTL_LOW: %#x\n", val);
  3386. val = __read_register(device, CVP_NOC_CORE_ERR_ERRVLD_LOW_OFFS);
  3387. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRVLD_LOW: %#x\n", val);
  3388. val = __read_register(device, CVP_NOC_CORE_ERR_ERRCLR_LOW_OFFS);
  3389. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRCLR_LOW: %#x\n", val);
  3390. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG0_LOW_OFFS);
  3391. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG0_LOW: %#x\n", val);
  3392. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG0_HIGH_OFFS);
  3393. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG0_HIGH: %#x\n", val);
  3394. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG1_LOW_OFFS);
  3395. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG1_LOW: %#x\n", val);
  3396. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG1_HIGH_OFFS);
  3397. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG1_HIGH: %#x\n", val);
  3398. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG2_LOW_OFFS);
  3399. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG2_LOW: %#x\n", val);
  3400. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG2_HIGH_OFFS);
  3401. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG2_HIGH: %#x\n", val);
  3402. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG3_LOW_OFFS);
  3403. __print_reg_details(val);
  3404. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG3_HIGH_OFFS);
  3405. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG3_HIGH: %#x\n", val);
  3406. #define CVP_SS_CLK_HALT 0x8
  3407. #define CVP_SS_CLK_EN 0xC
  3408. #define CVP_SS_ARP_TEST_BUS_CONTROL 0x700
  3409. #define CVP_SS_ARP_TEST_BUS_REGISTER 0x704
  3410. #define CVP_DMA_TEST_BUS_CONTROL 0x66A0
  3411. #define CVP_DMA_TEST_BUS_REGISTER 0x66A4
  3412. #define CVP_VPU_WRAPPER_CORE_CONFIG 0xB0088
  3413. __write_register(device, CVP_SS_CLK_HALT, 0);
  3414. __write_register(device, CVP_SS_CLK_EN, 0x3f);
  3415. __write_register(device, CVP_VPU_WRAPPER_CORE_CONFIG, 0);
  3416. for (i = 0; i < 15; i++) {
  3417. regi = 0xC0000000 + i;
  3418. __write_register(device, CVP_SS_ARP_TEST_BUS_CONTROL, regi);
  3419. val = __read_register(device, CVP_SS_ARP_TEST_BUS_REGISTER);
  3420. cvp_arp_test_regs[i] = val;
  3421. dprintk(CVP_ERR, "ARP_CTL:%x - %x\n", regi, val);
  3422. }
  3423. for (i = 0; i < 512; i++) {
  3424. regi = 0x40000000 + i;
  3425. __write_register(device, CVP_DMA_TEST_BUS_CONTROL, regi);
  3426. val = __read_register(device, CVP_DMA_TEST_BUS_REGISTER);
  3427. cvp_dma_test_regs[i] = val;
  3428. dprintk(CVP_ERR, "DMA_CTL:%x - %x\n", regi, val);
  3429. }
  3430. }
  3431. static int iris_hfi_noc_error_info(void *dev)
  3432. {
  3433. struct iris_hfi_device *device;
  3434. if (!dev) {
  3435. dprintk(CVP_ERR, "%s: null device\n", __func__);
  3436. return -EINVAL;
  3437. }
  3438. device = dev;
  3439. mutex_lock(&device->lock);
  3440. dprintk(CVP_ERR, "%s: non error information\n", __func__);
  3441. call_iris_op(device, noc_error_info, device);
  3442. mutex_unlock(&device->lock);
  3443. return 0;
  3444. }
  3445. static int __initialize_packetization(struct iris_hfi_device *device)
  3446. {
  3447. int rc = 0;
  3448. if (!device || !device->res) {
  3449. dprintk(CVP_ERR, "%s - invalid param\n", __func__);
  3450. return -EINVAL;
  3451. }
  3452. device->packetization_type = HFI_PACKETIZATION_4XX;
  3453. device->pkt_ops = cvp_hfi_get_pkt_ops_handle(
  3454. device->packetization_type);
  3455. if (!device->pkt_ops) {
  3456. rc = -EINVAL;
  3457. dprintk(CVP_ERR, "Failed to get pkt_ops handle\n");
  3458. }
  3459. return rc;
  3460. }
  3461. void __init_cvp_ops(struct iris_hfi_device *device)
  3462. {
  3463. device->vpu_ops = &iris2_ops;
  3464. }
  3465. static struct iris_hfi_device *__add_device(u32 device_id,
  3466. struct msm_cvp_platform_resources *res,
  3467. hfi_cmd_response_callback callback)
  3468. {
  3469. struct iris_hfi_device *hdevice = NULL;
  3470. int rc = 0;
  3471. if (!res || !callback) {
  3472. dprintk(CVP_ERR, "Invalid Parameters\n");
  3473. return NULL;
  3474. }
  3475. dprintk(CVP_INFO, "%s: device_id: %d\n", __func__, device_id);
  3476. hdevice = kzalloc(sizeof(*hdevice), GFP_KERNEL);
  3477. if (!hdevice) {
  3478. dprintk(CVP_ERR, "failed to allocate new device\n");
  3479. goto exit;
  3480. }
  3481. hdevice->response_pkt = kmalloc_array(cvp_max_packets,
  3482. sizeof(*hdevice->response_pkt), GFP_KERNEL);
  3483. if (!hdevice->response_pkt) {
  3484. dprintk(CVP_ERR, "failed to allocate response_pkt\n");
  3485. goto err_cleanup;
  3486. }
  3487. hdevice->raw_packet =
  3488. kzalloc(CVP_IFACEQ_VAR_HUGE_PKT_SIZE, GFP_KERNEL);
  3489. if (!hdevice->raw_packet) {
  3490. dprintk(CVP_ERR, "failed to allocate raw packet\n");
  3491. goto err_cleanup;
  3492. }
  3493. rc = __init_regs_and_interrupts(hdevice, res);
  3494. if (rc)
  3495. goto err_cleanup;
  3496. hdevice->res = res;
  3497. hdevice->device_id = device_id;
  3498. hdevice->callback = callback;
  3499. __init_cvp_ops(hdevice);
  3500. hdevice->cvp_workq = create_singlethread_workqueue(
  3501. "msm_cvp_workerq_iris");
  3502. if (!hdevice->cvp_workq) {
  3503. dprintk(CVP_ERR, ": create cvp workq failed\n");
  3504. goto err_cleanup;
  3505. }
  3506. hdevice->iris_pm_workq = create_singlethread_workqueue(
  3507. "pm_workerq_iris");
  3508. if (!hdevice->iris_pm_workq) {
  3509. dprintk(CVP_ERR, ": create pm workq failed\n");
  3510. goto err_cleanup;
  3511. }
  3512. mutex_init(&hdevice->lock);
  3513. INIT_LIST_HEAD(&hdevice->sess_head);
  3514. return hdevice;
  3515. err_cleanup:
  3516. if (hdevice->iris_pm_workq)
  3517. destroy_workqueue(hdevice->iris_pm_workq);
  3518. if (hdevice->cvp_workq)
  3519. destroy_workqueue(hdevice->cvp_workq);
  3520. kfree(hdevice->response_pkt);
  3521. kfree(hdevice->raw_packet);
  3522. kfree(hdevice);
  3523. exit:
  3524. return NULL;
  3525. }
  3526. static struct iris_hfi_device *__get_device(u32 device_id,
  3527. struct msm_cvp_platform_resources *res,
  3528. hfi_cmd_response_callback callback)
  3529. {
  3530. if (!res || !callback) {
  3531. dprintk(CVP_ERR, "Invalid params: %pK %pK\n", res, callback);
  3532. return NULL;
  3533. }
  3534. return __add_device(device_id, res, callback);
  3535. }
  3536. void cvp_iris_hfi_delete_device(void *device)
  3537. {
  3538. struct msm_cvp_core *core;
  3539. struct iris_hfi_device *dev = NULL;
  3540. if (!device)
  3541. return;
  3542. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  3543. if (core)
  3544. dev = core->device->hfi_device_data;
  3545. if (!dev)
  3546. return;
  3547. mutex_destroy(&dev->lock);
  3548. destroy_workqueue(dev->cvp_workq);
  3549. destroy_workqueue(dev->iris_pm_workq);
  3550. free_irq(dev->cvp_hal_data->irq, dev);
  3551. iounmap(dev->cvp_hal_data->register_base);
  3552. iounmap(dev->cvp_hal_data->gcc_reg_base);
  3553. kfree(dev->cvp_hal_data);
  3554. kfree(dev->response_pkt);
  3555. kfree(dev->raw_packet);
  3556. kfree(dev);
  3557. }
  3558. static int iris_hfi_validate_session(void *sess, const char *func)
  3559. {
  3560. struct cvp_hal_session *session = sess;
  3561. int rc = 0;
  3562. struct iris_hfi_device *device;
  3563. if (!session || !session->device) {
  3564. dprintk(CVP_ERR, " %s Invalid Params %pK\n", __func__, session);
  3565. return -EINVAL;
  3566. }
  3567. device = session->device;
  3568. mutex_lock(&device->lock);
  3569. if (!__is_session_valid(device, session, func))
  3570. rc = -ECONNRESET;
  3571. mutex_unlock(&device->lock);
  3572. return rc;
  3573. }
  3574. static void iris_init_hfi_callbacks(struct cvp_hfi_device *hdev)
  3575. {
  3576. hdev->core_init = iris_hfi_core_init;
  3577. hdev->core_release = iris_hfi_core_release;
  3578. hdev->core_trigger_ssr = iris_hfi_core_trigger_ssr;
  3579. hdev->session_init = iris_hfi_session_init;
  3580. hdev->session_end = iris_hfi_session_end;
  3581. hdev->session_abort = iris_hfi_session_abort;
  3582. hdev->session_clean = iris_hfi_session_clean;
  3583. hdev->session_set_buffers = iris_hfi_session_set_buffers;
  3584. hdev->session_release_buffers = iris_hfi_session_release_buffers;
  3585. hdev->session_send = iris_hfi_session_send;
  3586. hdev->session_flush = iris_hfi_session_flush;
  3587. hdev->scale_clocks = iris_hfi_scale_clocks;
  3588. hdev->vote_bus = iris_hfi_vote_buses;
  3589. hdev->get_fw_info = iris_hfi_get_fw_info;
  3590. hdev->get_core_capabilities = iris_hfi_get_core_capabilities;
  3591. hdev->suspend = iris_hfi_suspend;
  3592. hdev->resume = iris_hfi_resume;
  3593. hdev->flush_debug_queue = iris_hfi_flush_debug_queue;
  3594. hdev->noc_error_info = iris_hfi_noc_error_info;
  3595. hdev->validate_session = iris_hfi_validate_session;
  3596. }
  3597. int cvp_iris_hfi_initialize(struct cvp_hfi_device *hdev, u32 device_id,
  3598. struct msm_cvp_platform_resources *res,
  3599. hfi_cmd_response_callback callback)
  3600. {
  3601. int rc = 0;
  3602. if (!hdev || !res || !callback) {
  3603. dprintk(CVP_ERR, "Invalid params: %pK %pK %pK\n",
  3604. hdev, res, callback);
  3605. rc = -EINVAL;
  3606. goto err_iris_hfi_init;
  3607. }
  3608. hdev->hfi_device_data = __get_device(device_id, res, callback);
  3609. if (IS_ERR_OR_NULL(hdev->hfi_device_data)) {
  3610. rc = PTR_ERR(hdev->hfi_device_data) ?: -EINVAL;
  3611. goto err_iris_hfi_init;
  3612. }
  3613. iris_init_hfi_callbacks(hdev);
  3614. err_iris_hfi_init:
  3615. return rc;
  3616. }