msm_cvp_dsp.h 6.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #ifndef MSM_CVP_DSP_H
  6. #define MSM_CVP_DSP_H
  7. #include <linux/types.h>
  8. #include "msm_cvp_debug.h"
  9. #include "cvp_core_hfi.h"
  10. #include <linux/pid.h>
  11. #include <linux/sched.h>
  12. #include <linux/fastrpc.h>
  13. #define CVP_APPS_DSP_GLINK_GUID "cvp-glink-apps-dsp"
  14. #define CVP_APPS_DSP_SMD_GUID "cvp-smd-apps-dsp"
  15. #define VMID_CDSP_Q6 (30)
  16. #define HLOS_VM_NUM 1
  17. #define DSP_VM_NUM 2
  18. #define CVP_DSP_MAX_RESERVED 5
  19. #define CVP_DSP2CPU_RESERVED 8
  20. #define CVP_DSP_RESPONSE_TIMEOUT 300
  21. #define CVP_INVALID_RPMSG_TYPE 0xBADDFACE
  22. #define MAX_FRAME_BUF_NUM 16
  23. #define BITPTRSIZE32 (4)
  24. #define BITPTRSIZE64 (8)
  25. #define HIGH32 (0xFFFFFFFF00000000LL)
  26. #define LOW32 (0xFFFFFFFFLL)
  27. #define CVP_FASTRPC_DRIVER_NAME_SIZE 16
  28. /* Supports up to 8 DSP sessions in 8 processes */
  29. #define MAX_DSP_SESSION_NUM (8)
  30. #define MAX_FASTRPC_DRIVER_NUM (MAX_DSP_SESSION_NUM)
  31. int cvp_dsp_device_init(void);
  32. void cvp_dsp_device_exit(void);
  33. void cvp_dsp_send_hfi_queue(void);
  34. void cvp_dsp_init_hfi_queue_hdr(struct iris_hfi_device *device);
  35. enum CPU2DSP_STATUS {
  36. CPU2DSP_SUCCESS = 0,
  37. CPU2DSP_EFAIL = 1,
  38. CPU2DSP_EFATAL = 2,
  39. CPU2DSP_EUNAVAILABLE = 3,
  40. CPU2DSP_EINVALSTATE = 4,
  41. CPU2DSP_EUNSUPPORTED = 5,
  42. };
  43. enum CVP_DSP_COMMAND {
  44. CPU2DSP_SEND_HFI_QUEUE = 0,
  45. CPU2DSP_SUSPEND = 1,
  46. CPU2DSP_RESUME = 2,
  47. CPU2DSP_SHUTDOWN = 3,
  48. CPU2DSP_REGISTER_BUFFER = 4,
  49. CPU2DSP_DEREGISTER_BUFFER = 5,
  50. CPU2DSP_INIT = 6,
  51. CPU2DSP_SET_DEBUG_LEVEL = 7,
  52. CPU2DSP_MAX_CMD = 8,
  53. DSP2CPU_POWERON = 11,
  54. DSP2CPU_POWEROFF = 12,
  55. DSP2CPU_CREATE_SESSION = 13,
  56. DSP2CPU_DETELE_SESSION = 14,
  57. DSP2CPU_POWER_REQUEST = 15,
  58. DSP2CPU_POWER_CANCEL = 16,
  59. DSP2CPU_REGISTER_BUFFER = 17,
  60. DSP2CPU_DEREGISTER_BUFFER = 18,
  61. DSP2CPU_MEM_ALLOC = 19,
  62. DSP2CPU_MEM_FREE = 20,
  63. CVP_DSP_MAX_CMD = 21,
  64. };
  65. enum eva_dsp_debug_bits {
  66. EVA_PORT_INFO_ON = 0,
  67. EVA_PORT_DEBUG_ON = 1,
  68. EVA_QDI_INFO_ON = 2,
  69. EVA_QDI_DEBUG_ON = 3,
  70. EVA_MEM_DEBUG_ON = 4
  71. };
  72. struct eva_power_req {
  73. uint32_t clock_fdu;
  74. uint32_t clock_ica;
  75. uint32_t clock_od;
  76. uint32_t clock_mpu;
  77. uint32_t clock_fw;
  78. uint32_t bw_ddr;
  79. uint32_t bw_sys_cache;
  80. uint32_t op_clock_fdu;
  81. uint32_t op_clock_ica;
  82. uint32_t op_clock_od;
  83. uint32_t op_clock_mpu;
  84. uint32_t op_clock_fw;
  85. uint32_t op_bw_ddr;
  86. uint32_t op_bw_sys_cache;
  87. };
  88. struct eva_mem_remote {
  89. uint32_t type;
  90. uint32_t size;
  91. uint32_t fd;
  92. uint32_t offset;
  93. uint32_t index;
  94. uint32_t iova;
  95. uint32_t dsp_remote_map;
  96. uint64_t v_dsp_addr;
  97. };
  98. struct cvp_dsp_cmd_msg {
  99. uint32_t type;
  100. int32_t ret;
  101. uint64_t msg_ptr;
  102. uint32_t msg_ptr_len;
  103. uint32_t buff_fd_iova;
  104. uint32_t buff_index;
  105. uint32_t buff_size;
  106. uint32_t session_id;
  107. int32_t ddr_type;
  108. uint32_t buff_fd;
  109. uint32_t buff_offset;
  110. uint32_t buff_fd_size;
  111. uint32_t eva_dsp_debug_mask;
  112. /* Create Session */
  113. uint32_t session_cpu_low;
  114. uint32_t session_cpu_high;
  115. struct eva_mem_remote sbuf;
  116. uint32_t reserved1;
  117. uint32_t reserved2;
  118. };
  119. struct cvp_dsp_rsp_msg {
  120. uint32_t type;
  121. int32_t ret;
  122. uint32_t dsp_state;
  123. uint32_t reserved[CVP_DSP_MAX_RESERVED - 1];
  124. };
  125. struct cvp_dsp2cpu_cmd_msg {
  126. uint32_t type;
  127. uint32_t ver;
  128. uint32_t len;
  129. /* Create Session */
  130. uint32_t session_type;
  131. uint32_t kernel_mask;
  132. uint32_t session_prio;
  133. uint32_t is_secure;
  134. uint32_t dsp_access_mask;
  135. uint32_t session_id;
  136. uint32_t session_cpu_low;
  137. uint32_t session_cpu_high;
  138. int32_t pid;
  139. struct eva_power_req power_req;
  140. struct eva_mem_remote sbuf;
  141. uint32_t data[CVP_DSP2CPU_RESERVED];
  142. };
  143. struct driver_name {
  144. uint32_t status;
  145. char name[CVP_FASTRPC_DRIVER_NAME_SIZE];
  146. };
  147. enum DRIVER_NAME_STATUS {
  148. DRIVER_NAME_INVALID = 0,
  149. DRIVER_NAME_AVAILABLE = 1,
  150. DRIVER_NAME_USED = 2,
  151. };
  152. struct cvp_dsp_fastrpc_driver_entry {
  153. struct list_head list;
  154. uint32_t handle;
  155. uint32_t session_cnt;
  156. uint32_t driver_name_idx;
  157. struct fastrpc_driver cvp_fastrpc_driver;
  158. struct fastrpc_device *cvp_fastrpc_device;
  159. struct completion fastrpc_probe_completion;
  160. /* all dsp sessions list */
  161. struct msm_cvp_list dsp_sessions;
  162. };
  163. struct cvp_dsp_apps {
  164. /*
  165. * tx_lock for sending CPU2DSP cmds or msgs
  166. * and dsp state change
  167. */
  168. struct mutex tx_lock;
  169. /* rx_lock for receiving DSP2CPU cmds or msgs */
  170. struct mutex rx_lock;
  171. struct mutex driver_name_lock;
  172. struct rpmsg_device *chan;
  173. uint32_t state;
  174. uint32_t debug_mask;
  175. bool hyp_assigned;
  176. uint64_t addr;
  177. uint32_t size;
  178. struct completion completions[CPU2DSP_MAX_CMD + 1];
  179. struct cvp_dsp2cpu_cmd_msg pending_dsp2cpu_cmd;
  180. struct cvp_dsp_rsp_msg pending_dsp2cpu_rsp;
  181. struct task_struct *dsp_thread;
  182. /* dsp buffer mapping, set of dma function pointer */
  183. const struct file_operations *dmabuf_f_op;
  184. uint32_t buf_num;
  185. struct msm_cvp_list fastrpc_driver_list;
  186. struct driver_name cvp_fastrpc_name[MAX_FASTRPC_DRIVER_NUM];
  187. };
  188. extern struct cvp_dsp_apps gfa_cv;
  189. /*
  190. * API for CVP driver to suspend CVP session during
  191. * power collapse
  192. *
  193. * @param session_flag
  194. * Flag to share details of session.
  195. */
  196. int cvp_dsp_suspend(uint32_t session_flag);
  197. /*
  198. * API for CVP driver to resume CVP session during
  199. * power collapse
  200. *
  201. * @param session_flag
  202. * Flag to share details of session.
  203. */
  204. int cvp_dsp_resume(uint32_t session_flag);
  205. /*
  206. * API for CVP driver to shutdown CVP session during
  207. * cvp subsystem error.
  208. *
  209. * @param session_flag
  210. * Flag to share details of session.
  211. */
  212. int cvp_dsp_shutdown(uint32_t session_flag);
  213. /*
  214. * API to register iova buffer address with CDSP
  215. *
  216. * @session_id: cvp session id
  217. * @buff_fd: buffer fd
  218. * @buff_fd_size: total size of fd in bytes
  219. * @buff_size: size in bytes of cvp buffer
  220. * @buff_offset: buffer offset
  221. * @buff_index: buffer index
  222. * @iova_buff_addr: IOVA buffer address
  223. */
  224. int cvp_dsp_register_buffer(uint32_t session_id, uint32_t buff_fd,
  225. uint32_t buff_fd_size, uint32_t buff_size,
  226. uint32_t buff_offset, uint32_t buff_index,
  227. uint32_t buff_fd_iova);
  228. /*
  229. * API to de-register iova buffer address from CDSP
  230. *
  231. * @session_id: cvp session id
  232. * @buff_fd: buffer fd
  233. * @buff_fd_size: total size of fd in bytes
  234. * @buff_size: size in bytes of cvp buffer
  235. * @buff_offset: buffer offset
  236. * @buff_index: buffer index
  237. * @iova_buff_addr: IOVA buffer address
  238. */
  239. int cvp_dsp_deregister_buffer(uint32_t session_id, uint32_t buff_fd,
  240. uint32_t buff_fd_size, uint32_t buff_size,
  241. uint32_t buff_offset, uint32_t buff_index,
  242. uint32_t buff_fd_iova);
  243. int cvp_dsp_fastrpc_unmap(uint32_t process_id, struct cvp_internal_buf *buf);
  244. int cvp_dsp_del_sess(uint32_t process_id, struct msm_cvp_inst *inst);
  245. void cvp_dsp_send_debug_mask(void);
  246. #endif // MSM_CVP_DSP_H