sm6150.c 239 KB

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  1. /*
  2. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/delay.h>
  15. #include <linux/gpio.h>
  16. #include <linux/of_gpio.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/slab.h>
  19. #include <linux/io.h>
  20. #include <linux/module.h>
  21. #include <linux/input.h>
  22. #include <linux/of_device.h>
  23. #include <linux/pm_qos.h>
  24. #include <sound/core.h>
  25. #include <sound/soc.h>
  26. #include <sound/soc-dapm.h>
  27. #include <sound/pcm.h>
  28. #include <sound/pcm_params.h>
  29. #include <sound/info.h>
  30. #include <soc/snd_event.h>
  31. #include <dsp/q6afe-v2.h>
  32. #include <dsp/q6core.h>
  33. #include "device_event.h"
  34. #include "msm-pcm-routing-v2.h"
  35. #include "codecs/msm-cdc-pinctrl.h"
  36. #include "codecs/wcd934x/wcd934x.h"
  37. #include "codecs/wcd934x/wcd934x-mbhc.h"
  38. #include "codecs/wcd937x/wcd937x-mbhc.h"
  39. #include "codecs/wsa881x.h"
  40. #include "codecs/bolero/bolero-cdc.h"
  41. #include <dt-bindings/sound/audio-codec-port-types.h>
  42. #include "codecs/bolero/wsa-macro.h"
  43. #include "codecs/wcd937x/internal.h"
  44. #define DRV_NAME "sm6150-asoc-snd"
  45. #define __CHIPSET__ "SM6150 "
  46. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  47. #define SAMPLING_RATE_8KHZ 8000
  48. #define SAMPLING_RATE_11P025KHZ 11025
  49. #define SAMPLING_RATE_16KHZ 16000
  50. #define SAMPLING_RATE_22P05KHZ 22050
  51. #define SAMPLING_RATE_32KHZ 32000
  52. #define SAMPLING_RATE_44P1KHZ 44100
  53. #define SAMPLING_RATE_48KHZ 48000
  54. #define SAMPLING_RATE_88P2KHZ 88200
  55. #define SAMPLING_RATE_96KHZ 96000
  56. #define SAMPLING_RATE_176P4KHZ 176400
  57. #define SAMPLING_RATE_192KHZ 192000
  58. #define SAMPLING_RATE_352P8KHZ 352800
  59. #define SAMPLING_RATE_384KHZ 384000
  60. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  61. #define WCD9XXX_MBHC_DEF_RLOADS 5
  62. #define CODEC_EXT_CLK_RATE 9600000
  63. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  64. #define DEV_NAME_STR_LEN 32
  65. #define WSA8810_NAME_1 "wsa881x.20170211"
  66. #define WSA8810_NAME_2 "wsa881x.20170212"
  67. #define WCN_CDC_SLIM_RX_CH_MAX 2
  68. #define WCN_CDC_SLIM_TX_CH_MAX 3
  69. #define TDM_CHANNEL_MAX 8
  70. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  71. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  72. #define MSM_HIFI_ON 1
  73. enum {
  74. SLIM_RX_0 = 0,
  75. SLIM_RX_1,
  76. SLIM_RX_2,
  77. SLIM_RX_3,
  78. SLIM_RX_4,
  79. SLIM_RX_5,
  80. SLIM_RX_6,
  81. SLIM_RX_7,
  82. SLIM_RX_MAX,
  83. };
  84. enum {
  85. SLIM_TX_0 = 0,
  86. SLIM_TX_1,
  87. SLIM_TX_2,
  88. SLIM_TX_3,
  89. SLIM_TX_4,
  90. SLIM_TX_5,
  91. SLIM_TX_6,
  92. SLIM_TX_7,
  93. SLIM_TX_8,
  94. SLIM_TX_MAX,
  95. };
  96. enum {
  97. PRIM_MI2S = 0,
  98. SEC_MI2S,
  99. TERT_MI2S,
  100. QUAT_MI2S,
  101. QUIN_MI2S,
  102. MI2S_MAX,
  103. };
  104. enum {
  105. PRIM_AUX_PCM = 0,
  106. SEC_AUX_PCM,
  107. TERT_AUX_PCM,
  108. QUAT_AUX_PCM,
  109. QUIN_AUX_PCM,
  110. AUX_PCM_MAX,
  111. };
  112. enum {
  113. WSA_CDC_DMA_RX_0 = 0,
  114. WSA_CDC_DMA_RX_1,
  115. RX_CDC_DMA_RX_0,
  116. RX_CDC_DMA_RX_1,
  117. RX_CDC_DMA_RX_2,
  118. RX_CDC_DMA_RX_3,
  119. RX_CDC_DMA_RX_5,
  120. CDC_DMA_RX_MAX,
  121. };
  122. enum {
  123. WSA_CDC_DMA_TX_0 = 0,
  124. WSA_CDC_DMA_TX_1,
  125. WSA_CDC_DMA_TX_2,
  126. TX_CDC_DMA_TX_0,
  127. TX_CDC_DMA_TX_3,
  128. TX_CDC_DMA_TX_4,
  129. CDC_DMA_TX_MAX,
  130. };
  131. struct mi2s_conf {
  132. struct mutex lock;
  133. u32 ref_cnt;
  134. u32 msm_is_mi2s_master;
  135. };
  136. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  137. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  138. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  139. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  140. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
  141. Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
  142. };
  143. struct dev_config {
  144. u32 sample_rate;
  145. u32 bit_format;
  146. u32 channels;
  147. };
  148. enum {
  149. DP_RX_IDX = 0,
  150. EXT_DISP_RX_IDX_MAX,
  151. };
  152. struct msm_wsa881x_dev_info {
  153. struct device_node *of_node;
  154. u32 index;
  155. };
  156. struct aux_codec_dev_info {
  157. struct device_node *of_node;
  158. u32 index;
  159. };
  160. enum pinctrl_pin_state {
  161. STATE_DISABLE = 0, /* All pins are in sleep state */
  162. STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
  163. STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
  164. };
  165. struct msm_pinctrl_info {
  166. struct pinctrl *pinctrl;
  167. struct pinctrl_state *mi2s_disable;
  168. struct pinctrl_state *tdm_disable;
  169. struct pinctrl_state *mi2s_active;
  170. struct pinctrl_state *tdm_active;
  171. enum pinctrl_pin_state curr_state;
  172. };
  173. struct msm_asoc_mach_data {
  174. struct snd_info_entry *codec_root;
  175. struct msm_pinctrl_info pinctrl_info;
  176. int usbc_en2_gpio; /* used by gpio driver API */
  177. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  178. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  179. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  180. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  181. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  182. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  183. bool is_afe_config_done;
  184. };
  185. struct msm_asoc_wcd93xx_codec {
  186. void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
  187. enum afe_config_type config_type);
  188. };
  189. static const char *const pin_states[] = {"sleep", "i2s-active",
  190. "tdm-active"};
  191. static struct snd_soc_card snd_soc_card_sm6150_msm;
  192. enum {
  193. TDM_0 = 0,
  194. TDM_1,
  195. TDM_2,
  196. TDM_3,
  197. TDM_4,
  198. TDM_5,
  199. TDM_6,
  200. TDM_7,
  201. TDM_PORT_MAX,
  202. };
  203. enum {
  204. TDM_PRI = 0,
  205. TDM_SEC,
  206. TDM_TERT,
  207. TDM_QUAT,
  208. TDM_QUIN,
  209. TDM_INTERFACE_MAX,
  210. };
  211. struct tdm_port {
  212. u32 mode;
  213. u32 channel;
  214. };
  215. /* TDM default config */
  216. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  217. { /* PRI TDM */
  218. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  219. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  220. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  221. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  222. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  223. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  224. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  225. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  226. },
  227. { /* SEC TDM */
  228. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  229. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  230. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  231. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  232. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  233. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  234. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  235. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  236. },
  237. { /* TERT TDM */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  240. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  242. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  243. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  244. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  246. },
  247. { /* QUAT TDM */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  249. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  250. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  252. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  253. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  254. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  255. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  256. },
  257. { /* QUIN TDM */
  258. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  259. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  260. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  261. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  262. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  263. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  264. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  265. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  266. }
  267. };
  268. /* TDM default config */
  269. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  270. { /* PRI TDM */
  271. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  272. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  273. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  274. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  275. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  276. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  277. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  278. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  279. },
  280. { /* SEC TDM */
  281. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  282. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  283. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  284. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  285. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  286. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  287. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  288. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  289. },
  290. { /* TERT TDM */
  291. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  292. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  293. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  294. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  295. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  296. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  297. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  298. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  299. },
  300. { /* QUAT TDM */
  301. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  302. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  303. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  304. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  305. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  306. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  307. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  308. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  309. },
  310. { /* QUIN TDM */
  311. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  312. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  313. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  314. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  315. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  316. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  317. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  318. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  319. }
  320. };
  321. /* Default configuration of slimbus channels */
  322. static struct dev_config slim_rx_cfg[] = {
  323. [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  324. [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  325. [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  326. [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  327. [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  328. [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  329. [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  330. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  331. };
  332. static struct dev_config slim_tx_cfg[] = {
  333. [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  334. [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  335. [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  336. [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  337. [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  338. [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  339. [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  340. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  341. [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  342. };
  343. /* Default configuration of Codec DMA Interface Tx */
  344. static struct dev_config cdc_dma_rx_cfg[] = {
  345. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  346. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  347. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  348. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  349. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  350. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  351. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  352. };
  353. /* Default configuration of Codec DMA Interface Rx */
  354. static struct dev_config cdc_dma_tx_cfg[] = {
  355. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  356. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  357. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  358. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  359. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  360. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  361. };
  362. /* Default configuration of external display BE */
  363. static struct dev_config ext_disp_rx_cfg[] = {
  364. [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  365. };
  366. static struct dev_config usb_rx_cfg = {
  367. .sample_rate = SAMPLING_RATE_48KHZ,
  368. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  369. .channels = 2,
  370. };
  371. static struct dev_config usb_tx_cfg = {
  372. .sample_rate = SAMPLING_RATE_48KHZ,
  373. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  374. .channels = 1,
  375. };
  376. static struct dev_config proxy_rx_cfg = {
  377. .sample_rate = SAMPLING_RATE_48KHZ,
  378. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  379. .channels = 2,
  380. };
  381. /* Default configuration of MI2S channels */
  382. static struct dev_config mi2s_rx_cfg[] = {
  383. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  384. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  385. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  386. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  387. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  388. };
  389. static struct dev_config mi2s_tx_cfg[] = {
  390. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  391. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  392. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  393. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  394. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  395. };
  396. static struct dev_config aux_pcm_rx_cfg[] = {
  397. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  398. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  399. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  400. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  401. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  402. };
  403. static struct dev_config aux_pcm_tx_cfg[] = {
  404. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  405. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  406. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  407. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  408. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  409. };
  410. static int msm_vi_feed_tx_ch = 2;
  411. static const char *const slim_rx_ch_text[] = {"One", "Two"};
  412. static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
  413. "Five", "Six", "Seven",
  414. "Eight"};
  415. static const char *const vi_feed_ch_text[] = {"One", "Two"};
  416. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  417. "S32_LE"};
  418. static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
  419. "S24_3LE"};
  420. static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  421. "KHZ_32", "KHZ_44P1", "KHZ_48",
  422. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  423. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  424. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  425. "KHZ_44P1", "KHZ_48",
  426. "KHZ_88P2", "KHZ_96"};
  427. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  428. "Five", "Six", "Seven",
  429. "Eight"};
  430. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  431. "Six", "Seven", "Eight"};
  432. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  433. "KHZ_16", "KHZ_22P05",
  434. "KHZ_32", "KHZ_44P1", "KHZ_48",
  435. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  436. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  437. static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
  438. "KHZ_192", "KHZ_32", "KHZ_44P1",
  439. "KHZ_88P2", "KHZ_176P4" };
  440. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  441. "Five", "Six", "Seven", "Eight"};
  442. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  443. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  444. "KHZ_48", "KHZ_176P4",
  445. "KHZ_352P8"};
  446. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  447. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  448. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  449. "KHZ_48", "KHZ_96", "KHZ_192"};
  450. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  451. "Five", "Six", "Seven",
  452. "Eight"};
  453. static const char *const hifi_text[] = {"Off", "On"};
  454. static const char *const qos_text[] = {"Disable", "Enable"};
  455. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  456. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  457. "Five", "Six", "Seven",
  458. "Eight"};
  459. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  460. "KHZ_16", "KHZ_22P05",
  461. "KHZ_32", "KHZ_44P1", "KHZ_48",
  462. "KHZ_88P2", "KHZ_96",
  463. "KHZ_176P4", "KHZ_192",
  464. "KHZ_352P8", "KHZ_384"};
  465. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
  466. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
  467. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
  468. static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
  469. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
  470. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
  471. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  472. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  473. static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
  474. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
  475. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  476. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
  477. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
  478. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
  479. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
  480. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  481. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  482. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
  483. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
  484. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
  485. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
  486. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
  487. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
  488. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  489. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  490. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  491. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
  492. ext_disp_sample_rate_text);
  493. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  494. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  495. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  496. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  497. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  498. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  499. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  500. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  501. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  502. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  503. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  504. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  505. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  506. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  507. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  508. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  509. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  510. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  511. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  512. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
  513. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
  514. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  515. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  516. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  517. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
  518. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
  519. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  520. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  521. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  522. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  523. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  524. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  525. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
  526. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
  527. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
  528. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
  529. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  530. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  531. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  532. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  533. static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
  534. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  535. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  536. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  537. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  538. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  539. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  540. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  541. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  542. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  543. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  544. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  545. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  546. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  547. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  548. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  549. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  550. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  551. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  552. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  553. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  554. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  555. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  556. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  557. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  558. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  559. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  560. cdc_dma_sample_rate_text);
  561. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  562. cdc_dma_sample_rate_text);
  563. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  564. cdc_dma_sample_rate_text);
  565. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  566. cdc_dma_sample_rate_text);
  567. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  568. cdc_dma_sample_rate_text);
  569. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  570. cdc_dma_sample_rate_text);
  571. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  572. cdc_dma_sample_rate_text);
  573. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  574. cdc_dma_sample_rate_text);
  575. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  576. cdc_dma_sample_rate_text);
  577. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  578. cdc_dma_sample_rate_text);
  579. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  580. cdc_dma_sample_rate_text);
  581. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  582. cdc_dma_sample_rate_text);
  583. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  584. cdc_dma_sample_rate_text);
  585. static int msm_hifi_control;
  586. static bool codec_reg_done;
  587. static struct snd_soc_aux_dev *msm_aux_dev;
  588. static struct snd_soc_codec_conf *msm_codec_conf;
  589. static struct msm_asoc_wcd93xx_codec msm_codec_fn;
  590. static int dmic_0_1_gpio_cnt;
  591. static int dmic_2_3_gpio_cnt;
  592. static void *def_wcd_mbhc_cal(void);
  593. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  594. int enable, bool dapm);
  595. static int msm_wsa881x_init(struct snd_soc_component *component);
  596. static int msm_aux_codec_init(struct snd_soc_component *component);
  597. /*
  598. * Need to report LINEIN
  599. * if R/L channel impedance is larger than 5K ohm
  600. */
  601. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  602. .read_fw_bin = false,
  603. .calibration = NULL,
  604. .detect_extn_cable = true,
  605. .mono_stero_detection = false,
  606. .swap_gnd_mic = NULL,
  607. .hs_ext_micbias = true,
  608. .key_code[0] = KEY_MEDIA,
  609. .key_code[1] = KEY_VOICECOMMAND,
  610. .key_code[2] = KEY_VOLUMEUP,
  611. .key_code[3] = KEY_VOLUMEDOWN,
  612. .key_code[4] = 0,
  613. .key_code[5] = 0,
  614. .key_code[6] = 0,
  615. .key_code[7] = 0,
  616. .linein_th = 5000,
  617. .moisture_en = true,
  618. .mbhc_micbias = MIC_BIAS_2,
  619. .anc_micbias = MIC_BIAS_2,
  620. .enable_anc_mic_detect = false,
  621. };
  622. static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
  623. {"MIC BIAS1", NULL, "MCLK TX"},
  624. {"MIC BIAS2", NULL, "MCLK TX"},
  625. {"MIC BIAS3", NULL, "MCLK TX"},
  626. {"MIC BIAS4", NULL, "MCLK TX"},
  627. };
  628. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  629. {
  630. AFE_API_VERSION_I2S_CONFIG,
  631. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  632. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  633. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  634. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  635. 0,
  636. },
  637. {
  638. AFE_API_VERSION_I2S_CONFIG,
  639. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  640. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  641. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  642. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  643. 0,
  644. },
  645. {
  646. AFE_API_VERSION_I2S_CONFIG,
  647. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  648. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  649. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  650. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  651. 0,
  652. },
  653. {
  654. AFE_API_VERSION_I2S_CONFIG,
  655. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
  656. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  657. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  658. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  659. 0,
  660. },
  661. {
  662. AFE_API_VERSION_I2S_CONFIG,
  663. Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
  664. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  665. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  666. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  667. 0,
  668. }
  669. };
  670. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  671. static int slim_get_sample_rate_val(int sample_rate)
  672. {
  673. int sample_rate_val = 0;
  674. switch (sample_rate) {
  675. case SAMPLING_RATE_8KHZ:
  676. sample_rate_val = 0;
  677. break;
  678. case SAMPLING_RATE_16KHZ:
  679. sample_rate_val = 1;
  680. break;
  681. case SAMPLING_RATE_32KHZ:
  682. sample_rate_val = 2;
  683. break;
  684. case SAMPLING_RATE_44P1KHZ:
  685. sample_rate_val = 3;
  686. break;
  687. case SAMPLING_RATE_48KHZ:
  688. sample_rate_val = 4;
  689. break;
  690. case SAMPLING_RATE_88P2KHZ:
  691. sample_rate_val = 5;
  692. break;
  693. case SAMPLING_RATE_96KHZ:
  694. sample_rate_val = 6;
  695. break;
  696. case SAMPLING_RATE_176P4KHZ:
  697. sample_rate_val = 7;
  698. break;
  699. case SAMPLING_RATE_192KHZ:
  700. sample_rate_val = 8;
  701. break;
  702. case SAMPLING_RATE_352P8KHZ:
  703. sample_rate_val = 9;
  704. break;
  705. case SAMPLING_RATE_384KHZ:
  706. sample_rate_val = 10;
  707. break;
  708. default:
  709. sample_rate_val = 4;
  710. break;
  711. }
  712. return sample_rate_val;
  713. }
  714. static int slim_get_sample_rate(int value)
  715. {
  716. int sample_rate = 0;
  717. switch (value) {
  718. case 0:
  719. sample_rate = SAMPLING_RATE_8KHZ;
  720. break;
  721. case 1:
  722. sample_rate = SAMPLING_RATE_16KHZ;
  723. break;
  724. case 2:
  725. sample_rate = SAMPLING_RATE_32KHZ;
  726. break;
  727. case 3:
  728. sample_rate = SAMPLING_RATE_44P1KHZ;
  729. break;
  730. case 4:
  731. sample_rate = SAMPLING_RATE_48KHZ;
  732. break;
  733. case 5:
  734. sample_rate = SAMPLING_RATE_88P2KHZ;
  735. break;
  736. case 6:
  737. sample_rate = SAMPLING_RATE_96KHZ;
  738. break;
  739. case 7:
  740. sample_rate = SAMPLING_RATE_176P4KHZ;
  741. break;
  742. case 8:
  743. sample_rate = SAMPLING_RATE_192KHZ;
  744. break;
  745. case 9:
  746. sample_rate = SAMPLING_RATE_352P8KHZ;
  747. break;
  748. case 10:
  749. sample_rate = SAMPLING_RATE_384KHZ;
  750. break;
  751. default:
  752. sample_rate = SAMPLING_RATE_48KHZ;
  753. break;
  754. }
  755. return sample_rate;
  756. }
  757. static int slim_get_bit_format_val(int bit_format)
  758. {
  759. int val = 0;
  760. switch (bit_format) {
  761. case SNDRV_PCM_FORMAT_S32_LE:
  762. val = 3;
  763. break;
  764. case SNDRV_PCM_FORMAT_S24_3LE:
  765. val = 2;
  766. break;
  767. case SNDRV_PCM_FORMAT_S24_LE:
  768. val = 1;
  769. break;
  770. case SNDRV_PCM_FORMAT_S16_LE:
  771. default:
  772. val = 0;
  773. break;
  774. }
  775. return val;
  776. }
  777. static int slim_get_bit_format(int val)
  778. {
  779. int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  780. switch (val) {
  781. case 0:
  782. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  783. break;
  784. case 1:
  785. bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
  786. break;
  787. case 2:
  788. bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
  789. break;
  790. case 3:
  791. bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
  792. break;
  793. default:
  794. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  795. break;
  796. }
  797. return bit_fmt;
  798. }
  799. static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
  800. {
  801. int port_id = 0;
  802. if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
  803. port_id = SLIM_RX_0;
  804. } else if (strnstr(kcontrol->id.name,
  805. "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
  806. port_id = SLIM_RX_2;
  807. } else if (strnstr(kcontrol->id.name,
  808. "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
  809. port_id = SLIM_RX_5;
  810. } else if (strnstr(kcontrol->id.name,
  811. "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
  812. port_id = SLIM_RX_6;
  813. } else if (strnstr(kcontrol->id.name,
  814. "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
  815. port_id = SLIM_TX_0;
  816. } else if (strnstr(kcontrol->id.name,
  817. "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
  818. port_id = SLIM_TX_1;
  819. } else {
  820. pr_err("%s: unsupported channel: %s\n",
  821. __func__, kcontrol->id.name);
  822. return -EINVAL;
  823. }
  824. return port_id;
  825. }
  826. static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  827. struct snd_ctl_elem_value *ucontrol)
  828. {
  829. int ch_num = slim_get_port_idx(kcontrol);
  830. if (ch_num < 0)
  831. return ch_num;
  832. ucontrol->value.enumerated.item[0] =
  833. slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
  834. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  835. ch_num, slim_rx_cfg[ch_num].sample_rate,
  836. ucontrol->value.enumerated.item[0]);
  837. return 0;
  838. }
  839. static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  840. struct snd_ctl_elem_value *ucontrol)
  841. {
  842. int ch_num = slim_get_port_idx(kcontrol);
  843. if (ch_num < 0)
  844. return ch_num;
  845. slim_rx_cfg[ch_num].sample_rate =
  846. slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  847. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  848. ch_num, slim_rx_cfg[ch_num].sample_rate,
  849. ucontrol->value.enumerated.item[0]);
  850. return 0;
  851. }
  852. static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  853. struct snd_ctl_elem_value *ucontrol)
  854. {
  855. int ch_num = slim_get_port_idx(kcontrol);
  856. if (ch_num < 0)
  857. return ch_num;
  858. ucontrol->value.enumerated.item[0] =
  859. slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
  860. pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  861. ch_num, slim_tx_cfg[ch_num].sample_rate,
  862. ucontrol->value.enumerated.item[0]);
  863. return 0;
  864. }
  865. static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  866. struct snd_ctl_elem_value *ucontrol)
  867. {
  868. int sample_rate = 0;
  869. int ch_num = slim_get_port_idx(kcontrol);
  870. if (ch_num < 0)
  871. return ch_num;
  872. sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  873. if (sample_rate == SAMPLING_RATE_44P1KHZ) {
  874. pr_err("%s: Unsupported sample rate %d: for Tx path\n",
  875. __func__, sample_rate);
  876. return -EINVAL;
  877. }
  878. slim_tx_cfg[ch_num].sample_rate = sample_rate;
  879. pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
  880. ch_num, slim_tx_cfg[ch_num].sample_rate,
  881. ucontrol->value.enumerated.item[0]);
  882. return 0;
  883. }
  884. static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
  885. struct snd_ctl_elem_value *ucontrol)
  886. {
  887. int ch_num = slim_get_port_idx(kcontrol);
  888. if (ch_num < 0)
  889. return ch_num;
  890. ucontrol->value.enumerated.item[0] =
  891. slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
  892. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  893. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  894. ucontrol->value.enumerated.item[0]);
  895. return 0;
  896. }
  897. static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
  898. struct snd_ctl_elem_value *ucontrol)
  899. {
  900. int ch_num = slim_get_port_idx(kcontrol);
  901. if (ch_num < 0)
  902. return ch_num;
  903. slim_rx_cfg[ch_num].bit_format =
  904. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  905. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  906. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  907. ucontrol->value.enumerated.item[0]);
  908. return 0;
  909. }
  910. static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
  911. struct snd_ctl_elem_value *ucontrol)
  912. {
  913. int ch_num = slim_get_port_idx(kcontrol);
  914. if (ch_num < 0)
  915. return ch_num;
  916. ucontrol->value.enumerated.item[0] =
  917. slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
  918. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  919. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  920. ucontrol->value.enumerated.item[0]);
  921. return 0;
  922. }
  923. static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
  924. struct snd_ctl_elem_value *ucontrol)
  925. {
  926. int ch_num = slim_get_port_idx(kcontrol);
  927. if (ch_num < 0)
  928. return ch_num;
  929. slim_tx_cfg[ch_num].bit_format =
  930. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  931. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  932. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  933. ucontrol->value.enumerated.item[0]);
  934. return 0;
  935. }
  936. static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
  937. struct snd_ctl_elem_value *ucontrol)
  938. {
  939. int ch_num = slim_get_port_idx(kcontrol);
  940. if (ch_num < 0)
  941. return ch_num;
  942. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  943. ch_num, slim_rx_cfg[ch_num].channels);
  944. ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
  945. return 0;
  946. }
  947. static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
  948. struct snd_ctl_elem_value *ucontrol)
  949. {
  950. int ch_num = slim_get_port_idx(kcontrol);
  951. if (ch_num < 0)
  952. return ch_num;
  953. slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  954. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  955. ch_num, slim_rx_cfg[ch_num].channels);
  956. return 1;
  957. }
  958. static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
  959. struct snd_ctl_elem_value *ucontrol)
  960. {
  961. int ch_num = slim_get_port_idx(kcontrol);
  962. if (ch_num < 0)
  963. return ch_num;
  964. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  965. ch_num, slim_tx_cfg[ch_num].channels);
  966. ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
  967. return 0;
  968. }
  969. static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
  970. struct snd_ctl_elem_value *ucontrol)
  971. {
  972. int ch_num = slim_get_port_idx(kcontrol);
  973. if (ch_num < 0)
  974. return ch_num;
  975. slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  976. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  977. ch_num, slim_tx_cfg[ch_num].channels);
  978. return 1;
  979. }
  980. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  981. struct snd_ctl_elem_value *ucontrol)
  982. {
  983. ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
  984. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  985. ucontrol->value.integer.value[0]);
  986. return 0;
  987. }
  988. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  989. struct snd_ctl_elem_value *ucontrol)
  990. {
  991. msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
  992. pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
  993. return 1;
  994. }
  995. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  996. struct snd_ctl_elem_value *ucontrol)
  997. {
  998. /*
  999. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  1000. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  1001. * value.
  1002. */
  1003. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  1004. case SAMPLING_RATE_96KHZ:
  1005. ucontrol->value.integer.value[0] = 5;
  1006. break;
  1007. case SAMPLING_RATE_88P2KHZ:
  1008. ucontrol->value.integer.value[0] = 4;
  1009. break;
  1010. case SAMPLING_RATE_48KHZ:
  1011. ucontrol->value.integer.value[0] = 3;
  1012. break;
  1013. case SAMPLING_RATE_44P1KHZ:
  1014. ucontrol->value.integer.value[0] = 2;
  1015. break;
  1016. case SAMPLING_RATE_16KHZ:
  1017. ucontrol->value.integer.value[0] = 1;
  1018. break;
  1019. case SAMPLING_RATE_8KHZ:
  1020. default:
  1021. ucontrol->value.integer.value[0] = 0;
  1022. break;
  1023. }
  1024. pr_debug("%s: sample rate = %d\n", __func__,
  1025. slim_rx_cfg[SLIM_RX_7].sample_rate);
  1026. return 0;
  1027. }
  1028. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  1029. struct snd_ctl_elem_value *ucontrol)
  1030. {
  1031. switch (ucontrol->value.integer.value[0]) {
  1032. case 1:
  1033. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1034. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1035. break;
  1036. case 2:
  1037. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1038. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1039. break;
  1040. case 3:
  1041. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1042. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1043. break;
  1044. case 4:
  1045. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1046. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1047. break;
  1048. case 5:
  1049. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1050. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1051. break;
  1052. case 0:
  1053. default:
  1054. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1055. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1056. break;
  1057. }
  1058. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  1059. __func__,
  1060. slim_rx_cfg[SLIM_RX_7].sample_rate,
  1061. slim_tx_cfg[SLIM_TX_7].sample_rate,
  1062. ucontrol->value.enumerated.item[0]);
  1063. return 0;
  1064. }
  1065. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1066. {
  1067. int idx = 0;
  1068. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  1069. sizeof("WSA_CDC_DMA_RX_0")))
  1070. idx = WSA_CDC_DMA_RX_0;
  1071. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  1072. sizeof("WSA_CDC_DMA_RX_0")))
  1073. idx = WSA_CDC_DMA_RX_1;
  1074. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1075. sizeof("RX_CDC_DMA_RX_0")))
  1076. idx = RX_CDC_DMA_RX_0;
  1077. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1078. sizeof("RX_CDC_DMA_RX_1")))
  1079. idx = RX_CDC_DMA_RX_1;
  1080. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1081. sizeof("RX_CDC_DMA_RX_2")))
  1082. idx = RX_CDC_DMA_RX_2;
  1083. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1084. sizeof("RX_CDC_DMA_RX_3")))
  1085. idx = RX_CDC_DMA_RX_3;
  1086. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1087. sizeof("RX_CDC_DMA_RX_5")))
  1088. idx = RX_CDC_DMA_RX_5;
  1089. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  1090. sizeof("WSA_CDC_DMA_TX_0")))
  1091. idx = WSA_CDC_DMA_TX_0;
  1092. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  1093. sizeof("WSA_CDC_DMA_TX_1")))
  1094. idx = WSA_CDC_DMA_TX_1;
  1095. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  1096. sizeof("WSA_CDC_DMA_TX_2")))
  1097. idx = WSA_CDC_DMA_TX_2;
  1098. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  1099. sizeof("TX_CDC_DMA_TX_0")))
  1100. idx = TX_CDC_DMA_TX_0;
  1101. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  1102. sizeof("TX_CDC_DMA_TX_3")))
  1103. idx = TX_CDC_DMA_TX_3;
  1104. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  1105. sizeof("TX_CDC_DMA_TX_4")))
  1106. idx = TX_CDC_DMA_TX_4;
  1107. else {
  1108. pr_err("%s: unsupported channel: %s\n",
  1109. __func__, kcontrol->id.name);
  1110. return -EINVAL;
  1111. }
  1112. return idx;
  1113. }
  1114. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  1115. struct snd_ctl_elem_value *ucontrol)
  1116. {
  1117. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1118. if (ch_num < 0) {
  1119. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1120. return ch_num;
  1121. }
  1122. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1123. cdc_dma_rx_cfg[ch_num].channels - 1);
  1124. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1125. return 0;
  1126. }
  1127. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1128. struct snd_ctl_elem_value *ucontrol)
  1129. {
  1130. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1131. if (ch_num < 0) {
  1132. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1133. return ch_num;
  1134. }
  1135. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1136. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1137. cdc_dma_rx_cfg[ch_num].channels);
  1138. return 1;
  1139. }
  1140. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  1141. struct snd_ctl_elem_value *ucontrol)
  1142. {
  1143. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1144. if (ch_num < 0) {
  1145. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1146. return ch_num;
  1147. }
  1148. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  1149. case SNDRV_PCM_FORMAT_S32_LE:
  1150. ucontrol->value.integer.value[0] = 3;
  1151. break;
  1152. case SNDRV_PCM_FORMAT_S24_3LE:
  1153. ucontrol->value.integer.value[0] = 2;
  1154. break;
  1155. case SNDRV_PCM_FORMAT_S24_LE:
  1156. ucontrol->value.integer.value[0] = 1;
  1157. break;
  1158. case SNDRV_PCM_FORMAT_S16_LE:
  1159. default:
  1160. ucontrol->value.integer.value[0] = 0;
  1161. break;
  1162. }
  1163. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1164. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1165. ucontrol->value.integer.value[0]);
  1166. return 0;
  1167. }
  1168. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  1169. struct snd_ctl_elem_value *ucontrol)
  1170. {
  1171. int rc = 0;
  1172. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1173. if (ch_num < 0) {
  1174. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1175. return ch_num;
  1176. }
  1177. switch (ucontrol->value.integer.value[0]) {
  1178. case 3:
  1179. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1180. break;
  1181. case 2:
  1182. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1183. break;
  1184. case 1:
  1185. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1186. break;
  1187. case 0:
  1188. default:
  1189. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1190. break;
  1191. }
  1192. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1193. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1194. ucontrol->value.integer.value[0]);
  1195. return rc;
  1196. }
  1197. static int cdc_dma_get_sample_rate_val(int sample_rate)
  1198. {
  1199. int sample_rate_val = 0;
  1200. switch (sample_rate) {
  1201. case SAMPLING_RATE_8KHZ:
  1202. sample_rate_val = 0;
  1203. break;
  1204. case SAMPLING_RATE_11P025KHZ:
  1205. sample_rate_val = 1;
  1206. break;
  1207. case SAMPLING_RATE_16KHZ:
  1208. sample_rate_val = 2;
  1209. break;
  1210. case SAMPLING_RATE_22P05KHZ:
  1211. sample_rate_val = 3;
  1212. break;
  1213. case SAMPLING_RATE_32KHZ:
  1214. sample_rate_val = 4;
  1215. break;
  1216. case SAMPLING_RATE_44P1KHZ:
  1217. sample_rate_val = 5;
  1218. break;
  1219. case SAMPLING_RATE_48KHZ:
  1220. sample_rate_val = 6;
  1221. break;
  1222. case SAMPLING_RATE_88P2KHZ:
  1223. sample_rate_val = 7;
  1224. break;
  1225. case SAMPLING_RATE_96KHZ:
  1226. sample_rate_val = 8;
  1227. break;
  1228. case SAMPLING_RATE_176P4KHZ:
  1229. sample_rate_val = 9;
  1230. break;
  1231. case SAMPLING_RATE_192KHZ:
  1232. sample_rate_val = 10;
  1233. break;
  1234. case SAMPLING_RATE_352P8KHZ:
  1235. sample_rate_val = 11;
  1236. break;
  1237. case SAMPLING_RATE_384KHZ:
  1238. sample_rate_val = 12;
  1239. break;
  1240. default:
  1241. sample_rate_val = 6;
  1242. break;
  1243. }
  1244. return sample_rate_val;
  1245. }
  1246. static int cdc_dma_get_sample_rate(int value)
  1247. {
  1248. int sample_rate = 0;
  1249. switch (value) {
  1250. case 0:
  1251. sample_rate = SAMPLING_RATE_8KHZ;
  1252. break;
  1253. case 1:
  1254. sample_rate = SAMPLING_RATE_11P025KHZ;
  1255. break;
  1256. case 2:
  1257. sample_rate = SAMPLING_RATE_16KHZ;
  1258. break;
  1259. case 3:
  1260. sample_rate = SAMPLING_RATE_22P05KHZ;
  1261. break;
  1262. case 4:
  1263. sample_rate = SAMPLING_RATE_32KHZ;
  1264. break;
  1265. case 5:
  1266. sample_rate = SAMPLING_RATE_44P1KHZ;
  1267. break;
  1268. case 6:
  1269. sample_rate = SAMPLING_RATE_48KHZ;
  1270. break;
  1271. case 7:
  1272. sample_rate = SAMPLING_RATE_88P2KHZ;
  1273. break;
  1274. case 8:
  1275. sample_rate = SAMPLING_RATE_96KHZ;
  1276. break;
  1277. case 9:
  1278. sample_rate = SAMPLING_RATE_176P4KHZ;
  1279. break;
  1280. case 10:
  1281. sample_rate = SAMPLING_RATE_192KHZ;
  1282. break;
  1283. case 11:
  1284. sample_rate = SAMPLING_RATE_352P8KHZ;
  1285. break;
  1286. case 12:
  1287. sample_rate = SAMPLING_RATE_384KHZ;
  1288. break;
  1289. default:
  1290. sample_rate = SAMPLING_RATE_48KHZ;
  1291. break;
  1292. }
  1293. return sample_rate;
  1294. }
  1295. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1296. struct snd_ctl_elem_value *ucontrol)
  1297. {
  1298. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1299. if (ch_num < 0) {
  1300. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1301. return ch_num;
  1302. }
  1303. ucontrol->value.enumerated.item[0] =
  1304. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  1305. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  1306. cdc_dma_rx_cfg[ch_num].sample_rate);
  1307. return 0;
  1308. }
  1309. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1310. struct snd_ctl_elem_value *ucontrol)
  1311. {
  1312. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1313. if (ch_num < 0) {
  1314. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1315. return ch_num;
  1316. }
  1317. cdc_dma_rx_cfg[ch_num].sample_rate =
  1318. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1319. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  1320. __func__, ucontrol->value.enumerated.item[0],
  1321. cdc_dma_rx_cfg[ch_num].sample_rate);
  1322. return 0;
  1323. }
  1324. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  1325. struct snd_ctl_elem_value *ucontrol)
  1326. {
  1327. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1328. if (ch_num < 0) {
  1329. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1330. return ch_num;
  1331. }
  1332. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1333. cdc_dma_tx_cfg[ch_num].channels);
  1334. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  1335. return 0;
  1336. }
  1337. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  1338. struct snd_ctl_elem_value *ucontrol)
  1339. {
  1340. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1341. if (ch_num < 0) {
  1342. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1343. return ch_num;
  1344. }
  1345. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1346. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1347. cdc_dma_tx_cfg[ch_num].channels);
  1348. return 1;
  1349. }
  1350. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1351. struct snd_ctl_elem_value *ucontrol)
  1352. {
  1353. int sample_rate_val;
  1354. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1355. if (ch_num < 0) {
  1356. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1357. return ch_num;
  1358. }
  1359. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  1360. case SAMPLING_RATE_384KHZ:
  1361. sample_rate_val = 12;
  1362. break;
  1363. case SAMPLING_RATE_352P8KHZ:
  1364. sample_rate_val = 11;
  1365. break;
  1366. case SAMPLING_RATE_192KHZ:
  1367. sample_rate_val = 10;
  1368. break;
  1369. case SAMPLING_RATE_176P4KHZ:
  1370. sample_rate_val = 9;
  1371. break;
  1372. case SAMPLING_RATE_96KHZ:
  1373. sample_rate_val = 8;
  1374. break;
  1375. case SAMPLING_RATE_88P2KHZ:
  1376. sample_rate_val = 7;
  1377. break;
  1378. case SAMPLING_RATE_48KHZ:
  1379. sample_rate_val = 6;
  1380. break;
  1381. case SAMPLING_RATE_44P1KHZ:
  1382. sample_rate_val = 5;
  1383. break;
  1384. case SAMPLING_RATE_32KHZ:
  1385. sample_rate_val = 4;
  1386. break;
  1387. case SAMPLING_RATE_22P05KHZ:
  1388. sample_rate_val = 3;
  1389. break;
  1390. case SAMPLING_RATE_16KHZ:
  1391. sample_rate_val = 2;
  1392. break;
  1393. case SAMPLING_RATE_11P025KHZ:
  1394. sample_rate_val = 1;
  1395. break;
  1396. case SAMPLING_RATE_8KHZ:
  1397. sample_rate_val = 0;
  1398. break;
  1399. default:
  1400. sample_rate_val = 6;
  1401. break;
  1402. }
  1403. ucontrol->value.integer.value[0] = sample_rate_val;
  1404. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  1405. cdc_dma_tx_cfg[ch_num].sample_rate);
  1406. return 0;
  1407. }
  1408. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1409. struct snd_ctl_elem_value *ucontrol)
  1410. {
  1411. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1412. if (ch_num < 0) {
  1413. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1414. return ch_num;
  1415. }
  1416. switch (ucontrol->value.integer.value[0]) {
  1417. case 12:
  1418. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  1419. break;
  1420. case 11:
  1421. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  1422. break;
  1423. case 10:
  1424. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  1425. break;
  1426. case 9:
  1427. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  1428. break;
  1429. case 8:
  1430. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  1431. break;
  1432. case 7:
  1433. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  1434. break;
  1435. case 6:
  1436. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1437. break;
  1438. case 5:
  1439. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  1440. break;
  1441. case 4:
  1442. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  1443. break;
  1444. case 3:
  1445. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  1446. break;
  1447. case 2:
  1448. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  1449. break;
  1450. case 1:
  1451. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  1452. break;
  1453. case 0:
  1454. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  1455. break;
  1456. default:
  1457. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1458. break;
  1459. }
  1460. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  1461. __func__, ucontrol->value.integer.value[0],
  1462. cdc_dma_tx_cfg[ch_num].sample_rate);
  1463. return 0;
  1464. }
  1465. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  1466. struct snd_ctl_elem_value *ucontrol)
  1467. {
  1468. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1469. if (ch_num < 0) {
  1470. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1471. return ch_num;
  1472. }
  1473. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  1474. case SNDRV_PCM_FORMAT_S32_LE:
  1475. ucontrol->value.integer.value[0] = 3;
  1476. break;
  1477. case SNDRV_PCM_FORMAT_S24_3LE:
  1478. ucontrol->value.integer.value[0] = 2;
  1479. break;
  1480. case SNDRV_PCM_FORMAT_S24_LE:
  1481. ucontrol->value.integer.value[0] = 1;
  1482. break;
  1483. case SNDRV_PCM_FORMAT_S16_LE:
  1484. default:
  1485. ucontrol->value.integer.value[0] = 0;
  1486. break;
  1487. }
  1488. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1489. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1490. ucontrol->value.integer.value[0]);
  1491. return 0;
  1492. }
  1493. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  1494. struct snd_ctl_elem_value *ucontrol)
  1495. {
  1496. int rc = 0;
  1497. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1498. if (ch_num < 0) {
  1499. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1500. return ch_num;
  1501. }
  1502. switch (ucontrol->value.integer.value[0]) {
  1503. case 3:
  1504. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1505. break;
  1506. case 2:
  1507. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1508. break;
  1509. case 1:
  1510. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1511. break;
  1512. case 0:
  1513. default:
  1514. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1515. break;
  1516. }
  1517. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1518. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1519. ucontrol->value.integer.value[0]);
  1520. return rc;
  1521. }
  1522. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  1523. struct snd_ctl_elem_value *ucontrol)
  1524. {
  1525. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  1526. usb_rx_cfg.channels);
  1527. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  1528. return 0;
  1529. }
  1530. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  1531. struct snd_ctl_elem_value *ucontrol)
  1532. {
  1533. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1534. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  1535. return 1;
  1536. }
  1537. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1538. struct snd_ctl_elem_value *ucontrol)
  1539. {
  1540. int sample_rate_val;
  1541. switch (usb_rx_cfg.sample_rate) {
  1542. case SAMPLING_RATE_384KHZ:
  1543. sample_rate_val = 12;
  1544. break;
  1545. case SAMPLING_RATE_352P8KHZ:
  1546. sample_rate_val = 11;
  1547. break;
  1548. case SAMPLING_RATE_192KHZ:
  1549. sample_rate_val = 10;
  1550. break;
  1551. case SAMPLING_RATE_176P4KHZ:
  1552. sample_rate_val = 9;
  1553. break;
  1554. case SAMPLING_RATE_96KHZ:
  1555. sample_rate_val = 8;
  1556. break;
  1557. case SAMPLING_RATE_88P2KHZ:
  1558. sample_rate_val = 7;
  1559. break;
  1560. case SAMPLING_RATE_48KHZ:
  1561. sample_rate_val = 6;
  1562. break;
  1563. case SAMPLING_RATE_44P1KHZ:
  1564. sample_rate_val = 5;
  1565. break;
  1566. case SAMPLING_RATE_32KHZ:
  1567. sample_rate_val = 4;
  1568. break;
  1569. case SAMPLING_RATE_22P05KHZ:
  1570. sample_rate_val = 3;
  1571. break;
  1572. case SAMPLING_RATE_16KHZ:
  1573. sample_rate_val = 2;
  1574. break;
  1575. case SAMPLING_RATE_11P025KHZ:
  1576. sample_rate_val = 1;
  1577. break;
  1578. case SAMPLING_RATE_8KHZ:
  1579. default:
  1580. sample_rate_val = 0;
  1581. break;
  1582. }
  1583. ucontrol->value.integer.value[0] = sample_rate_val;
  1584. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  1585. usb_rx_cfg.sample_rate);
  1586. return 0;
  1587. }
  1588. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1589. struct snd_ctl_elem_value *ucontrol)
  1590. {
  1591. switch (ucontrol->value.integer.value[0]) {
  1592. case 12:
  1593. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1594. break;
  1595. case 11:
  1596. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1597. break;
  1598. case 10:
  1599. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1600. break;
  1601. case 9:
  1602. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1603. break;
  1604. case 8:
  1605. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1606. break;
  1607. case 7:
  1608. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1609. break;
  1610. case 6:
  1611. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1612. break;
  1613. case 5:
  1614. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1615. break;
  1616. case 4:
  1617. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1618. break;
  1619. case 3:
  1620. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1621. break;
  1622. case 2:
  1623. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1624. break;
  1625. case 1:
  1626. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1627. break;
  1628. case 0:
  1629. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1630. break;
  1631. default:
  1632. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1633. break;
  1634. }
  1635. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  1636. __func__, ucontrol->value.integer.value[0],
  1637. usb_rx_cfg.sample_rate);
  1638. return 0;
  1639. }
  1640. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  1641. struct snd_ctl_elem_value *ucontrol)
  1642. {
  1643. switch (usb_rx_cfg.bit_format) {
  1644. case SNDRV_PCM_FORMAT_S32_LE:
  1645. ucontrol->value.integer.value[0] = 3;
  1646. break;
  1647. case SNDRV_PCM_FORMAT_S24_3LE:
  1648. ucontrol->value.integer.value[0] = 2;
  1649. break;
  1650. case SNDRV_PCM_FORMAT_S24_LE:
  1651. ucontrol->value.integer.value[0] = 1;
  1652. break;
  1653. case SNDRV_PCM_FORMAT_S16_LE:
  1654. default:
  1655. ucontrol->value.integer.value[0] = 0;
  1656. break;
  1657. }
  1658. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1659. __func__, usb_rx_cfg.bit_format,
  1660. ucontrol->value.integer.value[0]);
  1661. return 0;
  1662. }
  1663. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  1664. struct snd_ctl_elem_value *ucontrol)
  1665. {
  1666. int rc = 0;
  1667. switch (ucontrol->value.integer.value[0]) {
  1668. case 3:
  1669. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1670. break;
  1671. case 2:
  1672. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1673. break;
  1674. case 1:
  1675. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1676. break;
  1677. case 0:
  1678. default:
  1679. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1680. break;
  1681. }
  1682. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1683. __func__, usb_rx_cfg.bit_format,
  1684. ucontrol->value.integer.value[0]);
  1685. return rc;
  1686. }
  1687. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  1688. struct snd_ctl_elem_value *ucontrol)
  1689. {
  1690. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  1691. usb_tx_cfg.channels);
  1692. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  1693. return 0;
  1694. }
  1695. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  1696. struct snd_ctl_elem_value *ucontrol)
  1697. {
  1698. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1699. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  1700. return 1;
  1701. }
  1702. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1703. struct snd_ctl_elem_value *ucontrol)
  1704. {
  1705. int sample_rate_val;
  1706. switch (usb_tx_cfg.sample_rate) {
  1707. case SAMPLING_RATE_384KHZ:
  1708. sample_rate_val = 12;
  1709. break;
  1710. case SAMPLING_RATE_352P8KHZ:
  1711. sample_rate_val = 11;
  1712. break;
  1713. case SAMPLING_RATE_192KHZ:
  1714. sample_rate_val = 10;
  1715. break;
  1716. case SAMPLING_RATE_176P4KHZ:
  1717. sample_rate_val = 9;
  1718. break;
  1719. case SAMPLING_RATE_96KHZ:
  1720. sample_rate_val = 8;
  1721. break;
  1722. case SAMPLING_RATE_88P2KHZ:
  1723. sample_rate_val = 7;
  1724. break;
  1725. case SAMPLING_RATE_48KHZ:
  1726. sample_rate_val = 6;
  1727. break;
  1728. case SAMPLING_RATE_44P1KHZ:
  1729. sample_rate_val = 5;
  1730. break;
  1731. case SAMPLING_RATE_32KHZ:
  1732. sample_rate_val = 4;
  1733. break;
  1734. case SAMPLING_RATE_22P05KHZ:
  1735. sample_rate_val = 3;
  1736. break;
  1737. case SAMPLING_RATE_16KHZ:
  1738. sample_rate_val = 2;
  1739. break;
  1740. case SAMPLING_RATE_11P025KHZ:
  1741. sample_rate_val = 1;
  1742. break;
  1743. case SAMPLING_RATE_8KHZ:
  1744. sample_rate_val = 0;
  1745. break;
  1746. default:
  1747. sample_rate_val = 6;
  1748. break;
  1749. }
  1750. ucontrol->value.integer.value[0] = sample_rate_val;
  1751. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  1752. usb_tx_cfg.sample_rate);
  1753. return 0;
  1754. }
  1755. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1756. struct snd_ctl_elem_value *ucontrol)
  1757. {
  1758. switch (ucontrol->value.integer.value[0]) {
  1759. case 12:
  1760. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1761. break;
  1762. case 11:
  1763. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1764. break;
  1765. case 10:
  1766. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1767. break;
  1768. case 9:
  1769. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1770. break;
  1771. case 8:
  1772. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1773. break;
  1774. case 7:
  1775. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1776. break;
  1777. case 6:
  1778. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1779. break;
  1780. case 5:
  1781. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1782. break;
  1783. case 4:
  1784. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1785. break;
  1786. case 3:
  1787. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1788. break;
  1789. case 2:
  1790. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1791. break;
  1792. case 1:
  1793. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1794. break;
  1795. case 0:
  1796. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1797. break;
  1798. default:
  1799. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1800. break;
  1801. }
  1802. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  1803. __func__, ucontrol->value.integer.value[0],
  1804. usb_tx_cfg.sample_rate);
  1805. return 0;
  1806. }
  1807. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  1808. struct snd_ctl_elem_value *ucontrol)
  1809. {
  1810. switch (usb_tx_cfg.bit_format) {
  1811. case SNDRV_PCM_FORMAT_S32_LE:
  1812. ucontrol->value.integer.value[0] = 3;
  1813. break;
  1814. case SNDRV_PCM_FORMAT_S24_3LE:
  1815. ucontrol->value.integer.value[0] = 2;
  1816. break;
  1817. case SNDRV_PCM_FORMAT_S24_LE:
  1818. ucontrol->value.integer.value[0] = 1;
  1819. break;
  1820. case SNDRV_PCM_FORMAT_S16_LE:
  1821. default:
  1822. ucontrol->value.integer.value[0] = 0;
  1823. break;
  1824. }
  1825. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1826. __func__, usb_tx_cfg.bit_format,
  1827. ucontrol->value.integer.value[0]);
  1828. return 0;
  1829. }
  1830. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  1831. struct snd_ctl_elem_value *ucontrol)
  1832. {
  1833. int rc = 0;
  1834. switch (ucontrol->value.integer.value[0]) {
  1835. case 3:
  1836. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1837. break;
  1838. case 2:
  1839. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1840. break;
  1841. case 1:
  1842. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1843. break;
  1844. case 0:
  1845. default:
  1846. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1847. break;
  1848. }
  1849. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1850. __func__, usb_tx_cfg.bit_format,
  1851. ucontrol->value.integer.value[0]);
  1852. return rc;
  1853. }
  1854. static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
  1855. {
  1856. int idx;
  1857. if (strnstr(kcontrol->id.name, "Display Port RX",
  1858. sizeof("Display Port RX"))) {
  1859. idx = DP_RX_IDX;
  1860. } else {
  1861. pr_err("%s: unsupported BE: %s\n",
  1862. __func__, kcontrol->id.name);
  1863. idx = -EINVAL;
  1864. }
  1865. return idx;
  1866. }
  1867. static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
  1868. struct snd_ctl_elem_value *ucontrol)
  1869. {
  1870. int idx = ext_disp_get_port_idx(kcontrol);
  1871. if (idx < 0)
  1872. return idx;
  1873. switch (ext_disp_rx_cfg[idx].bit_format) {
  1874. case SNDRV_PCM_FORMAT_S24_3LE:
  1875. ucontrol->value.integer.value[0] = 2;
  1876. break;
  1877. case SNDRV_PCM_FORMAT_S24_LE:
  1878. ucontrol->value.integer.value[0] = 1;
  1879. break;
  1880. case SNDRV_PCM_FORMAT_S16_LE:
  1881. default:
  1882. ucontrol->value.integer.value[0] = 0;
  1883. break;
  1884. }
  1885. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  1886. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  1887. ucontrol->value.integer.value[0]);
  1888. return 0;
  1889. }
  1890. static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
  1891. struct snd_ctl_elem_value *ucontrol)
  1892. {
  1893. int idx = ext_disp_get_port_idx(kcontrol);
  1894. if (idx < 0)
  1895. return idx;
  1896. switch (ucontrol->value.integer.value[0]) {
  1897. case 2:
  1898. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1899. break;
  1900. case 1:
  1901. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1902. break;
  1903. case 0:
  1904. default:
  1905. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1906. break;
  1907. }
  1908. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  1909. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  1910. ucontrol->value.integer.value[0]);
  1911. return 0;
  1912. }
  1913. static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
  1914. struct snd_ctl_elem_value *ucontrol)
  1915. {
  1916. int idx = ext_disp_get_port_idx(kcontrol);
  1917. if (idx < 0)
  1918. return idx;
  1919. ucontrol->value.integer.value[0] =
  1920. ext_disp_rx_cfg[idx].channels - 2;
  1921. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  1922. idx, ext_disp_rx_cfg[idx].channels);
  1923. return 0;
  1924. }
  1925. static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
  1926. struct snd_ctl_elem_value *ucontrol)
  1927. {
  1928. int idx = ext_disp_get_port_idx(kcontrol);
  1929. if (idx < 0)
  1930. return idx;
  1931. ext_disp_rx_cfg[idx].channels =
  1932. ucontrol->value.integer.value[0] + 2;
  1933. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  1934. idx, ext_disp_rx_cfg[idx].channels);
  1935. return 1;
  1936. }
  1937. static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1938. struct snd_ctl_elem_value *ucontrol)
  1939. {
  1940. int sample_rate_val;
  1941. int idx = ext_disp_get_port_idx(kcontrol);
  1942. if (idx < 0)
  1943. return idx;
  1944. switch (ext_disp_rx_cfg[idx].sample_rate) {
  1945. case SAMPLING_RATE_176P4KHZ:
  1946. sample_rate_val = 6;
  1947. break;
  1948. case SAMPLING_RATE_88P2KHZ:
  1949. sample_rate_val = 5;
  1950. break;
  1951. case SAMPLING_RATE_44P1KHZ:
  1952. sample_rate_val = 4;
  1953. break;
  1954. case SAMPLING_RATE_32KHZ:
  1955. sample_rate_val = 3;
  1956. break;
  1957. case SAMPLING_RATE_192KHZ:
  1958. sample_rate_val = 2;
  1959. break;
  1960. case SAMPLING_RATE_96KHZ:
  1961. sample_rate_val = 1;
  1962. break;
  1963. case SAMPLING_RATE_48KHZ:
  1964. default:
  1965. sample_rate_val = 0;
  1966. break;
  1967. }
  1968. ucontrol->value.integer.value[0] = sample_rate_val;
  1969. pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
  1970. idx, ext_disp_rx_cfg[idx].sample_rate);
  1971. return 0;
  1972. }
  1973. static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1974. struct snd_ctl_elem_value *ucontrol)
  1975. {
  1976. int idx = ext_disp_get_port_idx(kcontrol);
  1977. if (idx < 0)
  1978. return idx;
  1979. switch (ucontrol->value.integer.value[0]) {
  1980. case 6:
  1981. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
  1982. break;
  1983. case 5:
  1984. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
  1985. break;
  1986. case 4:
  1987. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
  1988. break;
  1989. case 3:
  1990. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
  1991. break;
  1992. case 2:
  1993. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
  1994. break;
  1995. case 1:
  1996. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
  1997. break;
  1998. case 0:
  1999. default:
  2000. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
  2001. break;
  2002. }
  2003. pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
  2004. __func__, ucontrol->value.integer.value[0], idx,
  2005. ext_disp_rx_cfg[idx].sample_rate);
  2006. return 0;
  2007. }
  2008. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  2009. struct snd_ctl_elem_value *ucontrol)
  2010. {
  2011. pr_debug("%s: proxy_rx channels = %d\n",
  2012. __func__, proxy_rx_cfg.channels);
  2013. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  2014. return 0;
  2015. }
  2016. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  2017. struct snd_ctl_elem_value *ucontrol)
  2018. {
  2019. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  2020. pr_debug("%s: proxy_rx channels = %d\n",
  2021. __func__, proxy_rx_cfg.channels);
  2022. return 1;
  2023. }
  2024. static int tdm_get_sample_rate(int value)
  2025. {
  2026. int sample_rate = 0;
  2027. switch (value) {
  2028. case 0:
  2029. sample_rate = SAMPLING_RATE_8KHZ;
  2030. break;
  2031. case 1:
  2032. sample_rate = SAMPLING_RATE_16KHZ;
  2033. break;
  2034. case 2:
  2035. sample_rate = SAMPLING_RATE_32KHZ;
  2036. break;
  2037. case 3:
  2038. sample_rate = SAMPLING_RATE_48KHZ;
  2039. break;
  2040. case 4:
  2041. sample_rate = SAMPLING_RATE_176P4KHZ;
  2042. break;
  2043. case 5:
  2044. sample_rate = SAMPLING_RATE_352P8KHZ;
  2045. break;
  2046. default:
  2047. sample_rate = SAMPLING_RATE_48KHZ;
  2048. break;
  2049. }
  2050. return sample_rate;
  2051. }
  2052. static int aux_pcm_get_sample_rate(int value)
  2053. {
  2054. int sample_rate;
  2055. switch (value) {
  2056. case 1:
  2057. sample_rate = SAMPLING_RATE_16KHZ;
  2058. break;
  2059. case 0:
  2060. default:
  2061. sample_rate = SAMPLING_RATE_8KHZ;
  2062. break;
  2063. }
  2064. return sample_rate;
  2065. }
  2066. static int tdm_get_sample_rate_val(int sample_rate)
  2067. {
  2068. int sample_rate_val = 0;
  2069. switch (sample_rate) {
  2070. case SAMPLING_RATE_8KHZ:
  2071. sample_rate_val = 0;
  2072. break;
  2073. case SAMPLING_RATE_16KHZ:
  2074. sample_rate_val = 1;
  2075. break;
  2076. case SAMPLING_RATE_32KHZ:
  2077. sample_rate_val = 2;
  2078. break;
  2079. case SAMPLING_RATE_48KHZ:
  2080. sample_rate_val = 3;
  2081. break;
  2082. case SAMPLING_RATE_176P4KHZ:
  2083. sample_rate_val = 4;
  2084. break;
  2085. case SAMPLING_RATE_352P8KHZ:
  2086. sample_rate_val = 5;
  2087. break;
  2088. default:
  2089. sample_rate_val = 3;
  2090. break;
  2091. }
  2092. return sample_rate_val;
  2093. }
  2094. static int aux_pcm_get_sample_rate_val(int sample_rate)
  2095. {
  2096. int sample_rate_val;
  2097. switch (sample_rate) {
  2098. case SAMPLING_RATE_16KHZ:
  2099. sample_rate_val = 1;
  2100. break;
  2101. case SAMPLING_RATE_8KHZ:
  2102. default:
  2103. sample_rate_val = 0;
  2104. break;
  2105. }
  2106. return sample_rate_val;
  2107. }
  2108. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  2109. struct tdm_port *port)
  2110. {
  2111. if (port) {
  2112. if (strnstr(kcontrol->id.name, "PRI",
  2113. sizeof(kcontrol->id.name))) {
  2114. port->mode = TDM_PRI;
  2115. } else if (strnstr(kcontrol->id.name, "SEC",
  2116. sizeof(kcontrol->id.name))) {
  2117. port->mode = TDM_SEC;
  2118. } else if (strnstr(kcontrol->id.name, "TERT",
  2119. sizeof(kcontrol->id.name))) {
  2120. port->mode = TDM_TERT;
  2121. } else if (strnstr(kcontrol->id.name, "QUAT",
  2122. sizeof(kcontrol->id.name))) {
  2123. port->mode = TDM_QUAT;
  2124. } else if (strnstr(kcontrol->id.name, "QUIN",
  2125. sizeof(kcontrol->id.name))) {
  2126. port->mode = TDM_QUIN;
  2127. } else {
  2128. pr_err("%s: unsupported mode in: %s\n",
  2129. __func__, kcontrol->id.name);
  2130. return -EINVAL;
  2131. }
  2132. if (strnstr(kcontrol->id.name, "RX_0",
  2133. sizeof(kcontrol->id.name)) ||
  2134. strnstr(kcontrol->id.name, "TX_0",
  2135. sizeof(kcontrol->id.name))) {
  2136. port->channel = TDM_0;
  2137. } else if (strnstr(kcontrol->id.name, "RX_1",
  2138. sizeof(kcontrol->id.name)) ||
  2139. strnstr(kcontrol->id.name, "TX_1",
  2140. sizeof(kcontrol->id.name))) {
  2141. port->channel = TDM_1;
  2142. } else if (strnstr(kcontrol->id.name, "RX_2",
  2143. sizeof(kcontrol->id.name)) ||
  2144. strnstr(kcontrol->id.name, "TX_2",
  2145. sizeof(kcontrol->id.name))) {
  2146. port->channel = TDM_2;
  2147. } else if (strnstr(kcontrol->id.name, "RX_3",
  2148. sizeof(kcontrol->id.name)) ||
  2149. strnstr(kcontrol->id.name, "TX_3",
  2150. sizeof(kcontrol->id.name))) {
  2151. port->channel = TDM_3;
  2152. } else if (strnstr(kcontrol->id.name, "RX_4",
  2153. sizeof(kcontrol->id.name)) ||
  2154. strnstr(kcontrol->id.name, "TX_4",
  2155. sizeof(kcontrol->id.name))) {
  2156. port->channel = TDM_4;
  2157. } else if (strnstr(kcontrol->id.name, "RX_5",
  2158. sizeof(kcontrol->id.name)) ||
  2159. strnstr(kcontrol->id.name, "TX_5",
  2160. sizeof(kcontrol->id.name))) {
  2161. port->channel = TDM_5;
  2162. } else if (strnstr(kcontrol->id.name, "RX_6",
  2163. sizeof(kcontrol->id.name)) ||
  2164. strnstr(kcontrol->id.name, "TX_6",
  2165. sizeof(kcontrol->id.name))) {
  2166. port->channel = TDM_6;
  2167. } else if (strnstr(kcontrol->id.name, "RX_7",
  2168. sizeof(kcontrol->id.name)) ||
  2169. strnstr(kcontrol->id.name, "TX_7",
  2170. sizeof(kcontrol->id.name))) {
  2171. port->channel = TDM_7;
  2172. } else {
  2173. pr_err("%s: unsupported channel in: %s\n",
  2174. __func__, kcontrol->id.name);
  2175. return -EINVAL;
  2176. }
  2177. } else {
  2178. return -EINVAL;
  2179. }
  2180. return 0;
  2181. }
  2182. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2183. struct snd_ctl_elem_value *ucontrol)
  2184. {
  2185. struct tdm_port port;
  2186. int ret = tdm_get_port_idx(kcontrol, &port);
  2187. if (ret) {
  2188. pr_err("%s: unsupported control: %s\n",
  2189. __func__, kcontrol->id.name);
  2190. } else {
  2191. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2192. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  2193. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2194. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2195. ucontrol->value.enumerated.item[0]);
  2196. }
  2197. return ret;
  2198. }
  2199. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2200. struct snd_ctl_elem_value *ucontrol)
  2201. {
  2202. struct tdm_port port;
  2203. int ret = tdm_get_port_idx(kcontrol, &port);
  2204. if (ret) {
  2205. pr_err("%s: unsupported control: %s\n",
  2206. __func__, kcontrol->id.name);
  2207. } else {
  2208. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  2209. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2210. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2211. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2212. ucontrol->value.enumerated.item[0]);
  2213. }
  2214. return ret;
  2215. }
  2216. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2217. struct snd_ctl_elem_value *ucontrol)
  2218. {
  2219. struct tdm_port port;
  2220. int ret = tdm_get_port_idx(kcontrol, &port);
  2221. if (ret) {
  2222. pr_err("%s: unsupported control: %s\n",
  2223. __func__, kcontrol->id.name);
  2224. } else {
  2225. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2226. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  2227. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2228. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2229. ucontrol->value.enumerated.item[0]);
  2230. }
  2231. return ret;
  2232. }
  2233. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2234. struct snd_ctl_elem_value *ucontrol)
  2235. {
  2236. struct tdm_port port;
  2237. int ret = tdm_get_port_idx(kcontrol, &port);
  2238. if (ret) {
  2239. pr_err("%s: unsupported control: %s\n",
  2240. __func__, kcontrol->id.name);
  2241. } else {
  2242. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  2243. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2244. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2245. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2246. ucontrol->value.enumerated.item[0]);
  2247. }
  2248. return ret;
  2249. }
  2250. static int tdm_get_format(int value)
  2251. {
  2252. int format = 0;
  2253. switch (value) {
  2254. case 0:
  2255. format = SNDRV_PCM_FORMAT_S16_LE;
  2256. break;
  2257. case 1:
  2258. format = SNDRV_PCM_FORMAT_S24_LE;
  2259. break;
  2260. case 2:
  2261. format = SNDRV_PCM_FORMAT_S32_LE;
  2262. break;
  2263. default:
  2264. format = SNDRV_PCM_FORMAT_S16_LE;
  2265. break;
  2266. }
  2267. return format;
  2268. }
  2269. static int tdm_get_format_val(int format)
  2270. {
  2271. int value = 0;
  2272. switch (format) {
  2273. case SNDRV_PCM_FORMAT_S16_LE:
  2274. value = 0;
  2275. break;
  2276. case SNDRV_PCM_FORMAT_S24_LE:
  2277. value = 1;
  2278. break;
  2279. case SNDRV_PCM_FORMAT_S32_LE:
  2280. value = 2;
  2281. break;
  2282. default:
  2283. value = 0;
  2284. break;
  2285. }
  2286. return value;
  2287. }
  2288. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  2289. struct snd_ctl_elem_value *ucontrol)
  2290. {
  2291. struct tdm_port port;
  2292. int ret = tdm_get_port_idx(kcontrol, &port);
  2293. if (ret) {
  2294. pr_err("%s: unsupported control: %s\n",
  2295. __func__, kcontrol->id.name);
  2296. } else {
  2297. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2298. tdm_rx_cfg[port.mode][port.channel].bit_format);
  2299. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2300. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2301. ucontrol->value.enumerated.item[0]);
  2302. }
  2303. return ret;
  2304. }
  2305. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  2306. struct snd_ctl_elem_value *ucontrol)
  2307. {
  2308. struct tdm_port port;
  2309. int ret = tdm_get_port_idx(kcontrol, &port);
  2310. if (ret) {
  2311. pr_err("%s: unsupported control: %s\n",
  2312. __func__, kcontrol->id.name);
  2313. } else {
  2314. tdm_rx_cfg[port.mode][port.channel].bit_format =
  2315. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2316. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2317. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2318. ucontrol->value.enumerated.item[0]);
  2319. }
  2320. return ret;
  2321. }
  2322. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  2323. struct snd_ctl_elem_value *ucontrol)
  2324. {
  2325. struct tdm_port port;
  2326. int ret = tdm_get_port_idx(kcontrol, &port);
  2327. if (ret) {
  2328. pr_err("%s: unsupported control: %s\n",
  2329. __func__, kcontrol->id.name);
  2330. } else {
  2331. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2332. tdm_tx_cfg[port.mode][port.channel].bit_format);
  2333. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2334. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2335. ucontrol->value.enumerated.item[0]);
  2336. }
  2337. return ret;
  2338. }
  2339. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  2340. struct snd_ctl_elem_value *ucontrol)
  2341. {
  2342. struct tdm_port port;
  2343. int ret = tdm_get_port_idx(kcontrol, &port);
  2344. if (ret) {
  2345. pr_err("%s: unsupported control: %s\n",
  2346. __func__, kcontrol->id.name);
  2347. } else {
  2348. tdm_tx_cfg[port.mode][port.channel].bit_format =
  2349. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2350. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2351. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2352. ucontrol->value.enumerated.item[0]);
  2353. }
  2354. return ret;
  2355. }
  2356. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  2357. struct snd_ctl_elem_value *ucontrol)
  2358. {
  2359. struct tdm_port port;
  2360. int ret = tdm_get_port_idx(kcontrol, &port);
  2361. if (ret) {
  2362. pr_err("%s: unsupported control: %s\n",
  2363. __func__, kcontrol->id.name);
  2364. } else {
  2365. ucontrol->value.enumerated.item[0] =
  2366. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  2367. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2368. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  2369. ucontrol->value.enumerated.item[0]);
  2370. }
  2371. return ret;
  2372. }
  2373. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  2374. struct snd_ctl_elem_value *ucontrol)
  2375. {
  2376. struct tdm_port port;
  2377. int ret = tdm_get_port_idx(kcontrol, &port);
  2378. if (ret) {
  2379. pr_err("%s: unsupported control: %s\n",
  2380. __func__, kcontrol->id.name);
  2381. } else {
  2382. tdm_rx_cfg[port.mode][port.channel].channels =
  2383. ucontrol->value.enumerated.item[0] + 1;
  2384. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2385. tdm_rx_cfg[port.mode][port.channel].channels,
  2386. ucontrol->value.enumerated.item[0] + 1);
  2387. }
  2388. return ret;
  2389. }
  2390. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  2391. struct snd_ctl_elem_value *ucontrol)
  2392. {
  2393. struct tdm_port port;
  2394. int ret = tdm_get_port_idx(kcontrol, &port);
  2395. if (ret) {
  2396. pr_err("%s: unsupported control: %s\n",
  2397. __func__, kcontrol->id.name);
  2398. } else {
  2399. ucontrol->value.enumerated.item[0] =
  2400. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  2401. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2402. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  2403. ucontrol->value.enumerated.item[0]);
  2404. }
  2405. return ret;
  2406. }
  2407. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  2408. struct snd_ctl_elem_value *ucontrol)
  2409. {
  2410. struct tdm_port port;
  2411. int ret = tdm_get_port_idx(kcontrol, &port);
  2412. if (ret) {
  2413. pr_err("%s: unsupported control: %s\n",
  2414. __func__, kcontrol->id.name);
  2415. } else {
  2416. tdm_tx_cfg[port.mode][port.channel].channels =
  2417. ucontrol->value.enumerated.item[0] + 1;
  2418. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2419. tdm_tx_cfg[port.mode][port.channel].channels,
  2420. ucontrol->value.enumerated.item[0] + 1);
  2421. }
  2422. return ret;
  2423. }
  2424. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  2425. {
  2426. int idx;
  2427. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  2428. sizeof("PRIM_AUX_PCM"))) {
  2429. idx = PRIM_AUX_PCM;
  2430. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  2431. sizeof("SEC_AUX_PCM"))) {
  2432. idx = SEC_AUX_PCM;
  2433. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  2434. sizeof("TERT_AUX_PCM"))) {
  2435. idx = TERT_AUX_PCM;
  2436. } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
  2437. sizeof("QUAT_AUX_PCM"))) {
  2438. idx = QUAT_AUX_PCM;
  2439. } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
  2440. sizeof("QUIN_AUX_PCM"))) {
  2441. idx = QUIN_AUX_PCM;
  2442. } else {
  2443. pr_err("%s: unsupported port: %s\n",
  2444. __func__, kcontrol->id.name);
  2445. idx = -EINVAL;
  2446. }
  2447. return idx;
  2448. }
  2449. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2450. struct snd_ctl_elem_value *ucontrol)
  2451. {
  2452. int idx = aux_pcm_get_port_idx(kcontrol);
  2453. if (idx < 0)
  2454. return idx;
  2455. aux_pcm_rx_cfg[idx].sample_rate =
  2456. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2457. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2458. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2459. ucontrol->value.enumerated.item[0]);
  2460. return 0;
  2461. }
  2462. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2463. struct snd_ctl_elem_value *ucontrol)
  2464. {
  2465. int idx = aux_pcm_get_port_idx(kcontrol);
  2466. if (idx < 0)
  2467. return idx;
  2468. ucontrol->value.enumerated.item[0] =
  2469. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  2470. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2471. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2472. ucontrol->value.enumerated.item[0]);
  2473. return 0;
  2474. }
  2475. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2476. struct snd_ctl_elem_value *ucontrol)
  2477. {
  2478. int idx = aux_pcm_get_port_idx(kcontrol);
  2479. if (idx < 0)
  2480. return idx;
  2481. aux_pcm_tx_cfg[idx].sample_rate =
  2482. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2483. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2484. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2485. ucontrol->value.enumerated.item[0]);
  2486. return 0;
  2487. }
  2488. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2489. struct snd_ctl_elem_value *ucontrol)
  2490. {
  2491. int idx = aux_pcm_get_port_idx(kcontrol);
  2492. if (idx < 0)
  2493. return idx;
  2494. ucontrol->value.enumerated.item[0] =
  2495. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  2496. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2497. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2498. ucontrol->value.enumerated.item[0]);
  2499. return 0;
  2500. }
  2501. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  2502. {
  2503. int idx;
  2504. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  2505. sizeof("PRIM_MI2S_RX"))) {
  2506. idx = PRIM_MI2S;
  2507. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  2508. sizeof("SEC_MI2S_RX"))) {
  2509. idx = SEC_MI2S;
  2510. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  2511. sizeof("TERT_MI2S_RX"))) {
  2512. idx = TERT_MI2S;
  2513. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
  2514. sizeof("QUAT_MI2S_RX"))) {
  2515. idx = QUAT_MI2S;
  2516. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
  2517. sizeof("QUIN_MI2S_RX"))) {
  2518. idx = QUIN_MI2S;
  2519. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  2520. sizeof("PRIM_MI2S_TX"))) {
  2521. idx = PRIM_MI2S;
  2522. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  2523. sizeof("SEC_MI2S_TX"))) {
  2524. idx = SEC_MI2S;
  2525. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  2526. sizeof("TERT_MI2S_TX"))) {
  2527. idx = TERT_MI2S;
  2528. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
  2529. sizeof("QUAT_MI2S_TX"))) {
  2530. idx = QUAT_MI2S;
  2531. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
  2532. sizeof("QUIN_MI2S_TX"))) {
  2533. idx = QUIN_MI2S;
  2534. } else {
  2535. pr_err("%s: unsupported channel: %s\n",
  2536. __func__, kcontrol->id.name);
  2537. idx = -EINVAL;
  2538. }
  2539. return idx;
  2540. }
  2541. static int mi2s_get_sample_rate_val(int sample_rate)
  2542. {
  2543. int sample_rate_val;
  2544. switch (sample_rate) {
  2545. case SAMPLING_RATE_8KHZ:
  2546. sample_rate_val = 0;
  2547. break;
  2548. case SAMPLING_RATE_11P025KHZ:
  2549. sample_rate_val = 1;
  2550. break;
  2551. case SAMPLING_RATE_16KHZ:
  2552. sample_rate_val = 2;
  2553. break;
  2554. case SAMPLING_RATE_22P05KHZ:
  2555. sample_rate_val = 3;
  2556. break;
  2557. case SAMPLING_RATE_32KHZ:
  2558. sample_rate_val = 4;
  2559. break;
  2560. case SAMPLING_RATE_44P1KHZ:
  2561. sample_rate_val = 5;
  2562. break;
  2563. case SAMPLING_RATE_48KHZ:
  2564. sample_rate_val = 6;
  2565. break;
  2566. case SAMPLING_RATE_96KHZ:
  2567. sample_rate_val = 7;
  2568. break;
  2569. case SAMPLING_RATE_192KHZ:
  2570. sample_rate_val = 8;
  2571. break;
  2572. default:
  2573. sample_rate_val = 6;
  2574. break;
  2575. }
  2576. return sample_rate_val;
  2577. }
  2578. static int mi2s_get_sample_rate(int value)
  2579. {
  2580. int sample_rate;
  2581. switch (value) {
  2582. case 0:
  2583. sample_rate = SAMPLING_RATE_8KHZ;
  2584. break;
  2585. case 1:
  2586. sample_rate = SAMPLING_RATE_11P025KHZ;
  2587. break;
  2588. case 2:
  2589. sample_rate = SAMPLING_RATE_16KHZ;
  2590. break;
  2591. case 3:
  2592. sample_rate = SAMPLING_RATE_22P05KHZ;
  2593. break;
  2594. case 4:
  2595. sample_rate = SAMPLING_RATE_32KHZ;
  2596. break;
  2597. case 5:
  2598. sample_rate = SAMPLING_RATE_44P1KHZ;
  2599. break;
  2600. case 6:
  2601. sample_rate = SAMPLING_RATE_48KHZ;
  2602. break;
  2603. case 7:
  2604. sample_rate = SAMPLING_RATE_96KHZ;
  2605. break;
  2606. case 8:
  2607. sample_rate = SAMPLING_RATE_192KHZ;
  2608. break;
  2609. default:
  2610. sample_rate = SAMPLING_RATE_48KHZ;
  2611. break;
  2612. }
  2613. return sample_rate;
  2614. }
  2615. static int mi2s_auxpcm_get_format(int value)
  2616. {
  2617. int format;
  2618. switch (value) {
  2619. case 0:
  2620. format = SNDRV_PCM_FORMAT_S16_LE;
  2621. break;
  2622. case 1:
  2623. format = SNDRV_PCM_FORMAT_S24_LE;
  2624. break;
  2625. case 2:
  2626. format = SNDRV_PCM_FORMAT_S24_3LE;
  2627. break;
  2628. case 3:
  2629. format = SNDRV_PCM_FORMAT_S32_LE;
  2630. break;
  2631. default:
  2632. format = SNDRV_PCM_FORMAT_S16_LE;
  2633. break;
  2634. }
  2635. return format;
  2636. }
  2637. static int mi2s_auxpcm_get_format_value(int format)
  2638. {
  2639. int value;
  2640. switch (format) {
  2641. case SNDRV_PCM_FORMAT_S16_LE:
  2642. value = 0;
  2643. break;
  2644. case SNDRV_PCM_FORMAT_S24_LE:
  2645. value = 1;
  2646. break;
  2647. case SNDRV_PCM_FORMAT_S24_3LE:
  2648. value = 2;
  2649. break;
  2650. case SNDRV_PCM_FORMAT_S32_LE:
  2651. value = 3;
  2652. break;
  2653. default:
  2654. value = 0;
  2655. break;
  2656. }
  2657. return value;
  2658. }
  2659. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2660. struct snd_ctl_elem_value *ucontrol)
  2661. {
  2662. int idx = mi2s_get_port_idx(kcontrol);
  2663. if (idx < 0)
  2664. return idx;
  2665. mi2s_rx_cfg[idx].sample_rate =
  2666. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2667. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2668. idx, mi2s_rx_cfg[idx].sample_rate,
  2669. ucontrol->value.enumerated.item[0]);
  2670. return 0;
  2671. }
  2672. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2673. struct snd_ctl_elem_value *ucontrol)
  2674. {
  2675. int idx = mi2s_get_port_idx(kcontrol);
  2676. if (idx < 0)
  2677. return idx;
  2678. ucontrol->value.enumerated.item[0] =
  2679. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  2680. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2681. idx, mi2s_rx_cfg[idx].sample_rate,
  2682. ucontrol->value.enumerated.item[0]);
  2683. return 0;
  2684. }
  2685. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2686. struct snd_ctl_elem_value *ucontrol)
  2687. {
  2688. int idx = mi2s_get_port_idx(kcontrol);
  2689. if (idx < 0)
  2690. return idx;
  2691. mi2s_tx_cfg[idx].sample_rate =
  2692. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2693. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2694. idx, mi2s_tx_cfg[idx].sample_rate,
  2695. ucontrol->value.enumerated.item[0]);
  2696. return 0;
  2697. }
  2698. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2699. struct snd_ctl_elem_value *ucontrol)
  2700. {
  2701. int idx = mi2s_get_port_idx(kcontrol);
  2702. if (idx < 0)
  2703. return idx;
  2704. ucontrol->value.enumerated.item[0] =
  2705. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  2706. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2707. idx, mi2s_tx_cfg[idx].sample_rate,
  2708. ucontrol->value.enumerated.item[0]);
  2709. return 0;
  2710. }
  2711. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  2712. struct snd_ctl_elem_value *ucontrol)
  2713. {
  2714. int idx = mi2s_get_port_idx(kcontrol);
  2715. if (idx < 0)
  2716. return idx;
  2717. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2718. idx, mi2s_rx_cfg[idx].channels);
  2719. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  2720. return 0;
  2721. }
  2722. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  2723. struct snd_ctl_elem_value *ucontrol)
  2724. {
  2725. int idx = mi2s_get_port_idx(kcontrol);
  2726. if (idx < 0)
  2727. return idx;
  2728. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2729. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2730. idx, mi2s_rx_cfg[idx].channels);
  2731. return 1;
  2732. }
  2733. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  2734. struct snd_ctl_elem_value *ucontrol)
  2735. {
  2736. int idx = mi2s_get_port_idx(kcontrol);
  2737. if (idx < 0)
  2738. return idx;
  2739. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2740. idx, mi2s_tx_cfg[idx].channels);
  2741. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  2742. return 0;
  2743. }
  2744. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  2745. struct snd_ctl_elem_value *ucontrol)
  2746. {
  2747. int idx = mi2s_get_port_idx(kcontrol);
  2748. if (idx < 0)
  2749. return idx;
  2750. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2751. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2752. idx, mi2s_tx_cfg[idx].channels);
  2753. return 1;
  2754. }
  2755. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  2756. struct snd_ctl_elem_value *ucontrol)
  2757. {
  2758. int idx = mi2s_get_port_idx(kcontrol);
  2759. if (idx < 0)
  2760. return idx;
  2761. ucontrol->value.enumerated.item[0] =
  2762. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  2763. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2764. idx, mi2s_rx_cfg[idx].bit_format,
  2765. ucontrol->value.enumerated.item[0]);
  2766. return 0;
  2767. }
  2768. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  2769. struct snd_ctl_elem_value *ucontrol)
  2770. {
  2771. int idx = mi2s_get_port_idx(kcontrol);
  2772. if (idx < 0)
  2773. return idx;
  2774. mi2s_rx_cfg[idx].bit_format =
  2775. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2776. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2777. idx, mi2s_rx_cfg[idx].bit_format,
  2778. ucontrol->value.enumerated.item[0]);
  2779. return 0;
  2780. }
  2781. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  2782. struct snd_ctl_elem_value *ucontrol)
  2783. {
  2784. int idx = mi2s_get_port_idx(kcontrol);
  2785. if (idx < 0)
  2786. return idx;
  2787. ucontrol->value.enumerated.item[0] =
  2788. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  2789. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2790. idx, mi2s_tx_cfg[idx].bit_format,
  2791. ucontrol->value.enumerated.item[0]);
  2792. return 0;
  2793. }
  2794. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  2795. struct snd_ctl_elem_value *ucontrol)
  2796. {
  2797. int idx = mi2s_get_port_idx(kcontrol);
  2798. if (idx < 0)
  2799. return idx;
  2800. mi2s_tx_cfg[idx].bit_format =
  2801. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2802. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2803. idx, mi2s_tx_cfg[idx].bit_format,
  2804. ucontrol->value.enumerated.item[0]);
  2805. return 0;
  2806. }
  2807. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  2808. struct snd_ctl_elem_value *ucontrol)
  2809. {
  2810. int idx = aux_pcm_get_port_idx(kcontrol);
  2811. if (idx < 0)
  2812. return idx;
  2813. ucontrol->value.enumerated.item[0] =
  2814. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  2815. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2816. idx, aux_pcm_rx_cfg[idx].bit_format,
  2817. ucontrol->value.enumerated.item[0]);
  2818. return 0;
  2819. }
  2820. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  2821. struct snd_ctl_elem_value *ucontrol)
  2822. {
  2823. int idx = aux_pcm_get_port_idx(kcontrol);
  2824. if (idx < 0)
  2825. return idx;
  2826. aux_pcm_rx_cfg[idx].bit_format =
  2827. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2828. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2829. idx, aux_pcm_rx_cfg[idx].bit_format,
  2830. ucontrol->value.enumerated.item[0]);
  2831. return 0;
  2832. }
  2833. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  2834. struct snd_ctl_elem_value *ucontrol)
  2835. {
  2836. int idx = aux_pcm_get_port_idx(kcontrol);
  2837. if (idx < 0)
  2838. return idx;
  2839. ucontrol->value.enumerated.item[0] =
  2840. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  2841. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2842. idx, aux_pcm_tx_cfg[idx].bit_format,
  2843. ucontrol->value.enumerated.item[0]);
  2844. return 0;
  2845. }
  2846. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  2847. struct snd_ctl_elem_value *ucontrol)
  2848. {
  2849. int idx = aux_pcm_get_port_idx(kcontrol);
  2850. if (idx < 0)
  2851. return idx;
  2852. aux_pcm_tx_cfg[idx].bit_format =
  2853. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2854. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2855. idx, aux_pcm_tx_cfg[idx].bit_format,
  2856. ucontrol->value.enumerated.item[0]);
  2857. return 0;
  2858. }
  2859. static int msm_hifi_ctrl(struct snd_soc_codec *codec)
  2860. {
  2861. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  2862. struct snd_soc_card *card = codec->component.card;
  2863. struct msm_asoc_mach_data *pdata =
  2864. snd_soc_card_get_drvdata(card);
  2865. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n", __func__,
  2866. msm_hifi_control);
  2867. if (!pdata || !pdata->hph_en1_gpio_p) {
  2868. dev_err(codec->dev, "%s: hph_en1_gpio is invalid\n", __func__);
  2869. return -EINVAL;
  2870. }
  2871. if (msm_hifi_control == MSM_HIFI_ON) {
  2872. msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
  2873. /* 5msec delay needed as per HW requirement */
  2874. usleep_range(5000, 5010);
  2875. } else {
  2876. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
  2877. }
  2878. snd_soc_dapm_sync(dapm);
  2879. return 0;
  2880. }
  2881. static int msm_hifi_get(struct snd_kcontrol *kcontrol,
  2882. struct snd_ctl_elem_value *ucontrol)
  2883. {
  2884. pr_debug("%s: msm_hifi_control = %d\n",
  2885. __func__, msm_hifi_control);
  2886. ucontrol->value.integer.value[0] = msm_hifi_control;
  2887. return 0;
  2888. }
  2889. static int msm_hifi_put(struct snd_kcontrol *kcontrol,
  2890. struct snd_ctl_elem_value *ucontrol)
  2891. {
  2892. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  2893. dev_dbg(codec->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  2894. __func__, ucontrol->value.integer.value[0]);
  2895. msm_hifi_control = ucontrol->value.integer.value[0];
  2896. msm_hifi_ctrl(codec);
  2897. return 0;
  2898. }
  2899. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  2900. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  2901. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2902. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  2903. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2904. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  2905. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2906. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  2907. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2908. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  2909. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2910. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  2911. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2912. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  2913. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2914. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  2915. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2916. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  2917. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2918. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  2919. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2920. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  2921. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2922. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  2923. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2924. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  2925. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2926. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  2927. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2928. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  2929. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2930. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  2931. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2932. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  2933. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2934. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  2935. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2936. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  2937. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2938. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  2939. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2940. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  2941. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2942. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  2943. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2944. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  2945. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2946. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  2947. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2948. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  2949. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2950. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  2951. wsa_cdc_dma_rx_0_sample_rate,
  2952. cdc_dma_rx_sample_rate_get,
  2953. cdc_dma_rx_sample_rate_put),
  2954. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  2955. wsa_cdc_dma_rx_1_sample_rate,
  2956. cdc_dma_rx_sample_rate_get,
  2957. cdc_dma_rx_sample_rate_put),
  2958. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  2959. rx_cdc_dma_rx_0_sample_rate,
  2960. cdc_dma_rx_sample_rate_get,
  2961. cdc_dma_rx_sample_rate_put),
  2962. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  2963. rx_cdc_dma_rx_1_sample_rate,
  2964. cdc_dma_rx_sample_rate_get,
  2965. cdc_dma_rx_sample_rate_put),
  2966. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  2967. rx_cdc_dma_rx_2_sample_rate,
  2968. cdc_dma_rx_sample_rate_get,
  2969. cdc_dma_rx_sample_rate_put),
  2970. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  2971. rx_cdc_dma_rx_3_sample_rate,
  2972. cdc_dma_rx_sample_rate_get,
  2973. cdc_dma_rx_sample_rate_put),
  2974. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  2975. rx_cdc_dma_rx_5_sample_rate,
  2976. cdc_dma_rx_sample_rate_get,
  2977. cdc_dma_rx_sample_rate_put),
  2978. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  2979. wsa_cdc_dma_tx_0_sample_rate,
  2980. cdc_dma_tx_sample_rate_get,
  2981. cdc_dma_tx_sample_rate_put),
  2982. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  2983. wsa_cdc_dma_tx_1_sample_rate,
  2984. cdc_dma_tx_sample_rate_get,
  2985. cdc_dma_tx_sample_rate_put),
  2986. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  2987. wsa_cdc_dma_tx_2_sample_rate,
  2988. cdc_dma_tx_sample_rate_get,
  2989. cdc_dma_tx_sample_rate_put),
  2990. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  2991. tx_cdc_dma_tx_0_sample_rate,
  2992. cdc_dma_tx_sample_rate_get,
  2993. cdc_dma_tx_sample_rate_put),
  2994. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  2995. tx_cdc_dma_tx_3_sample_rate,
  2996. cdc_dma_tx_sample_rate_get,
  2997. cdc_dma_tx_sample_rate_put),
  2998. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  2999. tx_cdc_dma_tx_4_sample_rate,
  3000. cdc_dma_tx_sample_rate_get,
  3001. cdc_dma_tx_sample_rate_put),
  3002. };
  3003. static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
  3004. SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
  3005. slim_rx_ch_get, slim_rx_ch_put),
  3006. SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
  3007. slim_rx_ch_get, slim_rx_ch_put),
  3008. SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
  3009. slim_tx_ch_get, slim_tx_ch_put),
  3010. SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
  3011. slim_tx_ch_get, slim_tx_ch_put),
  3012. SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
  3013. slim_rx_ch_get, slim_rx_ch_put),
  3014. SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
  3015. slim_rx_ch_get, slim_rx_ch_put),
  3016. SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
  3017. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3018. SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
  3019. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3020. SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
  3021. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3022. SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
  3023. slim_tx_bit_format_get, slim_tx_bit_format_put),
  3024. SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
  3025. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3026. SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
  3027. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3028. SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
  3029. slim_tx_sample_rate_get, slim_tx_sample_rate_put),
  3030. SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
  3031. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3032. SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
  3033. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3034. };
  3035. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  3036. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  3037. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  3038. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  3039. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  3040. SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
  3041. ext_disp_rx_ch_get, ext_disp_rx_ch_put),
  3042. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  3043. proxy_rx_ch_get, proxy_rx_ch_put),
  3044. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  3045. usb_audio_rx_format_get, usb_audio_rx_format_put),
  3046. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  3047. usb_audio_tx_format_get, usb_audio_tx_format_put),
  3048. SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
  3049. ext_disp_rx_format_get, ext_disp_rx_format_put),
  3050. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  3051. usb_audio_rx_sample_rate_get,
  3052. usb_audio_rx_sample_rate_put),
  3053. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  3054. usb_audio_tx_sample_rate_get,
  3055. usb_audio_tx_sample_rate_put),
  3056. SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
  3057. ext_disp_rx_sample_rate_get,
  3058. ext_disp_rx_sample_rate_put),
  3059. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3060. tdm_rx_sample_rate_get,
  3061. tdm_rx_sample_rate_put),
  3062. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3063. tdm_tx_sample_rate_get,
  3064. tdm_tx_sample_rate_put),
  3065. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  3066. tdm_rx_format_get,
  3067. tdm_rx_format_put),
  3068. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  3069. tdm_tx_format_get,
  3070. tdm_tx_format_put),
  3071. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  3072. tdm_rx_ch_get,
  3073. tdm_rx_ch_put),
  3074. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  3075. tdm_tx_ch_get,
  3076. tdm_tx_ch_put),
  3077. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3078. tdm_rx_sample_rate_get,
  3079. tdm_rx_sample_rate_put),
  3080. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3081. tdm_tx_sample_rate_get,
  3082. tdm_tx_sample_rate_put),
  3083. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  3084. tdm_rx_format_get,
  3085. tdm_rx_format_put),
  3086. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  3087. tdm_tx_format_get,
  3088. tdm_tx_format_put),
  3089. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  3090. tdm_rx_ch_get,
  3091. tdm_rx_ch_put),
  3092. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  3093. tdm_tx_ch_get,
  3094. tdm_tx_ch_put),
  3095. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3096. tdm_rx_sample_rate_get,
  3097. tdm_rx_sample_rate_put),
  3098. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3099. tdm_tx_sample_rate_get,
  3100. tdm_tx_sample_rate_put),
  3101. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  3102. tdm_rx_format_get,
  3103. tdm_rx_format_put),
  3104. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  3105. tdm_tx_format_get,
  3106. tdm_tx_format_put),
  3107. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  3108. tdm_rx_ch_get,
  3109. tdm_rx_ch_put),
  3110. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  3111. tdm_tx_ch_get,
  3112. tdm_tx_ch_put),
  3113. SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3114. tdm_rx_sample_rate_get,
  3115. tdm_rx_sample_rate_put),
  3116. SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3117. tdm_tx_sample_rate_get,
  3118. tdm_tx_sample_rate_put),
  3119. SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
  3120. tdm_rx_format_get,
  3121. tdm_rx_format_put),
  3122. SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
  3123. tdm_tx_format_get,
  3124. tdm_tx_format_put),
  3125. SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
  3126. tdm_rx_ch_get,
  3127. tdm_rx_ch_put),
  3128. SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
  3129. tdm_tx_ch_get,
  3130. tdm_tx_ch_put),
  3131. SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3132. tdm_rx_sample_rate_get,
  3133. tdm_rx_sample_rate_put),
  3134. SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3135. tdm_tx_sample_rate_get,
  3136. tdm_tx_sample_rate_put),
  3137. SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
  3138. tdm_rx_format_get,
  3139. tdm_rx_format_put),
  3140. SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
  3141. tdm_tx_format_get,
  3142. tdm_tx_format_put),
  3143. SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
  3144. tdm_rx_ch_get,
  3145. tdm_rx_ch_put),
  3146. SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
  3147. tdm_tx_ch_get,
  3148. tdm_tx_ch_put),
  3149. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  3150. aux_pcm_rx_sample_rate_get,
  3151. aux_pcm_rx_sample_rate_put),
  3152. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  3153. aux_pcm_rx_sample_rate_get,
  3154. aux_pcm_rx_sample_rate_put),
  3155. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  3156. aux_pcm_rx_sample_rate_get,
  3157. aux_pcm_rx_sample_rate_put),
  3158. SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
  3159. aux_pcm_rx_sample_rate_get,
  3160. aux_pcm_rx_sample_rate_put),
  3161. SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
  3162. aux_pcm_rx_sample_rate_get,
  3163. aux_pcm_rx_sample_rate_put),
  3164. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  3165. aux_pcm_tx_sample_rate_get,
  3166. aux_pcm_tx_sample_rate_put),
  3167. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  3168. aux_pcm_tx_sample_rate_get,
  3169. aux_pcm_tx_sample_rate_put),
  3170. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  3171. aux_pcm_tx_sample_rate_get,
  3172. aux_pcm_tx_sample_rate_put),
  3173. SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
  3174. aux_pcm_tx_sample_rate_get,
  3175. aux_pcm_tx_sample_rate_put),
  3176. SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
  3177. aux_pcm_tx_sample_rate_get,
  3178. aux_pcm_tx_sample_rate_put),
  3179. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  3180. mi2s_rx_sample_rate_get,
  3181. mi2s_rx_sample_rate_put),
  3182. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  3183. mi2s_rx_sample_rate_get,
  3184. mi2s_rx_sample_rate_put),
  3185. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  3186. mi2s_rx_sample_rate_get,
  3187. mi2s_rx_sample_rate_put),
  3188. SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
  3189. mi2s_rx_sample_rate_get,
  3190. mi2s_rx_sample_rate_put),
  3191. SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
  3192. mi2s_rx_sample_rate_get,
  3193. mi2s_rx_sample_rate_put),
  3194. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  3195. mi2s_tx_sample_rate_get,
  3196. mi2s_tx_sample_rate_put),
  3197. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  3198. mi2s_tx_sample_rate_get,
  3199. mi2s_tx_sample_rate_put),
  3200. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  3201. mi2s_tx_sample_rate_get,
  3202. mi2s_tx_sample_rate_put),
  3203. SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
  3204. mi2s_tx_sample_rate_get,
  3205. mi2s_tx_sample_rate_put),
  3206. SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
  3207. mi2s_tx_sample_rate_get,
  3208. mi2s_tx_sample_rate_put),
  3209. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  3210. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3211. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  3212. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3213. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  3214. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3215. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  3216. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3217. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  3218. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3219. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  3220. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3221. SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
  3222. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3223. SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
  3224. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3225. SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
  3226. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3227. SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
  3228. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3229. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  3230. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3231. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  3232. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3233. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  3234. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3235. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  3236. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3237. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  3238. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3239. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  3240. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3241. SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
  3242. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3243. SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
  3244. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3245. SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
  3246. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3247. SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
  3248. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3249. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  3250. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3251. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  3252. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3253. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  3254. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3255. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  3256. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3257. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3258. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3259. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3260. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3261. SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3262. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3263. SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3264. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3265. SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
  3266. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3267. SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
  3268. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3269. SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
  3270. msm_hifi_put),
  3271. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  3272. msm_bt_sample_rate_get,
  3273. msm_bt_sample_rate_put),
  3274. SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
  3275. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  3276. };
  3277. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  3278. int enable, bool dapm)
  3279. {
  3280. int ret = 0;
  3281. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3282. ret = tavil_cdc_mclk_enable(codec, enable);
  3283. } else {
  3284. dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
  3285. __func__);
  3286. ret = -EINVAL;
  3287. }
  3288. return ret;
  3289. }
  3290. static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
  3291. int enable, bool dapm)
  3292. {
  3293. int ret = 0;
  3294. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3295. ret = tavil_cdc_mclk_tx_enable(codec, enable);
  3296. } else {
  3297. dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
  3298. __func__);
  3299. ret = -EINVAL;
  3300. }
  3301. return ret;
  3302. }
  3303. static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
  3304. struct snd_kcontrol *kcontrol, int event)
  3305. {
  3306. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3307. pr_debug("%s: event = %d\n", __func__, event);
  3308. switch (event) {
  3309. case SND_SOC_DAPM_PRE_PMU:
  3310. return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
  3311. case SND_SOC_DAPM_POST_PMD:
  3312. return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
  3313. }
  3314. return 0;
  3315. }
  3316. static int msm_mclk_event(struct snd_soc_dapm_widget *w,
  3317. struct snd_kcontrol *kcontrol, int event)
  3318. {
  3319. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3320. pr_debug("%s: event = %d\n", __func__, event);
  3321. switch (event) {
  3322. case SND_SOC_DAPM_PRE_PMU:
  3323. return msm_snd_enable_codec_ext_clk(codec, 1, true);
  3324. case SND_SOC_DAPM_POST_PMD:
  3325. return msm_snd_enable_codec_ext_clk(codec, 0, true);
  3326. }
  3327. return 0;
  3328. }
  3329. static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
  3330. struct snd_kcontrol *k, int event)
  3331. {
  3332. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3333. struct snd_soc_card *card = codec->component.card;
  3334. struct msm_asoc_mach_data *pdata =
  3335. snd_soc_card_get_drvdata(card);
  3336. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n",
  3337. __func__, msm_hifi_control);
  3338. if (!pdata || !pdata->hph_en0_gpio_p) {
  3339. dev_err(codec->dev, "%s: hph_en0_gpio is invalid\n", __func__);
  3340. return -EINVAL;
  3341. }
  3342. if (msm_hifi_control != MSM_HIFI_ON) {
  3343. dev_dbg(codec->dev, "%s: HiFi mixer control is not set\n",
  3344. __func__);
  3345. return 0;
  3346. }
  3347. switch (event) {
  3348. case SND_SOC_DAPM_POST_PMU:
  3349. msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
  3350. break;
  3351. case SND_SOC_DAPM_PRE_PMD:
  3352. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
  3353. break;
  3354. }
  3355. return 0;
  3356. }
  3357. static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
  3358. SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
  3359. msm_mclk_event,
  3360. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3361. SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
  3362. msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3363. SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
  3364. SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
  3365. SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
  3366. SND_SOC_DAPM_MIC("Handset Mic", NULL),
  3367. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  3368. SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
  3369. SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
  3370. SND_SOC_DAPM_MIC("Analog Mic5", NULL),
  3371. SND_SOC_DAPM_MIC("Digital Mic0", NULL),
  3372. SND_SOC_DAPM_MIC("Digital Mic1", NULL),
  3373. SND_SOC_DAPM_MIC("Digital Mic2", NULL),
  3374. SND_SOC_DAPM_MIC("Digital Mic3", NULL),
  3375. SND_SOC_DAPM_MIC("Digital Mic4", NULL),
  3376. SND_SOC_DAPM_MIC("Digital Mic5", NULL),
  3377. };
  3378. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  3379. struct snd_kcontrol *kcontrol, int event)
  3380. {
  3381. struct msm_asoc_mach_data *pdata = NULL;
  3382. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3383. int ret = 0;
  3384. u32 dmic_idx;
  3385. int *dmic_gpio_cnt;
  3386. struct device_node *dmic_gpio;
  3387. char *wname;
  3388. wname = strpbrk(w->name, "0123");
  3389. if (!wname) {
  3390. dev_err(codec->dev, "%s: widget not found\n", __func__);
  3391. return -EINVAL;
  3392. }
  3393. ret = kstrtouint(wname, 10, &dmic_idx);
  3394. if (ret < 0) {
  3395. dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
  3396. __func__);
  3397. return -EINVAL;
  3398. }
  3399. pdata = snd_soc_card_get_drvdata(codec->component.card);
  3400. switch (dmic_idx) {
  3401. case 0:
  3402. case 1:
  3403. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3404. dmic_gpio = pdata->dmic01_gpio_p;
  3405. break;
  3406. case 2:
  3407. case 3:
  3408. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3409. dmic_gpio = pdata->dmic23_gpio_p;
  3410. break;
  3411. default:
  3412. dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
  3413. __func__);
  3414. return -EINVAL;
  3415. }
  3416. dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3417. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3418. switch (event) {
  3419. case SND_SOC_DAPM_PRE_PMU:
  3420. (*dmic_gpio_cnt)++;
  3421. if (*dmic_gpio_cnt == 1) {
  3422. ret = msm_cdc_pinctrl_select_active_state(
  3423. dmic_gpio);
  3424. if (ret < 0) {
  3425. pr_err("%s: gpio set cannot be activated %sd",
  3426. __func__, "dmic_gpio");
  3427. return ret;
  3428. }
  3429. }
  3430. break;
  3431. case SND_SOC_DAPM_POST_PMD:
  3432. (*dmic_gpio_cnt)--;
  3433. if (*dmic_gpio_cnt == 0) {
  3434. ret = msm_cdc_pinctrl_select_sleep_state(
  3435. dmic_gpio);
  3436. if (ret < 0) {
  3437. pr_err("%s: gpio set cannot be de-activated %sd",
  3438. __func__, "dmic_gpio");
  3439. return ret;
  3440. }
  3441. }
  3442. break;
  3443. default:
  3444. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3445. return -EINVAL;
  3446. }
  3447. return 0;
  3448. }
  3449. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3450. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3451. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3452. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3453. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3454. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3455. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3456. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3457. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3458. };
  3459. static inline int param_is_mask(int p)
  3460. {
  3461. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  3462. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  3463. }
  3464. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  3465. int n)
  3466. {
  3467. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  3468. }
  3469. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  3470. unsigned int bit)
  3471. {
  3472. if (bit >= SNDRV_MASK_MAX)
  3473. return;
  3474. if (param_is_mask(n)) {
  3475. struct snd_mask *m = param_to_mask(p, n);
  3476. m->bits[0] = 0;
  3477. m->bits[1] = 0;
  3478. m->bits[bit >> 5] |= (1 << (bit & 31));
  3479. }
  3480. }
  3481. static int msm_slim_get_ch_from_beid(int32_t be_id)
  3482. {
  3483. int ch_id = 0;
  3484. switch (be_id) {
  3485. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3486. ch_id = SLIM_RX_0;
  3487. break;
  3488. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3489. ch_id = SLIM_RX_1;
  3490. break;
  3491. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3492. ch_id = SLIM_RX_2;
  3493. break;
  3494. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3495. ch_id = SLIM_RX_3;
  3496. break;
  3497. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3498. ch_id = SLIM_RX_4;
  3499. break;
  3500. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3501. ch_id = SLIM_RX_6;
  3502. break;
  3503. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3504. ch_id = SLIM_TX_0;
  3505. break;
  3506. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3507. ch_id = SLIM_TX_3;
  3508. break;
  3509. default:
  3510. ch_id = SLIM_RX_0;
  3511. break;
  3512. }
  3513. return ch_id;
  3514. }
  3515. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  3516. {
  3517. int idx = 0;
  3518. switch (be_id) {
  3519. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3520. idx = WSA_CDC_DMA_RX_0;
  3521. break;
  3522. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3523. idx = WSA_CDC_DMA_TX_0;
  3524. break;
  3525. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3526. idx = WSA_CDC_DMA_RX_1;
  3527. break;
  3528. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3529. idx = WSA_CDC_DMA_TX_1;
  3530. break;
  3531. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3532. idx = WSA_CDC_DMA_TX_2;
  3533. break;
  3534. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3535. idx = RX_CDC_DMA_RX_0;
  3536. break;
  3537. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3538. idx = RX_CDC_DMA_RX_1;
  3539. break;
  3540. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3541. idx = RX_CDC_DMA_RX_2;
  3542. break;
  3543. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3544. idx = RX_CDC_DMA_RX_3;
  3545. break;
  3546. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  3547. idx = RX_CDC_DMA_RX_5;
  3548. break;
  3549. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3550. idx = TX_CDC_DMA_TX_0;
  3551. break;
  3552. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3553. idx = TX_CDC_DMA_TX_3;
  3554. break;
  3555. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3556. idx = TX_CDC_DMA_TX_4;
  3557. break;
  3558. default:
  3559. idx = RX_CDC_DMA_RX_0;
  3560. break;
  3561. }
  3562. return idx;
  3563. }
  3564. static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
  3565. {
  3566. int idx = -EINVAL;
  3567. switch (be_id) {
  3568. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3569. idx = DP_RX_IDX;
  3570. break;
  3571. default:
  3572. pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
  3573. idx = -EINVAL;
  3574. break;
  3575. }
  3576. return idx;
  3577. }
  3578. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  3579. struct snd_pcm_hw_params *params)
  3580. {
  3581. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3582. struct snd_interval *rate = hw_param_interval(params,
  3583. SNDRV_PCM_HW_PARAM_RATE);
  3584. struct snd_interval *channels = hw_param_interval(params,
  3585. SNDRV_PCM_HW_PARAM_CHANNELS);
  3586. int rc = 0;
  3587. int idx;
  3588. void *config = NULL;
  3589. struct snd_soc_codec *codec = NULL;
  3590. pr_debug("%s: format = %d, rate = %d\n",
  3591. __func__, params_format(params), params_rate(params));
  3592. switch (dai_link->id) {
  3593. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3594. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3595. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3596. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3597. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3598. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3599. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3600. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3601. slim_rx_cfg[idx].bit_format);
  3602. rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
  3603. channels->min = channels->max = slim_rx_cfg[idx].channels;
  3604. break;
  3605. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3606. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3607. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3608. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3609. slim_tx_cfg[idx].bit_format);
  3610. rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
  3611. channels->min = channels->max = slim_tx_cfg[idx].channels;
  3612. break;
  3613. case MSM_BACKEND_DAI_SLIMBUS_1_TX:
  3614. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3615. slim_tx_cfg[1].bit_format);
  3616. rate->min = rate->max = slim_tx_cfg[1].sample_rate;
  3617. channels->min = channels->max = slim_tx_cfg[1].channels;
  3618. break;
  3619. case MSM_BACKEND_DAI_SLIMBUS_4_TX:
  3620. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3621. SNDRV_PCM_FORMAT_S32_LE);
  3622. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3623. channels->min = channels->max = msm_vi_feed_tx_ch;
  3624. break;
  3625. case MSM_BACKEND_DAI_SLIMBUS_5_RX:
  3626. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3627. slim_rx_cfg[5].bit_format);
  3628. rate->min = rate->max = slim_rx_cfg[5].sample_rate;
  3629. channels->min = channels->max = slim_rx_cfg[5].channels;
  3630. break;
  3631. case MSM_BACKEND_DAI_SLIMBUS_5_TX:
  3632. codec = rtd->codec;
  3633. rate->min = rate->max = SAMPLING_RATE_16KHZ;
  3634. channels->min = channels->max = 1;
  3635. config = msm_codec_fn.get_afe_config_fn(codec,
  3636. AFE_SLIMBUS_SLAVE_PORT_CONFIG);
  3637. if (config) {
  3638. rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
  3639. config, SLIMBUS_5_TX);
  3640. if (rc)
  3641. pr_err("%s: Failed to set slimbus slave port config %d\n",
  3642. __func__, rc);
  3643. }
  3644. break;
  3645. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  3646. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3647. slim_rx_cfg[SLIM_RX_7].bit_format);
  3648. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  3649. channels->min = channels->max =
  3650. slim_rx_cfg[SLIM_RX_7].channels;
  3651. break;
  3652. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  3653. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  3654. channels->min = channels->max =
  3655. slim_tx_cfg[SLIM_TX_7].channels;
  3656. break;
  3657. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  3658. rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
  3659. channels->min = channels->max =
  3660. slim_tx_cfg[SLIM_TX_8].channels;
  3661. break;
  3662. case MSM_BACKEND_DAI_USB_RX:
  3663. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3664. usb_rx_cfg.bit_format);
  3665. rate->min = rate->max = usb_rx_cfg.sample_rate;
  3666. channels->min = channels->max = usb_rx_cfg.channels;
  3667. break;
  3668. case MSM_BACKEND_DAI_USB_TX:
  3669. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3670. usb_tx_cfg.bit_format);
  3671. rate->min = rate->max = usb_tx_cfg.sample_rate;
  3672. channels->min = channels->max = usb_tx_cfg.channels;
  3673. break;
  3674. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3675. idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
  3676. if (idx < 0) {
  3677. pr_err("%s: Incorrect ext disp idx %d\n",
  3678. __func__, idx);
  3679. rc = idx;
  3680. goto done;
  3681. }
  3682. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3683. ext_disp_rx_cfg[idx].bit_format);
  3684. rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
  3685. channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
  3686. break;
  3687. case MSM_BACKEND_DAI_AFE_PCM_RX:
  3688. channels->min = channels->max = proxy_rx_cfg.channels;
  3689. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3690. break;
  3691. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  3692. channels->min = channels->max =
  3693. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3694. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3695. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  3696. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  3697. break;
  3698. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  3699. channels->min = channels->max =
  3700. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3701. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3702. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  3703. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  3704. break;
  3705. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  3706. channels->min = channels->max =
  3707. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3708. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3709. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  3710. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  3711. break;
  3712. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  3713. channels->min = channels->max =
  3714. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3715. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3716. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  3717. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  3718. break;
  3719. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  3720. channels->min = channels->max =
  3721. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3722. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3723. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  3724. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  3725. break;
  3726. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  3727. channels->min = channels->max =
  3728. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3729. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3730. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  3731. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  3732. break;
  3733. case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
  3734. channels->min = channels->max =
  3735. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  3736. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3737. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  3738. rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3739. break;
  3740. case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
  3741. channels->min = channels->max =
  3742. tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  3743. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3744. tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
  3745. rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3746. break;
  3747. case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
  3748. channels->min = channels->max =
  3749. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  3750. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3751. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  3752. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3753. break;
  3754. case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
  3755. channels->min = channels->max =
  3756. tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  3757. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3758. tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
  3759. rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3760. break;
  3761. case MSM_BACKEND_DAI_AUXPCM_RX:
  3762. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3763. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  3764. rate->min = rate->max =
  3765. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  3766. channels->min = channels->max =
  3767. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  3768. break;
  3769. case MSM_BACKEND_DAI_AUXPCM_TX:
  3770. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3771. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  3772. rate->min = rate->max =
  3773. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  3774. channels->min = channels->max =
  3775. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  3776. break;
  3777. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  3778. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3779. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  3780. rate->min = rate->max =
  3781. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  3782. channels->min = channels->max =
  3783. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  3784. break;
  3785. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  3786. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3787. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  3788. rate->min = rate->max =
  3789. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  3790. channels->min = channels->max =
  3791. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  3792. break;
  3793. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  3794. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3795. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  3796. rate->min = rate->max =
  3797. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  3798. channels->min = channels->max =
  3799. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  3800. break;
  3801. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  3802. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3803. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  3804. rate->min = rate->max =
  3805. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  3806. channels->min = channels->max =
  3807. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  3808. break;
  3809. case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
  3810. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3811. aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
  3812. rate->min = rate->max =
  3813. aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
  3814. channels->min = channels->max =
  3815. aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
  3816. break;
  3817. case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
  3818. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3819. aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
  3820. rate->min = rate->max =
  3821. aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
  3822. channels->min = channels->max =
  3823. aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
  3824. break;
  3825. case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
  3826. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3827. aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
  3828. rate->min = rate->max =
  3829. aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
  3830. channels->min = channels->max =
  3831. aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
  3832. break;
  3833. case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
  3834. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3835. aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
  3836. rate->min = rate->max =
  3837. aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
  3838. channels->min = channels->max =
  3839. aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
  3840. break;
  3841. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  3842. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3843. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  3844. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  3845. channels->min = channels->max =
  3846. mi2s_rx_cfg[PRIM_MI2S].channels;
  3847. break;
  3848. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  3849. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3850. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  3851. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  3852. channels->min = channels->max =
  3853. mi2s_tx_cfg[PRIM_MI2S].channels;
  3854. break;
  3855. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  3856. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3857. mi2s_rx_cfg[SEC_MI2S].bit_format);
  3858. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  3859. channels->min = channels->max =
  3860. mi2s_rx_cfg[SEC_MI2S].channels;
  3861. break;
  3862. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  3863. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3864. mi2s_tx_cfg[SEC_MI2S].bit_format);
  3865. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  3866. channels->min = channels->max =
  3867. mi2s_tx_cfg[SEC_MI2S].channels;
  3868. break;
  3869. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  3870. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3871. mi2s_rx_cfg[TERT_MI2S].bit_format);
  3872. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  3873. channels->min = channels->max =
  3874. mi2s_rx_cfg[TERT_MI2S].channels;
  3875. break;
  3876. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  3877. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3878. mi2s_tx_cfg[TERT_MI2S].bit_format);
  3879. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  3880. channels->min = channels->max =
  3881. mi2s_tx_cfg[TERT_MI2S].channels;
  3882. break;
  3883. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  3884. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3885. mi2s_rx_cfg[QUAT_MI2S].bit_format);
  3886. rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
  3887. channels->min = channels->max =
  3888. mi2s_rx_cfg[QUAT_MI2S].channels;
  3889. break;
  3890. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  3891. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3892. mi2s_tx_cfg[QUAT_MI2S].bit_format);
  3893. rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
  3894. channels->min = channels->max =
  3895. mi2s_tx_cfg[QUAT_MI2S].channels;
  3896. break;
  3897. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  3898. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3899. mi2s_rx_cfg[QUIN_MI2S].bit_format);
  3900. rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
  3901. channels->min = channels->max =
  3902. mi2s_rx_cfg[QUIN_MI2S].channels;
  3903. break;
  3904. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  3905. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3906. mi2s_tx_cfg[QUIN_MI2S].bit_format);
  3907. rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
  3908. channels->min = channels->max =
  3909. mi2s_tx_cfg[QUIN_MI2S].channels;
  3910. break;
  3911. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3912. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3913. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3914. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3915. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3916. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3917. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3918. cdc_dma_rx_cfg[idx].bit_format);
  3919. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  3920. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  3921. break;
  3922. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3923. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3924. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3925. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3926. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3927. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3928. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3929. cdc_dma_tx_cfg[idx].bit_format);
  3930. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  3931. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  3932. break;
  3933. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3934. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3935. SNDRV_PCM_FORMAT_S32_LE);
  3936. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3937. channels->min = channels->max = msm_vi_feed_tx_ch;
  3938. break;
  3939. default:
  3940. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3941. break;
  3942. }
  3943. done:
  3944. return rc;
  3945. }
  3946. static bool msm_usbc_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  3947. {
  3948. int value = 0;
  3949. bool ret = 0;
  3950. struct snd_soc_card *card = codec->component.card;
  3951. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3952. struct pinctrl_state *en2_pinctrl_active;
  3953. struct pinctrl_state *en2_pinctrl_sleep;
  3954. if (!pdata->usbc_en2_gpio_p) {
  3955. if (active) {
  3956. /* if active and usbc_en2_gpio undefined, get pin */
  3957. pdata->usbc_en2_gpio_p = devm_pinctrl_get(card->dev);
  3958. if (IS_ERR_OR_NULL(pdata->usbc_en2_gpio_p)) {
  3959. dev_err(card->dev,
  3960. "%s: Can't get EN2 gpio pinctrl:%ld\n",
  3961. __func__,
  3962. PTR_ERR(pdata->usbc_en2_gpio_p));
  3963. pdata->usbc_en2_gpio_p = NULL;
  3964. return false;
  3965. }
  3966. } else {
  3967. /* if not active and usbc_en2_gpio undefined, return */
  3968. return false;
  3969. }
  3970. }
  3971. pdata->usbc_en2_gpio = of_get_named_gpio(card->dev->of_node,
  3972. "qcom,usbc-analog-en2-gpio", 0);
  3973. if (!gpio_is_valid(pdata->usbc_en2_gpio)) {
  3974. dev_err(card->dev, "%s, property %s not in node %s",
  3975. __func__, "qcom,usbc-analog-en2-gpio",
  3976. card->dev->of_node->full_name);
  3977. return false;
  3978. }
  3979. en2_pinctrl_active = pinctrl_lookup_state(
  3980. pdata->usbc_en2_gpio_p, "aud_active");
  3981. if (IS_ERR_OR_NULL(en2_pinctrl_active)) {
  3982. dev_err(card->dev,
  3983. "%s: Cannot get aud_active pinctrl state:%ld\n",
  3984. __func__, PTR_ERR(en2_pinctrl_active));
  3985. ret = false;
  3986. goto err_lookup_state;
  3987. }
  3988. en2_pinctrl_sleep = pinctrl_lookup_state(
  3989. pdata->usbc_en2_gpio_p, "aud_sleep");
  3990. if (IS_ERR_OR_NULL(en2_pinctrl_sleep)) {
  3991. dev_err(card->dev,
  3992. "%s: Cannot get aud_sleep pinctrl state:%ld\n",
  3993. __func__, PTR_ERR(en2_pinctrl_sleep));
  3994. ret = false;
  3995. goto err_lookup_state;
  3996. }
  3997. /* if active and usbc_en2_gpio_p defined, swap using usbc_en2_gpio_p */
  3998. if (active) {
  3999. dev_dbg(codec->dev, "%s: enter\n", __func__);
  4000. if (pdata->usbc_en2_gpio_p) {
  4001. value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
  4002. if (value)
  4003. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  4004. en2_pinctrl_sleep);
  4005. else
  4006. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  4007. en2_pinctrl_active);
  4008. } else if (pdata->usbc_en2_gpio >= 0) {
  4009. value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
  4010. gpio_set_value_cansleep(pdata->usbc_en2_gpio, !value);
  4011. }
  4012. pr_debug("%s: swap select switch %d to %d\n", __func__,
  4013. value, !value);
  4014. ret = true;
  4015. } else {
  4016. /* if not active, release usbc_en2_gpio_p pin */
  4017. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  4018. en2_pinctrl_sleep);
  4019. }
  4020. err_lookup_state:
  4021. devm_pinctrl_put(pdata->usbc_en2_gpio_p);
  4022. pdata->usbc_en2_gpio_p = NULL;
  4023. return ret;
  4024. }
  4025. static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  4026. {
  4027. int value = 0;
  4028. bool ret = false;
  4029. struct snd_soc_card *card;
  4030. struct msm_asoc_mach_data *pdata;
  4031. if (!codec) {
  4032. pr_err("%s codec is NULL\n", __func__);
  4033. return false;
  4034. }
  4035. card = codec->component.card;
  4036. pdata = snd_soc_card_get_drvdata(card);
  4037. if (!pdata)
  4038. return false;
  4039. if (wcd_mbhc_cfg.enable_usbc_analog)
  4040. return msm_usbc_swap_gnd_mic(codec, active);
  4041. /* if usbc is not defined, swap using us_euro_gpio_p */
  4042. if (pdata->us_euro_gpio_p) {
  4043. value = msm_cdc_pinctrl_get_state(
  4044. pdata->us_euro_gpio_p);
  4045. if (value)
  4046. msm_cdc_pinctrl_select_sleep_state(
  4047. pdata->us_euro_gpio_p);
  4048. else
  4049. msm_cdc_pinctrl_select_active_state(
  4050. pdata->us_euro_gpio_p);
  4051. dev_dbg(codec->dev, "%s: swap select switch %d to %d\n",
  4052. __func__, value, !value);
  4053. ret = true;
  4054. }
  4055. return ret;
  4056. }
  4057. static int msm_afe_set_config(struct snd_soc_codec *codec)
  4058. {
  4059. int ret = 0;
  4060. void *config_data = NULL;
  4061. if (!msm_codec_fn.get_afe_config_fn) {
  4062. dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
  4063. __func__);
  4064. return -EINVAL;
  4065. }
  4066. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4067. AFE_CDC_REGISTERS_CONFIG);
  4068. if (config_data) {
  4069. ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
  4070. if (ret) {
  4071. dev_err(codec->dev,
  4072. "%s: Failed to set codec registers config %d\n",
  4073. __func__, ret);
  4074. return ret;
  4075. }
  4076. }
  4077. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4078. AFE_CDC_REGISTER_PAGE_CONFIG);
  4079. if (config_data) {
  4080. ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
  4081. 0);
  4082. if (ret)
  4083. dev_err(codec->dev,
  4084. "%s: Failed to set cdc register page config\n",
  4085. __func__);
  4086. }
  4087. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4088. AFE_SLIMBUS_SLAVE_CONFIG);
  4089. if (config_data) {
  4090. ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
  4091. if (ret) {
  4092. dev_err(codec->dev,
  4093. "%s: Failed to set slimbus slave config %d\n",
  4094. __func__, ret);
  4095. return ret;
  4096. }
  4097. }
  4098. return 0;
  4099. }
  4100. static void msm_afe_clear_config(void)
  4101. {
  4102. afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
  4103. afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
  4104. }
  4105. static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
  4106. {
  4107. int ret = 0;
  4108. void *config_data;
  4109. struct snd_soc_codec *codec = rtd->codec;
  4110. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4111. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4112. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4113. struct snd_soc_component *aux_comp;
  4114. struct snd_card *card;
  4115. struct snd_info_entry *entry;
  4116. struct msm_asoc_mach_data *pdata =
  4117. snd_soc_card_get_drvdata(rtd->card);
  4118. /*
  4119. * Codec SLIMBUS configuration
  4120. * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
  4121. * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
  4122. * TX14, TX15, TX16
  4123. */
  4124. unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
  4125. 150, 151};
  4126. unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
  4127. 134, 135, 136, 137, 138, 139,
  4128. 140, 141, 142, 143};
  4129. pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
  4130. rtd->pmdown_time = 0;
  4131. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  4132. ARRAY_SIZE(msm_tavil_snd_controls));
  4133. if (ret < 0) {
  4134. pr_err("%s: add_codec_controls failed, err %d\n",
  4135. __func__, ret);
  4136. return ret;
  4137. }
  4138. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4139. ARRAY_SIZE(msm_common_snd_controls));
  4140. if (ret < 0) {
  4141. pr_err("%s: add_codec_controls failed, err %d\n",
  4142. __func__, ret);
  4143. return ret;
  4144. }
  4145. snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
  4146. ARRAY_SIZE(msm_dapm_widgets_tavil));
  4147. snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
  4148. ARRAY_SIZE(wcd_audio_paths_tavil));
  4149. snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
  4150. snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
  4151. snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
  4152. snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
  4153. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4154. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4155. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4156. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4157. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
  4158. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
  4159. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
  4160. snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
  4161. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
  4162. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
  4163. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
  4164. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  4165. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
  4166. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
  4167. snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
  4168. snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
  4169. snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
  4170. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  4171. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  4172. snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
  4173. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
  4174. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
  4175. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
  4176. snd_soc_dapm_sync(dapm);
  4177. snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4178. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4179. msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
  4180. ret = msm_afe_set_config(codec);
  4181. if (ret) {
  4182. pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
  4183. goto err;
  4184. }
  4185. pdata->is_afe_config_done = true;
  4186. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4187. AFE_AANC_VERSION);
  4188. if (config_data) {
  4189. ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
  4190. if (ret) {
  4191. pr_err("%s: Failed to set aanc version %d\n",
  4192. __func__, ret);
  4193. goto err;
  4194. }
  4195. }
  4196. /*
  4197. * Send speaker configuration only for WSA8810.
  4198. * Default configuration is for WSA8815.
  4199. */
  4200. pr_debug("%s: Number of aux devices: %d\n",
  4201. __func__, rtd->card->num_aux_devs);
  4202. if (rtd->card->num_aux_devs &&
  4203. !list_empty(&rtd->card->aux_comp_list)) {
  4204. aux_comp = list_first_entry(&rtd->card->aux_comp_list,
  4205. struct snd_soc_component, card_aux_list);
  4206. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4207. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4208. tavil_set_spkr_mode(rtd->codec, WCD934X_SPKR_MODE_1);
  4209. tavil_set_spkr_gain_offset(rtd->codec,
  4210. WCD934X_RX_GAIN_OFFSET_M1P5_DB);
  4211. }
  4212. }
  4213. card = rtd->card->snd_card;
  4214. entry = snd_info_create_subdir(card->module, "codecs",
  4215. card->proc_root);
  4216. if (!entry) {
  4217. pr_debug("%s: Cannot create codecs module entry\n",
  4218. __func__);
  4219. ret = 0;
  4220. goto err;
  4221. }
  4222. pdata->codec_root = entry;
  4223. tavil_codec_info_create_codec_entry(pdata->codec_root, codec);
  4224. codec_reg_done = true;
  4225. return 0;
  4226. err:
  4227. return ret;
  4228. }
  4229. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  4230. {
  4231. int ret = 0;
  4232. struct snd_soc_codec *codec = rtd->codec;
  4233. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4234. struct snd_card *card;
  4235. struct snd_info_entry *entry;
  4236. struct snd_soc_component *aux_comp;
  4237. struct msm_asoc_mach_data *pdata =
  4238. snd_soc_card_get_drvdata(rtd->card);
  4239. ret = snd_soc_add_codec_controls(codec, msm_int_snd_controls,
  4240. ARRAY_SIZE(msm_int_snd_controls));
  4241. if (ret < 0) {
  4242. pr_err("%s: add_codec_controls failed: %d\n",
  4243. __func__, ret);
  4244. return ret;
  4245. }
  4246. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4247. ARRAY_SIZE(msm_common_snd_controls));
  4248. if (ret < 0) {
  4249. pr_err("%s: add common snd controls failed: %d\n",
  4250. __func__, ret);
  4251. return ret;
  4252. }
  4253. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  4254. ARRAY_SIZE(msm_int_dapm_widgets));
  4255. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4256. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4257. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4258. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4259. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  4260. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  4261. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  4262. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  4263. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  4264. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  4265. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  4266. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  4267. snd_soc_dapm_sync(dapm);
  4268. /*
  4269. * Send speaker configuration only for WSA8810.
  4270. * Default configuration is for WSA8815.
  4271. */
  4272. dev_dbg(codec->dev, "%s: Number of aux devices: %d\n",
  4273. __func__, rtd->card->num_aux_devs);
  4274. if (rtd->card->num_aux_devs &&
  4275. !list_empty(&rtd->card->component_dev_list)) {
  4276. aux_comp = list_first_entry(
  4277. &rtd->card->component_dev_list,
  4278. struct snd_soc_component,
  4279. card_aux_list);
  4280. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4281. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4282. wsa_macro_set_spkr_mode(rtd->codec,
  4283. WSA_MACRO_SPKR_MODE_1);
  4284. wsa_macro_set_spkr_gain_offset(rtd->codec,
  4285. WSA_MACRO_GAIN_OFFSET_M1P5_DB);
  4286. }
  4287. }
  4288. card = rtd->card->snd_card;
  4289. if (!pdata->codec_root) {
  4290. entry = snd_info_create_subdir(card->module, "codecs",
  4291. card->proc_root);
  4292. if (!entry) {
  4293. pr_debug("%s: Cannot create codecs module entry\n",
  4294. __func__);
  4295. ret = 0;
  4296. goto err;
  4297. }
  4298. pdata->codec_root = entry;
  4299. }
  4300. bolero_info_create_codec_entry(pdata->codec_root, codec);
  4301. codec_reg_done = true;
  4302. return 0;
  4303. err:
  4304. return ret;
  4305. }
  4306. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  4307. {
  4308. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  4309. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
  4310. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4311. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4312. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4313. }
  4314. static void *def_wcd_mbhc_cal(void)
  4315. {
  4316. void *wcd_mbhc_cal;
  4317. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  4318. u16 *btn_high;
  4319. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  4320. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  4321. if (!wcd_mbhc_cal)
  4322. return NULL;
  4323. #define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
  4324. S(v_hs_max, 1600);
  4325. #undef S
  4326. #define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
  4327. S(num_btn, WCD_MBHC_DEF_BUTTONS);
  4328. #undef S
  4329. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  4330. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  4331. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  4332. btn_high[0] = 75;
  4333. btn_high[1] = 150;
  4334. btn_high[2] = 237;
  4335. btn_high[3] = 500;
  4336. btn_high[4] = 500;
  4337. btn_high[5] = 500;
  4338. btn_high[6] = 500;
  4339. btn_high[7] = 500;
  4340. return wcd_mbhc_cal;
  4341. }
  4342. static int msm_snd_hw_params(struct snd_pcm_substream *substream,
  4343. struct snd_pcm_hw_params *params)
  4344. {
  4345. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4346. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4347. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4348. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4349. int ret = 0;
  4350. u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4351. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4352. u32 user_set_tx_ch = 0;
  4353. u32 rx_ch_count;
  4354. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4355. ret = snd_soc_dai_get_channel_map(codec_dai,
  4356. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4357. if (ret < 0) {
  4358. pr_err("%s: failed to get codec chan map, err:%d\n",
  4359. __func__, ret);
  4360. goto err;
  4361. }
  4362. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
  4363. pr_debug("%s: rx_5_ch=%d\n", __func__,
  4364. slim_rx_cfg[5].channels);
  4365. rx_ch_count = slim_rx_cfg[5].channels;
  4366. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
  4367. pr_debug("%s: rx_2_ch=%d\n", __func__,
  4368. slim_rx_cfg[2].channels);
  4369. rx_ch_count = slim_rx_cfg[2].channels;
  4370. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
  4371. pr_debug("%s: rx_6_ch=%d\n", __func__,
  4372. slim_rx_cfg[6].channels);
  4373. rx_ch_count = slim_rx_cfg[6].channels;
  4374. } else {
  4375. pr_debug("%s: rx_0_ch=%d\n", __func__,
  4376. slim_rx_cfg[0].channels);
  4377. rx_ch_count = slim_rx_cfg[0].channels;
  4378. }
  4379. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4380. rx_ch_count, rx_ch);
  4381. if (ret < 0) {
  4382. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4383. __func__, ret);
  4384. goto err;
  4385. }
  4386. } else {
  4387. pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
  4388. codec_dai->name, codec_dai->id, user_set_tx_ch);
  4389. ret = snd_soc_dai_get_channel_map(codec_dai,
  4390. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4391. if (ret < 0) {
  4392. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4393. __func__, ret);
  4394. goto err;
  4395. }
  4396. /* For <codec>_tx1 case */
  4397. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
  4398. user_set_tx_ch = slim_tx_cfg[0].channels;
  4399. /* For <codec>_tx3 case */
  4400. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
  4401. user_set_tx_ch = slim_tx_cfg[1].channels;
  4402. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
  4403. user_set_tx_ch = msm_vi_feed_tx_ch;
  4404. else
  4405. user_set_tx_ch = tx_ch_cnt;
  4406. pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
  4407. __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
  4408. tx_ch_cnt, dai_link->id);
  4409. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4410. user_set_tx_ch, tx_ch, 0, 0);
  4411. if (ret < 0)
  4412. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4413. __func__, ret);
  4414. }
  4415. err:
  4416. return ret;
  4417. }
  4418. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  4419. struct snd_pcm_hw_params *params)
  4420. {
  4421. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4422. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4423. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4424. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4425. int ret = 0;
  4426. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  4427. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4428. u32 user_set_tx_ch = 0;
  4429. u32 user_set_rx_ch = 0;
  4430. u32 ch_id;
  4431. ret = snd_soc_dai_get_channel_map(codec_dai,
  4432. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  4433. &rx_ch_cdc_dma);
  4434. if (ret < 0) {
  4435. pr_err("%s: failed to get codec chan map, err:%d\n",
  4436. __func__, ret);
  4437. goto err;
  4438. }
  4439. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4440. switch (dai_link->id) {
  4441. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  4442. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  4443. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  4444. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  4445. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  4446. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  4447. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  4448. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  4449. {
  4450. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4451. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  4452. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  4453. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  4454. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4455. user_set_rx_ch, &rx_ch_cdc_dma);
  4456. if (ret < 0) {
  4457. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4458. __func__, ret);
  4459. goto err;
  4460. }
  4461. }
  4462. break;
  4463. }
  4464. } else {
  4465. switch (dai_link->id) {
  4466. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  4467. {
  4468. user_set_tx_ch = msm_vi_feed_tx_ch;
  4469. }
  4470. break;
  4471. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  4472. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  4473. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  4474. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  4475. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  4476. {
  4477. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4478. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  4479. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  4480. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  4481. }
  4482. break;
  4483. }
  4484. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  4485. &tx_ch_cdc_dma, 0, 0);
  4486. if (ret < 0) {
  4487. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4488. __func__, ret);
  4489. goto err;
  4490. }
  4491. }
  4492. err:
  4493. return ret;
  4494. }
  4495. static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
  4496. struct snd_pcm_hw_params *params)
  4497. {
  4498. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4499. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4500. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4501. unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4502. unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
  4503. unsigned int num_tx_ch = 0;
  4504. unsigned int num_rx_ch = 0;
  4505. int ret = 0;
  4506. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4507. num_rx_ch = params_channels(params);
  4508. pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
  4509. codec_dai->name, codec_dai->id, num_rx_ch);
  4510. ret = snd_soc_dai_get_channel_map(codec_dai,
  4511. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4512. if (ret < 0) {
  4513. pr_err("%s: failed to get codec chan map, err:%d\n",
  4514. __func__, ret);
  4515. goto err;
  4516. }
  4517. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4518. num_rx_ch, rx_ch);
  4519. if (ret < 0) {
  4520. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4521. __func__, ret);
  4522. goto err;
  4523. }
  4524. } else {
  4525. num_tx_ch = params_channels(params);
  4526. pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
  4527. codec_dai->name, codec_dai->id, num_tx_ch);
  4528. ret = snd_soc_dai_get_channel_map(codec_dai,
  4529. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4530. if (ret < 0) {
  4531. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4532. __func__, ret);
  4533. goto err;
  4534. }
  4535. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4536. num_tx_ch, tx_ch, 0, 0);
  4537. if (ret < 0) {
  4538. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4539. __func__, ret);
  4540. goto err;
  4541. }
  4542. }
  4543. err:
  4544. return ret;
  4545. }
  4546. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  4547. struct snd_pcm_hw_params *params)
  4548. {
  4549. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4550. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4551. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4552. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4553. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  4554. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4555. int ret;
  4556. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  4557. codec_dai->name, codec_dai->id);
  4558. ret = snd_soc_dai_get_channel_map(codec_dai,
  4559. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4560. if (ret) {
  4561. dev_err(rtd->dev,
  4562. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  4563. __func__, ret);
  4564. goto err;
  4565. }
  4566. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  4567. __func__, tx_ch_cnt, dai_link->id);
  4568. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4569. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  4570. if (ret)
  4571. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  4572. __func__, ret);
  4573. err:
  4574. return ret;
  4575. }
  4576. static int msm_get_port_id(int be_id)
  4577. {
  4578. int afe_port_id;
  4579. switch (be_id) {
  4580. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  4581. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  4582. break;
  4583. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  4584. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  4585. break;
  4586. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  4587. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  4588. break;
  4589. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  4590. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  4591. break;
  4592. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  4593. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  4594. break;
  4595. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4596. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  4597. break;
  4598. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4599. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
  4600. break;
  4601. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4602. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
  4603. break;
  4604. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4605. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
  4606. break;
  4607. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4608. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
  4609. break;
  4610. default:
  4611. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  4612. afe_port_id = -EINVAL;
  4613. }
  4614. return afe_port_id;
  4615. }
  4616. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  4617. {
  4618. u32 bit_per_sample;
  4619. switch (bit_format) {
  4620. case SNDRV_PCM_FORMAT_S32_LE:
  4621. case SNDRV_PCM_FORMAT_S24_3LE:
  4622. case SNDRV_PCM_FORMAT_S24_LE:
  4623. bit_per_sample = 32;
  4624. break;
  4625. case SNDRV_PCM_FORMAT_S16_LE:
  4626. default:
  4627. bit_per_sample = 16;
  4628. break;
  4629. }
  4630. return bit_per_sample;
  4631. }
  4632. static void update_mi2s_clk_val(int dai_id, int stream)
  4633. {
  4634. u32 bit_per_sample;
  4635. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4636. bit_per_sample =
  4637. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  4638. mi2s_clk[dai_id].clk_freq_in_hz =
  4639. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4640. } else {
  4641. bit_per_sample =
  4642. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  4643. mi2s_clk[dai_id].clk_freq_in_hz =
  4644. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4645. }
  4646. }
  4647. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  4648. {
  4649. int ret = 0;
  4650. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4651. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4652. int port_id = 0;
  4653. int index = cpu_dai->id;
  4654. port_id = msm_get_port_id(rtd->dai_link->id);
  4655. if (port_id < 0) {
  4656. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  4657. ret = port_id;
  4658. goto err;
  4659. }
  4660. if (enable) {
  4661. update_mi2s_clk_val(index, substream->stream);
  4662. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  4663. mi2s_clk[index].clk_freq_in_hz);
  4664. }
  4665. mi2s_clk[index].enable = enable;
  4666. ret = afe_set_lpass_clock_v2(port_id,
  4667. &mi2s_clk[index]);
  4668. if (ret < 0) {
  4669. dev_err(rtd->card->dev,
  4670. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  4671. __func__, port_id, ret);
  4672. goto err;
  4673. }
  4674. err:
  4675. return ret;
  4676. }
  4677. static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
  4678. enum pinctrl_pin_state new_state)
  4679. {
  4680. int ret = 0;
  4681. int curr_state = 0;
  4682. if (pinctrl_info == NULL) {
  4683. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4684. ret = -EINVAL;
  4685. goto err;
  4686. }
  4687. if (pinctrl_info->pinctrl == NULL) {
  4688. pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
  4689. ret = -EINVAL;
  4690. goto err;
  4691. }
  4692. curr_state = pinctrl_info->curr_state;
  4693. pinctrl_info->curr_state = new_state;
  4694. pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
  4695. pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
  4696. if (curr_state == pinctrl_info->curr_state) {
  4697. pr_debug("%s: Already in same state\n", __func__);
  4698. goto err;
  4699. }
  4700. if (curr_state != STATE_DISABLE &&
  4701. pinctrl_info->curr_state != STATE_DISABLE) {
  4702. pr_debug("%s: state already active cannot switch\n", __func__);
  4703. ret = -EIO;
  4704. goto err;
  4705. }
  4706. switch (pinctrl_info->curr_state) {
  4707. case STATE_MI2S_ACTIVE:
  4708. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4709. pinctrl_info->mi2s_active);
  4710. if (ret) {
  4711. pr_err("%s: MI2S state select failed with %d\n",
  4712. __func__, ret);
  4713. ret = -EIO;
  4714. goto err;
  4715. }
  4716. break;
  4717. case STATE_TDM_ACTIVE:
  4718. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4719. pinctrl_info->tdm_active);
  4720. if (ret) {
  4721. pr_err("%s: TDM state select failed with %d\n",
  4722. __func__, ret);
  4723. ret = -EIO;
  4724. goto err;
  4725. }
  4726. break;
  4727. case STATE_DISABLE:
  4728. if (curr_state == STATE_MI2S_ACTIVE) {
  4729. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4730. pinctrl_info->mi2s_disable);
  4731. } else {
  4732. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4733. pinctrl_info->tdm_disable);
  4734. }
  4735. if (ret) {
  4736. pr_err("%s: state disable failed with %d\n",
  4737. __func__, ret);
  4738. ret = -EIO;
  4739. goto err;
  4740. }
  4741. break;
  4742. default:
  4743. pr_err("%s: TLMM pin state is invalid\n", __func__);
  4744. return -EINVAL;
  4745. }
  4746. err:
  4747. return ret;
  4748. }
  4749. static int msm_get_pinctrl(struct platform_device *pdev)
  4750. {
  4751. struct snd_soc_card *card = platform_get_drvdata(pdev);
  4752. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4753. struct msm_pinctrl_info *pinctrl_info = NULL;
  4754. struct pinctrl *pinctrl;
  4755. int ret = 0;
  4756. pinctrl_info = &pdata->pinctrl_info;
  4757. if (pinctrl_info == NULL) {
  4758. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4759. return -EINVAL;
  4760. }
  4761. pinctrl = devm_pinctrl_get(&pdev->dev);
  4762. if (IS_ERR_OR_NULL(pinctrl)) {
  4763. pr_err("%s: Unable to get pinctrl handle\n", __func__);
  4764. return -EINVAL;
  4765. }
  4766. pinctrl_info->pinctrl = pinctrl;
  4767. /* get all the states handles from Device Tree */
  4768. pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
  4769. "quat-mi2s-sleep");
  4770. if (IS_ERR(pinctrl_info->mi2s_disable)) {
  4771. pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
  4772. goto err;
  4773. }
  4774. pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
  4775. "quat-mi2s-active");
  4776. if (IS_ERR(pinctrl_info->mi2s_active)) {
  4777. pr_err("%s: could not get mi2s_active pinstate\n", __func__);
  4778. goto err;
  4779. }
  4780. pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
  4781. "quat-tdm-sleep");
  4782. if (IS_ERR(pinctrl_info->tdm_disable)) {
  4783. pr_err("%s: could not get tdm_disable pinstate\n", __func__);
  4784. goto err;
  4785. }
  4786. pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
  4787. "quat-tdm-active");
  4788. if (IS_ERR(pinctrl_info->tdm_active)) {
  4789. pr_err("%s: could not get tdm_active pinstate\n",
  4790. __func__);
  4791. goto err;
  4792. }
  4793. /* Reset the TLMM pins to a default state */
  4794. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4795. pinctrl_info->mi2s_disable);
  4796. if (ret != 0) {
  4797. pr_err("%s: Disable TLMM pins failed with %d\n",
  4798. __func__, ret);
  4799. ret = -EIO;
  4800. goto err;
  4801. }
  4802. pinctrl_info->curr_state = STATE_DISABLE;
  4803. return 0;
  4804. err:
  4805. devm_pinctrl_put(pinctrl);
  4806. pinctrl_info->pinctrl = NULL;
  4807. return -EINVAL;
  4808. }
  4809. static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  4810. struct snd_pcm_hw_params *params)
  4811. {
  4812. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4813. struct snd_interval *rate = hw_param_interval(params,
  4814. SNDRV_PCM_HW_PARAM_RATE);
  4815. struct snd_interval *channels = hw_param_interval(params,
  4816. SNDRV_PCM_HW_PARAM_CHANNELS);
  4817. if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
  4818. channels->min = channels->max =
  4819. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4820. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4821. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  4822. rate->min = rate->max =
  4823. tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  4824. } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
  4825. channels->min = channels->max =
  4826. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4827. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4828. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  4829. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  4830. } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
  4831. channels->min = channels->max =
  4832. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4833. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4834. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  4835. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  4836. } else {
  4837. pr_err("%s: dai id 0x%x not supported\n",
  4838. __func__, cpu_dai->id);
  4839. return -EINVAL;
  4840. }
  4841. pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
  4842. __func__, cpu_dai->id, channels->max, rate->max,
  4843. params_format(params));
  4844. return 0;
  4845. }
  4846. static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  4847. struct snd_pcm_hw_params *params)
  4848. {
  4849. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4850. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4851. int ret = 0;
  4852. int slot_width = 32;
  4853. int channels, slots;
  4854. unsigned int slot_mask, rate, clk_freq;
  4855. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  4856. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  4857. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4858. switch (cpu_dai->id) {
  4859. case AFE_PORT_ID_PRIMARY_TDM_RX:
  4860. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  4861. break;
  4862. case AFE_PORT_ID_SECONDARY_TDM_RX:
  4863. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4864. break;
  4865. case AFE_PORT_ID_TERTIARY_TDM_RX:
  4866. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  4867. break;
  4868. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  4869. slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4870. break;
  4871. case AFE_PORT_ID_QUINARY_TDM_RX:
  4872. slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4873. break;
  4874. case AFE_PORT_ID_PRIMARY_TDM_TX:
  4875. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  4876. break;
  4877. case AFE_PORT_ID_SECONDARY_TDM_TX:
  4878. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  4879. break;
  4880. case AFE_PORT_ID_TERTIARY_TDM_TX:
  4881. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  4882. break;
  4883. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  4884. slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  4885. break;
  4886. case AFE_PORT_ID_QUINARY_TDM_TX:
  4887. slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  4888. break;
  4889. default:
  4890. pr_err("%s: dai id 0x%x not supported\n",
  4891. __func__, cpu_dai->id);
  4892. return -EINVAL;
  4893. }
  4894. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4895. /*2 slot config - bits 0 and 1 set for the first two slots */
  4896. slot_mask = 0x0000FFFF >> (16-slots);
  4897. channels = slots;
  4898. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  4899. __func__, slot_width, slots);
  4900. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  4901. slots, slot_width);
  4902. if (ret < 0) {
  4903. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  4904. __func__, ret);
  4905. goto end;
  4906. }
  4907. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4908. 0, NULL, channels, slot_offset);
  4909. if (ret < 0) {
  4910. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  4911. __func__, ret);
  4912. goto end;
  4913. }
  4914. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  4915. /*2 slot config - bits 0 and 1 set for the first two slots */
  4916. slot_mask = 0x0000FFFF >> (16-slots);
  4917. channels = slots;
  4918. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  4919. __func__, slot_width, slots);
  4920. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  4921. slots, slot_width);
  4922. if (ret < 0) {
  4923. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  4924. __func__, ret);
  4925. goto end;
  4926. }
  4927. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4928. channels, slot_offset, 0, NULL);
  4929. if (ret < 0) {
  4930. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  4931. __func__, ret);
  4932. goto end;
  4933. }
  4934. } else {
  4935. ret = -EINVAL;
  4936. pr_err("%s: invalid use case, err:%d\n",
  4937. __func__, ret);
  4938. goto end;
  4939. }
  4940. rate = params_rate(params);
  4941. clk_freq = rate * slot_width * slots;
  4942. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  4943. if (ret < 0)
  4944. pr_err("%s: failed to set tdm clk, err:%d\n",
  4945. __func__, ret);
  4946. end:
  4947. return ret;
  4948. }
  4949. static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
  4950. {
  4951. int ret = 0;
  4952. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4953. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4954. struct snd_soc_card *card = rtd->card;
  4955. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4956. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  4957. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4958. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  4959. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  4960. ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
  4961. if (ret)
  4962. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  4963. __func__, ret);
  4964. }
  4965. return ret;
  4966. }
  4967. static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
  4968. {
  4969. int ret = 0;
  4970. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4971. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4972. struct snd_soc_card *card = rtd->card;
  4973. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4974. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  4975. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4976. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  4977. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  4978. ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
  4979. if (ret)
  4980. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  4981. __func__, ret);
  4982. }
  4983. }
  4984. static struct snd_soc_ops sm6150_tdm_be_ops = {
  4985. .hw_params = sm6150_tdm_snd_hw_params,
  4986. .startup = sm6150_tdm_snd_startup,
  4987. .shutdown = sm6150_tdm_snd_shutdown
  4988. };
  4989. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  4990. {
  4991. cpumask_t mask;
  4992. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  4993. pm_qos_remove_request(&substream->latency_pm_qos_req);
  4994. cpumask_clear(&mask);
  4995. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  4996. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  4997. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  4998. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  4999. pm_qos_add_request(&substream->latency_pm_qos_req,
  5000. PM_QOS_CPU_DMA_LATENCY,
  5001. MSM_LL_QOS_VALUE);
  5002. return 0;
  5003. }
  5004. static struct snd_soc_ops msm_fe_qos_ops = {
  5005. .prepare = msm_fe_qos_prepare,
  5006. };
  5007. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  5008. {
  5009. int ret = 0;
  5010. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5011. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5012. int index = cpu_dai->id;
  5013. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  5014. struct snd_soc_card *card = rtd->card;
  5015. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5016. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5017. int ret_pinctrl = 0;
  5018. dev_dbg(rtd->card->dev,
  5019. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  5020. __func__, substream->name, substream->stream,
  5021. cpu_dai->name, cpu_dai->id);
  5022. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5023. ret = -EINVAL;
  5024. dev_err(rtd->card->dev,
  5025. "%s: CPU DAI id (%d) out of range\n",
  5026. __func__, cpu_dai->id);
  5027. goto err;
  5028. }
  5029. /*
  5030. * Mutex protection in case the same MI2S
  5031. * interface using for both TX and RX so
  5032. * that the same clock won't be enable twice.
  5033. */
  5034. mutex_lock(&mi2s_intf_conf[index].lock);
  5035. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  5036. /* Check if msm needs to provide the clock to the interface */
  5037. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  5038. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  5039. fmt = SND_SOC_DAIFMT_CBM_CFM;
  5040. }
  5041. ret = msm_mi2s_set_sclk(substream, true);
  5042. if (ret < 0) {
  5043. dev_err(rtd->card->dev,
  5044. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  5045. __func__, ret);
  5046. goto clean_up;
  5047. }
  5048. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  5049. if (ret < 0) {
  5050. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  5051. __func__, index, ret);
  5052. goto clk_off;
  5053. }
  5054. if (index == QUAT_MI2S) {
  5055. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5056. STATE_MI2S_ACTIVE);
  5057. if (ret_pinctrl)
  5058. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5059. __func__, ret_pinctrl);
  5060. }
  5061. }
  5062. clk_off:
  5063. if (ret < 0)
  5064. msm_mi2s_set_sclk(substream, false);
  5065. clean_up:
  5066. if (ret < 0)
  5067. mi2s_intf_conf[index].ref_cnt--;
  5068. mutex_unlock(&mi2s_intf_conf[index].lock);
  5069. err:
  5070. return ret;
  5071. }
  5072. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  5073. {
  5074. int ret;
  5075. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5076. int index = rtd->cpu_dai->id;
  5077. struct snd_soc_card *card = rtd->card;
  5078. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5079. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5080. int ret_pinctrl = 0;
  5081. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  5082. substream->name, substream->stream);
  5083. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5084. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  5085. return;
  5086. }
  5087. mutex_lock(&mi2s_intf_conf[index].lock);
  5088. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  5089. ret = msm_mi2s_set_sclk(substream, false);
  5090. if (ret < 0)
  5091. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  5092. __func__, index, ret);
  5093. if (index == QUAT_MI2S) {
  5094. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5095. STATE_DISABLE);
  5096. if (ret_pinctrl)
  5097. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5098. __func__, ret_pinctrl);
  5099. }
  5100. }
  5101. mutex_unlock(&mi2s_intf_conf[index].lock);
  5102. }
  5103. static struct snd_soc_ops msm_mi2s_be_ops = {
  5104. .startup = msm_mi2s_snd_startup,
  5105. .shutdown = msm_mi2s_snd_shutdown,
  5106. };
  5107. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  5108. .hw_params = msm_snd_cdc_dma_hw_params,
  5109. };
  5110. static struct snd_soc_ops msm_be_ops = {
  5111. .hw_params = msm_snd_hw_params,
  5112. };
  5113. static struct snd_soc_ops msm_slimbus_2_be_ops = {
  5114. .hw_params = msm_slimbus_2_hw_params,
  5115. };
  5116. static struct snd_soc_ops msm_wcn_ops = {
  5117. .hw_params = msm_wcn_hw_params,
  5118. };
  5119. /* Digital audio interface glue - connects codec <---> CPU */
  5120. static struct snd_soc_dai_link msm_common_dai_links[] = {
  5121. /* FrontEnd DAI Links */
  5122. {/* hw:x,0 */
  5123. .name = MSM_DAILINK_NAME(Media1),
  5124. .stream_name = "MultiMedia1",
  5125. .cpu_dai_name = "MultiMedia1",
  5126. .platform_name = "msm-pcm-dsp.0",
  5127. .dynamic = 1,
  5128. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5129. .dpcm_playback = 1,
  5130. .dpcm_capture = 1,
  5131. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5132. SND_SOC_DPCM_TRIGGER_POST},
  5133. .codec_dai_name = "snd-soc-dummy-dai",
  5134. .codec_name = "snd-soc-dummy",
  5135. .ignore_suspend = 1,
  5136. /* this dainlink has playback support */
  5137. .ignore_pmdown_time = 1,
  5138. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  5139. },
  5140. {/* hw:x,1 */
  5141. .name = MSM_DAILINK_NAME(Media2),
  5142. .stream_name = "MultiMedia2",
  5143. .cpu_dai_name = "MultiMedia2",
  5144. .platform_name = "msm-pcm-dsp.0",
  5145. .dynamic = 1,
  5146. .dpcm_playback = 1,
  5147. .dpcm_capture = 1,
  5148. .codec_dai_name = "snd-soc-dummy-dai",
  5149. .codec_name = "snd-soc-dummy",
  5150. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5151. SND_SOC_DPCM_TRIGGER_POST},
  5152. .ignore_suspend = 1,
  5153. /* this dainlink has playback support */
  5154. .ignore_pmdown_time = 1,
  5155. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  5156. },
  5157. {/* hw:x,2 */
  5158. .name = "VoiceMMode1",
  5159. .stream_name = "VoiceMMode1",
  5160. .cpu_dai_name = "VoiceMMode1",
  5161. .platform_name = "msm-pcm-voice",
  5162. .dynamic = 1,
  5163. .dpcm_playback = 1,
  5164. .dpcm_capture = 1,
  5165. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5166. SND_SOC_DPCM_TRIGGER_POST},
  5167. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5168. .ignore_suspend = 1,
  5169. .ignore_pmdown_time = 1,
  5170. .codec_dai_name = "snd-soc-dummy-dai",
  5171. .codec_name = "snd-soc-dummy",
  5172. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  5173. },
  5174. {/* hw:x,3 */
  5175. .name = "MSM VoIP",
  5176. .stream_name = "VoIP",
  5177. .cpu_dai_name = "VoIP",
  5178. .platform_name = "msm-voip-dsp",
  5179. .dynamic = 1,
  5180. .dpcm_playback = 1,
  5181. .dpcm_capture = 1,
  5182. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5183. SND_SOC_DPCM_TRIGGER_POST},
  5184. .codec_dai_name = "snd-soc-dummy-dai",
  5185. .codec_name = "snd-soc-dummy",
  5186. .ignore_suspend = 1,
  5187. /* this dainlink has playback support */
  5188. .ignore_pmdown_time = 1,
  5189. .id = MSM_FRONTEND_DAI_VOIP,
  5190. },
  5191. {/* hw:x,4 */
  5192. .name = MSM_DAILINK_NAME(ULL),
  5193. .stream_name = "MultiMedia3",
  5194. .cpu_dai_name = "MultiMedia3",
  5195. .platform_name = "msm-pcm-dsp.2",
  5196. .dynamic = 1,
  5197. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5198. .dpcm_playback = 1,
  5199. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5200. SND_SOC_DPCM_TRIGGER_POST},
  5201. .codec_dai_name = "snd-soc-dummy-dai",
  5202. .codec_name = "snd-soc-dummy",
  5203. .ignore_suspend = 1,
  5204. /* this dainlink has playback support */
  5205. .ignore_pmdown_time = 1,
  5206. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  5207. },
  5208. /* Hostless PCM purpose */
  5209. {/* hw:x,5 */
  5210. .name = "SLIMBUS_0 Hostless",
  5211. .stream_name = "SLIMBUS_0 Hostless",
  5212. .cpu_dai_name = "SLIMBUS0_HOSTLESS",
  5213. .platform_name = "msm-pcm-hostless",
  5214. .dynamic = 1,
  5215. .dpcm_playback = 1,
  5216. .dpcm_capture = 1,
  5217. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5218. SND_SOC_DPCM_TRIGGER_POST},
  5219. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5220. .ignore_suspend = 1,
  5221. /* this dailink has playback support */
  5222. .ignore_pmdown_time = 1,
  5223. .codec_dai_name = "snd-soc-dummy-dai",
  5224. .codec_name = "snd-soc-dummy",
  5225. },
  5226. {/* hw:x,6 */
  5227. .name = "MSM AFE-PCM RX",
  5228. .stream_name = "AFE-PROXY RX",
  5229. .cpu_dai_name = "msm-dai-q6-dev.241",
  5230. .codec_name = "msm-stub-codec.1",
  5231. .codec_dai_name = "msm-stub-rx",
  5232. .platform_name = "msm-pcm-afe",
  5233. .dpcm_playback = 1,
  5234. .ignore_suspend = 1,
  5235. /* this dainlink has playback support */
  5236. .ignore_pmdown_time = 1,
  5237. },
  5238. {/* hw:x,7 */
  5239. .name = "MSM AFE-PCM TX",
  5240. .stream_name = "AFE-PROXY TX",
  5241. .cpu_dai_name = "msm-dai-q6-dev.240",
  5242. .codec_name = "msm-stub-codec.1",
  5243. .codec_dai_name = "msm-stub-tx",
  5244. .platform_name = "msm-pcm-afe",
  5245. .dpcm_capture = 1,
  5246. .ignore_suspend = 1,
  5247. },
  5248. {/* hw:x,8 */
  5249. .name = MSM_DAILINK_NAME(Compress1),
  5250. .stream_name = "Compress1",
  5251. .cpu_dai_name = "MultiMedia4",
  5252. .platform_name = "msm-compress-dsp",
  5253. .dynamic = 1,
  5254. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  5255. .dpcm_playback = 1,
  5256. .dpcm_capture = 1,
  5257. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5258. SND_SOC_DPCM_TRIGGER_POST},
  5259. .codec_dai_name = "snd-soc-dummy-dai",
  5260. .codec_name = "snd-soc-dummy",
  5261. .ignore_suspend = 1,
  5262. .ignore_pmdown_time = 1,
  5263. /* this dainlink has playback support */
  5264. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  5265. },
  5266. {/* hw:x,9 */
  5267. .name = "AUXPCM Hostless",
  5268. .stream_name = "AUXPCM Hostless",
  5269. .cpu_dai_name = "AUXPCM_HOSTLESS",
  5270. .platform_name = "msm-pcm-hostless",
  5271. .dynamic = 1,
  5272. .dpcm_playback = 1,
  5273. .dpcm_capture = 1,
  5274. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5275. SND_SOC_DPCM_TRIGGER_POST},
  5276. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5277. .ignore_suspend = 1,
  5278. /* this dainlink has playback support */
  5279. .ignore_pmdown_time = 1,
  5280. .codec_dai_name = "snd-soc-dummy-dai",
  5281. .codec_name = "snd-soc-dummy",
  5282. },
  5283. {/* hw:x,10 */
  5284. .name = "SLIMBUS_1 Hostless",
  5285. .stream_name = "SLIMBUS_1 Hostless",
  5286. .cpu_dai_name = "SLIMBUS1_HOSTLESS",
  5287. .platform_name = "msm-pcm-hostless",
  5288. .dynamic = 1,
  5289. .dpcm_playback = 1,
  5290. .dpcm_capture = 1,
  5291. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5292. SND_SOC_DPCM_TRIGGER_POST},
  5293. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5294. .ignore_suspend = 1,
  5295. /* this dailink has playback support */
  5296. .ignore_pmdown_time = 1,
  5297. .codec_dai_name = "snd-soc-dummy-dai",
  5298. .codec_name = "snd-soc-dummy",
  5299. },
  5300. {/* hw:x,11 */
  5301. .name = "SLIMBUS_3 Hostless",
  5302. .stream_name = "SLIMBUS_3 Hostless",
  5303. .cpu_dai_name = "SLIMBUS3_HOSTLESS",
  5304. .platform_name = "msm-pcm-hostless",
  5305. .dynamic = 1,
  5306. .dpcm_playback = 1,
  5307. .dpcm_capture = 1,
  5308. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5309. SND_SOC_DPCM_TRIGGER_POST},
  5310. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5311. .ignore_suspend = 1,
  5312. /* this dailink has playback support */
  5313. .ignore_pmdown_time = 1,
  5314. .codec_dai_name = "snd-soc-dummy-dai",
  5315. .codec_name = "snd-soc-dummy",
  5316. },
  5317. {/* hw:x,12 */
  5318. .name = "SLIMBUS_7 Hostless",
  5319. .stream_name = "SLIMBUS_7 Hostless",
  5320. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  5321. .platform_name = "msm-pcm-hostless",
  5322. .dynamic = 1,
  5323. .dpcm_playback = 1,
  5324. .dpcm_capture = 1,
  5325. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5326. SND_SOC_DPCM_TRIGGER_POST},
  5327. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5328. .ignore_suspend = 1,
  5329. /* this dailink has playback support */
  5330. .ignore_pmdown_time = 1,
  5331. .codec_dai_name = "snd-soc-dummy-dai",
  5332. .codec_name = "snd-soc-dummy",
  5333. },
  5334. {/* hw:x,13 */
  5335. .name = MSM_DAILINK_NAME(LowLatency),
  5336. .stream_name = "MultiMedia5",
  5337. .cpu_dai_name = "MultiMedia5",
  5338. .platform_name = "msm-pcm-dsp.1",
  5339. .dynamic = 1,
  5340. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5341. .dpcm_playback = 1,
  5342. .dpcm_capture = 1,
  5343. .codec_dai_name = "snd-soc-dummy-dai",
  5344. .codec_name = "snd-soc-dummy",
  5345. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5346. SND_SOC_DPCM_TRIGGER_POST},
  5347. .ignore_suspend = 1,
  5348. /* this dainlink has playback support */
  5349. .ignore_pmdown_time = 1,
  5350. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  5351. .ops = &msm_fe_qos_ops,
  5352. },
  5353. {/* hw:x,14 */
  5354. .name = "Listen 1 Audio Service",
  5355. .stream_name = "Listen 1 Audio Service",
  5356. .cpu_dai_name = "LSM1",
  5357. .platform_name = "msm-lsm-client",
  5358. .dynamic = 1,
  5359. .dpcm_capture = 1,
  5360. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5361. SND_SOC_DPCM_TRIGGER_POST },
  5362. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5363. .ignore_suspend = 1,
  5364. .codec_dai_name = "snd-soc-dummy-dai",
  5365. .codec_name = "snd-soc-dummy",
  5366. .id = MSM_FRONTEND_DAI_LSM1,
  5367. },
  5368. /* Multiple Tunnel instances */
  5369. {/* hw:x,15 */
  5370. .name = MSM_DAILINK_NAME(Compress2),
  5371. .stream_name = "Compress2",
  5372. .cpu_dai_name = "MultiMedia7",
  5373. .platform_name = "msm-compress-dsp",
  5374. .dynamic = 1,
  5375. .dpcm_playback = 1,
  5376. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5377. SND_SOC_DPCM_TRIGGER_POST},
  5378. .codec_dai_name = "snd-soc-dummy-dai",
  5379. .codec_name = "snd-soc-dummy",
  5380. .ignore_suspend = 1,
  5381. .ignore_pmdown_time = 1,
  5382. /* this dainlink has playback support */
  5383. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  5384. },
  5385. {/* hw:x,16 */
  5386. .name = MSM_DAILINK_NAME(MultiMedia10),
  5387. .stream_name = "MultiMedia10",
  5388. .cpu_dai_name = "MultiMedia10",
  5389. .platform_name = "msm-pcm-dsp.1",
  5390. .dynamic = 1,
  5391. .dpcm_playback = 1,
  5392. .dpcm_capture = 1,
  5393. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5394. SND_SOC_DPCM_TRIGGER_POST},
  5395. .codec_dai_name = "snd-soc-dummy-dai",
  5396. .codec_name = "snd-soc-dummy",
  5397. .ignore_suspend = 1,
  5398. .ignore_pmdown_time = 1,
  5399. /* this dainlink has playback support */
  5400. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  5401. },
  5402. {/* hw:x,17 */
  5403. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  5404. .stream_name = "MM_NOIRQ",
  5405. .cpu_dai_name = "MultiMedia8",
  5406. .platform_name = "msm-pcm-dsp-noirq",
  5407. .dynamic = 1,
  5408. .dpcm_playback = 1,
  5409. .dpcm_capture = 1,
  5410. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5411. SND_SOC_DPCM_TRIGGER_POST},
  5412. .codec_dai_name = "snd-soc-dummy-dai",
  5413. .codec_name = "snd-soc-dummy",
  5414. .ignore_suspend = 1,
  5415. .ignore_pmdown_time = 1,
  5416. /* this dainlink has playback support */
  5417. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  5418. .ops = &msm_fe_qos_ops,
  5419. },
  5420. /* HDMI Hostless */
  5421. {/* hw:x,18 */
  5422. .name = "HDMI_RX_HOSTLESS",
  5423. .stream_name = "HDMI_RX_HOSTLESS",
  5424. .cpu_dai_name = "HDMI_HOSTLESS",
  5425. .platform_name = "msm-pcm-hostless",
  5426. .dynamic = 1,
  5427. .dpcm_playback = 1,
  5428. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5429. SND_SOC_DPCM_TRIGGER_POST},
  5430. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5431. .ignore_suspend = 1,
  5432. .ignore_pmdown_time = 1,
  5433. .codec_dai_name = "snd-soc-dummy-dai",
  5434. .codec_name = "snd-soc-dummy",
  5435. },
  5436. {/* hw:x,19 */
  5437. .name = "VoiceMMode2",
  5438. .stream_name = "VoiceMMode2",
  5439. .cpu_dai_name = "VoiceMMode2",
  5440. .platform_name = "msm-pcm-voice",
  5441. .dynamic = 1,
  5442. .dpcm_playback = 1,
  5443. .dpcm_capture = 1,
  5444. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5445. SND_SOC_DPCM_TRIGGER_POST},
  5446. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5447. .ignore_suspend = 1,
  5448. .ignore_pmdown_time = 1,
  5449. .codec_dai_name = "snd-soc-dummy-dai",
  5450. .codec_name = "snd-soc-dummy",
  5451. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  5452. },
  5453. /* LSM FE */
  5454. {/* hw:x,20 */
  5455. .name = "Listen 2 Audio Service",
  5456. .stream_name = "Listen 2 Audio Service",
  5457. .cpu_dai_name = "LSM2",
  5458. .platform_name = "msm-lsm-client",
  5459. .dynamic = 1,
  5460. .dpcm_capture = 1,
  5461. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5462. SND_SOC_DPCM_TRIGGER_POST },
  5463. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5464. .ignore_suspend = 1,
  5465. .codec_dai_name = "snd-soc-dummy-dai",
  5466. .codec_name = "snd-soc-dummy",
  5467. .id = MSM_FRONTEND_DAI_LSM2,
  5468. },
  5469. {/* hw:x,21 */
  5470. .name = "Listen 3 Audio Service",
  5471. .stream_name = "Listen 3 Audio Service",
  5472. .cpu_dai_name = "LSM3",
  5473. .platform_name = "msm-lsm-client",
  5474. .dynamic = 1,
  5475. .dpcm_capture = 1,
  5476. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5477. SND_SOC_DPCM_TRIGGER_POST },
  5478. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5479. .ignore_suspend = 1,
  5480. .codec_dai_name = "snd-soc-dummy-dai",
  5481. .codec_name = "snd-soc-dummy",
  5482. .id = MSM_FRONTEND_DAI_LSM3,
  5483. },
  5484. {/* hw:x,22 */
  5485. .name = "Listen 4 Audio Service",
  5486. .stream_name = "Listen 4 Audio Service",
  5487. .cpu_dai_name = "LSM4",
  5488. .platform_name = "msm-lsm-client",
  5489. .dynamic = 1,
  5490. .dpcm_capture = 1,
  5491. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5492. SND_SOC_DPCM_TRIGGER_POST },
  5493. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5494. .ignore_suspend = 1,
  5495. .codec_dai_name = "snd-soc-dummy-dai",
  5496. .codec_name = "snd-soc-dummy",
  5497. .id = MSM_FRONTEND_DAI_LSM4,
  5498. },
  5499. {/* hw:x,23 */
  5500. .name = "Listen 5 Audio Service",
  5501. .stream_name = "Listen 5 Audio Service",
  5502. .cpu_dai_name = "LSM5",
  5503. .platform_name = "msm-lsm-client",
  5504. .dynamic = 1,
  5505. .dpcm_capture = 1,
  5506. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5507. SND_SOC_DPCM_TRIGGER_POST },
  5508. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5509. .ignore_suspend = 1,
  5510. .codec_dai_name = "snd-soc-dummy-dai",
  5511. .codec_name = "snd-soc-dummy",
  5512. .id = MSM_FRONTEND_DAI_LSM5,
  5513. },
  5514. {/* hw:x,24 */
  5515. .name = "Listen 6 Audio Service",
  5516. .stream_name = "Listen 6 Audio Service",
  5517. .cpu_dai_name = "LSM6",
  5518. .platform_name = "msm-lsm-client",
  5519. .dynamic = 1,
  5520. .dpcm_capture = 1,
  5521. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5522. SND_SOC_DPCM_TRIGGER_POST },
  5523. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5524. .ignore_suspend = 1,
  5525. .codec_dai_name = "snd-soc-dummy-dai",
  5526. .codec_name = "snd-soc-dummy",
  5527. .id = MSM_FRONTEND_DAI_LSM6,
  5528. },
  5529. {/* hw:x,25 */
  5530. .name = "Listen 7 Audio Service",
  5531. .stream_name = "Listen 7 Audio Service",
  5532. .cpu_dai_name = "LSM7",
  5533. .platform_name = "msm-lsm-client",
  5534. .dynamic = 1,
  5535. .dpcm_capture = 1,
  5536. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5537. SND_SOC_DPCM_TRIGGER_POST },
  5538. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5539. .ignore_suspend = 1,
  5540. .codec_dai_name = "snd-soc-dummy-dai",
  5541. .codec_name = "snd-soc-dummy",
  5542. .id = MSM_FRONTEND_DAI_LSM7,
  5543. },
  5544. {/* hw:x,26 */
  5545. .name = "Listen 8 Audio Service",
  5546. .stream_name = "Listen 8 Audio Service",
  5547. .cpu_dai_name = "LSM8",
  5548. .platform_name = "msm-lsm-client",
  5549. .dynamic = 1,
  5550. .dpcm_capture = 1,
  5551. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5552. SND_SOC_DPCM_TRIGGER_POST },
  5553. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5554. .ignore_suspend = 1,
  5555. .codec_dai_name = "snd-soc-dummy-dai",
  5556. .codec_name = "snd-soc-dummy",
  5557. .id = MSM_FRONTEND_DAI_LSM8,
  5558. },
  5559. {/* hw:x,27 */
  5560. .name = MSM_DAILINK_NAME(Media9),
  5561. .stream_name = "MultiMedia9",
  5562. .cpu_dai_name = "MultiMedia9",
  5563. .platform_name = "msm-pcm-dsp.0",
  5564. .dynamic = 1,
  5565. .dpcm_playback = 1,
  5566. .dpcm_capture = 1,
  5567. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5568. SND_SOC_DPCM_TRIGGER_POST},
  5569. .codec_dai_name = "snd-soc-dummy-dai",
  5570. .codec_name = "snd-soc-dummy",
  5571. .ignore_suspend = 1,
  5572. /* this dainlink has playback support */
  5573. .ignore_pmdown_time = 1,
  5574. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  5575. },
  5576. {/* hw:x,28 */
  5577. .name = MSM_DAILINK_NAME(Compress4),
  5578. .stream_name = "Compress4",
  5579. .cpu_dai_name = "MultiMedia11",
  5580. .platform_name = "msm-compress-dsp",
  5581. .dynamic = 1,
  5582. .dpcm_playback = 1,
  5583. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5584. SND_SOC_DPCM_TRIGGER_POST},
  5585. .codec_dai_name = "snd-soc-dummy-dai",
  5586. .codec_name = "snd-soc-dummy",
  5587. .ignore_suspend = 1,
  5588. .ignore_pmdown_time = 1,
  5589. /* this dainlink has playback support */
  5590. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  5591. },
  5592. {/* hw:x,29 */
  5593. .name = MSM_DAILINK_NAME(Compress5),
  5594. .stream_name = "Compress5",
  5595. .cpu_dai_name = "MultiMedia12",
  5596. .platform_name = "msm-compress-dsp",
  5597. .dynamic = 1,
  5598. .dpcm_playback = 1,
  5599. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5600. SND_SOC_DPCM_TRIGGER_POST},
  5601. .codec_dai_name = "snd-soc-dummy-dai",
  5602. .codec_name = "snd-soc-dummy",
  5603. .ignore_suspend = 1,
  5604. .ignore_pmdown_time = 1,
  5605. /* this dainlink has playback support */
  5606. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  5607. },
  5608. {/* hw:x,30 */
  5609. .name = MSM_DAILINK_NAME(Compress6),
  5610. .stream_name = "Compress6",
  5611. .cpu_dai_name = "MultiMedia13",
  5612. .platform_name = "msm-compress-dsp",
  5613. .dynamic = 1,
  5614. .dpcm_playback = 1,
  5615. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5616. SND_SOC_DPCM_TRIGGER_POST},
  5617. .codec_dai_name = "snd-soc-dummy-dai",
  5618. .codec_name = "snd-soc-dummy",
  5619. .ignore_suspend = 1,
  5620. .ignore_pmdown_time = 1,
  5621. /* this dainlink has playback support */
  5622. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  5623. },
  5624. {/* hw:x,31 */
  5625. .name = MSM_DAILINK_NAME(Compress7),
  5626. .stream_name = "Compress7",
  5627. .cpu_dai_name = "MultiMedia14",
  5628. .platform_name = "msm-compress-dsp",
  5629. .dynamic = 1,
  5630. .dpcm_playback = 1,
  5631. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5632. SND_SOC_DPCM_TRIGGER_POST},
  5633. .codec_dai_name = "snd-soc-dummy-dai",
  5634. .codec_name = "snd-soc-dummy",
  5635. .ignore_suspend = 1,
  5636. .ignore_pmdown_time = 1,
  5637. /* this dainlink has playback support */
  5638. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  5639. },
  5640. {/* hw:x,32 */
  5641. .name = MSM_DAILINK_NAME(Compress8),
  5642. .stream_name = "Compress8",
  5643. .cpu_dai_name = "MultiMedia15",
  5644. .platform_name = "msm-compress-dsp",
  5645. .dynamic = 1,
  5646. .dpcm_playback = 1,
  5647. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5648. SND_SOC_DPCM_TRIGGER_POST},
  5649. .codec_dai_name = "snd-soc-dummy-dai",
  5650. .codec_name = "snd-soc-dummy",
  5651. .ignore_suspend = 1,
  5652. .ignore_pmdown_time = 1,
  5653. /* this dainlink has playback support */
  5654. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  5655. },
  5656. {/* hw:x,33 */
  5657. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  5658. .stream_name = "MM_NOIRQ_2",
  5659. .cpu_dai_name = "MultiMedia16",
  5660. .platform_name = "msm-pcm-dsp-noirq",
  5661. .dynamic = 1,
  5662. .dpcm_playback = 1,
  5663. .dpcm_capture = 1,
  5664. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5665. SND_SOC_DPCM_TRIGGER_POST},
  5666. .codec_dai_name = "snd-soc-dummy-dai",
  5667. .codec_name = "snd-soc-dummy",
  5668. .ignore_suspend = 1,
  5669. .ignore_pmdown_time = 1,
  5670. /* this dainlink has playback support */
  5671. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  5672. },
  5673. {/* hw:x,34 */
  5674. .name = "SLIMBUS_8 Hostless",
  5675. .stream_name = "SLIMBUS8_HOSTLESS Capture",
  5676. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  5677. .platform_name = "msm-pcm-hostless",
  5678. .dynamic = 1,
  5679. .dpcm_capture = 1,
  5680. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5681. SND_SOC_DPCM_TRIGGER_POST},
  5682. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5683. .ignore_suspend = 1,
  5684. .codec_dai_name = "snd-soc-dummy-dai",
  5685. .codec_name = "snd-soc-dummy",
  5686. },
  5687. {/* hw:x,35 */
  5688. .name = "CDC_DMA Hostless",
  5689. .stream_name = "CDC_DMA Hostless",
  5690. .cpu_dai_name = "CDC_DMA_HOSTLESS",
  5691. .platform_name = "msm-pcm-hostless",
  5692. .dynamic = 1,
  5693. .dpcm_playback = 1,
  5694. .dpcm_capture = 1,
  5695. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5696. SND_SOC_DPCM_TRIGGER_POST},
  5697. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5698. .ignore_suspend = 1,
  5699. /* this dailink has playback support */
  5700. .ignore_pmdown_time = 1,
  5701. .codec_dai_name = "snd-soc-dummy-dai",
  5702. .codec_name = "snd-soc-dummy",
  5703. },
  5704. {/* hw:x,36 */
  5705. .name = "TX3_CDC_DMA Hostless",
  5706. .stream_name = "TX3_CDC_DMA Hostless",
  5707. .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
  5708. .platform_name = "msm-pcm-hostless",
  5709. .dynamic = 1,
  5710. .dpcm_capture = 1,
  5711. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5712. SND_SOC_DPCM_TRIGGER_POST},
  5713. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5714. .ignore_suspend = 1,
  5715. .codec_dai_name = "snd-soc-dummy-dai",
  5716. .codec_name = "snd-soc-dummy",
  5717. },
  5718. };
  5719. static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
  5720. {/* hw:x,37 */
  5721. .name = LPASS_BE_SLIMBUS_4_TX,
  5722. .stream_name = "Slimbus4 Capture",
  5723. .cpu_dai_name = "msm-dai-q6-dev.16393",
  5724. .platform_name = "msm-pcm-hostless",
  5725. .codec_name = "tavil_codec",
  5726. .codec_dai_name = "tavil_vifeedback",
  5727. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  5728. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5729. .ops = &msm_be_ops,
  5730. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5731. .ignore_suspend = 1,
  5732. },
  5733. /* Ultrasound RX DAI Link */
  5734. {/* hw:x,38 */
  5735. .name = "SLIMBUS_2 Hostless Playback",
  5736. .stream_name = "SLIMBUS_2 Hostless Playback",
  5737. .cpu_dai_name = "msm-dai-q6-dev.16388",
  5738. .platform_name = "msm-pcm-hostless",
  5739. .codec_name = "tavil_codec",
  5740. .codec_dai_name = "tavil_rx2",
  5741. .ignore_suspend = 1,
  5742. .ignore_pmdown_time = 1,
  5743. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5744. .ops = &msm_slimbus_2_be_ops,
  5745. },
  5746. /* Ultrasound TX DAI Link */
  5747. {/* hw:x,39 */
  5748. .name = "SLIMBUS_2 Hostless Capture",
  5749. .stream_name = "SLIMBUS_2 Hostless Capture",
  5750. .cpu_dai_name = "msm-dai-q6-dev.16389",
  5751. .platform_name = "msm-pcm-hostless",
  5752. .codec_name = "tavil_codec",
  5753. .codec_dai_name = "tavil_tx2",
  5754. .ignore_suspend = 1,
  5755. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5756. .ops = &msm_slimbus_2_be_ops,
  5757. },
  5758. };
  5759. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  5760. {/* hw:x,37 */
  5761. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  5762. .stream_name = "WSA CDC DMA0 Capture",
  5763. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  5764. .platform_name = "msm-pcm-hostless",
  5765. .codec_name = "bolero_codec",
  5766. .codec_dai_name = "wsa_macro_vifeedback",
  5767. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  5768. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5769. .ignore_suspend = 1,
  5770. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5771. .ops = &msm_cdc_dma_be_ops,
  5772. },
  5773. };
  5774. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  5775. {
  5776. .name = MSM_DAILINK_NAME(ASM Loopback),
  5777. .stream_name = "MultiMedia6",
  5778. .cpu_dai_name = "MultiMedia6",
  5779. .platform_name = "msm-pcm-loopback",
  5780. .dynamic = 1,
  5781. .dpcm_playback = 1,
  5782. .dpcm_capture = 1,
  5783. .codec_dai_name = "snd-soc-dummy-dai",
  5784. .codec_name = "snd-soc-dummy",
  5785. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5786. SND_SOC_DPCM_TRIGGER_POST},
  5787. .ignore_suspend = 1,
  5788. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5789. .ignore_pmdown_time = 1,
  5790. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  5791. },
  5792. {
  5793. .name = "USB Audio Hostless",
  5794. .stream_name = "USB Audio Hostless",
  5795. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  5796. .platform_name = "msm-pcm-hostless",
  5797. .dynamic = 1,
  5798. .dpcm_playback = 1,
  5799. .dpcm_capture = 1,
  5800. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5801. SND_SOC_DPCM_TRIGGER_POST},
  5802. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5803. .ignore_suspend = 1,
  5804. .ignore_pmdown_time = 1,
  5805. .codec_dai_name = "snd-soc-dummy-dai",
  5806. .codec_name = "snd-soc-dummy",
  5807. },
  5808. };
  5809. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  5810. /* Backend AFE DAI Links */
  5811. {
  5812. .name = LPASS_BE_AFE_PCM_RX,
  5813. .stream_name = "AFE Playback",
  5814. .cpu_dai_name = "msm-dai-q6-dev.224",
  5815. .platform_name = "msm-pcm-routing",
  5816. .codec_name = "msm-stub-codec.1",
  5817. .codec_dai_name = "msm-stub-rx",
  5818. .no_pcm = 1,
  5819. .dpcm_playback = 1,
  5820. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  5821. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5822. /* this dainlink has playback support */
  5823. .ignore_pmdown_time = 1,
  5824. .ignore_suspend = 1,
  5825. },
  5826. {
  5827. .name = LPASS_BE_AFE_PCM_TX,
  5828. .stream_name = "AFE Capture",
  5829. .cpu_dai_name = "msm-dai-q6-dev.225",
  5830. .platform_name = "msm-pcm-routing",
  5831. .codec_name = "msm-stub-codec.1",
  5832. .codec_dai_name = "msm-stub-tx",
  5833. .no_pcm = 1,
  5834. .dpcm_capture = 1,
  5835. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  5836. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5837. .ignore_suspend = 1,
  5838. },
  5839. /* Incall Record Uplink BACK END DAI Link */
  5840. {
  5841. .name = LPASS_BE_INCALL_RECORD_TX,
  5842. .stream_name = "Voice Uplink Capture",
  5843. .cpu_dai_name = "msm-dai-q6-dev.32772",
  5844. .platform_name = "msm-pcm-routing",
  5845. .codec_name = "msm-stub-codec.1",
  5846. .codec_dai_name = "msm-stub-tx",
  5847. .no_pcm = 1,
  5848. .dpcm_capture = 1,
  5849. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  5850. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5851. .ignore_suspend = 1,
  5852. },
  5853. /* Incall Record Downlink BACK END DAI Link */
  5854. {
  5855. .name = LPASS_BE_INCALL_RECORD_RX,
  5856. .stream_name = "Voice Downlink Capture",
  5857. .cpu_dai_name = "msm-dai-q6-dev.32771",
  5858. .platform_name = "msm-pcm-routing",
  5859. .codec_name = "msm-stub-codec.1",
  5860. .codec_dai_name = "msm-stub-tx",
  5861. .no_pcm = 1,
  5862. .dpcm_capture = 1,
  5863. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  5864. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5865. .ignore_suspend = 1,
  5866. },
  5867. /* Incall Music BACK END DAI Link */
  5868. {
  5869. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  5870. .stream_name = "Voice Farend Playback",
  5871. .cpu_dai_name = "msm-dai-q6-dev.32773",
  5872. .platform_name = "msm-pcm-routing",
  5873. .codec_name = "msm-stub-codec.1",
  5874. .codec_dai_name = "msm-stub-rx",
  5875. .no_pcm = 1,
  5876. .dpcm_playback = 1,
  5877. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  5878. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5879. .ignore_suspend = 1,
  5880. .ignore_pmdown_time = 1,
  5881. },
  5882. /* Incall Music 2 BACK END DAI Link */
  5883. {
  5884. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  5885. .stream_name = "Voice2 Farend Playback",
  5886. .cpu_dai_name = "msm-dai-q6-dev.32770",
  5887. .platform_name = "msm-pcm-routing",
  5888. .codec_name = "msm-stub-codec.1",
  5889. .codec_dai_name = "msm-stub-rx",
  5890. .no_pcm = 1,
  5891. .dpcm_playback = 1,
  5892. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  5893. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5894. .ignore_suspend = 1,
  5895. .ignore_pmdown_time = 1,
  5896. },
  5897. {
  5898. .name = LPASS_BE_USB_AUDIO_RX,
  5899. .stream_name = "USB Audio Playback",
  5900. .cpu_dai_name = "msm-dai-q6-dev.28672",
  5901. .platform_name = "msm-pcm-routing",
  5902. .codec_name = "msm-stub-codec.1",
  5903. .codec_dai_name = "msm-stub-rx",
  5904. .no_pcm = 1,
  5905. .dpcm_playback = 1,
  5906. .id = MSM_BACKEND_DAI_USB_RX,
  5907. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5908. .ignore_pmdown_time = 1,
  5909. .ignore_suspend = 1,
  5910. },
  5911. {
  5912. .name = LPASS_BE_USB_AUDIO_TX,
  5913. .stream_name = "USB Audio Capture",
  5914. .cpu_dai_name = "msm-dai-q6-dev.28673",
  5915. .platform_name = "msm-pcm-routing",
  5916. .codec_name = "msm-stub-codec.1",
  5917. .codec_dai_name = "msm-stub-tx",
  5918. .no_pcm = 1,
  5919. .dpcm_capture = 1,
  5920. .id = MSM_BACKEND_DAI_USB_TX,
  5921. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5922. .ignore_suspend = 1,
  5923. },
  5924. {
  5925. .name = LPASS_BE_PRI_TDM_RX_0,
  5926. .stream_name = "Primary TDM0 Playback",
  5927. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  5928. .platform_name = "msm-pcm-routing",
  5929. .codec_name = "msm-stub-codec.1",
  5930. .codec_dai_name = "msm-stub-rx",
  5931. .no_pcm = 1,
  5932. .dpcm_playback = 1,
  5933. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  5934. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5935. .ops = &sm6150_tdm_be_ops,
  5936. .ignore_suspend = 1,
  5937. .ignore_pmdown_time = 1,
  5938. },
  5939. {
  5940. .name = LPASS_BE_PRI_TDM_TX_0,
  5941. .stream_name = "Primary TDM0 Capture",
  5942. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  5943. .platform_name = "msm-pcm-routing",
  5944. .codec_name = "msm-stub-codec.1",
  5945. .codec_dai_name = "msm-stub-tx",
  5946. .no_pcm = 1,
  5947. .dpcm_capture = 1,
  5948. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  5949. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5950. .ops = &sm6150_tdm_be_ops,
  5951. .ignore_suspend = 1,
  5952. },
  5953. {
  5954. .name = LPASS_BE_SEC_TDM_RX_0,
  5955. .stream_name = "Secondary TDM0 Playback",
  5956. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  5957. .platform_name = "msm-pcm-routing",
  5958. .codec_name = "msm-stub-codec.1",
  5959. .codec_dai_name = "msm-stub-rx",
  5960. .no_pcm = 1,
  5961. .dpcm_playback = 1,
  5962. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  5963. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5964. .ops = &sm6150_tdm_be_ops,
  5965. .ignore_suspend = 1,
  5966. .ignore_pmdown_time = 1,
  5967. },
  5968. {
  5969. .name = LPASS_BE_SEC_TDM_TX_0,
  5970. .stream_name = "Secondary TDM0 Capture",
  5971. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  5972. .platform_name = "msm-pcm-routing",
  5973. .codec_name = "msm-stub-codec.1",
  5974. .codec_dai_name = "msm-stub-tx",
  5975. .no_pcm = 1,
  5976. .dpcm_capture = 1,
  5977. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  5978. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5979. .ops = &sm6150_tdm_be_ops,
  5980. .ignore_suspend = 1,
  5981. },
  5982. {
  5983. .name = LPASS_BE_TERT_TDM_RX_0,
  5984. .stream_name = "Tertiary TDM0 Playback",
  5985. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  5986. .platform_name = "msm-pcm-routing",
  5987. .codec_name = "msm-stub-codec.1",
  5988. .codec_dai_name = "msm-stub-rx",
  5989. .no_pcm = 1,
  5990. .dpcm_playback = 1,
  5991. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  5992. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5993. .ops = &sm6150_tdm_be_ops,
  5994. .ignore_suspend = 1,
  5995. .ignore_pmdown_time = 1,
  5996. },
  5997. {
  5998. .name = LPASS_BE_TERT_TDM_TX_0,
  5999. .stream_name = "Tertiary TDM0 Capture",
  6000. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  6001. .platform_name = "msm-pcm-routing",
  6002. .codec_name = "msm-stub-codec.1",
  6003. .codec_dai_name = "msm-stub-tx",
  6004. .no_pcm = 1,
  6005. .dpcm_capture = 1,
  6006. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  6007. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6008. .ops = &sm6150_tdm_be_ops,
  6009. .ignore_suspend = 1,
  6010. },
  6011. {
  6012. .name = LPASS_BE_QUAT_TDM_RX_0,
  6013. .stream_name = "Quaternary TDM0 Playback",
  6014. .cpu_dai_name = "msm-dai-q6-tdm.36912",
  6015. .platform_name = "msm-pcm-routing",
  6016. .codec_name = "msm-stub-codec.1",
  6017. .codec_dai_name = "msm-stub-rx",
  6018. .no_pcm = 1,
  6019. .dpcm_playback = 1,
  6020. .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
  6021. .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
  6022. .ops = &sm6150_tdm_be_ops,
  6023. .ignore_suspend = 1,
  6024. .ignore_pmdown_time = 1,
  6025. },
  6026. {
  6027. .name = LPASS_BE_QUAT_TDM_TX_0,
  6028. .stream_name = "Quaternary TDM0 Capture",
  6029. .cpu_dai_name = "msm-dai-q6-tdm.36913",
  6030. .platform_name = "msm-pcm-routing",
  6031. .codec_name = "msm-stub-codec.1",
  6032. .codec_dai_name = "msm-stub-tx",
  6033. .no_pcm = 1,
  6034. .dpcm_capture = 1,
  6035. .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
  6036. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6037. .ops = &sm6150_tdm_be_ops,
  6038. .ignore_suspend = 1,
  6039. },
  6040. };
  6041. static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
  6042. {
  6043. .name = LPASS_BE_SLIMBUS_0_RX,
  6044. .stream_name = "Slimbus Playback",
  6045. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6046. .platform_name = "msm-pcm-routing",
  6047. .codec_name = "tavil_codec",
  6048. .codec_dai_name = "tavil_rx1",
  6049. .no_pcm = 1,
  6050. .dpcm_playback = 1,
  6051. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6052. .init = &msm_audrx_tavil_init,
  6053. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6054. /* this dainlink has playback support */
  6055. .ignore_pmdown_time = 1,
  6056. .ignore_suspend = 1,
  6057. .ops = &msm_be_ops,
  6058. },
  6059. {
  6060. .name = LPASS_BE_SLIMBUS_0_TX,
  6061. .stream_name = "Slimbus Capture",
  6062. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6063. .platform_name = "msm-pcm-routing",
  6064. .codec_name = "tavil_codec",
  6065. .codec_dai_name = "tavil_tx1",
  6066. .no_pcm = 1,
  6067. .dpcm_capture = 1,
  6068. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6069. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6070. .ignore_suspend = 1,
  6071. .ops = &msm_be_ops,
  6072. },
  6073. {
  6074. .name = LPASS_BE_SLIMBUS_1_RX,
  6075. .stream_name = "Slimbus1 Playback",
  6076. .cpu_dai_name = "msm-dai-q6-dev.16386",
  6077. .platform_name = "msm-pcm-routing",
  6078. .codec_name = "tavil_codec",
  6079. .codec_dai_name = "tavil_rx1",
  6080. .no_pcm = 1,
  6081. .dpcm_playback = 1,
  6082. .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
  6083. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6084. .ops = &msm_be_ops,
  6085. /* dai link has playback support */
  6086. .ignore_pmdown_time = 1,
  6087. .ignore_suspend = 1,
  6088. },
  6089. {
  6090. .name = LPASS_BE_SLIMBUS_1_TX,
  6091. .stream_name = "Slimbus1 Capture",
  6092. .cpu_dai_name = "msm-dai-q6-dev.16387",
  6093. .platform_name = "msm-pcm-routing",
  6094. .codec_name = "tavil_codec",
  6095. .codec_dai_name = "tavil_tx3",
  6096. .no_pcm = 1,
  6097. .dpcm_capture = 1,
  6098. .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
  6099. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6100. .ops = &msm_be_ops,
  6101. .ignore_suspend = 1,
  6102. },
  6103. {
  6104. .name = LPASS_BE_SLIMBUS_2_RX,
  6105. .stream_name = "Slimbus2 Playback",
  6106. .cpu_dai_name = "msm-dai-q6-dev.16388",
  6107. .platform_name = "msm-pcm-routing",
  6108. .codec_name = "tavil_codec",
  6109. .codec_dai_name = "tavil_rx2",
  6110. .no_pcm = 1,
  6111. .dpcm_playback = 1,
  6112. .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
  6113. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6114. .ops = &msm_be_ops,
  6115. .ignore_pmdown_time = 1,
  6116. .ignore_suspend = 1,
  6117. },
  6118. {
  6119. .name = LPASS_BE_SLIMBUS_3_RX,
  6120. .stream_name = "Slimbus3 Playback",
  6121. .cpu_dai_name = "msm-dai-q6-dev.16390",
  6122. .platform_name = "msm-pcm-routing",
  6123. .codec_name = "tavil_codec",
  6124. .codec_dai_name = "tavil_rx1",
  6125. .no_pcm = 1,
  6126. .dpcm_playback = 1,
  6127. .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
  6128. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6129. .ops = &msm_be_ops,
  6130. /* dai link has playback support */
  6131. .ignore_pmdown_time = 1,
  6132. .ignore_suspend = 1,
  6133. },
  6134. {
  6135. .name = LPASS_BE_SLIMBUS_3_TX,
  6136. .stream_name = "Slimbus3 Capture",
  6137. .cpu_dai_name = "msm-dai-q6-dev.16391",
  6138. .platform_name = "msm-pcm-routing",
  6139. .codec_name = "tavil_codec",
  6140. .codec_dai_name = "tavil_tx1",
  6141. .no_pcm = 1,
  6142. .dpcm_capture = 1,
  6143. .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
  6144. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6145. .ops = &msm_be_ops,
  6146. .ignore_suspend = 1,
  6147. },
  6148. {
  6149. .name = LPASS_BE_SLIMBUS_4_RX,
  6150. .stream_name = "Slimbus4 Playback",
  6151. .cpu_dai_name = "msm-dai-q6-dev.16392",
  6152. .platform_name = "msm-pcm-routing",
  6153. .codec_name = "tavil_codec",
  6154. .codec_dai_name = "tavil_rx1",
  6155. .no_pcm = 1,
  6156. .dpcm_playback = 1,
  6157. .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
  6158. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6159. .ops = &msm_be_ops,
  6160. /* dai link has playback support */
  6161. .ignore_pmdown_time = 1,
  6162. .ignore_suspend = 1,
  6163. },
  6164. {
  6165. .name = LPASS_BE_SLIMBUS_5_RX,
  6166. .stream_name = "Slimbus5 Playback",
  6167. .cpu_dai_name = "msm-dai-q6-dev.16394",
  6168. .platform_name = "msm-pcm-routing",
  6169. .codec_name = "tavil_codec",
  6170. .codec_dai_name = "tavil_rx3",
  6171. .no_pcm = 1,
  6172. .dpcm_playback = 1,
  6173. .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
  6174. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6175. .ops = &msm_be_ops,
  6176. /* dai link has playback support */
  6177. .ignore_pmdown_time = 1,
  6178. .ignore_suspend = 1,
  6179. },
  6180. /* MAD BE */
  6181. {
  6182. .name = LPASS_BE_SLIMBUS_5_TX,
  6183. .stream_name = "Slimbus5 Capture",
  6184. .cpu_dai_name = "msm-dai-q6-dev.16395",
  6185. .platform_name = "msm-pcm-routing",
  6186. .codec_name = "tavil_codec",
  6187. .codec_dai_name = "tavil_mad1",
  6188. .no_pcm = 1,
  6189. .dpcm_capture = 1,
  6190. .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
  6191. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6192. .ops = &msm_be_ops,
  6193. .ignore_suspend = 1,
  6194. },
  6195. {
  6196. .name = LPASS_BE_SLIMBUS_6_RX,
  6197. .stream_name = "Slimbus6 Playback",
  6198. .cpu_dai_name = "msm-dai-q6-dev.16396",
  6199. .platform_name = "msm-pcm-routing",
  6200. .codec_name = "tavil_codec",
  6201. .codec_dai_name = "tavil_rx4",
  6202. .no_pcm = 1,
  6203. .dpcm_playback = 1,
  6204. .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
  6205. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6206. .ops = &msm_be_ops,
  6207. /* dai link has playback support */
  6208. .ignore_pmdown_time = 1,
  6209. .ignore_suspend = 1,
  6210. },
  6211. /* Slimbus VI Recording */
  6212. {
  6213. .name = LPASS_BE_SLIMBUS_TX_VI,
  6214. .stream_name = "Slimbus4 Capture",
  6215. .cpu_dai_name = "msm-dai-q6-dev.16393",
  6216. .platform_name = "msm-pcm-routing",
  6217. .codec_name = "tavil_codec",
  6218. .codec_dai_name = "tavil_vifeedback",
  6219. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  6220. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6221. .ops = &msm_be_ops,
  6222. .ignore_suspend = 1,
  6223. .no_pcm = 1,
  6224. .dpcm_capture = 1,
  6225. },
  6226. };
  6227. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  6228. {
  6229. .name = LPASS_BE_SLIMBUS_7_RX,
  6230. .stream_name = "Slimbus7 Playback",
  6231. .cpu_dai_name = "msm-dai-q6-dev.16398",
  6232. .platform_name = "msm-pcm-routing",
  6233. .codec_name = "btfmslim_slave",
  6234. /* BT codec driver determines capabilities based on
  6235. * dai name, bt codecdai name should always contains
  6236. * supported usecase information
  6237. */
  6238. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  6239. .no_pcm = 1,
  6240. .dpcm_playback = 1,
  6241. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  6242. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6243. .ops = &msm_wcn_ops,
  6244. /* dai link has playback support */
  6245. .ignore_pmdown_time = 1,
  6246. .ignore_suspend = 1,
  6247. },
  6248. {
  6249. .name = LPASS_BE_SLIMBUS_7_TX,
  6250. .stream_name = "Slimbus7 Capture",
  6251. .cpu_dai_name = "msm-dai-q6-dev.16399",
  6252. .platform_name = "msm-pcm-routing",
  6253. .codec_name = "btfmslim_slave",
  6254. .codec_dai_name = "btfm_bt_sco_slim_tx",
  6255. .no_pcm = 1,
  6256. .dpcm_capture = 1,
  6257. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  6258. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6259. .ops = &msm_wcn_ops,
  6260. .ignore_suspend = 1,
  6261. },
  6262. {
  6263. .name = LPASS_BE_SLIMBUS_8_TX,
  6264. .stream_name = "Slimbus8 Capture",
  6265. .cpu_dai_name = "msm-dai-q6-dev.16401",
  6266. .platform_name = "msm-pcm-routing",
  6267. .codec_name = "btfmslim_slave",
  6268. .codec_dai_name = "btfm_fm_slim_tx",
  6269. .no_pcm = 1,
  6270. .dpcm_capture = 1,
  6271. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  6272. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6273. .init = &msm_wcn_init,
  6274. .ops = &msm_wcn_ops,
  6275. .ignore_suspend = 1,
  6276. },
  6277. };
  6278. static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
  6279. /* DISP PORT BACK END DAI Link */
  6280. {
  6281. .name = LPASS_BE_DISPLAY_PORT,
  6282. .stream_name = "Display Port Playback",
  6283. .cpu_dai_name = "msm-dai-q6-dp.24608",
  6284. .platform_name = "msm-pcm-routing",
  6285. .codec_name = "msm-ext-disp-audio-codec-rx",
  6286. .codec_dai_name = "msm_dp_audio_codec_rx_dai",
  6287. .no_pcm = 1,
  6288. .dpcm_playback = 1,
  6289. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
  6290. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6291. .ignore_pmdown_time = 1,
  6292. .ignore_suspend = 1,
  6293. },
  6294. };
  6295. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  6296. {
  6297. .name = LPASS_BE_PRI_MI2S_RX,
  6298. .stream_name = "Primary MI2S Playback",
  6299. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6300. .platform_name = "msm-pcm-routing",
  6301. .codec_name = "msm-stub-codec.1",
  6302. .codec_dai_name = "msm-stub-rx",
  6303. .no_pcm = 1,
  6304. .dpcm_playback = 1,
  6305. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  6306. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6307. .ops = &msm_mi2s_be_ops,
  6308. .ignore_suspend = 1,
  6309. .ignore_pmdown_time = 1,
  6310. },
  6311. {
  6312. .name = LPASS_BE_PRI_MI2S_TX,
  6313. .stream_name = "Primary MI2S Capture",
  6314. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6315. .platform_name = "msm-pcm-routing",
  6316. .codec_name = "msm-stub-codec.1",
  6317. .codec_dai_name = "msm-stub-tx",
  6318. .no_pcm = 1,
  6319. .dpcm_capture = 1,
  6320. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  6321. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6322. .ops = &msm_mi2s_be_ops,
  6323. .ignore_suspend = 1,
  6324. },
  6325. {
  6326. .name = LPASS_BE_SEC_MI2S_RX,
  6327. .stream_name = "Secondary MI2S Playback",
  6328. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6329. .platform_name = "msm-pcm-routing",
  6330. .codec_name = "msm-stub-codec.1",
  6331. .codec_dai_name = "msm-stub-rx",
  6332. .no_pcm = 1,
  6333. .dpcm_playback = 1,
  6334. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  6335. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6336. .ops = &msm_mi2s_be_ops,
  6337. .ignore_suspend = 1,
  6338. .ignore_pmdown_time = 1,
  6339. },
  6340. {
  6341. .name = LPASS_BE_SEC_MI2S_TX,
  6342. .stream_name = "Secondary MI2S Capture",
  6343. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6344. .platform_name = "msm-pcm-routing",
  6345. .codec_name = "msm-stub-codec.1",
  6346. .codec_dai_name = "msm-stub-tx",
  6347. .no_pcm = 1,
  6348. .dpcm_capture = 1,
  6349. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  6350. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6351. .ops = &msm_mi2s_be_ops,
  6352. .ignore_suspend = 1,
  6353. },
  6354. {
  6355. .name = LPASS_BE_TERT_MI2S_RX,
  6356. .stream_name = "Tertiary MI2S Playback",
  6357. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6358. .platform_name = "msm-pcm-routing",
  6359. .codec_name = "msm-stub-codec.1",
  6360. .codec_dai_name = "msm-stub-rx",
  6361. .no_pcm = 1,
  6362. .dpcm_playback = 1,
  6363. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  6364. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6365. .ops = &msm_mi2s_be_ops,
  6366. .ignore_suspend = 1,
  6367. .ignore_pmdown_time = 1,
  6368. },
  6369. {
  6370. .name = LPASS_BE_TERT_MI2S_TX,
  6371. .stream_name = "Tertiary MI2S Capture",
  6372. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6373. .platform_name = "msm-pcm-routing",
  6374. .codec_name = "msm-stub-codec.1",
  6375. .codec_dai_name = "msm-stub-tx",
  6376. .no_pcm = 1,
  6377. .dpcm_capture = 1,
  6378. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  6379. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6380. .ops = &msm_mi2s_be_ops,
  6381. .ignore_suspend = 1,
  6382. },
  6383. {
  6384. .name = LPASS_BE_QUAT_MI2S_RX,
  6385. .stream_name = "Quaternary MI2S Playback",
  6386. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6387. .platform_name = "msm-pcm-routing",
  6388. .codec_name = "msm-stub-codec.1",
  6389. .codec_dai_name = "msm-stub-rx",
  6390. .no_pcm = 1,
  6391. .dpcm_playback = 1,
  6392. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
  6393. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6394. .ops = &msm_mi2s_be_ops,
  6395. .ignore_suspend = 1,
  6396. .ignore_pmdown_time = 1,
  6397. },
  6398. {
  6399. .name = LPASS_BE_QUAT_MI2S_TX,
  6400. .stream_name = "Quaternary MI2S Capture",
  6401. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6402. .platform_name = "msm-pcm-routing",
  6403. .codec_name = "msm-stub-codec.1",
  6404. .codec_dai_name = "msm-stub-tx",
  6405. .no_pcm = 1,
  6406. .dpcm_capture = 1,
  6407. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
  6408. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6409. .ops = &msm_mi2s_be_ops,
  6410. .ignore_suspend = 1,
  6411. },
  6412. {
  6413. .name = LPASS_BE_QUIN_MI2S_RX,
  6414. .stream_name = "Quinary MI2S Playback",
  6415. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6416. .platform_name = "msm-pcm-routing",
  6417. .codec_name = "msm-stub-codec.1",
  6418. .codec_dai_name = "msm-stub-rx",
  6419. .no_pcm = 1,
  6420. .dpcm_playback = 1,
  6421. .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
  6422. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6423. .ops = &msm_mi2s_be_ops,
  6424. .ignore_suspend = 1,
  6425. .ignore_pmdown_time = 1,
  6426. },
  6427. {
  6428. .name = LPASS_BE_QUIN_MI2S_TX,
  6429. .stream_name = "Quinary MI2S Capture",
  6430. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6431. .platform_name = "msm-pcm-routing",
  6432. .codec_name = "msm-stub-codec.1",
  6433. .codec_dai_name = "msm-stub-tx",
  6434. .no_pcm = 1,
  6435. .dpcm_capture = 1,
  6436. .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
  6437. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6438. .ops = &msm_mi2s_be_ops,
  6439. .ignore_suspend = 1,
  6440. },
  6441. };
  6442. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  6443. /* Primary AUX PCM Backend DAI Links */
  6444. {
  6445. .name = LPASS_BE_AUXPCM_RX,
  6446. .stream_name = "AUX PCM Playback",
  6447. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6448. .platform_name = "msm-pcm-routing",
  6449. .codec_name = "msm-stub-codec.1",
  6450. .codec_dai_name = "msm-stub-rx",
  6451. .no_pcm = 1,
  6452. .dpcm_playback = 1,
  6453. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  6454. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6455. .ignore_pmdown_time = 1,
  6456. .ignore_suspend = 1,
  6457. },
  6458. {
  6459. .name = LPASS_BE_AUXPCM_TX,
  6460. .stream_name = "AUX PCM Capture",
  6461. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6462. .platform_name = "msm-pcm-routing",
  6463. .codec_name = "msm-stub-codec.1",
  6464. .codec_dai_name = "msm-stub-tx",
  6465. .no_pcm = 1,
  6466. .dpcm_capture = 1,
  6467. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  6468. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6469. .ignore_suspend = 1,
  6470. },
  6471. /* Secondary AUX PCM Backend DAI Links */
  6472. {
  6473. .name = LPASS_BE_SEC_AUXPCM_RX,
  6474. .stream_name = "Sec AUX PCM Playback",
  6475. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6476. .platform_name = "msm-pcm-routing",
  6477. .codec_name = "msm-stub-codec.1",
  6478. .codec_dai_name = "msm-stub-rx",
  6479. .no_pcm = 1,
  6480. .dpcm_playback = 1,
  6481. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  6482. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6483. .ignore_pmdown_time = 1,
  6484. .ignore_suspend = 1,
  6485. },
  6486. {
  6487. .name = LPASS_BE_SEC_AUXPCM_TX,
  6488. .stream_name = "Sec AUX PCM Capture",
  6489. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6490. .platform_name = "msm-pcm-routing",
  6491. .codec_name = "msm-stub-codec.1",
  6492. .codec_dai_name = "msm-stub-tx",
  6493. .no_pcm = 1,
  6494. .dpcm_capture = 1,
  6495. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  6496. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6497. .ignore_suspend = 1,
  6498. },
  6499. /* Tertiary AUX PCM Backend DAI Links */
  6500. {
  6501. .name = LPASS_BE_TERT_AUXPCM_RX,
  6502. .stream_name = "Tert AUX PCM Playback",
  6503. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6504. .platform_name = "msm-pcm-routing",
  6505. .codec_name = "msm-stub-codec.1",
  6506. .codec_dai_name = "msm-stub-rx",
  6507. .no_pcm = 1,
  6508. .dpcm_playback = 1,
  6509. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  6510. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6511. .ignore_suspend = 1,
  6512. },
  6513. {
  6514. .name = LPASS_BE_TERT_AUXPCM_TX,
  6515. .stream_name = "Tert AUX PCM Capture",
  6516. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6517. .platform_name = "msm-pcm-routing",
  6518. .codec_name = "msm-stub-codec.1",
  6519. .codec_dai_name = "msm-stub-tx",
  6520. .no_pcm = 1,
  6521. .dpcm_capture = 1,
  6522. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  6523. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6524. .ignore_suspend = 1,
  6525. },
  6526. /* Quaternary AUX PCM Backend DAI Links */
  6527. {
  6528. .name = LPASS_BE_QUAT_AUXPCM_RX,
  6529. .stream_name = "Quat AUX PCM Playback",
  6530. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6531. .platform_name = "msm-pcm-routing",
  6532. .codec_name = "msm-stub-codec.1",
  6533. .codec_dai_name = "msm-stub-rx",
  6534. .no_pcm = 1,
  6535. .dpcm_playback = 1,
  6536. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
  6537. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6538. .ignore_pmdown_time = 1,
  6539. .ignore_suspend = 1,
  6540. },
  6541. {
  6542. .name = LPASS_BE_QUAT_AUXPCM_TX,
  6543. .stream_name = "Quat AUX PCM Capture",
  6544. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6545. .platform_name = "msm-pcm-routing",
  6546. .codec_name = "msm-stub-codec.1",
  6547. .codec_dai_name = "msm-stub-tx",
  6548. .no_pcm = 1,
  6549. .dpcm_capture = 1,
  6550. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
  6551. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6552. .ignore_suspend = 1,
  6553. },
  6554. /* Quinary AUX PCM Backend DAI Links */
  6555. {
  6556. .name = LPASS_BE_QUIN_AUXPCM_RX,
  6557. .stream_name = "Quin AUX PCM Playback",
  6558. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6559. .platform_name = "msm-pcm-routing",
  6560. .codec_name = "msm-stub-codec.1",
  6561. .codec_dai_name = "msm-stub-rx",
  6562. .no_pcm = 1,
  6563. .dpcm_playback = 1,
  6564. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
  6565. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6566. .ignore_pmdown_time = 1,
  6567. .ignore_suspend = 1,
  6568. },
  6569. {
  6570. .name = LPASS_BE_QUIN_AUXPCM_TX,
  6571. .stream_name = "Quin AUX PCM Capture",
  6572. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6573. .platform_name = "msm-pcm-routing",
  6574. .codec_name = "msm-stub-codec.1",
  6575. .codec_dai_name = "msm-stub-tx",
  6576. .no_pcm = 1,
  6577. .dpcm_capture = 1,
  6578. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
  6579. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6580. .ignore_suspend = 1,
  6581. },
  6582. };
  6583. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  6584. /* WSA CDC DMA Backend DAI Links */
  6585. {
  6586. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  6587. .stream_name = "WSA CDC DMA0 Playback",
  6588. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  6589. .platform_name = "msm-pcm-routing",
  6590. .codec_name = "bolero_codec",
  6591. .codec_dai_name = "wsa_macro_rx1",
  6592. .no_pcm = 1,
  6593. .dpcm_playback = 1,
  6594. .init = &msm_int_audrx_init,
  6595. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  6596. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6597. .ignore_pmdown_time = 1,
  6598. .ignore_suspend = 1,
  6599. .ops = &msm_cdc_dma_be_ops,
  6600. },
  6601. {
  6602. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  6603. .stream_name = "WSA CDC DMA1 Playback",
  6604. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  6605. .platform_name = "msm-pcm-routing",
  6606. .codec_name = "bolero_codec",
  6607. .codec_dai_name = "wsa_macro_rx_mix",
  6608. .no_pcm = 1,
  6609. .dpcm_playback = 1,
  6610. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  6611. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6612. .ignore_pmdown_time = 1,
  6613. .ignore_suspend = 1,
  6614. .ops = &msm_cdc_dma_be_ops,
  6615. },
  6616. {
  6617. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  6618. .stream_name = "WSA CDC DMA1 Capture",
  6619. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  6620. .platform_name = "msm-pcm-routing",
  6621. .codec_name = "bolero_codec",
  6622. .codec_dai_name = "wsa_macro_echo",
  6623. .no_pcm = 1,
  6624. .dpcm_capture = 1,
  6625. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  6626. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6627. .ignore_suspend = 1,
  6628. .ops = &msm_cdc_dma_be_ops,
  6629. },
  6630. };
  6631. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  6632. /* RX CDC DMA Backend DAI Links */
  6633. {
  6634. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  6635. .stream_name = "RX CDC DMA0 Playback",
  6636. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  6637. .platform_name = "msm-pcm-routing",
  6638. .codec_name = "bolero_codec",
  6639. .codec_dai_name = "rx_macro_rx1",
  6640. .no_pcm = 1,
  6641. .dpcm_playback = 1,
  6642. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  6643. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6644. .ignore_pmdown_time = 1,
  6645. .ignore_suspend = 1,
  6646. .ops = &msm_cdc_dma_be_ops,
  6647. },
  6648. {
  6649. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  6650. .stream_name = "RX CDC DMA1 Playback",
  6651. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  6652. .platform_name = "msm-pcm-routing",
  6653. .codec_name = "bolero_codec",
  6654. .codec_dai_name = "rx_macro_rx2",
  6655. .no_pcm = 1,
  6656. .dpcm_playback = 1,
  6657. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  6658. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6659. .ignore_pmdown_time = 1,
  6660. .ignore_suspend = 1,
  6661. .ops = &msm_cdc_dma_be_ops,
  6662. },
  6663. {
  6664. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  6665. .stream_name = "RX CDC DMA2 Playback",
  6666. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  6667. .platform_name = "msm-pcm-routing",
  6668. .codec_name = "bolero_codec",
  6669. .codec_dai_name = "rx_macro_rx3",
  6670. .no_pcm = 1,
  6671. .dpcm_playback = 1,
  6672. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  6673. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6674. .ignore_pmdown_time = 1,
  6675. .ignore_suspend = 1,
  6676. .ops = &msm_cdc_dma_be_ops,
  6677. },
  6678. {
  6679. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  6680. .stream_name = "RX CDC DMA3 Playback",
  6681. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  6682. .platform_name = "msm-pcm-routing",
  6683. .codec_name = "bolero_codec",
  6684. .codec_dai_name = "rx_macro_rx4",
  6685. .no_pcm = 1,
  6686. .dpcm_playback = 1,
  6687. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  6688. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6689. .ignore_pmdown_time = 1,
  6690. .ignore_suspend = 1,
  6691. .ops = &msm_cdc_dma_be_ops,
  6692. },
  6693. /* TX CDC DMA Backend DAI Links */
  6694. {
  6695. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  6696. .stream_name = "TX CDC DMA3 Capture",
  6697. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  6698. .platform_name = "msm-pcm-routing",
  6699. .codec_name = "bolero_codec",
  6700. .codec_dai_name = "tx_macro_tx1",
  6701. .no_pcm = 1,
  6702. .dpcm_capture = 1,
  6703. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  6704. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6705. .ignore_suspend = 1,
  6706. .ops = &msm_cdc_dma_be_ops,
  6707. },
  6708. {
  6709. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  6710. .stream_name = "TX CDC DMA4 Capture",
  6711. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  6712. .platform_name = "msm-pcm-routing",
  6713. .codec_name = "bolero_codec",
  6714. .codec_dai_name = "tx_macro_tx2",
  6715. .no_pcm = 1,
  6716. .dpcm_capture = 1,
  6717. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  6718. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6719. .ignore_suspend = 1,
  6720. .ops = &msm_cdc_dma_be_ops,
  6721. },
  6722. };
  6723. static struct snd_soc_dai_link msm_sm6150_dai_links[
  6724. ARRAY_SIZE(msm_common_dai_links) +
  6725. ARRAY_SIZE(msm_tavil_fe_dai_links) +
  6726. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  6727. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  6728. ARRAY_SIZE(msm_common_be_dai_links) +
  6729. ARRAY_SIZE(msm_tavil_be_dai_links) +
  6730. ARRAY_SIZE(msm_wcn_be_dai_links) +
  6731. ARRAY_SIZE(ext_disp_be_dai_link) +
  6732. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  6733. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  6734. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  6735. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
  6736. static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
  6737. {
  6738. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  6739. struct snd_soc_pcm_runtime *rtd;
  6740. int ret = 0;
  6741. void *mbhc_calibration;
  6742. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  6743. if (!rtd) {
  6744. dev_err(card->dev,
  6745. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  6746. __func__, be_dl_name);
  6747. ret = -EINVAL;
  6748. goto err_pcm_runtime;
  6749. }
  6750. mbhc_calibration = def_wcd_mbhc_cal();
  6751. if (!mbhc_calibration) {
  6752. ret = -ENOMEM;
  6753. goto err_mbhc_cal;
  6754. }
  6755. wcd_mbhc_cfg.calibration = mbhc_calibration;
  6756. ret = tavil_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
  6757. if (ret) {
  6758. dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
  6759. __func__, ret);
  6760. goto err_hs_detect;
  6761. }
  6762. return 0;
  6763. err_hs_detect:
  6764. kfree(mbhc_calibration);
  6765. err_mbhc_cal:
  6766. err_pcm_runtime:
  6767. return ret;
  6768. }
  6769. static int msm_populate_dai_link_component_of_node(
  6770. struct snd_soc_card *card)
  6771. {
  6772. int i, index, ret = 0;
  6773. struct device *cdev = card->dev;
  6774. struct snd_soc_dai_link *dai_link = card->dai_link;
  6775. struct device_node *np;
  6776. if (!cdev) {
  6777. pr_err("%s: Sound card device memory NULL\n", __func__);
  6778. return -ENODEV;
  6779. }
  6780. for (i = 0; i < card->num_links; i++) {
  6781. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  6782. continue;
  6783. /* populate platform_of_node for snd card dai links */
  6784. if (dai_link[i].platform_name &&
  6785. !dai_link[i].platform_of_node) {
  6786. index = of_property_match_string(cdev->of_node,
  6787. "asoc-platform-names",
  6788. dai_link[i].platform_name);
  6789. if (index < 0) {
  6790. pr_err("%s: No match found for platform name: %s\n",
  6791. __func__, dai_link[i].platform_name);
  6792. ret = index;
  6793. goto err;
  6794. }
  6795. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  6796. index);
  6797. if (!np) {
  6798. pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
  6799. __func__, dai_link[i].platform_name,
  6800. index);
  6801. ret = -ENODEV;
  6802. goto err;
  6803. }
  6804. dai_link[i].platform_of_node = np;
  6805. dai_link[i].platform_name = NULL;
  6806. }
  6807. /* populate cpu_of_node for snd card dai links */
  6808. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  6809. index = of_property_match_string(cdev->of_node,
  6810. "asoc-cpu-names",
  6811. dai_link[i].cpu_dai_name);
  6812. if (index >= 0) {
  6813. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  6814. index);
  6815. if (!np) {
  6816. pr_err("%s: retrieving phandle for cpu dai %s failed\n",
  6817. __func__,
  6818. dai_link[i].cpu_dai_name);
  6819. ret = -ENODEV;
  6820. goto err;
  6821. }
  6822. dai_link[i].cpu_of_node = np;
  6823. dai_link[i].cpu_dai_name = NULL;
  6824. }
  6825. }
  6826. /* populate codec_of_node for snd card dai links */
  6827. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  6828. index = of_property_match_string(cdev->of_node,
  6829. "asoc-codec-names",
  6830. dai_link[i].codec_name);
  6831. if (index < 0)
  6832. continue;
  6833. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  6834. index);
  6835. if (!np) {
  6836. pr_err("%s: retrieving phandle for codec %s failed\n",
  6837. __func__, dai_link[i].codec_name);
  6838. ret = -ENODEV;
  6839. goto err;
  6840. }
  6841. dai_link[i].codec_of_node = np;
  6842. dai_link[i].codec_name = NULL;
  6843. }
  6844. }
  6845. err:
  6846. return ret;
  6847. }
  6848. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  6849. {
  6850. int ret = 0;
  6851. struct snd_soc_codec *codec = rtd->codec;
  6852. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  6853. ARRAY_SIZE(msm_tavil_snd_controls));
  6854. if (ret < 0) {
  6855. dev_err(codec->dev,
  6856. "%s: add_codec_controls failed, err = %d\n",
  6857. __func__, ret);
  6858. return ret;
  6859. }
  6860. return 0;
  6861. }
  6862. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  6863. struct snd_pcm_hw_params *params)
  6864. {
  6865. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  6866. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  6867. int ret = 0;
  6868. unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
  6869. 151};
  6870. unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
  6871. 134, 135, 136, 137, 138, 139,
  6872. 140, 141, 142, 143};
  6873. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  6874. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  6875. slim_rx_cfg[SLIM_RX_0].channels,
  6876. rx_ch);
  6877. if (ret < 0)
  6878. pr_err("%s: RX failed to set cpu chan map error %d\n",
  6879. __func__, ret);
  6880. } else {
  6881. ret = snd_soc_dai_set_channel_map(cpu_dai,
  6882. slim_tx_cfg[SLIM_TX_0].channels,
  6883. tx_ch, 0, 0);
  6884. if (ret < 0)
  6885. pr_err("%s: TX failed to set cpu chan map error %d\n",
  6886. __func__, ret);
  6887. }
  6888. return ret;
  6889. }
  6890. static struct snd_soc_ops msm_stub_be_ops = {
  6891. .hw_params = msm_snd_stub_hw_params,
  6892. };
  6893. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  6894. /* FrontEnd DAI Links */
  6895. {
  6896. .name = "MSMSTUB Media1",
  6897. .stream_name = "MultiMedia1",
  6898. .cpu_dai_name = "MultiMedia1",
  6899. .platform_name = "msm-pcm-dsp.0",
  6900. .dynamic = 1,
  6901. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  6902. .dpcm_playback = 1,
  6903. .dpcm_capture = 1,
  6904. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6905. SND_SOC_DPCM_TRIGGER_POST},
  6906. .codec_dai_name = "snd-soc-dummy-dai",
  6907. .codec_name = "snd-soc-dummy",
  6908. .ignore_suspend = 1,
  6909. /* this dainlink has playback support */
  6910. .ignore_pmdown_time = 1,
  6911. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  6912. },
  6913. };
  6914. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  6915. /* Backend DAI Links */
  6916. {
  6917. .name = LPASS_BE_SLIMBUS_0_RX,
  6918. .stream_name = "Slimbus Playback",
  6919. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6920. .platform_name = "msm-pcm-routing",
  6921. .codec_name = "msm-stub-codec.1",
  6922. .codec_dai_name = "msm-stub-rx",
  6923. .no_pcm = 1,
  6924. .dpcm_playback = 1,
  6925. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6926. .init = &msm_audrx_stub_init,
  6927. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6928. .ignore_pmdown_time = 1, /* dai link has playback support */
  6929. .ignore_suspend = 1,
  6930. .ops = &msm_stub_be_ops,
  6931. },
  6932. {
  6933. .name = LPASS_BE_SLIMBUS_0_TX,
  6934. .stream_name = "Slimbus Capture",
  6935. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6936. .platform_name = "msm-pcm-routing",
  6937. .codec_name = "msm-stub-codec.1",
  6938. .codec_dai_name = "msm-stub-tx",
  6939. .no_pcm = 1,
  6940. .dpcm_capture = 1,
  6941. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6942. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6943. .ignore_suspend = 1,
  6944. .ops = &msm_stub_be_ops,
  6945. },
  6946. };
  6947. static struct snd_soc_dai_link msm_stub_dai_links[
  6948. ARRAY_SIZE(msm_stub_fe_dai_links) +
  6949. ARRAY_SIZE(msm_stub_be_dai_links)];
  6950. struct snd_soc_card snd_soc_card_stub_msm = {
  6951. .name = "sm6150-stub-snd-card",
  6952. };
  6953. static const struct of_device_id sm6150_asoc_machine_of_match[] = {
  6954. { .compatible = "qcom,sm6150-asoc-snd",
  6955. .data = "codec"},
  6956. { .compatible = "qcom,sm6150-asoc-snd-stub",
  6957. .data = "stub_codec"},
  6958. {},
  6959. };
  6960. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  6961. {
  6962. struct snd_soc_card *card = NULL;
  6963. struct snd_soc_dai_link *dailink;
  6964. int total_links = 0, rc = 0;
  6965. u32 tavil_codec = 0, auxpcm_audio_intf = 0;
  6966. u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
  6967. u32 wcn_btfm_intf = 0;
  6968. const struct of_device_id *match;
  6969. match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
  6970. if (!match) {
  6971. dev_err(dev, "%s: No DT match found for sound card\n",
  6972. __func__);
  6973. return NULL;
  6974. }
  6975. if (!strcmp(match->data, "codec")) {
  6976. card = &snd_soc_card_sm6150_msm;
  6977. memcpy(msm_sm6150_dai_links + total_links,
  6978. msm_common_dai_links,
  6979. sizeof(msm_common_dai_links));
  6980. total_links += ARRAY_SIZE(msm_common_dai_links);
  6981. memcpy(msm_sm6150_dai_links + total_links,
  6982. msm_common_misc_fe_dai_links,
  6983. sizeof(msm_common_misc_fe_dai_links));
  6984. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  6985. rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
  6986. &tavil_codec);
  6987. if (rc) {
  6988. dev_dbg(dev, "%s: No DT match for tavil codec\n",
  6989. __func__);
  6990. } else {
  6991. if (tavil_codec) {
  6992. card->late_probe =
  6993. msm_snd_card_tavil_late_probe;
  6994. memcpy(msm_sm6150_dai_links + total_links,
  6995. msm_tavil_fe_dai_links,
  6996. sizeof(msm_tavil_fe_dai_links));
  6997. total_links +=
  6998. ARRAY_SIZE(msm_tavil_fe_dai_links);
  6999. }
  7000. }
  7001. if (!tavil_codec) {
  7002. memcpy(msm_sm6150_dai_links + total_links,
  7003. msm_bolero_fe_dai_links,
  7004. sizeof(msm_bolero_fe_dai_links));
  7005. total_links +=
  7006. ARRAY_SIZE(msm_bolero_fe_dai_links);
  7007. }
  7008. memcpy(msm_sm6150_dai_links + total_links,
  7009. msm_common_be_dai_links,
  7010. sizeof(msm_common_be_dai_links));
  7011. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  7012. if (tavil_codec) {
  7013. memcpy(msm_sm6150_dai_links + total_links,
  7014. msm_tavil_be_dai_links,
  7015. sizeof(msm_tavil_be_dai_links));
  7016. total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
  7017. } else {
  7018. memcpy(msm_sm6150_dai_links + total_links,
  7019. msm_wsa_cdc_dma_be_dai_links,
  7020. sizeof(msm_wsa_cdc_dma_be_dai_links));
  7021. total_links +=
  7022. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  7023. memcpy(msm_sm6150_dai_links + total_links,
  7024. msm_rx_tx_cdc_dma_be_dai_links,
  7025. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  7026. total_links +=
  7027. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  7028. }
  7029. rc = of_property_read_u32(dev->of_node,
  7030. "qcom,ext-disp-audio-rx",
  7031. &ext_disp_audio_intf);
  7032. if (rc) {
  7033. dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
  7034. __func__);
  7035. } else {
  7036. if (ext_disp_audio_intf) {
  7037. memcpy(msm_sm6150_dai_links + total_links,
  7038. ext_disp_be_dai_link,
  7039. sizeof(ext_disp_be_dai_link));
  7040. total_links +=
  7041. ARRAY_SIZE(ext_disp_be_dai_link);
  7042. }
  7043. }
  7044. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  7045. &mi2s_audio_intf);
  7046. if (rc) {
  7047. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  7048. __func__);
  7049. } else {
  7050. if (mi2s_audio_intf) {
  7051. memcpy(msm_sm6150_dai_links + total_links,
  7052. msm_mi2s_be_dai_links,
  7053. sizeof(msm_mi2s_be_dai_links));
  7054. total_links +=
  7055. ARRAY_SIZE(msm_mi2s_be_dai_links);
  7056. }
  7057. }
  7058. rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
  7059. &wcn_btfm_intf);
  7060. if (rc) {
  7061. dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
  7062. __func__);
  7063. } else {
  7064. if (wcn_btfm_intf) {
  7065. memcpy(msm_sm6150_dai_links + total_links,
  7066. msm_wcn_be_dai_links,
  7067. sizeof(msm_wcn_be_dai_links));
  7068. total_links +=
  7069. ARRAY_SIZE(msm_wcn_be_dai_links);
  7070. }
  7071. }
  7072. rc = of_property_read_u32(dev->of_node,
  7073. "qcom,auxpcm-audio-intf",
  7074. &auxpcm_audio_intf);
  7075. if (rc) {
  7076. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  7077. __func__);
  7078. } else {
  7079. if (auxpcm_audio_intf) {
  7080. memcpy(msm_sm6150_dai_links + total_links,
  7081. msm_auxpcm_be_dai_links,
  7082. sizeof(msm_auxpcm_be_dai_links));
  7083. total_links +=
  7084. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  7085. }
  7086. }
  7087. dailink = msm_sm6150_dai_links;
  7088. } else if (!strcmp(match->data, "stub_codec")) {
  7089. card = &snd_soc_card_stub_msm;
  7090. memcpy(msm_stub_dai_links + total_links,
  7091. msm_stub_fe_dai_links,
  7092. sizeof(msm_stub_fe_dai_links));
  7093. total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
  7094. memcpy(msm_stub_dai_links + total_links,
  7095. msm_stub_be_dai_links,
  7096. sizeof(msm_stub_be_dai_links));
  7097. total_links += ARRAY_SIZE(msm_stub_be_dai_links);
  7098. dailink = msm_stub_dai_links;
  7099. }
  7100. if (card) {
  7101. card->dai_link = dailink;
  7102. card->num_links = total_links;
  7103. }
  7104. return card;
  7105. }
  7106. static int msm_wsa881x_init(struct snd_soc_component *component)
  7107. {
  7108. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7109. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7110. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  7111. SPKR_L_BOOST, SPKR_L_VI};
  7112. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  7113. SPKR_R_BOOST, SPKR_R_VI};
  7114. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  7115. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  7116. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  7117. struct msm_asoc_mach_data *pdata;
  7118. struct snd_soc_dapm_context *dapm;
  7119. struct snd_card *card = component->card->snd_card;
  7120. struct snd_info_entry *entry;
  7121. int ret = 0;
  7122. if (!codec) {
  7123. pr_err("%s codec is NULL\n", __func__);
  7124. return -EINVAL;
  7125. }
  7126. dapm = snd_soc_codec_get_dapm(codec);
  7127. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  7128. dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
  7129. __func__, codec->component.name);
  7130. wsa881x_set_channel_map(codec, &spkleft_ports[0],
  7131. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7132. &ch_rate[0], &spkleft_port_types[0]);
  7133. if (dapm->component) {
  7134. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  7135. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  7136. }
  7137. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  7138. dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
  7139. __func__, codec->component.name);
  7140. wsa881x_set_channel_map(codec, &spkright_ports[0],
  7141. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7142. &ch_rate[0], &spkright_port_types[0]);
  7143. if (dapm->component) {
  7144. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  7145. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  7146. }
  7147. } else {
  7148. dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
  7149. codec->component.name);
  7150. ret = -EINVAL;
  7151. goto err;
  7152. }
  7153. pdata = snd_soc_card_get_drvdata(component->card);
  7154. if (!pdata->codec_root) {
  7155. entry = snd_info_create_subdir(card->module, "codecs",
  7156. card->proc_root);
  7157. if (!entry) {
  7158. pr_err("%s: Cannot create codecs module entry\n",
  7159. __func__);
  7160. ret = 0;
  7161. goto err;
  7162. }
  7163. pdata->codec_root = entry;
  7164. }
  7165. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  7166. codec);
  7167. err:
  7168. return ret;
  7169. }
  7170. static int msm_aux_codec_init(struct snd_soc_component *component)
  7171. {
  7172. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  7173. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  7174. int ret = 0;
  7175. void *mbhc_calibration;
  7176. struct snd_info_entry *entry;
  7177. struct snd_card *card = component->card->snd_card;
  7178. struct msm_asoc_mach_data *pdata;
  7179. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  7180. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  7181. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  7182. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  7183. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  7184. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  7185. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  7186. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  7187. snd_soc_dapm_sync(dapm);
  7188. pdata = snd_soc_card_get_drvdata(component->card);
  7189. if (!pdata->codec_root) {
  7190. entry = snd_info_create_subdir(card->module, "codecs",
  7191. card->proc_root);
  7192. if (!entry) {
  7193. pr_err("%s: Cannot create codecs module entry\n",
  7194. __func__);
  7195. ret = 0;
  7196. goto codec_root_err;
  7197. }
  7198. pdata->codec_root = entry;
  7199. }
  7200. wcd937x_info_create_codec_entry(pdata->codec_root, codec);
  7201. codec_root_err:
  7202. mbhc_calibration = def_wcd_mbhc_cal();
  7203. if (!mbhc_calibration) {
  7204. return -ENOMEM;
  7205. }
  7206. wcd_mbhc_cfg.calibration = mbhc_calibration;
  7207. ret = wcd937x_mbhc_hs_detect(codec, &wcd_mbhc_cfg);
  7208. return ret;
  7209. }
  7210. static int msm_init_aux_dev(struct platform_device *pdev,
  7211. struct snd_soc_card *card)
  7212. {
  7213. struct device_node *wsa_of_node;
  7214. struct device_node *aux_codec_of_node;
  7215. u32 wsa_max_devs;
  7216. u32 wsa_dev_cnt;
  7217. u32 codec_aux_dev_cnt = 0;
  7218. int i;
  7219. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  7220. struct aux_codec_dev_info *aux_cdc_dev_info;
  7221. const char *auxdev_name_prefix[1];
  7222. char *dev_name_str = NULL;
  7223. int found = 0;
  7224. int codecs_found = 0;
  7225. int ret = 0;
  7226. /* Get maximum WSA device count for this platform */
  7227. ret = of_property_read_u32(pdev->dev.of_node,
  7228. "qcom,wsa-max-devs", &wsa_max_devs);
  7229. if (ret) {
  7230. dev_info(&pdev->dev,
  7231. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  7232. __func__, pdev->dev.of_node->full_name, ret);
  7233. wsa_max_devs = 0;
  7234. goto codec_aux_dev;
  7235. }
  7236. if (wsa_max_devs == 0) {
  7237. dev_warn(&pdev->dev,
  7238. "%s: Max WSA devices is 0 for this target?\n",
  7239. __func__);
  7240. goto codec_aux_dev;
  7241. }
  7242. /* Get count of WSA device phandles for this platform */
  7243. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  7244. "qcom,wsa-devs", NULL);
  7245. if (wsa_dev_cnt == -ENOENT) {
  7246. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  7247. __func__);
  7248. goto err;
  7249. } else if (wsa_dev_cnt <= 0) {
  7250. dev_err(&pdev->dev,
  7251. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  7252. __func__, wsa_dev_cnt);
  7253. ret = -EINVAL;
  7254. goto err;
  7255. }
  7256. /*
  7257. * Expect total phandles count to be NOT less than maximum possible
  7258. * WSA count. However, if it is less, then assign same value to
  7259. * max count as well.
  7260. */
  7261. if (wsa_dev_cnt < wsa_max_devs) {
  7262. dev_dbg(&pdev->dev,
  7263. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  7264. __func__, wsa_max_devs, wsa_dev_cnt);
  7265. wsa_max_devs = wsa_dev_cnt;
  7266. }
  7267. /* Make sure prefix string passed for each WSA device */
  7268. ret = of_property_count_strings(pdev->dev.of_node,
  7269. "qcom,wsa-aux-dev-prefix");
  7270. if (ret != wsa_dev_cnt) {
  7271. dev_err(&pdev->dev,
  7272. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  7273. __func__, wsa_dev_cnt, ret);
  7274. ret = -EINVAL;
  7275. goto err;
  7276. }
  7277. /*
  7278. * Alloc mem to store phandle and index info of WSA device, if already
  7279. * registered with ALSA core
  7280. */
  7281. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  7282. sizeof(struct msm_wsa881x_dev_info),
  7283. GFP_KERNEL);
  7284. if (!wsa881x_dev_info) {
  7285. ret = -ENOMEM;
  7286. goto err;
  7287. }
  7288. /*
  7289. * search and check whether all WSA devices are already
  7290. * registered with ALSA core or not. If found a node, store
  7291. * the node and the index in a local array of struct for later
  7292. * use.
  7293. */
  7294. for (i = 0; i < wsa_dev_cnt; i++) {
  7295. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  7296. "qcom,wsa-devs", i);
  7297. if (unlikely(!wsa_of_node)) {
  7298. /* we should not be here */
  7299. dev_err(&pdev->dev,
  7300. "%s: wsa dev node is not present\n",
  7301. __func__);
  7302. ret = -EINVAL;
  7303. goto err;
  7304. }
  7305. if (soc_find_component(wsa_of_node, NULL)) {
  7306. /* WSA device registered with ALSA core */
  7307. wsa881x_dev_info[found].of_node = wsa_of_node;
  7308. wsa881x_dev_info[found].index = i;
  7309. found++;
  7310. if (found == wsa_max_devs)
  7311. break;
  7312. }
  7313. }
  7314. if (found < wsa_max_devs) {
  7315. dev_dbg(&pdev->dev,
  7316. "%s: failed to find %d components. Found only %d\n",
  7317. __func__, wsa_max_devs, found);
  7318. return -EPROBE_DEFER;
  7319. }
  7320. dev_info(&pdev->dev,
  7321. "%s: found %d wsa881x devices registered with ALSA core\n",
  7322. __func__, found);
  7323. codec_aux_dev:
  7324. if (strcmp(card->name, "sm6150-tavil-snd-card")) {
  7325. /* Get count of aux codec device phandles for this platform */
  7326. codec_aux_dev_cnt = of_count_phandle_with_args(
  7327. pdev->dev.of_node,
  7328. "qcom,codec-aux-devs", NULL);
  7329. if (codec_aux_dev_cnt == -ENOENT) {
  7330. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  7331. __func__);
  7332. goto err;
  7333. } else if (codec_aux_dev_cnt <= 0) {
  7334. dev_err(&pdev->dev,
  7335. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  7336. __func__, codec_aux_dev_cnt);
  7337. ret = -EINVAL;
  7338. goto err;
  7339. }
  7340. /*
  7341. * Alloc mem to store phandle and index info of aux codec
  7342. * if already registered with ALSA core
  7343. */
  7344. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
  7345. sizeof(struct aux_codec_dev_info),
  7346. GFP_KERNEL);
  7347. if (!aux_cdc_dev_info) {
  7348. ret = -ENOMEM;
  7349. goto err;
  7350. }
  7351. /*
  7352. * search and check whether all aux codecs are already
  7353. * registered with ALSA core or not. If found a node, store
  7354. * the node and the index in a local array of struct for later
  7355. * use.
  7356. */
  7357. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7358. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  7359. "qcom,codec-aux-devs", i);
  7360. if (unlikely(!aux_codec_of_node)) {
  7361. /* we should not be here */
  7362. dev_err(&pdev->dev,
  7363. "%s: aux codec dev node is not present\n",
  7364. __func__);
  7365. ret = -EINVAL;
  7366. goto err;
  7367. }
  7368. if (soc_find_component(aux_codec_of_node, NULL)) {
  7369. /* AUX codec registered with ALSA core */
  7370. aux_cdc_dev_info[codecs_found].of_node =
  7371. aux_codec_of_node;
  7372. aux_cdc_dev_info[codecs_found].index = i;
  7373. codecs_found++;
  7374. }
  7375. }
  7376. if (codecs_found < codec_aux_dev_cnt) {
  7377. dev_dbg(&pdev->dev,
  7378. "%s: failed to find %d components. Found only %d\n",
  7379. __func__, codec_aux_dev_cnt, codecs_found);
  7380. return -EPROBE_DEFER;
  7381. }
  7382. dev_info(&pdev->dev,
  7383. "%s: found %d AUX codecs registered with ALSA core\n",
  7384. __func__, codecs_found);
  7385. }
  7386. card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
  7387. card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
  7388. /* Alloc array of AUX devs struct */
  7389. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  7390. sizeof(struct snd_soc_aux_dev),
  7391. GFP_KERNEL);
  7392. if (!msm_aux_dev) {
  7393. ret = -ENOMEM;
  7394. goto err;
  7395. }
  7396. /* Alloc array of codec conf struct */
  7397. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  7398. sizeof(struct snd_soc_codec_conf),
  7399. GFP_KERNEL);
  7400. if (!msm_codec_conf) {
  7401. ret = -ENOMEM;
  7402. goto err;
  7403. }
  7404. for (i = 0; i < wsa_max_devs; i++) {
  7405. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  7406. GFP_KERNEL);
  7407. if (!dev_name_str) {
  7408. ret = -ENOMEM;
  7409. goto err;
  7410. }
  7411. ret = of_property_read_string_index(pdev->dev.of_node,
  7412. "qcom,wsa-aux-dev-prefix",
  7413. wsa881x_dev_info[i].index,
  7414. auxdev_name_prefix);
  7415. if (ret) {
  7416. dev_err(&pdev->dev,
  7417. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  7418. __func__, ret);
  7419. ret = -EINVAL;
  7420. goto err;
  7421. }
  7422. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  7423. msm_aux_dev[i].name = dev_name_str;
  7424. msm_aux_dev[i].codec_name = NULL;
  7425. msm_aux_dev[i].codec_of_node =
  7426. wsa881x_dev_info[i].of_node;
  7427. msm_aux_dev[i].init = msm_wsa881x_init;
  7428. msm_codec_conf[i].dev_name = NULL;
  7429. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  7430. msm_codec_conf[i].of_node =
  7431. wsa881x_dev_info[i].of_node;
  7432. }
  7433. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7434. msm_aux_dev[wsa_max_devs + i].name = NULL;
  7435. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  7436. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  7437. aux_cdc_dev_info[i].of_node;
  7438. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  7439. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  7440. msm_codec_conf[wsa_max_devs + i].name_prefix =
  7441. NULL;
  7442. msm_codec_conf[wsa_max_devs + i].of_node =
  7443. aux_cdc_dev_info[i].of_node;
  7444. }
  7445. card->codec_conf = msm_codec_conf;
  7446. card->aux_dev = msm_aux_dev;
  7447. err:
  7448. return ret;
  7449. }
  7450. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  7451. {
  7452. int count;
  7453. u32 mi2s_master_slave[MI2S_MAX];
  7454. int ret;
  7455. for (count = 0; count < MI2S_MAX; count++) {
  7456. mutex_init(&mi2s_intf_conf[count].lock);
  7457. mi2s_intf_conf[count].ref_cnt = 0;
  7458. }
  7459. ret = of_property_read_u32_array(pdev->dev.of_node,
  7460. "qcom,msm-mi2s-master",
  7461. mi2s_master_slave, MI2S_MAX);
  7462. if (ret) {
  7463. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  7464. __func__);
  7465. } else {
  7466. for (count = 0; count < MI2S_MAX; count++) {
  7467. mi2s_intf_conf[count].msm_is_mi2s_master =
  7468. mi2s_master_slave[count];
  7469. }
  7470. }
  7471. }
  7472. static void msm_i2s_auxpcm_deinit(void)
  7473. {
  7474. int count;
  7475. for (count = 0; count < MI2S_MAX; count++) {
  7476. mutex_destroy(&mi2s_intf_conf[count].lock);
  7477. mi2s_intf_conf[count].ref_cnt = 0;
  7478. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  7479. }
  7480. }
  7481. static int sm6150_ssr_enable(struct device *dev, void *data)
  7482. {
  7483. struct platform_device *pdev = to_platform_device(dev);
  7484. struct snd_soc_card *card = platform_get_drvdata(pdev);
  7485. struct msm_asoc_mach_data *pdata;
  7486. int ret = 0;
  7487. if (!card) {
  7488. dev_err(dev, "%s: card is NULL\n", __func__);
  7489. ret = -EINVAL;
  7490. goto err;
  7491. }
  7492. if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
  7493. pdata = snd_soc_card_get_drvdata(card);
  7494. if (!pdata->is_afe_config_done) {
  7495. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  7496. struct snd_soc_pcm_runtime *rtd;
  7497. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  7498. if (!rtd) {
  7499. dev_err(dev,
  7500. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  7501. __func__, be_dl_name);
  7502. ret = -EINVAL;
  7503. goto err;
  7504. }
  7505. ret = msm_afe_set_config(rtd->codec);
  7506. if (ret)
  7507. dev_err(dev, "%s: Failed to set AFE config. err %d\n",
  7508. __func__, ret);
  7509. else
  7510. pdata->is_afe_config_done = true;
  7511. }
  7512. }
  7513. snd_soc_card_change_online_state(card, 1);
  7514. dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
  7515. err:
  7516. return ret;
  7517. }
  7518. static void sm6150_ssr_disable(struct device *dev, void *data)
  7519. {
  7520. struct platform_device *pdev = to_platform_device(dev);
  7521. struct snd_soc_card *card = platform_get_drvdata(pdev);
  7522. struct msm_asoc_mach_data *pdata;
  7523. if (!card) {
  7524. dev_err(dev, "%s: card is NULL\n", __func__);
  7525. return;
  7526. }
  7527. dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
  7528. snd_soc_card_change_online_state(card, 0);
  7529. if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
  7530. pdata = snd_soc_card_get_drvdata(card);
  7531. msm_afe_clear_config();
  7532. pdata->is_afe_config_done = false;
  7533. }
  7534. }
  7535. static const struct snd_event_ops sm6150_ssr_ops = {
  7536. .enable = sm6150_ssr_enable,
  7537. .disable = sm6150_ssr_disable,
  7538. };
  7539. static int msm_audio_ssr_compare(struct device *dev, void *data)
  7540. {
  7541. struct device_node *node = data;
  7542. dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
  7543. __func__, dev->of_node, node);
  7544. return (dev->of_node && dev->of_node == node);
  7545. }
  7546. static int msm_audio_ssr_register(struct device *dev)
  7547. {
  7548. struct device_node *np = dev->of_node;
  7549. struct snd_event_clients *ssr_clients = NULL;
  7550. struct device_node *node;
  7551. int ret;
  7552. int i;
  7553. for (i = 0; ; i++) {
  7554. node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
  7555. if (!node)
  7556. break;
  7557. snd_event_mstr_add_client(&ssr_clients,
  7558. msm_audio_ssr_compare, node);
  7559. }
  7560. ret = snd_event_master_register(dev, &sm6150_ssr_ops,
  7561. ssr_clients, NULL);
  7562. if (!ret)
  7563. snd_event_notify(dev, SND_EVENT_UP);
  7564. return ret;
  7565. }
  7566. static int msm_asoc_machine_probe(struct platform_device *pdev)
  7567. {
  7568. struct snd_soc_card *card;
  7569. struct msm_asoc_mach_data *pdata;
  7570. const char *mbhc_audio_jack_type = NULL;
  7571. int ret;
  7572. if (!pdev->dev.of_node) {
  7573. dev_err(&pdev->dev, "No platform supplied from device tree\n");
  7574. return -EINVAL;
  7575. }
  7576. pdata = devm_kzalloc(&pdev->dev,
  7577. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  7578. if (!pdata)
  7579. return -ENOMEM;
  7580. card = populate_snd_card_dailinks(&pdev->dev);
  7581. if (!card) {
  7582. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  7583. ret = -EINVAL;
  7584. goto err;
  7585. }
  7586. card->dev = &pdev->dev;
  7587. platform_set_drvdata(pdev, card);
  7588. snd_soc_card_set_drvdata(card, pdata);
  7589. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  7590. if (ret) {
  7591. dev_err(&pdev->dev, "parse card name failed, err:%d\n",
  7592. ret);
  7593. goto err;
  7594. }
  7595. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  7596. if (ret) {
  7597. dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
  7598. ret);
  7599. goto err;
  7600. }
  7601. ret = msm_populate_dai_link_component_of_node(card);
  7602. if (ret) {
  7603. ret = -EPROBE_DEFER;
  7604. goto err;
  7605. }
  7606. ret = msm_init_aux_dev(pdev, card);
  7607. if (ret)
  7608. goto err;
  7609. ret = devm_snd_soc_register_card(&pdev->dev, card);
  7610. if (ret == -EPROBE_DEFER) {
  7611. if (codec_reg_done)
  7612. ret = -EINVAL;
  7613. goto err;
  7614. } else if (ret) {
  7615. dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
  7616. ret);
  7617. goto err;
  7618. }
  7619. dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
  7620. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7621. "qcom,hph-en1-gpio", 0);
  7622. if (!pdata->hph_en1_gpio_p) {
  7623. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7624. "qcom,hph-en1-gpio",
  7625. pdev->dev.of_node->full_name);
  7626. }
  7627. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7628. "qcom,hph-en0-gpio", 0);
  7629. if (!pdata->hph_en0_gpio_p) {
  7630. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7631. "qcom,hph-en0-gpio",
  7632. pdev->dev.of_node->full_name);
  7633. }
  7634. ret = of_property_read_string(pdev->dev.of_node,
  7635. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  7636. if (ret) {
  7637. dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
  7638. "qcom,mbhc-audio-jack-type",
  7639. pdev->dev.of_node->full_name);
  7640. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  7641. } else {
  7642. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  7643. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7644. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  7645. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  7646. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7647. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  7648. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  7649. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7650. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  7651. } else {
  7652. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7653. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  7654. }
  7655. }
  7656. /*
  7657. * Parse US-Euro gpio info from DT. Report no error if us-euro
  7658. * entry is not found in DT file as some targets do not support
  7659. * US-Euro detection
  7660. */
  7661. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7662. "qcom,us-euro-gpios", 0);
  7663. if (!pdata->us_euro_gpio_p) {
  7664. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  7665. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  7666. } else {
  7667. dev_dbg(&pdev->dev, "%s detected\n",
  7668. "qcom,us-euro-gpios");
  7669. wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  7670. }
  7671. /* Parse pinctrl info from devicetree */
  7672. ret = msm_get_pinctrl(pdev);
  7673. if (!ret) {
  7674. pr_debug("%s: pinctrl parsing successful\n", __func__);
  7675. } else {
  7676. dev_dbg(&pdev->dev,
  7677. "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
  7678. __func__, ret);
  7679. ret = 0;
  7680. }
  7681. msm_i2s_auxpcm_init(pdev);
  7682. if (strcmp(card->name, "sm6150-tavil-snd-card")) {
  7683. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7684. "qcom,cdc-dmic01-gpios",
  7685. 0);
  7686. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7687. "qcom,cdc-dmic23-gpios",
  7688. 0);
  7689. }
  7690. ret = msm_audio_ssr_register(&pdev->dev);
  7691. if (ret)
  7692. pr_err("%s: Registration with SND event FWK failed ret = %d\n",
  7693. __func__, ret);
  7694. err:
  7695. return ret;
  7696. }
  7697. static int msm_asoc_machine_remove(struct platform_device *pdev)
  7698. {
  7699. snd_event_master_deregister(&pdev->dev);
  7700. msm_i2s_auxpcm_deinit();
  7701. return 0;
  7702. }
  7703. static struct platform_driver sm6150_asoc_machine_driver = {
  7704. .driver = {
  7705. .name = DRV_NAME,
  7706. .owner = THIS_MODULE,
  7707. .pm = &snd_soc_pm_ops,
  7708. .of_match_table = sm6150_asoc_machine_of_match,
  7709. },
  7710. .probe = msm_asoc_machine_probe,
  7711. .remove = msm_asoc_machine_remove,
  7712. };
  7713. module_platform_driver(sm6150_asoc_machine_driver);
  7714. MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
  7715. MODULE_LICENSE("GPL v2");
  7716. MODULE_ALIAS("platform:" DRV_NAME);
  7717. MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);