kona.c 182 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/clk.h>
  6. #include <linux/delay.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/slab.h>
  11. #include <linux/io.h>
  12. #include <linux/module.h>
  13. #include <linux/input.h>
  14. #include <linux/of_device.h>
  15. #include <linux/soc/qcom/fsa4480-i2c.h>
  16. #include <sound/core.h>
  17. #include <sound/soc.h>
  18. #include <sound/soc-dapm.h>
  19. #include <sound/pcm.h>
  20. #include <sound/pcm_params.h>
  21. #include <sound/info.h>
  22. #include <soc/snd_event.h>
  23. #include <dsp/audio_notifier.h>
  24. #include <soc/swr-common.h>
  25. #include <dsp/q6afe-v2.h>
  26. #include <dsp/q6core.h>
  27. #include "device_event.h"
  28. #include "msm-pcm-routing-v2.h"
  29. #include "asoc/msm-cdc-pinctrl.h"
  30. #include "asoc/wcd-mbhc-v2.h"
  31. #include "codecs/wcd938x/wcd938x-mbhc.h"
  32. #include "codecs/wsa881x.h"
  33. #include "codecs/wcd938x/wcd938x.h"
  34. #include "codecs/bolero/bolero-cdc.h"
  35. #include <dt-bindings/sound/audio-codec-port-types.h>
  36. #include "codecs/bolero/wsa-macro.h"
  37. #include "sm8250-port-config.h"
  38. #define DRV_NAME "kona-asoc-snd"
  39. #define __CHIPSET__ "KONA "
  40. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  41. #define SAMPLING_RATE_8KHZ 8000
  42. #define SAMPLING_RATE_11P025KHZ 11025
  43. #define SAMPLING_RATE_16KHZ 16000
  44. #define SAMPLING_RATE_22P05KHZ 22050
  45. #define SAMPLING_RATE_32KHZ 32000
  46. #define SAMPLING_RATE_44P1KHZ 44100
  47. #define SAMPLING_RATE_48KHZ 48000
  48. #define SAMPLING_RATE_88P2KHZ 88200
  49. #define SAMPLING_RATE_96KHZ 96000
  50. #define SAMPLING_RATE_176P4KHZ 176400
  51. #define SAMPLING_RATE_192KHZ 192000
  52. #define SAMPLING_RATE_352P8KHZ 352800
  53. #define SAMPLING_RATE_384KHZ 384000
  54. #define WCD9XXX_MBHC_DEF_RLOADS 5
  55. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  56. #define CODEC_EXT_CLK_RATE 9600000
  57. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  58. #define DEV_NAME_STR_LEN 32
  59. #define WCD_MBHC_HS_V_MAX 1600
  60. #define TDM_CHANNEL_MAX 8
  61. #define DEV_NAME_STR_LEN 32
  62. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  63. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  64. #define WSA8810_NAME_1 "wsa881x.20170211"
  65. #define WSA8810_NAME_2 "wsa881x.20170212"
  66. #define WCN_CDC_SLIM_RX_CH_MAX 2
  67. #define WCN_CDC_SLIM_TX_CH_MAX 2
  68. enum {
  69. TDM_0 = 0,
  70. TDM_1,
  71. TDM_2,
  72. TDM_3,
  73. TDM_4,
  74. TDM_5,
  75. TDM_6,
  76. TDM_7,
  77. TDM_PORT_MAX,
  78. };
  79. enum {
  80. TDM_PRI = 0,
  81. TDM_SEC,
  82. TDM_TERT,
  83. TDM_INTERFACE_MAX,
  84. };
  85. enum {
  86. PRIM_AUX_PCM = 0,
  87. SEC_AUX_PCM,
  88. TERT_AUX_PCM,
  89. AUX_PCM_MAX,
  90. };
  91. enum {
  92. PRIM_MI2S = 0,
  93. SEC_MI2S,
  94. TERT_MI2S,
  95. MI2S_MAX,
  96. };
  97. enum {
  98. WSA_CDC_DMA_RX_0 = 0,
  99. WSA_CDC_DMA_RX_1,
  100. RX_CDC_DMA_RX_0,
  101. RX_CDC_DMA_RX_1,
  102. RX_CDC_DMA_RX_2,
  103. RX_CDC_DMA_RX_3,
  104. RX_CDC_DMA_RX_5,
  105. CDC_DMA_RX_MAX,
  106. };
  107. enum {
  108. WSA_CDC_DMA_TX_0 = 0,
  109. WSA_CDC_DMA_TX_1,
  110. WSA_CDC_DMA_TX_2,
  111. TX_CDC_DMA_TX_0,
  112. TX_CDC_DMA_TX_3,
  113. TX_CDC_DMA_TX_4,
  114. VA_CDC_DMA_TX_0,
  115. VA_CDC_DMA_TX_1,
  116. VA_CDC_DMA_TX_2,
  117. CDC_DMA_TX_MAX,
  118. };
  119. enum {
  120. SLIM_RX_7 = 0,
  121. SLIM_RX_MAX,
  122. };
  123. enum {
  124. SLIM_TX_7 = 0,
  125. SLIM_TX_MAX,
  126. };
  127. enum {
  128. AFE_LOOPBACK_TX_IDX = 0,
  129. AFE_LOOPBACK_TX_IDX_MAX,
  130. };
  131. struct msm_asoc_mach_data {
  132. struct snd_info_entry *codec_root;
  133. int usbc_en2_gpio; /* used by gpio driver API */
  134. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  135. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  136. struct device_node *dmic45_gpio_p; /* used by pinctrl API */
  137. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  138. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  139. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  140. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  141. bool is_afe_config_done;
  142. struct device_node *fsa_handle;
  143. };
  144. struct tdm_port {
  145. u32 mode;
  146. u32 channel;
  147. };
  148. enum {
  149. EXT_DISP_RX_IDX_DP = 0,
  150. EXT_DISP_RX_IDX_MAX,
  151. };
  152. struct msm_wsa881x_dev_info {
  153. struct device_node *of_node;
  154. u32 index;
  155. };
  156. struct aux_codec_dev_info {
  157. struct device_node *of_node;
  158. u32 index;
  159. };
  160. struct dev_config {
  161. u32 sample_rate;
  162. u32 bit_format;
  163. u32 channels;
  164. };
  165. /* Default configuration of slimbus channels */
  166. static struct dev_config slim_rx_cfg[] = {
  167. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  168. };
  169. static struct dev_config slim_tx_cfg[] = {
  170. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  171. };
  172. /* Default configuration of external display BE */
  173. static struct dev_config ext_disp_rx_cfg[] = {
  174. [EXT_DISP_RX_IDX_DP] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  175. };
  176. static struct dev_config usb_rx_cfg = {
  177. .sample_rate = SAMPLING_RATE_48KHZ,
  178. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  179. .channels = 2,
  180. };
  181. static struct dev_config usb_tx_cfg = {
  182. .sample_rate = SAMPLING_RATE_48KHZ,
  183. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  184. .channels = 1,
  185. };
  186. static struct dev_config proxy_rx_cfg = {
  187. .sample_rate = SAMPLING_RATE_48KHZ,
  188. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  189. .channels = 2,
  190. };
  191. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  192. {
  193. AFE_API_VERSION_I2S_CONFIG,
  194. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  195. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  196. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  197. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  198. 0,
  199. },
  200. {
  201. AFE_API_VERSION_I2S_CONFIG,
  202. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  203. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  204. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  205. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  206. 0,
  207. },
  208. {
  209. AFE_API_VERSION_I2S_CONFIG,
  210. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  211. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  212. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  213. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  214. 0,
  215. },
  216. };
  217. struct mi2s_conf {
  218. struct mutex lock;
  219. u32 ref_cnt;
  220. u32 msm_is_mi2s_master;
  221. };
  222. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  223. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  224. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  225. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  226. };
  227. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  228. /* Default configuration of TDM channels */
  229. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  230. { /* PRI TDM */
  231. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  232. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  233. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  234. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  235. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  236. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  237. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  239. },
  240. { /* SEC TDM */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  242. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  243. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  244. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  246. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  247. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  249. },
  250. { /* TERT TDM */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  252. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  253. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  254. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  255. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  256. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  257. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  258. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  259. },
  260. };
  261. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  262. { /* PRI TDM */
  263. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  264. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  265. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  266. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  267. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  268. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  269. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  270. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  271. },
  272. { /* SEC TDM */
  273. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  274. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  275. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  276. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  277. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  278. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  279. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  280. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  281. },
  282. { /* TERT TDM */
  283. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  284. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  285. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  286. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  287. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  288. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  289. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  290. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  291. },
  292. };
  293. /* Default configuration of AUX PCM channels */
  294. static struct dev_config aux_pcm_rx_cfg[] = {
  295. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  296. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  297. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  298. };
  299. static struct dev_config aux_pcm_tx_cfg[] = {
  300. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  301. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  302. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  303. };
  304. /* Default configuration of MI2S channels */
  305. static struct dev_config mi2s_rx_cfg[] = {
  306. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  307. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  308. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  309. };
  310. static struct dev_config mi2s_tx_cfg[] = {
  311. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  312. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  313. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  314. };
  315. /* Default configuration of Codec DMA Interface RX */
  316. static struct dev_config cdc_dma_rx_cfg[] = {
  317. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  318. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  319. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  320. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  321. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  322. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  323. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  324. };
  325. /* Default configuration of Codec DMA Interface TX */
  326. static struct dev_config cdc_dma_tx_cfg[] = {
  327. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  328. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  329. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  330. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  331. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  332. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  333. [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  334. [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  335. [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  336. };
  337. static struct dev_config afe_loopback_tx_cfg[] = {
  338. [AFE_LOOPBACK_TX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  339. };
  340. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  341. "S32_LE"};
  342. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  343. "Six", "Seven", "Eight"};
  344. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  345. "KHZ_16", "KHZ_22P05",
  346. "KHZ_32", "KHZ_44P1", "KHZ_48",
  347. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  348. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  349. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  350. "Five", "Six", "Seven",
  351. "Eight"};
  352. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  353. "KHZ_48", "KHZ_176P4",
  354. "KHZ_352P8"};
  355. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  356. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  357. "Five", "Six", "Seven", "Eight"};
  358. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  359. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  360. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  361. "KHZ_48", "KHZ_96", "KHZ_192"};
  362. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  363. "Five", "Six", "Seven",
  364. "Eight"};
  365. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  366. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  367. "Five", "Six", "Seven",
  368. "Eight"};
  369. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  370. "KHZ_16", "KHZ_22P05",
  371. "KHZ_32", "KHZ_44P1", "KHZ_48",
  372. "KHZ_88P2", "KHZ_96",
  373. "KHZ_176P4", "KHZ_192",
  374. "KHZ_352P8", "KHZ_384"};
  375. static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
  376. "S24_3LE"};
  377. static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
  378. "KHZ_192", "KHZ_32", "KHZ_44P1",
  379. "KHZ_88P2", "KHZ_176P4"};
  380. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  381. "KHZ_44P1", "KHZ_48",
  382. "KHZ_88P2", "KHZ_96"};
  383. static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
  384. "KHZ_44P1", "KHZ_48",
  385. "KHZ_88P2", "KHZ_96"};
  386. static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
  387. "KHZ_44P1", "KHZ_48",
  388. "KHZ_88P2", "KHZ_96"};
  389. static const char *const afe_loopback_tx_ch_text[] = {"One", "Two"};
  390. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  391. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  392. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  393. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  394. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  395. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  396. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  397. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  398. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  399. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  400. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  401. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  402. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  403. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  404. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  405. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  406. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  407. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  408. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  409. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  410. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  411. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  412. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  413. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  414. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  415. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  416. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  417. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  418. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  419. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  420. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  421. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  422. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  423. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  424. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  425. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  426. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  427. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  428. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  429. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  430. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  431. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  432. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  433. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  434. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  435. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  436. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  437. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  438. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  439. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  440. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  441. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  442. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  443. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  444. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  445. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  446. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  447. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  448. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  449. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  450. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  451. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  452. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  453. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
  454. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
  455. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
  456. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  457. cdc_dma_sample_rate_text);
  458. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  459. cdc_dma_sample_rate_text);
  460. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  461. cdc_dma_sample_rate_text);
  462. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  463. cdc_dma_sample_rate_text);
  464. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  465. cdc_dma_sample_rate_text);
  466. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  467. cdc_dma_sample_rate_text);
  468. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  469. cdc_dma_sample_rate_text);
  470. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  471. cdc_dma_sample_rate_text);
  472. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  473. cdc_dma_sample_rate_text);
  474. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  475. cdc_dma_sample_rate_text);
  476. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  477. cdc_dma_sample_rate_text);
  478. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  479. cdc_dma_sample_rate_text);
  480. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  481. cdc_dma_sample_rate_text);
  482. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
  483. cdc_dma_sample_rate_text);
  484. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
  485. cdc_dma_sample_rate_text);
  486. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
  487. cdc_dma_sample_rate_text);
  488. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
  489. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
  490. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
  491. ext_disp_sample_rate_text);
  492. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  493. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
  494. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
  495. static SOC_ENUM_SINGLE_EXT_DECL(afe_loopback_tx_chs, afe_loopback_tx_ch_text);
  496. static bool is_initial_boot;
  497. static bool codec_reg_done;
  498. static struct snd_soc_aux_dev *msm_aux_dev;
  499. static struct snd_soc_codec_conf *msm_codec_conf;
  500. static struct snd_soc_card snd_soc_card_kona_msm;
  501. static int dmic_0_1_gpio_cnt;
  502. static int dmic_2_3_gpio_cnt;
  503. static int dmic_4_5_gpio_cnt;
  504. static int msm_vi_feed_tx_ch = 2;
  505. static void *def_wcd_mbhc_cal(void);
  506. /*
  507. * Need to report LINEIN
  508. * if R/L channel impedance is larger than 5K ohm
  509. */
  510. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  511. .read_fw_bin = false,
  512. .calibration = NULL,
  513. .detect_extn_cable = true,
  514. .mono_stero_detection = false,
  515. .swap_gnd_mic = NULL,
  516. .hs_ext_micbias = true,
  517. .key_code[0] = KEY_MEDIA,
  518. .key_code[1] = KEY_VOICECOMMAND,
  519. .key_code[2] = KEY_VOLUMEUP,
  520. .key_code[3] = KEY_VOLUMEDOWN,
  521. .key_code[4] = 0,
  522. .key_code[5] = 0,
  523. .key_code[6] = 0,
  524. .key_code[7] = 0,
  525. .linein_th = 5000,
  526. .moisture_en = true,
  527. .mbhc_micbias = MIC_BIAS_2,
  528. .anc_micbias = MIC_BIAS_2,
  529. .enable_anc_mic_detect = false,
  530. };
  531. static inline int param_is_mask(int p)
  532. {
  533. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  534. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  535. }
  536. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  537. int n)
  538. {
  539. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  540. }
  541. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  542. unsigned int bit)
  543. {
  544. if (bit >= SNDRV_MASK_MAX)
  545. return;
  546. if (param_is_mask(n)) {
  547. struct snd_mask *m = param_to_mask(p, n);
  548. m->bits[0] = 0;
  549. m->bits[1] = 0;
  550. m->bits[bit >> 5] |= (1 << (bit & 31));
  551. }
  552. }
  553. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  554. struct snd_ctl_elem_value *ucontrol)
  555. {
  556. int sample_rate_val = 0;
  557. switch (usb_rx_cfg.sample_rate) {
  558. case SAMPLING_RATE_384KHZ:
  559. sample_rate_val = 12;
  560. break;
  561. case SAMPLING_RATE_352P8KHZ:
  562. sample_rate_val = 11;
  563. break;
  564. case SAMPLING_RATE_192KHZ:
  565. sample_rate_val = 10;
  566. break;
  567. case SAMPLING_RATE_176P4KHZ:
  568. sample_rate_val = 9;
  569. break;
  570. case SAMPLING_RATE_96KHZ:
  571. sample_rate_val = 8;
  572. break;
  573. case SAMPLING_RATE_88P2KHZ:
  574. sample_rate_val = 7;
  575. break;
  576. case SAMPLING_RATE_48KHZ:
  577. sample_rate_val = 6;
  578. break;
  579. case SAMPLING_RATE_44P1KHZ:
  580. sample_rate_val = 5;
  581. break;
  582. case SAMPLING_RATE_32KHZ:
  583. sample_rate_val = 4;
  584. break;
  585. case SAMPLING_RATE_22P05KHZ:
  586. sample_rate_val = 3;
  587. break;
  588. case SAMPLING_RATE_16KHZ:
  589. sample_rate_val = 2;
  590. break;
  591. case SAMPLING_RATE_11P025KHZ:
  592. sample_rate_val = 1;
  593. break;
  594. case SAMPLING_RATE_8KHZ:
  595. default:
  596. sample_rate_val = 0;
  597. break;
  598. }
  599. ucontrol->value.integer.value[0] = sample_rate_val;
  600. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  601. usb_rx_cfg.sample_rate);
  602. return 0;
  603. }
  604. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  605. struct snd_ctl_elem_value *ucontrol)
  606. {
  607. switch (ucontrol->value.integer.value[0]) {
  608. case 12:
  609. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  610. break;
  611. case 11:
  612. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  613. break;
  614. case 10:
  615. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  616. break;
  617. case 9:
  618. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  619. break;
  620. case 8:
  621. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  622. break;
  623. case 7:
  624. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  625. break;
  626. case 6:
  627. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  628. break;
  629. case 5:
  630. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  631. break;
  632. case 4:
  633. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  634. break;
  635. case 3:
  636. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  637. break;
  638. case 2:
  639. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  640. break;
  641. case 1:
  642. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  643. break;
  644. case 0:
  645. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  646. break;
  647. default:
  648. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  649. break;
  650. }
  651. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  652. __func__, ucontrol->value.integer.value[0],
  653. usb_rx_cfg.sample_rate);
  654. return 0;
  655. }
  656. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  657. struct snd_ctl_elem_value *ucontrol)
  658. {
  659. int sample_rate_val = 0;
  660. switch (usb_tx_cfg.sample_rate) {
  661. case SAMPLING_RATE_384KHZ:
  662. sample_rate_val = 12;
  663. break;
  664. case SAMPLING_RATE_352P8KHZ:
  665. sample_rate_val = 11;
  666. break;
  667. case SAMPLING_RATE_192KHZ:
  668. sample_rate_val = 10;
  669. break;
  670. case SAMPLING_RATE_176P4KHZ:
  671. sample_rate_val = 9;
  672. break;
  673. case SAMPLING_RATE_96KHZ:
  674. sample_rate_val = 8;
  675. break;
  676. case SAMPLING_RATE_88P2KHZ:
  677. sample_rate_val = 7;
  678. break;
  679. case SAMPLING_RATE_48KHZ:
  680. sample_rate_val = 6;
  681. break;
  682. case SAMPLING_RATE_44P1KHZ:
  683. sample_rate_val = 5;
  684. break;
  685. case SAMPLING_RATE_32KHZ:
  686. sample_rate_val = 4;
  687. break;
  688. case SAMPLING_RATE_22P05KHZ:
  689. sample_rate_val = 3;
  690. break;
  691. case SAMPLING_RATE_16KHZ:
  692. sample_rate_val = 2;
  693. break;
  694. case SAMPLING_RATE_11P025KHZ:
  695. sample_rate_val = 1;
  696. break;
  697. case SAMPLING_RATE_8KHZ:
  698. sample_rate_val = 0;
  699. break;
  700. default:
  701. sample_rate_val = 6;
  702. break;
  703. }
  704. ucontrol->value.integer.value[0] = sample_rate_val;
  705. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  706. usb_tx_cfg.sample_rate);
  707. return 0;
  708. }
  709. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  710. struct snd_ctl_elem_value *ucontrol)
  711. {
  712. switch (ucontrol->value.integer.value[0]) {
  713. case 12:
  714. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  715. break;
  716. case 11:
  717. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  718. break;
  719. case 10:
  720. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  721. break;
  722. case 9:
  723. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  724. break;
  725. case 8:
  726. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  727. break;
  728. case 7:
  729. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  730. break;
  731. case 6:
  732. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  733. break;
  734. case 5:
  735. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  736. break;
  737. case 4:
  738. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  739. break;
  740. case 3:
  741. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  742. break;
  743. case 2:
  744. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  745. break;
  746. case 1:
  747. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  748. break;
  749. case 0:
  750. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  751. break;
  752. default:
  753. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  754. break;
  755. }
  756. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  757. __func__, ucontrol->value.integer.value[0],
  758. usb_tx_cfg.sample_rate);
  759. return 0;
  760. }
  761. static int afe_loopback_tx_ch_get(struct snd_kcontrol *kcontrol,
  762. struct snd_ctl_elem_value *ucontrol)
  763. {
  764. pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
  765. afe_loopback_tx_cfg[0].channels);
  766. ucontrol->value.enumerated.item[0] =
  767. afe_loopback_tx_cfg[0].channels - 1;
  768. return 0;
  769. }
  770. static int afe_loopback_tx_ch_put(struct snd_kcontrol *kcontrol,
  771. struct snd_ctl_elem_value *ucontrol)
  772. {
  773. afe_loopback_tx_cfg[0].channels =
  774. ucontrol->value.enumerated.item[0] + 1;
  775. pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
  776. afe_loopback_tx_cfg[0].channels);
  777. return 1;
  778. }
  779. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  780. struct snd_ctl_elem_value *ucontrol)
  781. {
  782. switch (usb_rx_cfg.bit_format) {
  783. case SNDRV_PCM_FORMAT_S32_LE:
  784. ucontrol->value.integer.value[0] = 3;
  785. break;
  786. case SNDRV_PCM_FORMAT_S24_3LE:
  787. ucontrol->value.integer.value[0] = 2;
  788. break;
  789. case SNDRV_PCM_FORMAT_S24_LE:
  790. ucontrol->value.integer.value[0] = 1;
  791. break;
  792. case SNDRV_PCM_FORMAT_S16_LE:
  793. default:
  794. ucontrol->value.integer.value[0] = 0;
  795. break;
  796. }
  797. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  798. __func__, usb_rx_cfg.bit_format,
  799. ucontrol->value.integer.value[0]);
  800. return 0;
  801. }
  802. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  803. struct snd_ctl_elem_value *ucontrol)
  804. {
  805. int rc = 0;
  806. switch (ucontrol->value.integer.value[0]) {
  807. case 3:
  808. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  809. break;
  810. case 2:
  811. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  812. break;
  813. case 1:
  814. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  815. break;
  816. case 0:
  817. default:
  818. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  819. break;
  820. }
  821. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  822. __func__, usb_rx_cfg.bit_format,
  823. ucontrol->value.integer.value[0]);
  824. return rc;
  825. }
  826. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  827. struct snd_ctl_elem_value *ucontrol)
  828. {
  829. switch (usb_tx_cfg.bit_format) {
  830. case SNDRV_PCM_FORMAT_S32_LE:
  831. ucontrol->value.integer.value[0] = 3;
  832. break;
  833. case SNDRV_PCM_FORMAT_S24_3LE:
  834. ucontrol->value.integer.value[0] = 2;
  835. break;
  836. case SNDRV_PCM_FORMAT_S24_LE:
  837. ucontrol->value.integer.value[0] = 1;
  838. break;
  839. case SNDRV_PCM_FORMAT_S16_LE:
  840. default:
  841. ucontrol->value.integer.value[0] = 0;
  842. break;
  843. }
  844. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  845. __func__, usb_tx_cfg.bit_format,
  846. ucontrol->value.integer.value[0]);
  847. return 0;
  848. }
  849. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  850. struct snd_ctl_elem_value *ucontrol)
  851. {
  852. int rc = 0;
  853. switch (ucontrol->value.integer.value[0]) {
  854. case 3:
  855. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  856. break;
  857. case 2:
  858. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  859. break;
  860. case 1:
  861. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  862. break;
  863. case 0:
  864. default:
  865. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  866. break;
  867. }
  868. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  869. __func__, usb_tx_cfg.bit_format,
  870. ucontrol->value.integer.value[0]);
  871. return rc;
  872. }
  873. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  874. struct snd_ctl_elem_value *ucontrol)
  875. {
  876. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  877. usb_rx_cfg.channels);
  878. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  879. return 0;
  880. }
  881. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  882. struct snd_ctl_elem_value *ucontrol)
  883. {
  884. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  885. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  886. return 1;
  887. }
  888. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  889. struct snd_ctl_elem_value *ucontrol)
  890. {
  891. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  892. usb_tx_cfg.channels);
  893. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  894. return 0;
  895. }
  896. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  897. struct snd_ctl_elem_value *ucontrol)
  898. {
  899. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  900. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  901. return 1;
  902. }
  903. static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
  904. {
  905. int idx = 0;
  906. if (strnstr(kcontrol->id.name, "Display Port RX",
  907. sizeof("Display Port RX"))) {
  908. idx = EXT_DISP_RX_IDX_DP;
  909. } else {
  910. pr_err("%s: unsupported BE: %s\n",
  911. __func__, kcontrol->id.name);
  912. idx = -EINVAL;
  913. }
  914. return idx;
  915. }
  916. static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
  917. struct snd_ctl_elem_value *ucontrol)
  918. {
  919. int idx = ext_disp_get_port_idx(kcontrol);
  920. if (idx < 0)
  921. return idx;
  922. switch (ext_disp_rx_cfg[idx].bit_format) {
  923. case SNDRV_PCM_FORMAT_S24_3LE:
  924. ucontrol->value.integer.value[0] = 2;
  925. break;
  926. case SNDRV_PCM_FORMAT_S24_LE:
  927. ucontrol->value.integer.value[0] = 1;
  928. break;
  929. case SNDRV_PCM_FORMAT_S16_LE:
  930. default:
  931. ucontrol->value.integer.value[0] = 0;
  932. break;
  933. }
  934. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  935. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  936. ucontrol->value.integer.value[0]);
  937. return 0;
  938. }
  939. static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
  940. struct snd_ctl_elem_value *ucontrol)
  941. {
  942. int idx = ext_disp_get_port_idx(kcontrol);
  943. if (idx < 0)
  944. return idx;
  945. switch (ucontrol->value.integer.value[0]) {
  946. case 2:
  947. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  948. break;
  949. case 1:
  950. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  951. break;
  952. case 0:
  953. default:
  954. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  955. break;
  956. }
  957. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  958. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  959. ucontrol->value.integer.value[0]);
  960. return 0;
  961. }
  962. static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
  963. struct snd_ctl_elem_value *ucontrol)
  964. {
  965. int idx = ext_disp_get_port_idx(kcontrol);
  966. if (idx < 0)
  967. return idx;
  968. ucontrol->value.integer.value[0] =
  969. ext_disp_rx_cfg[idx].channels - 2;
  970. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  971. idx, ext_disp_rx_cfg[idx].channels);
  972. return 0;
  973. }
  974. static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
  975. struct snd_ctl_elem_value *ucontrol)
  976. {
  977. int idx = ext_disp_get_port_idx(kcontrol);
  978. if (idx < 0)
  979. return idx;
  980. ext_disp_rx_cfg[idx].channels =
  981. ucontrol->value.integer.value[0] + 2;
  982. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  983. idx, ext_disp_rx_cfg[idx].channels);
  984. return 1;
  985. }
  986. static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  987. struct snd_ctl_elem_value *ucontrol)
  988. {
  989. int sample_rate_val;
  990. int idx = ext_disp_get_port_idx(kcontrol);
  991. if (idx < 0)
  992. return idx;
  993. switch (ext_disp_rx_cfg[idx].sample_rate) {
  994. case SAMPLING_RATE_176P4KHZ:
  995. sample_rate_val = 6;
  996. break;
  997. case SAMPLING_RATE_88P2KHZ:
  998. sample_rate_val = 5;
  999. break;
  1000. case SAMPLING_RATE_44P1KHZ:
  1001. sample_rate_val = 4;
  1002. break;
  1003. case SAMPLING_RATE_32KHZ:
  1004. sample_rate_val = 3;
  1005. break;
  1006. case SAMPLING_RATE_192KHZ:
  1007. sample_rate_val = 2;
  1008. break;
  1009. case SAMPLING_RATE_96KHZ:
  1010. sample_rate_val = 1;
  1011. break;
  1012. case SAMPLING_RATE_48KHZ:
  1013. default:
  1014. sample_rate_val = 0;
  1015. break;
  1016. }
  1017. ucontrol->value.integer.value[0] = sample_rate_val;
  1018. pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
  1019. idx, ext_disp_rx_cfg[idx].sample_rate);
  1020. return 0;
  1021. }
  1022. static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1023. struct snd_ctl_elem_value *ucontrol)
  1024. {
  1025. int idx = ext_disp_get_port_idx(kcontrol);
  1026. if (idx < 0)
  1027. return idx;
  1028. switch (ucontrol->value.integer.value[0]) {
  1029. case 6:
  1030. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
  1031. break;
  1032. case 5:
  1033. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
  1034. break;
  1035. case 4:
  1036. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
  1037. break;
  1038. case 3:
  1039. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
  1040. break;
  1041. case 2:
  1042. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
  1043. break;
  1044. case 1:
  1045. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
  1046. break;
  1047. case 0:
  1048. default:
  1049. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
  1050. break;
  1051. }
  1052. pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
  1053. __func__, ucontrol->value.integer.value[0], idx,
  1054. ext_disp_rx_cfg[idx].sample_rate);
  1055. return 0;
  1056. }
  1057. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  1058. struct snd_ctl_elem_value *ucontrol)
  1059. {
  1060. pr_debug("%s: proxy_rx channels = %d\n",
  1061. __func__, proxy_rx_cfg.channels);
  1062. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  1063. return 0;
  1064. }
  1065. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  1066. struct snd_ctl_elem_value *ucontrol)
  1067. {
  1068. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  1069. pr_debug("%s: proxy_rx channels = %d\n",
  1070. __func__, proxy_rx_cfg.channels);
  1071. return 1;
  1072. }
  1073. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  1074. struct tdm_port *port)
  1075. {
  1076. if (port) {
  1077. if (strnstr(kcontrol->id.name, "PRI",
  1078. sizeof(kcontrol->id.name))) {
  1079. port->mode = TDM_PRI;
  1080. } else if (strnstr(kcontrol->id.name, "SEC",
  1081. sizeof(kcontrol->id.name))) {
  1082. port->mode = TDM_SEC;
  1083. } else if (strnstr(kcontrol->id.name, "TERT",
  1084. sizeof(kcontrol->id.name))) {
  1085. port->mode = TDM_TERT;
  1086. } else {
  1087. pr_err("%s: unsupported mode in: %s\n",
  1088. __func__, kcontrol->id.name);
  1089. return -EINVAL;
  1090. }
  1091. if (strnstr(kcontrol->id.name, "RX_0",
  1092. sizeof(kcontrol->id.name)) ||
  1093. strnstr(kcontrol->id.name, "TX_0",
  1094. sizeof(kcontrol->id.name))) {
  1095. port->channel = TDM_0;
  1096. } else if (strnstr(kcontrol->id.name, "RX_1",
  1097. sizeof(kcontrol->id.name)) ||
  1098. strnstr(kcontrol->id.name, "TX_1",
  1099. sizeof(kcontrol->id.name))) {
  1100. port->channel = TDM_1;
  1101. } else if (strnstr(kcontrol->id.name, "RX_2",
  1102. sizeof(kcontrol->id.name)) ||
  1103. strnstr(kcontrol->id.name, "TX_2",
  1104. sizeof(kcontrol->id.name))) {
  1105. port->channel = TDM_2;
  1106. } else if (strnstr(kcontrol->id.name, "RX_3",
  1107. sizeof(kcontrol->id.name)) ||
  1108. strnstr(kcontrol->id.name, "TX_3",
  1109. sizeof(kcontrol->id.name))) {
  1110. port->channel = TDM_3;
  1111. } else if (strnstr(kcontrol->id.name, "RX_4",
  1112. sizeof(kcontrol->id.name)) ||
  1113. strnstr(kcontrol->id.name, "TX_4",
  1114. sizeof(kcontrol->id.name))) {
  1115. port->channel = TDM_4;
  1116. } else if (strnstr(kcontrol->id.name, "RX_5",
  1117. sizeof(kcontrol->id.name)) ||
  1118. strnstr(kcontrol->id.name, "TX_5",
  1119. sizeof(kcontrol->id.name))) {
  1120. port->channel = TDM_5;
  1121. } else if (strnstr(kcontrol->id.name, "RX_6",
  1122. sizeof(kcontrol->id.name)) ||
  1123. strnstr(kcontrol->id.name, "TX_6",
  1124. sizeof(kcontrol->id.name))) {
  1125. port->channel = TDM_6;
  1126. } else if (strnstr(kcontrol->id.name, "RX_7",
  1127. sizeof(kcontrol->id.name)) ||
  1128. strnstr(kcontrol->id.name, "TX_7",
  1129. sizeof(kcontrol->id.name))) {
  1130. port->channel = TDM_7;
  1131. } else {
  1132. pr_err("%s: unsupported channel in: %s\n",
  1133. __func__, kcontrol->id.name);
  1134. return -EINVAL;
  1135. }
  1136. } else {
  1137. return -EINVAL;
  1138. }
  1139. return 0;
  1140. }
  1141. static int tdm_get_sample_rate(int value)
  1142. {
  1143. int sample_rate = 0;
  1144. switch (value) {
  1145. case 0:
  1146. sample_rate = SAMPLING_RATE_8KHZ;
  1147. break;
  1148. case 1:
  1149. sample_rate = SAMPLING_RATE_16KHZ;
  1150. break;
  1151. case 2:
  1152. sample_rate = SAMPLING_RATE_32KHZ;
  1153. break;
  1154. case 3:
  1155. sample_rate = SAMPLING_RATE_48KHZ;
  1156. break;
  1157. case 4:
  1158. sample_rate = SAMPLING_RATE_176P4KHZ;
  1159. break;
  1160. case 5:
  1161. sample_rate = SAMPLING_RATE_352P8KHZ;
  1162. break;
  1163. default:
  1164. sample_rate = SAMPLING_RATE_48KHZ;
  1165. break;
  1166. }
  1167. return sample_rate;
  1168. }
  1169. static int tdm_get_sample_rate_val(int sample_rate)
  1170. {
  1171. int sample_rate_val = 0;
  1172. switch (sample_rate) {
  1173. case SAMPLING_RATE_8KHZ:
  1174. sample_rate_val = 0;
  1175. break;
  1176. case SAMPLING_RATE_16KHZ:
  1177. sample_rate_val = 1;
  1178. break;
  1179. case SAMPLING_RATE_32KHZ:
  1180. sample_rate_val = 2;
  1181. break;
  1182. case SAMPLING_RATE_48KHZ:
  1183. sample_rate_val = 3;
  1184. break;
  1185. case SAMPLING_RATE_176P4KHZ:
  1186. sample_rate_val = 4;
  1187. break;
  1188. case SAMPLING_RATE_352P8KHZ:
  1189. sample_rate_val = 5;
  1190. break;
  1191. default:
  1192. sample_rate_val = 3;
  1193. break;
  1194. }
  1195. return sample_rate_val;
  1196. }
  1197. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1198. struct snd_ctl_elem_value *ucontrol)
  1199. {
  1200. struct tdm_port port;
  1201. int ret = tdm_get_port_idx(kcontrol, &port);
  1202. if (ret) {
  1203. pr_err("%s: unsupported control: %s\n",
  1204. __func__, kcontrol->id.name);
  1205. } else {
  1206. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  1207. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  1208. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  1209. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  1210. ucontrol->value.enumerated.item[0]);
  1211. }
  1212. return ret;
  1213. }
  1214. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1215. struct snd_ctl_elem_value *ucontrol)
  1216. {
  1217. struct tdm_port port;
  1218. int ret = tdm_get_port_idx(kcontrol, &port);
  1219. if (ret) {
  1220. pr_err("%s: unsupported control: %s\n",
  1221. __func__, kcontrol->id.name);
  1222. } else {
  1223. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  1224. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1225. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  1226. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  1227. ucontrol->value.enumerated.item[0]);
  1228. }
  1229. return ret;
  1230. }
  1231. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1232. struct snd_ctl_elem_value *ucontrol)
  1233. {
  1234. struct tdm_port port;
  1235. int ret = tdm_get_port_idx(kcontrol, &port);
  1236. if (ret) {
  1237. pr_err("%s: unsupported control: %s\n",
  1238. __func__, kcontrol->id.name);
  1239. } else {
  1240. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  1241. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  1242. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1243. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1244. ucontrol->value.enumerated.item[0]);
  1245. }
  1246. return ret;
  1247. }
  1248. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1249. struct snd_ctl_elem_value *ucontrol)
  1250. {
  1251. struct tdm_port port;
  1252. int ret = tdm_get_port_idx(kcontrol, &port);
  1253. if (ret) {
  1254. pr_err("%s: unsupported control: %s\n",
  1255. __func__, kcontrol->id.name);
  1256. } else {
  1257. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  1258. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1259. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1260. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1261. ucontrol->value.enumerated.item[0]);
  1262. }
  1263. return ret;
  1264. }
  1265. static int tdm_get_format(int value)
  1266. {
  1267. int format = 0;
  1268. switch (value) {
  1269. case 0:
  1270. format = SNDRV_PCM_FORMAT_S16_LE;
  1271. break;
  1272. case 1:
  1273. format = SNDRV_PCM_FORMAT_S24_LE;
  1274. break;
  1275. case 2:
  1276. format = SNDRV_PCM_FORMAT_S32_LE;
  1277. break;
  1278. default:
  1279. format = SNDRV_PCM_FORMAT_S16_LE;
  1280. break;
  1281. }
  1282. return format;
  1283. }
  1284. static int tdm_get_format_val(int format)
  1285. {
  1286. int value = 0;
  1287. switch (format) {
  1288. case SNDRV_PCM_FORMAT_S16_LE:
  1289. value = 0;
  1290. break;
  1291. case SNDRV_PCM_FORMAT_S24_LE:
  1292. value = 1;
  1293. break;
  1294. case SNDRV_PCM_FORMAT_S32_LE:
  1295. value = 2;
  1296. break;
  1297. default:
  1298. value = 0;
  1299. break;
  1300. }
  1301. return value;
  1302. }
  1303. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  1304. struct snd_ctl_elem_value *ucontrol)
  1305. {
  1306. struct tdm_port port;
  1307. int ret = tdm_get_port_idx(kcontrol, &port);
  1308. if (ret) {
  1309. pr_err("%s: unsupported control: %s\n",
  1310. __func__, kcontrol->id.name);
  1311. } else {
  1312. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1313. tdm_rx_cfg[port.mode][port.channel].bit_format);
  1314. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1315. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1316. ucontrol->value.enumerated.item[0]);
  1317. }
  1318. return ret;
  1319. }
  1320. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  1321. struct snd_ctl_elem_value *ucontrol)
  1322. {
  1323. struct tdm_port port;
  1324. int ret = tdm_get_port_idx(kcontrol, &port);
  1325. if (ret) {
  1326. pr_err("%s: unsupported control: %s\n",
  1327. __func__, kcontrol->id.name);
  1328. } else {
  1329. tdm_rx_cfg[port.mode][port.channel].bit_format =
  1330. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1331. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1332. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1333. ucontrol->value.enumerated.item[0]);
  1334. }
  1335. return ret;
  1336. }
  1337. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  1338. struct snd_ctl_elem_value *ucontrol)
  1339. {
  1340. struct tdm_port port;
  1341. int ret = tdm_get_port_idx(kcontrol, &port);
  1342. if (ret) {
  1343. pr_err("%s: unsupported control: %s\n",
  1344. __func__, kcontrol->id.name);
  1345. } else {
  1346. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1347. tdm_tx_cfg[port.mode][port.channel].bit_format);
  1348. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  1349. tdm_tx_cfg[port.mode][port.channel].bit_format,
  1350. ucontrol->value.enumerated.item[0]);
  1351. }
  1352. return ret;
  1353. }
  1354. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  1355. struct snd_ctl_elem_value *ucontrol)
  1356. {
  1357. struct tdm_port port;
  1358. int ret = tdm_get_port_idx(kcontrol, &port);
  1359. if (ret) {
  1360. pr_err("%s: unsupported control: %s\n",
  1361. __func__, kcontrol->id.name);
  1362. } else {
  1363. tdm_tx_cfg[port.mode][port.channel].bit_format =
  1364. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1365. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  1366. tdm_tx_cfg[port.mode][port.channel].bit_format,
  1367. ucontrol->value.enumerated.item[0]);
  1368. }
  1369. return ret;
  1370. }
  1371. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  1372. struct snd_ctl_elem_value *ucontrol)
  1373. {
  1374. struct tdm_port port;
  1375. int ret = tdm_get_port_idx(kcontrol, &port);
  1376. if (ret) {
  1377. pr_err("%s: unsupported control: %s\n",
  1378. __func__, kcontrol->id.name);
  1379. } else {
  1380. ucontrol->value.enumerated.item[0] =
  1381. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  1382. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  1383. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  1384. ucontrol->value.enumerated.item[0]);
  1385. }
  1386. return ret;
  1387. }
  1388. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  1389. struct snd_ctl_elem_value *ucontrol)
  1390. {
  1391. struct tdm_port port;
  1392. int ret = tdm_get_port_idx(kcontrol, &port);
  1393. if (ret) {
  1394. pr_err("%s: unsupported control: %s\n",
  1395. __func__, kcontrol->id.name);
  1396. } else {
  1397. tdm_rx_cfg[port.mode][port.channel].channels =
  1398. ucontrol->value.enumerated.item[0] + 1;
  1399. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  1400. tdm_rx_cfg[port.mode][port.channel].channels,
  1401. ucontrol->value.enumerated.item[0] + 1);
  1402. }
  1403. return ret;
  1404. }
  1405. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  1406. struct snd_ctl_elem_value *ucontrol)
  1407. {
  1408. struct tdm_port port;
  1409. int ret = tdm_get_port_idx(kcontrol, &port);
  1410. if (ret) {
  1411. pr_err("%s: unsupported control: %s\n",
  1412. __func__, kcontrol->id.name);
  1413. } else {
  1414. ucontrol->value.enumerated.item[0] =
  1415. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  1416. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  1417. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  1418. ucontrol->value.enumerated.item[0]);
  1419. }
  1420. return ret;
  1421. }
  1422. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  1423. struct snd_ctl_elem_value *ucontrol)
  1424. {
  1425. struct tdm_port port;
  1426. int ret = tdm_get_port_idx(kcontrol, &port);
  1427. if (ret) {
  1428. pr_err("%s: unsupported control: %s\n",
  1429. __func__, kcontrol->id.name);
  1430. } else {
  1431. tdm_tx_cfg[port.mode][port.channel].channels =
  1432. ucontrol->value.enumerated.item[0] + 1;
  1433. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  1434. tdm_tx_cfg[port.mode][port.channel].channels,
  1435. ucontrol->value.enumerated.item[0] + 1);
  1436. }
  1437. return ret;
  1438. }
  1439. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  1440. {
  1441. int idx = 0;
  1442. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  1443. sizeof("PRIM_AUX_PCM"))) {
  1444. idx = PRIM_AUX_PCM;
  1445. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  1446. sizeof("SEC_AUX_PCM"))) {
  1447. idx = SEC_AUX_PCM;
  1448. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  1449. sizeof("TERT_AUX_PCM"))) {
  1450. idx = TERT_AUX_PCM;
  1451. } else {
  1452. pr_err("%s: unsupported port: %s\n",
  1453. __func__, kcontrol->id.name);
  1454. idx = -EINVAL;
  1455. }
  1456. return idx;
  1457. }
  1458. static int aux_pcm_get_sample_rate(int value)
  1459. {
  1460. int sample_rate = 0;
  1461. switch (value) {
  1462. case 1:
  1463. sample_rate = SAMPLING_RATE_16KHZ;
  1464. break;
  1465. case 0:
  1466. default:
  1467. sample_rate = SAMPLING_RATE_8KHZ;
  1468. break;
  1469. }
  1470. return sample_rate;
  1471. }
  1472. static int aux_pcm_get_sample_rate_val(int sample_rate)
  1473. {
  1474. int sample_rate_val = 0;
  1475. switch (sample_rate) {
  1476. case SAMPLING_RATE_16KHZ:
  1477. sample_rate_val = 1;
  1478. break;
  1479. case SAMPLING_RATE_8KHZ:
  1480. default:
  1481. sample_rate_val = 0;
  1482. break;
  1483. }
  1484. return sample_rate_val;
  1485. }
  1486. static int mi2s_auxpcm_get_format(int value)
  1487. {
  1488. int format = 0;
  1489. switch (value) {
  1490. case 0:
  1491. format = SNDRV_PCM_FORMAT_S16_LE;
  1492. break;
  1493. case 1:
  1494. format = SNDRV_PCM_FORMAT_S24_LE;
  1495. break;
  1496. case 2:
  1497. format = SNDRV_PCM_FORMAT_S24_3LE;
  1498. break;
  1499. case 3:
  1500. format = SNDRV_PCM_FORMAT_S32_LE;
  1501. break;
  1502. default:
  1503. format = SNDRV_PCM_FORMAT_S16_LE;
  1504. break;
  1505. }
  1506. return format;
  1507. }
  1508. static int mi2s_auxpcm_get_format_value(int format)
  1509. {
  1510. int value = 0;
  1511. switch (format) {
  1512. case SNDRV_PCM_FORMAT_S16_LE:
  1513. value = 0;
  1514. break;
  1515. case SNDRV_PCM_FORMAT_S24_LE:
  1516. value = 1;
  1517. break;
  1518. case SNDRV_PCM_FORMAT_S24_3LE:
  1519. value = 2;
  1520. break;
  1521. case SNDRV_PCM_FORMAT_S32_LE:
  1522. value = 3;
  1523. break;
  1524. default:
  1525. value = 0;
  1526. break;
  1527. }
  1528. return value;
  1529. }
  1530. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1531. struct snd_ctl_elem_value *ucontrol)
  1532. {
  1533. int idx = aux_pcm_get_port_idx(kcontrol);
  1534. if (idx < 0)
  1535. return idx;
  1536. ucontrol->value.enumerated.item[0] =
  1537. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  1538. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1539. idx, aux_pcm_rx_cfg[idx].sample_rate,
  1540. ucontrol->value.enumerated.item[0]);
  1541. return 0;
  1542. }
  1543. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1544. struct snd_ctl_elem_value *ucontrol)
  1545. {
  1546. int idx = aux_pcm_get_port_idx(kcontrol);
  1547. if (idx < 0)
  1548. return idx;
  1549. aux_pcm_rx_cfg[idx].sample_rate =
  1550. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1551. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1552. idx, aux_pcm_rx_cfg[idx].sample_rate,
  1553. ucontrol->value.enumerated.item[0]);
  1554. return 0;
  1555. }
  1556. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1557. struct snd_ctl_elem_value *ucontrol)
  1558. {
  1559. int idx = aux_pcm_get_port_idx(kcontrol);
  1560. if (idx < 0)
  1561. return idx;
  1562. ucontrol->value.enumerated.item[0] =
  1563. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  1564. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1565. idx, aux_pcm_tx_cfg[idx].sample_rate,
  1566. ucontrol->value.enumerated.item[0]);
  1567. return 0;
  1568. }
  1569. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1570. struct snd_ctl_elem_value *ucontrol)
  1571. {
  1572. int idx = aux_pcm_get_port_idx(kcontrol);
  1573. if (idx < 0)
  1574. return idx;
  1575. aux_pcm_tx_cfg[idx].sample_rate =
  1576. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1577. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1578. idx, aux_pcm_tx_cfg[idx].sample_rate,
  1579. ucontrol->value.enumerated.item[0]);
  1580. return 0;
  1581. }
  1582. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  1583. struct snd_ctl_elem_value *ucontrol)
  1584. {
  1585. int idx = aux_pcm_get_port_idx(kcontrol);
  1586. if (idx < 0)
  1587. return idx;
  1588. ucontrol->value.enumerated.item[0] =
  1589. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  1590. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1591. idx, aux_pcm_rx_cfg[idx].bit_format,
  1592. ucontrol->value.enumerated.item[0]);
  1593. return 0;
  1594. }
  1595. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  1596. struct snd_ctl_elem_value *ucontrol)
  1597. {
  1598. int idx = aux_pcm_get_port_idx(kcontrol);
  1599. if (idx < 0)
  1600. return idx;
  1601. aux_pcm_rx_cfg[idx].bit_format =
  1602. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1603. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1604. idx, aux_pcm_rx_cfg[idx].bit_format,
  1605. ucontrol->value.enumerated.item[0]);
  1606. return 0;
  1607. }
  1608. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  1609. struct snd_ctl_elem_value *ucontrol)
  1610. {
  1611. int idx = aux_pcm_get_port_idx(kcontrol);
  1612. if (idx < 0)
  1613. return idx;
  1614. ucontrol->value.enumerated.item[0] =
  1615. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  1616. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1617. idx, aux_pcm_tx_cfg[idx].bit_format,
  1618. ucontrol->value.enumerated.item[0]);
  1619. return 0;
  1620. }
  1621. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  1622. struct snd_ctl_elem_value *ucontrol)
  1623. {
  1624. int idx = aux_pcm_get_port_idx(kcontrol);
  1625. if (idx < 0)
  1626. return idx;
  1627. aux_pcm_tx_cfg[idx].bit_format =
  1628. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1629. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1630. idx, aux_pcm_tx_cfg[idx].bit_format,
  1631. ucontrol->value.enumerated.item[0]);
  1632. return 0;
  1633. }
  1634. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  1635. {
  1636. int idx = 0;
  1637. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  1638. sizeof("PRIM_MI2S_RX"))) {
  1639. idx = PRIM_MI2S;
  1640. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  1641. sizeof("SEC_MI2S_RX"))) {
  1642. idx = SEC_MI2S;
  1643. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  1644. sizeof("TERT_MI2S_RX"))) {
  1645. idx = TERT_MI2S;
  1646. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  1647. sizeof("PRIM_MI2S_TX"))) {
  1648. idx = PRIM_MI2S;
  1649. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  1650. sizeof("SEC_MI2S_TX"))) {
  1651. idx = SEC_MI2S;
  1652. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  1653. sizeof("TERT_MI2S_TX"))) {
  1654. idx = TERT_MI2S;
  1655. } else {
  1656. pr_err("%s: unsupported channel: %s\n",
  1657. __func__, kcontrol->id.name);
  1658. idx = -EINVAL;
  1659. }
  1660. return idx;
  1661. }
  1662. static int mi2s_get_sample_rate(int value)
  1663. {
  1664. int sample_rate = 0;
  1665. switch (value) {
  1666. case 0:
  1667. sample_rate = SAMPLING_RATE_8KHZ;
  1668. break;
  1669. case 1:
  1670. sample_rate = SAMPLING_RATE_11P025KHZ;
  1671. break;
  1672. case 2:
  1673. sample_rate = SAMPLING_RATE_16KHZ;
  1674. break;
  1675. case 3:
  1676. sample_rate = SAMPLING_RATE_22P05KHZ;
  1677. break;
  1678. case 4:
  1679. sample_rate = SAMPLING_RATE_32KHZ;
  1680. break;
  1681. case 5:
  1682. sample_rate = SAMPLING_RATE_44P1KHZ;
  1683. break;
  1684. case 6:
  1685. sample_rate = SAMPLING_RATE_48KHZ;
  1686. break;
  1687. case 7:
  1688. sample_rate = SAMPLING_RATE_96KHZ;
  1689. break;
  1690. case 8:
  1691. sample_rate = SAMPLING_RATE_192KHZ;
  1692. break;
  1693. default:
  1694. sample_rate = SAMPLING_RATE_48KHZ;
  1695. break;
  1696. }
  1697. return sample_rate;
  1698. }
  1699. static int mi2s_get_sample_rate_val(int sample_rate)
  1700. {
  1701. int sample_rate_val = 0;
  1702. switch (sample_rate) {
  1703. case SAMPLING_RATE_8KHZ:
  1704. sample_rate_val = 0;
  1705. break;
  1706. case SAMPLING_RATE_11P025KHZ:
  1707. sample_rate_val = 1;
  1708. break;
  1709. case SAMPLING_RATE_16KHZ:
  1710. sample_rate_val = 2;
  1711. break;
  1712. case SAMPLING_RATE_22P05KHZ:
  1713. sample_rate_val = 3;
  1714. break;
  1715. case SAMPLING_RATE_32KHZ:
  1716. sample_rate_val = 4;
  1717. break;
  1718. case SAMPLING_RATE_44P1KHZ:
  1719. sample_rate_val = 5;
  1720. break;
  1721. case SAMPLING_RATE_48KHZ:
  1722. sample_rate_val = 6;
  1723. break;
  1724. case SAMPLING_RATE_96KHZ:
  1725. sample_rate_val = 7;
  1726. break;
  1727. case SAMPLING_RATE_192KHZ:
  1728. sample_rate_val = 8;
  1729. break;
  1730. default:
  1731. sample_rate_val = 6;
  1732. break;
  1733. }
  1734. return sample_rate_val;
  1735. }
  1736. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1737. struct snd_ctl_elem_value *ucontrol)
  1738. {
  1739. int idx = mi2s_get_port_idx(kcontrol);
  1740. if (idx < 0)
  1741. return idx;
  1742. ucontrol->value.enumerated.item[0] =
  1743. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  1744. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1745. idx, mi2s_rx_cfg[idx].sample_rate,
  1746. ucontrol->value.enumerated.item[0]);
  1747. return 0;
  1748. }
  1749. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1750. struct snd_ctl_elem_value *ucontrol)
  1751. {
  1752. int idx = mi2s_get_port_idx(kcontrol);
  1753. if (idx < 0)
  1754. return idx;
  1755. mi2s_rx_cfg[idx].sample_rate =
  1756. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1757. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1758. idx, mi2s_rx_cfg[idx].sample_rate,
  1759. ucontrol->value.enumerated.item[0]);
  1760. return 0;
  1761. }
  1762. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1763. struct snd_ctl_elem_value *ucontrol)
  1764. {
  1765. int idx = mi2s_get_port_idx(kcontrol);
  1766. if (idx < 0)
  1767. return idx;
  1768. ucontrol->value.enumerated.item[0] =
  1769. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  1770. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1771. idx, mi2s_tx_cfg[idx].sample_rate,
  1772. ucontrol->value.enumerated.item[0]);
  1773. return 0;
  1774. }
  1775. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1776. struct snd_ctl_elem_value *ucontrol)
  1777. {
  1778. int idx = mi2s_get_port_idx(kcontrol);
  1779. if (idx < 0)
  1780. return idx;
  1781. mi2s_tx_cfg[idx].sample_rate =
  1782. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1783. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1784. idx, mi2s_tx_cfg[idx].sample_rate,
  1785. ucontrol->value.enumerated.item[0]);
  1786. return 0;
  1787. }
  1788. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  1789. struct snd_ctl_elem_value *ucontrol)
  1790. {
  1791. int idx = mi2s_get_port_idx(kcontrol);
  1792. if (idx < 0)
  1793. return idx;
  1794. ucontrol->value.enumerated.item[0] =
  1795. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  1796. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1797. idx, mi2s_rx_cfg[idx].bit_format,
  1798. ucontrol->value.enumerated.item[0]);
  1799. return 0;
  1800. }
  1801. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  1802. struct snd_ctl_elem_value *ucontrol)
  1803. {
  1804. int idx = mi2s_get_port_idx(kcontrol);
  1805. if (idx < 0)
  1806. return idx;
  1807. mi2s_rx_cfg[idx].bit_format =
  1808. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1809. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1810. idx, mi2s_rx_cfg[idx].bit_format,
  1811. ucontrol->value.enumerated.item[0]);
  1812. return 0;
  1813. }
  1814. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  1815. struct snd_ctl_elem_value *ucontrol)
  1816. {
  1817. int idx = mi2s_get_port_idx(kcontrol);
  1818. if (idx < 0)
  1819. return idx;
  1820. ucontrol->value.enumerated.item[0] =
  1821. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  1822. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1823. idx, mi2s_tx_cfg[idx].bit_format,
  1824. ucontrol->value.enumerated.item[0]);
  1825. return 0;
  1826. }
  1827. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  1828. struct snd_ctl_elem_value *ucontrol)
  1829. {
  1830. int idx = mi2s_get_port_idx(kcontrol);
  1831. if (idx < 0)
  1832. return idx;
  1833. mi2s_tx_cfg[idx].bit_format =
  1834. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1835. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1836. idx, mi2s_tx_cfg[idx].bit_format,
  1837. ucontrol->value.enumerated.item[0]);
  1838. return 0;
  1839. }
  1840. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  1841. struct snd_ctl_elem_value *ucontrol)
  1842. {
  1843. int idx = mi2s_get_port_idx(kcontrol);
  1844. if (idx < 0)
  1845. return idx;
  1846. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  1847. idx, mi2s_rx_cfg[idx].channels);
  1848. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  1849. return 0;
  1850. }
  1851. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  1852. struct snd_ctl_elem_value *ucontrol)
  1853. {
  1854. int idx = mi2s_get_port_idx(kcontrol);
  1855. if (idx < 0)
  1856. return idx;
  1857. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  1858. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  1859. idx, mi2s_rx_cfg[idx].channels);
  1860. return 1;
  1861. }
  1862. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  1863. struct snd_ctl_elem_value *ucontrol)
  1864. {
  1865. int idx = mi2s_get_port_idx(kcontrol);
  1866. if (idx < 0)
  1867. return idx;
  1868. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  1869. idx, mi2s_tx_cfg[idx].channels);
  1870. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  1871. return 0;
  1872. }
  1873. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  1874. struct snd_ctl_elem_value *ucontrol)
  1875. {
  1876. int idx = mi2s_get_port_idx(kcontrol);
  1877. if (idx < 0)
  1878. return idx;
  1879. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  1880. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  1881. idx, mi2s_tx_cfg[idx].channels);
  1882. return 1;
  1883. }
  1884. static int msm_get_port_id(int be_id)
  1885. {
  1886. int afe_port_id = 0;
  1887. switch (be_id) {
  1888. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  1889. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  1890. break;
  1891. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  1892. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  1893. break;
  1894. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  1895. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  1896. break;
  1897. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  1898. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  1899. break;
  1900. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  1901. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  1902. break;
  1903. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  1904. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  1905. break;
  1906. default:
  1907. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  1908. afe_port_id = -EINVAL;
  1909. }
  1910. return afe_port_id;
  1911. }
  1912. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  1913. {
  1914. u32 bit_per_sample = 0;
  1915. switch (bit_format) {
  1916. case SNDRV_PCM_FORMAT_S32_LE:
  1917. case SNDRV_PCM_FORMAT_S24_3LE:
  1918. case SNDRV_PCM_FORMAT_S24_LE:
  1919. bit_per_sample = 32;
  1920. break;
  1921. case SNDRV_PCM_FORMAT_S16_LE:
  1922. default:
  1923. bit_per_sample = 16;
  1924. break;
  1925. }
  1926. return bit_per_sample;
  1927. }
  1928. static void update_mi2s_clk_val(int dai_id, int stream)
  1929. {
  1930. u32 bit_per_sample = 0;
  1931. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  1932. bit_per_sample =
  1933. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  1934. mi2s_clk[dai_id].clk_freq_in_hz =
  1935. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  1936. } else {
  1937. bit_per_sample =
  1938. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  1939. mi2s_clk[dai_id].clk_freq_in_hz =
  1940. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  1941. }
  1942. }
  1943. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  1944. {
  1945. int ret = 0;
  1946. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1947. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  1948. int port_id = 0;
  1949. int index = cpu_dai->id;
  1950. port_id = msm_get_port_id(rtd->dai_link->id);
  1951. if (port_id < 0) {
  1952. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  1953. ret = port_id;
  1954. goto err;
  1955. }
  1956. if (enable) {
  1957. update_mi2s_clk_val(index, substream->stream);
  1958. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  1959. mi2s_clk[index].clk_freq_in_hz);
  1960. }
  1961. mi2s_clk[index].enable = enable;
  1962. ret = afe_set_lpass_clock_v2(port_id,
  1963. &mi2s_clk[index]);
  1964. if (ret < 0) {
  1965. dev_err(rtd->card->dev,
  1966. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  1967. __func__, port_id, ret);
  1968. goto err;
  1969. }
  1970. err:
  1971. return ret;
  1972. }
  1973. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1974. {
  1975. int idx = 0;
  1976. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  1977. sizeof("WSA_CDC_DMA_RX_0")))
  1978. idx = WSA_CDC_DMA_RX_0;
  1979. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  1980. sizeof("WSA_CDC_DMA_RX_0")))
  1981. idx = WSA_CDC_DMA_RX_1;
  1982. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1983. sizeof("RX_CDC_DMA_RX_0")))
  1984. idx = RX_CDC_DMA_RX_0;
  1985. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1986. sizeof("RX_CDC_DMA_RX_1")))
  1987. idx = RX_CDC_DMA_RX_1;
  1988. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1989. sizeof("RX_CDC_DMA_RX_2")))
  1990. idx = RX_CDC_DMA_RX_2;
  1991. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1992. sizeof("RX_CDC_DMA_RX_3")))
  1993. idx = RX_CDC_DMA_RX_3;
  1994. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1995. sizeof("RX_CDC_DMA_RX_5")))
  1996. idx = RX_CDC_DMA_RX_5;
  1997. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  1998. sizeof("WSA_CDC_DMA_TX_0")))
  1999. idx = WSA_CDC_DMA_TX_0;
  2000. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  2001. sizeof("WSA_CDC_DMA_TX_1")))
  2002. idx = WSA_CDC_DMA_TX_1;
  2003. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  2004. sizeof("WSA_CDC_DMA_TX_2")))
  2005. idx = WSA_CDC_DMA_TX_2;
  2006. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  2007. sizeof("TX_CDC_DMA_TX_0")))
  2008. idx = TX_CDC_DMA_TX_0;
  2009. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  2010. sizeof("TX_CDC_DMA_TX_3")))
  2011. idx = TX_CDC_DMA_TX_3;
  2012. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  2013. sizeof("TX_CDC_DMA_TX_4")))
  2014. idx = TX_CDC_DMA_TX_4;
  2015. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
  2016. sizeof("VA_CDC_DMA_TX_0")))
  2017. idx = VA_CDC_DMA_TX_0;
  2018. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
  2019. sizeof("VA_CDC_DMA_TX_1")))
  2020. idx = VA_CDC_DMA_TX_1;
  2021. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
  2022. sizeof("VA_CDC_DMA_TX_2")))
  2023. idx = VA_CDC_DMA_TX_2;
  2024. else {
  2025. pr_err("%s: unsupported channel: %s\n",
  2026. __func__, kcontrol->id.name);
  2027. return -EINVAL;
  2028. }
  2029. return idx;
  2030. }
  2031. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  2032. struct snd_ctl_elem_value *ucontrol)
  2033. {
  2034. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2035. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2036. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2037. return ch_num;
  2038. }
  2039. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  2040. cdc_dma_rx_cfg[ch_num].channels - 1);
  2041. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  2042. return 0;
  2043. }
  2044. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  2045. struct snd_ctl_elem_value *ucontrol)
  2046. {
  2047. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2048. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2049. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2050. return ch_num;
  2051. }
  2052. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  2053. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  2054. cdc_dma_rx_cfg[ch_num].channels);
  2055. return 1;
  2056. }
  2057. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  2058. struct snd_ctl_elem_value *ucontrol)
  2059. {
  2060. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2061. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2062. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2063. return ch_num;
  2064. }
  2065. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  2066. case SNDRV_PCM_FORMAT_S32_LE:
  2067. ucontrol->value.integer.value[0] = 3;
  2068. break;
  2069. case SNDRV_PCM_FORMAT_S24_3LE:
  2070. ucontrol->value.integer.value[0] = 2;
  2071. break;
  2072. case SNDRV_PCM_FORMAT_S24_LE:
  2073. ucontrol->value.integer.value[0] = 1;
  2074. break;
  2075. case SNDRV_PCM_FORMAT_S16_LE:
  2076. default:
  2077. ucontrol->value.integer.value[0] = 0;
  2078. break;
  2079. }
  2080. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  2081. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  2082. ucontrol->value.integer.value[0]);
  2083. return 0;
  2084. }
  2085. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  2086. struct snd_ctl_elem_value *ucontrol)
  2087. {
  2088. int rc = 0;
  2089. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2090. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2091. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2092. return ch_num;
  2093. }
  2094. switch (ucontrol->value.integer.value[0]) {
  2095. case 3:
  2096. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  2097. break;
  2098. case 2:
  2099. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  2100. break;
  2101. case 1:
  2102. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  2103. break;
  2104. case 0:
  2105. default:
  2106. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  2107. break;
  2108. }
  2109. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  2110. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  2111. ucontrol->value.integer.value[0]);
  2112. return rc;
  2113. }
  2114. static int cdc_dma_get_sample_rate_val(int sample_rate)
  2115. {
  2116. int sample_rate_val = 0;
  2117. switch (sample_rate) {
  2118. case SAMPLING_RATE_8KHZ:
  2119. sample_rate_val = 0;
  2120. break;
  2121. case SAMPLING_RATE_11P025KHZ:
  2122. sample_rate_val = 1;
  2123. break;
  2124. case SAMPLING_RATE_16KHZ:
  2125. sample_rate_val = 2;
  2126. break;
  2127. case SAMPLING_RATE_22P05KHZ:
  2128. sample_rate_val = 3;
  2129. break;
  2130. case SAMPLING_RATE_32KHZ:
  2131. sample_rate_val = 4;
  2132. break;
  2133. case SAMPLING_RATE_44P1KHZ:
  2134. sample_rate_val = 5;
  2135. break;
  2136. case SAMPLING_RATE_48KHZ:
  2137. sample_rate_val = 6;
  2138. break;
  2139. case SAMPLING_RATE_88P2KHZ:
  2140. sample_rate_val = 7;
  2141. break;
  2142. case SAMPLING_RATE_96KHZ:
  2143. sample_rate_val = 8;
  2144. break;
  2145. case SAMPLING_RATE_176P4KHZ:
  2146. sample_rate_val = 9;
  2147. break;
  2148. case SAMPLING_RATE_192KHZ:
  2149. sample_rate_val = 10;
  2150. break;
  2151. case SAMPLING_RATE_352P8KHZ:
  2152. sample_rate_val = 11;
  2153. break;
  2154. case SAMPLING_RATE_384KHZ:
  2155. sample_rate_val = 12;
  2156. break;
  2157. default:
  2158. sample_rate_val = 6;
  2159. break;
  2160. }
  2161. return sample_rate_val;
  2162. }
  2163. static int cdc_dma_get_sample_rate(int value)
  2164. {
  2165. int sample_rate = 0;
  2166. switch (value) {
  2167. case 0:
  2168. sample_rate = SAMPLING_RATE_8KHZ;
  2169. break;
  2170. case 1:
  2171. sample_rate = SAMPLING_RATE_11P025KHZ;
  2172. break;
  2173. case 2:
  2174. sample_rate = SAMPLING_RATE_16KHZ;
  2175. break;
  2176. case 3:
  2177. sample_rate = SAMPLING_RATE_22P05KHZ;
  2178. break;
  2179. case 4:
  2180. sample_rate = SAMPLING_RATE_32KHZ;
  2181. break;
  2182. case 5:
  2183. sample_rate = SAMPLING_RATE_44P1KHZ;
  2184. break;
  2185. case 6:
  2186. sample_rate = SAMPLING_RATE_48KHZ;
  2187. break;
  2188. case 7:
  2189. sample_rate = SAMPLING_RATE_88P2KHZ;
  2190. break;
  2191. case 8:
  2192. sample_rate = SAMPLING_RATE_96KHZ;
  2193. break;
  2194. case 9:
  2195. sample_rate = SAMPLING_RATE_176P4KHZ;
  2196. break;
  2197. case 10:
  2198. sample_rate = SAMPLING_RATE_192KHZ;
  2199. break;
  2200. case 11:
  2201. sample_rate = SAMPLING_RATE_352P8KHZ;
  2202. break;
  2203. case 12:
  2204. sample_rate = SAMPLING_RATE_384KHZ;
  2205. break;
  2206. default:
  2207. sample_rate = SAMPLING_RATE_48KHZ;
  2208. break;
  2209. }
  2210. return sample_rate;
  2211. }
  2212. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2213. struct snd_ctl_elem_value *ucontrol)
  2214. {
  2215. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2216. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2217. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2218. return ch_num;
  2219. }
  2220. ucontrol->value.enumerated.item[0] =
  2221. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  2222. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  2223. cdc_dma_rx_cfg[ch_num].sample_rate);
  2224. return 0;
  2225. }
  2226. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2227. struct snd_ctl_elem_value *ucontrol)
  2228. {
  2229. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2230. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2231. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2232. return ch_num;
  2233. }
  2234. cdc_dma_rx_cfg[ch_num].sample_rate =
  2235. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2236. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  2237. __func__, ucontrol->value.enumerated.item[0],
  2238. cdc_dma_rx_cfg[ch_num].sample_rate);
  2239. return 0;
  2240. }
  2241. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  2242. struct snd_ctl_elem_value *ucontrol)
  2243. {
  2244. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2245. if (ch_num < 0) {
  2246. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2247. return ch_num;
  2248. }
  2249. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  2250. cdc_dma_tx_cfg[ch_num].channels);
  2251. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  2252. return 0;
  2253. }
  2254. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  2255. struct snd_ctl_elem_value *ucontrol)
  2256. {
  2257. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2258. if (ch_num < 0) {
  2259. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2260. return ch_num;
  2261. }
  2262. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  2263. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  2264. cdc_dma_tx_cfg[ch_num].channels);
  2265. return 1;
  2266. }
  2267. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2268. struct snd_ctl_elem_value *ucontrol)
  2269. {
  2270. int sample_rate_val;
  2271. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2272. if (ch_num < 0) {
  2273. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2274. return ch_num;
  2275. }
  2276. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  2277. case SAMPLING_RATE_384KHZ:
  2278. sample_rate_val = 12;
  2279. break;
  2280. case SAMPLING_RATE_352P8KHZ:
  2281. sample_rate_val = 11;
  2282. break;
  2283. case SAMPLING_RATE_192KHZ:
  2284. sample_rate_val = 10;
  2285. break;
  2286. case SAMPLING_RATE_176P4KHZ:
  2287. sample_rate_val = 9;
  2288. break;
  2289. case SAMPLING_RATE_96KHZ:
  2290. sample_rate_val = 8;
  2291. break;
  2292. case SAMPLING_RATE_88P2KHZ:
  2293. sample_rate_val = 7;
  2294. break;
  2295. case SAMPLING_RATE_48KHZ:
  2296. sample_rate_val = 6;
  2297. break;
  2298. case SAMPLING_RATE_44P1KHZ:
  2299. sample_rate_val = 5;
  2300. break;
  2301. case SAMPLING_RATE_32KHZ:
  2302. sample_rate_val = 4;
  2303. break;
  2304. case SAMPLING_RATE_22P05KHZ:
  2305. sample_rate_val = 3;
  2306. break;
  2307. case SAMPLING_RATE_16KHZ:
  2308. sample_rate_val = 2;
  2309. break;
  2310. case SAMPLING_RATE_11P025KHZ:
  2311. sample_rate_val = 1;
  2312. break;
  2313. case SAMPLING_RATE_8KHZ:
  2314. sample_rate_val = 0;
  2315. break;
  2316. default:
  2317. sample_rate_val = 6;
  2318. break;
  2319. }
  2320. ucontrol->value.integer.value[0] = sample_rate_val;
  2321. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  2322. cdc_dma_tx_cfg[ch_num].sample_rate);
  2323. return 0;
  2324. }
  2325. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2326. struct snd_ctl_elem_value *ucontrol)
  2327. {
  2328. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2329. if (ch_num < 0) {
  2330. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2331. return ch_num;
  2332. }
  2333. switch (ucontrol->value.integer.value[0]) {
  2334. case 12:
  2335. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  2336. break;
  2337. case 11:
  2338. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  2339. break;
  2340. case 10:
  2341. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  2342. break;
  2343. case 9:
  2344. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  2345. break;
  2346. case 8:
  2347. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  2348. break;
  2349. case 7:
  2350. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  2351. break;
  2352. case 6:
  2353. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  2354. break;
  2355. case 5:
  2356. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  2357. break;
  2358. case 4:
  2359. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  2360. break;
  2361. case 3:
  2362. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  2363. break;
  2364. case 2:
  2365. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  2366. break;
  2367. case 1:
  2368. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  2369. break;
  2370. case 0:
  2371. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  2372. break;
  2373. default:
  2374. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  2375. break;
  2376. }
  2377. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  2378. __func__, ucontrol->value.integer.value[0],
  2379. cdc_dma_tx_cfg[ch_num].sample_rate);
  2380. return 0;
  2381. }
  2382. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  2383. struct snd_ctl_elem_value *ucontrol)
  2384. {
  2385. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2386. if (ch_num < 0) {
  2387. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2388. return ch_num;
  2389. }
  2390. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  2391. case SNDRV_PCM_FORMAT_S32_LE:
  2392. ucontrol->value.integer.value[0] = 3;
  2393. break;
  2394. case SNDRV_PCM_FORMAT_S24_3LE:
  2395. ucontrol->value.integer.value[0] = 2;
  2396. break;
  2397. case SNDRV_PCM_FORMAT_S24_LE:
  2398. ucontrol->value.integer.value[0] = 1;
  2399. break;
  2400. case SNDRV_PCM_FORMAT_S16_LE:
  2401. default:
  2402. ucontrol->value.integer.value[0] = 0;
  2403. break;
  2404. }
  2405. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  2406. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  2407. ucontrol->value.integer.value[0]);
  2408. return 0;
  2409. }
  2410. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  2411. struct snd_ctl_elem_value *ucontrol)
  2412. {
  2413. int rc = 0;
  2414. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2415. if (ch_num < 0) {
  2416. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2417. return ch_num;
  2418. }
  2419. switch (ucontrol->value.integer.value[0]) {
  2420. case 3:
  2421. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  2422. break;
  2423. case 2:
  2424. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  2425. break;
  2426. case 1:
  2427. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  2428. break;
  2429. case 0:
  2430. default:
  2431. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  2432. break;
  2433. }
  2434. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  2435. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  2436. ucontrol->value.integer.value[0]);
  2437. return rc;
  2438. }
  2439. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  2440. {
  2441. int idx = 0;
  2442. switch (be_id) {
  2443. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  2444. idx = WSA_CDC_DMA_RX_0;
  2445. break;
  2446. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  2447. idx = WSA_CDC_DMA_TX_0;
  2448. break;
  2449. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  2450. idx = WSA_CDC_DMA_RX_1;
  2451. break;
  2452. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  2453. idx = WSA_CDC_DMA_TX_1;
  2454. break;
  2455. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  2456. idx = WSA_CDC_DMA_TX_2;
  2457. break;
  2458. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  2459. idx = RX_CDC_DMA_RX_0;
  2460. break;
  2461. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  2462. idx = RX_CDC_DMA_RX_1;
  2463. break;
  2464. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  2465. idx = RX_CDC_DMA_RX_2;
  2466. break;
  2467. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  2468. idx = RX_CDC_DMA_RX_3;
  2469. break;
  2470. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  2471. idx = RX_CDC_DMA_RX_5;
  2472. break;
  2473. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  2474. idx = TX_CDC_DMA_TX_0;
  2475. break;
  2476. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  2477. idx = TX_CDC_DMA_TX_3;
  2478. break;
  2479. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  2480. idx = TX_CDC_DMA_TX_4;
  2481. break;
  2482. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  2483. idx = VA_CDC_DMA_TX_0;
  2484. break;
  2485. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  2486. idx = VA_CDC_DMA_TX_1;
  2487. break;
  2488. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  2489. idx = VA_CDC_DMA_TX_2;
  2490. break;
  2491. default:
  2492. idx = RX_CDC_DMA_RX_0;
  2493. break;
  2494. }
  2495. return idx;
  2496. }
  2497. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  2498. struct snd_ctl_elem_value *ucontrol)
  2499. {
  2500. /*
  2501. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  2502. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  2503. * value.
  2504. */
  2505. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  2506. case SAMPLING_RATE_96KHZ:
  2507. ucontrol->value.integer.value[0] = 5;
  2508. break;
  2509. case SAMPLING_RATE_88P2KHZ:
  2510. ucontrol->value.integer.value[0] = 4;
  2511. break;
  2512. case SAMPLING_RATE_48KHZ:
  2513. ucontrol->value.integer.value[0] = 3;
  2514. break;
  2515. case SAMPLING_RATE_44P1KHZ:
  2516. ucontrol->value.integer.value[0] = 2;
  2517. break;
  2518. case SAMPLING_RATE_16KHZ:
  2519. ucontrol->value.integer.value[0] = 1;
  2520. break;
  2521. case SAMPLING_RATE_8KHZ:
  2522. default:
  2523. ucontrol->value.integer.value[0] = 0;
  2524. break;
  2525. }
  2526. pr_debug("%s: sample rate = %d\n", __func__,
  2527. slim_rx_cfg[SLIM_RX_7].sample_rate);
  2528. return 0;
  2529. }
  2530. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  2531. struct snd_ctl_elem_value *ucontrol)
  2532. {
  2533. switch (ucontrol->value.integer.value[0]) {
  2534. case 1:
  2535. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  2536. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  2537. break;
  2538. case 2:
  2539. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  2540. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  2541. break;
  2542. case 3:
  2543. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  2544. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  2545. break;
  2546. case 4:
  2547. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  2548. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  2549. break;
  2550. case 5:
  2551. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  2552. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  2553. break;
  2554. case 0:
  2555. default:
  2556. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  2557. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  2558. break;
  2559. }
  2560. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  2561. __func__,
  2562. slim_rx_cfg[SLIM_RX_7].sample_rate,
  2563. slim_tx_cfg[SLIM_TX_7].sample_rate,
  2564. ucontrol->value.enumerated.item[0]);
  2565. return 0;
  2566. }
  2567. static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
  2568. struct snd_ctl_elem_value *ucontrol)
  2569. {
  2570. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  2571. case SAMPLING_RATE_96KHZ:
  2572. ucontrol->value.integer.value[0] = 5;
  2573. break;
  2574. case SAMPLING_RATE_88P2KHZ:
  2575. ucontrol->value.integer.value[0] = 4;
  2576. break;
  2577. case SAMPLING_RATE_48KHZ:
  2578. ucontrol->value.integer.value[0] = 3;
  2579. break;
  2580. case SAMPLING_RATE_44P1KHZ:
  2581. ucontrol->value.integer.value[0] = 2;
  2582. break;
  2583. case SAMPLING_RATE_16KHZ:
  2584. ucontrol->value.integer.value[0] = 1;
  2585. break;
  2586. case SAMPLING_RATE_8KHZ:
  2587. default:
  2588. ucontrol->value.integer.value[0] = 0;
  2589. break;
  2590. }
  2591. pr_debug("%s: sample rate rx = %d\n", __func__,
  2592. slim_rx_cfg[SLIM_RX_7].sample_rate);
  2593. return 0;
  2594. }
  2595. static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
  2596. struct snd_ctl_elem_value *ucontrol)
  2597. {
  2598. switch (ucontrol->value.integer.value[0]) {
  2599. case 1:
  2600. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  2601. break;
  2602. case 2:
  2603. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  2604. break;
  2605. case 3:
  2606. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  2607. break;
  2608. case 4:
  2609. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  2610. break;
  2611. case 5:
  2612. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  2613. break;
  2614. case 0:
  2615. default:
  2616. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  2617. break;
  2618. }
  2619. pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
  2620. __func__,
  2621. slim_rx_cfg[SLIM_RX_7].sample_rate,
  2622. ucontrol->value.enumerated.item[0]);
  2623. return 0;
  2624. }
  2625. static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
  2626. struct snd_ctl_elem_value *ucontrol)
  2627. {
  2628. switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
  2629. case SAMPLING_RATE_96KHZ:
  2630. ucontrol->value.integer.value[0] = 5;
  2631. break;
  2632. case SAMPLING_RATE_88P2KHZ:
  2633. ucontrol->value.integer.value[0] = 4;
  2634. break;
  2635. case SAMPLING_RATE_48KHZ:
  2636. ucontrol->value.integer.value[0] = 3;
  2637. break;
  2638. case SAMPLING_RATE_44P1KHZ:
  2639. ucontrol->value.integer.value[0] = 2;
  2640. break;
  2641. case SAMPLING_RATE_16KHZ:
  2642. ucontrol->value.integer.value[0] = 1;
  2643. break;
  2644. case SAMPLING_RATE_8KHZ:
  2645. default:
  2646. ucontrol->value.integer.value[0] = 0;
  2647. break;
  2648. }
  2649. pr_debug("%s: sample rate tx = %d\n", __func__,
  2650. slim_tx_cfg[SLIM_TX_7].sample_rate);
  2651. return 0;
  2652. }
  2653. static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
  2654. struct snd_ctl_elem_value *ucontrol)
  2655. {
  2656. switch (ucontrol->value.integer.value[0]) {
  2657. case 1:
  2658. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  2659. break;
  2660. case 2:
  2661. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  2662. break;
  2663. case 3:
  2664. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  2665. break;
  2666. case 4:
  2667. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  2668. break;
  2669. case 5:
  2670. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  2671. break;
  2672. case 0:
  2673. default:
  2674. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  2675. break;
  2676. }
  2677. pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
  2678. __func__,
  2679. slim_tx_cfg[SLIM_TX_7].sample_rate,
  2680. ucontrol->value.enumerated.item[0]);
  2681. return 0;
  2682. }
  2683. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  2684. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  2685. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2686. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  2687. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2688. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  2689. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2690. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  2691. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2692. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  2693. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2694. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  2695. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2696. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  2697. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2698. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  2699. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2700. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  2701. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2702. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  2703. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2704. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  2705. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2706. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  2707. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2708. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  2709. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2710. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
  2711. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2712. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
  2713. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2714. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
  2715. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2716. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  2717. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2718. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  2719. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2720. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  2721. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2722. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  2723. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2724. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  2725. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2726. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  2727. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2728. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  2729. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2730. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  2731. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2732. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  2733. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2734. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  2735. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2736. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  2737. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2738. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  2739. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2740. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
  2741. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2742. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
  2743. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2744. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
  2745. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2746. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  2747. wsa_cdc_dma_rx_0_sample_rate,
  2748. cdc_dma_rx_sample_rate_get,
  2749. cdc_dma_rx_sample_rate_put),
  2750. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  2751. wsa_cdc_dma_rx_1_sample_rate,
  2752. cdc_dma_rx_sample_rate_get,
  2753. cdc_dma_rx_sample_rate_put),
  2754. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  2755. rx_cdc_dma_rx_0_sample_rate,
  2756. cdc_dma_rx_sample_rate_get,
  2757. cdc_dma_rx_sample_rate_put),
  2758. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  2759. rx_cdc_dma_rx_1_sample_rate,
  2760. cdc_dma_rx_sample_rate_get,
  2761. cdc_dma_rx_sample_rate_put),
  2762. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  2763. rx_cdc_dma_rx_2_sample_rate,
  2764. cdc_dma_rx_sample_rate_get,
  2765. cdc_dma_rx_sample_rate_put),
  2766. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  2767. rx_cdc_dma_rx_3_sample_rate,
  2768. cdc_dma_rx_sample_rate_get,
  2769. cdc_dma_rx_sample_rate_put),
  2770. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  2771. rx_cdc_dma_rx_5_sample_rate,
  2772. cdc_dma_rx_sample_rate_get,
  2773. cdc_dma_rx_sample_rate_put),
  2774. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  2775. wsa_cdc_dma_tx_0_sample_rate,
  2776. cdc_dma_tx_sample_rate_get,
  2777. cdc_dma_tx_sample_rate_put),
  2778. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  2779. wsa_cdc_dma_tx_1_sample_rate,
  2780. cdc_dma_tx_sample_rate_get,
  2781. cdc_dma_tx_sample_rate_put),
  2782. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  2783. wsa_cdc_dma_tx_2_sample_rate,
  2784. cdc_dma_tx_sample_rate_get,
  2785. cdc_dma_tx_sample_rate_put),
  2786. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  2787. tx_cdc_dma_tx_0_sample_rate,
  2788. cdc_dma_tx_sample_rate_get,
  2789. cdc_dma_tx_sample_rate_put),
  2790. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  2791. tx_cdc_dma_tx_3_sample_rate,
  2792. cdc_dma_tx_sample_rate_get,
  2793. cdc_dma_tx_sample_rate_put),
  2794. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  2795. tx_cdc_dma_tx_4_sample_rate,
  2796. cdc_dma_tx_sample_rate_get,
  2797. cdc_dma_tx_sample_rate_put),
  2798. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
  2799. va_cdc_dma_tx_0_sample_rate,
  2800. cdc_dma_tx_sample_rate_get,
  2801. cdc_dma_tx_sample_rate_put),
  2802. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
  2803. va_cdc_dma_tx_1_sample_rate,
  2804. cdc_dma_tx_sample_rate_get,
  2805. cdc_dma_tx_sample_rate_put),
  2806. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
  2807. va_cdc_dma_tx_2_sample_rate,
  2808. cdc_dma_tx_sample_rate_get,
  2809. cdc_dma_tx_sample_rate_put),
  2810. };
  2811. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  2812. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  2813. usb_audio_rx_sample_rate_get,
  2814. usb_audio_rx_sample_rate_put),
  2815. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  2816. usb_audio_tx_sample_rate_get,
  2817. usb_audio_tx_sample_rate_put),
  2818. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2819. tdm_rx_sample_rate_get,
  2820. tdm_rx_sample_rate_put),
  2821. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2822. tdm_rx_sample_rate_get,
  2823. tdm_rx_sample_rate_put),
  2824. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2825. tdm_rx_sample_rate_get,
  2826. tdm_rx_sample_rate_put),
  2827. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2828. tdm_tx_sample_rate_get,
  2829. tdm_tx_sample_rate_put),
  2830. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2831. tdm_tx_sample_rate_get,
  2832. tdm_tx_sample_rate_put),
  2833. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2834. tdm_tx_sample_rate_get,
  2835. tdm_tx_sample_rate_put),
  2836. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  2837. aux_pcm_rx_sample_rate_get,
  2838. aux_pcm_rx_sample_rate_put),
  2839. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  2840. aux_pcm_rx_sample_rate_get,
  2841. aux_pcm_rx_sample_rate_put),
  2842. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  2843. aux_pcm_rx_sample_rate_get,
  2844. aux_pcm_rx_sample_rate_put),
  2845. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  2846. aux_pcm_tx_sample_rate_get,
  2847. aux_pcm_tx_sample_rate_put),
  2848. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  2849. aux_pcm_tx_sample_rate_get,
  2850. aux_pcm_tx_sample_rate_put),
  2851. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  2852. aux_pcm_tx_sample_rate_get,
  2853. aux_pcm_tx_sample_rate_put),
  2854. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  2855. mi2s_rx_sample_rate_get,
  2856. mi2s_rx_sample_rate_put),
  2857. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  2858. mi2s_rx_sample_rate_get,
  2859. mi2s_rx_sample_rate_put),
  2860. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  2861. mi2s_rx_sample_rate_get,
  2862. mi2s_rx_sample_rate_put),
  2863. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  2864. mi2s_tx_sample_rate_get,
  2865. mi2s_tx_sample_rate_put),
  2866. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  2867. mi2s_tx_sample_rate_get,
  2868. mi2s_tx_sample_rate_put),
  2869. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  2870. mi2s_tx_sample_rate_get,
  2871. mi2s_tx_sample_rate_put),
  2872. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  2873. usb_audio_rx_format_get, usb_audio_rx_format_put),
  2874. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  2875. usb_audio_tx_format_get, usb_audio_tx_format_put),
  2876. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  2877. tdm_rx_format_get,
  2878. tdm_rx_format_put),
  2879. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  2880. tdm_rx_format_get,
  2881. tdm_rx_format_put),
  2882. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  2883. tdm_rx_format_get,
  2884. tdm_rx_format_put),
  2885. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  2886. tdm_tx_format_get,
  2887. tdm_tx_format_put),
  2888. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  2889. tdm_tx_format_get,
  2890. tdm_tx_format_put),
  2891. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  2892. tdm_tx_format_get,
  2893. tdm_tx_format_put),
  2894. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  2895. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2896. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  2897. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2898. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  2899. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2900. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  2901. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2902. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  2903. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2904. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  2905. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2906. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  2907. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2908. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  2909. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2910. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  2911. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2912. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  2913. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2914. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  2915. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2916. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  2917. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2918. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  2919. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  2920. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  2921. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  2922. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  2923. proxy_rx_ch_get, proxy_rx_ch_put),
  2924. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  2925. tdm_rx_ch_get,
  2926. tdm_rx_ch_put),
  2927. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  2928. tdm_rx_ch_get,
  2929. tdm_rx_ch_put),
  2930. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  2931. tdm_rx_ch_get,
  2932. tdm_rx_ch_put),
  2933. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  2934. tdm_tx_ch_get,
  2935. tdm_tx_ch_put),
  2936. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  2937. tdm_tx_ch_get,
  2938. tdm_tx_ch_put),
  2939. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  2940. tdm_tx_ch_get,
  2941. tdm_tx_ch_put),
  2942. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  2943. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2944. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  2945. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2946. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  2947. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2948. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  2949. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2950. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  2951. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2952. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  2953. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2954. SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
  2955. ext_disp_rx_ch_get, ext_disp_rx_ch_put),
  2956. SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
  2957. ext_disp_rx_format_get, ext_disp_rx_format_put),
  2958. SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
  2959. ext_disp_rx_sample_rate_get,
  2960. ext_disp_rx_sample_rate_put),
  2961. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  2962. msm_bt_sample_rate_get,
  2963. msm_bt_sample_rate_put),
  2964. SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
  2965. msm_bt_sample_rate_rx_get,
  2966. msm_bt_sample_rate_rx_put),
  2967. SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
  2968. msm_bt_sample_rate_tx_get,
  2969. msm_bt_sample_rate_tx_put),
  2970. SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_loopback_tx_chs,
  2971. afe_loopback_tx_ch_get, afe_loopback_tx_ch_put),
  2972. };
  2973. static const struct snd_kcontrol_new msm_snd_controls[] = {
  2974. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  2975. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2976. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  2977. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2978. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  2979. aux_pcm_rx_sample_rate_get,
  2980. aux_pcm_rx_sample_rate_put),
  2981. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  2982. aux_pcm_tx_sample_rate_get,
  2983. aux_pcm_tx_sample_rate_put),
  2984. };
  2985. static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
  2986. {
  2987. int idx;
  2988. switch (be_id) {
  2989. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  2990. idx = EXT_DISP_RX_IDX_DP;
  2991. break;
  2992. default:
  2993. pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
  2994. idx = -EINVAL;
  2995. break;
  2996. }
  2997. return idx;
  2998. }
  2999. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  3000. struct snd_pcm_hw_params *params)
  3001. {
  3002. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3003. struct snd_interval *rate = hw_param_interval(params,
  3004. SNDRV_PCM_HW_PARAM_RATE);
  3005. struct snd_interval *channels = hw_param_interval(params,
  3006. SNDRV_PCM_HW_PARAM_CHANNELS);
  3007. int idx = 0, rc = 0;
  3008. pr_debug("%s: format = %d, rate = %d\n",
  3009. __func__, params_format(params), params_rate(params));
  3010. switch (dai_link->id) {
  3011. case MSM_BACKEND_DAI_USB_RX:
  3012. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3013. usb_rx_cfg.bit_format);
  3014. rate->min = rate->max = usb_rx_cfg.sample_rate;
  3015. channels->min = channels->max = usb_rx_cfg.channels;
  3016. break;
  3017. case MSM_BACKEND_DAI_USB_TX:
  3018. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3019. usb_tx_cfg.bit_format);
  3020. rate->min = rate->max = usb_tx_cfg.sample_rate;
  3021. channels->min = channels->max = usb_tx_cfg.channels;
  3022. break;
  3023. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3024. idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
  3025. if (idx < 0) {
  3026. pr_err("%s: Incorrect ext disp idx %d\n",
  3027. __func__, idx);
  3028. rc = idx;
  3029. goto done;
  3030. }
  3031. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3032. ext_disp_rx_cfg[idx].bit_format);
  3033. rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
  3034. channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
  3035. break;
  3036. case MSM_BACKEND_DAI_AFE_PCM_RX:
  3037. channels->min = channels->max = proxy_rx_cfg.channels;
  3038. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3039. break;
  3040. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  3041. channels->min = channels->max =
  3042. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3043. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3044. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  3045. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  3046. break;
  3047. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  3048. channels->min = channels->max =
  3049. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3050. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3051. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  3052. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  3053. break;
  3054. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  3055. channels->min = channels->max =
  3056. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3057. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3058. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  3059. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  3060. break;
  3061. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  3062. channels->min = channels->max =
  3063. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3064. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3065. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  3066. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  3067. break;
  3068. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  3069. channels->min = channels->max =
  3070. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3071. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3072. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  3073. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  3074. break;
  3075. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  3076. channels->min = channels->max =
  3077. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3078. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3079. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  3080. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  3081. break;
  3082. case MSM_BACKEND_DAI_AUXPCM_RX:
  3083. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3084. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  3085. rate->min = rate->max =
  3086. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  3087. channels->min = channels->max =
  3088. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  3089. break;
  3090. case MSM_BACKEND_DAI_AUXPCM_TX:
  3091. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3092. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  3093. rate->min = rate->max =
  3094. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  3095. channels->min = channels->max =
  3096. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  3097. break;
  3098. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  3099. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3100. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  3101. rate->min = rate->max =
  3102. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  3103. channels->min = channels->max =
  3104. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  3105. break;
  3106. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  3107. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3108. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  3109. rate->min = rate->max =
  3110. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  3111. channels->min = channels->max =
  3112. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  3113. break;
  3114. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  3115. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3116. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  3117. rate->min = rate->max =
  3118. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  3119. channels->min = channels->max =
  3120. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  3121. break;
  3122. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  3123. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3124. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  3125. rate->min = rate->max =
  3126. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  3127. channels->min = channels->max =
  3128. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  3129. break;
  3130. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  3131. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3132. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  3133. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  3134. channels->min = channels->max =
  3135. mi2s_rx_cfg[PRIM_MI2S].channels;
  3136. break;
  3137. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  3138. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3139. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  3140. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  3141. channels->min = channels->max =
  3142. mi2s_tx_cfg[PRIM_MI2S].channels;
  3143. break;
  3144. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  3145. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3146. mi2s_rx_cfg[SEC_MI2S].bit_format);
  3147. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  3148. channels->min = channels->max =
  3149. mi2s_rx_cfg[SEC_MI2S].channels;
  3150. break;
  3151. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  3152. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3153. mi2s_tx_cfg[SEC_MI2S].bit_format);
  3154. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  3155. channels->min = channels->max =
  3156. mi2s_tx_cfg[SEC_MI2S].channels;
  3157. break;
  3158. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  3159. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3160. mi2s_rx_cfg[TERT_MI2S].bit_format);
  3161. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  3162. channels->min = channels->max =
  3163. mi2s_rx_cfg[TERT_MI2S].channels;
  3164. break;
  3165. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  3166. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3167. mi2s_tx_cfg[TERT_MI2S].bit_format);
  3168. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  3169. channels->min = channels->max =
  3170. mi2s_tx_cfg[TERT_MI2S].channels;
  3171. break;
  3172. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3173. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3174. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3175. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3176. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3177. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3178. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3179. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3180. cdc_dma_rx_cfg[idx].bit_format);
  3181. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  3182. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  3183. break;
  3184. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3185. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3186. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3187. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3188. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3189. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  3190. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  3191. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  3192. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3193. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3194. cdc_dma_tx_cfg[idx].bit_format);
  3195. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  3196. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  3197. break;
  3198. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3199. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3200. SNDRV_PCM_FORMAT_S32_LE);
  3201. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3202. channels->min = channels->max = msm_vi_feed_tx_ch;
  3203. break;
  3204. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  3205. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3206. slim_rx_cfg[SLIM_RX_7].bit_format);
  3207. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  3208. channels->min = channels->max =
  3209. slim_rx_cfg[SLIM_RX_7].channels;
  3210. break;
  3211. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  3212. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  3213. channels->min = channels->max =
  3214. slim_tx_cfg[SLIM_TX_7].channels;
  3215. break;
  3216. case MSM_BACKEND_DAI_AFE_LOOPBACK_TX:
  3217. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3218. afe_loopback_tx_cfg[idx].bit_format);
  3219. rate->min = rate->max = afe_loopback_tx_cfg[idx].sample_rate;
  3220. channels->min = channels->max =
  3221. afe_loopback_tx_cfg[idx].channels;
  3222. break;
  3223. default:
  3224. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3225. break;
  3226. }
  3227. done:
  3228. return rc;
  3229. }
  3230. static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component, bool active)
  3231. {
  3232. struct snd_soc_card *card = component->card;
  3233. struct msm_asoc_mach_data *pdata =
  3234. snd_soc_card_get_drvdata(card);
  3235. if (!pdata->fsa_handle)
  3236. return false;
  3237. return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
  3238. }
  3239. static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
  3240. {
  3241. int value = 0;
  3242. bool ret = false;
  3243. struct snd_soc_card *card;
  3244. struct msm_asoc_mach_data *pdata;
  3245. if (!component) {
  3246. pr_err("%s component is NULL\n", __func__);
  3247. return false;
  3248. }
  3249. card = component->card;
  3250. pdata = snd_soc_card_get_drvdata(card);
  3251. if (!pdata)
  3252. return false;
  3253. if (wcd_mbhc_cfg.enable_usbc_analog)
  3254. return msm_usbc_swap_gnd_mic(component, active);
  3255. /* if usbc is not defined, swap using us_euro_gpio_p */
  3256. if (pdata->us_euro_gpio_p) {
  3257. value = msm_cdc_pinctrl_get_state(
  3258. pdata->us_euro_gpio_p);
  3259. if (value)
  3260. msm_cdc_pinctrl_select_sleep_state(
  3261. pdata->us_euro_gpio_p);
  3262. else
  3263. msm_cdc_pinctrl_select_active_state(
  3264. pdata->us_euro_gpio_p);
  3265. dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
  3266. __func__, value, !value);
  3267. ret = true;
  3268. }
  3269. return ret;
  3270. }
  3271. static int kona_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  3272. struct snd_pcm_hw_params *params)
  3273. {
  3274. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3275. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3276. int ret = 0;
  3277. int slot_width = 32;
  3278. int channels, slots;
  3279. unsigned int slot_mask, rate, clk_freq;
  3280. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  3281. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  3282. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  3283. switch (cpu_dai->id) {
  3284. case AFE_PORT_ID_PRIMARY_TDM_RX:
  3285. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3286. break;
  3287. case AFE_PORT_ID_SECONDARY_TDM_RX:
  3288. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3289. break;
  3290. case AFE_PORT_ID_TERTIARY_TDM_RX:
  3291. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3292. break;
  3293. case AFE_PORT_ID_PRIMARY_TDM_TX:
  3294. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3295. break;
  3296. case AFE_PORT_ID_SECONDARY_TDM_TX:
  3297. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3298. break;
  3299. case AFE_PORT_ID_TERTIARY_TDM_TX:
  3300. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3301. break;
  3302. default:
  3303. pr_err("%s: dai id 0x%x not supported\n",
  3304. __func__, cpu_dai->id);
  3305. return -EINVAL;
  3306. }
  3307. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  3308. /*2 slot config - bits 0 and 1 set for the first two slots */
  3309. slot_mask = 0x0000FFFF >> (16 - slots);
  3310. channels = slots;
  3311. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  3312. __func__, slot_width, slots);
  3313. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  3314. slots, slot_width);
  3315. if (ret < 0) {
  3316. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  3317. __func__, ret);
  3318. goto end;
  3319. }
  3320. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3321. 0, NULL, channels, slot_offset);
  3322. if (ret < 0) {
  3323. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  3324. __func__, ret);
  3325. goto end;
  3326. }
  3327. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  3328. /*2 slot config - bits 0 and 1 set for the first two slots */
  3329. slot_mask = 0x0000FFFF >> (16 - slots);
  3330. channels = slots;
  3331. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  3332. __func__, slot_width, slots);
  3333. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  3334. slots, slot_width);
  3335. if (ret < 0) {
  3336. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  3337. __func__, ret);
  3338. goto end;
  3339. }
  3340. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3341. channels, slot_offset, 0, NULL);
  3342. if (ret < 0) {
  3343. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  3344. __func__, ret);
  3345. goto end;
  3346. }
  3347. } else {
  3348. ret = -EINVAL;
  3349. pr_err("%s: invalid use case, err:%d\n",
  3350. __func__, ret);
  3351. goto end;
  3352. }
  3353. rate = params_rate(params);
  3354. clk_freq = rate * slot_width * slots;
  3355. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  3356. if (ret < 0)
  3357. pr_err("%s: failed to set tdm clk, err:%d\n",
  3358. __func__, ret);
  3359. end:
  3360. return ret;
  3361. }
  3362. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  3363. struct snd_pcm_hw_params *params)
  3364. {
  3365. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3366. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3367. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3368. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3369. int ret = 0;
  3370. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  3371. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  3372. u32 user_set_tx_ch = 0;
  3373. u32 user_set_rx_ch = 0;
  3374. u32 ch_id;
  3375. ret = snd_soc_dai_get_channel_map(codec_dai,
  3376. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  3377. &rx_ch_cdc_dma);
  3378. if (ret < 0) {
  3379. pr_err("%s: failed to get codec chan map, err:%d\n",
  3380. __func__, ret);
  3381. goto err;
  3382. }
  3383. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  3384. switch (dai_link->id) {
  3385. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3386. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3387. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3388. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3389. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3390. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3391. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  3392. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  3393. {
  3394. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3395. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  3396. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  3397. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  3398. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  3399. user_set_rx_ch, &rx_ch_cdc_dma);
  3400. if (ret < 0) {
  3401. pr_err("%s: failed to set cpu chan map, err:%d\n",
  3402. __func__, ret);
  3403. goto err;
  3404. }
  3405. }
  3406. break;
  3407. }
  3408. } else {
  3409. switch (dai_link->id) {
  3410. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3411. {
  3412. user_set_tx_ch = msm_vi_feed_tx_ch;
  3413. }
  3414. break;
  3415. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3416. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3417. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3418. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3419. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3420. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  3421. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  3422. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  3423. {
  3424. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3425. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  3426. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  3427. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  3428. }
  3429. break;
  3430. }
  3431. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  3432. &tx_ch_cdc_dma, 0, 0);
  3433. if (ret < 0) {
  3434. pr_err("%s: failed to set cpu chan map, err:%d\n",
  3435. __func__, ret);
  3436. goto err;
  3437. }
  3438. }
  3439. err:
  3440. return ret;
  3441. }
  3442. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  3443. {
  3444. cpumask_t mask;
  3445. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  3446. pm_qos_remove_request(&substream->latency_pm_qos_req);
  3447. cpumask_clear(&mask);
  3448. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  3449. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  3450. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  3451. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  3452. pm_qos_add_request(&substream->latency_pm_qos_req,
  3453. PM_QOS_CPU_DMA_LATENCY,
  3454. MSM_LL_QOS_VALUE);
  3455. return 0;
  3456. }
  3457. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  3458. {
  3459. int ret = 0;
  3460. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3461. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3462. int index = cpu_dai->id;
  3463. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  3464. dev_dbg(rtd->card->dev,
  3465. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  3466. __func__, substream->name, substream->stream,
  3467. cpu_dai->name, cpu_dai->id);
  3468. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  3469. ret = -EINVAL;
  3470. dev_err(rtd->card->dev,
  3471. "%s: CPU DAI id (%d) out of range\n",
  3472. __func__, cpu_dai->id);
  3473. goto err;
  3474. }
  3475. /*
  3476. * Mutex protection in case the same MI2S
  3477. * interface using for both TX and RX so
  3478. * that the same clock won't be enable twice.
  3479. */
  3480. mutex_lock(&mi2s_intf_conf[index].lock);
  3481. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  3482. /* Check if msm needs to provide the clock to the interface */
  3483. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  3484. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  3485. fmt = SND_SOC_DAIFMT_CBM_CFM;
  3486. }
  3487. ret = msm_mi2s_set_sclk(substream, true);
  3488. if (ret < 0) {
  3489. dev_err(rtd->card->dev,
  3490. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  3491. __func__, ret);
  3492. goto clean_up;
  3493. }
  3494. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  3495. if (ret < 0) {
  3496. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  3497. __func__, index, ret);
  3498. goto clk_off;
  3499. }
  3500. }
  3501. clk_off:
  3502. if (ret < 0)
  3503. msm_mi2s_set_sclk(substream, false);
  3504. clean_up:
  3505. if (ret < 0)
  3506. mi2s_intf_conf[index].ref_cnt--;
  3507. mutex_unlock(&mi2s_intf_conf[index].lock);
  3508. err:
  3509. return ret;
  3510. }
  3511. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  3512. {
  3513. int ret = 0;
  3514. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3515. int index = rtd->cpu_dai->id;
  3516. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  3517. substream->name, substream->stream);
  3518. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  3519. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  3520. return;
  3521. }
  3522. mutex_lock(&mi2s_intf_conf[index].lock);
  3523. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  3524. ret = msm_mi2s_set_sclk(substream, false);
  3525. if (ret < 0)
  3526. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  3527. __func__, index, ret);
  3528. }
  3529. mutex_unlock(&mi2s_intf_conf[index].lock);
  3530. }
  3531. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  3532. struct snd_pcm_hw_params *params)
  3533. {
  3534. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3535. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3536. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3537. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3538. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  3539. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  3540. int ret = 0;
  3541. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  3542. codec_dai->name, codec_dai->id);
  3543. ret = snd_soc_dai_get_channel_map(codec_dai,
  3544. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  3545. if (ret) {
  3546. dev_err(rtd->dev,
  3547. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  3548. __func__, ret);
  3549. goto err;
  3550. }
  3551. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  3552. __func__, tx_ch_cnt, dai_link->id);
  3553. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3554. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  3555. if (ret)
  3556. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  3557. __func__, ret);
  3558. err:
  3559. return ret;
  3560. }
  3561. static struct snd_soc_ops kona_tdm_be_ops = {
  3562. .hw_params = kona_tdm_snd_hw_params,
  3563. };
  3564. static struct snd_soc_ops msm_mi2s_be_ops = {
  3565. .startup = msm_mi2s_snd_startup,
  3566. .shutdown = msm_mi2s_snd_shutdown,
  3567. };
  3568. static struct snd_soc_ops msm_fe_qos_ops = {
  3569. .prepare = msm_fe_qos_prepare,
  3570. };
  3571. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  3572. .hw_params = msm_snd_cdc_dma_hw_params,
  3573. };
  3574. static struct snd_soc_ops msm_wcn_ops = {
  3575. .hw_params = msm_wcn_hw_params,
  3576. };
  3577. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  3578. struct snd_kcontrol *kcontrol, int event)
  3579. {
  3580. struct msm_asoc_mach_data *pdata = NULL;
  3581. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  3582. int ret = 0;
  3583. u32 dmic_idx;
  3584. int *dmic_gpio_cnt;
  3585. struct device_node *dmic_gpio;
  3586. char *wname;
  3587. wname = strpbrk(w->name, "012345");
  3588. if (!wname) {
  3589. dev_err(component->dev, "%s: widget not found\n", __func__);
  3590. return -EINVAL;
  3591. }
  3592. ret = kstrtouint(wname, 10, &dmic_idx);
  3593. if (ret < 0) {
  3594. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  3595. __func__);
  3596. return -EINVAL;
  3597. }
  3598. pdata = snd_soc_card_get_drvdata(component->card);
  3599. switch (dmic_idx) {
  3600. case 0:
  3601. case 1:
  3602. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3603. dmic_gpio = pdata->dmic01_gpio_p;
  3604. break;
  3605. case 2:
  3606. case 3:
  3607. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3608. dmic_gpio = pdata->dmic23_gpio_p;
  3609. break;
  3610. case 4:
  3611. case 5:
  3612. dmic_gpio_cnt = &dmic_4_5_gpio_cnt;
  3613. dmic_gpio = pdata->dmic45_gpio_p;
  3614. break;
  3615. default:
  3616. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  3617. __func__);
  3618. return -EINVAL;
  3619. }
  3620. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3621. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3622. switch (event) {
  3623. case SND_SOC_DAPM_PRE_PMU:
  3624. (*dmic_gpio_cnt)++;
  3625. if (*dmic_gpio_cnt == 1) {
  3626. ret = msm_cdc_pinctrl_select_active_state(
  3627. dmic_gpio);
  3628. if (ret < 0) {
  3629. pr_err("%s: gpio set cannot be activated %sd",
  3630. __func__, "dmic_gpio");
  3631. return ret;
  3632. }
  3633. }
  3634. break;
  3635. case SND_SOC_DAPM_POST_PMD:
  3636. (*dmic_gpio_cnt)--;
  3637. if (*dmic_gpio_cnt == 0) {
  3638. ret = msm_cdc_pinctrl_select_sleep_state(
  3639. dmic_gpio);
  3640. if (ret < 0) {
  3641. pr_err("%s: gpio set cannot be de-activated %sd",
  3642. __func__, "dmic_gpio");
  3643. return ret;
  3644. }
  3645. }
  3646. break;
  3647. default:
  3648. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3649. return -EINVAL;
  3650. }
  3651. return 0;
  3652. }
  3653. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3654. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3655. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3656. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3657. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3658. SND_SOC_DAPM_MIC("Analog Mic5", NULL),
  3659. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3660. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3661. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3662. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3663. SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
  3664. SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
  3665. };
  3666. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  3667. {
  3668. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  3669. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160};
  3670. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3671. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  3672. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  3673. }
  3674. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  3675. {
  3676. int ret = -EINVAL;
  3677. struct snd_soc_component *component;
  3678. struct snd_soc_dapm_context *dapm;
  3679. struct snd_card *card;
  3680. struct snd_info_entry *entry;
  3681. struct snd_soc_component *aux_comp;
  3682. struct msm_asoc_mach_data *pdata =
  3683. snd_soc_card_get_drvdata(rtd->card);
  3684. component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
  3685. if (!component) {
  3686. pr_err("%s: could not find component for bolero_codec\n",
  3687. __func__);
  3688. return ret;
  3689. }
  3690. dapm = snd_soc_component_get_dapm(component);
  3691. ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
  3692. ARRAY_SIZE(msm_int_snd_controls));
  3693. if (ret < 0) {
  3694. pr_err("%s: add_component_controls failed: %d\n",
  3695. __func__, ret);
  3696. return ret;
  3697. }
  3698. ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
  3699. ARRAY_SIZE(msm_common_snd_controls));
  3700. if (ret < 0) {
  3701. pr_err("%s: add common snd controls failed: %d\n",
  3702. __func__, ret);
  3703. return ret;
  3704. }
  3705. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  3706. ARRAY_SIZE(msm_int_dapm_widgets));
  3707. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  3708. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  3709. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  3710. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  3711. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  3712. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  3713. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  3714. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  3715. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
  3716. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  3717. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  3718. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  3719. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  3720. snd_soc_dapm_sync(dapm);
  3721. /*
  3722. * Send speaker configuration only for WSA8810.
  3723. * Default configuration is for WSA8815.
  3724. */
  3725. dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
  3726. __func__, rtd->card->num_aux_devs);
  3727. if (rtd->card->num_aux_devs &&
  3728. !list_empty(&rtd->card->component_dev_list)) {
  3729. aux_comp = list_first_entry(
  3730. &rtd->card->component_dev_list,
  3731. struct snd_soc_component,
  3732. card_aux_list);
  3733. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  3734. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  3735. wsa_macro_set_spkr_mode(component,
  3736. WSA_MACRO_SPKR_MODE_1);
  3737. wsa_macro_set_spkr_gain_offset(component,
  3738. WSA_MACRO_GAIN_OFFSET_M1P5_DB);
  3739. }
  3740. bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
  3741. sm_port_map);
  3742. }
  3743. card = rtd->card->snd_card;
  3744. if (!pdata->codec_root) {
  3745. entry = snd_info_create_subdir(card->module, "codecs",
  3746. card->proc_root);
  3747. if (!entry) {
  3748. pr_debug("%s: Cannot create codecs module entry\n",
  3749. __func__);
  3750. ret = 0;
  3751. goto err;
  3752. }
  3753. pdata->codec_root = entry;
  3754. }
  3755. bolero_info_create_codec_entry(pdata->codec_root, component);
  3756. bolero_register_wake_irq(component, false);
  3757. codec_reg_done = true;
  3758. return 0;
  3759. err:
  3760. return ret;
  3761. }
  3762. static void *def_wcd_mbhc_cal(void)
  3763. {
  3764. void *wcd_mbhc_cal;
  3765. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  3766. u16 *btn_high;
  3767. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  3768. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  3769. if (!wcd_mbhc_cal)
  3770. return NULL;
  3771. WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
  3772. WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
  3773. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  3774. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  3775. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  3776. btn_high[0] = 75;
  3777. btn_high[1] = 150;
  3778. btn_high[2] = 237;
  3779. btn_high[3] = 500;
  3780. btn_high[4] = 500;
  3781. btn_high[5] = 500;
  3782. btn_high[6] = 500;
  3783. btn_high[7] = 500;
  3784. return wcd_mbhc_cal;
  3785. }
  3786. /* Digital audio interface glue - connects codec <---> CPU */
  3787. static struct snd_soc_dai_link msm_common_dai_links[] = {
  3788. /* FrontEnd DAI Links */
  3789. {/* hw:x,0 */
  3790. .name = MSM_DAILINK_NAME(Media1),
  3791. .stream_name = "MultiMedia1",
  3792. .cpu_dai_name = "MultiMedia1",
  3793. .platform_name = "msm-pcm-dsp.0",
  3794. .dynamic = 1,
  3795. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3796. .dpcm_playback = 1,
  3797. .dpcm_capture = 1,
  3798. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3799. SND_SOC_DPCM_TRIGGER_POST},
  3800. .codec_dai_name = "snd-soc-dummy-dai",
  3801. .codec_name = "snd-soc-dummy",
  3802. .ignore_suspend = 1,
  3803. /* this dainlink has playback support */
  3804. .ignore_pmdown_time = 1,
  3805. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  3806. },
  3807. {/* hw:x,1 */
  3808. .name = MSM_DAILINK_NAME(Media2),
  3809. .stream_name = "MultiMedia2",
  3810. .cpu_dai_name = "MultiMedia2",
  3811. .platform_name = "msm-pcm-dsp.0",
  3812. .dynamic = 1,
  3813. .dpcm_playback = 1,
  3814. .dpcm_capture = 1,
  3815. .codec_dai_name = "snd-soc-dummy-dai",
  3816. .codec_name = "snd-soc-dummy",
  3817. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3818. SND_SOC_DPCM_TRIGGER_POST},
  3819. .ignore_suspend = 1,
  3820. /* this dainlink has playback support */
  3821. .ignore_pmdown_time = 1,
  3822. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  3823. },
  3824. {/* hw:x,2 */
  3825. .name = "VoiceMMode1",
  3826. .stream_name = "VoiceMMode1",
  3827. .cpu_dai_name = "VoiceMMode1",
  3828. .platform_name = "msm-pcm-voice",
  3829. .dynamic = 1,
  3830. .dpcm_playback = 1,
  3831. .dpcm_capture = 1,
  3832. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3833. SND_SOC_DPCM_TRIGGER_POST},
  3834. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3835. .ignore_suspend = 1,
  3836. .ignore_pmdown_time = 1,
  3837. .codec_dai_name = "snd-soc-dummy-dai",
  3838. .codec_name = "snd-soc-dummy",
  3839. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  3840. },
  3841. {/* hw:x,3 */
  3842. .name = "MSM VoIP",
  3843. .stream_name = "VoIP",
  3844. .cpu_dai_name = "VoIP",
  3845. .platform_name = "msm-voip-dsp",
  3846. .dynamic = 1,
  3847. .dpcm_playback = 1,
  3848. .dpcm_capture = 1,
  3849. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3850. SND_SOC_DPCM_TRIGGER_POST},
  3851. .codec_dai_name = "snd-soc-dummy-dai",
  3852. .codec_name = "snd-soc-dummy",
  3853. .ignore_suspend = 1,
  3854. /* this dainlink has playback support */
  3855. .ignore_pmdown_time = 1,
  3856. .id = MSM_FRONTEND_DAI_VOIP,
  3857. },
  3858. {/* hw:x,4 */
  3859. .name = MSM_DAILINK_NAME(ULL),
  3860. .stream_name = "MultiMedia3",
  3861. .cpu_dai_name = "MultiMedia3",
  3862. .platform_name = "msm-pcm-dsp.2",
  3863. .dynamic = 1,
  3864. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3865. .dpcm_playback = 1,
  3866. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3867. SND_SOC_DPCM_TRIGGER_POST},
  3868. .codec_dai_name = "snd-soc-dummy-dai",
  3869. .codec_name = "snd-soc-dummy",
  3870. .ignore_suspend = 1,
  3871. /* this dainlink has playback support */
  3872. .ignore_pmdown_time = 1,
  3873. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  3874. },
  3875. {/* hw:x,5 */
  3876. .name = "MSM AFE-PCM RX",
  3877. .stream_name = "AFE-PROXY RX",
  3878. .cpu_dai_name = "msm-dai-q6-dev.241",
  3879. .codec_name = "msm-stub-codec.1",
  3880. .codec_dai_name = "msm-stub-rx",
  3881. .platform_name = "msm-pcm-afe",
  3882. .dpcm_playback = 1,
  3883. .ignore_suspend = 1,
  3884. /* this dainlink has playback support */
  3885. .ignore_pmdown_time = 1,
  3886. },
  3887. {/* hw:x,6 */
  3888. .name = "MSM AFE-PCM TX",
  3889. .stream_name = "AFE-PROXY TX",
  3890. .cpu_dai_name = "msm-dai-q6-dev.240",
  3891. .codec_name = "msm-stub-codec.1",
  3892. .codec_dai_name = "msm-stub-tx",
  3893. .platform_name = "msm-pcm-afe",
  3894. .dpcm_capture = 1,
  3895. .ignore_suspend = 1,
  3896. },
  3897. {/* hw:x,7 */
  3898. .name = MSM_DAILINK_NAME(Compress1),
  3899. .stream_name = "Compress1",
  3900. .cpu_dai_name = "MultiMedia4",
  3901. .platform_name = "msm-compress-dsp",
  3902. .dynamic = 1,
  3903. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  3904. .dpcm_playback = 1,
  3905. .dpcm_capture = 1,
  3906. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3907. SND_SOC_DPCM_TRIGGER_POST},
  3908. .codec_dai_name = "snd-soc-dummy-dai",
  3909. .codec_name = "snd-soc-dummy",
  3910. .ignore_suspend = 1,
  3911. .ignore_pmdown_time = 1,
  3912. /* this dainlink has playback support */
  3913. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  3914. },
  3915. /* Hostless PCM purpose */
  3916. {/* hw:x,8 */
  3917. .name = "AUXPCM Hostless",
  3918. .stream_name = "AUXPCM Hostless",
  3919. .cpu_dai_name = "AUXPCM_HOSTLESS",
  3920. .platform_name = "msm-pcm-hostless",
  3921. .dynamic = 1,
  3922. .dpcm_playback = 1,
  3923. .dpcm_capture = 1,
  3924. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3925. SND_SOC_DPCM_TRIGGER_POST},
  3926. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3927. .ignore_suspend = 1,
  3928. /* this dainlink has playback support */
  3929. .ignore_pmdown_time = 1,
  3930. .codec_dai_name = "snd-soc-dummy-dai",
  3931. .codec_name = "snd-soc-dummy",
  3932. },
  3933. {/* hw:x,9 */
  3934. .name = MSM_DAILINK_NAME(LowLatency),
  3935. .stream_name = "MultiMedia5",
  3936. .cpu_dai_name = "MultiMedia5",
  3937. .platform_name = "msm-pcm-dsp.1",
  3938. .dynamic = 1,
  3939. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3940. .dpcm_playback = 1,
  3941. .dpcm_capture = 1,
  3942. .codec_dai_name = "snd-soc-dummy-dai",
  3943. .codec_name = "snd-soc-dummy",
  3944. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3945. SND_SOC_DPCM_TRIGGER_POST},
  3946. .ignore_suspend = 1,
  3947. /* this dainlink has playback support */
  3948. .ignore_pmdown_time = 1,
  3949. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  3950. .ops = &msm_fe_qos_ops,
  3951. },
  3952. {/* hw:x,10 */
  3953. .name = "Listen 1 Audio Service",
  3954. .stream_name = "Listen 1 Audio Service",
  3955. .cpu_dai_name = "LSM1",
  3956. .platform_name = "msm-lsm-client",
  3957. .dynamic = 1,
  3958. .dpcm_capture = 1,
  3959. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3960. SND_SOC_DPCM_TRIGGER_POST },
  3961. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3962. .ignore_suspend = 1,
  3963. .codec_dai_name = "snd-soc-dummy-dai",
  3964. .codec_name = "snd-soc-dummy",
  3965. .id = MSM_FRONTEND_DAI_LSM1,
  3966. },
  3967. /* Multiple Tunnel instances */
  3968. {/* hw:x,11 */
  3969. .name = MSM_DAILINK_NAME(Compress2),
  3970. .stream_name = "Compress2",
  3971. .cpu_dai_name = "MultiMedia7",
  3972. .platform_name = "msm-compress-dsp",
  3973. .dynamic = 1,
  3974. .dpcm_playback = 1,
  3975. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3976. SND_SOC_DPCM_TRIGGER_POST},
  3977. .codec_dai_name = "snd-soc-dummy-dai",
  3978. .codec_name = "snd-soc-dummy",
  3979. .ignore_suspend = 1,
  3980. .ignore_pmdown_time = 1,
  3981. /* this dainlink has playback support */
  3982. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  3983. },
  3984. {/* hw:x,12 */
  3985. .name = MSM_DAILINK_NAME(MultiMedia10),
  3986. .stream_name = "MultiMedia10",
  3987. .cpu_dai_name = "MultiMedia10",
  3988. .platform_name = "msm-pcm-dsp.1",
  3989. .dynamic = 1,
  3990. .dpcm_playback = 1,
  3991. .dpcm_capture = 1,
  3992. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3993. SND_SOC_DPCM_TRIGGER_POST},
  3994. .codec_dai_name = "snd-soc-dummy-dai",
  3995. .codec_name = "snd-soc-dummy",
  3996. .ignore_suspend = 1,
  3997. .ignore_pmdown_time = 1,
  3998. /* this dainlink has playback support */
  3999. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  4000. },
  4001. {/* hw:x,13 */
  4002. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  4003. .stream_name = "MM_NOIRQ",
  4004. .cpu_dai_name = "MultiMedia8",
  4005. .platform_name = "msm-pcm-dsp-noirq",
  4006. .dynamic = 1,
  4007. .dpcm_playback = 1,
  4008. .dpcm_capture = 1,
  4009. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4010. SND_SOC_DPCM_TRIGGER_POST},
  4011. .codec_dai_name = "snd-soc-dummy-dai",
  4012. .codec_name = "snd-soc-dummy",
  4013. .ignore_suspend = 1,
  4014. .ignore_pmdown_time = 1,
  4015. /* this dainlink has playback support */
  4016. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  4017. .ops = &msm_fe_qos_ops,
  4018. },
  4019. /* HDMI Hostless */
  4020. {/* hw:x,14 */
  4021. .name = "HDMI_RX_HOSTLESS",
  4022. .stream_name = "HDMI_RX_HOSTLESS",
  4023. .cpu_dai_name = "HDMI_HOSTLESS",
  4024. .platform_name = "msm-pcm-hostless",
  4025. .dynamic = 1,
  4026. .dpcm_playback = 1,
  4027. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4028. SND_SOC_DPCM_TRIGGER_POST},
  4029. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4030. .ignore_suspend = 1,
  4031. .ignore_pmdown_time = 1,
  4032. .codec_dai_name = "snd-soc-dummy-dai",
  4033. .codec_name = "snd-soc-dummy",
  4034. },
  4035. {/* hw:x,15 */
  4036. .name = "VoiceMMode2",
  4037. .stream_name = "VoiceMMode2",
  4038. .cpu_dai_name = "VoiceMMode2",
  4039. .platform_name = "msm-pcm-voice",
  4040. .dynamic = 1,
  4041. .dpcm_playback = 1,
  4042. .dpcm_capture = 1,
  4043. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4044. SND_SOC_DPCM_TRIGGER_POST},
  4045. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4046. .ignore_suspend = 1,
  4047. .ignore_pmdown_time = 1,
  4048. .codec_dai_name = "snd-soc-dummy-dai",
  4049. .codec_name = "snd-soc-dummy",
  4050. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  4051. },
  4052. /* LSM FE */
  4053. {/* hw:x,16 */
  4054. .name = "Listen 2 Audio Service",
  4055. .stream_name = "Listen 2 Audio Service",
  4056. .cpu_dai_name = "LSM2",
  4057. .platform_name = "msm-lsm-client",
  4058. .dynamic = 1,
  4059. .dpcm_capture = 1,
  4060. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4061. SND_SOC_DPCM_TRIGGER_POST },
  4062. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4063. .ignore_suspend = 1,
  4064. .codec_dai_name = "snd-soc-dummy-dai",
  4065. .codec_name = "snd-soc-dummy",
  4066. .id = MSM_FRONTEND_DAI_LSM2,
  4067. },
  4068. {/* hw:x,17 */
  4069. .name = "Listen 3 Audio Service",
  4070. .stream_name = "Listen 3 Audio Service",
  4071. .cpu_dai_name = "LSM3",
  4072. .platform_name = "msm-lsm-client",
  4073. .dynamic = 1,
  4074. .dpcm_capture = 1,
  4075. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4076. SND_SOC_DPCM_TRIGGER_POST },
  4077. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4078. .ignore_suspend = 1,
  4079. .codec_dai_name = "snd-soc-dummy-dai",
  4080. .codec_name = "snd-soc-dummy",
  4081. .id = MSM_FRONTEND_DAI_LSM3,
  4082. },
  4083. {/* hw:x,18 */
  4084. .name = "Listen 4 Audio Service",
  4085. .stream_name = "Listen 4 Audio Service",
  4086. .cpu_dai_name = "LSM4",
  4087. .platform_name = "msm-lsm-client",
  4088. .dynamic = 1,
  4089. .dpcm_capture = 1,
  4090. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4091. SND_SOC_DPCM_TRIGGER_POST },
  4092. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4093. .ignore_suspend = 1,
  4094. .codec_dai_name = "snd-soc-dummy-dai",
  4095. .codec_name = "snd-soc-dummy",
  4096. .id = MSM_FRONTEND_DAI_LSM4,
  4097. },
  4098. {/* hw:x,19 */
  4099. .name = "Listen 5 Audio Service",
  4100. .stream_name = "Listen 5 Audio Service",
  4101. .cpu_dai_name = "LSM5",
  4102. .platform_name = "msm-lsm-client",
  4103. .dynamic = 1,
  4104. .dpcm_capture = 1,
  4105. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4106. SND_SOC_DPCM_TRIGGER_POST },
  4107. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4108. .ignore_suspend = 1,
  4109. .codec_dai_name = "snd-soc-dummy-dai",
  4110. .codec_name = "snd-soc-dummy",
  4111. .id = MSM_FRONTEND_DAI_LSM5,
  4112. },
  4113. {/* hw:x,20 */
  4114. .name = "Listen 6 Audio Service",
  4115. .stream_name = "Listen 6 Audio Service",
  4116. .cpu_dai_name = "LSM6",
  4117. .platform_name = "msm-lsm-client",
  4118. .dynamic = 1,
  4119. .dpcm_capture = 1,
  4120. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4121. SND_SOC_DPCM_TRIGGER_POST },
  4122. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4123. .ignore_suspend = 1,
  4124. .codec_dai_name = "snd-soc-dummy-dai",
  4125. .codec_name = "snd-soc-dummy",
  4126. .id = MSM_FRONTEND_DAI_LSM6,
  4127. },
  4128. {/* hw:x,21 */
  4129. .name = "Listen 7 Audio Service",
  4130. .stream_name = "Listen 7 Audio Service",
  4131. .cpu_dai_name = "LSM7",
  4132. .platform_name = "msm-lsm-client",
  4133. .dynamic = 1,
  4134. .dpcm_capture = 1,
  4135. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4136. SND_SOC_DPCM_TRIGGER_POST },
  4137. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4138. .ignore_suspend = 1,
  4139. .codec_dai_name = "snd-soc-dummy-dai",
  4140. .codec_name = "snd-soc-dummy",
  4141. .id = MSM_FRONTEND_DAI_LSM7,
  4142. },
  4143. {/* hw:x,22 */
  4144. .name = "Listen 8 Audio Service",
  4145. .stream_name = "Listen 8 Audio Service",
  4146. .cpu_dai_name = "LSM8",
  4147. .platform_name = "msm-lsm-client",
  4148. .dynamic = 1,
  4149. .dpcm_capture = 1,
  4150. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4151. SND_SOC_DPCM_TRIGGER_POST },
  4152. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4153. .ignore_suspend = 1,
  4154. .codec_dai_name = "snd-soc-dummy-dai",
  4155. .codec_name = "snd-soc-dummy",
  4156. .id = MSM_FRONTEND_DAI_LSM8,
  4157. },
  4158. {/* hw:x,23 */
  4159. .name = MSM_DAILINK_NAME(Media9),
  4160. .stream_name = "MultiMedia9",
  4161. .cpu_dai_name = "MultiMedia9",
  4162. .platform_name = "msm-pcm-dsp.0",
  4163. .dynamic = 1,
  4164. .dpcm_playback = 1,
  4165. .dpcm_capture = 1,
  4166. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4167. SND_SOC_DPCM_TRIGGER_POST},
  4168. .codec_dai_name = "snd-soc-dummy-dai",
  4169. .codec_name = "snd-soc-dummy",
  4170. .ignore_suspend = 1,
  4171. /* this dainlink has playback support */
  4172. .ignore_pmdown_time = 1,
  4173. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  4174. },
  4175. {/* hw:x,24 */
  4176. .name = MSM_DAILINK_NAME(Compress4),
  4177. .stream_name = "Compress4",
  4178. .cpu_dai_name = "MultiMedia11",
  4179. .platform_name = "msm-compress-dsp",
  4180. .dynamic = 1,
  4181. .dpcm_playback = 1,
  4182. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4183. SND_SOC_DPCM_TRIGGER_POST},
  4184. .codec_dai_name = "snd-soc-dummy-dai",
  4185. .codec_name = "snd-soc-dummy",
  4186. .ignore_suspend = 1,
  4187. .ignore_pmdown_time = 1,
  4188. /* this dainlink has playback support */
  4189. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  4190. },
  4191. {/* hw:x,25 */
  4192. .name = MSM_DAILINK_NAME(Compress5),
  4193. .stream_name = "Compress5",
  4194. .cpu_dai_name = "MultiMedia12",
  4195. .platform_name = "msm-compress-dsp",
  4196. .dynamic = 1,
  4197. .dpcm_playback = 1,
  4198. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4199. SND_SOC_DPCM_TRIGGER_POST},
  4200. .codec_dai_name = "snd-soc-dummy-dai",
  4201. .codec_name = "snd-soc-dummy",
  4202. .ignore_suspend = 1,
  4203. .ignore_pmdown_time = 1,
  4204. /* this dainlink has playback support */
  4205. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  4206. },
  4207. {/* hw:x,26 */
  4208. .name = MSM_DAILINK_NAME(Compress6),
  4209. .stream_name = "Compress6",
  4210. .cpu_dai_name = "MultiMedia13",
  4211. .platform_name = "msm-compress-dsp",
  4212. .dynamic = 1,
  4213. .dpcm_playback = 1,
  4214. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4215. SND_SOC_DPCM_TRIGGER_POST},
  4216. .codec_dai_name = "snd-soc-dummy-dai",
  4217. .codec_name = "snd-soc-dummy",
  4218. .ignore_suspend = 1,
  4219. .ignore_pmdown_time = 1,
  4220. /* this dainlink has playback support */
  4221. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  4222. },
  4223. {/* hw:x,27 */
  4224. .name = MSM_DAILINK_NAME(Compress7),
  4225. .stream_name = "Compress7",
  4226. .cpu_dai_name = "MultiMedia14",
  4227. .platform_name = "msm-compress-dsp",
  4228. .dynamic = 1,
  4229. .dpcm_playback = 1,
  4230. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4231. SND_SOC_DPCM_TRIGGER_POST},
  4232. .codec_dai_name = "snd-soc-dummy-dai",
  4233. .codec_name = "snd-soc-dummy",
  4234. .ignore_suspend = 1,
  4235. .ignore_pmdown_time = 1,
  4236. /* this dainlink has playback support */
  4237. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  4238. },
  4239. {/* hw:x,28 */
  4240. .name = MSM_DAILINK_NAME(Compress8),
  4241. .stream_name = "Compress8",
  4242. .cpu_dai_name = "MultiMedia15",
  4243. .platform_name = "msm-compress-dsp",
  4244. .dynamic = 1,
  4245. .dpcm_playback = 1,
  4246. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4247. SND_SOC_DPCM_TRIGGER_POST},
  4248. .codec_dai_name = "snd-soc-dummy-dai",
  4249. .codec_name = "snd-soc-dummy",
  4250. .ignore_suspend = 1,
  4251. .ignore_pmdown_time = 1,
  4252. /* this dainlink has playback support */
  4253. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  4254. },
  4255. {/* hw:x,29 */
  4256. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  4257. .stream_name = "MM_NOIRQ_2",
  4258. .cpu_dai_name = "MultiMedia16",
  4259. .platform_name = "msm-pcm-dsp-noirq",
  4260. .dynamic = 1,
  4261. .dpcm_playback = 1,
  4262. .dpcm_capture = 1,
  4263. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4264. SND_SOC_DPCM_TRIGGER_POST},
  4265. .codec_dai_name = "snd-soc-dummy-dai",
  4266. .codec_name = "snd-soc-dummy",
  4267. .ignore_suspend = 1,
  4268. .ignore_pmdown_time = 1,
  4269. /* this dainlink has playback support */
  4270. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  4271. },
  4272. {/* hw:x,30 */
  4273. .name = "CDC_DMA Hostless",
  4274. .stream_name = "CDC_DMA Hostless",
  4275. .cpu_dai_name = "CDC_DMA_HOSTLESS",
  4276. .platform_name = "msm-pcm-hostless",
  4277. .dynamic = 1,
  4278. .dpcm_playback = 1,
  4279. .dpcm_capture = 1,
  4280. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4281. SND_SOC_DPCM_TRIGGER_POST},
  4282. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4283. .ignore_suspend = 1,
  4284. /* this dailink has playback support */
  4285. .ignore_pmdown_time = 1,
  4286. .codec_dai_name = "snd-soc-dummy-dai",
  4287. .codec_name = "snd-soc-dummy",
  4288. },
  4289. {/* hw:x,31 */
  4290. .name = "TX3_CDC_DMA Hostless",
  4291. .stream_name = "TX3_CDC_DMA Hostless",
  4292. .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
  4293. .platform_name = "msm-pcm-hostless",
  4294. .dynamic = 1,
  4295. .dpcm_capture = 1,
  4296. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4297. SND_SOC_DPCM_TRIGGER_POST},
  4298. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4299. .ignore_suspend = 1,
  4300. .codec_dai_name = "snd-soc-dummy-dai",
  4301. .codec_name = "snd-soc-dummy",
  4302. },
  4303. {/* hw:x,32 */
  4304. .name = "Tertiary MI2S TX_Hostless",
  4305. .stream_name = "Tertiary MI2S_TX Hostless Capture",
  4306. .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
  4307. .platform_name = "msm-pcm-hostless",
  4308. .dynamic = 1,
  4309. .dpcm_capture = 1,
  4310. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4311. SND_SOC_DPCM_TRIGGER_POST},
  4312. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4313. .ignore_suspend = 1,
  4314. .ignore_pmdown_time = 1,
  4315. .codec_dai_name = "snd-soc-dummy-dai",
  4316. .codec_name = "snd-soc-dummy",
  4317. },
  4318. };
  4319. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  4320. {/* hw:x,33 */
  4321. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  4322. .stream_name = "WSA CDC DMA0 Capture",
  4323. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  4324. .platform_name = "msm-pcm-hostless",
  4325. .codec_name = "bolero_codec",
  4326. .codec_dai_name = "wsa_macro_vifeedback",
  4327. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  4328. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4329. .ignore_suspend = 1,
  4330. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4331. .ops = &msm_cdc_dma_be_ops,
  4332. },
  4333. };
  4334. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  4335. {/* hw:x,34 */
  4336. .name = MSM_DAILINK_NAME(ASM Loopback),
  4337. .stream_name = "MultiMedia6",
  4338. .cpu_dai_name = "MultiMedia6",
  4339. .platform_name = "msm-pcm-loopback",
  4340. .dynamic = 1,
  4341. .dpcm_playback = 1,
  4342. .dpcm_capture = 1,
  4343. .codec_dai_name = "snd-soc-dummy-dai",
  4344. .codec_name = "snd-soc-dummy",
  4345. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4346. SND_SOC_DPCM_TRIGGER_POST},
  4347. .ignore_suspend = 1,
  4348. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4349. .ignore_pmdown_time = 1,
  4350. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  4351. },
  4352. {/* hw:x,35 */
  4353. .name = "USB Audio Hostless",
  4354. .stream_name = "USB Audio Hostless",
  4355. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  4356. .platform_name = "msm-pcm-hostless",
  4357. .dynamic = 1,
  4358. .dpcm_playback = 1,
  4359. .dpcm_capture = 1,
  4360. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4361. SND_SOC_DPCM_TRIGGER_POST},
  4362. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4363. .ignore_suspend = 1,
  4364. .ignore_pmdown_time = 1,
  4365. .codec_dai_name = "snd-soc-dummy-dai",
  4366. .codec_name = "snd-soc-dummy",
  4367. },
  4368. {/* hw:x,36 */
  4369. .name = "SLIMBUS_7 Hostless",
  4370. .stream_name = "SLIMBUS_7 Hostless",
  4371. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  4372. .platform_name = "msm-pcm-hostless",
  4373. .dynamic = 1,
  4374. .dpcm_capture = 1,
  4375. .dpcm_playback = 1,
  4376. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4377. SND_SOC_DPCM_TRIGGER_POST},
  4378. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4379. .ignore_suspend = 1,
  4380. .ignore_pmdown_time = 1,
  4381. .codec_dai_name = "snd-soc-dummy-dai",
  4382. .codec_name = "snd-soc-dummy",
  4383. },
  4384. {/* hw:x,37 */
  4385. .name = "Compress Capture",
  4386. .stream_name = "Compress9",
  4387. .cpu_dai_name = "MultiMedia17",
  4388. .platform_name = "msm-compress-dsp",
  4389. .dynamic = 1,
  4390. .dpcm_capture = 1,
  4391. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4392. SND_SOC_DPCM_TRIGGER_POST},
  4393. .codec_dai_name = "snd-soc-dummy-dai",
  4394. .codec_name = "snd-soc-dummy",
  4395. .ignore_suspend = 1,
  4396. .ignore_pmdown_time = 1,
  4397. .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
  4398. },
  4399. };
  4400. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  4401. /* Backend AFE DAI Links */
  4402. {
  4403. .name = LPASS_BE_AFE_PCM_RX,
  4404. .stream_name = "AFE Playback",
  4405. .cpu_dai_name = "msm-dai-q6-dev.224",
  4406. .platform_name = "msm-pcm-routing",
  4407. .codec_name = "msm-stub-codec.1",
  4408. .codec_dai_name = "msm-stub-rx",
  4409. .no_pcm = 1,
  4410. .dpcm_playback = 1,
  4411. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  4412. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4413. /* this dainlink has playback support */
  4414. .ignore_pmdown_time = 1,
  4415. .ignore_suspend = 1,
  4416. },
  4417. {
  4418. .name = LPASS_BE_AFE_PCM_TX,
  4419. .stream_name = "AFE Capture",
  4420. .cpu_dai_name = "msm-dai-q6-dev.225",
  4421. .platform_name = "msm-pcm-routing",
  4422. .codec_name = "msm-stub-codec.1",
  4423. .codec_dai_name = "msm-stub-tx",
  4424. .no_pcm = 1,
  4425. .dpcm_capture = 1,
  4426. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  4427. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4428. .ignore_suspend = 1,
  4429. },
  4430. /* Incall Record Uplink BACK END DAI Link */
  4431. {
  4432. .name = LPASS_BE_INCALL_RECORD_TX,
  4433. .stream_name = "Voice Uplink Capture",
  4434. .cpu_dai_name = "msm-dai-q6-dev.32772",
  4435. .platform_name = "msm-pcm-routing",
  4436. .codec_name = "msm-stub-codec.1",
  4437. .codec_dai_name = "msm-stub-tx",
  4438. .no_pcm = 1,
  4439. .dpcm_capture = 1,
  4440. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  4441. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4442. .ignore_suspend = 1,
  4443. },
  4444. /* Incall Record Downlink BACK END DAI Link */
  4445. {
  4446. .name = LPASS_BE_INCALL_RECORD_RX,
  4447. .stream_name = "Voice Downlink Capture",
  4448. .cpu_dai_name = "msm-dai-q6-dev.32771",
  4449. .platform_name = "msm-pcm-routing",
  4450. .codec_name = "msm-stub-codec.1",
  4451. .codec_dai_name = "msm-stub-tx",
  4452. .no_pcm = 1,
  4453. .dpcm_capture = 1,
  4454. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  4455. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4456. .ignore_suspend = 1,
  4457. },
  4458. /* Incall Music BACK END DAI Link */
  4459. {
  4460. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  4461. .stream_name = "Voice Farend Playback",
  4462. .cpu_dai_name = "msm-dai-q6-dev.32773",
  4463. .platform_name = "msm-pcm-routing",
  4464. .codec_name = "msm-stub-codec.1",
  4465. .codec_dai_name = "msm-stub-rx",
  4466. .no_pcm = 1,
  4467. .dpcm_playback = 1,
  4468. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  4469. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4470. .ignore_suspend = 1,
  4471. .ignore_pmdown_time = 1,
  4472. },
  4473. /* Incall Music 2 BACK END DAI Link */
  4474. {
  4475. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  4476. .stream_name = "Voice2 Farend Playback",
  4477. .cpu_dai_name = "msm-dai-q6-dev.32770",
  4478. .platform_name = "msm-pcm-routing",
  4479. .codec_name = "msm-stub-codec.1",
  4480. .codec_dai_name = "msm-stub-rx",
  4481. .no_pcm = 1,
  4482. .dpcm_playback = 1,
  4483. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  4484. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4485. .ignore_suspend = 1,
  4486. .ignore_pmdown_time = 1,
  4487. },
  4488. {
  4489. .name = LPASS_BE_USB_AUDIO_RX,
  4490. .stream_name = "USB Audio Playback",
  4491. .cpu_dai_name = "msm-dai-q6-dev.28672",
  4492. .platform_name = "msm-pcm-routing",
  4493. .codec_name = "msm-stub-codec.1",
  4494. .codec_dai_name = "msm-stub-rx",
  4495. .no_pcm = 1,
  4496. .dpcm_playback = 1,
  4497. .id = MSM_BACKEND_DAI_USB_RX,
  4498. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4499. .ignore_pmdown_time = 1,
  4500. .ignore_suspend = 1,
  4501. },
  4502. {
  4503. .name = LPASS_BE_USB_AUDIO_TX,
  4504. .stream_name = "USB Audio Capture",
  4505. .cpu_dai_name = "msm-dai-q6-dev.28673",
  4506. .platform_name = "msm-pcm-routing",
  4507. .codec_name = "msm-stub-codec.1",
  4508. .codec_dai_name = "msm-stub-tx",
  4509. .no_pcm = 1,
  4510. .dpcm_capture = 1,
  4511. .id = MSM_BACKEND_DAI_USB_TX,
  4512. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4513. .ignore_suspend = 1,
  4514. },
  4515. {
  4516. .name = LPASS_BE_PRI_TDM_RX_0,
  4517. .stream_name = "Primary TDM0 Playback",
  4518. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  4519. .platform_name = "msm-pcm-routing",
  4520. .codec_name = "msm-stub-codec.1",
  4521. .codec_dai_name = "msm-stub-rx",
  4522. .no_pcm = 1,
  4523. .dpcm_playback = 1,
  4524. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  4525. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4526. .ops = &kona_tdm_be_ops,
  4527. .ignore_suspend = 1,
  4528. .ignore_pmdown_time = 1,
  4529. },
  4530. {
  4531. .name = LPASS_BE_PRI_TDM_TX_0,
  4532. .stream_name = "Primary TDM0 Capture",
  4533. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  4534. .platform_name = "msm-pcm-routing",
  4535. .codec_name = "msm-stub-codec.1",
  4536. .codec_dai_name = "msm-stub-tx",
  4537. .no_pcm = 1,
  4538. .dpcm_capture = 1,
  4539. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  4540. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4541. .ops = &kona_tdm_be_ops,
  4542. .ignore_suspend = 1,
  4543. },
  4544. {
  4545. .name = LPASS_BE_SEC_TDM_RX_0,
  4546. .stream_name = "Secondary TDM0 Playback",
  4547. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  4548. .platform_name = "msm-pcm-routing",
  4549. .codec_name = "msm-stub-codec.1",
  4550. .codec_dai_name = "msm-stub-rx",
  4551. .no_pcm = 1,
  4552. .dpcm_playback = 1,
  4553. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  4554. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4555. .ops = &kona_tdm_be_ops,
  4556. .ignore_suspend = 1,
  4557. .ignore_pmdown_time = 1,
  4558. },
  4559. {
  4560. .name = LPASS_BE_SEC_TDM_TX_0,
  4561. .stream_name = "Secondary TDM0 Capture",
  4562. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  4563. .platform_name = "msm-pcm-routing",
  4564. .codec_name = "msm-stub-codec.1",
  4565. .codec_dai_name = "msm-stub-tx",
  4566. .no_pcm = 1,
  4567. .dpcm_capture = 1,
  4568. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  4569. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4570. .ops = &kona_tdm_be_ops,
  4571. .ignore_suspend = 1,
  4572. },
  4573. {
  4574. .name = LPASS_BE_TERT_TDM_RX_0,
  4575. .stream_name = "Tertiary TDM0 Playback",
  4576. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  4577. .platform_name = "msm-pcm-routing",
  4578. .codec_name = "msm-stub-codec.1",
  4579. .codec_dai_name = "msm-stub-rx",
  4580. .no_pcm = 1,
  4581. .dpcm_playback = 1,
  4582. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  4583. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4584. .ops = &kona_tdm_be_ops,
  4585. .ignore_suspend = 1,
  4586. .ignore_pmdown_time = 1,
  4587. },
  4588. {
  4589. .name = LPASS_BE_TERT_TDM_TX_0,
  4590. .stream_name = "Tertiary TDM0 Capture",
  4591. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  4592. .platform_name = "msm-pcm-routing",
  4593. .codec_name = "msm-stub-codec.1",
  4594. .codec_dai_name = "msm-stub-tx",
  4595. .no_pcm = 1,
  4596. .dpcm_capture = 1,
  4597. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  4598. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4599. .ops = &kona_tdm_be_ops,
  4600. .ignore_suspend = 1,
  4601. },
  4602. };
  4603. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  4604. {
  4605. .name = LPASS_BE_SLIMBUS_7_RX,
  4606. .stream_name = "Slimbus7 Playback",
  4607. .cpu_dai_name = "msm-dai-q6-dev.16398",
  4608. .platform_name = "msm-pcm-routing",
  4609. .codec_name = "btfmslim_slave",
  4610. /* BT codec driver determines capabilities based on
  4611. * dai name, bt codecdai name should always contains
  4612. * supported usecase information
  4613. */
  4614. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  4615. .no_pcm = 1,
  4616. .dpcm_playback = 1,
  4617. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  4618. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4619. .init = &msm_wcn_init,
  4620. .ops = &msm_wcn_ops,
  4621. /* dai link has playback support */
  4622. .ignore_pmdown_time = 1,
  4623. .ignore_suspend = 1,
  4624. },
  4625. {
  4626. .name = LPASS_BE_SLIMBUS_7_TX,
  4627. .stream_name = "Slimbus7 Capture",
  4628. .cpu_dai_name = "msm-dai-q6-dev.16399",
  4629. .platform_name = "msm-pcm-routing",
  4630. .codec_name = "btfmslim_slave",
  4631. .codec_dai_name = "btfm_bt_sco_slim_tx",
  4632. .no_pcm = 1,
  4633. .dpcm_capture = 1,
  4634. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  4635. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4636. .ops = &msm_wcn_ops,
  4637. .ignore_suspend = 1,
  4638. },
  4639. };
  4640. static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
  4641. /* DISP PORT BACK END DAI Link */
  4642. {
  4643. .name = LPASS_BE_DISPLAY_PORT,
  4644. .stream_name = "Display Port Playback",
  4645. .cpu_dai_name = "msm-dai-q6-dp.24608",
  4646. .platform_name = "msm-pcm-routing",
  4647. .codec_name = "msm-ext-disp-audio-codec-rx",
  4648. .codec_dai_name = "msm_dp_audio_codec_rx_dai",
  4649. .no_pcm = 1,
  4650. .dpcm_playback = 1,
  4651. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
  4652. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4653. .ignore_pmdown_time = 1,
  4654. .ignore_suspend = 1,
  4655. },
  4656. /* DISP PORT 1 BACK END DAI Link */
  4657. {
  4658. .name = LPASS_BE_DISPLAY_PORT1,
  4659. .stream_name = "Display Port1 Playback",
  4660. .cpu_dai_name = "msm-dai-q6-dp.24608",
  4661. .platform_name = "msm-pcm-routing",
  4662. .codec_name = "msm-ext-disp-audio-codec-rx",
  4663. .codec_dai_name = "msm_dp_audio_codec_rx1_dai",
  4664. .no_pcm = 1,
  4665. .dpcm_playback = 1,
  4666. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX_1,
  4667. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4668. .ignore_pmdown_time = 1,
  4669. .ignore_suspend = 1,
  4670. },
  4671. };
  4672. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  4673. {
  4674. .name = LPASS_BE_PRI_MI2S_RX,
  4675. .stream_name = "Primary MI2S Playback",
  4676. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  4677. .platform_name = "msm-pcm-routing",
  4678. .codec_name = "msm-stub-codec.1",
  4679. .codec_dai_name = "msm-stub-rx",
  4680. .no_pcm = 1,
  4681. .dpcm_playback = 1,
  4682. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  4683. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4684. .ops = &msm_mi2s_be_ops,
  4685. .ignore_suspend = 1,
  4686. .ignore_pmdown_time = 1,
  4687. },
  4688. {
  4689. .name = LPASS_BE_PRI_MI2S_TX,
  4690. .stream_name = "Primary MI2S Capture",
  4691. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  4692. .platform_name = "msm-pcm-routing",
  4693. .codec_name = "msm-stub-codec.1",
  4694. .codec_dai_name = "msm-stub-tx",
  4695. .no_pcm = 1,
  4696. .dpcm_capture = 1,
  4697. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  4698. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4699. .ops = &msm_mi2s_be_ops,
  4700. .ignore_suspend = 1,
  4701. },
  4702. {
  4703. .name = LPASS_BE_SEC_MI2S_RX,
  4704. .stream_name = "Secondary MI2S Playback",
  4705. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  4706. .platform_name = "msm-pcm-routing",
  4707. .codec_name = "msm-stub-codec.1",
  4708. .codec_dai_name = "msm-stub-rx",
  4709. .no_pcm = 1,
  4710. .dpcm_playback = 1,
  4711. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  4712. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4713. .ops = &msm_mi2s_be_ops,
  4714. .ignore_suspend = 1,
  4715. .ignore_pmdown_time = 1,
  4716. },
  4717. {
  4718. .name = LPASS_BE_SEC_MI2S_TX,
  4719. .stream_name = "Secondary MI2S Capture",
  4720. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  4721. .platform_name = "msm-pcm-routing",
  4722. .codec_name = "msm-stub-codec.1",
  4723. .codec_dai_name = "msm-stub-tx",
  4724. .no_pcm = 1,
  4725. .dpcm_capture = 1,
  4726. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  4727. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4728. .ops = &msm_mi2s_be_ops,
  4729. .ignore_suspend = 1,
  4730. },
  4731. {
  4732. .name = LPASS_BE_TERT_MI2S_RX,
  4733. .stream_name = "Tertiary MI2S Playback",
  4734. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  4735. .platform_name = "msm-pcm-routing",
  4736. .codec_name = "msm-stub-codec.1",
  4737. .codec_dai_name = "msm-stub-rx",
  4738. .no_pcm = 1,
  4739. .dpcm_playback = 1,
  4740. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  4741. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4742. .ops = &msm_mi2s_be_ops,
  4743. .ignore_suspend = 1,
  4744. .ignore_pmdown_time = 1,
  4745. },
  4746. {
  4747. .name = LPASS_BE_TERT_MI2S_TX,
  4748. .stream_name = "Tertiary MI2S Capture",
  4749. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  4750. .platform_name = "msm-pcm-routing",
  4751. .codec_name = "msm-stub-codec.1",
  4752. .codec_dai_name = "msm-stub-tx",
  4753. .no_pcm = 1,
  4754. .dpcm_capture = 1,
  4755. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  4756. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4757. .ops = &msm_mi2s_be_ops,
  4758. .ignore_suspend = 1,
  4759. },
  4760. };
  4761. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  4762. /* Primary AUX PCM Backend DAI Links */
  4763. {
  4764. .name = LPASS_BE_AUXPCM_RX,
  4765. .stream_name = "AUX PCM Playback",
  4766. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4767. .platform_name = "msm-pcm-routing",
  4768. .codec_name = "msm-stub-codec.1",
  4769. .codec_dai_name = "msm-stub-rx",
  4770. .no_pcm = 1,
  4771. .dpcm_playback = 1,
  4772. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  4773. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4774. .ignore_pmdown_time = 1,
  4775. .ignore_suspend = 1,
  4776. },
  4777. {
  4778. .name = LPASS_BE_AUXPCM_TX,
  4779. .stream_name = "AUX PCM Capture",
  4780. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4781. .platform_name = "msm-pcm-routing",
  4782. .codec_name = "msm-stub-codec.1",
  4783. .codec_dai_name = "msm-stub-tx",
  4784. .no_pcm = 1,
  4785. .dpcm_capture = 1,
  4786. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  4787. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4788. .ignore_suspend = 1,
  4789. },
  4790. /* Secondary AUX PCM Backend DAI Links */
  4791. {
  4792. .name = LPASS_BE_SEC_AUXPCM_RX,
  4793. .stream_name = "Sec AUX PCM Playback",
  4794. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  4795. .platform_name = "msm-pcm-routing",
  4796. .codec_name = "msm-stub-codec.1",
  4797. .codec_dai_name = "msm-stub-rx",
  4798. .no_pcm = 1,
  4799. .dpcm_playback = 1,
  4800. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  4801. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4802. .ignore_pmdown_time = 1,
  4803. .ignore_suspend = 1,
  4804. },
  4805. {
  4806. .name = LPASS_BE_SEC_AUXPCM_TX,
  4807. .stream_name = "Sec AUX PCM Capture",
  4808. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  4809. .platform_name = "msm-pcm-routing",
  4810. .codec_name = "msm-stub-codec.1",
  4811. .codec_dai_name = "msm-stub-tx",
  4812. .no_pcm = 1,
  4813. .dpcm_capture = 1,
  4814. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  4815. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4816. .ignore_suspend = 1,
  4817. },
  4818. /* Tertiary AUX PCM Backend DAI Links */
  4819. {
  4820. .name = LPASS_BE_TERT_AUXPCM_RX,
  4821. .stream_name = "Tert AUX PCM Playback",
  4822. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  4823. .platform_name = "msm-pcm-routing",
  4824. .codec_name = "msm-stub-codec.1",
  4825. .codec_dai_name = "msm-stub-rx",
  4826. .no_pcm = 1,
  4827. .dpcm_playback = 1,
  4828. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  4829. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4830. .ignore_suspend = 1,
  4831. },
  4832. {
  4833. .name = LPASS_BE_TERT_AUXPCM_TX,
  4834. .stream_name = "Tert AUX PCM Capture",
  4835. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  4836. .platform_name = "msm-pcm-routing",
  4837. .codec_name = "msm-stub-codec.1",
  4838. .codec_dai_name = "msm-stub-tx",
  4839. .no_pcm = 1,
  4840. .dpcm_capture = 1,
  4841. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  4842. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4843. .ignore_suspend = 1,
  4844. },
  4845. };
  4846. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  4847. /* WSA CDC DMA Backend DAI Links */
  4848. {
  4849. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  4850. .stream_name = "WSA CDC DMA0 Playback",
  4851. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  4852. .platform_name = "msm-pcm-routing",
  4853. .codec_name = "bolero_codec",
  4854. .codec_dai_name = "wsa_macro_rx1",
  4855. .no_pcm = 1,
  4856. .dpcm_playback = 1,
  4857. .init = &msm_int_audrx_init,
  4858. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  4859. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4860. .ignore_pmdown_time = 1,
  4861. .ignore_suspend = 1,
  4862. .ops = &msm_cdc_dma_be_ops,
  4863. },
  4864. {
  4865. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  4866. .stream_name = "WSA CDC DMA1 Playback",
  4867. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  4868. .platform_name = "msm-pcm-routing",
  4869. .codec_name = "bolero_codec",
  4870. .codec_dai_name = "wsa_macro_rx_mix",
  4871. .no_pcm = 1,
  4872. .dpcm_playback = 1,
  4873. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  4874. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4875. .ignore_pmdown_time = 1,
  4876. .ignore_suspend = 1,
  4877. .ops = &msm_cdc_dma_be_ops,
  4878. },
  4879. {
  4880. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  4881. .stream_name = "WSA CDC DMA1 Capture",
  4882. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  4883. .platform_name = "msm-pcm-routing",
  4884. .codec_name = "bolero_codec",
  4885. .codec_dai_name = "wsa_macro_echo",
  4886. .no_pcm = 1,
  4887. .dpcm_capture = 1,
  4888. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  4889. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4890. .ignore_suspend = 1,
  4891. .ops = &msm_cdc_dma_be_ops,
  4892. },
  4893. };
  4894. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  4895. /* RX CDC DMA Backend DAI Links */
  4896. {
  4897. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  4898. .stream_name = "RX CDC DMA0 Playback",
  4899. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  4900. .platform_name = "msm-pcm-routing",
  4901. .codec_name = "bolero_codec",
  4902. .codec_dai_name = "rx_macro_rx1",
  4903. .no_pcm = 1,
  4904. .dpcm_playback = 1,
  4905. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  4906. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4907. .ignore_pmdown_time = 1,
  4908. .ignore_suspend = 1,
  4909. .ops = &msm_cdc_dma_be_ops,
  4910. },
  4911. {
  4912. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  4913. .stream_name = "RX CDC DMA1 Playback",
  4914. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  4915. .platform_name = "msm-pcm-routing",
  4916. .codec_name = "bolero_codec",
  4917. .codec_dai_name = "rx_macro_rx2",
  4918. .no_pcm = 1,
  4919. .dpcm_playback = 1,
  4920. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  4921. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4922. .ignore_pmdown_time = 1,
  4923. .ignore_suspend = 1,
  4924. .ops = &msm_cdc_dma_be_ops,
  4925. },
  4926. {
  4927. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  4928. .stream_name = "RX CDC DMA2 Playback",
  4929. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  4930. .platform_name = "msm-pcm-routing",
  4931. .codec_name = "bolero_codec",
  4932. .codec_dai_name = "rx_macro_rx3",
  4933. .no_pcm = 1,
  4934. .dpcm_playback = 1,
  4935. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  4936. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4937. .ignore_pmdown_time = 1,
  4938. .ignore_suspend = 1,
  4939. .ops = &msm_cdc_dma_be_ops,
  4940. },
  4941. {
  4942. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  4943. .stream_name = "RX CDC DMA3 Playback",
  4944. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  4945. .platform_name = "msm-pcm-routing",
  4946. .codec_name = "bolero_codec",
  4947. .codec_dai_name = "rx_macro_rx4",
  4948. .no_pcm = 1,
  4949. .dpcm_playback = 1,
  4950. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  4951. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4952. .ignore_pmdown_time = 1,
  4953. .ignore_suspend = 1,
  4954. .ops = &msm_cdc_dma_be_ops,
  4955. },
  4956. /* TX CDC DMA Backend DAI Links */
  4957. {
  4958. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  4959. .stream_name = "TX CDC DMA3 Capture",
  4960. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  4961. .platform_name = "msm-pcm-routing",
  4962. .codec_name = "bolero_codec",
  4963. .codec_dai_name = "tx_macro_tx1",
  4964. .no_pcm = 1,
  4965. .dpcm_capture = 1,
  4966. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  4967. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4968. .ignore_suspend = 1,
  4969. .ops = &msm_cdc_dma_be_ops,
  4970. },
  4971. {
  4972. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  4973. .stream_name = "TX CDC DMA4 Capture",
  4974. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  4975. .platform_name = "msm-pcm-routing",
  4976. .codec_name = "bolero_codec",
  4977. .codec_dai_name = "tx_macro_tx2",
  4978. .no_pcm = 1,
  4979. .dpcm_capture = 1,
  4980. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  4981. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4982. .ignore_suspend = 1,
  4983. .ops = &msm_cdc_dma_be_ops,
  4984. },
  4985. };
  4986. static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
  4987. {
  4988. .name = LPASS_BE_VA_CDC_DMA_TX_0,
  4989. .stream_name = "VA CDC DMA0 Capture",
  4990. .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
  4991. .platform_name = "msm-pcm-routing",
  4992. .codec_name = "bolero_codec",
  4993. .codec_dai_name = "va_macro_tx1",
  4994. .no_pcm = 1,
  4995. .dpcm_capture = 1,
  4996. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
  4997. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4998. .ignore_suspend = 1,
  4999. .ops = &msm_cdc_dma_be_ops,
  5000. },
  5001. {
  5002. .name = LPASS_BE_VA_CDC_DMA_TX_1,
  5003. .stream_name = "VA CDC DMA1 Capture",
  5004. .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
  5005. .platform_name = "msm-pcm-routing",
  5006. .codec_name = "bolero_codec",
  5007. .codec_dai_name = "va_macro_tx2",
  5008. .no_pcm = 1,
  5009. .dpcm_capture = 1,
  5010. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
  5011. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5012. .ignore_suspend = 1,
  5013. .ops = &msm_cdc_dma_be_ops,
  5014. },
  5015. {
  5016. .name = LPASS_BE_VA_CDC_DMA_TX_2,
  5017. .stream_name = "VA CDC DMA2 Capture",
  5018. .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
  5019. .platform_name = "msm-pcm-routing",
  5020. .codec_name = "bolero_codec",
  5021. .codec_dai_name = "va_macro_tx3",
  5022. .no_pcm = 1,
  5023. .dpcm_capture = 1,
  5024. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
  5025. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5026. .ignore_suspend = 1,
  5027. .ops = &msm_cdc_dma_be_ops,
  5028. },
  5029. };
  5030. static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = {
  5031. {
  5032. .name = LPASS_BE_AFE_LOOPBACK_TX,
  5033. .stream_name = "AFE Loopback Capture",
  5034. .cpu_dai_name = "msm-dai-q6-dev.24577",
  5035. .platform_name = "msm-pcm-routing",
  5036. .codec_name = "msm-stub-codec.1",
  5037. .codec_dai_name = "msm-stub-tx",
  5038. .no_pcm = 1,
  5039. .dpcm_capture = 1,
  5040. .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
  5041. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5042. .ignore_pmdown_time = 1,
  5043. .ignore_suspend = 1,
  5044. },
  5045. };
  5046. static struct snd_soc_dai_link msm_kona_dai_links[
  5047. ARRAY_SIZE(msm_common_dai_links) +
  5048. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  5049. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  5050. ARRAY_SIZE(msm_common_be_dai_links) +
  5051. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  5052. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  5053. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  5054. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
  5055. ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
  5056. ARRAY_SIZE(ext_disp_be_dai_link) +
  5057. ARRAY_SIZE(msm_wcn_be_dai_links) +
  5058. ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link)];
  5059. static int msm_populate_dai_link_component_of_node(
  5060. struct snd_soc_card *card)
  5061. {
  5062. int i, index, ret = 0;
  5063. struct device *cdev = card->dev;
  5064. struct snd_soc_dai_link *dai_link = card->dai_link;
  5065. struct device_node *np;
  5066. if (!cdev) {
  5067. dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
  5068. return -ENODEV;
  5069. }
  5070. for (i = 0; i < card->num_links; i++) {
  5071. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  5072. continue;
  5073. /* populate platform_of_node for snd card dai links */
  5074. if (dai_link[i].platform_name &&
  5075. !dai_link[i].platform_of_node) {
  5076. index = of_property_match_string(cdev->of_node,
  5077. "asoc-platform-names",
  5078. dai_link[i].platform_name);
  5079. if (index < 0) {
  5080. dev_err(cdev, "%s: No match found for platform name: %s\n",
  5081. __func__, dai_link[i].platform_name);
  5082. ret = index;
  5083. goto err;
  5084. }
  5085. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  5086. index);
  5087. if (!np) {
  5088. dev_err(cdev, "%s: retrieving phandle for platform %s, index %d failed\n",
  5089. __func__, dai_link[i].platform_name,
  5090. index);
  5091. ret = -ENODEV;
  5092. goto err;
  5093. }
  5094. dai_link[i].platform_of_node = np;
  5095. dai_link[i].platform_name = NULL;
  5096. }
  5097. /* populate cpu_of_node for snd card dai links */
  5098. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  5099. index = of_property_match_string(cdev->of_node,
  5100. "asoc-cpu-names",
  5101. dai_link[i].cpu_dai_name);
  5102. if (index >= 0) {
  5103. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  5104. index);
  5105. if (!np) {
  5106. dev_err(cdev, "%s: retrieving phandle for cpu dai %s failed\n",
  5107. __func__,
  5108. dai_link[i].cpu_dai_name);
  5109. ret = -ENODEV;
  5110. goto err;
  5111. }
  5112. dai_link[i].cpu_of_node = np;
  5113. dai_link[i].cpu_dai_name = NULL;
  5114. }
  5115. }
  5116. /* populate codec_of_node for snd card dai links */
  5117. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  5118. index = of_property_match_string(cdev->of_node,
  5119. "asoc-codec-names",
  5120. dai_link[i].codec_name);
  5121. if (index < 0)
  5122. continue;
  5123. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  5124. index);
  5125. if (!np) {
  5126. dev_err(cdev, "%s: retrieving phandle for codec %s failed\n",
  5127. __func__, dai_link[i].codec_name);
  5128. ret = -ENODEV;
  5129. goto err;
  5130. }
  5131. dai_link[i].codec_of_node = np;
  5132. dai_link[i].codec_name = NULL;
  5133. }
  5134. }
  5135. err:
  5136. return ret;
  5137. }
  5138. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  5139. {
  5140. int ret = -EINVAL;
  5141. struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
  5142. if (!component) {
  5143. pr_err("* %s: No match for msm-stub-codec component\n", __func__);
  5144. return ret;
  5145. }
  5146. ret = snd_soc_add_component_controls(component, msm_snd_controls,
  5147. ARRAY_SIZE(msm_snd_controls));
  5148. if (ret < 0) {
  5149. dev_err(component->dev,
  5150. "%s: add_codec_controls failed, err = %d\n",
  5151. __func__, ret);
  5152. return ret;
  5153. }
  5154. return ret;
  5155. }
  5156. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  5157. struct snd_pcm_hw_params *params)
  5158. {
  5159. return 0;
  5160. }
  5161. static struct snd_soc_ops msm_stub_be_ops = {
  5162. .hw_params = msm_snd_stub_hw_params,
  5163. };
  5164. struct snd_soc_card snd_soc_card_stub_msm = {
  5165. .name = "kona-stub-snd-card",
  5166. };
  5167. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  5168. /* FrontEnd DAI Links */
  5169. {
  5170. .name = "MSMSTUB Media1",
  5171. .stream_name = "MultiMedia1",
  5172. .cpu_dai_name = "MultiMedia1",
  5173. .platform_name = "msm-pcm-dsp.0",
  5174. .dynamic = 1,
  5175. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5176. .dpcm_playback = 1,
  5177. .dpcm_capture = 1,
  5178. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5179. SND_SOC_DPCM_TRIGGER_POST},
  5180. .codec_dai_name = "snd-soc-dummy-dai",
  5181. .codec_name = "snd-soc-dummy",
  5182. .ignore_suspend = 1,
  5183. /* this dainlink has playback support */
  5184. .ignore_pmdown_time = 1,
  5185. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  5186. },
  5187. };
  5188. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  5189. /* Backend DAI Links */
  5190. {
  5191. .name = LPASS_BE_AUXPCM_RX,
  5192. .stream_name = "AUX PCM Playback",
  5193. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  5194. .platform_name = "msm-pcm-routing",
  5195. .codec_name = "msm-stub-codec.1",
  5196. .codec_dai_name = "msm-stub-rx",
  5197. .no_pcm = 1,
  5198. .dpcm_playback = 1,
  5199. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  5200. .init = &msm_audrx_stub_init,
  5201. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5202. .ignore_pmdown_time = 1,
  5203. .ignore_suspend = 1,
  5204. .ops = &msm_stub_be_ops,
  5205. },
  5206. {
  5207. .name = LPASS_BE_AUXPCM_TX,
  5208. .stream_name = "AUX PCM Capture",
  5209. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  5210. .platform_name = "msm-pcm-routing",
  5211. .codec_name = "msm-stub-codec.1",
  5212. .codec_dai_name = "msm-stub-tx",
  5213. .no_pcm = 1,
  5214. .dpcm_capture = 1,
  5215. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  5216. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5217. .ignore_suspend = 1,
  5218. .ops = &msm_stub_be_ops,
  5219. },
  5220. };
  5221. static struct snd_soc_dai_link msm_stub_dai_links[
  5222. ARRAY_SIZE(msm_stub_fe_dai_links) +
  5223. ARRAY_SIZE(msm_stub_be_dai_links)];
  5224. static const struct of_device_id kona_asoc_machine_of_match[] = {
  5225. { .compatible = "qcom,kona-asoc-snd",
  5226. .data = "codec"},
  5227. { .compatible = "qcom,kona-asoc-snd-stub",
  5228. .data = "stub_codec"},
  5229. {},
  5230. };
  5231. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  5232. {
  5233. struct snd_soc_card *card = NULL;
  5234. struct snd_soc_dai_link *dailink = NULL;
  5235. int len_1 = 0;
  5236. int len_2 = 0;
  5237. int total_links = 0;
  5238. int rc = 0;
  5239. u32 mi2s_audio_intf = 0;
  5240. u32 auxpcm_audio_intf = 0;
  5241. u32 val = 0;
  5242. const struct of_device_id *match;
  5243. match = of_match_node(kona_asoc_machine_of_match, dev->of_node);
  5244. if (!match) {
  5245. dev_err(dev, "%s: No DT match found for sound card\n",
  5246. __func__);
  5247. return NULL;
  5248. }
  5249. if (!strcmp(match->data, "codec")) {
  5250. card = &snd_soc_card_kona_msm;
  5251. memcpy(msm_kona_dai_links + total_links,
  5252. msm_common_dai_links,
  5253. sizeof(msm_common_dai_links));
  5254. total_links += ARRAY_SIZE(msm_common_dai_links);
  5255. memcpy(msm_kona_dai_links + total_links,
  5256. msm_bolero_fe_dai_links,
  5257. sizeof(msm_bolero_fe_dai_links));
  5258. total_links +=
  5259. ARRAY_SIZE(msm_bolero_fe_dai_links);
  5260. memcpy(msm_kona_dai_links + total_links,
  5261. msm_common_misc_fe_dai_links,
  5262. sizeof(msm_common_misc_fe_dai_links));
  5263. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  5264. memcpy(msm_kona_dai_links + total_links,
  5265. msm_common_be_dai_links,
  5266. sizeof(msm_common_be_dai_links));
  5267. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  5268. memcpy(msm_kona_dai_links + total_links,
  5269. msm_wsa_cdc_dma_be_dai_links,
  5270. sizeof(msm_wsa_cdc_dma_be_dai_links));
  5271. total_links +=
  5272. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  5273. memcpy(msm_kona_dai_links + total_links,
  5274. msm_rx_tx_cdc_dma_be_dai_links,
  5275. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  5276. total_links +=
  5277. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  5278. memcpy(msm_kona_dai_links + total_links,
  5279. msm_va_cdc_dma_be_dai_links,
  5280. sizeof(msm_va_cdc_dma_be_dai_links));
  5281. total_links +=
  5282. ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
  5283. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  5284. &mi2s_audio_intf);
  5285. if (rc) {
  5286. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  5287. __func__);
  5288. } else {
  5289. if (mi2s_audio_intf) {
  5290. memcpy(msm_kona_dai_links + total_links,
  5291. msm_mi2s_be_dai_links,
  5292. sizeof(msm_mi2s_be_dai_links));
  5293. total_links +=
  5294. ARRAY_SIZE(msm_mi2s_be_dai_links);
  5295. }
  5296. }
  5297. rc = of_property_read_u32(dev->of_node,
  5298. "qcom,auxpcm-audio-intf",
  5299. &auxpcm_audio_intf);
  5300. if (rc) {
  5301. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  5302. __func__);
  5303. } else {
  5304. if (auxpcm_audio_intf) {
  5305. memcpy(msm_kona_dai_links + total_links,
  5306. msm_auxpcm_be_dai_links,
  5307. sizeof(msm_auxpcm_be_dai_links));
  5308. total_links +=
  5309. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  5310. }
  5311. }
  5312. rc = of_property_read_u32(dev->of_node,
  5313. "qcom,ext-disp-audio-rx", &val);
  5314. if (!rc && val) {
  5315. dev_dbg(dev, "%s(): ext disp audio support present\n",
  5316. __func__);
  5317. memcpy(msm_kona_dai_links + total_links,
  5318. ext_disp_be_dai_link,
  5319. sizeof(ext_disp_be_dai_link));
  5320. total_links += ARRAY_SIZE(ext_disp_be_dai_link);
  5321. }
  5322. rc = of_property_read_u32(dev->of_node, "qcom,wcn-bt", &val);
  5323. if (!rc && val) {
  5324. dev_dbg(dev, "%s(): WCN BT support present\n",
  5325. __func__);
  5326. memcpy(msm_kona_dai_links + total_links,
  5327. msm_wcn_be_dai_links,
  5328. sizeof(msm_wcn_be_dai_links));
  5329. total_links += ARRAY_SIZE(msm_wcn_be_dai_links);
  5330. }
  5331. rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb",
  5332. &val);
  5333. if (!rc && val) {
  5334. memcpy(msm_kona_dai_links + total_links,
  5335. msm_afe_rxtx_lb_be_dai_link,
  5336. sizeof(msm_afe_rxtx_lb_be_dai_link));
  5337. total_links +=
  5338. ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link);
  5339. }
  5340. dailink = msm_kona_dai_links;
  5341. } else if(!strcmp(match->data, "stub_codec")) {
  5342. card = &snd_soc_card_stub_msm;
  5343. len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
  5344. len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
  5345. memcpy(msm_stub_dai_links,
  5346. msm_stub_fe_dai_links,
  5347. sizeof(msm_stub_fe_dai_links));
  5348. memcpy(msm_stub_dai_links + len_1,
  5349. msm_stub_be_dai_links,
  5350. sizeof(msm_stub_be_dai_links));
  5351. dailink = msm_stub_dai_links;
  5352. total_links = len_2;
  5353. }
  5354. if (card) {
  5355. card->dai_link = dailink;
  5356. card->num_links = total_links;
  5357. }
  5358. return card;
  5359. }
  5360. static int msm_wsa881x_init(struct snd_soc_component *component)
  5361. {
  5362. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  5363. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  5364. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  5365. SPKR_L_BOOST, SPKR_L_VI};
  5366. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  5367. SPKR_R_BOOST, SPKR_R_VI};
  5368. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  5369. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  5370. struct msm_asoc_mach_data *pdata;
  5371. struct snd_soc_dapm_context *dapm;
  5372. struct snd_card *card;
  5373. struct snd_info_entry *entry;
  5374. int ret = 0;
  5375. if (!component) {
  5376. pr_err("%s component is NULL\n", __func__);
  5377. return -EINVAL;
  5378. }
  5379. card = component->card->snd_card;
  5380. dapm = snd_soc_component_get_dapm(component);
  5381. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  5382. dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
  5383. __func__, component->name);
  5384. wsa881x_set_channel_map(component, &spkleft_ports[0],
  5385. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  5386. &ch_rate[0], &spkleft_port_types[0]);
  5387. if (dapm->component) {
  5388. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  5389. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  5390. }
  5391. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  5392. dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
  5393. __func__, component->name);
  5394. wsa881x_set_channel_map(component, &spkright_ports[0],
  5395. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  5396. &ch_rate[0], &spkright_port_types[0]);
  5397. if (dapm->component) {
  5398. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  5399. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  5400. }
  5401. } else {
  5402. dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
  5403. component->name);
  5404. ret = -EINVAL;
  5405. goto err;
  5406. }
  5407. pdata = snd_soc_card_get_drvdata(component->card);
  5408. if (!pdata->codec_root) {
  5409. entry = snd_info_create_subdir(card->module, "codecs",
  5410. card->proc_root);
  5411. if (!entry) {
  5412. pr_err("%s: Cannot create codecs module entry\n",
  5413. __func__);
  5414. ret = 0;
  5415. goto err;
  5416. }
  5417. pdata->codec_root = entry;
  5418. }
  5419. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  5420. component);
  5421. err:
  5422. return ret;
  5423. }
  5424. static int msm_aux_codec_init(struct snd_soc_component *component)
  5425. {
  5426. struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
  5427. int ret = 0;
  5428. void *mbhc_calibration;
  5429. struct snd_info_entry *entry;
  5430. struct snd_card *card = component->card->snd_card;
  5431. struct msm_asoc_mach_data *pdata;
  5432. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  5433. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  5434. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  5435. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  5436. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  5437. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  5438. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  5439. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  5440. snd_soc_dapm_sync(dapm);
  5441. pdata = snd_soc_card_get_drvdata(component->card);
  5442. if (!pdata->codec_root) {
  5443. entry = snd_info_create_subdir(card->module, "codecs",
  5444. card->proc_root);
  5445. if (!entry) {
  5446. dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
  5447. __func__);
  5448. ret = 0;
  5449. goto mbhc_cfg_cal;
  5450. }
  5451. pdata->codec_root = entry;
  5452. }
  5453. wcd938x_info_create_codec_entry(pdata->codec_root, component);
  5454. mbhc_cfg_cal:
  5455. mbhc_calibration = def_wcd_mbhc_cal();
  5456. if (!mbhc_calibration)
  5457. return -ENOMEM;
  5458. wcd_mbhc_cfg.calibration = mbhc_calibration;
  5459. ret = wcd938x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
  5460. if (ret) {
  5461. dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
  5462. __func__, ret);
  5463. goto err_hs_detect;
  5464. }
  5465. return 0;
  5466. err_hs_detect:
  5467. kfree(mbhc_calibration);
  5468. return ret;
  5469. }
  5470. static int msm_init_aux_dev(struct platform_device *pdev,
  5471. struct snd_soc_card *card)
  5472. {
  5473. struct device_node *wsa_of_node;
  5474. struct device_node *aux_codec_of_node;
  5475. u32 wsa_max_devs;
  5476. u32 wsa_dev_cnt;
  5477. u32 codec_aux_dev_cnt = 0;
  5478. int i;
  5479. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  5480. struct aux_codec_dev_info *aux_cdc_dev_info;
  5481. const char *auxdev_name_prefix[1];
  5482. char *dev_name_str = NULL;
  5483. int found = 0;
  5484. int codecs_found = 0;
  5485. int ret = 0;
  5486. /* Get maximum WSA device count for this platform */
  5487. ret = of_property_read_u32(pdev->dev.of_node,
  5488. "qcom,wsa-max-devs", &wsa_max_devs);
  5489. if (ret) {
  5490. dev_info(&pdev->dev,
  5491. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  5492. __func__, pdev->dev.of_node->full_name, ret);
  5493. wsa_max_devs = 0;
  5494. goto codec_aux_dev;
  5495. }
  5496. if (wsa_max_devs == 0) {
  5497. dev_warn(&pdev->dev,
  5498. "%s: Max WSA devices is 0 for this target?\n",
  5499. __func__);
  5500. goto codec_aux_dev;
  5501. }
  5502. /* Get count of WSA device phandles for this platform */
  5503. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  5504. "qcom,wsa-devs", NULL);
  5505. if (wsa_dev_cnt == -ENOENT) {
  5506. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  5507. __func__);
  5508. goto err;
  5509. } else if (wsa_dev_cnt <= 0) {
  5510. dev_err(&pdev->dev,
  5511. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  5512. __func__, wsa_dev_cnt);
  5513. ret = -EINVAL;
  5514. goto err;
  5515. }
  5516. /*
  5517. * Expect total phandles count to be NOT less than maximum possible
  5518. * WSA count. However, if it is less, then assign same value to
  5519. * max count as well.
  5520. */
  5521. if (wsa_dev_cnt < wsa_max_devs) {
  5522. dev_dbg(&pdev->dev,
  5523. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  5524. __func__, wsa_max_devs, wsa_dev_cnt);
  5525. wsa_max_devs = wsa_dev_cnt;
  5526. }
  5527. /* Make sure prefix string passed for each WSA device */
  5528. ret = of_property_count_strings(pdev->dev.of_node,
  5529. "qcom,wsa-aux-dev-prefix");
  5530. if (ret != wsa_dev_cnt) {
  5531. dev_err(&pdev->dev,
  5532. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  5533. __func__, wsa_dev_cnt, ret);
  5534. ret = -EINVAL;
  5535. goto err;
  5536. }
  5537. /*
  5538. * Alloc mem to store phandle and index info of WSA device, if already
  5539. * registered with ALSA core
  5540. */
  5541. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  5542. sizeof(struct msm_wsa881x_dev_info),
  5543. GFP_KERNEL);
  5544. if (!wsa881x_dev_info) {
  5545. ret = -ENOMEM;
  5546. goto err;
  5547. }
  5548. /*
  5549. * search and check whether all WSA devices are already
  5550. * registered with ALSA core or not. If found a node, store
  5551. * the node and the index in a local array of struct for later
  5552. * use.
  5553. */
  5554. for (i = 0; i < wsa_dev_cnt; i++) {
  5555. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  5556. "qcom,wsa-devs", i);
  5557. if (unlikely(!wsa_of_node)) {
  5558. /* we should not be here */
  5559. dev_err(&pdev->dev,
  5560. "%s: wsa dev node is not present\n",
  5561. __func__);
  5562. ret = -EINVAL;
  5563. goto err;
  5564. }
  5565. if (soc_find_component(wsa_of_node, NULL)) {
  5566. /* WSA device registered with ALSA core */
  5567. wsa881x_dev_info[found].of_node = wsa_of_node;
  5568. wsa881x_dev_info[found].index = i;
  5569. found++;
  5570. if (found == wsa_max_devs)
  5571. break;
  5572. }
  5573. }
  5574. if (found < wsa_max_devs) {
  5575. dev_dbg(&pdev->dev,
  5576. "%s: failed to find %d components. Found only %d\n",
  5577. __func__, wsa_max_devs, found);
  5578. return -EPROBE_DEFER;
  5579. }
  5580. dev_info(&pdev->dev,
  5581. "%s: found %d wsa881x devices registered with ALSA core\n",
  5582. __func__, found);
  5583. codec_aux_dev:
  5584. /* Get count of aux codec device phandles for this platform */
  5585. codec_aux_dev_cnt = of_count_phandle_with_args(
  5586. pdev->dev.of_node,
  5587. "qcom,codec-aux-devs", NULL);
  5588. if (codec_aux_dev_cnt == -ENOENT) {
  5589. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  5590. __func__);
  5591. goto err;
  5592. } else if (codec_aux_dev_cnt <= 0) {
  5593. dev_err(&pdev->dev,
  5594. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  5595. __func__, codec_aux_dev_cnt);
  5596. ret = -EINVAL;
  5597. goto err;
  5598. }
  5599. /*
  5600. * Alloc mem to store phandle and index info of aux codec
  5601. * if already registered with ALSA core
  5602. */
  5603. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
  5604. sizeof(struct aux_codec_dev_info),
  5605. GFP_KERNEL);
  5606. if (!aux_cdc_dev_info) {
  5607. ret = -ENOMEM;
  5608. goto err;
  5609. }
  5610. /*
  5611. * search and check whether all aux codecs are already
  5612. * registered with ALSA core or not. If found a node, store
  5613. * the node and the index in a local array of struct for later
  5614. * use.
  5615. */
  5616. for (i = 0; i < codec_aux_dev_cnt; i++) {
  5617. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  5618. "qcom,codec-aux-devs", i);
  5619. if (unlikely(!aux_codec_of_node)) {
  5620. /* we should not be here */
  5621. dev_err(&pdev->dev,
  5622. "%s: aux codec dev node is not present\n",
  5623. __func__);
  5624. ret = -EINVAL;
  5625. goto err;
  5626. }
  5627. if (soc_find_component(aux_codec_of_node, NULL)) {
  5628. /* AUX codec registered with ALSA core */
  5629. aux_cdc_dev_info[codecs_found].of_node =
  5630. aux_codec_of_node;
  5631. aux_cdc_dev_info[codecs_found].index = i;
  5632. codecs_found++;
  5633. }
  5634. }
  5635. if (codecs_found < codec_aux_dev_cnt) {
  5636. dev_dbg(&pdev->dev,
  5637. "%s: failed to find %d components. Found only %d\n",
  5638. __func__, codec_aux_dev_cnt, codecs_found);
  5639. return -EPROBE_DEFER;
  5640. }
  5641. dev_info(&pdev->dev,
  5642. "%s: found %d AUX codecs registered with ALSA core\n",
  5643. __func__, codecs_found);
  5644. card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
  5645. card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
  5646. /* Alloc array of AUX devs struct */
  5647. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  5648. sizeof(struct snd_soc_aux_dev),
  5649. GFP_KERNEL);
  5650. if (!msm_aux_dev) {
  5651. ret = -ENOMEM;
  5652. goto err;
  5653. }
  5654. /* Alloc array of codec conf struct */
  5655. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  5656. sizeof(struct snd_soc_codec_conf),
  5657. GFP_KERNEL);
  5658. if (!msm_codec_conf) {
  5659. ret = -ENOMEM;
  5660. goto err;
  5661. }
  5662. for (i = 0; i < wsa_max_devs; i++) {
  5663. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  5664. GFP_KERNEL);
  5665. if (!dev_name_str) {
  5666. ret = -ENOMEM;
  5667. goto err;
  5668. }
  5669. ret = of_property_read_string_index(pdev->dev.of_node,
  5670. "qcom,wsa-aux-dev-prefix",
  5671. wsa881x_dev_info[i].index,
  5672. auxdev_name_prefix);
  5673. if (ret) {
  5674. dev_err(&pdev->dev,
  5675. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  5676. __func__, ret);
  5677. ret = -EINVAL;
  5678. goto err;
  5679. }
  5680. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  5681. msm_aux_dev[i].name = dev_name_str;
  5682. msm_aux_dev[i].codec_name = NULL;
  5683. msm_aux_dev[i].codec_of_node =
  5684. wsa881x_dev_info[i].of_node;
  5685. msm_aux_dev[i].init = msm_wsa881x_init;
  5686. msm_codec_conf[i].dev_name = NULL;
  5687. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  5688. msm_codec_conf[i].of_node =
  5689. wsa881x_dev_info[i].of_node;
  5690. }
  5691. for (i = 0; i < codec_aux_dev_cnt; i++) {
  5692. msm_aux_dev[wsa_max_devs + i].name = NULL;
  5693. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  5694. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  5695. aux_cdc_dev_info[i].of_node;
  5696. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  5697. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  5698. msm_codec_conf[wsa_max_devs + i].name_prefix =
  5699. NULL;
  5700. msm_codec_conf[wsa_max_devs + i].of_node =
  5701. aux_cdc_dev_info[i].of_node;
  5702. }
  5703. card->codec_conf = msm_codec_conf;
  5704. card->aux_dev = msm_aux_dev;
  5705. err:
  5706. return ret;
  5707. }
  5708. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  5709. {
  5710. int count = 0;
  5711. u32 mi2s_master_slave[MI2S_MAX];
  5712. int ret = 0;
  5713. for (count = 0; count < MI2S_MAX; count++) {
  5714. mutex_init(&mi2s_intf_conf[count].lock);
  5715. mi2s_intf_conf[count].ref_cnt = 0;
  5716. }
  5717. ret = of_property_read_u32_array(pdev->dev.of_node,
  5718. "qcom,msm-mi2s-master",
  5719. mi2s_master_slave, MI2S_MAX);
  5720. if (ret) {
  5721. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  5722. __func__);
  5723. } else {
  5724. for (count = 0; count < MI2S_MAX; count++) {
  5725. mi2s_intf_conf[count].msm_is_mi2s_master =
  5726. mi2s_master_slave[count];
  5727. }
  5728. }
  5729. }
  5730. static void msm_i2s_auxpcm_deinit(void)
  5731. {
  5732. int count = 0;
  5733. for (count = 0; count < MI2S_MAX; count++) {
  5734. mutex_destroy(&mi2s_intf_conf[count].lock);
  5735. mi2s_intf_conf[count].ref_cnt = 0;
  5736. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  5737. }
  5738. }
  5739. static int kona_ssr_enable(struct device *dev, void *data)
  5740. {
  5741. struct platform_device *pdev = to_platform_device(dev);
  5742. struct snd_soc_card *card = platform_get_drvdata(pdev);
  5743. int ret = 0;
  5744. if (!card) {
  5745. dev_err(dev, "%s: card is NULL\n", __func__);
  5746. ret = -EINVAL;
  5747. goto err;
  5748. }
  5749. if (!strcmp(card->name, "kona-stub-snd-card")) {
  5750. /* TODO */
  5751. dev_dbg(dev, "%s: TODO \n", __func__);
  5752. }
  5753. snd_soc_card_change_online_state(card, 1);
  5754. dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
  5755. err:
  5756. return ret;
  5757. }
  5758. static void kona_ssr_disable(struct device *dev, void *data)
  5759. {
  5760. struct platform_device *pdev = to_platform_device(dev);
  5761. struct snd_soc_card *card = platform_get_drvdata(pdev);
  5762. if (!card) {
  5763. dev_err(dev, "%s: card is NULL\n", __func__);
  5764. return;
  5765. }
  5766. dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
  5767. snd_soc_card_change_online_state(card, 0);
  5768. if (!strcmp(card->name, "kona-stub-snd-card")) {
  5769. /* TODO */
  5770. dev_dbg(dev, "%s: TODO \n", __func__);
  5771. }
  5772. }
  5773. static const struct snd_event_ops kona_ssr_ops = {
  5774. .enable = kona_ssr_enable,
  5775. .disable = kona_ssr_disable,
  5776. };
  5777. static int msm_audio_ssr_compare(struct device *dev, void *data)
  5778. {
  5779. struct device_node *node = data;
  5780. dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
  5781. __func__, dev->of_node, node);
  5782. return (dev->of_node && dev->of_node == node);
  5783. }
  5784. static int msm_audio_ssr_register(struct device *dev)
  5785. {
  5786. struct device_node *np = dev->of_node;
  5787. struct snd_event_clients *ssr_clients = NULL;
  5788. struct device_node *node = NULL;
  5789. int ret = 0;
  5790. int i = 0;
  5791. for (i = 0; ; i++) {
  5792. node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
  5793. if (!node)
  5794. break;
  5795. snd_event_mstr_add_client(&ssr_clients,
  5796. msm_audio_ssr_compare, node);
  5797. }
  5798. ret = snd_event_master_register(dev, &kona_ssr_ops,
  5799. ssr_clients, NULL);
  5800. if (!ret)
  5801. snd_event_notify(dev, SND_EVENT_UP);
  5802. return ret;
  5803. }
  5804. static int msm_asoc_machine_probe(struct platform_device *pdev)
  5805. {
  5806. struct snd_soc_card *card = NULL;
  5807. struct msm_asoc_mach_data *pdata = NULL;
  5808. const char *mbhc_audio_jack_type = NULL;
  5809. int ret = 0;
  5810. if (!pdev->dev.of_node) {
  5811. dev_err(&pdev->dev, "%s: No platform supplied from device tree\n", __func__);
  5812. return -EINVAL;
  5813. }
  5814. pdata = devm_kzalloc(&pdev->dev,
  5815. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  5816. if (!pdata)
  5817. return -ENOMEM;
  5818. card = populate_snd_card_dailinks(&pdev->dev);
  5819. if (!card) {
  5820. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  5821. ret = -EINVAL;
  5822. goto err;
  5823. }
  5824. card->dev = &pdev->dev;
  5825. platform_set_drvdata(pdev, card);
  5826. snd_soc_card_set_drvdata(card, pdata);
  5827. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  5828. if (ret) {
  5829. dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
  5830. __func__, ret);
  5831. goto err;
  5832. }
  5833. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  5834. if (ret) {
  5835. dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
  5836. __func__, ret);
  5837. goto err;
  5838. }
  5839. ret = msm_populate_dai_link_component_of_node(card);
  5840. if (ret) {
  5841. ret = -EPROBE_DEFER;
  5842. goto err;
  5843. }
  5844. ret = msm_init_aux_dev(pdev, card);
  5845. if (ret)
  5846. goto err;
  5847. ret = devm_snd_soc_register_card(&pdev->dev, card);
  5848. if (ret == -EPROBE_DEFER) {
  5849. if (codec_reg_done)
  5850. ret = -EINVAL;
  5851. goto err;
  5852. } else if (ret) {
  5853. dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
  5854. __func__, ret);
  5855. goto err;
  5856. }
  5857. dev_info(&pdev->dev, "%s: Sound card %s registered\n",
  5858. __func__, card->name);
  5859. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5860. "qcom,hph-en1-gpio", 0);
  5861. if (!pdata->hph_en1_gpio_p) {
  5862. dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
  5863. __func__, "qcom,hph-en1-gpio",
  5864. pdev->dev.of_node->full_name);
  5865. }
  5866. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5867. "qcom,hph-en0-gpio", 0);
  5868. if (!pdata->hph_en0_gpio_p) {
  5869. dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
  5870. __func__, "qcom,hph-en0-gpio",
  5871. pdev->dev.of_node->full_name);
  5872. }
  5873. ret = of_property_read_string(pdev->dev.of_node,
  5874. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  5875. if (ret) {
  5876. dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
  5877. __func__, "qcom,mbhc-audio-jack-type",
  5878. pdev->dev.of_node->full_name);
  5879. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  5880. } else {
  5881. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  5882. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  5883. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  5884. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  5885. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  5886. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  5887. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  5888. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  5889. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  5890. } else {
  5891. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  5892. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  5893. }
  5894. }
  5895. /*
  5896. * Parse US-Euro gpio info from DT. Report no error if us-euro
  5897. * entry is not found in DT file as some targets do not support
  5898. * US-Euro detection
  5899. */
  5900. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5901. "qcom,us-euro-gpios", 0);
  5902. if (!pdata->us_euro_gpio_p) {
  5903. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  5904. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  5905. } else {
  5906. dev_dbg(&pdev->dev, "%s detected\n",
  5907. "qcom,us-euro-gpios");
  5908. wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  5909. }
  5910. if (wcd_mbhc_cfg.enable_usbc_analog)
  5911. wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
  5912. pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
  5913. "fsa4480-i2c-handle", 0);
  5914. if (!pdata->fsa_handle)
  5915. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  5916. "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
  5917. msm_i2s_auxpcm_init(pdev);
  5918. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5919. "qcom,cdc-dmic01-gpios",
  5920. 0);
  5921. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5922. "qcom,cdc-dmic23-gpios",
  5923. 0);
  5924. pdata->dmic45_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5925. "qcom,cdc-dmic45-gpios",
  5926. 0);
  5927. ret = msm_audio_ssr_register(&pdev->dev);
  5928. if (ret)
  5929. pr_err("%s: Registration with SND event FWK failed ret = %d\n",
  5930. __func__, ret);
  5931. is_initial_boot = true;
  5932. return 0;
  5933. err:
  5934. devm_kfree(&pdev->dev, pdata);
  5935. return ret;
  5936. }
  5937. static int msm_asoc_machine_remove(struct platform_device *pdev)
  5938. {
  5939. struct snd_soc_card *card = platform_get_drvdata(pdev);
  5940. snd_event_master_deregister(&pdev->dev);
  5941. snd_soc_unregister_card(card);
  5942. msm_i2s_auxpcm_deinit();
  5943. return 0;
  5944. }
  5945. static struct platform_driver kona_asoc_machine_driver = {
  5946. .driver = {
  5947. .name = DRV_NAME,
  5948. .owner = THIS_MODULE,
  5949. .pm = &snd_soc_pm_ops,
  5950. .of_match_table = kona_asoc_machine_of_match,
  5951. },
  5952. .probe = msm_asoc_machine_probe,
  5953. .remove = msm_asoc_machine_remove,
  5954. };
  5955. module_platform_driver(kona_asoc_machine_driver);
  5956. MODULE_DESCRIPTION("ALSA SoC msm");
  5957. MODULE_LICENSE("GPL v2");
  5958. MODULE_ALIAS("platform:" DRV_NAME);
  5959. MODULE_DEVICE_TABLE(of, kona_asoc_machine_of_match);