dsi_panel.c 121 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
  4. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/slab.h>
  8. #include <linux/gpio.h>
  9. #include <linux/of_gpio.h>
  10. #include <linux/pwm.h>
  11. #include <video/mipi_display.h>
  12. #include "dsi_panel.h"
  13. #include "dsi_ctrl_hw.h"
  14. #include "dsi_parser.h"
  15. #include "sde_dbg.h"
  16. #include "sde_dsc_helper.h"
  17. #include "sde_vdc_helper.h"
  18. /**
  19. * topology is currently defined by a set of following 3 values:
  20. * 1. num of layer mixers
  21. * 2. num of compression encoders
  22. * 3. num of interfaces
  23. */
  24. #define TOPOLOGY_SET_LEN 3
  25. #define MAX_TOPOLOGY 5
  26. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  27. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  28. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  29. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  30. #define MAX_PANEL_JITTER 10
  31. #define DEFAULT_PANEL_PREFILL_LINES 25
  32. #define HIGH_REFRESH_RATE_THRESHOLD_TIME_US 500
  33. #define MIN_PREFILL_LINES 40
  34. #define RSCC_MODE_THRESHOLD_TIME_US 40
  35. #define DCS_COMMAND_THRESHOLD_TIME_US 40
  36. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  37. {
  38. char *bp;
  39. bp = buf;
  40. /* First 7 bytes are cmd header */
  41. *bp++ = 0x0A;
  42. *bp++ = 1;
  43. *bp++ = 0;
  44. *bp++ = 0;
  45. *bp++ = pps_delay_ms;
  46. *bp++ = 0;
  47. *bp++ = 128;
  48. }
  49. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  50. char *buf, int pps_id, u32 size)
  51. {
  52. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  53. buf += DSI_CMD_PPS_HDR_SIZE;
  54. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  55. size);
  56. }
  57. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  58. char *buf, int pps_id, u32 size)
  59. {
  60. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  61. buf += DSI_CMD_PPS_HDR_SIZE;
  62. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  63. size);
  64. }
  65. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  66. {
  67. int rc = 0;
  68. int i;
  69. struct regulator *vreg = NULL;
  70. for (i = 0; i < panel->power_info.count; i++) {
  71. vreg = devm_regulator_get(panel->parent,
  72. panel->power_info.vregs[i].vreg_name);
  73. rc = PTR_ERR_OR_ZERO(vreg);
  74. if (rc) {
  75. DSI_ERR("failed to get %s regulator\n",
  76. panel->power_info.vregs[i].vreg_name);
  77. goto error_put;
  78. }
  79. panel->power_info.vregs[i].vreg = vreg;
  80. }
  81. return rc;
  82. error_put:
  83. for (i = i - 1; i >= 0; i--) {
  84. devm_regulator_put(panel->power_info.vregs[i].vreg);
  85. panel->power_info.vregs[i].vreg = NULL;
  86. }
  87. return rc;
  88. }
  89. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  90. {
  91. int rc = 0;
  92. int i;
  93. for (i = panel->power_info.count - 1; i >= 0; i--)
  94. devm_regulator_put(panel->power_info.vregs[i].vreg);
  95. return rc;
  96. }
  97. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  98. {
  99. int rc = 0;
  100. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  101. if (gpio_is_valid(r_config->reset_gpio)) {
  102. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  103. if (rc) {
  104. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  105. goto error;
  106. }
  107. }
  108. if (gpio_is_valid(r_config->disp_en_gpio)) {
  109. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  110. if (rc) {
  111. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  112. goto error_release_reset;
  113. }
  114. }
  115. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  116. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  117. if (rc) {
  118. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  119. goto error_release_disp_en;
  120. }
  121. }
  122. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  123. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  124. if (rc) {
  125. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  126. goto error_release_mode_sel;
  127. }
  128. }
  129. if (gpio_is_valid(panel->panel_test_gpio)) {
  130. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  131. if (rc) {
  132. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  133. rc);
  134. panel->panel_test_gpio = -1;
  135. rc = 0;
  136. }
  137. }
  138. goto error;
  139. error_release_mode_sel:
  140. if (gpio_is_valid(panel->bl_config.en_gpio))
  141. gpio_free(panel->bl_config.en_gpio);
  142. error_release_disp_en:
  143. if (gpio_is_valid(r_config->disp_en_gpio))
  144. gpio_free(r_config->disp_en_gpio);
  145. error_release_reset:
  146. if (gpio_is_valid(r_config->reset_gpio))
  147. gpio_free(r_config->reset_gpio);
  148. error:
  149. return rc;
  150. }
  151. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  152. {
  153. int rc = 0;
  154. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  155. if (gpio_is_valid(r_config->reset_gpio))
  156. gpio_free(r_config->reset_gpio);
  157. if (gpio_is_valid(r_config->disp_en_gpio))
  158. gpio_free(r_config->disp_en_gpio);
  159. if (gpio_is_valid(panel->bl_config.en_gpio))
  160. gpio_free(panel->bl_config.en_gpio);
  161. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  162. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  163. if (gpio_is_valid(panel->panel_test_gpio))
  164. gpio_free(panel->panel_test_gpio);
  165. return rc;
  166. }
  167. static int dsi_panel_trigger_esd_attack_sub(int reset_gpio)
  168. {
  169. if (!gpio_is_valid(reset_gpio)) {
  170. DSI_INFO("failed to pull down the reset gpio\n");
  171. return -EINVAL;
  172. }
  173. gpio_set_value(reset_gpio, 0);
  174. SDE_EVT32(SDE_EVTLOG_FUNC_CASE1);
  175. DSI_INFO("GPIO pulled low to simulate ESD\n");
  176. return 0;
  177. }
  178. static int dsi_panel_vm_trigger_esd_attack(struct dsi_panel *panel)
  179. {
  180. struct dsi_parser_utils *utils = &panel->utils;
  181. int reset_gpio;
  182. int rc = 0;
  183. reset_gpio = utils->get_named_gpio(utils->data,
  184. "qcom,platform-reset-gpio", 0);
  185. if (!gpio_is_valid(reset_gpio)) {
  186. DSI_ERR("[%s] reset gpio not provided\n", panel->name);
  187. return -EINVAL;
  188. }
  189. rc = gpio_request(reset_gpio, "reset_gpio");
  190. if (rc) {
  191. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  192. return rc;
  193. }
  194. rc = dsi_panel_trigger_esd_attack_sub(reset_gpio);
  195. gpio_free(reset_gpio);
  196. return rc;
  197. }
  198. static int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  199. {
  200. struct dsi_panel_reset_config *r_config;
  201. if (!panel) {
  202. DSI_ERR("Invalid panel param\n");
  203. return -EINVAL;
  204. }
  205. r_config = &panel->reset_config;
  206. if (!r_config) {
  207. DSI_ERR("Invalid panel reset configuration\n");
  208. return -EINVAL;
  209. }
  210. return dsi_panel_trigger_esd_attack_sub(r_config->reset_gpio);
  211. }
  212. static int dsi_panel_reset(struct dsi_panel *panel)
  213. {
  214. int rc = 0;
  215. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  216. int i;
  217. if (!gpio_is_valid(r_config->reset_gpio))
  218. goto skip_reset_gpio;
  219. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  220. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  221. if (rc) {
  222. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  223. goto exit;
  224. }
  225. }
  226. if (r_config->count) {
  227. rc = gpio_direction_output(r_config->reset_gpio,
  228. r_config->sequence[0].level);
  229. if (rc) {
  230. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  231. goto exit;
  232. }
  233. }
  234. for (i = 0; i < r_config->count; i++) {
  235. gpio_set_value(r_config->reset_gpio,
  236. r_config->sequence[i].level);
  237. if (r_config->sequence[i].sleep_ms)
  238. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  239. (r_config->sequence[i].sleep_ms * 1000) + 100);
  240. }
  241. skip_reset_gpio:
  242. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  243. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  244. if (rc)
  245. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  246. }
  247. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  248. bool out = true;
  249. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  250. || (panel->reset_config.mode_sel_state
  251. == MODE_GPIO_LOW))
  252. out = false;
  253. else if ((panel->reset_config.mode_sel_state
  254. == MODE_SEL_SINGLE_PORT) ||
  255. (panel->reset_config.mode_sel_state
  256. == MODE_GPIO_HIGH))
  257. out = true;
  258. rc = gpio_direction_output(
  259. panel->reset_config.lcd_mode_sel_gpio, out);
  260. if (rc)
  261. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  262. }
  263. if (gpio_is_valid(panel->panel_test_gpio)) {
  264. rc = gpio_direction_input(panel->panel_test_gpio);
  265. if (rc)
  266. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  267. rc);
  268. }
  269. exit:
  270. return rc;
  271. }
  272. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  273. {
  274. int rc = 0;
  275. struct pinctrl_state *state;
  276. if (panel->host_config.ext_bridge_mode)
  277. return 0;
  278. if (!panel->pinctrl.pinctrl)
  279. return 0;
  280. if (enable)
  281. state = panel->pinctrl.active;
  282. else
  283. state = panel->pinctrl.suspend;
  284. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  285. if (rc)
  286. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  287. panel->name, rc);
  288. return rc;
  289. }
  290. static int dsi_panel_power_on(struct dsi_panel *panel)
  291. {
  292. int rc = 0;
  293. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  294. if (rc) {
  295. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  296. panel->name, rc);
  297. goto exit;
  298. }
  299. rc = dsi_panel_set_pinctrl_state(panel, true);
  300. if (rc) {
  301. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  302. goto error_disable_vregs;
  303. }
  304. rc = dsi_panel_reset(panel);
  305. if (rc) {
  306. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  307. goto error_disable_gpio;
  308. }
  309. goto exit;
  310. error_disable_gpio:
  311. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  312. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  313. if (gpio_is_valid(panel->bl_config.en_gpio))
  314. gpio_set_value(panel->bl_config.en_gpio, 0);
  315. (void)dsi_panel_set_pinctrl_state(panel, false);
  316. error_disable_vregs:
  317. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  318. exit:
  319. return rc;
  320. }
  321. static int dsi_panel_power_off(struct dsi_panel *panel)
  322. {
  323. int rc = 0;
  324. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  325. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  326. if (gpio_is_valid(panel->reset_config.reset_gpio) &&
  327. !panel->reset_gpio_always_on)
  328. gpio_set_value(panel->reset_config.reset_gpio, 0);
  329. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  330. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  331. if (gpio_is_valid(panel->panel_test_gpio)) {
  332. rc = gpio_direction_input(panel->panel_test_gpio);
  333. if (rc)
  334. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  335. rc);
  336. }
  337. rc = dsi_panel_set_pinctrl_state(panel, false);
  338. if (rc) {
  339. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  340. rc);
  341. }
  342. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  343. if (rc)
  344. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  345. panel->name, rc);
  346. return rc;
  347. }
  348. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  349. enum dsi_cmd_set_type type)
  350. {
  351. int rc = 0, i = 0;
  352. ssize_t len;
  353. struct dsi_cmd_desc *cmds;
  354. u32 count;
  355. enum dsi_cmd_set_state state;
  356. struct dsi_display_mode *mode;
  357. if (!panel || !panel->cur_mode)
  358. return -EINVAL;
  359. mode = panel->cur_mode;
  360. cmds = mode->priv_info->cmd_sets[type].cmds;
  361. count = mode->priv_info->cmd_sets[type].count;
  362. state = mode->priv_info->cmd_sets[type].state;
  363. SDE_EVT32(type, state, count);
  364. if (count == 0) {
  365. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  366. panel->name, type);
  367. goto error;
  368. }
  369. for (i = 0; i < count; i++) {
  370. cmds->ctrl_flags = 0;
  371. if (state == DSI_CMD_SET_STATE_LP)
  372. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  373. if (type == DSI_CMD_SET_VID_SWITCH_OUT)
  374. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  375. len = dsi_host_transfer_sub(panel->host, cmds);
  376. if (len < 0) {
  377. rc = len;
  378. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  379. goto error;
  380. }
  381. if (cmds->post_wait_ms)
  382. usleep_range(cmds->post_wait_ms*1000,
  383. ((cmds->post_wait_ms*1000)+10));
  384. cmds++;
  385. }
  386. error:
  387. return rc;
  388. }
  389. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  390. {
  391. int rc = 0;
  392. if (panel->host_config.ext_bridge_mode)
  393. return 0;
  394. devm_pinctrl_put(panel->pinctrl.pinctrl);
  395. return rc;
  396. }
  397. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  398. {
  399. int rc = 0;
  400. if (panel->host_config.ext_bridge_mode)
  401. return 0;
  402. /* TODO: pinctrl is defined in dsi dt node */
  403. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  404. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  405. rc = PTR_ERR(panel->pinctrl.pinctrl);
  406. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  407. goto error;
  408. }
  409. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  410. "panel_active");
  411. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  412. rc = PTR_ERR(panel->pinctrl.active);
  413. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  414. goto error;
  415. }
  416. panel->pinctrl.suspend =
  417. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  418. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  419. rc = PTR_ERR(panel->pinctrl.suspend);
  420. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  421. goto error;
  422. }
  423. panel->pinctrl.pwm_pin =
  424. pinctrl_lookup_state(panel->pinctrl.pinctrl, "pwm_pin");
  425. if (IS_ERR_OR_NULL(panel->pinctrl.pwm_pin)) {
  426. panel->pinctrl.pwm_pin = NULL;
  427. DSI_DEBUG("failed to get pinctrl pwm_pin");
  428. }
  429. error:
  430. return rc;
  431. }
  432. static int dsi_panel_wled_register(struct dsi_panel *panel,
  433. struct dsi_backlight_config *bl)
  434. {
  435. struct backlight_device *bd;
  436. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  437. if (!bd) {
  438. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  439. panel->name, -EPROBE_DEFER);
  440. return -EPROBE_DEFER;
  441. }
  442. bl->raw_bd = bd;
  443. return 0;
  444. }
  445. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  446. u32 bl_lvl)
  447. {
  448. int rc = 0;
  449. unsigned long mode_flags = 0;
  450. struct mipi_dsi_device *dsi = NULL;
  451. if (!panel || (bl_lvl > 0xffff)) {
  452. DSI_ERR("invalid params\n");
  453. return -EINVAL;
  454. }
  455. dsi = &panel->mipi_device;
  456. if (unlikely(panel->bl_config.lp_mode)) {
  457. mode_flags = dsi->mode_flags;
  458. dsi->mode_flags |= MIPI_DSI_MODE_LPM;
  459. }
  460. if (panel->bl_config.bl_inverted_dbv)
  461. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  462. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  463. if (rc < 0)
  464. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  465. if (unlikely(panel->bl_config.lp_mode))
  466. dsi->mode_flags = mode_flags;
  467. return rc;
  468. }
  469. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  470. u32 bl_lvl)
  471. {
  472. int rc = 0;
  473. u32 duty = 0;
  474. u32 period_ns = 0;
  475. struct dsi_backlight_config *bl;
  476. if (!panel) {
  477. DSI_ERR("Invalid Params\n");
  478. return -EINVAL;
  479. }
  480. bl = &panel->bl_config;
  481. if (!bl->pwm_bl) {
  482. DSI_ERR("pwm device not found\n");
  483. return -EINVAL;
  484. }
  485. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  486. duty = bl_lvl * period_ns;
  487. duty /= bl->bl_max_level;
  488. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  489. if (rc) {
  490. DSI_ERR("[%s] failed to change pwm config, rc=%d\n", panel->name,
  491. rc);
  492. goto error;
  493. }
  494. if (bl_lvl == 0 && bl->pwm_enabled) {
  495. pwm_disable(bl->pwm_bl);
  496. bl->pwm_enabled = false;
  497. return 0;
  498. }
  499. if (bl_lvl != 0 && !bl->pwm_enabled) {
  500. rc = pwm_enable(bl->pwm_bl);
  501. if (rc) {
  502. DSI_ERR("[%s] failed to enable pwm, rc=%d\n", panel->name,
  503. rc);
  504. goto error;
  505. }
  506. bl->pwm_enabled = true;
  507. }
  508. error:
  509. return rc;
  510. }
  511. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  512. {
  513. int rc = 0;
  514. struct dsi_backlight_config *bl = &panel->bl_config;
  515. if (panel->host_config.ext_bridge_mode)
  516. return 0;
  517. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  518. switch (bl->type) {
  519. case DSI_BACKLIGHT_WLED:
  520. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  521. break;
  522. case DSI_BACKLIGHT_DCS:
  523. rc = dsi_panel_update_backlight(panel, bl_lvl);
  524. break;
  525. case DSI_BACKLIGHT_EXTERNAL:
  526. break;
  527. case DSI_BACKLIGHT_PWM:
  528. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  529. break;
  530. default:
  531. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  532. rc = -ENOTSUPP;
  533. }
  534. return rc;
  535. }
  536. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  537. {
  538. u32 cur_bl_level;
  539. struct backlight_device *bd = bl->raw_bd;
  540. /* default the brightness level to 50% */
  541. cur_bl_level = bl->bl_max_level >> 1;
  542. switch (bl->type) {
  543. case DSI_BACKLIGHT_WLED:
  544. /* Try to query the backlight level from the backlight device */
  545. if (bd->ops && bd->ops->get_brightness)
  546. cur_bl_level = bd->ops->get_brightness(bd);
  547. break;
  548. case DSI_BACKLIGHT_DCS:
  549. case DSI_BACKLIGHT_EXTERNAL:
  550. case DSI_BACKLIGHT_PWM:
  551. default:
  552. /*
  553. * Ideally, we should read the backlight level from the
  554. * panel. For now, just set it default value.
  555. */
  556. break;
  557. }
  558. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  559. return cur_bl_level;
  560. }
  561. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  562. {
  563. struct dsi_backlight_config *bl = &panel->bl_config;
  564. bl->bl_level = dsi_panel_get_brightness(bl);
  565. }
  566. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  567. {
  568. int rc = 0;
  569. struct dsi_backlight_config *bl = &panel->bl_config;
  570. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  571. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  572. rc = PTR_ERR(bl->pwm_bl);
  573. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  574. rc);
  575. return rc;
  576. }
  577. if (panel->pinctrl.pwm_pin) {
  578. rc = pinctrl_select_state(panel->pinctrl.pinctrl,
  579. panel->pinctrl.pwm_pin);
  580. if (rc)
  581. DSI_ERR("[%s] failed to set pwm pinctrl, rc=%d\n",
  582. panel->name, rc);
  583. }
  584. return 0;
  585. }
  586. static int dsi_panel_bl_register(struct dsi_panel *panel)
  587. {
  588. int rc = 0;
  589. struct dsi_backlight_config *bl = &panel->bl_config;
  590. if (panel->host_config.ext_bridge_mode)
  591. return 0;
  592. switch (bl->type) {
  593. case DSI_BACKLIGHT_WLED:
  594. rc = dsi_panel_wled_register(panel, bl);
  595. break;
  596. case DSI_BACKLIGHT_DCS:
  597. break;
  598. case DSI_BACKLIGHT_EXTERNAL:
  599. break;
  600. case DSI_BACKLIGHT_PWM:
  601. rc = dsi_panel_pwm_register(panel);
  602. break;
  603. default:
  604. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  605. rc = -ENOTSUPP;
  606. goto error;
  607. }
  608. error:
  609. return rc;
  610. }
  611. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  612. {
  613. struct dsi_backlight_config *bl = &panel->bl_config;
  614. devm_pwm_put(panel->parent, bl->pwm_bl);
  615. }
  616. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  617. {
  618. int rc = 0;
  619. struct dsi_backlight_config *bl = &panel->bl_config;
  620. if (panel->host_config.ext_bridge_mode)
  621. return 0;
  622. switch (bl->type) {
  623. case DSI_BACKLIGHT_WLED:
  624. break;
  625. case DSI_BACKLIGHT_DCS:
  626. break;
  627. case DSI_BACKLIGHT_EXTERNAL:
  628. break;
  629. case DSI_BACKLIGHT_PWM:
  630. dsi_panel_pwm_unregister(panel);
  631. break;
  632. default:
  633. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  634. rc = -ENOTSUPP;
  635. goto error;
  636. }
  637. error:
  638. return rc;
  639. }
  640. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  641. struct dsi_parser_utils *utils)
  642. {
  643. int rc = 0;
  644. u64 tmp64 = 0;
  645. struct dsi_display_mode *display_mode;
  646. struct dsi_display_mode_priv_info *priv_info;
  647. display_mode = container_of(mode, struct dsi_display_mode, timing);
  648. priv_info = display_mode->priv_info;
  649. rc = utils->read_u64(utils->data,
  650. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  651. if (rc == -EOVERFLOW) {
  652. tmp64 = 0;
  653. rc = utils->read_u32(utils->data,
  654. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  655. }
  656. mode->clk_rate_hz = !rc ? tmp64 : 0;
  657. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  658. mode->pclk_scale.numer = 1;
  659. mode->pclk_scale.denom = 1;
  660. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  661. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  662. &mode->mdp_transfer_time_us);
  663. if (!rc)
  664. display_mode->priv_info->mdp_transfer_time_us =
  665. mode->mdp_transfer_time_us;
  666. else
  667. display_mode->priv_info->mdp_transfer_time_us = 0;
  668. priv_info->disable_rsc_solver = utils->read_bool(utils->data, "qcom,disable-rsc-solver");
  669. rc = utils->read_u32(utils->data,
  670. "qcom,mdss-dsi-panel-framerate",
  671. &mode->refresh_rate);
  672. if (rc) {
  673. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  674. rc);
  675. goto error;
  676. }
  677. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  678. &mode->h_active);
  679. if (rc) {
  680. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  681. rc);
  682. goto error;
  683. }
  684. rc = utils->read_u32(utils->data,
  685. "qcom,mdss-dsi-h-front-porch",
  686. &mode->h_front_porch);
  687. if (rc) {
  688. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  689. rc);
  690. goto error;
  691. }
  692. rc = utils->read_u32(utils->data,
  693. "qcom,mdss-dsi-h-back-porch",
  694. &mode->h_back_porch);
  695. if (rc) {
  696. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  697. rc);
  698. goto error;
  699. }
  700. rc = utils->read_u32(utils->data,
  701. "qcom,mdss-dsi-h-pulse-width",
  702. &mode->h_sync_width);
  703. if (rc) {
  704. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  705. rc);
  706. goto error;
  707. }
  708. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  709. &mode->h_skew);
  710. if (rc)
  711. DSI_DEBUG("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  712. rc);
  713. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  714. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  715. mode->h_sync_width);
  716. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  717. &mode->v_active);
  718. if (rc) {
  719. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  720. rc);
  721. goto error;
  722. }
  723. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  724. &mode->v_back_porch);
  725. if (rc) {
  726. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  727. rc);
  728. goto error;
  729. }
  730. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  731. &mode->v_front_porch);
  732. if (rc) {
  733. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  734. rc);
  735. goto error;
  736. }
  737. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  738. &mode->v_sync_width);
  739. if (rc) {
  740. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  741. rc);
  742. goto error;
  743. }
  744. rc = utils->read_u32(utils->data, "qcom,qsync-mode-min-refresh-rate", &mode->qsync_min_fps);
  745. if (rc) {
  746. DSI_DEBUG("qsync min fps not defined in timing node\n");
  747. rc = 0;
  748. }
  749. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  750. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  751. mode->v_sync_width);
  752. error:
  753. return rc;
  754. }
  755. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  756. struct dsi_parser_utils *utils,
  757. const char *name)
  758. {
  759. int rc = 0;
  760. u32 bpp = 0;
  761. enum dsi_pixel_format fmt;
  762. const char *packing;
  763. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  764. if (rc) {
  765. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  766. name, rc);
  767. return rc;
  768. }
  769. host->bpp = bpp;
  770. switch (bpp) {
  771. case 3:
  772. fmt = DSI_PIXEL_FORMAT_RGB111;
  773. break;
  774. case 8:
  775. fmt = DSI_PIXEL_FORMAT_RGB332;
  776. break;
  777. case 12:
  778. fmt = DSI_PIXEL_FORMAT_RGB444;
  779. break;
  780. case 16:
  781. fmt = DSI_PIXEL_FORMAT_RGB565;
  782. break;
  783. case 18:
  784. fmt = DSI_PIXEL_FORMAT_RGB666;
  785. break;
  786. case 30:
  787. fmt = DSI_PIXEL_FORMAT_RGB101010;
  788. break;
  789. case 24:
  790. default:
  791. fmt = DSI_PIXEL_FORMAT_RGB888;
  792. break;
  793. }
  794. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  795. packing = utils->get_property(utils->data,
  796. "qcom,mdss-dsi-pixel-packing",
  797. NULL);
  798. if (packing && !strcmp(packing, "loose"))
  799. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  800. }
  801. host->dst_format = fmt;
  802. return rc;
  803. }
  804. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  805. struct dsi_parser_utils *utils,
  806. const char *name)
  807. {
  808. int rc = 0;
  809. bool lane_enabled;
  810. u32 num_of_lanes = 0;
  811. lane_enabled = utils->read_bool(utils->data,
  812. "qcom,mdss-dsi-lane-0-state");
  813. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  814. lane_enabled = utils->read_bool(utils->data,
  815. "qcom,mdss-dsi-lane-1-state");
  816. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  817. lane_enabled = utils->read_bool(utils->data,
  818. "qcom,mdss-dsi-lane-2-state");
  819. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  820. lane_enabled = utils->read_bool(utils->data,
  821. "qcom,mdss-dsi-lane-3-state");
  822. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  823. if (host->data_lanes & DSI_DATA_LANE_0)
  824. num_of_lanes++;
  825. if (host->data_lanes & DSI_DATA_LANE_1)
  826. num_of_lanes++;
  827. if (host->data_lanes & DSI_DATA_LANE_2)
  828. num_of_lanes++;
  829. if (host->data_lanes & DSI_DATA_LANE_3)
  830. num_of_lanes++;
  831. host->num_data_lanes = num_of_lanes;
  832. if (host->data_lanes == 0) {
  833. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  834. rc = -EINVAL;
  835. }
  836. return rc;
  837. }
  838. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  839. struct dsi_parser_utils *utils,
  840. const char *name)
  841. {
  842. int rc = 0;
  843. const char *swap_mode;
  844. swap_mode = utils->get_property(utils->data,
  845. "qcom,mdss-dsi-color-order", NULL);
  846. if (swap_mode) {
  847. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  848. host->swap_mode = DSI_COLOR_SWAP_RGB;
  849. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  850. host->swap_mode = DSI_COLOR_SWAP_RBG;
  851. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  852. host->swap_mode = DSI_COLOR_SWAP_BRG;
  853. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  854. host->swap_mode = DSI_COLOR_SWAP_GRB;
  855. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  856. host->swap_mode = DSI_COLOR_SWAP_GBR;
  857. } else {
  858. DSI_ERR("[%s] Unrecognized color order-%s\n",
  859. name, swap_mode);
  860. rc = -EINVAL;
  861. }
  862. } else {
  863. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  864. host->swap_mode = DSI_COLOR_SWAP_RGB;
  865. }
  866. /* bit swap on color channel is not defined in dt */
  867. host->bit_swap_red = false;
  868. host->bit_swap_green = false;
  869. host->bit_swap_blue = false;
  870. return rc;
  871. }
  872. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  873. struct dsi_parser_utils *utils,
  874. const char *name)
  875. {
  876. const char *trig;
  877. int rc = 0;
  878. trig = utils->get_property(utils->data,
  879. "qcom,mdss-dsi-mdp-trigger", NULL);
  880. if (trig) {
  881. if (!strcmp(trig, "none")) {
  882. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  883. } else if (!strcmp(trig, "trigger_te")) {
  884. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  885. } else if (!strcmp(trig, "trigger_sw")) {
  886. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  887. } else if (!strcmp(trig, "trigger_sw_te")) {
  888. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  889. } else {
  890. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  891. name, trig);
  892. rc = -EINVAL;
  893. }
  894. } else {
  895. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  896. name);
  897. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  898. }
  899. trig = utils->get_property(utils->data,
  900. "qcom,mdss-dsi-dma-trigger", NULL);
  901. if (trig) {
  902. if (!strcmp(trig, "none")) {
  903. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  904. } else if (!strcmp(trig, "trigger_te")) {
  905. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  906. } else if (!strcmp(trig, "trigger_sw")) {
  907. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  908. } else if (!strcmp(trig, "trigger_sw_seof")) {
  909. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  910. } else if (!strcmp(trig, "trigger_sw_te")) {
  911. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  912. } else {
  913. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  914. name, trig);
  915. rc = -EINVAL;
  916. }
  917. } else {
  918. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  919. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  920. }
  921. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  922. &host->te_mode);
  923. if (rc) {
  924. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  925. host->te_mode = 1;
  926. rc = 0;
  927. }
  928. return rc;
  929. }
  930. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  931. struct dsi_parser_utils *utils,
  932. const char *name)
  933. {
  934. u32 val = 0, line_no = 0, window = 0;
  935. int rc = 0;
  936. bool panel_cphy_mode = false;
  937. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  938. if (!rc) {
  939. host->t_clk_post = val;
  940. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  941. }
  942. val = 0;
  943. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  944. if (!rc) {
  945. host->t_clk_pre = val;
  946. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  947. }
  948. host->ignore_rx_eot = utils->read_bool(utils->data,
  949. "qcom,mdss-dsi-rx-eot-ignore");
  950. host->append_tx_eot = utils->read_bool(utils->data,
  951. "qcom,mdss-dsi-tx-eot-append");
  952. host->ext_bridge_mode = utils->read_bool(utils->data,
  953. "qcom,mdss-dsi-ext-bridge-mode");
  954. host->force_hs_clk_lane = utils->read_bool(utils->data,
  955. "qcom,mdss-dsi-force-clock-lane-hs");
  956. panel_cphy_mode = utils->read_bool(utils->data,
  957. "qcom,panel-cphy-mode");
  958. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  959. : DSI_PHY_TYPE_DPHY;
  960. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  961. &line_no);
  962. if (rc)
  963. host->dma_sched_line = 0;
  964. else
  965. host->dma_sched_line = line_no;
  966. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-window",
  967. &window);
  968. if (rc)
  969. host->dma_sched_window = 0;
  970. else
  971. host->dma_sched_window = window;
  972. DSI_DEBUG("[%s] DMA scheduling parameters Line: %d Window: %d\n", name,
  973. host->dma_sched_line, host->dma_sched_window);
  974. return 0;
  975. }
  976. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  977. struct dsi_parser_utils *utils,
  978. const char *name)
  979. {
  980. int rc = 0;
  981. u32 val = 0;
  982. bool supported = false;
  983. struct dsi_split_link_config *split_link = &host->split_link;
  984. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  985. if (!supported) {
  986. DSI_DEBUG("[%s] Split link is not supported\n", name);
  987. split_link->enabled = false;
  988. return;
  989. }
  990. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  991. if (rc || val < 1) {
  992. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  993. split_link->num_sublinks = 2;
  994. } else {
  995. split_link->num_sublinks = val;
  996. }
  997. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  998. if (rc || val < 1) {
  999. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  1000. split_link->lanes_per_sublink = 2;
  1001. } else {
  1002. split_link->lanes_per_sublink = val;
  1003. }
  1004. supported = utils->read_bool(utils->data, "qcom,split-link-sublink-swap");
  1005. if (!supported)
  1006. split_link->sublink_swap = false;
  1007. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  1008. split_link->num_sublinks, split_link->lanes_per_sublink);
  1009. split_link->enabled = true;
  1010. }
  1011. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  1012. {
  1013. int rc = 0;
  1014. struct dsi_parser_utils *utils = &panel->utils;
  1015. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  1016. panel->name);
  1017. if (rc) {
  1018. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  1019. panel->name, rc);
  1020. goto error;
  1021. }
  1022. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  1023. panel->name);
  1024. if (rc) {
  1025. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  1026. panel->name, rc);
  1027. goto error;
  1028. }
  1029. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  1030. panel->name);
  1031. if (rc) {
  1032. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  1033. panel->name, rc);
  1034. goto error;
  1035. }
  1036. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  1037. panel->name);
  1038. if (rc) {
  1039. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  1040. panel->name, rc);
  1041. goto error;
  1042. }
  1043. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1044. panel->name);
  1045. if (rc) {
  1046. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  1047. panel->name, rc);
  1048. goto error;
  1049. }
  1050. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1051. panel->name);
  1052. error:
  1053. return rc;
  1054. }
  1055. static int dsi_panel_parse_avr_caps(struct dsi_panel *panel,
  1056. struct device_node *of_node)
  1057. {
  1058. struct dsi_avr_capabilities *avr_caps = &panel->avr_caps;
  1059. struct dsi_parser_utils *utils = &panel->utils;
  1060. int val, rc = 0;
  1061. val = utils->count_u32_elems(utils->data, "qcom,dsi-qsync-avr-step-list");
  1062. if (val <= 0) {
  1063. DSI_DEBUG("[%s] optional avr step list not defined, val:%d\n", panel->name, val);
  1064. return rc;
  1065. } else if (val > 1 && val != panel->dfps_caps.dfps_list_len) {
  1066. DSI_ERR("[%s] avr step list size %d not same as dfps list %d\n",
  1067. val, panel->dfps_caps.dfps_list_len);
  1068. return -EINVAL;
  1069. }
  1070. avr_caps->avr_step_fps_list = kcalloc(val, sizeof(u32), GFP_KERNEL);
  1071. if (!avr_caps->avr_step_fps_list)
  1072. return -ENOMEM;
  1073. rc = utils->read_u32_array(utils->data, "qcom,dsi-qsync-avr-step-list",
  1074. avr_caps->avr_step_fps_list, val);
  1075. if (rc) {
  1076. kfree(avr_caps->avr_step_fps_list);
  1077. return rc;
  1078. }
  1079. avr_caps->avr_step_fps_list_len = val;
  1080. return rc;
  1081. }
  1082. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1083. struct device_node *of_node)
  1084. {
  1085. int rc = 0;
  1086. u32 val = 0, i;
  1087. struct dsi_qsync_capabilities *qsync_caps = &panel->qsync_caps;
  1088. struct dsi_parser_utils *utils = &panel->utils;
  1089. const char *name = panel->name;
  1090. qsync_caps->qsync_support = utils->read_bool(utils->data, "qcom,qsync-enable");
  1091. if (!qsync_caps->qsync_support) {
  1092. DSI_DEBUG("qsync feature not enabled\n");
  1093. goto error;
  1094. }
  1095. /**
  1096. * "mdss-dsi-qsync-min-refresh-rate" is defined in cmd mode and
  1097. * video mode when there is only one qsync min fps present.
  1098. */
  1099. rc = of_property_read_u32(of_node,
  1100. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1101. &val);
  1102. if (rc)
  1103. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1104. panel->name, rc);
  1105. qsync_caps->qsync_min_fps = val;
  1106. /**
  1107. * "dsi-supported-qsync-min-fps-list" may be defined in video
  1108. * mode, only in dfps case when "qcom,dsi-supported-dfps-list"
  1109. * is defined.
  1110. */
  1111. qsync_caps->qsync_min_fps_list_len = utils->count_u32_elems(utils->data,
  1112. "qcom,dsi-supported-qsync-min-fps-list");
  1113. if (qsync_caps->qsync_min_fps_list_len < 1) {
  1114. qsync_caps->qsync_min_fps_list_len = 0;
  1115. goto qsync_support;
  1116. }
  1117. /**
  1118. * qcom,dsi-supported-qsync-min-fps-list cannot be defined
  1119. * along with qcom,mdss-dsi-qsync-min-refresh-rate.
  1120. */
  1121. if (qsync_caps->qsync_min_fps_list_len >= 1 &&
  1122. qsync_caps->qsync_min_fps) {
  1123. DSI_ERR("[%s] Both qsync nodes are defined\n",
  1124. name);
  1125. rc = -EINVAL;
  1126. goto error;
  1127. }
  1128. if (panel->dfps_caps.dfps_list_len !=
  1129. qsync_caps->qsync_min_fps_list_len) {
  1130. DSI_ERR("[%s] Qsync min fps list mismatch with dfps\n", name);
  1131. rc = -EINVAL;
  1132. goto error;
  1133. }
  1134. qsync_caps->qsync_min_fps_list =
  1135. kcalloc(qsync_caps->qsync_min_fps_list_len, sizeof(u32),
  1136. GFP_KERNEL);
  1137. if (!qsync_caps->qsync_min_fps_list) {
  1138. rc = -ENOMEM;
  1139. goto error;
  1140. }
  1141. rc = utils->read_u32_array(utils->data,
  1142. "qcom,dsi-supported-qsync-min-fps-list",
  1143. qsync_caps->qsync_min_fps_list,
  1144. qsync_caps->qsync_min_fps_list_len);
  1145. if (rc) {
  1146. DSI_ERR("[%s] Qsync min fps list parse failed\n", name);
  1147. rc = -EINVAL;
  1148. goto error;
  1149. }
  1150. qsync_caps->qsync_min_fps = qsync_caps->qsync_min_fps_list[0];
  1151. for (i = 1; i < qsync_caps->qsync_min_fps_list_len; i++) {
  1152. if (qsync_caps->qsync_min_fps_list[i] <
  1153. qsync_caps->qsync_min_fps)
  1154. qsync_caps->qsync_min_fps =
  1155. qsync_caps->qsync_min_fps_list[i];
  1156. }
  1157. qsync_support:
  1158. /* allow qsync support only if DFPS is with VFP approach */
  1159. if ((panel->dfps_caps.dfps_support) &&
  1160. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP)) {
  1161. qsync_caps->qsync_support = false;
  1162. qsync_caps->qsync_min_fps = 0;
  1163. }
  1164. error:
  1165. if (rc < 0) {
  1166. qsync_caps->qsync_min_fps = 0;
  1167. qsync_caps->qsync_min_fps_list_len = 0;
  1168. }
  1169. return rc;
  1170. }
  1171. static int dsi_panel_parse_dyn_clk_list(struct dsi_display_mode *mode,
  1172. struct dsi_parser_utils *utils)
  1173. {
  1174. int i, rc = 0;
  1175. struct msm_dyn_clk_list *bit_clk_list;
  1176. if (!mode || !mode->priv_info) {
  1177. DSI_ERR("invalid arguments\n");
  1178. return -EINVAL;
  1179. }
  1180. bit_clk_list = &mode->priv_info->bit_clk_list;
  1181. bit_clk_list->count = utils->count_u32_elems(utils->data, "qcom,dsi-dyn-clk-list");
  1182. if (bit_clk_list->count < 1 || bit_clk_list->count > 100) {
  1183. DSI_ERR("invalid number of bit clock values, must be between 1 and 100\n");
  1184. return -EINVAL;
  1185. }
  1186. bit_clk_list->rates = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1187. if (!bit_clk_list->rates) {
  1188. DSI_ERR("failed to allocate space for bit clock list\n");
  1189. rc = -ENOMEM;
  1190. goto error;
  1191. }
  1192. bit_clk_list->front_porches = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1193. if (!bit_clk_list->front_porches) {
  1194. DSI_ERR("failed to allocate space for front porch list\n");
  1195. rc = -ENOMEM;
  1196. goto error;
  1197. }
  1198. bit_clk_list->pixel_clks_khz = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1199. if (!bit_clk_list->pixel_clks_khz) {
  1200. DSI_ERR("failed to allocate space for pclk list\n");
  1201. rc = -ENOMEM;
  1202. goto error;
  1203. }
  1204. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1205. bit_clk_list->rates, bit_clk_list->count);
  1206. if (rc) {
  1207. DSI_ERR("failed to parse supported bit clk list values, rc=%d\n", rc);
  1208. goto error;
  1209. }
  1210. for (i = 0; i < bit_clk_list->count; i++)
  1211. DSI_DEBUG("bit clk rate[%d]:%d\n", i, bit_clk_list->rates[i]);
  1212. return 0;
  1213. error:
  1214. bit_clk_list->count = 0;
  1215. kfree(bit_clk_list->rates);
  1216. kfree(bit_clk_list->front_porches);
  1217. kfree(bit_clk_list->pixel_clks_khz);
  1218. return rc;
  1219. }
  1220. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1221. {
  1222. int rc = 0;
  1223. bool supported = false;
  1224. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1225. struct dsi_parser_utils *utils = &panel->utils;
  1226. const char *type;
  1227. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1228. if (!supported) {
  1229. dyn_clk_caps->dyn_clk_support = false;
  1230. return rc;
  1231. }
  1232. dyn_clk_caps->dyn_clk_support = true;
  1233. type = utils->get_property(utils->data,
  1234. "qcom,dsi-dyn-clk-type", NULL);
  1235. if (!type) {
  1236. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1237. dyn_clk_caps->maintain_const_fps = false;
  1238. return 0;
  1239. }
  1240. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1241. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1242. dyn_clk_caps->maintain_const_fps = true;
  1243. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1244. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1245. dyn_clk_caps->maintain_const_fps = true;
  1246. } else {
  1247. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1248. dyn_clk_caps->maintain_const_fps = false;
  1249. }
  1250. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1251. return 0;
  1252. }
  1253. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1254. {
  1255. int rc = 0;
  1256. bool supported = false;
  1257. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1258. struct dsi_parser_utils *utils = &panel->utils;
  1259. const char *name = panel->name;
  1260. const char *type;
  1261. u32 i;
  1262. supported = utils->read_bool(utils->data,
  1263. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1264. if (!supported) {
  1265. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1266. dfps_caps->dfps_support = false;
  1267. return rc;
  1268. }
  1269. type = utils->get_property(utils->data,
  1270. "qcom,mdss-dsi-pan-fps-update", NULL);
  1271. if (!type) {
  1272. DSI_ERR("[%s] dfps type not defined\n", name);
  1273. rc = -EINVAL;
  1274. goto error;
  1275. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1276. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1277. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1278. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1279. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1280. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1281. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1282. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1283. } else {
  1284. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1285. rc = -EINVAL;
  1286. goto error;
  1287. }
  1288. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1289. "qcom,dsi-supported-dfps-list");
  1290. if (dfps_caps->dfps_list_len < 1) {
  1291. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1292. rc = -EINVAL;
  1293. goto error;
  1294. }
  1295. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1296. GFP_KERNEL);
  1297. if (!dfps_caps->dfps_list) {
  1298. rc = -ENOMEM;
  1299. goto error;
  1300. }
  1301. rc = utils->read_u32_array(utils->data,
  1302. "qcom,dsi-supported-dfps-list",
  1303. dfps_caps->dfps_list,
  1304. dfps_caps->dfps_list_len);
  1305. if (rc) {
  1306. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1307. rc = -EINVAL;
  1308. goto error;
  1309. }
  1310. dfps_caps->dfps_support = true;
  1311. /* calculate max and min fps */
  1312. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1313. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1314. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1315. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1316. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1317. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1318. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1319. }
  1320. error:
  1321. return rc;
  1322. }
  1323. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1324. struct dsi_parser_utils *utils,
  1325. const char *name)
  1326. {
  1327. int rc = 0;
  1328. const char *traffic_mode;
  1329. u32 vc_id = 0;
  1330. u32 val = 0;
  1331. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1332. if (rc) {
  1333. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1334. cfg->pulse_mode_hsa_he = false;
  1335. } else if (val == 1) {
  1336. cfg->pulse_mode_hsa_he = true;
  1337. } else if (val == 0) {
  1338. cfg->pulse_mode_hsa_he = false;
  1339. } else {
  1340. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1341. name);
  1342. rc = -EINVAL;
  1343. goto error;
  1344. }
  1345. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1346. "qcom,mdss-dsi-hfp-power-mode");
  1347. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1348. "qcom,mdss-dsi-hbp-power-mode");
  1349. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1350. "qcom,mdss-dsi-hsa-power-mode");
  1351. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1352. "qcom,mdss-dsi-last-line-interleave");
  1353. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1354. "qcom,mdss-dsi-bllp-eof-power-mode");
  1355. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1356. "qcom,mdss-dsi-bllp-power-mode");
  1357. traffic_mode = utils->get_property(utils->data,
  1358. "qcom,mdss-dsi-traffic-mode",
  1359. NULL);
  1360. if (!traffic_mode) {
  1361. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1362. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1363. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1364. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1365. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1366. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1367. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1368. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1369. } else {
  1370. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1371. traffic_mode);
  1372. rc = -EINVAL;
  1373. goto error;
  1374. }
  1375. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1376. &vc_id);
  1377. if (rc) {
  1378. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1379. cfg->vc_id = 0;
  1380. } else {
  1381. cfg->vc_id = vc_id;
  1382. }
  1383. error:
  1384. return rc;
  1385. }
  1386. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1387. struct dsi_parser_utils *utils,
  1388. const char *name)
  1389. {
  1390. u32 val = 0;
  1391. int rc = 0;
  1392. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1393. if (rc) {
  1394. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1395. cfg->wr_mem_start = 0x2C;
  1396. } else {
  1397. cfg->wr_mem_start = val;
  1398. }
  1399. val = 0;
  1400. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1401. &val);
  1402. if (rc) {
  1403. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1404. cfg->wr_mem_continue = 0x3C;
  1405. } else {
  1406. cfg->wr_mem_continue = val;
  1407. }
  1408. /* TODO: fix following */
  1409. cfg->max_cmd_packets_interleave = 0;
  1410. val = 0;
  1411. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1412. &val);
  1413. if (rc) {
  1414. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1415. cfg->insert_dcs_command = true;
  1416. } else if (val == 1) {
  1417. cfg->insert_dcs_command = true;
  1418. } else if (val == 0) {
  1419. cfg->insert_dcs_command = false;
  1420. } else {
  1421. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1422. name);
  1423. rc = -EINVAL;
  1424. goto error;
  1425. }
  1426. cfg->mdp_idle_ctrl_en =
  1427. utils->read_bool(utils->data, "qcom,mdss-dsi-mdp-idle-ctrl-en");
  1428. if (cfg->mdp_idle_ctrl_en) {
  1429. val = 0;
  1430. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-mdp-idle-ctrl-len", &val);
  1431. if (rc) {
  1432. DSI_DEBUG("[%s] mdp idle ctrl len is not defined\n", name);
  1433. cfg->mdp_idle_ctrl_len = 0;
  1434. cfg->mdp_idle_ctrl_en = false;
  1435. rc = 0;
  1436. } else {
  1437. cfg->mdp_idle_ctrl_len = val;
  1438. }
  1439. }
  1440. error:
  1441. return rc;
  1442. }
  1443. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1444. {
  1445. int rc = 0;
  1446. struct dsi_parser_utils *utils = &panel->utils;
  1447. bool panel_mode_switch_enabled;
  1448. enum dsi_op_mode panel_mode;
  1449. const char *mode;
  1450. mode = utils->get_property(utils->data,
  1451. "qcom,mdss-dsi-panel-type", NULL);
  1452. if (!mode) {
  1453. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1454. panel_mode = DSI_OP_VIDEO_MODE;
  1455. } else if (!strcmp(mode, "dsi_video_mode")) {
  1456. panel_mode = DSI_OP_VIDEO_MODE;
  1457. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1458. panel_mode = DSI_OP_CMD_MODE;
  1459. } else {
  1460. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1461. rc = -EINVAL;
  1462. goto error;
  1463. }
  1464. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1465. "qcom,mdss-dsi-panel-mode-switch");
  1466. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1467. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1468. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1469. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1470. utils,
  1471. panel->name);
  1472. if (rc) {
  1473. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1474. panel->name, rc);
  1475. goto error;
  1476. }
  1477. }
  1478. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1479. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1480. utils,
  1481. panel->name);
  1482. if (rc) {
  1483. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1484. panel->name, rc);
  1485. goto error;
  1486. }
  1487. }
  1488. panel->poms_align_vsync = utils->read_bool(utils->data,
  1489. "qcom,poms-align-panel-vsync");
  1490. panel->panel_mode = panel_mode;
  1491. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1492. error:
  1493. return rc;
  1494. }
  1495. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1496. {
  1497. int rc = 0;
  1498. u32 val = 0;
  1499. const char *str;
  1500. struct dsi_panel_phy_props *props = &panel->phy_props;
  1501. struct dsi_parser_utils *utils = &panel->utils;
  1502. const char *name = panel->name;
  1503. rc = utils->read_u32(utils->data,
  1504. "qcom,mdss-pan-physical-width-dimension", &val);
  1505. if (rc) {
  1506. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1507. props->panel_width_mm = 0;
  1508. rc = 0;
  1509. } else {
  1510. props->panel_width_mm = val;
  1511. }
  1512. rc = utils->read_u32(utils->data,
  1513. "qcom,mdss-pan-physical-height-dimension",
  1514. &val);
  1515. if (rc) {
  1516. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1517. props->panel_height_mm = 0;
  1518. rc = 0;
  1519. } else {
  1520. props->panel_height_mm = val;
  1521. }
  1522. str = utils->get_property(utils->data,
  1523. "qcom,mdss-dsi-panel-orientation", NULL);
  1524. if (!str) {
  1525. props->rotation = DSI_PANEL_ROTATE_NONE;
  1526. } else if (!strcmp(str, "180")) {
  1527. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1528. } else if (!strcmp(str, "hflip")) {
  1529. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1530. } else if (!strcmp(str, "vflip")) {
  1531. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1532. } else {
  1533. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1534. rc = -EINVAL;
  1535. goto error;
  1536. }
  1537. error:
  1538. return rc;
  1539. }
  1540. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1541. "qcom,mdss-dsi-pre-on-command",
  1542. "qcom,mdss-dsi-on-command",
  1543. "qcom,vid-on-commands",
  1544. "qcom,cmd-on-commands",
  1545. "qcom,mdss-dsi-post-panel-on-command",
  1546. "qcom,mdss-dsi-pre-off-command",
  1547. "qcom,mdss-dsi-off-command",
  1548. "qcom,mdss-dsi-post-off-command",
  1549. "qcom,mdss-dsi-pre-res-switch",
  1550. "qcom,mdss-dsi-res-switch",
  1551. "qcom,mdss-dsi-post-res-switch",
  1552. "qcom,video-mode-switch-in-commands",
  1553. "qcom,video-mode-switch-out-commands",
  1554. "qcom,cmd-mode-switch-in-commands",
  1555. "qcom,cmd-mode-switch-out-commands",
  1556. "qcom,mdss-dsi-panel-status-command",
  1557. "qcom,mdss-dsi-lp1-command",
  1558. "qcom,mdss-dsi-lp2-command",
  1559. "qcom,mdss-dsi-nolp-command",
  1560. "PPS not parsed from DTSI, generated dynamically",
  1561. "ROI not parsed from DTSI, generated dynamically",
  1562. "qcom,mdss-dsi-timing-switch-command",
  1563. "qcom,mdss-dsi-post-mode-switch-on-command",
  1564. "qcom,mdss-dsi-qsync-on-commands",
  1565. "qcom,mdss-dsi-qsync-off-commands",
  1566. };
  1567. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1568. "qcom,mdss-dsi-pre-on-command-state",
  1569. "qcom,mdss-dsi-on-command-state",
  1570. "qcom,vid-on-commands-state",
  1571. "qcom,cmd-on-commands-state",
  1572. "qcom,mdss-dsi-post-on-command-state",
  1573. "qcom,mdss-dsi-pre-off-command-state",
  1574. "qcom,mdss-dsi-off-command-state",
  1575. "qcom,mdss-dsi-post-off-command-state",
  1576. "qcom,mdss-dsi-pre-res-switch-state",
  1577. "qcom,mdss-dsi-res-switch-state",
  1578. "qcom,mdss-dsi-post-res-switch-state",
  1579. "qcom,video-mode-switch-in-commands-state",
  1580. "qcom,video-mode-switch-out-commands-state",
  1581. "qcom,cmd-mode-switch-in-commands-state",
  1582. "qcom,cmd-mode-switch-out-commands-state",
  1583. "qcom,mdss-dsi-panel-status-command-state",
  1584. "qcom,mdss-dsi-lp1-command-state",
  1585. "qcom,mdss-dsi-lp2-command-state",
  1586. "qcom,mdss-dsi-nolp-command-state",
  1587. "PPS not parsed from DTSI, generated dynamically",
  1588. "ROI not parsed from DTSI, generated dynamically",
  1589. "qcom,mdss-dsi-timing-switch-command-state",
  1590. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1591. "qcom,mdss-dsi-qsync-on-commands-state",
  1592. "qcom,mdss-dsi-qsync-off-commands-state",
  1593. };
  1594. int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1595. {
  1596. const u32 cmd_set_min_size = 7;
  1597. u32 count = 0;
  1598. u32 packet_length;
  1599. u32 tmp;
  1600. while (length >= cmd_set_min_size) {
  1601. packet_length = cmd_set_min_size;
  1602. tmp = ((data[5] << 8) | (data[6]));
  1603. packet_length += tmp;
  1604. if (packet_length > length) {
  1605. DSI_ERR("format error\n");
  1606. return -EINVAL;
  1607. }
  1608. length -= packet_length;
  1609. data += packet_length;
  1610. count++;
  1611. }
  1612. *cnt = count;
  1613. return 0;
  1614. }
  1615. int dsi_panel_create_cmd_packets(const char *data,
  1616. u32 length,
  1617. u32 count,
  1618. struct dsi_cmd_desc *cmd)
  1619. {
  1620. int rc = 0;
  1621. int i, j;
  1622. u8 *payload;
  1623. for (i = 0; i < count; i++) {
  1624. u32 size;
  1625. cmd[i].msg.type = data[0];
  1626. cmd[i].msg.channel = data[2];
  1627. cmd[i].msg.flags |= data[3];
  1628. cmd[i].ctrl = 0;
  1629. cmd[i].post_wait_ms = data[4];
  1630. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1631. if (cmd[i].msg.flags & MIPI_DSI_MSG_BATCH_COMMAND)
  1632. cmd[i].last_command = false;
  1633. else
  1634. cmd[i].last_command = true;
  1635. size = cmd[i].msg.tx_len * sizeof(u8);
  1636. payload = kzalloc(size, GFP_KERNEL);
  1637. if (!payload) {
  1638. rc = -ENOMEM;
  1639. goto error_free_payloads;
  1640. }
  1641. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1642. payload[j] = data[7 + j];
  1643. cmd[i].msg.tx_buf = payload;
  1644. data += (7 + cmd[i].msg.tx_len);
  1645. }
  1646. return rc;
  1647. error_free_payloads:
  1648. for (i = i - 1; i >= 0; i--) {
  1649. cmd--;
  1650. kfree(cmd->msg.tx_buf);
  1651. }
  1652. return rc;
  1653. }
  1654. void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1655. {
  1656. u32 i = 0;
  1657. struct dsi_cmd_desc *cmd;
  1658. for (i = 0; i < set->count; i++) {
  1659. cmd = &set->cmds[i];
  1660. kfree(cmd->msg.tx_buf);
  1661. }
  1662. }
  1663. void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1664. {
  1665. kfree(set->cmds);
  1666. }
  1667. int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1668. u32 packet_count)
  1669. {
  1670. u32 size;
  1671. size = packet_count * sizeof(*cmd->cmds);
  1672. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1673. if (!cmd->cmds)
  1674. return -ENOMEM;
  1675. cmd->count = packet_count;
  1676. return 0;
  1677. }
  1678. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1679. enum dsi_cmd_set_type type,
  1680. struct dsi_parser_utils *utils)
  1681. {
  1682. int rc = 0;
  1683. u32 length = 0;
  1684. const char *data;
  1685. const char *state;
  1686. u32 packet_count = 0;
  1687. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1688. &length);
  1689. if (!data) {
  1690. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1691. rc = -ENOTSUPP;
  1692. goto error;
  1693. }
  1694. DSI_DEBUG("type=%d, name=%s, length=%d\n", type, cmd_set_prop_map[type], length);
  1695. print_hex_dump_debug("", DUMP_PREFIX_NONE, 8, 1, data, length, false);
  1696. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1697. if (rc) {
  1698. DSI_ERR("commands failed, rc=%d\n", rc);
  1699. goto error;
  1700. }
  1701. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1702. packet_count, length);
  1703. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1704. if (rc) {
  1705. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1706. goto error;
  1707. }
  1708. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1709. cmd->cmds);
  1710. if (rc) {
  1711. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1712. goto error_free_mem;
  1713. }
  1714. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1715. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1716. cmd->state = DSI_CMD_SET_STATE_LP;
  1717. } else if (!strcmp(state, "dsi_hs_mode")) {
  1718. cmd->state = DSI_CMD_SET_STATE_HS;
  1719. } else {
  1720. DSI_ERR("[%s] command state unrecognized-%s\n",
  1721. cmd_set_state_map[type], state);
  1722. goto error_free_mem;
  1723. }
  1724. return rc;
  1725. error_free_mem:
  1726. kfree(cmd->cmds);
  1727. cmd->cmds = NULL;
  1728. error:
  1729. return rc;
  1730. }
  1731. static int dsi_panel_parse_cmd_sets(
  1732. struct dsi_display_mode_priv_info *priv_info,
  1733. struct dsi_parser_utils *utils)
  1734. {
  1735. int rc = 0;
  1736. struct dsi_panel_cmd_set *set;
  1737. u32 i;
  1738. if (!priv_info) {
  1739. DSI_ERR("invalid mode priv info\n");
  1740. return -EINVAL;
  1741. }
  1742. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1743. set = &priv_info->cmd_sets[i];
  1744. set->type = i;
  1745. set->count = 0;
  1746. if (i == DSI_CMD_SET_PPS) {
  1747. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1748. if (rc)
  1749. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1750. i, rc);
  1751. set->state = DSI_CMD_SET_STATE_LP;
  1752. } else {
  1753. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1754. if (rc)
  1755. DSI_DEBUG("failed to parse set %d\n", i);
  1756. }
  1757. }
  1758. rc = 0;
  1759. return rc;
  1760. }
  1761. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1762. {
  1763. int rc = 0;
  1764. int i;
  1765. u32 length = 0;
  1766. u32 count = 0;
  1767. u32 size = 0;
  1768. u32 *arr_32 = NULL;
  1769. const u32 *arr;
  1770. struct dsi_parser_utils *utils = &panel->utils;
  1771. struct dsi_reset_seq *seq;
  1772. if (panel->host_config.ext_bridge_mode)
  1773. return 0;
  1774. arr = utils->get_property(utils->data,
  1775. "qcom,mdss-dsi-reset-sequence", &length);
  1776. if (!arr) {
  1777. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1778. rc = -EINVAL;
  1779. goto error;
  1780. }
  1781. if (length & 0x1) {
  1782. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1783. panel->name);
  1784. rc = -EINVAL;
  1785. goto error;
  1786. }
  1787. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1788. length = length / sizeof(u32);
  1789. size = length * sizeof(u32);
  1790. arr_32 = kzalloc(size, GFP_KERNEL);
  1791. if (!arr_32) {
  1792. rc = -ENOMEM;
  1793. goto error;
  1794. }
  1795. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1796. arr_32, length);
  1797. if (rc) {
  1798. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1799. goto error_free_arr_32;
  1800. }
  1801. count = length / 2;
  1802. size = count * sizeof(*seq);
  1803. seq = kzalloc(size, GFP_KERNEL);
  1804. if (!seq) {
  1805. rc = -ENOMEM;
  1806. goto error_free_arr_32;
  1807. }
  1808. panel->reset_config.sequence = seq;
  1809. panel->reset_config.count = count;
  1810. for (i = 0; i < length; i += 2) {
  1811. seq->level = arr_32[i];
  1812. seq->sleep_ms = arr_32[i + 1];
  1813. seq++;
  1814. }
  1815. error_free_arr_32:
  1816. kfree(arr_32);
  1817. error:
  1818. return rc;
  1819. }
  1820. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1821. {
  1822. struct dsi_parser_utils *utils = &panel->utils;
  1823. const char *string;
  1824. int i, rc = 0;
  1825. panel->ulps_feature_enabled =
  1826. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1827. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1828. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1829. panel->ulps_suspend_enabled =
  1830. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1831. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1832. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1833. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1834. "qcom,mdss-dsi-te-using-wd");
  1835. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1836. "qcom,cmd-sync-wait-broadcast");
  1837. panel->lp11_init = utils->read_bool(utils->data,
  1838. "qcom,mdss-dsi-lp11-init");
  1839. panel->reset_gpio_always_on = utils->read_bool(utils->data,
  1840. "qcom,platform-reset-gpio-always-on");
  1841. panel->spr_info.enable = false;
  1842. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1843. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1844. if (!rc) {
  1845. // find match for pack-type string
  1846. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1847. if (msm_spr_pack_type_str[i] &&
  1848. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1849. panel->spr_info.enable = true;
  1850. panel->spr_info.pack_type = i;
  1851. break;
  1852. }
  1853. }
  1854. }
  1855. pr_debug("%s source side spr packing, pack-type %s\n",
  1856. panel->spr_info.enable ? "enable" : "disable",
  1857. panel->spr_info.enable ?
  1858. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1859. return 0;
  1860. }
  1861. static int dsi_panel_parse_jitter_config(
  1862. struct dsi_display_mode *mode,
  1863. struct dsi_parser_utils *utils)
  1864. {
  1865. int rc;
  1866. struct dsi_display_mode_priv_info *priv_info;
  1867. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1868. u64 jitter_val = 0;
  1869. priv_info = mode->priv_info;
  1870. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1871. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1872. if (rc) {
  1873. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1874. } else {
  1875. jitter_val = jitter[0];
  1876. jitter_val = div_u64(jitter_val, jitter[1]);
  1877. }
  1878. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1879. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1880. priv_info->panel_jitter_denom =
  1881. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1882. } else {
  1883. priv_info->panel_jitter_numer = jitter[0];
  1884. priv_info->panel_jitter_denom = jitter[1];
  1885. }
  1886. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1887. &priv_info->panel_prefill_lines);
  1888. if (rc) {
  1889. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1890. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1891. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1892. } else if (priv_info->panel_prefill_lines >=
  1893. DSI_V_TOTAL(&mode->timing)) {
  1894. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1895. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1896. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1897. }
  1898. return 0;
  1899. }
  1900. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1901. {
  1902. int rc = 0;
  1903. char *supply_name;
  1904. if (panel->host_config.ext_bridge_mode)
  1905. return 0;
  1906. if (!strcmp(panel->type, "primary"))
  1907. supply_name = "qcom,panel-supply-entries";
  1908. else
  1909. supply_name = "qcom,panel-sec-supply-entries";
  1910. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1911. &panel->power_info, supply_name);
  1912. if (rc) {
  1913. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1914. goto error;
  1915. }
  1916. error:
  1917. return rc;
  1918. }
  1919. int dsi_panel_get_io_resources(struct dsi_panel *panel,
  1920. struct msm_io_res *io_res)
  1921. {
  1922. struct dsi_parser_utils *utils = &panel->utils;
  1923. struct list_head *mem_list = &io_res->mem;
  1924. int reset_gpio;
  1925. int rc = 0;
  1926. reset_gpio = utils->get_named_gpio(utils->data,
  1927. "qcom,platform-reset-gpio", 0);
  1928. if (gpio_is_valid(reset_gpio)) {
  1929. rc = msm_dss_get_gpio_io_mem(reset_gpio, mem_list);
  1930. if (rc) {
  1931. DSI_ERR("[%s] failed to retrieve the reset gpio address\n", panel->name);
  1932. goto end;
  1933. }
  1934. }
  1935. end:
  1936. return rc;
  1937. }
  1938. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1939. {
  1940. int rc = 0;
  1941. const char *data;
  1942. struct dsi_parser_utils *utils = &panel->utils;
  1943. char *reset_gpio_name, *mode_set_gpio_name;
  1944. if (!strcmp(panel->type, "primary")) {
  1945. reset_gpio_name = "qcom,platform-reset-gpio";
  1946. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1947. } else {
  1948. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1949. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1950. }
  1951. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1952. reset_gpio_name, 0);
  1953. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1954. !panel->host_config.ext_bridge_mode) {
  1955. DSI_DEBUG("[%s] reset gpio not set, rc=%d\n", panel->name,
  1956. panel->reset_config.reset_gpio);
  1957. }
  1958. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1959. "qcom,5v-boost-gpio",
  1960. 0);
  1961. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1962. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1963. panel->name, rc);
  1964. panel->reset_config.disp_en_gpio =
  1965. utils->get_named_gpio(utils->data,
  1966. "qcom,platform-en-gpio", 0);
  1967. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1968. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1969. panel->name, rc);
  1970. }
  1971. }
  1972. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1973. utils->data, mode_set_gpio_name, 0);
  1974. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1975. DSI_DEBUG("mode gpio not specified\n");
  1976. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1977. data = utils->get_property(utils->data,
  1978. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1979. if (data) {
  1980. if (!strcmp(data, "single_port"))
  1981. panel->reset_config.mode_sel_state =
  1982. MODE_SEL_SINGLE_PORT;
  1983. else if (!strcmp(data, "dual_port"))
  1984. panel->reset_config.mode_sel_state =
  1985. MODE_SEL_DUAL_PORT;
  1986. else if (!strcmp(data, "high"))
  1987. panel->reset_config.mode_sel_state =
  1988. MODE_GPIO_HIGH;
  1989. else if (!strcmp(data, "low"))
  1990. panel->reset_config.mode_sel_state =
  1991. MODE_GPIO_LOW;
  1992. } else {
  1993. /* Set default mode as SPLIT mode */
  1994. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1995. }
  1996. /* TODO: release memory */
  1997. rc = dsi_panel_parse_reset_sequence(panel);
  1998. if (rc) {
  1999. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  2000. panel->name, rc);
  2001. goto error;
  2002. }
  2003. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  2004. "qcom,mdss-dsi-panel-test-pin",
  2005. 0);
  2006. if (!gpio_is_valid(panel->panel_test_gpio))
  2007. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  2008. __LINE__);
  2009. error:
  2010. return rc;
  2011. }
  2012. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  2013. {
  2014. int rc = 0;
  2015. u32 val;
  2016. struct dsi_backlight_config *config = &panel->bl_config;
  2017. struct dsi_parser_utils *utils = &panel->utils;
  2018. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  2019. &val);
  2020. if (rc) {
  2021. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  2022. goto error;
  2023. }
  2024. config->pwm_period_usecs = val;
  2025. error:
  2026. return rc;
  2027. }
  2028. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  2029. {
  2030. int rc = 0;
  2031. u32 val = 0;
  2032. const char *bl_type = NULL;
  2033. const char *data = NULL;
  2034. const char *state = NULL;
  2035. struct dsi_parser_utils *utils = &panel->utils;
  2036. char *bl_name = NULL;
  2037. if (!strcmp(panel->type, "primary"))
  2038. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  2039. else
  2040. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  2041. bl_type = utils->get_property(utils->data, bl_name, NULL);
  2042. if (!bl_type) {
  2043. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2044. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  2045. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  2046. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  2047. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  2048. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  2049. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  2050. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  2051. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  2052. } else {
  2053. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  2054. panel->name, bl_type);
  2055. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2056. }
  2057. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  2058. if (!data) {
  2059. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2060. } else if (!strcmp(data, "delay_until_first_frame")) {
  2061. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  2062. } else {
  2063. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  2064. panel->name, data);
  2065. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2066. }
  2067. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  2068. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  2069. panel->bl_config.dimming_min_bl = 0;
  2070. panel->bl_config.dimming_status = DIMMING_ENABLE;
  2071. panel->bl_config.user_disable_notification = false;
  2072. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  2073. if (rc) {
  2074. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  2075. panel->name);
  2076. panel->bl_config.bl_min_level = 0;
  2077. } else {
  2078. panel->bl_config.bl_min_level = val;
  2079. }
  2080. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  2081. if (rc) {
  2082. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  2083. panel->name);
  2084. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  2085. } else {
  2086. panel->bl_config.bl_max_level = val;
  2087. }
  2088. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  2089. &val);
  2090. if (rc) {
  2091. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  2092. panel->name);
  2093. panel->bl_config.brightness_max_level = 255;
  2094. rc = 0;
  2095. } else {
  2096. panel->bl_config.brightness_max_level = val;
  2097. }
  2098. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  2099. "qcom,mdss-dsi-bl-inverted-dbv");
  2100. state = utils->get_property(utils->data, "qcom,bl-dsc-cmd-state", NULL);
  2101. if (!state || !strcmp(state, "dsi_hs_mode"))
  2102. panel->bl_config.lp_mode = false;
  2103. else if (!strcmp(state, "dsi_lp_mode"))
  2104. panel->bl_config.lp_mode = true;
  2105. else
  2106. DSI_ERR("bl-dsc-cmd-state command state unrecognized-%s\n",
  2107. state);
  2108. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  2109. rc = dsi_panel_parse_bl_pwm_config(panel);
  2110. if (rc) {
  2111. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  2112. panel->name, rc);
  2113. goto error;
  2114. }
  2115. }
  2116. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  2117. "qcom,platform-bklight-en-gpio",
  2118. 0);
  2119. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  2120. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  2121. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2122. panel->name, rc);
  2123. rc = -EPROBE_DEFER;
  2124. goto error;
  2125. } else {
  2126. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2127. panel->name, rc);
  2128. rc = 0;
  2129. goto error;
  2130. }
  2131. }
  2132. error:
  2133. return rc;
  2134. }
  2135. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  2136. struct dsi_parser_utils *utils)
  2137. {
  2138. const char *data;
  2139. u32 len, i;
  2140. int rc = 0;
  2141. struct dsi_display_mode_priv_info *priv_info;
  2142. u64 pixel_clk_khz;
  2143. if (!mode || !mode->priv_info)
  2144. return -EINVAL;
  2145. priv_info = mode->priv_info;
  2146. data = utils->get_property(utils->data,
  2147. "qcom,mdss-dsi-panel-phy-timings", &len);
  2148. if (!data) {
  2149. DSI_DEBUG("Unable to read Phy timing settings\n");
  2150. } else {
  2151. priv_info->phy_timing_val =
  2152. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2153. if (!priv_info->phy_timing_val)
  2154. return -EINVAL;
  2155. for (i = 0; i < len; i++)
  2156. priv_info->phy_timing_val[i] = data[i];
  2157. priv_info->phy_timing_len = len;
  2158. }
  2159. if (mode->panel_mode_caps & DSI_OP_VIDEO_MODE) {
  2160. /*
  2161. * For command mode we update the pclk as part of
  2162. * function dsi_panel_calc_dsi_transfer_time( )
  2163. * as we set it based on dsi clock or mdp transfer time.
  2164. */
  2165. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  2166. DSI_V_TOTAL(&mode->timing) *
  2167. mode->timing.refresh_rate);
  2168. do_div(pixel_clk_khz, 1000);
  2169. mode->pixel_clk_khz = pixel_clk_khz;
  2170. }
  2171. return rc;
  2172. }
  2173. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2174. struct dsi_parser_utils *utils)
  2175. {
  2176. u32 data;
  2177. int rc = -EINVAL;
  2178. int intf_width;
  2179. const char *compression;
  2180. struct dsi_display_mode_priv_info *priv_info;
  2181. if (!mode || !mode->priv_info)
  2182. return -EINVAL;
  2183. priv_info = mode->priv_info;
  2184. priv_info->dsc_enabled = false;
  2185. compression = utils->get_property(utils->data,
  2186. "qcom,compression-mode", NULL);
  2187. if (compression && !strcmp(compression, "dsc"))
  2188. priv_info->dsc_enabled = true;
  2189. if (!priv_info->dsc_enabled) {
  2190. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  2191. return 0;
  2192. }
  2193. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2194. if (rc) {
  2195. priv_info->dsc.config.dsc_version_major = 0x1;
  2196. priv_info->dsc.config.dsc_version_minor = 0x1;
  2197. rc = 0;
  2198. } else {
  2199. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2200. * major version information
  2201. */
  2202. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  2203. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  2204. if ((priv_info->dsc.config.dsc_version_major != 0x1) ||
  2205. ((priv_info->dsc.config.dsc_version_minor
  2206. != 0x1) &&
  2207. (priv_info->dsc.config.dsc_version_minor
  2208. != 0x2))) {
  2209. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2210. __func__,
  2211. priv_info->dsc.config.dsc_version_major,
  2212. priv_info->dsc.config.dsc_version_minor
  2213. );
  2214. rc = -EINVAL;
  2215. goto error;
  2216. }
  2217. }
  2218. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2219. if (rc) {
  2220. priv_info->dsc.scr_rev = 0x0;
  2221. rc = 0;
  2222. } else {
  2223. priv_info->dsc.scr_rev = data & 0xff;
  2224. /* only one scr rev supported */
  2225. if (priv_info->dsc.scr_rev > 0x1) {
  2226. DSI_ERR("%s: DSC scr version:%d not supported\n",
  2227. __func__, priv_info->dsc.scr_rev);
  2228. rc = -EINVAL;
  2229. goto error;
  2230. }
  2231. }
  2232. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2233. if (rc) {
  2234. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  2235. goto error;
  2236. }
  2237. priv_info->dsc.config.slice_height = data;
  2238. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2239. if (rc) {
  2240. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2241. goto error;
  2242. }
  2243. priv_info->dsc.config.slice_width = data;
  2244. intf_width = mode->timing.h_active;
  2245. if (intf_width % priv_info->dsc.config.slice_width) {
  2246. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2247. intf_width, priv_info->dsc.config.slice_width);
  2248. rc = -EINVAL;
  2249. goto error;
  2250. }
  2251. priv_info->dsc.config.pic_width = mode->timing.h_active;
  2252. priv_info->dsc.config.pic_height = mode->timing.v_active;
  2253. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2254. if (rc) {
  2255. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2256. goto error;
  2257. } else if (!data || (data > 2)) {
  2258. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2259. goto error;
  2260. }
  2261. priv_info->dsc.slice_per_pkt = data;
  2262. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2263. &data);
  2264. if (rc) {
  2265. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2266. goto error;
  2267. }
  2268. priv_info->dsc.config.bits_per_component = data;
  2269. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2270. if (rc) {
  2271. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2272. data = 0;
  2273. }
  2274. priv_info->dsc.pps_delay_ms = data;
  2275. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2276. &data);
  2277. if (rc) {
  2278. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2279. goto error;
  2280. }
  2281. priv_info->dsc.config.bits_per_pixel = data << 4;
  2282. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2283. &data);
  2284. if (rc) {
  2285. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2286. rc = 0;
  2287. data = MSM_CHROMA_444;
  2288. } else if (data == MSM_CHROMA_422) {
  2289. priv_info->dsc.config.native_422 = 1;
  2290. } else if (data == MSM_CHROMA_420) {
  2291. priv_info->dsc.config.native_420 = 1;
  2292. }
  2293. priv_info->dsc.chroma_format = data;
  2294. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2295. &data);
  2296. if (rc) {
  2297. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2298. rc = 0;
  2299. data = MSM_RGB;
  2300. }
  2301. priv_info->dsc.source_color_space = data;
  2302. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2303. "qcom,mdss-dsc-block-prediction-enable");
  2304. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2305. priv_info->dsc.config.slice_width);
  2306. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2307. priv_info->dsc.scr_rev);
  2308. if (rc) {
  2309. DSI_DEBUG("failed populating dsc params\n");
  2310. rc = -EINVAL;
  2311. goto error;
  2312. }
  2313. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2314. if (rc) {
  2315. DSI_DEBUG("failed populating other dsc params\n");
  2316. rc = -EINVAL;
  2317. goto error;
  2318. }
  2319. priv_info->pclk_scale.numer =
  2320. priv_info->dsc.config.bits_per_pixel >> 4;
  2321. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2322. priv_info->dsc.chroma_format,
  2323. priv_info->dsc.config.bits_per_component);
  2324. mode->timing.dsc_enabled = true;
  2325. mode->timing.dsc = &priv_info->dsc;
  2326. mode->timing.pclk_scale = priv_info->pclk_scale;
  2327. error:
  2328. return rc;
  2329. }
  2330. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2331. struct dsi_parser_utils *utils, int traffic_mode)
  2332. {
  2333. u32 data;
  2334. int rc = -EINVAL;
  2335. const char *compression;
  2336. struct dsi_display_mode_priv_info *priv_info;
  2337. int intf_width;
  2338. if (!mode || !mode->priv_info)
  2339. return -EINVAL;
  2340. priv_info = mode->priv_info;
  2341. priv_info->vdc_enabled = false;
  2342. compression = utils->get_property(utils->data,
  2343. "qcom,compression-mode", NULL);
  2344. if (compression && !strcmp(compression, "vdc"))
  2345. priv_info->vdc_enabled = true;
  2346. if (!priv_info->vdc_enabled) {
  2347. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2348. return 0;
  2349. }
  2350. priv_info->vdc.traffic_mode = traffic_mode;
  2351. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2352. if (rc) {
  2353. priv_info->vdc.version_major = 0x1;
  2354. priv_info->vdc.version_minor = 0x2;
  2355. priv_info->vdc.version_release = 0x0;
  2356. rc = 0;
  2357. } else {
  2358. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2359. * major version information
  2360. */
  2361. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2362. priv_info->vdc.version_minor = data & 0x0F;
  2363. if ((priv_info->vdc.version_major != 0x1) &&
  2364. ((priv_info->vdc.version_minor
  2365. != 0x2))) {
  2366. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2367. __func__,
  2368. priv_info->vdc.version_major,
  2369. priv_info->vdc.version_minor
  2370. );
  2371. rc = -EINVAL;
  2372. goto error;
  2373. }
  2374. }
  2375. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2376. if (rc) {
  2377. priv_info->vdc.version_release = 0x0;
  2378. rc = 0;
  2379. } else {
  2380. priv_info->vdc.version_release = data & 0xff;
  2381. /* only one release version is supported */
  2382. if (priv_info->vdc.version_release != 0x0) {
  2383. DSI_ERR("unsupported vdc release version %d\n",
  2384. priv_info->vdc.version_release);
  2385. rc = -EINVAL;
  2386. goto error;
  2387. }
  2388. }
  2389. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2390. priv_info->vdc.version_major,
  2391. priv_info->vdc.version_minor,
  2392. priv_info->vdc.version_release);
  2393. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2394. if (rc) {
  2395. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2396. goto error;
  2397. }
  2398. priv_info->vdc.slice_height = data;
  2399. /* slice height should be atleast 16 lines */
  2400. if (priv_info->vdc.slice_height < 16) {
  2401. DSI_ERR("invalid slice height %d\n",
  2402. priv_info->vdc.slice_height);
  2403. rc = -EINVAL;
  2404. goto error;
  2405. }
  2406. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2407. if (rc) {
  2408. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2409. goto error;
  2410. }
  2411. priv_info->vdc.slice_width = data;
  2412. /*
  2413. * slide-width should be multiple of 8
  2414. * slice-width should be atlease 64 pixels
  2415. */
  2416. if ((priv_info->vdc.slice_width & 7) ||
  2417. (priv_info->vdc.slice_width < 64)) {
  2418. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2419. rc = -EINVAL;
  2420. goto error;
  2421. }
  2422. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2423. if (rc) {
  2424. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2425. goto error;
  2426. } else if (!data || (data > 2)) {
  2427. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2428. rc = -EINVAL;
  2429. goto error;
  2430. }
  2431. intf_width = mode->timing.h_active;
  2432. priv_info->vdc.slice_per_pkt = data;
  2433. priv_info->vdc.frame_width = mode->timing.h_active;
  2434. priv_info->vdc.frame_height = mode->timing.v_active;
  2435. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2436. &data);
  2437. if (rc) {
  2438. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2439. goto error;
  2440. }
  2441. priv_info->vdc.bits_per_component = data;
  2442. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2443. if (rc) {
  2444. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2445. data = 0;
  2446. }
  2447. priv_info->vdc.pps_delay_ms = data;
  2448. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2449. &data);
  2450. if (rc) {
  2451. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2452. goto error;
  2453. }
  2454. priv_info->vdc.bits_per_pixel = data << 4;
  2455. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2456. &data);
  2457. if (rc) {
  2458. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2459. rc = 0;
  2460. data = MSM_CHROMA_444;
  2461. }
  2462. priv_info->vdc.chroma_format = data;
  2463. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2464. &data);
  2465. if (rc) {
  2466. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2467. rc = 0;
  2468. data = MSM_RGB;
  2469. }
  2470. priv_info->vdc.source_color_space = data;
  2471. rc = sde_vdc_populate_config(&priv_info->vdc,
  2472. intf_width, traffic_mode);
  2473. if (rc) {
  2474. DSI_DEBUG("failed populating vdc config\n");
  2475. rc = -EINVAL;
  2476. goto error;
  2477. }
  2478. priv_info->pclk_scale.numer =
  2479. priv_info->vdc.bits_per_pixel >> 4;
  2480. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2481. priv_info->vdc.chroma_format,
  2482. priv_info->vdc.bits_per_component);
  2483. mode->timing.vdc_enabled = true;
  2484. mode->timing.vdc = &priv_info->vdc;
  2485. mode->timing.pclk_scale = priv_info->pclk_scale;
  2486. error:
  2487. return rc;
  2488. }
  2489. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2490. {
  2491. int rc = 0;
  2492. struct drm_panel_hdr_properties *hdr_prop;
  2493. struct dsi_parser_utils *utils = &panel->utils;
  2494. hdr_prop = &panel->hdr_props;
  2495. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2496. "qcom,mdss-dsi-panel-hdr-enabled");
  2497. if (hdr_prop->hdr_enabled) {
  2498. rc = utils->read_u32_array(utils->data,
  2499. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2500. hdr_prop->display_primaries,
  2501. DISPLAY_PRIMARIES_MAX);
  2502. if (rc) {
  2503. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2504. __func__, __LINE__, rc);
  2505. hdr_prop->hdr_enabled = false;
  2506. return rc;
  2507. }
  2508. rc = utils->read_u32(utils->data,
  2509. "qcom,mdss-dsi-panel-peak-brightness",
  2510. &(hdr_prop->peak_brightness));
  2511. if (rc) {
  2512. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2513. __func__, __LINE__, rc);
  2514. hdr_prop->hdr_enabled = false;
  2515. return rc;
  2516. }
  2517. rc = utils->read_u32(utils->data,
  2518. "qcom,mdss-dsi-panel-blackness-level",
  2519. &(hdr_prop->blackness_level));
  2520. if (rc) {
  2521. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2522. __func__, __LINE__, rc);
  2523. hdr_prop->hdr_enabled = false;
  2524. return rc;
  2525. }
  2526. }
  2527. return 0;
  2528. }
  2529. static int dsi_panel_parse_topology(
  2530. struct dsi_display_mode_priv_info *priv_info,
  2531. struct dsi_parser_utils *utils,
  2532. int topology_override)
  2533. {
  2534. struct msm_display_topology *topology;
  2535. u32 top_count, top_sel, *array = NULL;
  2536. int i, len = 0;
  2537. int rc = -EINVAL;
  2538. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2539. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2540. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2541. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2542. return rc;
  2543. }
  2544. top_count = len / TOPOLOGY_SET_LEN;
  2545. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2546. if (!array)
  2547. return -ENOMEM;
  2548. rc = utils->read_u32_array(utils->data,
  2549. "qcom,display-topology", array, len);
  2550. if (rc) {
  2551. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2552. goto read_fail;
  2553. }
  2554. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2555. if (!topology) {
  2556. rc = -ENOMEM;
  2557. goto read_fail;
  2558. }
  2559. for (i = 0; i < top_count; i++) {
  2560. struct msm_display_topology *top = &topology[i];
  2561. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2562. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2563. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2564. }
  2565. if (topology_override >= 0 && topology_override < top_count) {
  2566. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2567. topology_override,
  2568. topology[topology_override].num_lm,
  2569. topology[topology_override].num_enc,
  2570. topology[topology_override].num_intf);
  2571. top_sel = topology_override;
  2572. goto parse_done;
  2573. }
  2574. rc = utils->read_u32(utils->data,
  2575. "qcom,default-topology-index", &top_sel);
  2576. if (rc) {
  2577. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2578. goto parse_fail;
  2579. }
  2580. if (top_sel >= top_count) {
  2581. rc = -EINVAL;
  2582. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2583. rc);
  2584. goto parse_fail;
  2585. }
  2586. if (!(priv_info->dsc_enabled || priv_info->vdc_enabled) !=
  2587. !topology[top_sel].num_enc) {
  2588. DSI_ERR("topology and compression info mismatch dsc:%d vdc:%d num_enc:%d\n",
  2589. priv_info->dsc_enabled, priv_info->vdc_enabled,
  2590. topology[top_sel].num_enc);
  2591. goto parse_fail;
  2592. }
  2593. if (priv_info->dsc_enabled)
  2594. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_DSC;
  2595. else if (priv_info->vdc_enabled)
  2596. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_VDC;
  2597. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2598. topology[top_sel].num_lm,
  2599. topology[top_sel].num_enc,
  2600. topology[top_sel].num_intf);
  2601. parse_done:
  2602. memcpy(&priv_info->topology, &topology[top_sel],
  2603. sizeof(struct msm_display_topology));
  2604. parse_fail:
  2605. kfree(topology);
  2606. read_fail:
  2607. kfree(array);
  2608. return rc;
  2609. }
  2610. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2611. struct msm_roi_alignment *align)
  2612. {
  2613. int len = 0, rc = 0;
  2614. u32 value[6];
  2615. struct property *data;
  2616. if (!align)
  2617. return -EINVAL;
  2618. memset(align, 0, sizeof(*align));
  2619. data = utils->find_property(utils->data,
  2620. "qcom,panel-roi-alignment", &len);
  2621. len /= sizeof(u32);
  2622. if (!data) {
  2623. DSI_ERR("panel roi alignment not found\n");
  2624. rc = -EINVAL;
  2625. } else if (len != 6) {
  2626. DSI_ERR("incorrect roi alignment len %d\n", len);
  2627. rc = -EINVAL;
  2628. } else {
  2629. rc = utils->read_u32_array(utils->data,
  2630. "qcom,panel-roi-alignment", value, len);
  2631. if (rc)
  2632. DSI_DEBUG("error reading panel roi alignment values\n");
  2633. else {
  2634. align->xstart_pix_align = value[0];
  2635. align->ystart_pix_align = value[1];
  2636. align->width_pix_align = value[2];
  2637. align->height_pix_align = value[3];
  2638. align->min_width = value[4];
  2639. align->min_height = value[5];
  2640. }
  2641. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2642. align->xstart_pix_align,
  2643. align->width_pix_align,
  2644. align->ystart_pix_align,
  2645. align->height_pix_align,
  2646. align->min_width,
  2647. align->min_height);
  2648. }
  2649. return rc;
  2650. }
  2651. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2652. struct dsi_parser_utils *utils)
  2653. {
  2654. struct msm_roi_caps *roi_caps = NULL;
  2655. const char *data;
  2656. int rc = 0;
  2657. if (!mode || !mode->priv_info) {
  2658. DSI_ERR("invalid arguments\n");
  2659. return -EINVAL;
  2660. }
  2661. roi_caps = &mode->priv_info->roi_caps;
  2662. memset(roi_caps, 0, sizeof(*roi_caps));
  2663. data = utils->get_property(utils->data,
  2664. "qcom,partial-update-enabled", NULL);
  2665. if (data) {
  2666. if (!strcmp(data, "dual_roi"))
  2667. roi_caps->num_roi = 2;
  2668. else if (!strcmp(data, "single_roi"))
  2669. roi_caps->num_roi = 1;
  2670. else {
  2671. DSI_INFO(
  2672. "invalid value for qcom,partial-update-enabled: %s\n",
  2673. data);
  2674. return 0;
  2675. }
  2676. } else {
  2677. DSI_DEBUG("partial update disabled as the property is not set\n");
  2678. return 0;
  2679. }
  2680. roi_caps->merge_rois = utils->read_bool(utils->data,
  2681. "qcom,partial-update-roi-merge");
  2682. roi_caps->enabled = roi_caps->num_roi > 0;
  2683. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2684. roi_caps->enabled);
  2685. if (roi_caps->enabled)
  2686. rc = dsi_panel_parse_roi_alignment(utils,
  2687. &roi_caps->align);
  2688. if (rc)
  2689. memset(roi_caps, 0, sizeof(*roi_caps));
  2690. return rc;
  2691. }
  2692. static bool dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2693. struct dsi_parser_utils *utils)
  2694. {
  2695. if (!mode || !mode->priv_info) {
  2696. DSI_ERR("invalid arguments\n");
  2697. return false;
  2698. }
  2699. if (utils->read_bool(utils->data, "qcom,mdss-dsi-video-mode"))
  2700. mode->panel_mode_caps |= DSI_OP_VIDEO_MODE;
  2701. if (utils->read_bool(utils->data, "qcom,mdss-dsi-cmd-mode"))
  2702. mode->panel_mode_caps |= DSI_OP_CMD_MODE;
  2703. if (!mode->panel_mode_caps)
  2704. return false;
  2705. return true;
  2706. };
  2707. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2708. {
  2709. int dms_enabled;
  2710. const char *data;
  2711. struct dsi_parser_utils *utils = &panel->utils;
  2712. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2713. dms_enabled = utils->read_bool(utils->data,
  2714. "qcom,dynamic-mode-switch-enabled");
  2715. if (!dms_enabled)
  2716. return 0;
  2717. data = utils->get_property(utils->data,
  2718. "qcom,dynamic-mode-switch-type", NULL);
  2719. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2720. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2721. } else {
  2722. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2723. panel->name, data);
  2724. return -EINVAL;
  2725. }
  2726. return 0;
  2727. };
  2728. /*
  2729. * The length of all the valid values to be checked should not be greater
  2730. * than the length of returned data from read command.
  2731. */
  2732. static bool
  2733. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2734. {
  2735. int i;
  2736. struct drm_panel_esd_config *config = &panel->esd_config;
  2737. for (i = 0; i < count; ++i) {
  2738. if (config->status_valid_params[i] >
  2739. config->status_cmds_rlen[i]) {
  2740. DSI_DEBUG("ignore valid params\n");
  2741. return false;
  2742. }
  2743. }
  2744. return true;
  2745. }
  2746. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2747. char *prop_key, u32 **target, u32 cmd_cnt)
  2748. {
  2749. int tmp;
  2750. if (!utils->find_property(utils->data, prop_key, &tmp))
  2751. return false;
  2752. tmp /= sizeof(u32);
  2753. if (tmp != cmd_cnt) {
  2754. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2755. tmp, cmd_cnt);
  2756. return false;
  2757. }
  2758. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2759. if (IS_ERR_OR_NULL(*target)) {
  2760. DSI_ERR("Error allocating memory for property\n");
  2761. return false;
  2762. }
  2763. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2764. DSI_ERR("cannot get values from dts\n");
  2765. kfree(*target);
  2766. *target = NULL;
  2767. return false;
  2768. }
  2769. return true;
  2770. }
  2771. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2772. {
  2773. kfree(esd_config->status_buf);
  2774. kfree(esd_config->return_buf);
  2775. kfree(esd_config->status_value);
  2776. kfree(esd_config->status_valid_params);
  2777. kfree(esd_config->status_cmds_rlen);
  2778. kfree(esd_config->status_cmd.cmds);
  2779. }
  2780. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2781. {
  2782. struct drm_panel_esd_config *esd_config;
  2783. int rc = 0;
  2784. u32 tmp;
  2785. u32 i, status_len, *lenp;
  2786. struct property *data;
  2787. struct dsi_parser_utils *utils = &panel->utils;
  2788. if (!panel) {
  2789. DSI_ERR("Invalid Params\n");
  2790. return -EINVAL;
  2791. }
  2792. esd_config = &panel->esd_config;
  2793. if (!esd_config)
  2794. return -EINVAL;
  2795. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2796. DSI_CMD_SET_PANEL_STATUS, utils);
  2797. if (!esd_config->status_cmd.count) {
  2798. DSI_ERR("panel status command parsing failed\n");
  2799. rc = -EINVAL;
  2800. goto error;
  2801. }
  2802. if (!dsi_panel_parse_esd_status_len(utils,
  2803. "qcom,mdss-dsi-panel-status-read-length",
  2804. &panel->esd_config.status_cmds_rlen,
  2805. esd_config->status_cmd.count)) {
  2806. DSI_ERR("Invalid status read length\n");
  2807. rc = -EINVAL;
  2808. goto error1;
  2809. }
  2810. if (dsi_panel_parse_esd_status_len(utils,
  2811. "qcom,mdss-dsi-panel-status-valid-params",
  2812. &panel->esd_config.status_valid_params,
  2813. esd_config->status_cmd.count)) {
  2814. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2815. esd_config->status_cmd.count)) {
  2816. rc = -EINVAL;
  2817. goto error2;
  2818. }
  2819. }
  2820. status_len = 0;
  2821. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2822. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2823. status_len += lenp[i];
  2824. if (!status_len) {
  2825. rc = -EINVAL;
  2826. goto error2;
  2827. }
  2828. /*
  2829. * Some panel may need multiple read commands to properly
  2830. * check panel status. Do a sanity check for proper status
  2831. * value which will be compared with the value read by dsi
  2832. * controller during ESD check. Also check if multiple read
  2833. * commands are there then, there should be corresponding
  2834. * status check values for each read command.
  2835. */
  2836. data = utils->find_property(utils->data,
  2837. "qcom,mdss-dsi-panel-status-value", &tmp);
  2838. tmp /= sizeof(u32);
  2839. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2840. esd_config->groups = tmp / status_len;
  2841. } else {
  2842. DSI_ERR("error parse panel-status-value\n");
  2843. rc = -EINVAL;
  2844. goto error2;
  2845. }
  2846. esd_config->status_value =
  2847. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2848. GFP_KERNEL);
  2849. if (!esd_config->status_value) {
  2850. rc = -ENOMEM;
  2851. goto error2;
  2852. }
  2853. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2854. sizeof(unsigned char), GFP_KERNEL);
  2855. if (!esd_config->return_buf) {
  2856. rc = -ENOMEM;
  2857. goto error3;
  2858. }
  2859. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2860. if (!esd_config->status_buf) {
  2861. rc = -ENOMEM;
  2862. goto error4;
  2863. }
  2864. rc = utils->read_u32_array(utils->data,
  2865. "qcom,mdss-dsi-panel-status-value",
  2866. esd_config->status_value, esd_config->groups * status_len);
  2867. if (rc) {
  2868. DSI_DEBUG("error reading panel status values\n");
  2869. memset(esd_config->status_value, 0,
  2870. esd_config->groups * status_len);
  2871. }
  2872. return 0;
  2873. error4:
  2874. kfree(esd_config->return_buf);
  2875. error3:
  2876. kfree(esd_config->status_value);
  2877. error2:
  2878. kfree(esd_config->status_valid_params);
  2879. kfree(esd_config->status_cmds_rlen);
  2880. error1:
  2881. kfree(esd_config->status_cmd.cmds);
  2882. error:
  2883. return rc;
  2884. }
  2885. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2886. {
  2887. int rc = 0;
  2888. const char *string;
  2889. struct drm_panel_esd_config *esd_config;
  2890. struct dsi_parser_utils *utils = &panel->utils;
  2891. u8 *esd_mode = NULL;
  2892. esd_config = &panel->esd_config;
  2893. esd_config->status_mode = ESD_MODE_MAX;
  2894. esd_config->esd_enabled = utils->read_bool(utils->data,
  2895. "qcom,esd-check-enabled");
  2896. if (!esd_config->esd_enabled)
  2897. return 0;
  2898. rc = utils->read_string(utils->data,
  2899. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2900. if (!rc) {
  2901. if (!strcmp(string, "bta_check")) {
  2902. esd_config->status_mode = ESD_MODE_SW_BTA;
  2903. } else if (!strcmp(string, "reg_read")) {
  2904. esd_config->status_mode = ESD_MODE_REG_READ;
  2905. } else if (!strcmp(string, "te_signal_check")) {
  2906. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2907. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2908. } else {
  2909. DSI_ERR("TE-ESD not valid for video mode\n");
  2910. rc = -EINVAL;
  2911. goto error;
  2912. }
  2913. } else {
  2914. DSI_ERR("No valid panel-status-check-mode string\n");
  2915. rc = -EINVAL;
  2916. goto error;
  2917. }
  2918. } else {
  2919. DSI_DEBUG("status check method not defined!\n");
  2920. rc = -EINVAL;
  2921. goto error;
  2922. }
  2923. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2924. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2925. if (rc) {
  2926. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2927. rc);
  2928. goto error;
  2929. }
  2930. esd_mode = "register_read";
  2931. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2932. esd_mode = "bta_trigger";
  2933. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2934. esd_mode = "te_check";
  2935. }
  2936. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2937. return 0;
  2938. error:
  2939. panel->esd_config.esd_enabled = false;
  2940. return rc;
  2941. }
  2942. static void dsi_panel_update_util(struct dsi_panel *panel,
  2943. struct device_node *parser_node)
  2944. {
  2945. struct dsi_parser_utils *utils = &panel->utils;
  2946. if (parser_node) {
  2947. *utils = *dsi_parser_get_parser_utils();
  2948. utils->data = parser_node;
  2949. DSI_DEBUG("switching to parser APIs\n");
  2950. goto end;
  2951. }
  2952. *utils = *dsi_parser_get_of_utils();
  2953. utils->data = panel->panel_of_node;
  2954. end:
  2955. utils->node = panel->panel_of_node;
  2956. }
  2957. static int dsi_panel_vm_stub(struct dsi_panel *panel)
  2958. {
  2959. return 0;
  2960. }
  2961. static void dsi_panel_setup_vm_ops(struct dsi_panel *panel, bool trusted_vm_env)
  2962. {
  2963. if (trusted_vm_env) {
  2964. panel->panel_ops.pinctrl_init = dsi_panel_vm_stub;
  2965. panel->panel_ops.gpio_request = dsi_panel_vm_stub;
  2966. panel->panel_ops.pinctrl_deinit = dsi_panel_vm_stub;
  2967. panel->panel_ops.gpio_release = dsi_panel_vm_stub;
  2968. panel->panel_ops.bl_register = dsi_panel_vm_stub;
  2969. panel->panel_ops.bl_unregister = dsi_panel_vm_stub;
  2970. panel->panel_ops.parse_gpios = dsi_panel_vm_stub;
  2971. panel->panel_ops.parse_power_cfg = dsi_panel_vm_stub;
  2972. panel->panel_ops.trigger_esd_attack = dsi_panel_vm_trigger_esd_attack;
  2973. } else {
  2974. panel->panel_ops.pinctrl_init = dsi_panel_pinctrl_init;
  2975. panel->panel_ops.gpio_request = dsi_panel_gpio_request;
  2976. panel->panel_ops.pinctrl_deinit = dsi_panel_pinctrl_deinit;
  2977. panel->panel_ops.gpio_release = dsi_panel_gpio_release;
  2978. panel->panel_ops.bl_register = dsi_panel_bl_register;
  2979. panel->panel_ops.bl_unregister = dsi_panel_bl_unregister;
  2980. panel->panel_ops.parse_gpios = dsi_panel_parse_gpios;
  2981. panel->panel_ops.parse_power_cfg = dsi_panel_parse_power_cfg;
  2982. panel->panel_ops.trigger_esd_attack = dsi_panel_trigger_esd_attack;
  2983. }
  2984. }
  2985. struct dsi_panel *dsi_panel_get(struct device *parent,
  2986. struct device_node *of_node,
  2987. struct device_node *parser_node,
  2988. const char *type,
  2989. int topology_override,
  2990. bool trusted_vm_env)
  2991. {
  2992. struct dsi_panel *panel;
  2993. struct dsi_parser_utils *utils;
  2994. const char *panel_physical_type;
  2995. int rc = 0;
  2996. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2997. if (!panel)
  2998. return ERR_PTR(-ENOMEM);
  2999. dsi_panel_setup_vm_ops(panel, trusted_vm_env);
  3000. panel->panel_of_node = of_node;
  3001. panel->parent = parent;
  3002. panel->type = type;
  3003. dsi_panel_update_util(panel, parser_node);
  3004. utils = &panel->utils;
  3005. panel->name = utils->get_property(utils->data,
  3006. "qcom,mdss-dsi-panel-name", NULL);
  3007. if (!panel->name)
  3008. panel->name = DSI_PANEL_DEFAULT_LABEL;
  3009. /*
  3010. * Set panel type to LCD as default.
  3011. */
  3012. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  3013. panel_physical_type = utils->get_property(utils->data,
  3014. "qcom,mdss-dsi-panel-physical-type", NULL);
  3015. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  3016. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  3017. rc = dsi_panel_parse_host_config(panel);
  3018. if (rc) {
  3019. DSI_ERR("failed to parse host configuration, rc=%d\n",
  3020. rc);
  3021. goto error;
  3022. }
  3023. rc = dsi_panel_parse_panel_mode(panel);
  3024. if (rc) {
  3025. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  3026. rc);
  3027. goto error;
  3028. }
  3029. rc = dsi_panel_parse_dfps_caps(panel);
  3030. if (rc)
  3031. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  3032. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  3033. if (rc)
  3034. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  3035. rc = dsi_panel_parse_avr_caps(panel, of_node);
  3036. if (rc)
  3037. DSI_ERR("failed to parse AVR features, rc=%d\n", rc);
  3038. rc = dsi_panel_parse_dyn_clk_caps(panel);
  3039. if (rc)
  3040. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  3041. rc = dsi_panel_parse_phy_props(panel);
  3042. if (rc) {
  3043. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  3044. rc);
  3045. goto error;
  3046. }
  3047. rc = panel->panel_ops.parse_gpios(panel);
  3048. if (rc) {
  3049. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  3050. goto error;
  3051. }
  3052. rc = panel->panel_ops.parse_power_cfg(panel);
  3053. if (rc)
  3054. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  3055. rc = dsi_panel_parse_bl_config(panel);
  3056. if (rc) {
  3057. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  3058. if (rc == -EPROBE_DEFER)
  3059. goto error;
  3060. }
  3061. rc = dsi_panel_parse_misc_features(panel);
  3062. if (rc)
  3063. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  3064. rc = dsi_panel_parse_hdr_config(panel);
  3065. if (rc)
  3066. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  3067. rc = dsi_panel_get_mode_count(panel);
  3068. if (rc) {
  3069. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  3070. goto error;
  3071. }
  3072. rc = dsi_panel_parse_dms_info(panel);
  3073. if (rc)
  3074. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  3075. rc = dsi_panel_parse_esd_config(panel);
  3076. if (rc)
  3077. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  3078. rc = dsi_panel_vreg_get(panel);
  3079. if (rc) {
  3080. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  3081. panel->name, rc);
  3082. goto error;
  3083. }
  3084. panel->power_mode = SDE_MODE_DPMS_OFF;
  3085. drm_panel_init(&panel->drm_panel, &panel->mipi_device.dev,
  3086. NULL, DRM_MODE_CONNECTOR_DSI);
  3087. panel->mipi_device.dev.of_node = of_node;
  3088. drm_panel_add(&panel->drm_panel);
  3089. mutex_init(&panel->panel_lock);
  3090. return panel;
  3091. error:
  3092. kfree(panel);
  3093. return ERR_PTR(rc);
  3094. }
  3095. void dsi_panel_put(struct dsi_panel *panel)
  3096. {
  3097. drm_panel_remove(&panel->drm_panel);
  3098. /* free resources allocated for ESD check */
  3099. dsi_panel_esd_config_deinit(&panel->esd_config);
  3100. kfree(panel->avr_caps.avr_step_fps_list);
  3101. kfree(panel);
  3102. }
  3103. int dsi_panel_drv_init(struct dsi_panel *panel,
  3104. struct mipi_dsi_host *host)
  3105. {
  3106. int rc = 0;
  3107. struct mipi_dsi_device *dev;
  3108. if (!panel || !host) {
  3109. DSI_ERR("invalid params\n");
  3110. return -EINVAL;
  3111. }
  3112. mutex_lock(&panel->panel_lock);
  3113. dev = &panel->mipi_device;
  3114. dev->host = host;
  3115. /*
  3116. * We dont have device structure since panel is not a device node.
  3117. * When using drm panel framework, the device is probed when the host is
  3118. * create.
  3119. */
  3120. dev->channel = 0;
  3121. dev->lanes = 4;
  3122. panel->host = host;
  3123. rc = panel->panel_ops.pinctrl_init(panel);
  3124. if (rc) {
  3125. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  3126. panel->name, rc);
  3127. goto exit;
  3128. }
  3129. rc = panel->panel_ops.gpio_request(panel);
  3130. if (rc) {
  3131. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  3132. rc);
  3133. goto error_pinctrl_deinit;
  3134. }
  3135. rc = panel->panel_ops.bl_register(panel);
  3136. if (rc) {
  3137. if (rc != -EPROBE_DEFER)
  3138. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  3139. panel->name, rc);
  3140. goto error_gpio_release;
  3141. }
  3142. goto exit;
  3143. error_gpio_release:
  3144. (void)dsi_panel_gpio_release(panel);
  3145. error_pinctrl_deinit:
  3146. (void)dsi_panel_pinctrl_deinit(panel);
  3147. exit:
  3148. mutex_unlock(&panel->panel_lock);
  3149. return rc;
  3150. }
  3151. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  3152. {
  3153. int rc = 0;
  3154. if (!panel) {
  3155. DSI_ERR("invalid params\n");
  3156. return -EINVAL;
  3157. }
  3158. mutex_lock(&panel->panel_lock);
  3159. rc = panel->panel_ops.bl_unregister(panel);
  3160. if (rc)
  3161. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  3162. panel->name, rc);
  3163. rc = panel->panel_ops.gpio_release(panel);
  3164. if (rc)
  3165. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  3166. rc);
  3167. rc = panel->panel_ops.pinctrl_deinit(panel);
  3168. if (rc)
  3169. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  3170. rc);
  3171. rc = dsi_panel_vreg_put(panel);
  3172. if (rc)
  3173. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  3174. panel->host = NULL;
  3175. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  3176. mutex_unlock(&panel->panel_lock);
  3177. return rc;
  3178. }
  3179. int dsi_panel_validate_mode(struct dsi_panel *panel,
  3180. struct dsi_display_mode *mode)
  3181. {
  3182. return 0;
  3183. }
  3184. static int dsi_panel_get_max_res_count(struct dsi_parser_utils *utils,
  3185. struct device_node *node, u32 *dsc_count, u32 *lm_count)
  3186. {
  3187. const char *compression;
  3188. u32 *array = NULL, top_count, len, i;
  3189. int rc = -EINVAL;
  3190. bool dsc_enable = false;
  3191. *dsc_count = 0;
  3192. *lm_count = 0;
  3193. compression = utils->get_property(node, "qcom,compression-mode", NULL);
  3194. if (compression && !strcmp(compression, "dsc"))
  3195. dsc_enable = true;
  3196. len = utils->count_u32_elems(node, "qcom,display-topology");
  3197. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  3198. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY))
  3199. return rc;
  3200. top_count = len / TOPOLOGY_SET_LEN;
  3201. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  3202. if (!array)
  3203. return -ENOMEM;
  3204. rc = utils->read_u32_array(node, "qcom,display-topology", array, len);
  3205. if (rc) {
  3206. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  3207. goto read_fail;
  3208. }
  3209. for (i = 0; i < top_count; i++) {
  3210. *lm_count = max(*lm_count, array[i * TOPOLOGY_SET_LEN]);
  3211. if (dsc_enable)
  3212. *dsc_count = max(*dsc_count,
  3213. array[i * TOPOLOGY_SET_LEN + 1]);
  3214. }
  3215. read_fail:
  3216. kfree(array);
  3217. return 0;
  3218. }
  3219. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  3220. {
  3221. const u32 SINGLE_MODE_SUPPORT = 1;
  3222. struct dsi_parser_utils *utils;
  3223. struct device_node *timings_np, *child_np;
  3224. int num_dfps_rates;
  3225. int num_video_modes = 0, num_cmd_modes = 0;
  3226. int count, rc = 0;
  3227. u32 dsc_count = 0, lm_count = 0;
  3228. if (!panel) {
  3229. DSI_ERR("invalid params\n");
  3230. return -EINVAL;
  3231. }
  3232. utils = &panel->utils;
  3233. panel->num_timing_nodes = 0;
  3234. timings_np = utils->get_child_by_name(utils->data,
  3235. "qcom,mdss-dsi-display-timings");
  3236. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  3237. DSI_ERR("no display timing nodes defined\n");
  3238. rc = -EINVAL;
  3239. goto error;
  3240. }
  3241. count = utils->get_child_count(timings_np);
  3242. if ((!count && !panel->host_config.ext_bridge_mode) ||
  3243. count > DSI_MODE_MAX) {
  3244. DSI_ERR("invalid count of timing nodes: %d\n", count);
  3245. rc = -EINVAL;
  3246. goto error;
  3247. }
  3248. /* No multiresolution support is available for video mode panels.
  3249. * Multi-mode is supported for video mode during POMS is enabled.
  3250. */
  3251. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  3252. !panel->host_config.ext_bridge_mode &&
  3253. !panel->panel_mode_switch_enabled)
  3254. count = SINGLE_MODE_SUPPORT;
  3255. panel->num_timing_nodes = count;
  3256. dsi_for_each_child_node(timings_np, child_np) {
  3257. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  3258. num_video_modes++;
  3259. else if (utils->read_bool(child_np,
  3260. "qcom,mdss-dsi-cmd-mode"))
  3261. num_cmd_modes++;
  3262. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  3263. num_video_modes++;
  3264. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  3265. num_cmd_modes++;
  3266. dsi_panel_get_max_res_count(utils, child_np,
  3267. &dsc_count, &lm_count);
  3268. panel->dsc_count = max(dsc_count, panel->dsc_count);
  3269. panel->lm_count = max(lm_count, panel->lm_count);
  3270. }
  3271. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  3272. panel->dfps_caps.dfps_list_len;
  3273. /*
  3274. * Inflate num_of_modes by fps in dfps.
  3275. * Single command mode for video mode panels supporting
  3276. * panel operating mode switch.
  3277. */
  3278. num_video_modes = num_video_modes * num_dfps_rates;
  3279. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  3280. (panel->panel_mode_switch_enabled))
  3281. num_cmd_modes = 1;
  3282. panel->num_display_modes = num_video_modes + num_cmd_modes;
  3283. error:
  3284. return rc;
  3285. }
  3286. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  3287. struct dsi_panel_phy_props *phy_props)
  3288. {
  3289. int rc = 0;
  3290. if (!panel || !phy_props) {
  3291. DSI_ERR("invalid params\n");
  3292. return -EINVAL;
  3293. }
  3294. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  3295. return rc;
  3296. }
  3297. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  3298. struct dsi_dfps_capabilities *dfps_caps)
  3299. {
  3300. int rc = 0;
  3301. if (!panel || !dfps_caps) {
  3302. DSI_ERR("invalid params\n");
  3303. return -EINVAL;
  3304. }
  3305. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  3306. return rc;
  3307. }
  3308. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  3309. {
  3310. int i;
  3311. if (!mode->priv_info)
  3312. return;
  3313. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  3314. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3315. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3316. }
  3317. kfree(mode->priv_info);
  3318. }
  3319. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  3320. struct dsi_display_mode *mode, u32 frame_threshold_us)
  3321. {
  3322. u32 frame_time_us, nslices;
  3323. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  3324. dsi_transfer_time_us, pixel_clk_khz;
  3325. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3326. struct dsi_mode_info *timing = &mode->timing;
  3327. struct dsi_display_mode *display_mode;
  3328. u32 jitter_numer, jitter_denom, prefill_lines;
  3329. u32 default_prefill_lines, actual_prefill_lines;
  3330. u32 min_threshold_us, prefill_time_us, max_transfer_us, packet_overhead;
  3331. u16 bpp;
  3332. /* Packet overhead in bits,
  3333. * DPHY: 4 bytes header + 2 bytes checksum + 1 byte dcs data command.
  3334. * CPHY: 8 bytes header + 4 bytes checksum + 2 bytes SYNC +
  3335. * 1 byte dcs data command.
  3336. */
  3337. if (config->phy_type & DSI_PHY_TYPE_CPHY)
  3338. packet_overhead = 120;
  3339. else
  3340. packet_overhead = 56;
  3341. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3342. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3343. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3344. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3345. if (timing->refresh_rate >= 120)
  3346. frame_threshold_us = HIGH_REFRESH_RATE_THRESHOLD_TIME_US;
  3347. if (timing->dsc_enabled) {
  3348. nslices = (timing->h_active)/(dsc->config.slice_width);
  3349. /* (slice width x bit-per-pixel + packet overhead) x
  3350. * number of slices x height x fps / lane
  3351. */
  3352. bpp = DSC_BPP(dsc->config);
  3353. bits_per_line = ((dsc->config.slice_width * bpp) +
  3354. packet_overhead) * nslices;
  3355. bits_per_line = bits_per_line / (config->num_data_lanes);
  3356. min_bitclk_hz = (bits_per_line * timing->v_active *
  3357. timing->refresh_rate);
  3358. } else {
  3359. total_active_pixels = ((dsi_h_active_dce(timing)
  3360. * timing->v_active));
  3361. /* calculate the actual bitclk needed to transfer the frame */
  3362. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3363. (config->bpp));
  3364. do_div(min_bitclk_hz, config->num_data_lanes);
  3365. }
  3366. timing->min_dsi_clk_hz = min_bitclk_hz;
  3367. /*
  3368. * Apart from prefill line time, we need to take into account RSCC mode threshold time. In
  3369. * cases where RSC is disabled, as jitter is no longer considered we need to make sure we
  3370. * have enough time for DCS command transfer. As of now, the RSC threshold time and DCS
  3371. * threshold time are configured to 40us.
  3372. */
  3373. if (mode->priv_info->disable_rsc_solver) {
  3374. min_threshold_us = DCS_COMMAND_THRESHOLD_TIME_US;
  3375. } else {
  3376. min_threshold_us = mult_frac(frame_time_us, jitter_numer, (jitter_denom * 100));
  3377. min_threshold_us += RSCC_MODE_THRESHOLD_TIME_US;
  3378. }
  3379. /*
  3380. * Increase the prefill_lines proportionately as recommended
  3381. * 40lines for 60fps, 60 for 90fps, 120lines for 120fps, and so on.
  3382. */
  3383. default_prefill_lines = mult_frac(MIN_PREFILL_LINES, timing->refresh_rate, 60);
  3384. actual_prefill_lines = timing->v_back_porch + timing->v_front_porch + timing->v_sync_width;
  3385. /* consider the max of default prefill lines and actual prefill lines */
  3386. prefill_lines = max(actual_prefill_lines, default_prefill_lines);
  3387. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3388. (timing->v_active));
  3389. min_threshold_us = min_threshold_us + prefill_time_us;
  3390. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3391. if (timing->clk_rate_hz) {
  3392. /* adjust the transfer time proportionately for bit clk*/
  3393. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3394. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3395. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3396. } else if (mode->priv_info->mdp_transfer_time_us) {
  3397. max_transfer_us = frame_time_us - min_threshold_us;
  3398. mode->priv_info->mdp_transfer_time_us = min(
  3399. mode->priv_info->mdp_transfer_time_us,
  3400. max_transfer_us);
  3401. timing->dsi_transfer_time_us =
  3402. mode->priv_info->mdp_transfer_time_us;
  3403. } else {
  3404. if ((min_threshold_us > frame_threshold_us) ||
  3405. (mode->priv_info->disable_rsc_solver))
  3406. frame_threshold_us = min_threshold_us;
  3407. timing->dsi_transfer_time_us = frame_time_us -
  3408. frame_threshold_us;
  3409. }
  3410. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3411. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3412. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3413. timing->mdp_transfer_time_us =
  3414. mode->priv_info->mdp_transfer_time_us;
  3415. }
  3416. /* Calculate pclk_khz to update modeinfo */
  3417. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3418. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3419. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3420. do_div(pixel_clk_khz, config->bpp);
  3421. display_mode->pixel_clk_khz = pixel_clk_khz;
  3422. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3423. }
  3424. int dsi_panel_get_mode(struct dsi_panel *panel,
  3425. u32 index, struct dsi_display_mode *mode,
  3426. int topology_override)
  3427. {
  3428. struct device_node *timings_np, *child_np;
  3429. struct dsi_parser_utils *utils;
  3430. struct dsi_display_mode_priv_info *prv_info;
  3431. u32 child_idx = 0;
  3432. int rc = 0, num_timings;
  3433. int traffic_mode;
  3434. void *utils_data = NULL;
  3435. if (!panel || !mode) {
  3436. DSI_ERR("invalid params\n");
  3437. return -EINVAL;
  3438. }
  3439. mutex_lock(&panel->panel_lock);
  3440. utils = &panel->utils;
  3441. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3442. if (!mode->priv_info) {
  3443. rc = -ENOMEM;
  3444. goto done;
  3445. }
  3446. prv_info = mode->priv_info;
  3447. timings_np = utils->get_child_by_name(utils->data,
  3448. "qcom,mdss-dsi-display-timings");
  3449. if (!timings_np) {
  3450. DSI_ERR("no display timing nodes defined\n");
  3451. rc = -EINVAL;
  3452. goto parse_fail;
  3453. }
  3454. num_timings = utils->get_child_count(timings_np);
  3455. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3456. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3457. rc = -EINVAL;
  3458. goto parse_fail;
  3459. }
  3460. utils_data = utils->data;
  3461. traffic_mode = panel->video_config.traffic_mode;
  3462. dsi_for_each_child_node(timings_np, child_np) {
  3463. if (index != child_idx++)
  3464. continue;
  3465. utils->data = child_np;
  3466. if (panel->panel_mode_switch_enabled) {
  3467. if (!dsi_panel_parse_panel_mode_caps(mode, utils)) {
  3468. mode->panel_mode_caps = panel->panel_mode;
  3469. DSI_INFO("panel mode isn't specified in timing[%d]\n",
  3470. child_idx);
  3471. }
  3472. } else {
  3473. mode->panel_mode_caps = panel->panel_mode;
  3474. }
  3475. rc = utils->read_u32(utils->data, "cell-index", &mode->mode_idx);
  3476. if (rc)
  3477. mode->mode_idx = index;
  3478. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3479. if (rc) {
  3480. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3481. goto parse_fail;
  3482. }
  3483. if (panel->dyn_clk_caps.dyn_clk_support) {
  3484. rc = dsi_panel_parse_dyn_clk_list(mode, utils);
  3485. if (rc)
  3486. DSI_ERR("failed to parse dynamic clk rates, rc=%d\n", rc);
  3487. }
  3488. rc = dsi_panel_parse_dsc_params(mode, utils);
  3489. if (rc) {
  3490. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3491. goto parse_fail;
  3492. }
  3493. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode);
  3494. if (rc) {
  3495. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3496. goto parse_fail;
  3497. }
  3498. rc = dsi_panel_parse_topology(prv_info, utils,
  3499. topology_override);
  3500. if (rc) {
  3501. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3502. goto parse_fail;
  3503. }
  3504. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3505. if (rc) {
  3506. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3507. goto parse_fail;
  3508. }
  3509. rc = dsi_panel_parse_jitter_config(mode, utils);
  3510. if (rc)
  3511. DSI_ERR(
  3512. "failed to parse panel jitter config, rc=%d\n", rc);
  3513. rc = dsi_panel_parse_phy_timing(mode, utils);
  3514. if (rc) {
  3515. DSI_ERR(
  3516. "failed to parse panel phy timings, rc=%d\n", rc);
  3517. goto parse_fail;
  3518. }
  3519. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3520. if (rc)
  3521. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3522. }
  3523. goto done;
  3524. parse_fail:
  3525. kfree(mode->priv_info);
  3526. mode->priv_info = NULL;
  3527. done:
  3528. utils->data = utils_data;
  3529. mutex_unlock(&panel->panel_lock);
  3530. return rc;
  3531. }
  3532. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3533. struct dsi_display_mode *mode,
  3534. struct dsi_host_config *config)
  3535. {
  3536. int rc = 0;
  3537. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3538. if (!panel || !mode || !config) {
  3539. DSI_ERR("invalid params\n");
  3540. return -EINVAL;
  3541. }
  3542. mutex_lock(&panel->panel_lock);
  3543. config->panel_mode = panel->panel_mode;
  3544. memcpy(&config->common_config, &panel->host_config,
  3545. sizeof(config->common_config));
  3546. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3547. memcpy(&config->u.video_engine, &panel->video_config,
  3548. sizeof(config->u.video_engine));
  3549. } else {
  3550. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3551. sizeof(config->u.cmd_engine));
  3552. }
  3553. memcpy(&config->video_timing, &mode->timing,
  3554. sizeof(config->video_timing));
  3555. config->video_timing.mdp_transfer_time_us =
  3556. mode->priv_info->mdp_transfer_time_us;
  3557. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3558. config->video_timing.dsc = &mode->priv_info->dsc;
  3559. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3560. config->video_timing.vdc = &mode->priv_info->vdc;
  3561. if (dyn_clk_caps->dyn_clk_support)
  3562. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3563. else
  3564. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3565. config->esc_clk_rate_hz = 19200000;
  3566. mutex_unlock(&panel->panel_lock);
  3567. return rc;
  3568. }
  3569. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3570. {
  3571. int rc = 0;
  3572. if (!panel) {
  3573. DSI_ERR("invalid params\n");
  3574. return -EINVAL;
  3575. }
  3576. mutex_lock(&panel->panel_lock);
  3577. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3578. if (panel->lp11_init)
  3579. goto error;
  3580. rc = dsi_panel_power_on(panel);
  3581. if (rc) {
  3582. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3583. goto error;
  3584. }
  3585. error:
  3586. mutex_unlock(&panel->panel_lock);
  3587. return rc;
  3588. }
  3589. int dsi_panel_update_pps(struct dsi_panel *panel)
  3590. {
  3591. int rc = 0;
  3592. struct dsi_panel_cmd_set *set = NULL;
  3593. struct dsi_display_mode_priv_info *priv_info = NULL;
  3594. if (!panel || !panel->cur_mode) {
  3595. DSI_ERR("invalid params\n");
  3596. return -EINVAL;
  3597. }
  3598. mutex_lock(&panel->panel_lock);
  3599. priv_info = panel->cur_mode->priv_info;
  3600. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3601. if (priv_info->dsc_enabled)
  3602. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3603. panel->dce_pps_cmd, 0,
  3604. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3605. else if (priv_info->vdc_enabled)
  3606. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3607. panel->dce_pps_cmd, 0,
  3608. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3609. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3610. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3611. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3612. if (rc) {
  3613. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3614. goto error;
  3615. }
  3616. }
  3617. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3618. if (rc) {
  3619. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3620. panel->name, rc);
  3621. }
  3622. dsi_panel_destroy_cmd_packets(set);
  3623. error:
  3624. mutex_unlock(&panel->panel_lock);
  3625. return rc;
  3626. }
  3627. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3628. {
  3629. int rc = 0;
  3630. if (!panel) {
  3631. DSI_ERR("invalid params\n");
  3632. return -EINVAL;
  3633. }
  3634. mutex_lock(&panel->panel_lock);
  3635. if (!panel->panel_initialized)
  3636. goto exit;
  3637. /*
  3638. * Consider LP1->LP2->LP1.
  3639. * If the panel is already in LP mode, do not need to
  3640. * set the regulator.
  3641. * IBB and AB power mode would be set at the same time
  3642. * in PMIC driver, so we only call ibb setting that is enough.
  3643. */
  3644. if (dsi_panel_is_type_oled(panel) &&
  3645. panel->power_mode != SDE_MODE_DPMS_LP2)
  3646. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3647. "ibb", REGULATOR_MODE_IDLE);
  3648. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3649. if (rc)
  3650. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3651. panel->name, rc);
  3652. exit:
  3653. mutex_unlock(&panel->panel_lock);
  3654. return rc;
  3655. }
  3656. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3657. {
  3658. int rc = 0;
  3659. if (!panel) {
  3660. DSI_ERR("invalid params\n");
  3661. return -EINVAL;
  3662. }
  3663. mutex_lock(&panel->panel_lock);
  3664. if (!panel->panel_initialized)
  3665. goto exit;
  3666. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3667. if (rc)
  3668. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3669. panel->name, rc);
  3670. exit:
  3671. mutex_unlock(&panel->panel_lock);
  3672. return rc;
  3673. }
  3674. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3675. {
  3676. int rc = 0;
  3677. if (!panel) {
  3678. DSI_ERR("invalid params\n");
  3679. return -EINVAL;
  3680. }
  3681. mutex_lock(&panel->panel_lock);
  3682. if (!panel->panel_initialized)
  3683. goto exit;
  3684. /*
  3685. * Consider about LP1->LP2->NOLP.
  3686. */
  3687. if (dsi_panel_is_type_oled(panel) &&
  3688. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3689. panel->power_mode == SDE_MODE_DPMS_LP2))
  3690. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3691. "ibb", REGULATOR_MODE_NORMAL);
  3692. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3693. if (rc)
  3694. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3695. panel->name, rc);
  3696. exit:
  3697. mutex_unlock(&panel->panel_lock);
  3698. return rc;
  3699. }
  3700. int dsi_panel_prepare(struct dsi_panel *panel)
  3701. {
  3702. int rc = 0;
  3703. if (!panel) {
  3704. DSI_ERR("invalid params\n");
  3705. return -EINVAL;
  3706. }
  3707. mutex_lock(&panel->panel_lock);
  3708. if (panel->lp11_init) {
  3709. rc = dsi_panel_power_on(panel);
  3710. if (rc) {
  3711. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3712. panel->name, rc);
  3713. goto error;
  3714. }
  3715. }
  3716. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3717. if (rc) {
  3718. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3719. panel->name, rc);
  3720. goto error;
  3721. }
  3722. error:
  3723. mutex_unlock(&panel->panel_lock);
  3724. return rc;
  3725. }
  3726. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3727. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3728. {
  3729. static const int ROI_CMD_LEN = 5;
  3730. int rc = 0;
  3731. /* DTYPE_DCS_LWRITE */
  3732. char *caset, *paset;
  3733. set->cmds = NULL;
  3734. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3735. if (!caset) {
  3736. rc = -ENOMEM;
  3737. goto exit;
  3738. }
  3739. caset[0] = 0x2a;
  3740. caset[1] = (roi->x & 0xFF00) >> 8;
  3741. caset[2] = roi->x & 0xFF;
  3742. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3743. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3744. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3745. if (!paset) {
  3746. rc = -ENOMEM;
  3747. goto error_free_mem;
  3748. }
  3749. paset[0] = 0x2b;
  3750. paset[1] = (roi->y & 0xFF00) >> 8;
  3751. paset[2] = roi->y & 0xFF;
  3752. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3753. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3754. set->type = DSI_CMD_SET_ROI;
  3755. set->state = DSI_CMD_SET_STATE_LP;
  3756. set->count = 2; /* send caset + paset together */
  3757. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3758. if (!set->cmds) {
  3759. rc = -ENOMEM;
  3760. goto error_free_mem;
  3761. }
  3762. set->cmds[0].msg.channel = 0;
  3763. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3764. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3765. set->cmds[0].msg.flags |= MIPI_DSI_MSG_BATCH_COMMAND;
  3766. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3767. set->cmds[0].msg.tx_buf = caset;
  3768. set->cmds[0].msg.rx_len = 0;
  3769. set->cmds[0].msg.rx_buf = 0;
  3770. set->cmds[0].last_command = 0;
  3771. set->cmds[0].post_wait_ms = 0;
  3772. set->cmds[0].ctrl = unicast ? ctrl_idx : 0;
  3773. set->cmds[1].msg.channel = 0;
  3774. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3775. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3776. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3777. set->cmds[1].msg.tx_buf = paset;
  3778. set->cmds[1].msg.rx_len = 0;
  3779. set->cmds[1].msg.rx_buf = 0;
  3780. set->cmds[1].last_command = 1;
  3781. set->cmds[1].post_wait_ms = 0;
  3782. set->cmds[1].ctrl = unicast ? ctrl_idx : 0;
  3783. goto exit;
  3784. error_free_mem:
  3785. kfree(caset);
  3786. kfree(paset);
  3787. kfree(set->cmds);
  3788. exit:
  3789. return rc;
  3790. }
  3791. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3792. int ctrl_idx)
  3793. {
  3794. int rc = 0;
  3795. if (!panel) {
  3796. DSI_ERR("invalid params\n");
  3797. return -EINVAL;
  3798. }
  3799. mutex_lock(&panel->panel_lock);
  3800. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3801. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3802. if (rc)
  3803. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3804. panel->name, rc);
  3805. mutex_unlock(&panel->panel_lock);
  3806. return rc;
  3807. }
  3808. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3809. int ctrl_idx)
  3810. {
  3811. int rc = 0;
  3812. if (!panel) {
  3813. DSI_ERR("invalid params\n");
  3814. return -EINVAL;
  3815. }
  3816. mutex_lock(&panel->panel_lock);
  3817. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3818. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3819. if (rc)
  3820. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3821. panel->name, rc);
  3822. mutex_unlock(&panel->panel_lock);
  3823. return rc;
  3824. }
  3825. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3826. struct dsi_rect *roi)
  3827. {
  3828. int rc = 0;
  3829. struct dsi_panel_cmd_set *set;
  3830. struct dsi_display_mode_priv_info *priv_info;
  3831. if (!panel || !panel->cur_mode) {
  3832. DSI_ERR("Invalid params\n");
  3833. return -EINVAL;
  3834. }
  3835. priv_info = panel->cur_mode->priv_info;
  3836. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3837. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3838. if (rc) {
  3839. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3840. panel->name, rc);
  3841. return rc;
  3842. }
  3843. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3844. roi->x, roi->y, roi->w, roi->h);
  3845. SDE_EVT32(roi->x, roi->y, roi->w, roi->h);
  3846. mutex_lock(&panel->panel_lock);
  3847. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3848. if (rc)
  3849. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3850. panel->name, rc);
  3851. mutex_unlock(&panel->panel_lock);
  3852. dsi_panel_destroy_cmd_packets(set);
  3853. dsi_panel_dealloc_cmd_packets(set);
  3854. return rc;
  3855. }
  3856. int dsi_panel_switch_cmd_mode_out(struct dsi_panel *panel)
  3857. {
  3858. int rc = 0;
  3859. if (!panel) {
  3860. DSI_ERR("Invalid params\n");
  3861. return -EINVAL;
  3862. }
  3863. mutex_lock(&panel->panel_lock);
  3864. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_OUT);
  3865. if (rc)
  3866. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_OUT cmds, rc=%d\n",
  3867. panel->name, rc);
  3868. mutex_unlock(&panel->panel_lock);
  3869. return rc;
  3870. }
  3871. int dsi_panel_switch_video_mode_out(struct dsi_panel *panel)
  3872. {
  3873. int rc = 0;
  3874. if (!panel) {
  3875. DSI_ERR("Invalid params\n");
  3876. return -EINVAL;
  3877. }
  3878. mutex_lock(&panel->panel_lock);
  3879. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_OUT);
  3880. if (rc)
  3881. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_OUT cmds, rc=%d\n",
  3882. panel->name, rc);
  3883. mutex_unlock(&panel->panel_lock);
  3884. return rc;
  3885. }
  3886. int dsi_panel_switch_video_mode_in(struct dsi_panel *panel)
  3887. {
  3888. int rc = 0;
  3889. if (!panel) {
  3890. DSI_ERR("Invalid params\n");
  3891. return -EINVAL;
  3892. }
  3893. mutex_lock(&panel->panel_lock);
  3894. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_IN);
  3895. if (rc)
  3896. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_IN cmds, rc=%d\n",
  3897. panel->name, rc);
  3898. mutex_unlock(&panel->panel_lock);
  3899. return rc;
  3900. }
  3901. int dsi_panel_switch_cmd_mode_in(struct dsi_panel *panel)
  3902. {
  3903. int rc = 0;
  3904. if (!panel) {
  3905. DSI_ERR("Invalid params\n");
  3906. return -EINVAL;
  3907. }
  3908. mutex_lock(&panel->panel_lock);
  3909. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_IN);
  3910. if (rc)
  3911. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_IN cmds, rc=%d\n",
  3912. panel->name, rc);
  3913. mutex_unlock(&panel->panel_lock);
  3914. return rc;
  3915. }
  3916. int dsi_panel_switch(struct dsi_panel *panel)
  3917. {
  3918. int rc = 0;
  3919. if (!panel) {
  3920. DSI_ERR("Invalid params\n");
  3921. return -EINVAL;
  3922. }
  3923. mutex_lock(&panel->panel_lock);
  3924. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3925. if (rc)
  3926. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3927. panel->name, rc);
  3928. mutex_unlock(&panel->panel_lock);
  3929. return rc;
  3930. }
  3931. int dsi_panel_post_switch(struct dsi_panel *panel)
  3932. {
  3933. int rc = 0;
  3934. if (!panel) {
  3935. DSI_ERR("Invalid params\n");
  3936. return -EINVAL;
  3937. }
  3938. mutex_lock(&panel->panel_lock);
  3939. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3940. if (rc)
  3941. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3942. panel->name, rc);
  3943. mutex_unlock(&panel->panel_lock);
  3944. return rc;
  3945. }
  3946. int dsi_panel_enable(struct dsi_panel *panel)
  3947. {
  3948. int rc = 0;
  3949. if (!panel) {
  3950. DSI_ERR("Invalid params\n");
  3951. return -EINVAL;
  3952. }
  3953. mutex_lock(&panel->panel_lock);
  3954. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3955. if (rc) {
  3956. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3957. panel->name, rc);
  3958. goto error;
  3959. }
  3960. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  3961. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_ON);
  3962. if (rc) {
  3963. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_ON cmds, rc=%d\n",
  3964. panel->name, rc);
  3965. goto error;
  3966. }
  3967. } else if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3968. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_ON);
  3969. if (rc) {
  3970. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_ON cmds, rc=%d\n",
  3971. panel->name, rc);
  3972. goto error;
  3973. }
  3974. }
  3975. panel->panel_initialized = true;
  3976. error:
  3977. mutex_unlock(&panel->panel_lock);
  3978. return rc;
  3979. }
  3980. int dsi_panel_post_enable(struct dsi_panel *panel)
  3981. {
  3982. int rc = 0;
  3983. if (!panel) {
  3984. DSI_ERR("invalid params\n");
  3985. return -EINVAL;
  3986. }
  3987. mutex_lock(&panel->panel_lock);
  3988. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3989. if (rc) {
  3990. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3991. panel->name, rc);
  3992. goto error;
  3993. }
  3994. error:
  3995. mutex_unlock(&panel->panel_lock);
  3996. return rc;
  3997. }
  3998. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3999. {
  4000. int rc = 0;
  4001. if (!panel) {
  4002. DSI_ERR("invalid params\n");
  4003. return -EINVAL;
  4004. }
  4005. mutex_lock(&panel->panel_lock);
  4006. if (gpio_is_valid(panel->bl_config.en_gpio))
  4007. gpio_set_value(panel->bl_config.en_gpio, 0);
  4008. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  4009. if (rc) {
  4010. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  4011. panel->name, rc);
  4012. goto error;
  4013. }
  4014. error:
  4015. mutex_unlock(&panel->panel_lock);
  4016. return rc;
  4017. }
  4018. int dsi_panel_disable(struct dsi_panel *panel)
  4019. {
  4020. int rc = 0;
  4021. if (!panel) {
  4022. DSI_ERR("invalid params\n");
  4023. return -EINVAL;
  4024. }
  4025. mutex_lock(&panel->panel_lock);
  4026. /* Avoid sending panel off commands when ESD recovery is underway */
  4027. if (!atomic_read(&panel->esd_recovery_pending)) {
  4028. /*
  4029. * Need to set IBB/AB regulator mode to STANDBY,
  4030. * if panel is going off from AOD mode.
  4031. */
  4032. if (dsi_panel_is_type_oled(panel) &&
  4033. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  4034. panel->power_mode == SDE_MODE_DPMS_LP2))
  4035. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  4036. "ibb", REGULATOR_MODE_STANDBY);
  4037. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  4038. if (rc) {
  4039. /*
  4040. * Sending panel off commands may fail when DSI
  4041. * controller is in a bad state. These failures can be
  4042. * ignored since controller will go for full reset on
  4043. * subsequent display enable anyway.
  4044. */
  4045. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  4046. panel->name, rc);
  4047. rc = 0;
  4048. }
  4049. }
  4050. panel->panel_initialized = false;
  4051. panel->power_mode = SDE_MODE_DPMS_OFF;
  4052. mutex_unlock(&panel->panel_lock);
  4053. return rc;
  4054. }
  4055. int dsi_panel_unprepare(struct dsi_panel *panel)
  4056. {
  4057. int rc = 0;
  4058. if (!panel) {
  4059. DSI_ERR("invalid params\n");
  4060. return -EINVAL;
  4061. }
  4062. mutex_lock(&panel->panel_lock);
  4063. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  4064. if (rc) {
  4065. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  4066. panel->name, rc);
  4067. goto error;
  4068. }
  4069. error:
  4070. mutex_unlock(&panel->panel_lock);
  4071. return rc;
  4072. }
  4073. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  4074. {
  4075. int rc = 0;
  4076. if (!panel) {
  4077. DSI_ERR("invalid params\n");
  4078. return -EINVAL;
  4079. }
  4080. mutex_lock(&panel->panel_lock);
  4081. rc = dsi_panel_power_off(panel);
  4082. if (rc) {
  4083. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  4084. panel->name, rc);
  4085. goto error;
  4086. }
  4087. error:
  4088. mutex_unlock(&panel->panel_lock);
  4089. return rc;
  4090. }