dp_main.c 286 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529453045314532453345344535453645374538453945404541454245434544454545464547454845494550455145524553455445554556455745584559456045614562456345644565456645674568456945704571457245734574457545764577457845794580458145824583458445854586458745884589459045914592459345944595459645974598459946004601460246034604460546064607460846094610461146124613461446154616461746184619462046214622462346244625462646274628462946304631463246334634463546364637463846394640464146424643464446454646464746484649465046514652465346544655465646574658465946604661466246634664466546664667466846694670467146724673467446754676467746784679468046814682468346844685468646874688468946904691469246934694469546964697469846994700470147024703470447054706470747084709471047114712471347144715471647174718471947204721472247234724472547264727472847294730473147324733473447354736473747384739474047414742474347444745474647474748474947504751475247534754475547564757475847594760476147624763476447654766476747684769477047714772477347744775477647774778477947804781478247834784478547864787478847894790479147924793479447954796479747984799480048014802480348044805480648074808480948104811481248134814481548164817481848194820482148224823482448254826482748284829483048314832483348344835483648374838483948404841484248434844484548464847484848494850485148524853485448554856485748584859486048614862486348644865486648674868486948704871487248734874487548764877487848794880488148824883488448854886488748884889489048914892489348944895489648974898489949004901490249034904490549064907490849094910491149124913491449154916491749184919492049214922492349244925492649274928492949304931493249334934493549364937493849394940494149424943494449454946494749484949495049514952495349544955495649574958495949604961496249634964496549664967496849694970497149724973497449754976497749784979498049814982498349844985498649874988498949904991499249934994499549964997499849995000500150025003500450055006500750085009501050115012501350145015501650175018501950205021502250235024502550265027502850295030503150325033503450355036503750385039504050415042504350445045504650475048504950505051505250535054505550565057505850595060506150625063506450655066506750685069507050715072507350745075507650775078507950805081508250835084508550865087508850895090509150925093509450955096509750985099510051015102510351045105510651075108510951105111511251135114511551165117511851195120512151225123512451255126512751285129513051315132513351345135513651375138513951405141514251435144514551465147514851495150515151525153515451555156515751585159516051615162516351645165516651675168516951705171517251735174517551765177517851795180518151825183518451855186518751885189519051915192519351945195519651975198519952005201520252035204520552065207520852095210521152125213521452155216521752185219522052215222522352245225522652275228522952305231523252335234523552365237523852395240524152425243524452455246524752485249525052515252525352545255525652575258525952605261526252635264526552665267526852695270527152725273527452755276527752785279528052815282528352845285528652875288528952905291529252935294529552965297529852995300530153025303530453055306530753085309531053115312531353145315531653175318531953205321532253235324532553265327532853295330533153325333533453355336533753385339534053415342534353445345534653475348534953505351535253535354535553565357535853595360536153625363536453655366536753685369537053715372537353745375537653775378537953805381538253835384538553865387538853895390539153925393539453955396539753985399540054015402540354045405540654075408540954105411541254135414541554165417541854195420542154225423542454255426542754285429543054315432543354345435543654375438543954405441544254435444544554465447544854495450545154525453545454555456545754585459546054615462546354645465546654675468546954705471547254735474547554765477547854795480548154825483548454855486548754885489549054915492549354945495549654975498549955005501550255035504550555065507550855095510551155125513551455155516551755185519552055215522552355245525552655275528552955305531553255335534553555365537553855395540554155425543554455455546554755485549555055515552555355545555555655575558555955605561556255635564556555665567556855695570557155725573557455755576557755785579558055815582558355845585558655875588558955905591559255935594559555965597559855995600560156025603560456055606560756085609561056115612561356145615561656175618561956205621562256235624562556265627562856295630563156325633563456355636563756385639564056415642564356445645564656475648564956505651565256535654565556565657565856595660566156625663566456655666566756685669567056715672567356745675567656775678567956805681568256835684568556865687568856895690569156925693569456955696569756985699570057015702570357045705570657075708570957105711571257135714571557165717571857195720572157225723572457255726572757285729573057315732573357345735573657375738573957405741574257435744574557465747574857495750575157525753575457555756575757585759576057615762576357645765576657675768576957705771577257735774577557765777577857795780578157825783578457855786578757885789579057915792579357945795579657975798579958005801580258035804580558065807580858095810581158125813581458155816581758185819582058215822582358245825582658275828582958305831583258335834583558365837583858395840584158425843584458455846584758485849585058515852585358545855585658575858585958605861586258635864586558665867586858695870587158725873587458755876587758785879588058815882588358845885588658875888588958905891589258935894589558965897589858995900590159025903590459055906590759085909591059115912591359145915591659175918591959205921592259235924592559265927592859295930593159325933593459355936593759385939594059415942594359445945594659475948594959505951595259535954595559565957595859595960596159625963596459655966596759685969597059715972597359745975597659775978597959805981598259835984598559865987598859895990599159925993599459955996599759985999600060016002600360046005600660076008600960106011601260136014601560166017601860196020602160226023602460256026602760286029603060316032603360346035603660376038603960406041604260436044604560466047604860496050605160526053605460556056605760586059606060616062606360646065606660676068606960706071607260736074607560766077607860796080608160826083608460856086608760886089609060916092609360946095609660976098609961006101610261036104610561066107610861096110611161126113611461156116611761186119612061216122612361246125612661276128612961306131613261336134613561366137613861396140614161426143614461456146614761486149615061516152615361546155615661576158615961606161616261636164616561666167616861696170617161726173617461756176617761786179618061816182618361846185618661876188618961906191619261936194619561966197619861996200620162026203620462056206620762086209621062116212621362146215621662176218621962206221622262236224622562266227622862296230623162326233623462356236623762386239624062416242624362446245624662476248624962506251625262536254625562566257625862596260626162626263626462656266626762686269627062716272627362746275627662776278627962806281628262836284628562866287628862896290629162926293629462956296629762986299630063016302630363046305630663076308630963106311631263136314631563166317631863196320632163226323632463256326632763286329633063316332633363346335633663376338633963406341634263436344634563466347634863496350635163526353635463556356635763586359636063616362636363646365636663676368636963706371637263736374637563766377637863796380638163826383638463856386638763886389639063916392639363946395639663976398639964006401640264036404640564066407640864096410641164126413641464156416641764186419642064216422642364246425642664276428642964306431643264336434643564366437643864396440644164426443644464456446644764486449645064516452645364546455645664576458645964606461646264636464646564666467646864696470647164726473647464756476647764786479648064816482648364846485648664876488648964906491649264936494649564966497649864996500650165026503650465056506650765086509651065116512651365146515651665176518651965206521652265236524652565266527652865296530653165326533653465356536653765386539654065416542654365446545654665476548654965506551655265536554655565566557655865596560656165626563656465656566656765686569657065716572657365746575657665776578657965806581658265836584658565866587658865896590659165926593659465956596659765986599660066016602660366046605660666076608660966106611661266136614661566166617661866196620662166226623662466256626662766286629663066316632663366346635663666376638663966406641664266436644664566466647664866496650665166526653665466556656665766586659666066616662666366646665666666676668666966706671667266736674667566766677667866796680668166826683668466856686668766886689669066916692669366946695669666976698669967006701670267036704670567066707670867096710671167126713671467156716671767186719672067216722672367246725672667276728672967306731673267336734673567366737673867396740674167426743674467456746674767486749675067516752675367546755675667576758675967606761676267636764676567666767676867696770677167726773677467756776677767786779678067816782678367846785678667876788678967906791679267936794679567966797679867996800680168026803680468056806680768086809681068116812681368146815681668176818681968206821682268236824682568266827682868296830683168326833683468356836683768386839684068416842684368446845684668476848684968506851685268536854685568566857685868596860686168626863686468656866686768686869687068716872687368746875687668776878687968806881688268836884688568866887688868896890689168926893689468956896689768986899690069016902690369046905690669076908690969106911691269136914691569166917691869196920692169226923692469256926692769286929693069316932693369346935693669376938693969406941694269436944694569466947694869496950695169526953695469556956695769586959696069616962696369646965696669676968696969706971697269736974697569766977697869796980698169826983698469856986698769886989699069916992699369946995699669976998699970007001700270037004700570067007700870097010701170127013701470157016701770187019702070217022702370247025702670277028702970307031703270337034703570367037703870397040704170427043704470457046704770487049705070517052705370547055705670577058705970607061706270637064706570667067706870697070707170727073707470757076707770787079708070817082708370847085708670877088708970907091709270937094709570967097709870997100710171027103710471057106710771087109711071117112711371147115711671177118711971207121712271237124712571267127712871297130713171327133713471357136713771387139714071417142714371447145714671477148714971507151715271537154715571567157715871597160716171627163716471657166716771687169717071717172717371747175717671777178717971807181718271837184718571867187718871897190719171927193719471957196719771987199720072017202720372047205720672077208720972107211721272137214721572167217721872197220722172227223722472257226722772287229723072317232723372347235723672377238723972407241724272437244724572467247724872497250725172527253725472557256725772587259726072617262726372647265726672677268726972707271727272737274727572767277727872797280728172827283728472857286728772887289729072917292729372947295729672977298729973007301730273037304730573067307730873097310731173127313731473157316731773187319732073217322732373247325732673277328732973307331733273337334733573367337733873397340734173427343734473457346734773487349735073517352735373547355735673577358735973607361736273637364736573667367736873697370737173727373737473757376737773787379738073817382738373847385738673877388738973907391739273937394739573967397739873997400740174027403740474057406740774087409741074117412741374147415741674177418741974207421742274237424742574267427742874297430743174327433743474357436743774387439744074417442744374447445744674477448744974507451745274537454745574567457745874597460746174627463746474657466746774687469747074717472747374747475747674777478747974807481748274837484748574867487748874897490749174927493749474957496749774987499750075017502750375047505750675077508750975107511751275137514751575167517751875197520752175227523752475257526752775287529753075317532753375347535753675377538753975407541754275437544754575467547754875497550755175527553755475557556755775587559756075617562756375647565756675677568756975707571757275737574757575767577757875797580758175827583758475857586758775887589759075917592759375947595759675977598759976007601760276037604760576067607760876097610761176127613761476157616761776187619762076217622762376247625762676277628762976307631763276337634763576367637763876397640764176427643764476457646764776487649765076517652765376547655765676577658765976607661766276637664766576667667766876697670767176727673767476757676767776787679768076817682768376847685768676877688768976907691769276937694769576967697769876997700770177027703770477057706770777087709771077117712771377147715771677177718771977207721772277237724772577267727772877297730773177327733773477357736773777387739774077417742774377447745774677477748774977507751775277537754775577567757775877597760776177627763776477657766776777687769777077717772777377747775777677777778777977807781778277837784778577867787778877897790779177927793779477957796779777987799780078017802780378047805780678077808780978107811781278137814781578167817781878197820782178227823782478257826782778287829783078317832783378347835783678377838783978407841784278437844784578467847784878497850785178527853785478557856785778587859786078617862786378647865786678677868786978707871787278737874787578767877787878797880788178827883788478857886788778887889789078917892789378947895789678977898789979007901790279037904790579067907790879097910791179127913791479157916791779187919792079217922792379247925792679277928792979307931793279337934793579367937793879397940794179427943794479457946794779487949795079517952795379547955795679577958795979607961796279637964796579667967796879697970797179727973797479757976797779787979798079817982798379847985798679877988798979907991799279937994799579967997799879998000800180028003800480058006800780088009801080118012801380148015801680178018801980208021802280238024802580268027802880298030803180328033803480358036803780388039804080418042804380448045804680478048804980508051805280538054805580568057805880598060806180628063806480658066806780688069807080718072807380748075807680778078807980808081808280838084808580868087808880898090809180928093809480958096809780988099810081018102810381048105810681078108810981108111811281138114811581168117811881198120812181228123812481258126812781288129813081318132813381348135813681378138813981408141814281438144814581468147814881498150815181528153815481558156815781588159816081618162816381648165816681678168816981708171817281738174817581768177817881798180818181828183818481858186818781888189819081918192819381948195819681978198819982008201820282038204820582068207820882098210821182128213821482158216821782188219822082218222822382248225822682278228822982308231823282338234823582368237823882398240824182428243824482458246824782488249825082518252825382548255825682578258825982608261826282638264826582668267826882698270827182728273827482758276827782788279828082818282828382848285828682878288828982908291829282938294829582968297829882998300830183028303830483058306830783088309831083118312831383148315831683178318831983208321832283238324832583268327832883298330833183328333833483358336833783388339834083418342834383448345834683478348834983508351835283538354835583568357835883598360836183628363836483658366836783688369837083718372837383748375837683778378837983808381838283838384838583868387838883898390839183928393839483958396839783988399840084018402840384048405840684078408840984108411841284138414841584168417841884198420842184228423842484258426842784288429843084318432843384348435843684378438843984408441844284438444844584468447844884498450845184528453845484558456845784588459846084618462846384648465846684678468846984708471847284738474847584768477847884798480848184828483848484858486848784888489849084918492849384948495849684978498849985008501850285038504850585068507850885098510851185128513851485158516851785188519852085218522852385248525852685278528852985308531853285338534853585368537853885398540854185428543854485458546854785488549855085518552855385548555855685578558855985608561856285638564856585668567856885698570857185728573857485758576857785788579858085818582858385848585858685878588858985908591859285938594859585968597859885998600860186028603860486058606860786088609861086118612861386148615861686178618861986208621862286238624862586268627862886298630863186328633863486358636863786388639864086418642864386448645864686478648864986508651865286538654865586568657865886598660866186628663866486658666866786688669867086718672867386748675867686778678867986808681868286838684868586868687868886898690869186928693869486958696869786988699870087018702870387048705870687078708870987108711871287138714871587168717871887198720872187228723872487258726872787288729873087318732873387348735873687378738873987408741874287438744874587468747874887498750875187528753875487558756875787588759876087618762876387648765876687678768876987708771877287738774877587768777877887798780878187828783878487858786878787888789879087918792879387948795879687978798879988008801880288038804880588068807880888098810881188128813881488158816881788188819882088218822882388248825882688278828882988308831883288338834883588368837883888398840884188428843884488458846884788488849885088518852885388548855885688578858885988608861886288638864886588668867886888698870887188728873887488758876887788788879888088818882888388848885888688878888888988908891889288938894889588968897889888998900890189028903890489058906890789088909891089118912891389148915891689178918891989208921892289238924892589268927892889298930893189328933893489358936893789388939894089418942894389448945894689478948894989508951895289538954895589568957895889598960896189628963896489658966896789688969897089718972897389748975897689778978897989808981898289838984898589868987898889898990899189928993899489958996899789988999900090019002900390049005900690079008900990109011901290139014901590169017901890199020902190229023902490259026902790289029903090319032903390349035903690379038903990409041904290439044904590469047904890499050905190529053905490559056905790589059906090619062906390649065906690679068906990709071907290739074907590769077907890799080908190829083908490859086908790889089909090919092909390949095909690979098909991009101910291039104910591069107910891099110911191129113911491159116911791189119912091219122912391249125912691279128912991309131913291339134913591369137913891399140914191429143914491459146914791489149915091519152915391549155915691579158915991609161916291639164916591669167916891699170917191729173917491759176917791789179918091819182918391849185918691879188918991909191919291939194919591969197919891999200920192029203920492059206920792089209921092119212921392149215921692179218921992209221922292239224922592269227922892299230923192329233923492359236923792389239924092419242924392449245924692479248924992509251925292539254925592569257925892599260926192629263926492659266926792689269927092719272927392749275927692779278927992809281928292839284928592869287928892899290929192929293929492959296929792989299930093019302930393049305930693079308930993109311931293139314931593169317931893199320932193229323932493259326932793289329933093319332933393349335933693379338933993409341934293439344934593469347934893499350935193529353935493559356935793589359936093619362936393649365936693679368936993709371937293739374937593769377937893799380938193829383938493859386938793889389939093919392939393949395939693979398939994009401940294039404940594069407940894099410941194129413941494159416941794189419942094219422942394249425942694279428942994309431943294339434943594369437943894399440944194429443944494459446944794489449945094519452945394549455945694579458945994609461946294639464946594669467946894699470947194729473947494759476947794789479948094819482948394849485948694879488948994909491949294939494949594969497949894999500950195029503950495059506950795089509951095119512951395149515951695179518951995209521952295239524952595269527952895299530953195329533953495359536953795389539954095419542954395449545954695479548954995509551955295539554955595569557955895599560956195629563956495659566956795689569957095719572957395749575957695779578957995809581958295839584958595869587958895899590959195929593959495959596959795989599960096019602960396049605960696079608960996109611961296139614961596169617961896199620962196229623962496259626962796289629963096319632963396349635963696379638963996409641964296439644964596469647964896499650965196529653965496559656965796589659966096619662966396649665966696679668966996709671967296739674967596769677967896799680968196829683968496859686968796889689969096919692969396949695969696979698969997009701970297039704970597069707970897099710971197129713971497159716971797189719972097219722972397249725972697279728972997309731973297339734973597369737973897399740974197429743974497459746974797489749975097519752975397549755975697579758975997609761976297639764976597669767976897699770977197729773977497759776977797789779978097819782978397849785978697879788978997909791979297939794979597969797979897999800980198029803980498059806980798089809981098119812981398149815981698179818981998209821982298239824982598269827982898299830983198329833983498359836983798389839984098419842984398449845984698479848984998509851985298539854985598569857985898599860986198629863986498659866986798689869987098719872987398749875987698779878987998809881988298839884988598869887988898899890989198929893989498959896989798989899990099019902990399049905990699079908990999109911991299139914991599169917991899199920992199229923992499259926992799289929993099319932993399349935993699379938993999409941994299439944994599469947994899499950995199529953995499559956995799589959996099619962996399649965996699679968996999709971997299739974997599769977997899799980998199829983998499859986998799889989999099919992999399949995999699979998999910000100011000210003100041000510006100071000810009100101001110012100131001410015100161001710018100191002010021100221002310024100251002610027100281002910030100311003210033100341003510036100371003810039100401004110042100431004410045100461004710048100491005010051100521005310054100551005610057100581005910060100611006210063100641006510066100671006810069100701007110072100731007410075100761007710078100791008010081100821008310084100851008610087100881008910090100911009210093100941009510096100971009810099101001010110102101031010410105101061010710108101091011010111101121011310114101151011610117101181011910120101211012210123101241012510126101271012810129101301013110132101331013410135101361013710138101391014010141101421014310144101451014610147101481014910150101511015210153101541015510156101571015810159101601016110162101631016410165101661016710168101691017010171101721017310174101751017610177101781017910180101811018210183101841018510186101871018810189101901019110192101931019410195101961019710198101991020010201102021020310204102051020610207102081020910210102111021210213102141021510216102171021810219102201022110222102231022410225102261022710228102291023010231102321023310234102351023610237102381023910240102411024210243102441024510246102471024810249102501025110252102531025410255102561025710258102591026010261102621026310264102651026610267102681026910270102711027210273102741027510276102771027810279102801028110282102831028410285102861028710288102891029010291102921029310294102951029610297102981029910300103011030210303103041030510306103071030810309103101031110312103131031410315103161031710318103191032010321103221032310324103251032610327103281032910330103311033210333103341033510336103371033810339103401034110342103431034410345103461034710348103491035010351103521035310354103551035610357103581035910360103611036210363103641036510366103671036810369103701037110372103731037410375103761037710378103791038010381103821038310384103851038610387103881038910390103911039210393103941039510396103971039810399104001040110402104031040410405104061040710408104091041010411104121041310414104151041610417104181041910420104211042210423104241042510426104271042810429104301043110432104331043410435104361043710438104391044010441104421044310444104451044610447104481044910450104511045210453104541045510456104571045810459104601046110462104631046410465104661046710468104691047010471104721047310474104751047610477104781047910480104811048210483104841048510486104871048810489104901049110492104931049410495104961049710498104991050010501105021050310504
  1. /*
  2. * Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <qdf_module.h>
  23. #include <hal_hw_headers.h>
  24. #include <hal_api.h>
  25. #include <hif.h>
  26. #include <htt.h>
  27. #include <wdi_event.h>
  28. #include <queue.h>
  29. #include "dp_htt.h"
  30. #include "dp_types.h"
  31. #include "dp_internal.h"
  32. #include "dp_tx.h"
  33. #include "dp_tx_desc.h"
  34. #include "dp_rx.h"
  35. #ifdef DP_RATETABLE_SUPPORT
  36. #include "dp_ratetable.h"
  37. #endif
  38. #include <cdp_txrx_handle.h>
  39. #include <wlan_cfg.h>
  40. #include "cdp_txrx_cmn_struct.h"
  41. #include "cdp_txrx_stats_struct.h"
  42. #include "cdp_txrx_cmn_reg.h"
  43. #include <qdf_util.h>
  44. #include "dp_peer.h"
  45. #include "dp_rx_mon.h"
  46. #include "htt_stats.h"
  47. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  48. #include "cfg_ucfg_api.h"
  49. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  50. #include "cdp_txrx_flow_ctrl_v2.h"
  51. #else
  52. static inline void
  53. cdp_dump_flow_pool_info(struct cdp_soc_t *soc)
  54. {
  55. return;
  56. }
  57. #endif
  58. #include "dp_ipa.h"
  59. #include "dp_cal_client_api.h"
  60. #ifdef CONFIG_MCL
  61. extern int con_mode_monitor;
  62. #ifndef REMOVE_PKT_LOG
  63. #include <pktlog_ac_api.h>
  64. #include <pktlog_ac.h>
  65. #endif
  66. #endif
  67. void *dp_soc_init(void *dpsoc, HTC_HANDLE htc_handle, void *hif_handle);
  68. static void dp_pdev_detach(struct cdp_pdev *txrx_pdev, int force);
  69. static struct dp_soc *
  70. dp_soc_attach(void *ctrl_psoc, HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  71. struct ol_if_ops *ol_ops, uint16_t device_id);
  72. static void dp_pktlogmod_exit(struct dp_pdev *handle);
  73. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  74. uint8_t *peer_mac_addr,
  75. struct cdp_ctrl_objmgr_peer *ctrl_peer);
  76. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap);
  77. static void dp_ppdu_ring_reset(struct dp_pdev *pdev);
  78. static void dp_ppdu_ring_cfg(struct dp_pdev *pdev);
  79. #ifdef ENABLE_VERBOSE_DEBUG
  80. bool is_dp_verbose_debug_enabled;
  81. #endif
  82. #define DP_INTR_POLL_TIMER_MS 10
  83. /* Generic AST entry aging timer value */
  84. #define DP_AST_AGING_TIMER_DEFAULT_MS 1000
  85. /* WDS AST entry aging timer value */
  86. #define DP_WDS_AST_AGING_TIMER_DEFAULT_MS 120000
  87. #define DP_WDS_AST_AGING_TIMER_CNT \
  88. ((DP_WDS_AST_AGING_TIMER_DEFAULT_MS / DP_AST_AGING_TIMER_DEFAULT_MS) - 1)
  89. #define DP_MCS_LENGTH (6*MAX_MCS)
  90. #define DP_NSS_LENGTH (6*SS_COUNT)
  91. #define DP_MU_GROUP_SHOW 16
  92. #define DP_MU_GROUP_LENGTH (6 * DP_MU_GROUP_SHOW)
  93. #define DP_RXDMA_ERR_LENGTH (6*HAL_RXDMA_ERR_MAX)
  94. #define DP_MAX_INT_CONTEXTS_STRING_LENGTH (6 * WLAN_CFG_INT_NUM_CONTEXTS)
  95. #define DP_REO_ERR_LENGTH (6*HAL_REO_ERR_MAX)
  96. #define DP_MAX_MCS_STRING_LEN 30
  97. #define DP_CURR_FW_STATS_AVAIL 19
  98. #define DP_HTT_DBG_EXT_STATS_MAX 256
  99. #define DP_MAX_SLEEP_TIME 100
  100. #ifndef QCA_WIFI_3_0_EMU
  101. #define SUSPEND_DRAIN_WAIT 500
  102. #else
  103. #define SUSPEND_DRAIN_WAIT 3000
  104. #endif
  105. #ifdef IPA_OFFLOAD
  106. /* Exclude IPA rings from the interrupt context */
  107. #define TX_RING_MASK_VAL 0xb
  108. #define RX_RING_MASK_VAL 0x7
  109. #else
  110. #define TX_RING_MASK_VAL 0xF
  111. #define RX_RING_MASK_VAL 0xF
  112. #endif
  113. #define STR_MAXLEN 64
  114. #define DP_PPDU_STATS_CFG_ALL 0xFFFF
  115. /* PPDU stats mask sent to FW to enable enhanced stats */
  116. #define DP_PPDU_STATS_CFG_ENH_STATS 0xE67
  117. /* PPDU stats mask sent to FW to support debug sniffer feature */
  118. #define DP_PPDU_STATS_CFG_SNIFFER 0x2FFF
  119. /* PPDU stats mask sent to FW to support BPR feature*/
  120. #define DP_PPDU_STATS_CFG_BPR 0x2000
  121. /* PPDU stats mask sent to FW to support BPR and enhanced stats feature */
  122. #define DP_PPDU_STATS_CFG_BPR_ENH (DP_PPDU_STATS_CFG_BPR | \
  123. DP_PPDU_STATS_CFG_ENH_STATS)
  124. /* PPDU stats mask sent to FW to support BPR and pcktlog stats feature */
  125. #define DP_PPDU_STATS_CFG_BPR_PKTLOG (DP_PPDU_STATS_CFG_BPR | \
  126. DP_PPDU_TXLITE_STATS_BITMASK_CFG)
  127. #define RNG_ERR "SRNG setup failed for"
  128. /**
  129. * default_dscp_tid_map - Default DSCP-TID mapping
  130. *
  131. * DSCP TID
  132. * 000000 0
  133. * 001000 1
  134. * 010000 2
  135. * 011000 3
  136. * 100000 4
  137. * 101000 5
  138. * 110000 6
  139. * 111000 7
  140. */
  141. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  142. 0, 0, 0, 0, 0, 0, 0, 0,
  143. 1, 1, 1, 1, 1, 1, 1, 1,
  144. 2, 2, 2, 2, 2, 2, 2, 2,
  145. 3, 3, 3, 3, 3, 3, 3, 3,
  146. 4, 4, 4, 4, 4, 4, 4, 4,
  147. 5, 5, 5, 5, 5, 5, 5, 5,
  148. 6, 6, 6, 6, 6, 6, 6, 6,
  149. 7, 7, 7, 7, 7, 7, 7, 7,
  150. };
  151. /*
  152. * struct dp_rate_debug
  153. *
  154. * @mcs_type: print string for a given mcs
  155. * @valid: valid mcs rate?
  156. */
  157. struct dp_rate_debug {
  158. char mcs_type[DP_MAX_MCS_STRING_LEN];
  159. uint8_t valid;
  160. };
  161. #define MCS_VALID 1
  162. #define MCS_INVALID 0
  163. static const struct dp_rate_debug dp_rate_string[DOT11_MAX][MAX_MCS] = {
  164. {
  165. {"OFDM 48 Mbps", MCS_VALID},
  166. {"OFDM 24 Mbps", MCS_VALID},
  167. {"OFDM 12 Mbps", MCS_VALID},
  168. {"OFDM 6 Mbps ", MCS_VALID},
  169. {"OFDM 54 Mbps", MCS_VALID},
  170. {"OFDM 36 Mbps", MCS_VALID},
  171. {"OFDM 18 Mbps", MCS_VALID},
  172. {"OFDM 9 Mbps ", MCS_VALID},
  173. {"INVALID ", MCS_INVALID},
  174. {"INVALID ", MCS_INVALID},
  175. {"INVALID ", MCS_INVALID},
  176. {"INVALID ", MCS_INVALID},
  177. {"INVALID ", MCS_VALID},
  178. },
  179. {
  180. {"CCK 11 Mbps Long ", MCS_VALID},
  181. {"CCK 5.5 Mbps Long ", MCS_VALID},
  182. {"CCK 2 Mbps Long ", MCS_VALID},
  183. {"CCK 1 Mbps Long ", MCS_VALID},
  184. {"CCK 11 Mbps Short ", MCS_VALID},
  185. {"CCK 5.5 Mbps Short", MCS_VALID},
  186. {"CCK 2 Mbps Short ", MCS_VALID},
  187. {"INVALID ", MCS_INVALID},
  188. {"INVALID ", MCS_INVALID},
  189. {"INVALID ", MCS_INVALID},
  190. {"INVALID ", MCS_INVALID},
  191. {"INVALID ", MCS_INVALID},
  192. {"INVALID ", MCS_VALID},
  193. },
  194. {
  195. {"HT MCS 0 (BPSK 1/2) ", MCS_VALID},
  196. {"HT MCS 1 (QPSK 1/2) ", MCS_VALID},
  197. {"HT MCS 2 (QPSK 3/4) ", MCS_VALID},
  198. {"HT MCS 3 (16-QAM 1/2)", MCS_VALID},
  199. {"HT MCS 4 (16-QAM 3/4)", MCS_VALID},
  200. {"HT MCS 5 (64-QAM 2/3)", MCS_VALID},
  201. {"HT MCS 6 (64-QAM 3/4)", MCS_VALID},
  202. {"HT MCS 7 (64-QAM 5/6)", MCS_VALID},
  203. {"INVALID ", MCS_INVALID},
  204. {"INVALID ", MCS_INVALID},
  205. {"INVALID ", MCS_INVALID},
  206. {"INVALID ", MCS_INVALID},
  207. {"INVALID ", MCS_VALID},
  208. },
  209. {
  210. {"VHT MCS 0 (BPSK 1/2) ", MCS_VALID},
  211. {"VHT MCS 1 (QPSK 1/2) ", MCS_VALID},
  212. {"VHT MCS 2 (QPSK 3/4) ", MCS_VALID},
  213. {"VHT MCS 3 (16-QAM 1/2) ", MCS_VALID},
  214. {"VHT MCS 4 (16-QAM 3/4) ", MCS_VALID},
  215. {"VHT MCS 5 (64-QAM 2/3) ", MCS_VALID},
  216. {"VHT MCS 6 (64-QAM 3/4) ", MCS_VALID},
  217. {"VHT MCS 7 (64-QAM 5/6) ", MCS_VALID},
  218. {"VHT MCS 8 (256-QAM 3/4) ", MCS_VALID},
  219. {"VHT MCS 9 (256-QAM 5/6) ", MCS_VALID},
  220. {"VHT MCS 10 (1024-QAM 3/4)", MCS_VALID},
  221. {"VHT MCS 11 (1024-QAM 5/6)", MCS_VALID},
  222. {"INVALID ", MCS_VALID},
  223. },
  224. {
  225. {"HE MCS 0 (BPSK 1/2) ", MCS_VALID},
  226. {"HE MCS 1 (QPSK 1/2) ", MCS_VALID},
  227. {"HE MCS 2 (QPSK 3/4) ", MCS_VALID},
  228. {"HE MCS 3 (16-QAM 1/2) ", MCS_VALID},
  229. {"HE MCS 4 (16-QAM 3/4) ", MCS_VALID},
  230. {"HE MCS 5 (64-QAM 2/3) ", MCS_VALID},
  231. {"HE MCS 6 (64-QAM 3/4) ", MCS_VALID},
  232. {"HE MCS 7 (64-QAM 5/6) ", MCS_VALID},
  233. {"HE MCS 8 (256-QAM 3/4) ", MCS_VALID},
  234. {"HE MCS 9 (256-QAM 5/6) ", MCS_VALID},
  235. {"HE MCS 10 (1024-QAM 3/4)", MCS_VALID},
  236. {"HE MCS 11 (1024-QAM 5/6)", MCS_VALID},
  237. {"INVALID ", MCS_VALID},
  238. }
  239. };
  240. /**
  241. * dp_cpu_ring_map_type - dp tx cpu ring map
  242. * @DP_NSS_DEFAULT_MAP: Default mode with no NSS offloaded
  243. * @DP_NSS_FIRST_RADIO_OFFLOADED_MAP: Only First Radio is offloaded
  244. * @DP_NSS_SECOND_RADIO_OFFLOADED_MAP: Only second radio is offloaded
  245. * @DP_NSS_DBDC_OFFLOADED_MAP: Both radios are offloaded
  246. * @DP_NSS_DBTC_OFFLOADED_MAP: All three radios are offloaded
  247. * @DP_NSS_CPU_RING_MAP_MAX: Max cpu ring map val
  248. */
  249. enum dp_cpu_ring_map_types {
  250. DP_NSS_DEFAULT_MAP,
  251. DP_NSS_FIRST_RADIO_OFFLOADED_MAP,
  252. DP_NSS_SECOND_RADIO_OFFLOADED_MAP,
  253. DP_NSS_DBDC_OFFLOADED_MAP,
  254. DP_NSS_DBTC_OFFLOADED_MAP,
  255. DP_NSS_CPU_RING_MAP_MAX
  256. };
  257. /**
  258. * @brief Cpu to tx ring map
  259. */
  260. #ifdef CONFIG_WIN
  261. static uint8_t
  262. dp_cpu_ring_map[DP_NSS_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  263. {0x0, 0x1, 0x2, 0x0, 0x0, 0x1, 0x2, 0x0, 0x0, 0x1, 0x2},
  264. {0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1},
  265. {0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0},
  266. {0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2},
  267. {0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3}
  268. };
  269. #else
  270. static uint8_t
  271. dp_cpu_ring_map[DP_NSS_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  272. {0x0, 0x1, 0x2, 0x0, 0x0, 0x1, 0x2},
  273. {0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1},
  274. {0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0},
  275. {0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2},
  276. {0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3}
  277. };
  278. #endif
  279. /**
  280. * @brief Select the type of statistics
  281. */
  282. enum dp_stats_type {
  283. STATS_FW = 0,
  284. STATS_HOST = 1,
  285. STATS_TYPE_MAX = 2,
  286. };
  287. /**
  288. * @brief General Firmware statistics options
  289. *
  290. */
  291. enum dp_fw_stats {
  292. TXRX_FW_STATS_INVALID = -1,
  293. };
  294. /**
  295. * dp_stats_mapping_table - Firmware and Host statistics
  296. * currently supported
  297. */
  298. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  299. {HTT_DBG_EXT_STATS_RESET, TXRX_HOST_STATS_INVALID},
  300. {HTT_DBG_EXT_STATS_PDEV_TX, TXRX_HOST_STATS_INVALID},
  301. {HTT_DBG_EXT_STATS_PDEV_RX, TXRX_HOST_STATS_INVALID},
  302. {HTT_DBG_EXT_STATS_PDEV_TX_HWQ, TXRX_HOST_STATS_INVALID},
  303. {HTT_DBG_EXT_STATS_PDEV_TX_SCHED, TXRX_HOST_STATS_INVALID},
  304. {HTT_DBG_EXT_STATS_PDEV_ERROR, TXRX_HOST_STATS_INVALID},
  305. {HTT_DBG_EXT_STATS_PDEV_TQM, TXRX_HOST_STATS_INVALID},
  306. {HTT_DBG_EXT_STATS_TQM_CMDQ, TXRX_HOST_STATS_INVALID},
  307. {HTT_DBG_EXT_STATS_TX_DE_INFO, TXRX_HOST_STATS_INVALID},
  308. {HTT_DBG_EXT_STATS_PDEV_TX_RATE, TXRX_HOST_STATS_INVALID},
  309. {HTT_DBG_EXT_STATS_PDEV_RX_RATE, TXRX_HOST_STATS_INVALID},
  310. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  311. {HTT_DBG_EXT_STATS_TX_SELFGEN_INFO, TXRX_HOST_STATS_INVALID},
  312. {HTT_DBG_EXT_STATS_TX_MU_HWQ, TXRX_HOST_STATS_INVALID},
  313. {HTT_DBG_EXT_STATS_RING_IF_INFO, TXRX_HOST_STATS_INVALID},
  314. {HTT_DBG_EXT_STATS_SRNG_INFO, TXRX_HOST_STATS_INVALID},
  315. {HTT_DBG_EXT_STATS_SFM_INFO, TXRX_HOST_STATS_INVALID},
  316. {HTT_DBG_EXT_STATS_PDEV_TX_MU, TXRX_HOST_STATS_INVALID},
  317. {HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST, TXRX_HOST_STATS_INVALID},
  318. /* Last ENUM for HTT FW STATS */
  319. {DP_HTT_DBG_EXT_STATS_MAX, TXRX_HOST_STATS_INVALID},
  320. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  321. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  322. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  323. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  324. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  325. {TXRX_FW_STATS_INVALID, TXRX_AST_STATS},
  326. {TXRX_FW_STATS_INVALID, TXRX_SRNG_PTR_STATS},
  327. {TXRX_FW_STATS_INVALID, TXRX_RX_MON_STATS},
  328. {TXRX_FW_STATS_INVALID, TXRX_REO_QUEUE_STATS},
  329. {TXRX_FW_STATS_INVALID, TXRX_SOC_CFG_PARAMS},
  330. {TXRX_FW_STATS_INVALID, TXRX_PDEV_CFG_PARAMS},
  331. };
  332. /* MCL specific functions */
  333. #ifdef CONFIG_MCL
  334. /**
  335. * dp_soc_get_mon_mask_for_interrupt_mode() - get mon mode mask for intr mode
  336. * @soc: pointer to dp_soc handle
  337. * @intr_ctx_num: interrupt context number for which mon mask is needed
  338. *
  339. * For MCL, monitor mode rings are being processed in timer contexts (polled).
  340. * This function is returning 0, since in interrupt mode(softirq based RX),
  341. * we donot want to process monitor mode rings in a softirq.
  342. *
  343. * So, in case packet log is enabled for SAP/STA/P2P modes,
  344. * regular interrupt processing will not process monitor mode rings. It would be
  345. * done in a separate timer context.
  346. *
  347. * Return: 0
  348. */
  349. static inline
  350. uint32_t dp_soc_get_mon_mask_for_interrupt_mode(struct dp_soc *soc, int intr_ctx_num)
  351. {
  352. return 0;
  353. }
  354. /*
  355. * dp_service_mon_rings()- timer to reap monitor rings
  356. * reqd as we are not getting ppdu end interrupts
  357. * @arg: SoC Handle
  358. *
  359. * Return:
  360. *
  361. */
  362. static void dp_service_mon_rings(void *arg)
  363. {
  364. struct dp_soc *soc = (struct dp_soc *)arg;
  365. int ring = 0, work_done, mac_id;
  366. struct dp_pdev *pdev = NULL;
  367. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  368. pdev = soc->pdev_list[ring];
  369. if (!pdev)
  370. continue;
  371. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  372. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  373. pdev->pdev_id);
  374. work_done = dp_mon_process(soc, mac_for_pdev,
  375. QCA_NAPI_BUDGET);
  376. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  377. FL("Reaped %d descs from Monitor rings"),
  378. work_done);
  379. }
  380. }
  381. qdf_timer_mod(&soc->mon_reap_timer, DP_INTR_POLL_TIMER_MS);
  382. }
  383. #ifndef REMOVE_PKT_LOG
  384. /**
  385. * dp_pkt_log_init() - API to initialize packet log
  386. * @ppdev: physical device handle
  387. * @scn: HIF context
  388. *
  389. * Return: none
  390. */
  391. void dp_pkt_log_init(struct cdp_pdev *ppdev, void *scn)
  392. {
  393. struct dp_pdev *handle = (struct dp_pdev *)ppdev;
  394. if (handle->pkt_log_init) {
  395. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  396. "%s: Packet log not initialized", __func__);
  397. return;
  398. }
  399. pktlog_sethandle(&handle->pl_dev, scn);
  400. pktlog_set_callback_regtype(PKTLOG_DEFAULT_CALLBACK_REGISTRATION);
  401. if (pktlogmod_init(scn)) {
  402. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  403. "%s: pktlogmod_init failed", __func__);
  404. handle->pkt_log_init = false;
  405. } else {
  406. handle->pkt_log_init = true;
  407. }
  408. }
  409. /**
  410. * dp_pkt_log_con_service() - connect packet log service
  411. * @ppdev: physical device handle
  412. * @scn: device context
  413. *
  414. * Return: none
  415. */
  416. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn)
  417. {
  418. struct dp_pdev *pdev = (struct dp_pdev *)ppdev;
  419. dp_pkt_log_init((struct cdp_pdev *)pdev, scn);
  420. pktlog_htc_attach();
  421. }
  422. /**
  423. * dp_get_num_rx_contexts() - get number of RX contexts
  424. * @soc_hdl: cdp opaque soc handle
  425. *
  426. * Return: number of RX contexts
  427. */
  428. static int dp_get_num_rx_contexts(struct cdp_soc_t *soc_hdl)
  429. {
  430. int i;
  431. int num_rx_contexts = 0;
  432. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  433. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  434. if (wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i))
  435. num_rx_contexts++;
  436. return num_rx_contexts;
  437. }
  438. /**
  439. * dp_pktlogmod_exit() - API to cleanup pktlog info
  440. * @handle: Pdev handle
  441. *
  442. * Return: none
  443. */
  444. static void dp_pktlogmod_exit(struct dp_pdev *handle)
  445. {
  446. void *scn = (void *)handle->soc->hif_handle;
  447. if (!scn) {
  448. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  449. "%s: Invalid hif(scn) handle", __func__);
  450. return;
  451. }
  452. pktlogmod_exit(scn);
  453. handle->pkt_log_init = false;
  454. }
  455. #endif
  456. #else
  457. static void dp_pktlogmod_exit(struct dp_pdev *handle) { }
  458. /**
  459. * dp_soc_get_mon_mask_for_interrupt_mode() - get mon mode mask for intr mode
  460. * @soc: pointer to dp_soc handle
  461. * @intr_ctx_num: interrupt context number for which mon mask is needed
  462. *
  463. * Return: mon mask value
  464. */
  465. static inline
  466. uint32_t dp_soc_get_mon_mask_for_interrupt_mode(struct dp_soc *soc, int intr_ctx_num)
  467. {
  468. return wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  469. }
  470. #endif
  471. /**
  472. * dp_get_dp_vdev_from_cdp_vdev() - get dp_vdev from cdp_vdev by type-casting
  473. * @cdp_opaque_vdev: pointer to cdp_vdev
  474. *
  475. * Return: pointer to dp_vdev
  476. */
  477. static
  478. struct dp_vdev *dp_get_dp_vdev_from_cdp_vdev(struct cdp_vdev *cdp_opaque_vdev)
  479. {
  480. return (struct dp_vdev *)cdp_opaque_vdev;
  481. }
  482. static int dp_peer_add_ast_wifi3(struct cdp_soc_t *soc_hdl,
  483. struct cdp_peer *peer_hdl,
  484. uint8_t *mac_addr,
  485. enum cdp_txrx_ast_entry_type type,
  486. uint32_t flags)
  487. {
  488. return dp_peer_add_ast((struct dp_soc *)soc_hdl,
  489. (struct dp_peer *)peer_hdl,
  490. mac_addr,
  491. type,
  492. flags);
  493. }
  494. static int dp_peer_update_ast_wifi3(struct cdp_soc_t *soc_hdl,
  495. struct cdp_peer *peer_hdl,
  496. uint8_t *wds_macaddr,
  497. uint32_t flags)
  498. {
  499. int status = -1;
  500. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  501. struct dp_ast_entry *ast_entry = NULL;
  502. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  503. qdf_spin_lock_bh(&soc->ast_lock);
  504. ast_entry = dp_peer_ast_hash_find_by_pdevid(soc, wds_macaddr,
  505. peer->vdev->pdev->pdev_id);
  506. if (ast_entry) {
  507. status = dp_peer_update_ast(soc,
  508. peer,
  509. ast_entry, flags);
  510. }
  511. qdf_spin_unlock_bh(&soc->ast_lock);
  512. return status;
  513. }
  514. /*
  515. * dp_wds_reset_ast_wifi3() - Reset the is_active param for ast entry
  516. * @soc_handle: Datapath SOC handle
  517. * @wds_macaddr: WDS entry MAC Address
  518. * Return: None
  519. */
  520. static void dp_wds_reset_ast_wifi3(struct cdp_soc_t *soc_hdl,
  521. uint8_t *wds_macaddr,
  522. uint8_t *peer_mac_addr,
  523. void *vdev_handle)
  524. {
  525. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  526. struct dp_ast_entry *ast_entry = NULL;
  527. struct dp_ast_entry *tmp_ast_entry;
  528. struct dp_peer *peer;
  529. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  530. struct dp_pdev *pdev;
  531. if (!vdev)
  532. return;
  533. pdev = vdev->pdev;
  534. if (peer_mac_addr) {
  535. peer = dp_peer_find_hash_find(soc, peer_mac_addr,
  536. 0, vdev->vdev_id);
  537. if (!peer)
  538. return;
  539. qdf_spin_lock_bh(&soc->ast_lock);
  540. DP_PEER_ITERATE_ASE_LIST(peer, ast_entry, tmp_ast_entry) {
  541. if ((ast_entry->type == CDP_TXRX_AST_TYPE_WDS_HM) ||
  542. (ast_entry->type == CDP_TXRX_AST_TYPE_WDS_HM_SEC))
  543. dp_peer_del_ast(soc, ast_entry);
  544. }
  545. qdf_spin_unlock_bh(&soc->ast_lock);
  546. dp_peer_unref_delete(peer);
  547. } else if (wds_macaddr) {
  548. qdf_spin_lock_bh(&soc->ast_lock);
  549. ast_entry = dp_peer_ast_hash_find_by_pdevid(soc, wds_macaddr,
  550. pdev->pdev_id);
  551. if (ast_entry) {
  552. if ((ast_entry->type == CDP_TXRX_AST_TYPE_WDS_HM) ||
  553. (ast_entry->type == CDP_TXRX_AST_TYPE_WDS_HM_SEC))
  554. dp_peer_del_ast(soc, ast_entry);
  555. }
  556. qdf_spin_unlock_bh(&soc->ast_lock);
  557. }
  558. }
  559. /*
  560. * dp_wds_reset_ast_table_wifi3() - Reset the is_active param for all ast entry
  561. * @soc: Datapath SOC handle
  562. *
  563. * Return: None
  564. */
  565. static void dp_wds_reset_ast_table_wifi3(struct cdp_soc_t *soc_hdl,
  566. void *vdev_hdl)
  567. {
  568. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  569. struct dp_pdev *pdev;
  570. struct dp_vdev *vdev;
  571. struct dp_peer *peer;
  572. struct dp_ast_entry *ase, *temp_ase;
  573. int i;
  574. qdf_spin_lock_bh(&soc->ast_lock);
  575. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  576. pdev = soc->pdev_list[i];
  577. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  578. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  579. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  580. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  581. if ((ase->type ==
  582. CDP_TXRX_AST_TYPE_WDS_HM) ||
  583. (ase->type ==
  584. CDP_TXRX_AST_TYPE_WDS_HM_SEC))
  585. dp_peer_del_ast(soc, ase);
  586. }
  587. }
  588. }
  589. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  590. }
  591. qdf_spin_unlock_bh(&soc->ast_lock);
  592. }
  593. /*
  594. * dp_wds_flush_ast_table_wifi3() - Delete all wds and hmwds ast entry
  595. * @soc: Datapath SOC handle
  596. *
  597. * Return: None
  598. */
  599. static void dp_wds_flush_ast_table_wifi3(struct cdp_soc_t *soc_hdl)
  600. {
  601. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  602. struct dp_pdev *pdev;
  603. struct dp_vdev *vdev;
  604. struct dp_peer *peer;
  605. struct dp_ast_entry *ase, *temp_ase;
  606. int i;
  607. qdf_spin_lock_bh(&soc->ast_lock);
  608. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  609. pdev = soc->pdev_list[i];
  610. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  611. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  612. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  613. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  614. if ((ase->type ==
  615. CDP_TXRX_AST_TYPE_STATIC) ||
  616. (ase->type ==
  617. CDP_TXRX_AST_TYPE_SELF) ||
  618. (ase->type ==
  619. CDP_TXRX_AST_TYPE_STA_BSS))
  620. continue;
  621. dp_peer_del_ast(soc, ase);
  622. }
  623. }
  624. }
  625. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  626. }
  627. qdf_spin_unlock_bh(&soc->ast_lock);
  628. }
  629. /**
  630. * dp_peer_get_ast_info_by_soc_wifi3() - search the soc AST hash table
  631. * and return ast entry information
  632. * of first ast entry found in the
  633. * table with given mac address
  634. *
  635. * @soc : data path soc handle
  636. * @ast_mac_addr : AST entry mac address
  637. * @ast_entry_info : ast entry information
  638. *
  639. * return : true if ast entry found with ast_mac_addr
  640. * false if ast entry not found
  641. */
  642. static bool dp_peer_get_ast_info_by_soc_wifi3
  643. (struct cdp_soc_t *soc_hdl,
  644. uint8_t *ast_mac_addr,
  645. struct cdp_ast_entry_info *ast_entry_info)
  646. {
  647. struct dp_ast_entry *ast_entry;
  648. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  649. qdf_spin_lock_bh(&soc->ast_lock);
  650. ast_entry = dp_peer_ast_hash_find_soc(soc, ast_mac_addr);
  651. if (!ast_entry || !ast_entry->peer) {
  652. qdf_spin_unlock_bh(&soc->ast_lock);
  653. return false;
  654. }
  655. if (ast_entry->delete_in_progress && !ast_entry->callback) {
  656. qdf_spin_unlock_bh(&soc->ast_lock);
  657. return false;
  658. }
  659. ast_entry_info->type = ast_entry->type;
  660. ast_entry_info->pdev_id = ast_entry->pdev_id;
  661. ast_entry_info->vdev_id = ast_entry->vdev_id;
  662. ast_entry_info->peer_id = ast_entry->peer->peer_ids[0];
  663. qdf_mem_copy(&ast_entry_info->peer_mac_addr[0],
  664. &ast_entry->peer->mac_addr.raw[0],
  665. DP_MAC_ADDR_LEN);
  666. qdf_spin_unlock_bh(&soc->ast_lock);
  667. return true;
  668. }
  669. /**
  670. * dp_peer_get_ast_info_by_pdevid_wifi3() - search the soc AST hash table
  671. * and return ast entry information
  672. * if mac address and pdev_id matches
  673. *
  674. * @soc : data path soc handle
  675. * @ast_mac_addr : AST entry mac address
  676. * @pdev_id : pdev_id
  677. * @ast_entry_info : ast entry information
  678. *
  679. * return : true if ast entry found with ast_mac_addr
  680. * false if ast entry not found
  681. */
  682. static bool dp_peer_get_ast_info_by_pdevid_wifi3
  683. (struct cdp_soc_t *soc_hdl,
  684. uint8_t *ast_mac_addr,
  685. uint8_t pdev_id,
  686. struct cdp_ast_entry_info *ast_entry_info)
  687. {
  688. struct dp_ast_entry *ast_entry;
  689. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  690. qdf_spin_lock_bh(&soc->ast_lock);
  691. ast_entry = dp_peer_ast_hash_find_by_pdevid(soc, ast_mac_addr, pdev_id);
  692. if (!ast_entry || !ast_entry->peer) {
  693. qdf_spin_unlock_bh(&soc->ast_lock);
  694. return false;
  695. }
  696. if (ast_entry->delete_in_progress && !ast_entry->callback) {
  697. qdf_spin_unlock_bh(&soc->ast_lock);
  698. return false;
  699. }
  700. ast_entry_info->type = ast_entry->type;
  701. ast_entry_info->pdev_id = ast_entry->pdev_id;
  702. ast_entry_info->vdev_id = ast_entry->vdev_id;
  703. ast_entry_info->peer_id = ast_entry->peer->peer_ids[0];
  704. qdf_mem_copy(&ast_entry_info->peer_mac_addr[0],
  705. &ast_entry->peer->mac_addr.raw[0],
  706. DP_MAC_ADDR_LEN);
  707. qdf_spin_unlock_bh(&soc->ast_lock);
  708. return true;
  709. }
  710. /**
  711. * dp_peer_ast_entry_del_by_soc() - delete the ast entry from soc AST hash table
  712. * with given mac address
  713. *
  714. * @soc : data path soc handle
  715. * @ast_mac_addr : AST entry mac address
  716. * @callback : callback function to called on ast delete response from FW
  717. * @cookie : argument to be passed to callback
  718. *
  719. * return : QDF_STATUS_SUCCESS if ast entry found with ast_mac_addr and delete
  720. * is sent
  721. * QDF_STATUS_E_INVAL false if ast entry not found
  722. */
  723. static QDF_STATUS dp_peer_ast_entry_del_by_soc(struct cdp_soc_t *soc_handle,
  724. uint8_t *mac_addr,
  725. txrx_ast_free_cb callback,
  726. void *cookie)
  727. {
  728. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  729. struct dp_ast_entry *ast_entry;
  730. txrx_ast_free_cb cb = NULL;
  731. void *arg = NULL;
  732. qdf_spin_lock_bh(&soc->ast_lock);
  733. ast_entry = dp_peer_ast_hash_find_soc(soc, mac_addr);
  734. if (!ast_entry) {
  735. qdf_spin_unlock_bh(&soc->ast_lock);
  736. return -QDF_STATUS_E_INVAL;
  737. }
  738. if (ast_entry->callback) {
  739. cb = ast_entry->callback;
  740. arg = ast_entry->cookie;
  741. }
  742. ast_entry->callback = callback;
  743. ast_entry->cookie = cookie;
  744. /*
  745. * if delete_in_progress is set AST delete is sent to target
  746. * and host is waiting for response should not send delete
  747. * again
  748. */
  749. if (!ast_entry->delete_in_progress)
  750. dp_peer_del_ast(soc, ast_entry);
  751. qdf_spin_unlock_bh(&soc->ast_lock);
  752. if (cb) {
  753. cb(soc->ctrl_psoc,
  754. soc,
  755. arg,
  756. CDP_TXRX_AST_DELETE_IN_PROGRESS);
  757. }
  758. return QDF_STATUS_SUCCESS;
  759. }
  760. /**
  761. * dp_peer_ast_entry_del_by_pdev() - delete the ast entry from soc AST hash
  762. * table if mac address and pdev_id matches
  763. *
  764. * @soc : data path soc handle
  765. * @ast_mac_addr : AST entry mac address
  766. * @pdev_id : pdev id
  767. * @callback : callback function to called on ast delete response from FW
  768. * @cookie : argument to be passed to callback
  769. *
  770. * return : QDF_STATUS_SUCCESS if ast entry found with ast_mac_addr and delete
  771. * is sent
  772. * QDF_STATUS_E_INVAL false if ast entry not found
  773. */
  774. static QDF_STATUS dp_peer_ast_entry_del_by_pdev(struct cdp_soc_t *soc_handle,
  775. uint8_t *mac_addr,
  776. uint8_t pdev_id,
  777. txrx_ast_free_cb callback,
  778. void *cookie)
  779. {
  780. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  781. struct dp_ast_entry *ast_entry;
  782. txrx_ast_free_cb cb = NULL;
  783. void *arg = NULL;
  784. qdf_spin_lock_bh(&soc->ast_lock);
  785. ast_entry = dp_peer_ast_hash_find_by_pdevid(soc, mac_addr, pdev_id);
  786. if (!ast_entry) {
  787. qdf_spin_unlock_bh(&soc->ast_lock);
  788. return -QDF_STATUS_E_INVAL;
  789. }
  790. if (ast_entry->callback) {
  791. cb = ast_entry->callback;
  792. arg = ast_entry->cookie;
  793. }
  794. ast_entry->callback = callback;
  795. ast_entry->cookie = cookie;
  796. /*
  797. * if delete_in_progress is set AST delete is sent to target
  798. * and host is waiting for response should not sent delete
  799. * again
  800. */
  801. if (!ast_entry->delete_in_progress)
  802. dp_peer_del_ast(soc, ast_entry);
  803. qdf_spin_unlock_bh(&soc->ast_lock);
  804. if (cb) {
  805. cb(soc->ctrl_psoc,
  806. soc,
  807. arg,
  808. CDP_TXRX_AST_DELETE_IN_PROGRESS);
  809. }
  810. return QDF_STATUS_SUCCESS;
  811. }
  812. /**
  813. * dp_srng_find_ring_in_mask() - find which ext_group a ring belongs
  814. * @ring_num: ring num of the ring being queried
  815. * @grp_mask: the grp_mask array for the ring type in question.
  816. *
  817. * The grp_mask array is indexed by group number and the bit fields correspond
  818. * to ring numbers. We are finding which interrupt group a ring belongs to.
  819. *
  820. * Return: the index in the grp_mask array with the ring number.
  821. * -QDF_STATUS_E_NOENT if no entry is found
  822. */
  823. static int dp_srng_find_ring_in_mask(int ring_num, int *grp_mask)
  824. {
  825. int ext_group_num;
  826. int mask = 1 << ring_num;
  827. for (ext_group_num = 0; ext_group_num < WLAN_CFG_INT_NUM_CONTEXTS;
  828. ext_group_num++) {
  829. if (mask & grp_mask[ext_group_num])
  830. return ext_group_num;
  831. }
  832. return -QDF_STATUS_E_NOENT;
  833. }
  834. static int dp_srng_calculate_msi_group(struct dp_soc *soc,
  835. enum hal_ring_type ring_type,
  836. int ring_num)
  837. {
  838. int *grp_mask;
  839. switch (ring_type) {
  840. case WBM2SW_RELEASE:
  841. /* dp_tx_comp_handler - soc->tx_comp_ring */
  842. if (ring_num < 3)
  843. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  844. /* dp_rx_wbm_err_process - soc->rx_rel_ring */
  845. else if (ring_num == 3) {
  846. /* sw treats this as a separate ring type */
  847. grp_mask = &soc->wlan_cfg_ctx->
  848. int_rx_wbm_rel_ring_mask[0];
  849. ring_num = 0;
  850. } else {
  851. qdf_assert(0);
  852. return -QDF_STATUS_E_NOENT;
  853. }
  854. break;
  855. case REO_EXCEPTION:
  856. /* dp_rx_err_process - &soc->reo_exception_ring */
  857. grp_mask = &soc->wlan_cfg_ctx->int_rx_err_ring_mask[0];
  858. break;
  859. case REO_DST:
  860. /* dp_rx_process - soc->reo_dest_ring */
  861. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  862. break;
  863. case REO_STATUS:
  864. /* dp_reo_status_ring_handler - soc->reo_status_ring */
  865. grp_mask = &soc->wlan_cfg_ctx->int_reo_status_ring_mask[0];
  866. break;
  867. /* dp_rx_mon_status_srng_process - pdev->rxdma_mon_status_ring*/
  868. case RXDMA_MONITOR_STATUS:
  869. /* dp_rx_mon_dest_process - pdev->rxdma_mon_dst_ring */
  870. case RXDMA_MONITOR_DST:
  871. /* dp_mon_process */
  872. grp_mask = &soc->wlan_cfg_ctx->int_rx_mon_ring_mask[0];
  873. break;
  874. case RXDMA_DST:
  875. /* dp_rxdma_err_process */
  876. grp_mask = &soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[0];
  877. break;
  878. case RXDMA_BUF:
  879. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  880. break;
  881. case RXDMA_MONITOR_BUF:
  882. /* TODO: support low_thresh interrupt */
  883. return -QDF_STATUS_E_NOENT;
  884. break;
  885. case TCL_DATA:
  886. case TCL_CMD:
  887. case REO_CMD:
  888. case SW2WBM_RELEASE:
  889. case WBM_IDLE_LINK:
  890. /* normally empty SW_TO_HW rings */
  891. return -QDF_STATUS_E_NOENT;
  892. break;
  893. case TCL_STATUS:
  894. case REO_REINJECT:
  895. /* misc unused rings */
  896. return -QDF_STATUS_E_NOENT;
  897. break;
  898. case CE_SRC:
  899. case CE_DST:
  900. case CE_DST_STATUS:
  901. /* CE_rings - currently handled by hif */
  902. default:
  903. return -QDF_STATUS_E_NOENT;
  904. break;
  905. }
  906. return dp_srng_find_ring_in_mask(ring_num, grp_mask);
  907. }
  908. static void dp_srng_msi_setup(struct dp_soc *soc, struct hal_srng_params
  909. *ring_params, int ring_type, int ring_num)
  910. {
  911. int msi_group_number;
  912. int msi_data_count;
  913. int ret;
  914. uint32_t msi_data_start, msi_irq_start, addr_low, addr_high;
  915. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  916. &msi_data_count, &msi_data_start,
  917. &msi_irq_start);
  918. if (ret)
  919. return;
  920. msi_group_number = dp_srng_calculate_msi_group(soc, ring_type,
  921. ring_num);
  922. if (msi_group_number < 0) {
  923. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  924. FL("ring not part of an ext_group; ring_type: %d,ring_num %d"),
  925. ring_type, ring_num);
  926. ring_params->msi_addr = 0;
  927. ring_params->msi_data = 0;
  928. return;
  929. }
  930. if (msi_group_number > msi_data_count) {
  931. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  932. FL("2 msi_groups will share an msi; msi_group_num %d"),
  933. msi_group_number);
  934. QDF_ASSERT(0);
  935. }
  936. pld_get_msi_address(soc->osdev->dev, &addr_low, &addr_high);
  937. ring_params->msi_addr = addr_low;
  938. ring_params->msi_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
  939. ring_params->msi_data = (msi_group_number % msi_data_count)
  940. + msi_data_start;
  941. ring_params->flags |= HAL_SRNG_MSI_INTR;
  942. }
  943. /**
  944. * dp_print_ast_stats() - Dump AST table contents
  945. * @soc: Datapath soc handle
  946. *
  947. * return void
  948. */
  949. #ifdef FEATURE_AST
  950. void dp_print_ast_stats(struct dp_soc *soc)
  951. {
  952. uint8_t i;
  953. uint8_t num_entries = 0;
  954. struct dp_vdev *vdev;
  955. struct dp_pdev *pdev;
  956. struct dp_peer *peer;
  957. struct dp_ast_entry *ase, *tmp_ase;
  958. char type[CDP_TXRX_AST_TYPE_MAX][10] = {
  959. "NONE", "STATIC", "SELF", "WDS", "MEC", "HMWDS", "BSS",
  960. "DA", "HMWDS_SEC"};
  961. DP_PRINT_STATS("AST Stats:");
  962. DP_PRINT_STATS(" Entries Added = %d", soc->stats.ast.added);
  963. DP_PRINT_STATS(" Entries Deleted = %d", soc->stats.ast.deleted);
  964. DP_PRINT_STATS(" Entries Agedout = %d", soc->stats.ast.aged_out);
  965. DP_PRINT_STATS("AST Table:");
  966. qdf_spin_lock_bh(&soc->ast_lock);
  967. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  968. pdev = soc->pdev_list[i];
  969. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  970. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  971. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  972. DP_PEER_ITERATE_ASE_LIST(peer, ase, tmp_ase) {
  973. DP_PRINT_STATS("%6d mac_addr = %pM"
  974. " peer_mac_addr = %pM"
  975. " peer_id = %u"
  976. " type = %s"
  977. " next_hop = %d"
  978. " is_active = %d"
  979. " is_bss = %d"
  980. " ast_idx = %d"
  981. " ast_hash = %d"
  982. " delete_in_progress = %d"
  983. " pdev_id = %d"
  984. " vdev_id = %d",
  985. ++num_entries,
  986. ase->mac_addr.raw,
  987. ase->peer->mac_addr.raw,
  988. ase->peer->peer_ids[0],
  989. type[ase->type],
  990. ase->next_hop,
  991. ase->is_active,
  992. ase->is_bss,
  993. ase->ast_idx,
  994. ase->ast_hash_value,
  995. ase->delete_in_progress,
  996. ase->pdev_id,
  997. ase->vdev_id);
  998. }
  999. }
  1000. }
  1001. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1002. }
  1003. qdf_spin_unlock_bh(&soc->ast_lock);
  1004. }
  1005. #else
  1006. void dp_print_ast_stats(struct dp_soc *soc)
  1007. {
  1008. DP_PRINT_STATS("AST Stats not available.Enable FEATURE_AST");
  1009. return;
  1010. }
  1011. #endif
  1012. /**
  1013. * dp_print_peer_table() - Dump all Peer stats
  1014. * @vdev: Datapath Vdev handle
  1015. *
  1016. * return void
  1017. */
  1018. static void dp_print_peer_table(struct dp_vdev *vdev)
  1019. {
  1020. struct dp_peer *peer = NULL;
  1021. DP_PRINT_STATS("Dumping Peer Table Stats:");
  1022. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  1023. if (!peer) {
  1024. DP_PRINT_STATS("Invalid Peer");
  1025. return;
  1026. }
  1027. DP_PRINT_STATS(" peer_mac_addr = %pM"
  1028. " nawds_enabled = %d"
  1029. " bss_peer = %d"
  1030. " wapi = %d"
  1031. " wds_enabled = %d"
  1032. " delete in progress = %d"
  1033. " peer id = %d",
  1034. peer->mac_addr.raw,
  1035. peer->nawds_enabled,
  1036. peer->bss_peer,
  1037. peer->wapi,
  1038. peer->wds_enabled,
  1039. peer->delete_in_progress,
  1040. peer->peer_ids[0]);
  1041. }
  1042. }
  1043. /*
  1044. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  1045. */
  1046. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  1047. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  1048. {
  1049. void *hal_soc = soc->hal_soc;
  1050. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  1051. /* TODO: See if we should get align size from hal */
  1052. uint32_t ring_base_align = 8;
  1053. struct hal_srng_params ring_params;
  1054. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  1055. /* TODO: Currently hal layer takes care of endianness related settings.
  1056. * See if these settings need to passed from DP layer
  1057. */
  1058. ring_params.flags = 0;
  1059. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  1060. srng->hal_srng = NULL;
  1061. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  1062. srng->num_entries = num_entries;
  1063. if (!dp_is_soc_reinit(soc)) {
  1064. srng->base_vaddr_unaligned =
  1065. qdf_mem_alloc_consistent(soc->osdev,
  1066. soc->osdev->dev,
  1067. srng->alloc_size,
  1068. &srng->base_paddr_unaligned);
  1069. }
  1070. if (!srng->base_vaddr_unaligned) {
  1071. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1072. FL("alloc failed - ring_type: %d, ring_num %d"),
  1073. ring_type, ring_num);
  1074. return QDF_STATUS_E_NOMEM;
  1075. }
  1076. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  1077. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  1078. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  1079. ((unsigned long)(ring_params.ring_base_vaddr) -
  1080. (unsigned long)srng->base_vaddr_unaligned);
  1081. ring_params.num_entries = num_entries;
  1082. dp_verbose_debug("Ring type: %d, num:%d vaddr %pK paddr %pK entries %u",
  1083. ring_type, ring_num,
  1084. (void *)ring_params.ring_base_vaddr,
  1085. (void *)ring_params.ring_base_paddr,
  1086. ring_params.num_entries);
  1087. if (soc->intr_mode == DP_INTR_MSI) {
  1088. dp_srng_msi_setup(soc, &ring_params, ring_type, ring_num);
  1089. dp_verbose_debug("Using MSI for ring_type: %d, ring_num %d",
  1090. ring_type, ring_num);
  1091. } else {
  1092. ring_params.msi_data = 0;
  1093. ring_params.msi_addr = 0;
  1094. dp_verbose_debug("Skipping MSI for ring_type: %d, ring_num %d",
  1095. ring_type, ring_num);
  1096. }
  1097. /*
  1098. * Setup interrupt timer and batch counter thresholds for
  1099. * interrupt mitigation based on ring type
  1100. */
  1101. if (ring_type == REO_DST) {
  1102. ring_params.intr_timer_thres_us =
  1103. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  1104. ring_params.intr_batch_cntr_thres_entries =
  1105. wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
  1106. } else if (ring_type == WBM2SW_RELEASE && (ring_num < 3)) {
  1107. ring_params.intr_timer_thres_us =
  1108. wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
  1109. ring_params.intr_batch_cntr_thres_entries =
  1110. wlan_cfg_get_int_batch_threshold_tx(soc->wlan_cfg_ctx);
  1111. } else {
  1112. ring_params.intr_timer_thres_us =
  1113. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  1114. ring_params.intr_batch_cntr_thres_entries =
  1115. wlan_cfg_get_int_batch_threshold_other(soc->wlan_cfg_ctx);
  1116. }
  1117. /* Enable low threshold interrupts for rx buffer rings (regular and
  1118. * monitor buffer rings.
  1119. * TODO: See if this is required for any other ring
  1120. */
  1121. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF) ||
  1122. (ring_type == RXDMA_MONITOR_STATUS)) {
  1123. /* TODO: Setting low threshold to 1/8th of ring size
  1124. * see if this needs to be configurable
  1125. */
  1126. ring_params.low_threshold = num_entries >> 3;
  1127. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  1128. ring_params.intr_timer_thres_us =
  1129. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  1130. ring_params.intr_batch_cntr_thres_entries = 0;
  1131. }
  1132. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  1133. mac_id, &ring_params);
  1134. if (!srng->hal_srng) {
  1135. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1136. srng->alloc_size,
  1137. srng->base_vaddr_unaligned,
  1138. srng->base_paddr_unaligned, 0);
  1139. }
  1140. return 0;
  1141. }
  1142. /*
  1143. * dp_srng_deinit() - Internal function to deinit SRNG rings used by data path
  1144. * @soc: DP SOC handle
  1145. * @srng: source ring structure
  1146. * @ring_type: type of ring
  1147. * @ring_num: ring number
  1148. *
  1149. * Return: None
  1150. */
  1151. static void dp_srng_deinit(struct dp_soc *soc, struct dp_srng *srng,
  1152. int ring_type, int ring_num)
  1153. {
  1154. if (!srng->hal_srng) {
  1155. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1156. FL("Ring type: %d, num:%d not setup"),
  1157. ring_type, ring_num);
  1158. return;
  1159. }
  1160. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  1161. srng->hal_srng = NULL;
  1162. }
  1163. /**
  1164. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  1165. * Any buffers allocated and attached to ring entries are expected to be freed
  1166. * before calling this function.
  1167. */
  1168. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  1169. int ring_type, int ring_num)
  1170. {
  1171. if (!dp_is_soc_reinit(soc)) {
  1172. if (!srng->hal_srng && (srng->alloc_size == 0)) {
  1173. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1174. FL("Ring type: %d, num:%d not setup"),
  1175. ring_type, ring_num);
  1176. return;
  1177. }
  1178. if (srng->hal_srng) {
  1179. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  1180. srng->hal_srng = NULL;
  1181. }
  1182. }
  1183. if (srng->alloc_size) {
  1184. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1185. srng->alloc_size,
  1186. srng->base_vaddr_unaligned,
  1187. srng->base_paddr_unaligned, 0);
  1188. srng->alloc_size = 0;
  1189. }
  1190. }
  1191. /* TODO: Need this interface from HIF */
  1192. void *hif_get_hal_handle(void *hif_handle);
  1193. /*
  1194. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  1195. * @dp_ctx: DP SOC handle
  1196. * @budget: Number of frames/descriptors that can be processed in one shot
  1197. *
  1198. * Return: remaining budget/quota for the soc device
  1199. */
  1200. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  1201. {
  1202. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  1203. struct dp_soc *soc = int_ctx->soc;
  1204. int ring = 0;
  1205. uint32_t work_done = 0;
  1206. int budget = dp_budget;
  1207. uint8_t tx_mask = int_ctx->tx_ring_mask;
  1208. uint8_t rx_mask = int_ctx->rx_ring_mask;
  1209. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  1210. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  1211. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  1212. uint32_t remaining_quota = dp_budget;
  1213. struct dp_pdev *pdev = NULL;
  1214. int mac_id;
  1215. /* Process Tx completion interrupts first to return back buffers */
  1216. while (tx_mask) {
  1217. if (tx_mask & 0x1) {
  1218. work_done = dp_tx_comp_handler(soc,
  1219. soc->tx_comp_ring[ring].hal_srng,
  1220. remaining_quota);
  1221. dp_verbose_debug("tx mask 0x%x ring %d, budget %d, work_done %d",
  1222. tx_mask, ring, budget, work_done);
  1223. budget -= work_done;
  1224. if (budget <= 0)
  1225. goto budget_done;
  1226. remaining_quota = budget;
  1227. }
  1228. tx_mask = tx_mask >> 1;
  1229. ring++;
  1230. }
  1231. /* Process REO Exception ring interrupt */
  1232. if (rx_err_mask) {
  1233. work_done = dp_rx_err_process(soc,
  1234. soc->reo_exception_ring.hal_srng,
  1235. remaining_quota);
  1236. dp_verbose_debug("REO Exception Ring: work_done %d budget %d",
  1237. work_done, budget);
  1238. budget -= work_done;
  1239. if (budget <= 0) {
  1240. goto budget_done;
  1241. }
  1242. remaining_quota = budget;
  1243. }
  1244. /* Process Rx WBM release ring interrupt */
  1245. if (rx_wbm_rel_mask) {
  1246. work_done = dp_rx_wbm_err_process(soc,
  1247. soc->rx_rel_ring.hal_srng, remaining_quota);
  1248. dp_verbose_debug("WBM Release Ring: work_done %d budget %d",
  1249. work_done, budget);
  1250. budget -= work_done;
  1251. if (budget <= 0) {
  1252. goto budget_done;
  1253. }
  1254. remaining_quota = budget;
  1255. }
  1256. /* Process Rx interrupts */
  1257. if (rx_mask) {
  1258. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  1259. if (rx_mask & (1 << ring)) {
  1260. work_done = dp_rx_process(int_ctx,
  1261. soc->reo_dest_ring[ring].hal_srng,
  1262. ring,
  1263. remaining_quota);
  1264. dp_verbose_debug("rx mask 0x%x ring %d, work_done %d budget %d",
  1265. rx_mask, ring,
  1266. work_done, budget);
  1267. budget -= work_done;
  1268. if (budget <= 0)
  1269. goto budget_done;
  1270. remaining_quota = budget;
  1271. }
  1272. }
  1273. }
  1274. if (reo_status_mask)
  1275. dp_reo_status_ring_handler(soc);
  1276. /* Process LMAC interrupts */
  1277. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  1278. pdev = soc->pdev_list[ring];
  1279. if (pdev == NULL)
  1280. continue;
  1281. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1282. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  1283. pdev->pdev_id);
  1284. if (int_ctx->rx_mon_ring_mask & (1 << mac_for_pdev)) {
  1285. work_done = dp_mon_process(soc, mac_for_pdev,
  1286. remaining_quota);
  1287. budget -= work_done;
  1288. if (budget <= 0)
  1289. goto budget_done;
  1290. remaining_quota = budget;
  1291. }
  1292. if (int_ctx->rxdma2host_ring_mask &
  1293. (1 << mac_for_pdev)) {
  1294. work_done = dp_rxdma_err_process(soc,
  1295. mac_for_pdev,
  1296. remaining_quota);
  1297. budget -= work_done;
  1298. if (budget <= 0)
  1299. goto budget_done;
  1300. remaining_quota = budget;
  1301. }
  1302. if (int_ctx->host2rxdma_ring_mask &
  1303. (1 << mac_for_pdev)) {
  1304. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1305. union dp_rx_desc_list_elem_t *tail = NULL;
  1306. struct dp_srng *rx_refill_buf_ring =
  1307. &pdev->rx_refill_buf_ring;
  1308. DP_STATS_INC(pdev, replenish.low_thresh_intrs,
  1309. 1);
  1310. dp_rx_buffers_replenish(soc, mac_for_pdev,
  1311. rx_refill_buf_ring,
  1312. &soc->rx_desc_buf[mac_for_pdev], 0,
  1313. &desc_list, &tail);
  1314. }
  1315. }
  1316. }
  1317. qdf_lro_flush(int_ctx->lro_ctx);
  1318. budget_done:
  1319. return dp_budget - budget;
  1320. }
  1321. /* dp_interrupt_timer()- timer poll for interrupts
  1322. *
  1323. * @arg: SoC Handle
  1324. *
  1325. * Return:
  1326. *
  1327. */
  1328. static void dp_interrupt_timer(void *arg)
  1329. {
  1330. struct dp_soc *soc = (struct dp_soc *) arg;
  1331. int i;
  1332. if (qdf_atomic_read(&soc->cmn_init_done)) {
  1333. for (i = 0;
  1334. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  1335. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  1336. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  1337. }
  1338. }
  1339. /*
  1340. * dp_soc_attach_poll() - Register handlers for DP interrupts
  1341. * @txrx_soc: DP SOC handle
  1342. *
  1343. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  1344. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  1345. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  1346. *
  1347. * Return: 0 for success, nonzero for failure.
  1348. */
  1349. static QDF_STATUS dp_soc_attach_poll(void *txrx_soc)
  1350. {
  1351. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1352. int i;
  1353. soc->intr_mode = DP_INTR_POLL;
  1354. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1355. soc->intr_ctx[i].dp_intr_id = i;
  1356. soc->intr_ctx[i].tx_ring_mask =
  1357. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  1358. soc->intr_ctx[i].rx_ring_mask =
  1359. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  1360. soc->intr_ctx[i].rx_mon_ring_mask =
  1361. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  1362. soc->intr_ctx[i].rx_err_ring_mask =
  1363. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  1364. soc->intr_ctx[i].rx_wbm_rel_ring_mask =
  1365. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  1366. soc->intr_ctx[i].reo_status_ring_mask =
  1367. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  1368. soc->intr_ctx[i].rxdma2host_ring_mask =
  1369. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  1370. soc->intr_ctx[i].soc = soc;
  1371. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1372. }
  1373. qdf_timer_init(soc->osdev, &soc->int_timer,
  1374. dp_interrupt_timer, (void *)soc,
  1375. QDF_TIMER_TYPE_WAKE_APPS);
  1376. return QDF_STATUS_SUCCESS;
  1377. }
  1378. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc);
  1379. #if defined(CONFIG_MCL)
  1380. /*
  1381. * dp_soc_interrupt_attach_wrapper() - Register handlers for DP interrupts
  1382. * @txrx_soc: DP SOC handle
  1383. *
  1384. * Call the appropriate attach function based on the mode of operation.
  1385. * This is a WAR for enabling monitor mode.
  1386. *
  1387. * Return: 0 for success. nonzero for failure.
  1388. */
  1389. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  1390. {
  1391. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1392. if (!(soc->wlan_cfg_ctx->napi_enabled) ||
  1393. con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  1394. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1395. "%s: Poll mode", __func__);
  1396. return dp_soc_attach_poll(txrx_soc);
  1397. } else {
  1398. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1399. "%s: Interrupt mode", __func__);
  1400. return dp_soc_interrupt_attach(txrx_soc);
  1401. }
  1402. }
  1403. #else
  1404. #if defined(DP_INTR_POLL_BASED) && DP_INTR_POLL_BASED
  1405. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  1406. {
  1407. return dp_soc_attach_poll(txrx_soc);
  1408. }
  1409. #else
  1410. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  1411. {
  1412. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1413. if (hif_is_polled_mode_enabled(soc->hif_handle))
  1414. return dp_soc_attach_poll(txrx_soc);
  1415. else
  1416. return dp_soc_interrupt_attach(txrx_soc);
  1417. }
  1418. #endif
  1419. #endif
  1420. static void dp_soc_interrupt_map_calculate_integrated(struct dp_soc *soc,
  1421. int intr_ctx_num, int *irq_id_map, int *num_irq_r)
  1422. {
  1423. int j;
  1424. int num_irq = 0;
  1425. int tx_mask =
  1426. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1427. int rx_mask =
  1428. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1429. int rx_mon_mask =
  1430. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1431. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1432. soc->wlan_cfg_ctx, intr_ctx_num);
  1433. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1434. soc->wlan_cfg_ctx, intr_ctx_num);
  1435. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1436. soc->wlan_cfg_ctx, intr_ctx_num);
  1437. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1438. soc->wlan_cfg_ctx, intr_ctx_num);
  1439. int host2rxdma_ring_mask = wlan_cfg_get_host2rxdma_ring_mask(
  1440. soc->wlan_cfg_ctx, intr_ctx_num);
  1441. int host2rxdma_mon_ring_mask = wlan_cfg_get_host2rxdma_mon_ring_mask(
  1442. soc->wlan_cfg_ctx, intr_ctx_num);
  1443. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  1444. if (tx_mask & (1 << j)) {
  1445. irq_id_map[num_irq++] =
  1446. (wbm2host_tx_completions_ring1 - j);
  1447. }
  1448. if (rx_mask & (1 << j)) {
  1449. irq_id_map[num_irq++] =
  1450. (reo2host_destination_ring1 - j);
  1451. }
  1452. if (rxdma2host_ring_mask & (1 << j)) {
  1453. irq_id_map[num_irq++] =
  1454. rxdma2host_destination_ring_mac1 -
  1455. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1456. }
  1457. if (host2rxdma_ring_mask & (1 << j)) {
  1458. irq_id_map[num_irq++] =
  1459. host2rxdma_host_buf_ring_mac1 -
  1460. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1461. }
  1462. if (host2rxdma_mon_ring_mask & (1 << j)) {
  1463. irq_id_map[num_irq++] =
  1464. host2rxdma_monitor_ring1 -
  1465. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1466. }
  1467. if (rx_mon_mask & (1 << j)) {
  1468. irq_id_map[num_irq++] =
  1469. ppdu_end_interrupts_mac1 -
  1470. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1471. irq_id_map[num_irq++] =
  1472. rxdma2host_monitor_status_ring_mac1 -
  1473. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1474. }
  1475. if (rx_wbm_rel_ring_mask & (1 << j))
  1476. irq_id_map[num_irq++] = wbm2host_rx_release;
  1477. if (rx_err_ring_mask & (1 << j))
  1478. irq_id_map[num_irq++] = reo2host_exception;
  1479. if (reo_status_ring_mask & (1 << j))
  1480. irq_id_map[num_irq++] = reo2host_status;
  1481. }
  1482. *num_irq_r = num_irq;
  1483. }
  1484. static void dp_soc_interrupt_map_calculate_msi(struct dp_soc *soc,
  1485. int intr_ctx_num, int *irq_id_map, int *num_irq_r,
  1486. int msi_vector_count, int msi_vector_start)
  1487. {
  1488. int tx_mask = wlan_cfg_get_tx_ring_mask(
  1489. soc->wlan_cfg_ctx, intr_ctx_num);
  1490. int rx_mask = wlan_cfg_get_rx_ring_mask(
  1491. soc->wlan_cfg_ctx, intr_ctx_num);
  1492. int rx_mon_mask = wlan_cfg_get_rx_mon_ring_mask(
  1493. soc->wlan_cfg_ctx, intr_ctx_num);
  1494. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1495. soc->wlan_cfg_ctx, intr_ctx_num);
  1496. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1497. soc->wlan_cfg_ctx, intr_ctx_num);
  1498. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1499. soc->wlan_cfg_ctx, intr_ctx_num);
  1500. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1501. soc->wlan_cfg_ctx, intr_ctx_num);
  1502. unsigned int vector =
  1503. (intr_ctx_num % msi_vector_count) + msi_vector_start;
  1504. int num_irq = 0;
  1505. soc->intr_mode = DP_INTR_MSI;
  1506. if (tx_mask | rx_mask | rx_mon_mask | rx_err_ring_mask |
  1507. rx_wbm_rel_ring_mask | reo_status_ring_mask | rxdma2host_ring_mask)
  1508. irq_id_map[num_irq++] =
  1509. pld_get_msi_irq(soc->osdev->dev, vector);
  1510. *num_irq_r = num_irq;
  1511. }
  1512. static void dp_soc_interrupt_map_calculate(struct dp_soc *soc, int intr_ctx_num,
  1513. int *irq_id_map, int *num_irq)
  1514. {
  1515. int msi_vector_count, ret;
  1516. uint32_t msi_base_data, msi_vector_start;
  1517. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  1518. &msi_vector_count,
  1519. &msi_base_data,
  1520. &msi_vector_start);
  1521. if (ret)
  1522. return dp_soc_interrupt_map_calculate_integrated(soc,
  1523. intr_ctx_num, irq_id_map, num_irq);
  1524. else
  1525. dp_soc_interrupt_map_calculate_msi(soc,
  1526. intr_ctx_num, irq_id_map, num_irq,
  1527. msi_vector_count, msi_vector_start);
  1528. }
  1529. /*
  1530. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  1531. * @txrx_soc: DP SOC handle
  1532. *
  1533. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  1534. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  1535. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  1536. *
  1537. * Return: 0 for success. nonzero for failure.
  1538. */
  1539. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  1540. {
  1541. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1542. int i = 0;
  1543. int num_irq = 0;
  1544. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1545. int ret = 0;
  1546. /* Map of IRQ ids registered with one interrupt context */
  1547. int irq_id_map[HIF_MAX_GRP_IRQ];
  1548. int tx_mask =
  1549. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  1550. int rx_mask =
  1551. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  1552. int rx_mon_mask =
  1553. dp_soc_get_mon_mask_for_interrupt_mode(soc, i);
  1554. int rx_err_ring_mask =
  1555. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  1556. int rx_wbm_rel_ring_mask =
  1557. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  1558. int reo_status_ring_mask =
  1559. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  1560. int rxdma2host_ring_mask =
  1561. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  1562. int host2rxdma_ring_mask =
  1563. wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx, i);
  1564. int host2rxdma_mon_ring_mask =
  1565. wlan_cfg_get_host2rxdma_mon_ring_mask(
  1566. soc->wlan_cfg_ctx, i);
  1567. soc->intr_ctx[i].dp_intr_id = i;
  1568. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  1569. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  1570. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  1571. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  1572. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  1573. soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask;
  1574. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  1575. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  1576. soc->intr_ctx[i].host2rxdma_mon_ring_mask =
  1577. host2rxdma_mon_ring_mask;
  1578. soc->intr_ctx[i].soc = soc;
  1579. num_irq = 0;
  1580. dp_soc_interrupt_map_calculate(soc, i, &irq_id_map[0],
  1581. &num_irq);
  1582. ret = hif_register_ext_group(soc->hif_handle,
  1583. num_irq, irq_id_map, dp_service_srngs,
  1584. &soc->intr_ctx[i], "dp_intr",
  1585. HIF_EXEC_NAPI_TYPE, QCA_NAPI_DEF_SCALE_BIN_SHIFT);
  1586. if (ret) {
  1587. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1588. FL("failed, ret = %d"), ret);
  1589. return QDF_STATUS_E_FAILURE;
  1590. }
  1591. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1592. }
  1593. hif_configure_ext_group_interrupts(soc->hif_handle);
  1594. return QDF_STATUS_SUCCESS;
  1595. }
  1596. /*
  1597. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  1598. * @txrx_soc: DP SOC handle
  1599. *
  1600. * Return: void
  1601. */
  1602. static void dp_soc_interrupt_detach(void *txrx_soc)
  1603. {
  1604. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1605. int i;
  1606. if (soc->intr_mode == DP_INTR_POLL) {
  1607. qdf_timer_stop(&soc->int_timer);
  1608. qdf_timer_free(&soc->int_timer);
  1609. } else {
  1610. hif_deregister_exec_group(soc->hif_handle, "dp_intr");
  1611. }
  1612. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1613. soc->intr_ctx[i].tx_ring_mask = 0;
  1614. soc->intr_ctx[i].rx_ring_mask = 0;
  1615. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  1616. soc->intr_ctx[i].rx_err_ring_mask = 0;
  1617. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  1618. soc->intr_ctx[i].reo_status_ring_mask = 0;
  1619. soc->intr_ctx[i].rxdma2host_ring_mask = 0;
  1620. soc->intr_ctx[i].host2rxdma_ring_mask = 0;
  1621. soc->intr_ctx[i].host2rxdma_mon_ring_mask = 0;
  1622. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  1623. }
  1624. }
  1625. #define AVG_MAX_MPDUS_PER_TID 128
  1626. #define AVG_TIDS_PER_CLIENT 2
  1627. #define AVG_FLOWS_PER_TID 2
  1628. #define AVG_MSDUS_PER_FLOW 128
  1629. #define AVG_MSDUS_PER_MPDU 4
  1630. /*
  1631. * Allocate and setup link descriptor pool that will be used by HW for
  1632. * various link and queue descriptors and managed by WBM
  1633. */
  1634. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  1635. {
  1636. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  1637. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  1638. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  1639. uint32_t num_mpdus_per_link_desc =
  1640. hal_num_mpdus_per_link_desc(soc->hal_soc);
  1641. uint32_t num_msdus_per_link_desc =
  1642. hal_num_msdus_per_link_desc(soc->hal_soc);
  1643. uint32_t num_mpdu_links_per_queue_desc =
  1644. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  1645. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  1646. uint32_t total_link_descs, total_mem_size;
  1647. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  1648. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  1649. uint32_t num_link_desc_banks;
  1650. uint32_t last_bank_size = 0;
  1651. uint32_t entry_size, num_entries;
  1652. int i;
  1653. uint32_t desc_id = 0;
  1654. qdf_dma_addr_t *baseaddr = NULL;
  1655. /* Only Tx queue descriptors are allocated from common link descriptor
  1656. * pool Rx queue descriptors are not included in this because (REO queue
  1657. * extension descriptors) they are expected to be allocated contiguously
  1658. * with REO queue descriptors
  1659. */
  1660. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1661. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  1662. num_mpdu_queue_descs = num_mpdu_link_descs /
  1663. num_mpdu_links_per_queue_desc;
  1664. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1665. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  1666. num_msdus_per_link_desc;
  1667. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1668. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  1669. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  1670. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  1671. /* Round up to power of 2 */
  1672. total_link_descs = 1;
  1673. while (total_link_descs < num_entries)
  1674. total_link_descs <<= 1;
  1675. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1676. FL("total_link_descs: %u, link_desc_size: %d"),
  1677. total_link_descs, link_desc_size);
  1678. total_mem_size = total_link_descs * link_desc_size;
  1679. total_mem_size += link_desc_align;
  1680. if (total_mem_size <= max_alloc_size) {
  1681. num_link_desc_banks = 0;
  1682. last_bank_size = total_mem_size;
  1683. } else {
  1684. num_link_desc_banks = (total_mem_size) /
  1685. (max_alloc_size - link_desc_align);
  1686. last_bank_size = total_mem_size %
  1687. (max_alloc_size - link_desc_align);
  1688. }
  1689. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1690. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  1691. total_mem_size, num_link_desc_banks);
  1692. for (i = 0; i < num_link_desc_banks; i++) {
  1693. if (!dp_is_soc_reinit(soc)) {
  1694. baseaddr = &soc->link_desc_banks[i].
  1695. base_paddr_unaligned;
  1696. soc->link_desc_banks[i].base_vaddr_unaligned =
  1697. qdf_mem_alloc_consistent(soc->osdev,
  1698. soc->osdev->dev,
  1699. max_alloc_size,
  1700. baseaddr);
  1701. }
  1702. soc->link_desc_banks[i].size = max_alloc_size;
  1703. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  1704. soc->link_desc_banks[i].base_vaddr_unaligned) +
  1705. ((unsigned long)(
  1706. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1707. link_desc_align));
  1708. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  1709. soc->link_desc_banks[i].base_paddr_unaligned) +
  1710. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1711. (unsigned long)(
  1712. soc->link_desc_banks[i].base_vaddr_unaligned));
  1713. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  1714. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1715. FL("Link descriptor memory alloc failed"));
  1716. goto fail;
  1717. }
  1718. }
  1719. if (last_bank_size) {
  1720. /* Allocate last bank in case total memory required is not exact
  1721. * multiple of max_alloc_size
  1722. */
  1723. if (!dp_is_soc_reinit(soc)) {
  1724. baseaddr = &soc->link_desc_banks[i].
  1725. base_paddr_unaligned;
  1726. soc->link_desc_banks[i].base_vaddr_unaligned =
  1727. qdf_mem_alloc_consistent(soc->osdev,
  1728. soc->osdev->dev,
  1729. last_bank_size,
  1730. baseaddr);
  1731. }
  1732. soc->link_desc_banks[i].size = last_bank_size;
  1733. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  1734. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  1735. ((unsigned long)(
  1736. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1737. link_desc_align));
  1738. soc->link_desc_banks[i].base_paddr =
  1739. (unsigned long)(
  1740. soc->link_desc_banks[i].base_paddr_unaligned) +
  1741. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1742. (unsigned long)(
  1743. soc->link_desc_banks[i].base_vaddr_unaligned));
  1744. }
  1745. /* Allocate and setup link descriptor idle list for HW internal use */
  1746. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  1747. total_mem_size = entry_size * total_link_descs;
  1748. if (total_mem_size <= max_alloc_size) {
  1749. void *desc;
  1750. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  1751. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  1752. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1753. FL("Link desc idle ring setup failed"));
  1754. goto fail;
  1755. }
  1756. hal_srng_access_start_unlocked(soc->hal_soc,
  1757. soc->wbm_idle_link_ring.hal_srng);
  1758. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1759. soc->link_desc_banks[i].base_paddr; i++) {
  1760. uint32_t num_entries = (soc->link_desc_banks[i].size -
  1761. ((unsigned long)(
  1762. soc->link_desc_banks[i].base_vaddr) -
  1763. (unsigned long)(
  1764. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1765. / link_desc_size;
  1766. unsigned long paddr = (unsigned long)(
  1767. soc->link_desc_banks[i].base_paddr);
  1768. while (num_entries && (desc = hal_srng_src_get_next(
  1769. soc->hal_soc,
  1770. soc->wbm_idle_link_ring.hal_srng))) {
  1771. hal_set_link_desc_addr(desc,
  1772. LINK_DESC_COOKIE(desc_id, i), paddr);
  1773. num_entries--;
  1774. desc_id++;
  1775. paddr += link_desc_size;
  1776. }
  1777. }
  1778. hal_srng_access_end_unlocked(soc->hal_soc,
  1779. soc->wbm_idle_link_ring.hal_srng);
  1780. } else {
  1781. uint32_t num_scatter_bufs;
  1782. uint32_t num_entries_per_buf;
  1783. uint32_t rem_entries;
  1784. uint8_t *scatter_buf_ptr;
  1785. uint16_t scatter_buf_num;
  1786. uint32_t buf_size = 0;
  1787. soc->wbm_idle_scatter_buf_size =
  1788. hal_idle_list_scatter_buf_size(soc->hal_soc);
  1789. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  1790. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  1791. num_scatter_bufs = hal_idle_list_num_scatter_bufs(
  1792. soc->hal_soc, total_mem_size,
  1793. soc->wbm_idle_scatter_buf_size);
  1794. if (num_scatter_bufs > MAX_IDLE_SCATTER_BUFS) {
  1795. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1796. FL("scatter bufs size out of bounds"));
  1797. goto fail;
  1798. }
  1799. for (i = 0; i < num_scatter_bufs; i++) {
  1800. baseaddr = &soc->wbm_idle_scatter_buf_base_paddr[i];
  1801. if (!dp_is_soc_reinit(soc)) {
  1802. buf_size = soc->wbm_idle_scatter_buf_size;
  1803. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  1804. qdf_mem_alloc_consistent(soc->osdev,
  1805. soc->osdev->
  1806. dev,
  1807. buf_size,
  1808. baseaddr);
  1809. }
  1810. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  1811. QDF_TRACE(QDF_MODULE_ID_DP,
  1812. QDF_TRACE_LEVEL_ERROR,
  1813. FL("Scatter lst memory alloc fail"));
  1814. goto fail;
  1815. }
  1816. }
  1817. /* Populate idle list scatter buffers with link descriptor
  1818. * pointers
  1819. */
  1820. scatter_buf_num = 0;
  1821. scatter_buf_ptr = (uint8_t *)(
  1822. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  1823. rem_entries = num_entries_per_buf;
  1824. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1825. soc->link_desc_banks[i].base_paddr; i++) {
  1826. uint32_t num_link_descs =
  1827. (soc->link_desc_banks[i].size -
  1828. ((unsigned long)(
  1829. soc->link_desc_banks[i].base_vaddr) -
  1830. (unsigned long)(
  1831. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1832. / link_desc_size;
  1833. unsigned long paddr = (unsigned long)(
  1834. soc->link_desc_banks[i].base_paddr);
  1835. while (num_link_descs) {
  1836. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  1837. LINK_DESC_COOKIE(desc_id, i), paddr);
  1838. num_link_descs--;
  1839. desc_id++;
  1840. paddr += link_desc_size;
  1841. rem_entries--;
  1842. if (rem_entries) {
  1843. scatter_buf_ptr += entry_size;
  1844. } else {
  1845. rem_entries = num_entries_per_buf;
  1846. scatter_buf_num++;
  1847. if (scatter_buf_num >= num_scatter_bufs)
  1848. break;
  1849. scatter_buf_ptr = (uint8_t *)(
  1850. soc->wbm_idle_scatter_buf_base_vaddr[
  1851. scatter_buf_num]);
  1852. }
  1853. }
  1854. }
  1855. /* Setup link descriptor idle list in HW */
  1856. hal_setup_link_idle_list(soc->hal_soc,
  1857. soc->wbm_idle_scatter_buf_base_paddr,
  1858. soc->wbm_idle_scatter_buf_base_vaddr,
  1859. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  1860. (uint32_t)(scatter_buf_ptr -
  1861. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  1862. scatter_buf_num-1])), total_link_descs);
  1863. }
  1864. return 0;
  1865. fail:
  1866. if (soc->wbm_idle_link_ring.hal_srng) {
  1867. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1868. WBM_IDLE_LINK, 0);
  1869. }
  1870. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1871. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1872. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1873. soc->wbm_idle_scatter_buf_size,
  1874. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1875. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1876. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1877. }
  1878. }
  1879. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1880. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1881. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1882. soc->link_desc_banks[i].size,
  1883. soc->link_desc_banks[i].base_vaddr_unaligned,
  1884. soc->link_desc_banks[i].base_paddr_unaligned,
  1885. 0);
  1886. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1887. }
  1888. }
  1889. return QDF_STATUS_E_FAILURE;
  1890. }
  1891. /*
  1892. * Free link descriptor pool that was setup HW
  1893. */
  1894. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  1895. {
  1896. int i;
  1897. if (soc->wbm_idle_link_ring.hal_srng) {
  1898. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1899. WBM_IDLE_LINK, 0);
  1900. }
  1901. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1902. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1903. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1904. soc->wbm_idle_scatter_buf_size,
  1905. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1906. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1907. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1908. }
  1909. }
  1910. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1911. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1912. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1913. soc->link_desc_banks[i].size,
  1914. soc->link_desc_banks[i].base_vaddr_unaligned,
  1915. soc->link_desc_banks[i].base_paddr_unaligned,
  1916. 0);
  1917. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1918. }
  1919. }
  1920. }
  1921. #ifdef IPA_OFFLOAD
  1922. #define REO_DST_RING_SIZE_QCA6290 1023
  1923. #ifndef QCA_WIFI_QCA8074_VP
  1924. #define REO_DST_RING_SIZE_QCA8074 1023
  1925. #else
  1926. #define REO_DST_RING_SIZE_QCA8074 8
  1927. #endif /* QCA_WIFI_QCA8074_VP */
  1928. #else
  1929. #define REO_DST_RING_SIZE_QCA6290 1024
  1930. #ifndef QCA_WIFI_QCA8074_VP
  1931. #define REO_DST_RING_SIZE_QCA8074 2048
  1932. #else
  1933. #define REO_DST_RING_SIZE_QCA8074 8
  1934. #endif /* QCA_WIFI_QCA8074_VP */
  1935. #endif /* IPA_OFFLOAD */
  1936. /*
  1937. * dp_ast_aging_timer_fn() - Timer callback function for WDS aging
  1938. * @soc: Datapath SOC handle
  1939. *
  1940. * This is a timer function used to age out stale AST nodes from
  1941. * AST table
  1942. */
  1943. #ifdef FEATURE_WDS
  1944. static void dp_ast_aging_timer_fn(void *soc_hdl)
  1945. {
  1946. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  1947. struct dp_pdev *pdev;
  1948. struct dp_vdev *vdev;
  1949. struct dp_peer *peer;
  1950. struct dp_ast_entry *ase, *temp_ase;
  1951. int i;
  1952. bool check_wds_ase = false;
  1953. if (soc->wds_ast_aging_timer_cnt++ >= DP_WDS_AST_AGING_TIMER_CNT) {
  1954. soc->wds_ast_aging_timer_cnt = 0;
  1955. check_wds_ase = true;
  1956. }
  1957. /* Peer list access lock */
  1958. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1959. /* AST list access lock */
  1960. qdf_spin_lock_bh(&soc->ast_lock);
  1961. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  1962. pdev = soc->pdev_list[i];
  1963. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  1964. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1965. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  1966. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  1967. /*
  1968. * Do not expire static ast entries
  1969. * and HM WDS entries
  1970. */
  1971. if (ase->type !=
  1972. CDP_TXRX_AST_TYPE_WDS &&
  1973. ase->type !=
  1974. CDP_TXRX_AST_TYPE_MEC &&
  1975. ase->type !=
  1976. CDP_TXRX_AST_TYPE_DA)
  1977. continue;
  1978. /* Expire MEC entry every n sec.
  1979. * This needs to be expired in
  1980. * case if STA backbone is made as
  1981. * AP backbone, In this case it needs
  1982. * to be re-added as a WDS entry.
  1983. */
  1984. if (ase->is_active && ase->type ==
  1985. CDP_TXRX_AST_TYPE_MEC) {
  1986. ase->is_active = FALSE;
  1987. continue;
  1988. } else if (ase->is_active &&
  1989. check_wds_ase) {
  1990. ase->is_active = FALSE;
  1991. continue;
  1992. }
  1993. if (ase->type ==
  1994. CDP_TXRX_AST_TYPE_MEC) {
  1995. DP_STATS_INC(soc,
  1996. ast.aged_out, 1);
  1997. dp_peer_del_ast(soc, ase);
  1998. } else if (check_wds_ase) {
  1999. DP_STATS_INC(soc,
  2000. ast.aged_out, 1);
  2001. dp_peer_del_ast(soc, ase);
  2002. }
  2003. }
  2004. }
  2005. }
  2006. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  2007. }
  2008. qdf_spin_unlock_bh(&soc->ast_lock);
  2009. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2010. if (qdf_atomic_read(&soc->cmn_init_done))
  2011. qdf_timer_mod(&soc->ast_aging_timer,
  2012. DP_AST_AGING_TIMER_DEFAULT_MS);
  2013. }
  2014. /*
  2015. * dp_soc_wds_attach() - Setup WDS timer and AST table
  2016. * @soc: Datapath SOC handle
  2017. *
  2018. * Return: None
  2019. */
  2020. static void dp_soc_wds_attach(struct dp_soc *soc)
  2021. {
  2022. soc->wds_ast_aging_timer_cnt = 0;
  2023. qdf_timer_init(soc->osdev, &soc->ast_aging_timer,
  2024. dp_ast_aging_timer_fn, (void *)soc,
  2025. QDF_TIMER_TYPE_WAKE_APPS);
  2026. qdf_timer_mod(&soc->ast_aging_timer, DP_AST_AGING_TIMER_DEFAULT_MS);
  2027. }
  2028. /*
  2029. * dp_soc_wds_detach() - Detach WDS data structures and timers
  2030. * @txrx_soc: DP SOC handle
  2031. *
  2032. * Return: None
  2033. */
  2034. static void dp_soc_wds_detach(struct dp_soc *soc)
  2035. {
  2036. qdf_timer_stop(&soc->ast_aging_timer);
  2037. qdf_timer_free(&soc->ast_aging_timer);
  2038. }
  2039. #else
  2040. static void dp_soc_wds_attach(struct dp_soc *soc)
  2041. {
  2042. }
  2043. static void dp_soc_wds_detach(struct dp_soc *soc)
  2044. {
  2045. }
  2046. #endif
  2047. /*
  2048. * dp_soc_reset_ring_map() - Reset cpu ring map
  2049. * @soc: Datapath soc handler
  2050. *
  2051. * This api resets the default cpu ring map
  2052. */
  2053. static void dp_soc_reset_cpu_ring_map(struct dp_soc *soc)
  2054. {
  2055. uint8_t i;
  2056. int nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  2057. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  2058. switch (nss_config) {
  2059. case dp_nss_cfg_first_radio:
  2060. /*
  2061. * Setting Tx ring map for one nss offloaded radio
  2062. */
  2063. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_FIRST_RADIO_OFFLOADED_MAP][i];
  2064. break;
  2065. case dp_nss_cfg_second_radio:
  2066. /*
  2067. * Setting Tx ring for two nss offloaded radios
  2068. */
  2069. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_SECOND_RADIO_OFFLOADED_MAP][i];
  2070. break;
  2071. case dp_nss_cfg_dbdc:
  2072. /*
  2073. * Setting Tx ring map for 2 nss offloaded radios
  2074. */
  2075. soc->tx_ring_map[i] =
  2076. dp_cpu_ring_map[DP_NSS_DBDC_OFFLOADED_MAP][i];
  2077. break;
  2078. case dp_nss_cfg_dbtc:
  2079. /*
  2080. * Setting Tx ring map for 3 nss offloaded radios
  2081. */
  2082. soc->tx_ring_map[i] =
  2083. dp_cpu_ring_map[DP_NSS_DBTC_OFFLOADED_MAP][i];
  2084. break;
  2085. default:
  2086. dp_err("tx_ring_map failed due to invalid nss cfg");
  2087. break;
  2088. }
  2089. }
  2090. }
  2091. /*
  2092. * dp_soc_ring_if_nss_offloaded() - find if ring is offloaded to NSS
  2093. * @dp_soc - DP soc handle
  2094. * @ring_type - ring type
  2095. * @ring_num - ring_num
  2096. *
  2097. * return 0 or 1
  2098. */
  2099. static uint8_t dp_soc_ring_if_nss_offloaded(struct dp_soc *soc, enum hal_ring_type ring_type, int ring_num)
  2100. {
  2101. uint8_t nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  2102. uint8_t status = 0;
  2103. switch (ring_type) {
  2104. case WBM2SW_RELEASE:
  2105. case REO_DST:
  2106. case RXDMA_BUF:
  2107. status = ((nss_config) & (1 << ring_num));
  2108. break;
  2109. default:
  2110. break;
  2111. }
  2112. return status;
  2113. }
  2114. /*
  2115. * dp_soc_reset_intr_mask() - reset interrupt mask
  2116. * @dp_soc - DP Soc handle
  2117. *
  2118. * Return: Return void
  2119. */
  2120. static void dp_soc_reset_intr_mask(struct dp_soc *soc)
  2121. {
  2122. uint8_t j;
  2123. int *grp_mask = NULL;
  2124. int group_number, mask, num_ring;
  2125. /* number of tx ring */
  2126. num_ring = wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  2127. /*
  2128. * group mask for tx completion ring.
  2129. */
  2130. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  2131. /* loop and reset the mask for only offloaded ring */
  2132. for (j = 0; j < num_ring; j++) {
  2133. if (!dp_soc_ring_if_nss_offloaded(soc, WBM2SW_RELEASE, j)) {
  2134. continue;
  2135. }
  2136. /*
  2137. * Group number corresponding to tx offloaded ring.
  2138. */
  2139. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  2140. if (group_number < 0) {
  2141. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2142. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  2143. WBM2SW_RELEASE, j);
  2144. return;
  2145. }
  2146. /* reset the tx mask for offloaded ring */
  2147. mask = wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, group_number);
  2148. mask &= (~(1 << j));
  2149. /*
  2150. * reset the interrupt mask for offloaded ring.
  2151. */
  2152. wlan_cfg_set_tx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  2153. }
  2154. /* number of rx rings */
  2155. num_ring = wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  2156. /*
  2157. * group mask for reo destination ring.
  2158. */
  2159. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  2160. /* loop and reset the mask for only offloaded ring */
  2161. for (j = 0; j < num_ring; j++) {
  2162. if (!dp_soc_ring_if_nss_offloaded(soc, REO_DST, j)) {
  2163. continue;
  2164. }
  2165. /*
  2166. * Group number corresponding to rx offloaded ring.
  2167. */
  2168. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  2169. if (group_number < 0) {
  2170. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2171. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  2172. REO_DST, j);
  2173. return;
  2174. }
  2175. /* set the interrupt mask for offloaded ring */
  2176. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  2177. mask &= (~(1 << j));
  2178. /*
  2179. * set the interrupt mask to zero for rx offloaded radio.
  2180. */
  2181. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  2182. }
  2183. /*
  2184. * group mask for Rx buffer refill ring
  2185. */
  2186. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  2187. /* loop and reset the mask for only offloaded ring */
  2188. for (j = 0; j < MAX_PDEV_CNT; j++) {
  2189. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF, j)) {
  2190. continue;
  2191. }
  2192. /*
  2193. * Group number corresponding to rx offloaded ring.
  2194. */
  2195. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  2196. if (group_number < 0) {
  2197. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2198. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  2199. REO_DST, j);
  2200. return;
  2201. }
  2202. /* set the interrupt mask for offloaded ring */
  2203. mask = wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  2204. group_number);
  2205. mask &= (~(1 << j));
  2206. /*
  2207. * set the interrupt mask to zero for rx offloaded radio.
  2208. */
  2209. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  2210. group_number, mask);
  2211. }
  2212. }
  2213. #ifdef IPA_OFFLOAD
  2214. /**
  2215. * dp_reo_remap_config() - configure reo remap register value based
  2216. * nss configuration.
  2217. * based on offload_radio value below remap configuration
  2218. * get applied.
  2219. * 0 - both Radios handled by host (remap rings 1, 2, 3 & 4)
  2220. * 1 - 1st Radio handled by NSS (remap rings 2, 3 & 4)
  2221. * 2 - 2nd Radio handled by NSS (remap rings 1, 2 & 4)
  2222. * 3 - both Radios handled by NSS (remap not required)
  2223. * 4 - IPA OFFLOAD enabled (remap rings 1,2 & 3)
  2224. *
  2225. * @remap1: output parameter indicates reo remap 1 register value
  2226. * @remap2: output parameter indicates reo remap 2 register value
  2227. * Return: bool type, true if remap is configured else false.
  2228. */
  2229. static bool dp_reo_remap_config(struct dp_soc *soc,
  2230. uint32_t *remap1,
  2231. uint32_t *remap2)
  2232. {
  2233. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | (0x1 << 9) |
  2234. (0x2 << 12) | (0x3 << 15) | (0x1 << 18) | (0x2 << 21)) << 8;
  2235. *remap2 = ((0x3 << 0) | (0x1 << 3) | (0x2 << 6) | (0x3 << 9) |
  2236. (0x1 << 12) | (0x2 << 15) | (0x3 << 18) | (0x1 << 21)) << 8;
  2237. dp_debug("remap1 %x remap2 %x", *remap1, *remap2);
  2238. return true;
  2239. }
  2240. #else
  2241. static bool dp_reo_remap_config(struct dp_soc *soc,
  2242. uint32_t *remap1,
  2243. uint32_t *remap2)
  2244. {
  2245. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  2246. switch (offload_radio) {
  2247. case dp_nss_cfg_default:
  2248. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  2249. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  2250. (0x3 << 18) | (0x4 << 21)) << 8;
  2251. *remap2 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  2252. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  2253. (0x3 << 18) | (0x4 << 21)) << 8;
  2254. break;
  2255. case dp_nss_cfg_first_radio:
  2256. *remap1 = ((0x2 << 0) | (0x3 << 3) | (0x4 << 6) |
  2257. (0x2 << 9) | (0x3 << 12) | (0x4 << 15) |
  2258. (0x2 << 18) | (0x3 << 21)) << 8;
  2259. *remap2 = ((0x4 << 0) | (0x2 << 3) | (0x3 << 6) |
  2260. (0x4 << 9) | (0x2 << 12) | (0x3 << 15) |
  2261. (0x4 << 18) | (0x2 << 21)) << 8;
  2262. break;
  2263. case dp_nss_cfg_second_radio:
  2264. *remap1 = ((0x1 << 0) | (0x3 << 3) | (0x4 << 6) |
  2265. (0x1 << 9) | (0x3 << 12) | (0x4 << 15) |
  2266. (0x1 << 18) | (0x3 << 21)) << 8;
  2267. *remap2 = ((0x4 << 0) | (0x1 << 3) | (0x3 << 6) |
  2268. (0x4 << 9) | (0x1 << 12) | (0x3 << 15) |
  2269. (0x4 << 18) | (0x1 << 21)) << 8;
  2270. break;
  2271. case dp_nss_cfg_dbdc:
  2272. case dp_nss_cfg_dbtc:
  2273. /* return false if both or all are offloaded to NSS */
  2274. return false;
  2275. }
  2276. dp_debug("remap1 %x remap2 %x offload_radio %u",
  2277. *remap1, *remap2, offload_radio);
  2278. return true;
  2279. }
  2280. #endif
  2281. /*
  2282. * dp_reo_frag_dst_set() - configure reo register to set the
  2283. * fragment destination ring
  2284. * @soc : Datapath soc
  2285. * @frag_dst_ring : output parameter to set fragment destination ring
  2286. *
  2287. * Based on offload_radio below fragment destination rings is selected
  2288. * 0 - TCL
  2289. * 1 - SW1
  2290. * 2 - SW2
  2291. * 3 - SW3
  2292. * 4 - SW4
  2293. * 5 - Release
  2294. * 6 - FW
  2295. * 7 - alternate select
  2296. *
  2297. * return: void
  2298. */
  2299. static void dp_reo_frag_dst_set(struct dp_soc *soc, uint8_t *frag_dst_ring)
  2300. {
  2301. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  2302. switch (offload_radio) {
  2303. case dp_nss_cfg_default:
  2304. *frag_dst_ring = HAL_SRNG_REO_EXCEPTION;
  2305. break;
  2306. case dp_nss_cfg_dbdc:
  2307. case dp_nss_cfg_dbtc:
  2308. *frag_dst_ring = HAL_SRNG_REO_ALTERNATE_SELECT;
  2309. break;
  2310. default:
  2311. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2312. FL("dp_reo_frag_dst_set invalid offload radio config"));
  2313. break;
  2314. }
  2315. }
  2316. #ifdef ENABLE_VERBOSE_DEBUG
  2317. static void dp_enable_verbose_debug(struct dp_soc *soc)
  2318. {
  2319. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  2320. soc_cfg_ctx = soc->wlan_cfg_ctx;
  2321. if (soc_cfg_ctx->per_pkt_trace & dp_verbose_debug_mask)
  2322. is_dp_verbose_debug_enabled = true;
  2323. if (soc_cfg_ctx->per_pkt_trace & hal_verbose_debug_mask)
  2324. hal_set_verbose_debug(true);
  2325. else
  2326. hal_set_verbose_debug(false);
  2327. }
  2328. #else
  2329. static void dp_enable_verbose_debug(struct dp_soc *soc)
  2330. {
  2331. }
  2332. #endif
  2333. /*
  2334. * dp_soc_cmn_setup() - Common SoC level initializion
  2335. * @soc: Datapath SOC handle
  2336. *
  2337. * This is an internal function used to setup common SOC data structures,
  2338. * to be called from PDEV attach after receiving HW mode capabilities from FW
  2339. */
  2340. static int dp_soc_cmn_setup(struct dp_soc *soc)
  2341. {
  2342. int i;
  2343. struct hal_reo_params reo_params;
  2344. int tx_ring_size;
  2345. int tx_comp_ring_size;
  2346. int reo_dst_ring_size;
  2347. uint32_t entries;
  2348. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  2349. if (qdf_atomic_read(&soc->cmn_init_done))
  2350. return 0;
  2351. if (dp_hw_link_desc_pool_setup(soc))
  2352. goto fail1;
  2353. soc_cfg_ctx = soc->wlan_cfg_ctx;
  2354. dp_enable_verbose_debug(soc);
  2355. /* Setup SRNG rings */
  2356. /* Common rings */
  2357. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  2358. wlan_cfg_get_dp_soc_wbm_release_ring_size(soc_cfg_ctx))) {
  2359. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2360. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  2361. goto fail1;
  2362. }
  2363. soc->num_tcl_data_rings = 0;
  2364. /* Tx data rings */
  2365. if (!wlan_cfg_per_pdev_tx_ring(soc_cfg_ctx)) {
  2366. soc->num_tcl_data_rings =
  2367. wlan_cfg_num_tcl_data_rings(soc_cfg_ctx);
  2368. tx_comp_ring_size =
  2369. wlan_cfg_tx_comp_ring_size(soc_cfg_ctx);
  2370. tx_ring_size =
  2371. wlan_cfg_tx_ring_size(soc_cfg_ctx);
  2372. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2373. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  2374. TCL_DATA, i, 0, tx_ring_size)) {
  2375. QDF_TRACE(QDF_MODULE_ID_DP,
  2376. QDF_TRACE_LEVEL_ERROR,
  2377. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  2378. goto fail1;
  2379. }
  2380. /*
  2381. * TBD: Set IPA WBM ring size with ini IPA UC tx buffer
  2382. * count
  2383. */
  2384. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  2385. WBM2SW_RELEASE, i, 0, tx_comp_ring_size)) {
  2386. QDF_TRACE(QDF_MODULE_ID_DP,
  2387. QDF_TRACE_LEVEL_ERROR,
  2388. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  2389. goto fail1;
  2390. }
  2391. }
  2392. } else {
  2393. /* This will be incremented during per pdev ring setup */
  2394. soc->num_tcl_data_rings = 0;
  2395. }
  2396. if (dp_tx_soc_attach(soc)) {
  2397. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2398. FL("dp_tx_soc_attach failed"));
  2399. goto fail1;
  2400. }
  2401. entries = wlan_cfg_get_dp_soc_tcl_cmd_ring_size(soc_cfg_ctx);
  2402. /* TCL command and status rings */
  2403. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  2404. entries)) {
  2405. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2406. FL("dp_srng_setup failed for tcl_cmd_ring"));
  2407. goto fail1;
  2408. }
  2409. entries = wlan_cfg_get_dp_soc_tcl_status_ring_size(soc_cfg_ctx);
  2410. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  2411. entries)) {
  2412. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2413. FL("dp_srng_setup failed for tcl_status_ring"));
  2414. goto fail1;
  2415. }
  2416. reo_dst_ring_size = wlan_cfg_get_reo_dst_ring_size(soc->wlan_cfg_ctx);
  2417. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  2418. * descriptors
  2419. */
  2420. /* Rx data rings */
  2421. if (!wlan_cfg_per_pdev_rx_ring(soc_cfg_ctx)) {
  2422. soc->num_reo_dest_rings =
  2423. wlan_cfg_num_reo_dest_rings(soc_cfg_ctx);
  2424. QDF_TRACE(QDF_MODULE_ID_DP,
  2425. QDF_TRACE_LEVEL_INFO,
  2426. FL("num_reo_dest_rings %d"), soc->num_reo_dest_rings);
  2427. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2428. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  2429. i, 0, reo_dst_ring_size)) {
  2430. QDF_TRACE(QDF_MODULE_ID_DP,
  2431. QDF_TRACE_LEVEL_ERROR,
  2432. FL(RNG_ERR "reo_dest_ring [%d]"), i);
  2433. goto fail1;
  2434. }
  2435. }
  2436. } else {
  2437. /* This will be incremented during per pdev ring setup */
  2438. soc->num_reo_dest_rings = 0;
  2439. }
  2440. entries = wlan_cfg_get_dp_soc_rxdma_err_dst_ring_size(soc_cfg_ctx);
  2441. /* LMAC RxDMA to SW Rings configuration */
  2442. if (!wlan_cfg_per_pdev_lmac_ring(soc_cfg_ctx)) {
  2443. /* Only valid for MCL */
  2444. struct dp_pdev *pdev = soc->pdev_list[0];
  2445. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  2446. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[i],
  2447. RXDMA_DST, 0, i,
  2448. entries)) {
  2449. QDF_TRACE(QDF_MODULE_ID_DP,
  2450. QDF_TRACE_LEVEL_ERROR,
  2451. FL(RNG_ERR "rxdma_err_dst_ring"));
  2452. goto fail1;
  2453. }
  2454. }
  2455. }
  2456. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  2457. /* REO reinjection ring */
  2458. entries = wlan_cfg_get_dp_soc_reo_reinject_ring_size(soc_cfg_ctx);
  2459. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  2460. entries)) {
  2461. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2462. FL("dp_srng_setup failed for reo_reinject_ring"));
  2463. goto fail1;
  2464. }
  2465. /* Rx release ring */
  2466. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  2467. wlan_cfg_get_dp_soc_rx_release_ring_size(soc_cfg_ctx))) {
  2468. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2469. FL("dp_srng_setup failed for rx_rel_ring"));
  2470. goto fail1;
  2471. }
  2472. /* Rx exception ring */
  2473. entries = wlan_cfg_get_dp_soc_reo_exception_ring_size(soc_cfg_ctx);
  2474. if (dp_srng_setup(soc, &soc->reo_exception_ring,
  2475. REO_EXCEPTION, 0, MAX_REO_DEST_RINGS, entries)) {
  2476. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2477. FL("dp_srng_setup failed for reo_exception_ring"));
  2478. goto fail1;
  2479. }
  2480. /* REO command and status rings */
  2481. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  2482. wlan_cfg_get_dp_soc_reo_cmd_ring_size(soc_cfg_ctx))) {
  2483. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2484. FL("dp_srng_setup failed for reo_cmd_ring"));
  2485. goto fail1;
  2486. }
  2487. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  2488. TAILQ_INIT(&soc->rx.reo_cmd_list);
  2489. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  2490. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  2491. wlan_cfg_get_dp_soc_reo_status_ring_size(soc_cfg_ctx))) {
  2492. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2493. FL("dp_srng_setup failed for reo_status_ring"));
  2494. goto fail1;
  2495. }
  2496. /* Reset the cpu ring map if radio is NSS offloaded */
  2497. if (wlan_cfg_get_dp_soc_nss_cfg(soc_cfg_ctx)) {
  2498. dp_soc_reset_cpu_ring_map(soc);
  2499. dp_soc_reset_intr_mask(soc);
  2500. }
  2501. /* Setup HW REO */
  2502. qdf_mem_zero(&reo_params, sizeof(reo_params));
  2503. if (wlan_cfg_is_rx_hash_enabled(soc_cfg_ctx)) {
  2504. /*
  2505. * Reo ring remap is not required if both radios
  2506. * are offloaded to NSS
  2507. */
  2508. if (!dp_reo_remap_config(soc,
  2509. &reo_params.remap1,
  2510. &reo_params.remap2))
  2511. goto out;
  2512. reo_params.rx_hash_enabled = true;
  2513. }
  2514. /* setup the global rx defrag waitlist */
  2515. TAILQ_INIT(&soc->rx.defrag.waitlist);
  2516. soc->rx.defrag.timeout_ms =
  2517. wlan_cfg_get_rx_defrag_min_timeout(soc_cfg_ctx);
  2518. soc->rx.defrag.next_flush_ms = 0;
  2519. soc->rx.flags.defrag_timeout_check =
  2520. wlan_cfg_get_defrag_timeout_check(soc_cfg_ctx);
  2521. qdf_spinlock_create(&soc->rx.defrag.defrag_lock);
  2522. out:
  2523. /*
  2524. * set the fragment destination ring
  2525. */
  2526. dp_reo_frag_dst_set(soc, &reo_params.frag_dst_ring);
  2527. hal_reo_setup(soc->hal_soc, &reo_params);
  2528. qdf_atomic_set(&soc->cmn_init_done, 1);
  2529. dp_soc_wds_attach(soc);
  2530. qdf_nbuf_queue_init(&soc->htt_stats.msg);
  2531. return 0;
  2532. fail1:
  2533. /*
  2534. * Cleanup will be done as part of soc_detach, which will
  2535. * be called on pdev attach failure
  2536. */
  2537. return QDF_STATUS_E_FAILURE;
  2538. }
  2539. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  2540. static QDF_STATUS dp_lro_hash_setup(struct dp_soc *soc, struct dp_pdev *pdev)
  2541. {
  2542. struct cdp_lro_hash_config lro_hash;
  2543. QDF_STATUS status;
  2544. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  2545. !wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx) &&
  2546. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  2547. dp_err("LRO, GRO and RX hash disabled");
  2548. return QDF_STATUS_E_FAILURE;
  2549. }
  2550. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  2551. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) ||
  2552. wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx)) {
  2553. lro_hash.lro_enable = 1;
  2554. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  2555. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  2556. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  2557. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  2558. }
  2559. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  2560. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2561. LRO_IPV4_SEED_ARR_SZ));
  2562. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  2563. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2564. LRO_IPV6_SEED_ARR_SZ));
  2565. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  2566. if (!soc->cdp_soc.ol_ops->lro_hash_config) {
  2567. QDF_BUG(0);
  2568. dp_err("lro_hash_config not configured");
  2569. return QDF_STATUS_E_FAILURE;
  2570. }
  2571. status = soc->cdp_soc.ol_ops->lro_hash_config(pdev->ctrl_pdev,
  2572. &lro_hash);
  2573. if (!QDF_IS_STATUS_SUCCESS(status)) {
  2574. dp_err("failed to send lro_hash_config to FW %u", status);
  2575. return status;
  2576. }
  2577. dp_info("LRO CMD config: lro_enable: 0x%x tcp_flag 0x%x tcp_flag_mask 0x%x",
  2578. lro_hash.lro_enable, lro_hash.tcp_flag,
  2579. lro_hash.tcp_flag_mask);
  2580. dp_info("toeplitz_hash_ipv4:");
  2581. qdf_trace_hex_dump(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2582. (void *)lro_hash.toeplitz_hash_ipv4,
  2583. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2584. LRO_IPV4_SEED_ARR_SZ));
  2585. dp_info("toeplitz_hash_ipv6:");
  2586. qdf_trace_hex_dump(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2587. (void *)lro_hash.toeplitz_hash_ipv6,
  2588. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2589. LRO_IPV6_SEED_ARR_SZ));
  2590. return status;
  2591. }
  2592. /*
  2593. * dp_rxdma_ring_setup() - configure the RX DMA rings
  2594. * @soc: data path SoC handle
  2595. * @pdev: Physical device handle
  2596. *
  2597. * Return: 0 - success, > 0 - failure
  2598. */
  2599. #ifdef QCA_HOST2FW_RXBUF_RING
  2600. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2601. struct dp_pdev *pdev)
  2602. {
  2603. struct wlan_cfg_dp_pdev_ctxt *pdev_cfg_ctx;
  2604. int max_mac_rings;
  2605. int i;
  2606. pdev_cfg_ctx = pdev->wlan_cfg_ctx;
  2607. max_mac_rings = wlan_cfg_get_num_mac_rings(pdev_cfg_ctx);
  2608. for (i = 0; i < max_mac_rings; i++) {
  2609. dp_verbose_debug("pdev_id %d mac_id %d", pdev->pdev_id, i);
  2610. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  2611. RXDMA_BUF, 1, i,
  2612. wlan_cfg_get_rx_dma_buf_ring_size(pdev_cfg_ctx))) {
  2613. QDF_TRACE(QDF_MODULE_ID_DP,
  2614. QDF_TRACE_LEVEL_ERROR,
  2615. FL("failed rx mac ring setup"));
  2616. return QDF_STATUS_E_FAILURE;
  2617. }
  2618. }
  2619. return QDF_STATUS_SUCCESS;
  2620. }
  2621. #else
  2622. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2623. struct dp_pdev *pdev)
  2624. {
  2625. return QDF_STATUS_SUCCESS;
  2626. }
  2627. #endif
  2628. /**
  2629. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  2630. * @pdev - DP_PDEV handle
  2631. *
  2632. * Return: void
  2633. */
  2634. static inline void
  2635. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  2636. {
  2637. uint8_t map_id;
  2638. struct dp_soc *soc = pdev->soc;
  2639. if (!soc)
  2640. return;
  2641. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  2642. qdf_mem_copy(pdev->dscp_tid_map[map_id],
  2643. default_dscp_tid_map,
  2644. sizeof(default_dscp_tid_map));
  2645. }
  2646. for (map_id = 0; map_id < soc->num_hw_dscp_tid_map; map_id++) {
  2647. hal_tx_set_dscp_tid_map(soc->hal_soc,
  2648. default_dscp_tid_map,
  2649. map_id);
  2650. }
  2651. }
  2652. #ifdef IPA_OFFLOAD
  2653. /**
  2654. * dp_setup_ipa_rx_refill_buf_ring - Setup second Rx refill buffer ring
  2655. * @soc: data path instance
  2656. * @pdev: core txrx pdev context
  2657. *
  2658. * Return: QDF_STATUS_SUCCESS: success
  2659. * QDF_STATUS_E_RESOURCES: Error return
  2660. */
  2661. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2662. struct dp_pdev *pdev)
  2663. {
  2664. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  2665. int entries;
  2666. soc_cfg_ctx = soc->wlan_cfg_ctx;
  2667. entries = wlan_cfg_get_dp_soc_rxdma_refill_ring_size(soc_cfg_ctx);
  2668. /* Setup second Rx refill buffer ring */
  2669. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2670. IPA_RX_REFILL_BUF_RING_IDX,
  2671. pdev->pdev_id,
  2672. entries)) {
  2673. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2674. FL("dp_srng_setup failed second rx refill ring"));
  2675. return QDF_STATUS_E_FAILURE;
  2676. }
  2677. return QDF_STATUS_SUCCESS;
  2678. }
  2679. /**
  2680. * dp_cleanup_ipa_rx_refill_buf_ring - Cleanup second Rx refill buffer ring
  2681. * @soc: data path instance
  2682. * @pdev: core txrx pdev context
  2683. *
  2684. * Return: void
  2685. */
  2686. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2687. struct dp_pdev *pdev)
  2688. {
  2689. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2690. IPA_RX_REFILL_BUF_RING_IDX);
  2691. }
  2692. #else
  2693. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2694. struct dp_pdev *pdev)
  2695. {
  2696. return QDF_STATUS_SUCCESS;
  2697. }
  2698. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2699. struct dp_pdev *pdev)
  2700. {
  2701. }
  2702. #endif
  2703. #if !defined(DISABLE_MON_CONFIG)
  2704. /**
  2705. * dp_mon_rings_setup() - Initialize Monitor rings based on target
  2706. * @soc: soc handle
  2707. * @pdev: physical device handle
  2708. *
  2709. * Return: nonzero on failure and zero on success
  2710. */
  2711. static
  2712. QDF_STATUS dp_mon_rings_setup(struct dp_soc *soc, struct dp_pdev *pdev)
  2713. {
  2714. int mac_id = 0;
  2715. int pdev_id = pdev->pdev_id;
  2716. int entries;
  2717. struct wlan_cfg_dp_pdev_ctxt *pdev_cfg_ctx;
  2718. pdev_cfg_ctx = pdev->wlan_cfg_ctx;
  2719. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2720. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  2721. if (soc->wlan_cfg_ctx->rxdma1_enable) {
  2722. entries =
  2723. wlan_cfg_get_dma_mon_buf_ring_size(pdev_cfg_ctx);
  2724. if (dp_srng_setup(soc,
  2725. &pdev->rxdma_mon_buf_ring[mac_id],
  2726. RXDMA_MONITOR_BUF, 0, mac_for_pdev,
  2727. entries)) {
  2728. QDF_TRACE(QDF_MODULE_ID_DP,
  2729. QDF_TRACE_LEVEL_ERROR,
  2730. FL(RNG_ERR "rxdma_mon_buf_ring "));
  2731. return QDF_STATUS_E_NOMEM;
  2732. }
  2733. entries =
  2734. wlan_cfg_get_dma_mon_dest_ring_size(pdev_cfg_ctx);
  2735. if (dp_srng_setup(soc,
  2736. &pdev->rxdma_mon_dst_ring[mac_id],
  2737. RXDMA_MONITOR_DST, 0, mac_for_pdev,
  2738. entries)) {
  2739. QDF_TRACE(QDF_MODULE_ID_DP,
  2740. QDF_TRACE_LEVEL_ERROR,
  2741. FL(RNG_ERR "rxdma_mon_dst_ring"));
  2742. return QDF_STATUS_E_NOMEM;
  2743. }
  2744. entries =
  2745. wlan_cfg_get_dma_mon_stat_ring_size(pdev_cfg_ctx);
  2746. if (dp_srng_setup(soc,
  2747. &pdev->rxdma_mon_status_ring[mac_id],
  2748. RXDMA_MONITOR_STATUS, 0, mac_for_pdev,
  2749. entries)) {
  2750. QDF_TRACE(QDF_MODULE_ID_DP,
  2751. QDF_TRACE_LEVEL_ERROR,
  2752. FL(RNG_ERR "rxdma_mon_status_ring"));
  2753. return QDF_STATUS_E_NOMEM;
  2754. }
  2755. entries =
  2756. wlan_cfg_get_dma_mon_desc_ring_size(pdev_cfg_ctx);
  2757. if (dp_srng_setup(soc,
  2758. &pdev->rxdma_mon_desc_ring[mac_id],
  2759. RXDMA_MONITOR_DESC, 0, mac_for_pdev,
  2760. entries)) {
  2761. QDF_TRACE(QDF_MODULE_ID_DP,
  2762. QDF_TRACE_LEVEL_ERROR,
  2763. FL(RNG_ERR "rxdma_mon_desc_ring"));
  2764. return QDF_STATUS_E_NOMEM;
  2765. }
  2766. } else {
  2767. entries =
  2768. wlan_cfg_get_dma_mon_stat_ring_size(pdev_cfg_ctx);
  2769. if (dp_srng_setup(soc,
  2770. &pdev->rxdma_mon_status_ring[mac_id],
  2771. RXDMA_MONITOR_STATUS, 0, mac_for_pdev,
  2772. entries)) {
  2773. QDF_TRACE(QDF_MODULE_ID_DP,
  2774. QDF_TRACE_LEVEL_ERROR,
  2775. FL(RNG_ERR "rxdma_mon_status_ring"));
  2776. return QDF_STATUS_E_NOMEM;
  2777. }
  2778. }
  2779. }
  2780. return QDF_STATUS_SUCCESS;
  2781. }
  2782. #else
  2783. static
  2784. QDF_STATUS dp_mon_rings_setup(struct dp_soc *soc, struct dp_pdev *pdev)
  2785. {
  2786. return QDF_STATUS_SUCCESS;
  2787. }
  2788. #endif
  2789. /*dp_iterate_update_peer_list - update peer stats on cal client timer
  2790. * @pdev_hdl: pdev handle
  2791. */
  2792. #ifdef ATH_SUPPORT_EXT_STAT
  2793. void dp_iterate_update_peer_list(void *pdev_hdl)
  2794. {
  2795. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  2796. struct dp_soc *soc = pdev->soc;
  2797. struct dp_vdev *vdev = NULL;
  2798. struct dp_peer *peer = NULL;
  2799. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2800. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  2801. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  2802. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  2803. dp_cal_client_update_peer_stats(&peer->stats);
  2804. }
  2805. }
  2806. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  2807. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2808. }
  2809. #else
  2810. void dp_iterate_update_peer_list(void *pdev_hdl)
  2811. {
  2812. }
  2813. #endif
  2814. /*
  2815. * dp_pdev_attach_wifi3() - attach txrx pdev
  2816. * @ctrl_pdev: Opaque PDEV object
  2817. * @txrx_soc: Datapath SOC handle
  2818. * @htc_handle: HTC handle for host-target interface
  2819. * @qdf_osdev: QDF OS device
  2820. * @pdev_id: PDEV ID
  2821. *
  2822. * Return: DP PDEV handle on success, NULL on failure
  2823. */
  2824. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  2825. struct cdp_ctrl_objmgr_pdev *ctrl_pdev,
  2826. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  2827. {
  2828. int tx_ring_size;
  2829. int tx_comp_ring_size;
  2830. int reo_dst_ring_size;
  2831. int entries;
  2832. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  2833. int nss_cfg;
  2834. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2835. struct dp_pdev *pdev = NULL;
  2836. if (dp_is_soc_reinit(soc))
  2837. pdev = soc->pdev_list[pdev_id];
  2838. else
  2839. pdev = qdf_mem_malloc(sizeof(*pdev));
  2840. if (!pdev) {
  2841. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2842. FL("DP PDEV memory allocation failed"));
  2843. goto fail0;
  2844. }
  2845. /*
  2846. * Variable to prevent double pdev deinitialization during
  2847. * radio detach execution .i.e. in the absence of any vdev.
  2848. */
  2849. pdev->pdev_deinit = 0;
  2850. pdev->invalid_peer = qdf_mem_malloc(sizeof(struct dp_peer));
  2851. if (!pdev->invalid_peer) {
  2852. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2853. FL("Invalid peer memory allocation failed"));
  2854. qdf_mem_free(pdev);
  2855. goto fail0;
  2856. }
  2857. soc_cfg_ctx = soc->wlan_cfg_ctx;
  2858. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach(soc->ctrl_psoc);
  2859. if (!pdev->wlan_cfg_ctx) {
  2860. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2861. FL("pdev cfg_attach failed"));
  2862. qdf_mem_free(pdev->invalid_peer);
  2863. qdf_mem_free(pdev);
  2864. goto fail0;
  2865. }
  2866. /*
  2867. * set nss pdev config based on soc config
  2868. */
  2869. nss_cfg = wlan_cfg_get_dp_soc_nss_cfg(soc_cfg_ctx);
  2870. wlan_cfg_set_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx,
  2871. (nss_cfg & (1 << pdev_id)));
  2872. pdev->soc = soc;
  2873. pdev->ctrl_pdev = ctrl_pdev;
  2874. pdev->pdev_id = pdev_id;
  2875. soc->pdev_list[pdev_id] = pdev;
  2876. pdev->lmac_id = wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, pdev_id);
  2877. soc->pdev_count++;
  2878. TAILQ_INIT(&pdev->vdev_list);
  2879. qdf_spinlock_create(&pdev->vdev_list_lock);
  2880. pdev->vdev_count = 0;
  2881. qdf_spinlock_create(&pdev->tx_mutex);
  2882. qdf_spinlock_create(&pdev->neighbour_peer_mutex);
  2883. TAILQ_INIT(&pdev->neighbour_peers_list);
  2884. pdev->neighbour_peers_added = false;
  2885. pdev->monitor_configured = false;
  2886. if (dp_soc_cmn_setup(soc)) {
  2887. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2888. FL("dp_soc_cmn_setup failed"));
  2889. goto fail1;
  2890. }
  2891. /* Setup per PDEV TCL rings if configured */
  2892. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2893. tx_ring_size =
  2894. wlan_cfg_tx_ring_size(soc_cfg_ctx);
  2895. tx_comp_ring_size =
  2896. wlan_cfg_tx_comp_ring_size(soc_cfg_ctx);
  2897. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  2898. pdev_id, pdev_id, tx_ring_size)) {
  2899. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2900. FL("dp_srng_setup failed for tcl_data_ring"));
  2901. goto fail1;
  2902. }
  2903. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  2904. WBM2SW_RELEASE, pdev_id, pdev_id, tx_comp_ring_size)) {
  2905. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2906. FL("dp_srng_setup failed for tx_comp_ring"));
  2907. goto fail1;
  2908. }
  2909. soc->num_tcl_data_rings++;
  2910. }
  2911. /* Tx specific init */
  2912. if (dp_tx_pdev_attach(pdev)) {
  2913. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2914. FL("dp_tx_pdev_attach failed"));
  2915. goto fail1;
  2916. }
  2917. reo_dst_ring_size = wlan_cfg_get_reo_dst_ring_size(soc->wlan_cfg_ctx);
  2918. /* Setup per PDEV REO rings if configured */
  2919. if (wlan_cfg_per_pdev_rx_ring(soc_cfg_ctx)) {
  2920. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  2921. pdev_id, pdev_id, reo_dst_ring_size)) {
  2922. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2923. FL("dp_srng_setup failed for reo_dest_ringn"));
  2924. goto fail1;
  2925. }
  2926. soc->num_reo_dest_rings++;
  2927. }
  2928. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  2929. wlan_cfg_get_dp_soc_rxdma_refill_ring_size(soc_cfg_ctx))) {
  2930. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2931. FL("dp_srng_setup failed rx refill ring"));
  2932. goto fail1;
  2933. }
  2934. if (dp_rxdma_ring_setup(soc, pdev)) {
  2935. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2936. FL("RXDMA ring config failed"));
  2937. goto fail1;
  2938. }
  2939. if (dp_mon_rings_setup(soc, pdev)) {
  2940. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2941. FL("MONITOR rings setup failed"));
  2942. goto fail1;
  2943. }
  2944. entries = wlan_cfg_get_dp_soc_rxdma_err_dst_ring_size(soc_cfg_ctx);
  2945. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2946. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST,
  2947. 0, pdev_id,
  2948. entries)) {
  2949. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2950. FL(RNG_ERR "rxdma_err_dst_ring"));
  2951. goto fail1;
  2952. }
  2953. }
  2954. if (dp_setup_ipa_rx_refill_buf_ring(soc, pdev))
  2955. goto fail1;
  2956. if (dp_ipa_ring_resource_setup(soc, pdev))
  2957. goto fail1;
  2958. if (dp_ipa_uc_attach(soc, pdev) != QDF_STATUS_SUCCESS) {
  2959. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2960. FL("dp_ipa_uc_attach failed"));
  2961. goto fail1;
  2962. }
  2963. /* Rx specific init */
  2964. if (dp_rx_pdev_attach(pdev)) {
  2965. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2966. FL("dp_rx_pdev_attach failed"));
  2967. goto fail1;
  2968. }
  2969. DP_STATS_INIT(pdev);
  2970. /* Monitor filter init */
  2971. pdev->mon_filter_mode = MON_FILTER_ALL;
  2972. pdev->fp_mgmt_filter = FILTER_MGMT_ALL;
  2973. pdev->fp_ctrl_filter = FILTER_CTRL_ALL;
  2974. pdev->fp_data_filter = FILTER_DATA_ALL;
  2975. pdev->mo_mgmt_filter = FILTER_MGMT_ALL;
  2976. pdev->mo_ctrl_filter = FILTER_CTRL_ALL;
  2977. pdev->mo_data_filter = FILTER_DATA_ALL;
  2978. dp_local_peer_id_pool_init(pdev);
  2979. dp_dscp_tid_map_setup(pdev);
  2980. /* Rx monitor mode specific init */
  2981. if (dp_rx_pdev_mon_attach(pdev)) {
  2982. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2983. "dp_rx_pdev_mon_attach failed");
  2984. goto fail1;
  2985. }
  2986. if (dp_wdi_event_attach(pdev)) {
  2987. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2988. "dp_wdi_evet_attach failed");
  2989. goto fail1;
  2990. }
  2991. /* set the reo destination during initialization */
  2992. pdev->reo_dest = pdev->pdev_id + 1;
  2993. /*
  2994. * initialize ppdu tlv list
  2995. */
  2996. TAILQ_INIT(&pdev->ppdu_info_list);
  2997. pdev->tlv_count = 0;
  2998. pdev->list_depth = 0;
  2999. qdf_mem_zero(&pdev->sojourn_stats, sizeof(struct cdp_tx_sojourn_stats));
  3000. pdev->sojourn_buf = qdf_nbuf_alloc(pdev->soc->osdev,
  3001. sizeof(struct cdp_tx_sojourn_stats), 0, 4,
  3002. TRUE);
  3003. /* initlialize cal client timer */
  3004. dp_cal_client_attach(&pdev->cal_client_ctx, pdev, pdev->soc->osdev,
  3005. &dp_iterate_update_peer_list);
  3006. qdf_event_create(&pdev->fw_peer_stats_event);
  3007. pdev->num_tx_allowed = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  3008. return (struct cdp_pdev *)pdev;
  3009. fail1:
  3010. dp_pdev_detach((struct cdp_pdev *)pdev, 0);
  3011. fail0:
  3012. return NULL;
  3013. }
  3014. /*
  3015. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  3016. * @soc: data path SoC handle
  3017. * @pdev: Physical device handle
  3018. *
  3019. * Return: void
  3020. */
  3021. #ifdef QCA_HOST2FW_RXBUF_RING
  3022. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  3023. struct dp_pdev *pdev)
  3024. {
  3025. int max_mac_rings =
  3026. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  3027. int i;
  3028. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  3029. max_mac_rings : MAX_RX_MAC_RINGS;
  3030. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  3031. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  3032. RXDMA_BUF, 1);
  3033. qdf_timer_free(&soc->mon_reap_timer);
  3034. }
  3035. #else
  3036. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  3037. struct dp_pdev *pdev)
  3038. {
  3039. }
  3040. #endif
  3041. /*
  3042. * dp_neighbour_peers_detach() - Detach neighbour peers(nac clients)
  3043. * @pdev: device object
  3044. *
  3045. * Return: void
  3046. */
  3047. static void dp_neighbour_peers_detach(struct dp_pdev *pdev)
  3048. {
  3049. struct dp_neighbour_peer *peer = NULL;
  3050. struct dp_neighbour_peer *temp_peer = NULL;
  3051. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  3052. neighbour_peer_list_elem, temp_peer) {
  3053. /* delete this peer from the list */
  3054. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  3055. peer, neighbour_peer_list_elem);
  3056. qdf_mem_free(peer);
  3057. }
  3058. qdf_spinlock_destroy(&pdev->neighbour_peer_mutex);
  3059. }
  3060. /**
  3061. * dp_htt_ppdu_stats_detach() - detach stats resources
  3062. * @pdev: Datapath PDEV handle
  3063. *
  3064. * Return: void
  3065. */
  3066. static void dp_htt_ppdu_stats_detach(struct dp_pdev *pdev)
  3067. {
  3068. struct ppdu_info *ppdu_info, *ppdu_info_next;
  3069. TAILQ_FOREACH_SAFE(ppdu_info, &pdev->ppdu_info_list,
  3070. ppdu_info_list_elem, ppdu_info_next) {
  3071. if (!ppdu_info)
  3072. break;
  3073. qdf_assert_always(ppdu_info->nbuf);
  3074. qdf_nbuf_free(ppdu_info->nbuf);
  3075. qdf_mem_free(ppdu_info);
  3076. }
  3077. }
  3078. #if !defined(DISABLE_MON_CONFIG)
  3079. static
  3080. void dp_mon_ring_cleanup(struct dp_soc *soc, struct dp_pdev *pdev,
  3081. int mac_id)
  3082. {
  3083. if (soc->wlan_cfg_ctx->rxdma1_enable) {
  3084. dp_srng_cleanup(soc,
  3085. &pdev->rxdma_mon_buf_ring[mac_id],
  3086. RXDMA_MONITOR_BUF, 0);
  3087. dp_srng_cleanup(soc,
  3088. &pdev->rxdma_mon_dst_ring[mac_id],
  3089. RXDMA_MONITOR_DST, 0);
  3090. dp_srng_cleanup(soc,
  3091. &pdev->rxdma_mon_status_ring[mac_id],
  3092. RXDMA_MONITOR_STATUS, 0);
  3093. dp_srng_cleanup(soc,
  3094. &pdev->rxdma_mon_desc_ring[mac_id],
  3095. RXDMA_MONITOR_DESC, 0);
  3096. dp_srng_cleanup(soc,
  3097. &pdev->rxdma_err_dst_ring[mac_id],
  3098. RXDMA_DST, 0);
  3099. } else {
  3100. dp_srng_cleanup(soc,
  3101. &pdev->rxdma_mon_status_ring[mac_id],
  3102. RXDMA_MONITOR_STATUS, 0);
  3103. dp_srng_cleanup(soc,
  3104. &pdev->rxdma_err_dst_ring[mac_id],
  3105. RXDMA_DST, 0);
  3106. }
  3107. }
  3108. #else
  3109. static void dp_mon_ring_cleanup(struct dp_soc *soc, struct dp_pdev *pdev,
  3110. int mac_id)
  3111. {
  3112. }
  3113. #endif
  3114. /**
  3115. * dp_mon_ring_deinit() - Placeholder to deinitialize Monitor rings
  3116. *
  3117. * @soc: soc handle
  3118. * @pdev: datapath physical dev handle
  3119. * @mac_id: mac number
  3120. *
  3121. * Return: None
  3122. */
  3123. static void dp_mon_ring_deinit(struct dp_soc *soc, struct dp_pdev *pdev,
  3124. int mac_id)
  3125. {
  3126. }
  3127. /**
  3128. * dp_pdev_mem_reset() - Reset txrx pdev memory
  3129. * @pdev: dp pdev handle
  3130. *
  3131. * Return: None
  3132. */
  3133. static void dp_pdev_mem_reset(struct dp_pdev *pdev)
  3134. {
  3135. uint16_t len = 0;
  3136. uint8_t *dp_pdev_offset = (uint8_t *)pdev;
  3137. len = sizeof(struct dp_pdev) -
  3138. offsetof(struct dp_pdev, pdev_deinit) -
  3139. sizeof(pdev->pdev_deinit);
  3140. dp_pdev_offset = dp_pdev_offset +
  3141. offsetof(struct dp_pdev, pdev_deinit) +
  3142. sizeof(pdev->pdev_deinit);
  3143. qdf_mem_zero(dp_pdev_offset, len);
  3144. }
  3145. /**
  3146. * dp_pdev_deinit() - Deinit txrx pdev
  3147. * @txrx_pdev: Datapath PDEV handle
  3148. * @force: Force deinit
  3149. *
  3150. * Return: None
  3151. */
  3152. static void dp_pdev_deinit(struct cdp_pdev *txrx_pdev, int force)
  3153. {
  3154. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  3155. struct dp_soc *soc = pdev->soc;
  3156. qdf_nbuf_t curr_nbuf, next_nbuf;
  3157. int mac_id;
  3158. /*
  3159. * Prevent double pdev deinitialization during radio detach
  3160. * execution .i.e. in the absence of any vdev
  3161. */
  3162. if (pdev->pdev_deinit)
  3163. return;
  3164. pdev->pdev_deinit = 1;
  3165. dp_wdi_event_detach(pdev);
  3166. dp_tx_pdev_detach(pdev);
  3167. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  3168. dp_srng_deinit(soc, &soc->tcl_data_ring[pdev->pdev_id],
  3169. TCL_DATA, pdev->pdev_id);
  3170. dp_srng_deinit(soc, &soc->tx_comp_ring[pdev->pdev_id],
  3171. WBM2SW_RELEASE, pdev->pdev_id);
  3172. }
  3173. dp_pktlogmod_exit(pdev);
  3174. dp_rx_pdev_detach(pdev);
  3175. dp_rx_pdev_mon_detach(pdev);
  3176. dp_neighbour_peers_detach(pdev);
  3177. qdf_spinlock_destroy(&pdev->tx_mutex);
  3178. qdf_spinlock_destroy(&pdev->vdev_list_lock);
  3179. dp_ipa_uc_detach(soc, pdev);
  3180. dp_cleanup_ipa_rx_refill_buf_ring(soc, pdev);
  3181. /* Cleanup per PDEV REO rings if configured */
  3182. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  3183. dp_srng_deinit(soc, &soc->reo_dest_ring[pdev->pdev_id],
  3184. REO_DST, pdev->pdev_id);
  3185. }
  3186. dp_srng_deinit(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  3187. dp_rxdma_ring_cleanup(soc, pdev);
  3188. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3189. dp_mon_ring_deinit(soc, pdev, mac_id);
  3190. dp_srng_deinit(soc, &pdev->rxdma_err_dst_ring[mac_id],
  3191. RXDMA_DST, 0);
  3192. }
  3193. curr_nbuf = pdev->invalid_peer_head_msdu;
  3194. while (curr_nbuf) {
  3195. next_nbuf = qdf_nbuf_next(curr_nbuf);
  3196. qdf_nbuf_free(curr_nbuf);
  3197. curr_nbuf = next_nbuf;
  3198. }
  3199. pdev->invalid_peer_head_msdu = NULL;
  3200. pdev->invalid_peer_tail_msdu = NULL;
  3201. dp_htt_ppdu_stats_detach(pdev);
  3202. qdf_nbuf_free(pdev->sojourn_buf);
  3203. dp_cal_client_detach(&pdev->cal_client_ctx);
  3204. soc->pdev_count--;
  3205. wlan_cfg_pdev_detach(pdev->wlan_cfg_ctx);
  3206. qdf_mem_free(pdev->invalid_peer);
  3207. qdf_mem_free(pdev->dp_txrx_handle);
  3208. dp_pdev_mem_reset(pdev);
  3209. }
  3210. /**
  3211. * dp_pdev_deinit_wifi3() - Deinit txrx pdev
  3212. * @txrx_pdev: Datapath PDEV handle
  3213. * @force: Force deinit
  3214. *
  3215. * Return: None
  3216. */
  3217. static void dp_pdev_deinit_wifi3(struct cdp_pdev *txrx_pdev, int force)
  3218. {
  3219. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  3220. struct dp_soc *soc = pdev->soc;
  3221. soc->dp_soc_reinit = TRUE;
  3222. dp_pdev_deinit(txrx_pdev, force);
  3223. }
  3224. /*
  3225. * dp_pdev_detach() - Complete rest of pdev detach
  3226. * @txrx_pdev: Datapath PDEV handle
  3227. * @force: Force deinit
  3228. *
  3229. * Return: None
  3230. */
  3231. static void dp_pdev_detach(struct cdp_pdev *txrx_pdev, int force)
  3232. {
  3233. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  3234. struct dp_soc *soc = pdev->soc;
  3235. int mac_id;
  3236. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  3237. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  3238. TCL_DATA, pdev->pdev_id);
  3239. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  3240. WBM2SW_RELEASE, pdev->pdev_id);
  3241. }
  3242. dp_mon_link_free(pdev);
  3243. /* Cleanup per PDEV REO rings if configured */
  3244. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  3245. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  3246. REO_DST, pdev->pdev_id);
  3247. }
  3248. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  3249. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3250. dp_mon_ring_cleanup(soc, pdev, mac_id);
  3251. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[mac_id],
  3252. RXDMA_DST, 0);
  3253. }
  3254. soc->pdev_list[pdev->pdev_id] = NULL;
  3255. qdf_mem_free(pdev);
  3256. }
  3257. /*
  3258. * dp_pdev_detach_wifi3() - detach txrx pdev
  3259. * @txrx_pdev: Datapath PDEV handle
  3260. * @force: Force detach
  3261. *
  3262. * Return: None
  3263. */
  3264. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  3265. {
  3266. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  3267. struct dp_soc *soc = pdev->soc;
  3268. if (dp_is_soc_reinit(soc)) {
  3269. dp_pdev_detach(txrx_pdev, force);
  3270. } else {
  3271. dp_pdev_deinit(txrx_pdev, force);
  3272. dp_pdev_detach(txrx_pdev, force);
  3273. }
  3274. }
  3275. /*
  3276. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  3277. * @soc: DP SOC handle
  3278. */
  3279. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  3280. {
  3281. struct reo_desc_list_node *desc;
  3282. struct dp_rx_tid *rx_tid;
  3283. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  3284. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  3285. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  3286. rx_tid = &desc->rx_tid;
  3287. qdf_mem_unmap_nbytes_single(soc->osdev,
  3288. rx_tid->hw_qdesc_paddr,
  3289. QDF_DMA_BIDIRECTIONAL,
  3290. rx_tid->hw_qdesc_alloc_size);
  3291. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  3292. qdf_mem_free(desc);
  3293. }
  3294. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  3295. qdf_list_destroy(&soc->reo_desc_freelist);
  3296. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  3297. }
  3298. /**
  3299. * dp_soc_mem_reset() - Reset Dp Soc memory
  3300. * @soc: DP handle
  3301. *
  3302. * Return: None
  3303. */
  3304. static void dp_soc_mem_reset(struct dp_soc *soc)
  3305. {
  3306. uint16_t len = 0;
  3307. uint8_t *dp_soc_offset = (uint8_t *)soc;
  3308. len = sizeof(struct dp_soc) -
  3309. offsetof(struct dp_soc, dp_soc_reinit) -
  3310. sizeof(soc->dp_soc_reinit);
  3311. dp_soc_offset = dp_soc_offset +
  3312. offsetof(struct dp_soc, dp_soc_reinit) +
  3313. sizeof(soc->dp_soc_reinit);
  3314. qdf_mem_zero(dp_soc_offset, len);
  3315. }
  3316. /**
  3317. * dp_soc_deinit() - Deinitialize txrx SOC
  3318. * @txrx_soc: Opaque DP SOC handle
  3319. *
  3320. * Return: None
  3321. */
  3322. static void dp_soc_deinit(void *txrx_soc)
  3323. {
  3324. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3325. int i;
  3326. qdf_atomic_set(&soc->cmn_init_done, 0);
  3327. for (i = 0; i < MAX_PDEV_CNT; i++) {
  3328. if (soc->pdev_list[i])
  3329. dp_pdev_deinit((struct cdp_pdev *)
  3330. soc->pdev_list[i], 1);
  3331. }
  3332. qdf_flush_work(&soc->htt_stats.work);
  3333. qdf_disable_work(&soc->htt_stats.work);
  3334. /* Free pending htt stats messages */
  3335. qdf_nbuf_queue_free(&soc->htt_stats.msg);
  3336. dp_reo_cmdlist_destroy(soc);
  3337. dp_peer_find_detach(soc);
  3338. /* Free the ring memories */
  3339. /* Common rings */
  3340. dp_srng_deinit(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  3341. /* Tx data rings */
  3342. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  3343. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  3344. dp_srng_deinit(soc, &soc->tcl_data_ring[i],
  3345. TCL_DATA, i);
  3346. dp_srng_deinit(soc, &soc->tx_comp_ring[i],
  3347. WBM2SW_RELEASE, i);
  3348. }
  3349. }
  3350. /* TCL command and status rings */
  3351. dp_srng_deinit(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  3352. dp_srng_deinit(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  3353. /* Rx data rings */
  3354. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  3355. soc->num_reo_dest_rings =
  3356. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  3357. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  3358. /* TODO: Get number of rings and ring sizes
  3359. * from wlan_cfg
  3360. */
  3361. dp_srng_deinit(soc, &soc->reo_dest_ring[i],
  3362. REO_DST, i);
  3363. }
  3364. }
  3365. /* REO reinjection ring */
  3366. dp_srng_deinit(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  3367. /* Rx release ring */
  3368. dp_srng_deinit(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  3369. /* Rx exception ring */
  3370. /* TODO: Better to store ring_type and ring_num in
  3371. * dp_srng during setup
  3372. */
  3373. dp_srng_deinit(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  3374. /* REO command and status rings */
  3375. dp_srng_deinit(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  3376. dp_srng_deinit(soc, &soc->reo_status_ring, REO_STATUS, 0);
  3377. dp_soc_wds_detach(soc);
  3378. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  3379. qdf_spinlock_destroy(&soc->htt_stats.lock);
  3380. htt_soc_htc_dealloc(soc->htt_handle);
  3381. qdf_spinlock_destroy(&soc->rx.defrag.defrag_lock);
  3382. dp_reo_cmdlist_destroy(soc);
  3383. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  3384. dp_reo_desc_freelist_destroy(soc);
  3385. qdf_spinlock_destroy(&soc->ast_lock);
  3386. dp_soc_mem_reset(soc);
  3387. }
  3388. /**
  3389. * dp_soc_deinit_wifi3() - Deinitialize txrx SOC
  3390. * @txrx_soc: Opaque DP SOC handle
  3391. *
  3392. * Return: None
  3393. */
  3394. static void dp_soc_deinit_wifi3(void *txrx_soc)
  3395. {
  3396. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3397. soc->dp_soc_reinit = 1;
  3398. dp_soc_deinit(txrx_soc);
  3399. }
  3400. /*
  3401. * dp_soc_detach() - Detach rest of txrx SOC
  3402. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  3403. *
  3404. * Return: None
  3405. */
  3406. static void dp_soc_detach(void *txrx_soc)
  3407. {
  3408. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3409. int i;
  3410. qdf_atomic_set(&soc->cmn_init_done, 0);
  3411. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  3412. * SW descriptors
  3413. */
  3414. for (i = 0; i < MAX_PDEV_CNT; i++) {
  3415. if (soc->pdev_list[i])
  3416. dp_pdev_detach((struct cdp_pdev *)
  3417. soc->pdev_list[i], 1);
  3418. }
  3419. /* Free the ring memories */
  3420. /* Common rings */
  3421. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  3422. dp_tx_soc_detach(soc);
  3423. /* Tx data rings */
  3424. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  3425. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  3426. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  3427. TCL_DATA, i);
  3428. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  3429. WBM2SW_RELEASE, i);
  3430. }
  3431. }
  3432. /* TCL command and status rings */
  3433. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  3434. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  3435. /* Rx data rings */
  3436. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  3437. soc->num_reo_dest_rings =
  3438. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  3439. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  3440. /* TODO: Get number of rings and ring sizes
  3441. * from wlan_cfg
  3442. */
  3443. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  3444. REO_DST, i);
  3445. }
  3446. }
  3447. /* REO reinjection ring */
  3448. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  3449. /* Rx release ring */
  3450. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  3451. /* Rx exception ring */
  3452. /* TODO: Better to store ring_type and ring_num in
  3453. * dp_srng during setup
  3454. */
  3455. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  3456. /* REO command and status rings */
  3457. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  3458. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  3459. dp_hw_link_desc_pool_cleanup(soc);
  3460. htt_soc_detach(soc->htt_handle);
  3461. soc->dp_soc_reinit = 0;
  3462. wlan_cfg_soc_detach(soc->wlan_cfg_ctx);
  3463. qdf_mem_free(soc);
  3464. }
  3465. /*
  3466. * dp_soc_detach_wifi3() - Detach txrx SOC
  3467. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  3468. *
  3469. * Return: None
  3470. */
  3471. static void dp_soc_detach_wifi3(void *txrx_soc)
  3472. {
  3473. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3474. if (dp_is_soc_reinit(soc)) {
  3475. dp_soc_detach(txrx_soc);
  3476. } else {
  3477. dp_soc_deinit(txrx_soc);
  3478. dp_soc_detach(txrx_soc);
  3479. }
  3480. }
  3481. #if !defined(DISABLE_MON_CONFIG)
  3482. /**
  3483. * dp_mon_htt_srng_setup() - Prepare HTT messages for Monitor rings
  3484. * @soc: soc handle
  3485. * @pdev: physical device handle
  3486. * @mac_id: ring number
  3487. * @mac_for_pdev: mac_id
  3488. *
  3489. * Return: non-zero for failure, zero for success
  3490. */
  3491. static QDF_STATUS dp_mon_htt_srng_setup(struct dp_soc *soc,
  3492. struct dp_pdev *pdev,
  3493. int mac_id,
  3494. int mac_for_pdev)
  3495. {
  3496. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3497. if (soc->wlan_cfg_ctx->rxdma1_enable) {
  3498. status = htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3499. pdev->rxdma_mon_buf_ring[mac_id]
  3500. .hal_srng,
  3501. RXDMA_MONITOR_BUF);
  3502. if (status != QDF_STATUS_SUCCESS) {
  3503. dp_err("Failed to send htt srng setup message for Rxdma mon buf ring");
  3504. return status;
  3505. }
  3506. status = htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3507. pdev->rxdma_mon_dst_ring[mac_id]
  3508. .hal_srng,
  3509. RXDMA_MONITOR_DST);
  3510. if (status != QDF_STATUS_SUCCESS) {
  3511. dp_err("Failed to send htt srng setup message for Rxdma mon dst ring");
  3512. return status;
  3513. }
  3514. status = htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3515. pdev->rxdma_mon_status_ring[mac_id]
  3516. .hal_srng,
  3517. RXDMA_MONITOR_STATUS);
  3518. if (status != QDF_STATUS_SUCCESS) {
  3519. dp_err("Failed to send htt srng setup message for Rxdma mon status ring");
  3520. return status;
  3521. }
  3522. status = htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3523. pdev->rxdma_mon_desc_ring[mac_id]
  3524. .hal_srng,
  3525. RXDMA_MONITOR_DESC);
  3526. if (status != QDF_STATUS_SUCCESS) {
  3527. dp_err("Failed to send htt srng message for Rxdma mon desc ring");
  3528. return status;
  3529. }
  3530. } else {
  3531. status = htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3532. pdev->rxdma_mon_status_ring[mac_id]
  3533. .hal_srng,
  3534. RXDMA_MONITOR_STATUS);
  3535. if (status != QDF_STATUS_SUCCESS) {
  3536. dp_err("Failed to send htt srng setup message for Rxdma mon status ring");
  3537. return status;
  3538. }
  3539. }
  3540. return status;
  3541. }
  3542. #else
  3543. static QDF_STATUS dp_mon_htt_srng_setup(struct dp_soc *soc,
  3544. struct dp_pdev *pdev,
  3545. int mac_id,
  3546. int mac_for_pdev)
  3547. {
  3548. return QDF_STATUS_SUCCESS;
  3549. }
  3550. #endif
  3551. /*
  3552. * dp_rxdma_ring_config() - configure the RX DMA rings
  3553. *
  3554. * This function is used to configure the MAC rings.
  3555. * On MCL host provides buffers in Host2FW ring
  3556. * FW refills (copies) buffers to the ring and updates
  3557. * ring_idx in register
  3558. *
  3559. * @soc: data path SoC handle
  3560. *
  3561. * Return: zero on success, non-zero on failure
  3562. */
  3563. #ifdef QCA_HOST2FW_RXBUF_RING
  3564. static QDF_STATUS dp_rxdma_ring_config(struct dp_soc *soc)
  3565. {
  3566. int i;
  3567. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3568. for (i = 0; i < MAX_PDEV_CNT; i++) {
  3569. struct dp_pdev *pdev = soc->pdev_list[i];
  3570. if (pdev) {
  3571. int mac_id;
  3572. bool dbs_enable = 0;
  3573. int max_mac_rings =
  3574. wlan_cfg_get_num_mac_rings
  3575. (pdev->wlan_cfg_ctx);
  3576. htt_srng_setup(soc->htt_handle, 0,
  3577. pdev->rx_refill_buf_ring.hal_srng,
  3578. RXDMA_BUF);
  3579. if (pdev->rx_refill_buf_ring2.hal_srng)
  3580. htt_srng_setup(soc->htt_handle, 0,
  3581. pdev->rx_refill_buf_ring2.hal_srng,
  3582. RXDMA_BUF);
  3583. if (soc->cdp_soc.ol_ops->
  3584. is_hw_dbs_2x2_capable) {
  3585. dbs_enable = soc->cdp_soc.ol_ops->
  3586. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  3587. }
  3588. if (dbs_enable) {
  3589. QDF_TRACE(QDF_MODULE_ID_TXRX,
  3590. QDF_TRACE_LEVEL_ERROR,
  3591. FL("DBS enabled max_mac_rings %d"),
  3592. max_mac_rings);
  3593. } else {
  3594. max_mac_rings = 1;
  3595. QDF_TRACE(QDF_MODULE_ID_TXRX,
  3596. QDF_TRACE_LEVEL_ERROR,
  3597. FL("DBS disabled, max_mac_rings %d"),
  3598. max_mac_rings);
  3599. }
  3600. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3601. FL("pdev_id %d max_mac_rings %d"),
  3602. pdev->pdev_id, max_mac_rings);
  3603. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  3604. int mac_for_pdev = dp_get_mac_id_for_pdev(
  3605. mac_id, pdev->pdev_id);
  3606. QDF_TRACE(QDF_MODULE_ID_TXRX,
  3607. QDF_TRACE_LEVEL_ERROR,
  3608. FL("mac_id %d"), mac_for_pdev);
  3609. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3610. pdev->rx_mac_buf_ring[mac_id]
  3611. .hal_srng,
  3612. RXDMA_BUF);
  3613. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3614. pdev->rxdma_err_dst_ring[mac_id]
  3615. .hal_srng,
  3616. RXDMA_DST);
  3617. /* Configure monitor mode rings */
  3618. status = dp_mon_htt_srng_setup(soc, pdev,
  3619. mac_id,
  3620. mac_for_pdev);
  3621. if (status != QDF_STATUS_SUCCESS) {
  3622. dp_err("Failed to send htt monitor messages to target");
  3623. return status;
  3624. }
  3625. }
  3626. }
  3627. }
  3628. /*
  3629. * Timer to reap rxdma status rings.
  3630. * Needed until we enable ppdu end interrupts
  3631. */
  3632. qdf_timer_init(soc->osdev, &soc->mon_reap_timer,
  3633. dp_service_mon_rings, (void *)soc,
  3634. QDF_TIMER_TYPE_WAKE_APPS);
  3635. soc->reap_timer_init = 1;
  3636. return status;
  3637. }
  3638. #else
  3639. /* This is only for WIN */
  3640. static QDF_STATUS dp_rxdma_ring_config(struct dp_soc *soc)
  3641. {
  3642. int i;
  3643. int mac_id;
  3644. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3645. for (i = 0; i < MAX_PDEV_CNT; i++) {
  3646. struct dp_pdev *pdev = soc->pdev_list[i];
  3647. if (pdev == NULL)
  3648. continue;
  3649. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3650. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, i);
  3651. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3652. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  3653. #ifndef DISABLE_MON_CONFIG
  3654. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3655. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3656. RXDMA_MONITOR_BUF);
  3657. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3658. pdev->rxdma_mon_dst_ring[mac_id].hal_srng,
  3659. RXDMA_MONITOR_DST);
  3660. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3661. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3662. RXDMA_MONITOR_STATUS);
  3663. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3664. pdev->rxdma_mon_desc_ring[mac_id].hal_srng,
  3665. RXDMA_MONITOR_DESC);
  3666. #endif
  3667. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3668. pdev->rxdma_err_dst_ring[mac_id].hal_srng,
  3669. RXDMA_DST);
  3670. }
  3671. }
  3672. return status;
  3673. }
  3674. #endif
  3675. #ifdef NO_RX_PKT_HDR_TLV
  3676. static QDF_STATUS
  3677. dp_rxdma_ring_sel_cfg(struct dp_soc *soc)
  3678. {
  3679. int i;
  3680. int mac_id;
  3681. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  3682. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3683. htt_tlv_filter.mpdu_start = 1;
  3684. htt_tlv_filter.msdu_start = 1;
  3685. htt_tlv_filter.mpdu_end = 1;
  3686. htt_tlv_filter.msdu_end = 1;
  3687. htt_tlv_filter.attention = 1;
  3688. htt_tlv_filter.packet = 1;
  3689. htt_tlv_filter.packet_header = 0;
  3690. htt_tlv_filter.ppdu_start = 0;
  3691. htt_tlv_filter.ppdu_end = 0;
  3692. htt_tlv_filter.ppdu_end_user_stats = 0;
  3693. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3694. htt_tlv_filter.ppdu_end_status_done = 0;
  3695. htt_tlv_filter.enable_fp = 1;
  3696. htt_tlv_filter.enable_md = 0;
  3697. htt_tlv_filter.enable_md = 0;
  3698. htt_tlv_filter.enable_mo = 0;
  3699. htt_tlv_filter.fp_mgmt_filter = 0;
  3700. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_BA_REQ;
  3701. htt_tlv_filter.fp_data_filter = (FILTER_DATA_UCAST |
  3702. FILTER_DATA_MCAST |
  3703. FILTER_DATA_DATA);
  3704. htt_tlv_filter.mo_mgmt_filter = 0;
  3705. htt_tlv_filter.mo_ctrl_filter = 0;
  3706. htt_tlv_filter.mo_data_filter = 0;
  3707. htt_tlv_filter.md_data_filter = 0;
  3708. htt_tlv_filter.offset_valid = true;
  3709. htt_tlv_filter.rx_packet_offset = RX_PKT_TLVS_LEN;
  3710. /*Not subscribing rx_pkt_header*/
  3711. htt_tlv_filter.rx_header_offset = 0;
  3712. htt_tlv_filter.rx_mpdu_start_offset =
  3713. HAL_RX_PKT_TLV_MPDU_START_OFFSET(soc->hal_soc);
  3714. htt_tlv_filter.rx_mpdu_end_offset =
  3715. HAL_RX_PKT_TLV_MPDU_END_OFFSET(soc->hal_soc);
  3716. htt_tlv_filter.rx_msdu_start_offset =
  3717. HAL_RX_PKT_TLV_MSDU_START_OFFSET(soc->hal_soc);
  3718. htt_tlv_filter.rx_msdu_end_offset =
  3719. HAL_RX_PKT_TLV_MSDU_END_OFFSET(soc->hal_soc);
  3720. htt_tlv_filter.rx_attn_offset =
  3721. HAL_RX_PKT_TLV_ATTN_OFFSET(soc->hal_soc);
  3722. for (i = 0; i < MAX_PDEV_CNT; i++) {
  3723. struct dp_pdev *pdev = soc->pdev_list[i];
  3724. if (!pdev)
  3725. continue;
  3726. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3727. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  3728. pdev->pdev_id);
  3729. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3730. pdev->rx_refill_buf_ring.hal_srng,
  3731. RXDMA_BUF, RX_BUFFER_SIZE,
  3732. &htt_tlv_filter);
  3733. }
  3734. }
  3735. return status;
  3736. }
  3737. #else
  3738. static QDF_STATUS
  3739. dp_rxdma_ring_sel_cfg(struct dp_soc *soc)
  3740. {
  3741. return QDF_STATUS_SUCCESS;
  3742. }
  3743. #endif
  3744. /*
  3745. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  3746. * @cdp_soc: Opaque Datapath SOC handle
  3747. *
  3748. * Return: zero on success, non-zero on failure
  3749. */
  3750. static QDF_STATUS
  3751. dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  3752. {
  3753. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  3754. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3755. htt_soc_attach_target(soc->htt_handle);
  3756. status = dp_rxdma_ring_config(soc);
  3757. if (status != QDF_STATUS_SUCCESS) {
  3758. dp_err("Failed to send htt srng setup messages to target");
  3759. return status;
  3760. }
  3761. status = dp_rxdma_ring_sel_cfg(soc);
  3762. if (status != QDF_STATUS_SUCCESS) {
  3763. dp_err("Failed to send htt ring config message to target");
  3764. return status;
  3765. }
  3766. DP_STATS_INIT(soc);
  3767. /* initialize work queue for stats processing */
  3768. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  3769. return QDF_STATUS_SUCCESS;
  3770. }
  3771. /*
  3772. * dp_soc_get_nss_cfg_wifi3() - SOC get nss config
  3773. * @txrx_soc: Datapath SOC handle
  3774. */
  3775. static int dp_soc_get_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc)
  3776. {
  3777. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  3778. return wlan_cfg_get_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx);
  3779. }
  3780. /*
  3781. * dp_soc_set_nss_cfg_wifi3() - SOC set nss config
  3782. * @txrx_soc: Datapath SOC handle
  3783. * @nss_cfg: nss config
  3784. */
  3785. static void dp_soc_set_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc, int config)
  3786. {
  3787. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  3788. struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx = dsoc->wlan_cfg_ctx;
  3789. wlan_cfg_set_dp_soc_nss_cfg(wlan_cfg_ctx, config);
  3790. /*
  3791. * TODO: masked out based on the per offloaded radio
  3792. */
  3793. switch (config) {
  3794. case dp_nss_cfg_default:
  3795. break;
  3796. case dp_nss_cfg_dbdc:
  3797. case dp_nss_cfg_dbtc:
  3798. wlan_cfg_set_num_tx_desc_pool(wlan_cfg_ctx, 0);
  3799. wlan_cfg_set_num_tx_ext_desc_pool(wlan_cfg_ctx, 0);
  3800. wlan_cfg_set_num_tx_desc(wlan_cfg_ctx, 0);
  3801. wlan_cfg_set_num_tx_ext_desc(wlan_cfg_ctx, 0);
  3802. break;
  3803. default:
  3804. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3805. "Invalid offload config %d", config);
  3806. }
  3807. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3808. FL("nss-wifi<0> nss config is enabled"));
  3809. }
  3810. /*
  3811. * dp_vdev_attach_wifi3() - attach txrx vdev
  3812. * @txrx_pdev: Datapath PDEV handle
  3813. * @vdev_mac_addr: MAC address of the virtual interface
  3814. * @vdev_id: VDEV Id
  3815. * @wlan_op_mode: VDEV operating mode
  3816. *
  3817. * Return: DP VDEV handle on success, NULL on failure
  3818. */
  3819. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  3820. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  3821. {
  3822. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  3823. struct dp_soc *soc = pdev->soc;
  3824. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  3825. if (!vdev) {
  3826. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3827. FL("DP VDEV memory allocation failed"));
  3828. goto fail0;
  3829. }
  3830. vdev->pdev = pdev;
  3831. vdev->vdev_id = vdev_id;
  3832. vdev->opmode = op_mode;
  3833. vdev->osdev = soc->osdev;
  3834. vdev->osif_rx = NULL;
  3835. vdev->osif_rsim_rx_decap = NULL;
  3836. vdev->osif_get_key = NULL;
  3837. vdev->osif_rx_mon = NULL;
  3838. vdev->osif_tx_free_ext = NULL;
  3839. vdev->osif_vdev = NULL;
  3840. vdev->delete.pending = 0;
  3841. vdev->safemode = 0;
  3842. vdev->drop_unenc = 1;
  3843. vdev->sec_type = cdp_sec_type_none;
  3844. #ifdef notyet
  3845. vdev->filters_num = 0;
  3846. #endif
  3847. qdf_mem_copy(
  3848. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  3849. /* TODO: Initialize default HTT meta data that will be used in
  3850. * TCL descriptors for packets transmitted from this VDEV
  3851. */
  3852. TAILQ_INIT(&vdev->peer_list);
  3853. if ((soc->intr_mode == DP_INTR_POLL) &&
  3854. wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx) != 0) {
  3855. if ((pdev->vdev_count == 0) ||
  3856. (wlan_op_mode_monitor == vdev->opmode))
  3857. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  3858. }
  3859. if (wlan_op_mode_monitor == vdev->opmode) {
  3860. pdev->monitor_vdev = vdev;
  3861. return (struct cdp_vdev *)vdev;
  3862. }
  3863. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  3864. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  3865. vdev->dscp_tid_map_id = 0;
  3866. vdev->mcast_enhancement_en = 0;
  3867. vdev->raw_mode_war = wlan_cfg_get_raw_mode_war(soc->wlan_cfg_ctx);
  3868. vdev->prev_tx_enq_tstamp = 0;
  3869. vdev->prev_rx_deliver_tstamp = 0;
  3870. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3871. /* add this vdev into the pdev's list */
  3872. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  3873. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3874. pdev->vdev_count++;
  3875. dp_tx_vdev_attach(vdev);
  3876. if (pdev->vdev_count == 1)
  3877. dp_lro_hash_setup(soc, pdev);
  3878. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3879. "Created vdev %pK (%pM)", vdev, vdev->mac_addr.raw);
  3880. DP_STATS_INIT(vdev);
  3881. if (wlan_op_mode_sta == vdev->opmode)
  3882. dp_peer_create_wifi3((struct cdp_vdev *)vdev,
  3883. vdev->mac_addr.raw,
  3884. NULL);
  3885. return (struct cdp_vdev *)vdev;
  3886. fail0:
  3887. return NULL;
  3888. }
  3889. /**
  3890. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  3891. * @vdev: Datapath VDEV handle
  3892. * @osif_vdev: OSIF vdev handle
  3893. * @ctrl_vdev: UMAC vdev handle
  3894. * @txrx_ops: Tx and Rx operations
  3895. *
  3896. * Return: DP VDEV handle on success, NULL on failure
  3897. */
  3898. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  3899. void *osif_vdev, struct cdp_ctrl_objmgr_vdev *ctrl_vdev,
  3900. struct ol_txrx_ops *txrx_ops)
  3901. {
  3902. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3903. vdev->osif_vdev = osif_vdev;
  3904. vdev->ctrl_vdev = ctrl_vdev;
  3905. vdev->osif_rx = txrx_ops->rx.rx;
  3906. vdev->osif_rx_stack = txrx_ops->rx.rx_stack;
  3907. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  3908. vdev->osif_get_key = txrx_ops->get_key;
  3909. vdev->osif_rx_mon = txrx_ops->rx.mon;
  3910. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  3911. #ifdef notyet
  3912. #if ATH_SUPPORT_WAPI
  3913. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  3914. #endif
  3915. #endif
  3916. #ifdef UMAC_SUPPORT_PROXY_ARP
  3917. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  3918. #endif
  3919. vdev->me_convert = txrx_ops->me_convert;
  3920. /* TODO: Enable the following once Tx code is integrated */
  3921. if (vdev->mesh_vdev)
  3922. txrx_ops->tx.tx = dp_tx_send_mesh;
  3923. else
  3924. txrx_ops->tx.tx = dp_tx_send;
  3925. txrx_ops->tx.tx_exception = dp_tx_send_exception;
  3926. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  3927. "DP Vdev Register success");
  3928. }
  3929. /**
  3930. * dp_vdev_flush_peers() - Forcibily Flush peers of vdev
  3931. * @vdev: Datapath VDEV handle
  3932. * @unmap_only: Flag to indicate "only unmap"
  3933. *
  3934. * Return: void
  3935. */
  3936. static void dp_vdev_flush_peers(struct cdp_vdev *vdev_handle, bool unmap_only)
  3937. {
  3938. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3939. struct dp_pdev *pdev = vdev->pdev;
  3940. struct dp_soc *soc = pdev->soc;
  3941. struct dp_peer *peer;
  3942. uint16_t *peer_ids;
  3943. uint8_t i = 0, j = 0;
  3944. peer_ids = qdf_mem_malloc(soc->max_peers * sizeof(peer_ids[0]));
  3945. if (!peer_ids) {
  3946. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3947. "DP alloc failure - unable to flush peers");
  3948. return;
  3949. }
  3950. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3951. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3952. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  3953. if (peer->peer_ids[i] != HTT_INVALID_PEER)
  3954. if (j < soc->max_peers)
  3955. peer_ids[j++] = peer->peer_ids[i];
  3956. }
  3957. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3958. for (i = 0; i < j ; i++) {
  3959. if (unmap_only) {
  3960. peer = __dp_peer_find_by_id(soc, peer_ids[i]);
  3961. if (peer) {
  3962. dp_rx_peer_unmap_handler(soc, peer_ids[i],
  3963. vdev->vdev_id,
  3964. peer->mac_addr.raw,
  3965. 0);
  3966. }
  3967. } else {
  3968. peer = dp_peer_find_by_id(soc, peer_ids[i]);
  3969. if (peer) {
  3970. dp_info("peer: %pM is getting flush",
  3971. peer->mac_addr.raw);
  3972. dp_peer_delete_wifi3(peer, 0);
  3973. /*
  3974. * we need to call dp_peer_unref_del_find_by_id
  3975. * to remove additional ref count incremented
  3976. * by dp_peer_find_by_id() call.
  3977. *
  3978. * Hold the ref count while executing
  3979. * dp_peer_delete_wifi3() call.
  3980. *
  3981. */
  3982. dp_peer_unref_del_find_by_id(peer);
  3983. dp_rx_peer_unmap_handler(soc, peer_ids[i],
  3984. vdev->vdev_id,
  3985. peer->mac_addr.raw, 0);
  3986. }
  3987. }
  3988. }
  3989. qdf_mem_free(peer_ids);
  3990. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3991. FL("Flushed peers for vdev object %pK "), vdev);
  3992. }
  3993. /*
  3994. * dp_vdev_detach_wifi3() - Detach txrx vdev
  3995. * @txrx_vdev: Datapath VDEV handle
  3996. * @callback: Callback OL_IF on completion of detach
  3997. * @cb_context: Callback context
  3998. *
  3999. */
  4000. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  4001. ol_txrx_vdev_delete_cb callback, void *cb_context)
  4002. {
  4003. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4004. struct dp_pdev *pdev = vdev->pdev;
  4005. struct dp_soc *soc = pdev->soc;
  4006. struct dp_neighbour_peer *peer = NULL;
  4007. struct dp_neighbour_peer *temp_peer = NULL;
  4008. /* preconditions */
  4009. qdf_assert(vdev);
  4010. if (wlan_op_mode_monitor == vdev->opmode)
  4011. goto free_vdev;
  4012. if (wlan_op_mode_sta == vdev->opmode)
  4013. dp_peer_delete_wifi3(vdev->vap_bss_peer, 0);
  4014. /*
  4015. * If Target is hung, flush all peers before detaching vdev
  4016. * this will free all references held due to missing
  4017. * unmap commands from Target
  4018. */
  4019. if (!hif_is_target_ready(HIF_GET_SOFTC(soc->hif_handle)))
  4020. dp_vdev_flush_peers((struct cdp_vdev *)vdev, false);
  4021. /*
  4022. * Use peer_ref_mutex while accessing peer_list, in case
  4023. * a peer is in the process of being removed from the list.
  4024. */
  4025. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  4026. /* check that the vdev has no peers allocated */
  4027. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  4028. /* debug print - will be removed later */
  4029. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  4030. FL("not deleting vdev object %pK (%pM)"
  4031. "until deletion finishes for all its peers"),
  4032. vdev, vdev->mac_addr.raw);
  4033. /* indicate that the vdev needs to be deleted */
  4034. vdev->delete.pending = 1;
  4035. vdev->delete.callback = callback;
  4036. vdev->delete.context = cb_context;
  4037. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4038. return;
  4039. }
  4040. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4041. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  4042. if (!soc->hw_nac_monitor_support) {
  4043. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  4044. neighbour_peer_list_elem) {
  4045. QDF_ASSERT(peer->vdev != vdev);
  4046. }
  4047. } else {
  4048. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  4049. neighbour_peer_list_elem, temp_peer) {
  4050. if (peer->vdev == vdev) {
  4051. TAILQ_REMOVE(&pdev->neighbour_peers_list, peer,
  4052. neighbour_peer_list_elem);
  4053. qdf_mem_free(peer);
  4054. }
  4055. }
  4056. }
  4057. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  4058. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4059. dp_tx_vdev_detach(vdev);
  4060. /* remove the vdev from its parent pdev's list */
  4061. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  4062. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4063. FL("deleting vdev object %pK (%pM)"), vdev, vdev->mac_addr.raw);
  4064. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4065. free_vdev:
  4066. qdf_mem_free(vdev);
  4067. if (callback)
  4068. callback(cb_context);
  4069. }
  4070. /*
  4071. * dp_peer_delete_ast_entries(): Delete all AST entries for a peer
  4072. * @soc - datapath soc handle
  4073. * @peer - datapath peer handle
  4074. *
  4075. * Delete the AST entries belonging to a peer
  4076. */
  4077. #ifdef FEATURE_AST
  4078. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  4079. struct dp_peer *peer)
  4080. {
  4081. struct dp_ast_entry *ast_entry, *temp_ast_entry;
  4082. DP_PEER_ITERATE_ASE_LIST(peer, ast_entry, temp_ast_entry)
  4083. dp_peer_del_ast(soc, ast_entry);
  4084. peer->self_ast_entry = NULL;
  4085. }
  4086. #else
  4087. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  4088. struct dp_peer *peer)
  4089. {
  4090. }
  4091. #endif
  4092. #if ATH_SUPPORT_WRAP
  4093. static inline struct dp_peer *dp_peer_can_reuse(struct dp_vdev *vdev,
  4094. uint8_t *peer_mac_addr)
  4095. {
  4096. struct dp_peer *peer;
  4097. peer = dp_peer_find_hash_find(vdev->pdev->soc, peer_mac_addr,
  4098. 0, vdev->vdev_id);
  4099. if (!peer)
  4100. return NULL;
  4101. if (peer->bss_peer)
  4102. return peer;
  4103. dp_peer_unref_delete(peer);
  4104. return NULL;
  4105. }
  4106. #else
  4107. static inline struct dp_peer *dp_peer_can_reuse(struct dp_vdev *vdev,
  4108. uint8_t *peer_mac_addr)
  4109. {
  4110. struct dp_peer *peer;
  4111. peer = dp_peer_find_hash_find(vdev->pdev->soc, peer_mac_addr,
  4112. 0, vdev->vdev_id);
  4113. if (!peer)
  4114. return NULL;
  4115. if (peer->bss_peer && (peer->vdev->vdev_id == vdev->vdev_id))
  4116. return peer;
  4117. dp_peer_unref_delete(peer);
  4118. return NULL;
  4119. }
  4120. #endif
  4121. #ifdef FEATURE_AST
  4122. static inline void dp_peer_ast_handle_roam_del(struct dp_soc *soc,
  4123. struct dp_pdev *pdev,
  4124. uint8_t *peer_mac_addr)
  4125. {
  4126. struct dp_ast_entry *ast_entry;
  4127. qdf_spin_lock_bh(&soc->ast_lock);
  4128. if (soc->ast_override_support)
  4129. ast_entry = dp_peer_ast_hash_find_by_pdevid(soc, peer_mac_addr,
  4130. pdev->pdev_id);
  4131. else
  4132. ast_entry = dp_peer_ast_hash_find_soc(soc, peer_mac_addr);
  4133. if (ast_entry && ast_entry->next_hop &&
  4134. !ast_entry->delete_in_progress)
  4135. dp_peer_del_ast(soc, ast_entry);
  4136. qdf_spin_unlock_bh(&soc->ast_lock);
  4137. }
  4138. #endif
  4139. /*
  4140. * dp_peer_create_wifi3() - attach txrx peer
  4141. * @txrx_vdev: Datapath VDEV handle
  4142. * @peer_mac_addr: Peer MAC address
  4143. *
  4144. * Return: DP peeer handle on success, NULL on failure
  4145. */
  4146. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  4147. uint8_t *peer_mac_addr, struct cdp_ctrl_objmgr_peer *ctrl_peer)
  4148. {
  4149. struct dp_peer *peer;
  4150. int i;
  4151. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4152. struct dp_pdev *pdev;
  4153. struct dp_soc *soc;
  4154. enum cdp_txrx_ast_entry_type ast_type = CDP_TXRX_AST_TYPE_STATIC;
  4155. /* preconditions */
  4156. qdf_assert(vdev);
  4157. qdf_assert(peer_mac_addr);
  4158. pdev = vdev->pdev;
  4159. soc = pdev->soc;
  4160. /*
  4161. * If a peer entry with given MAC address already exists,
  4162. * reuse the peer and reset the state of peer.
  4163. */
  4164. peer = dp_peer_can_reuse(vdev, peer_mac_addr);
  4165. if (peer) {
  4166. qdf_atomic_init(&peer->is_default_route_set);
  4167. dp_peer_cleanup(vdev, peer);
  4168. qdf_spin_lock_bh(&soc->ast_lock);
  4169. dp_peer_delete_ast_entries(soc, peer);
  4170. peer->delete_in_progress = false;
  4171. qdf_spin_unlock_bh(&soc->ast_lock);
  4172. if ((vdev->opmode == wlan_op_mode_sta) &&
  4173. !qdf_mem_cmp(peer_mac_addr, &vdev->mac_addr.raw[0],
  4174. DP_MAC_ADDR_LEN)) {
  4175. ast_type = CDP_TXRX_AST_TYPE_SELF;
  4176. }
  4177. dp_peer_add_ast(soc, peer, peer_mac_addr, ast_type, 0);
  4178. /*
  4179. * Control path maintains a node count which is incremented
  4180. * for every new peer create command. Since new peer is not being
  4181. * created and earlier reference is reused here,
  4182. * peer_unref_delete event is sent to control path to
  4183. * increment the count back.
  4184. */
  4185. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  4186. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->ctrl_pdev,
  4187. peer->mac_addr.raw, vdev->mac_addr.raw,
  4188. vdev->opmode, peer->ctrl_peer, ctrl_peer);
  4189. }
  4190. peer->ctrl_peer = ctrl_peer;
  4191. dp_local_peer_id_alloc(pdev, peer);
  4192. DP_STATS_INIT(peer);
  4193. return (void *)peer;
  4194. } else {
  4195. /*
  4196. * When a STA roams from RPTR AP to ROOT AP and vice versa, we
  4197. * need to remove the AST entry which was earlier added as a WDS
  4198. * entry.
  4199. * If an AST entry exists, but no peer entry exists with a given
  4200. * MAC addresses, we could deduce it as a WDS entry
  4201. */
  4202. dp_peer_ast_handle_roam_del(soc, pdev, peer_mac_addr);
  4203. }
  4204. #ifdef notyet
  4205. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  4206. soc->mempool_ol_ath_peer);
  4207. #else
  4208. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  4209. #endif
  4210. if (!peer)
  4211. return NULL; /* failure */
  4212. qdf_mem_zero(peer, sizeof(struct dp_peer));
  4213. TAILQ_INIT(&peer->ast_entry_list);
  4214. /* store provided params */
  4215. peer->vdev = vdev;
  4216. peer->ctrl_peer = ctrl_peer;
  4217. if ((vdev->opmode == wlan_op_mode_sta) &&
  4218. !qdf_mem_cmp(peer_mac_addr, &vdev->mac_addr.raw[0],
  4219. DP_MAC_ADDR_LEN)) {
  4220. ast_type = CDP_TXRX_AST_TYPE_SELF;
  4221. }
  4222. dp_peer_add_ast(soc, peer, peer_mac_addr, ast_type, 0);
  4223. qdf_spinlock_create(&peer->peer_info_lock);
  4224. qdf_mem_copy(
  4225. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  4226. /* TODO: See of rx_opt_proc is really required */
  4227. peer->rx_opt_proc = soc->rx_opt_proc;
  4228. /* initialize the peer_id */
  4229. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  4230. peer->peer_ids[i] = HTT_INVALID_PEER;
  4231. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  4232. qdf_atomic_init(&peer->ref_cnt);
  4233. /* keep one reference for attach */
  4234. qdf_atomic_inc(&peer->ref_cnt);
  4235. /* add this peer into the vdev's list */
  4236. if (wlan_op_mode_sta == vdev->opmode)
  4237. TAILQ_INSERT_HEAD(&vdev->peer_list, peer, peer_list_elem);
  4238. else
  4239. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  4240. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4241. /* TODO: See if hash based search is required */
  4242. dp_peer_find_hash_add(soc, peer);
  4243. /* Initialize the peer state */
  4244. peer->state = OL_TXRX_PEER_STATE_DISC;
  4245. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4246. "vdev %pK created peer %pK (%pM) ref_cnt: %d",
  4247. vdev, peer, peer->mac_addr.raw,
  4248. qdf_atomic_read(&peer->ref_cnt));
  4249. /*
  4250. * For every peer MAp message search and set if bss_peer
  4251. */
  4252. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  4253. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4254. "vdev bss_peer!!!!");
  4255. peer->bss_peer = 1;
  4256. vdev->vap_bss_peer = peer;
  4257. }
  4258. for (i = 0; i < DP_MAX_TIDS; i++)
  4259. qdf_spinlock_create(&peer->rx_tid[i].tid_lock);
  4260. dp_local_peer_id_alloc(pdev, peer);
  4261. DP_STATS_INIT(peer);
  4262. return (void *)peer;
  4263. }
  4264. /*
  4265. * dp_vdev_get_default_reo_hash() - get reo dest ring and hash values for a vdev
  4266. * @vdev: Datapath VDEV handle
  4267. * @reo_dest: pointer to default reo_dest ring for vdev to be populated
  4268. * @hash_based: pointer to hash value (enabled/disabled) to be populated
  4269. *
  4270. * Return: None
  4271. */
  4272. static
  4273. void dp_vdev_get_default_reo_hash(struct dp_vdev *vdev,
  4274. enum cdp_host_reo_dest_ring *reo_dest,
  4275. bool *hash_based)
  4276. {
  4277. struct dp_soc *soc;
  4278. struct dp_pdev *pdev;
  4279. pdev = vdev->pdev;
  4280. soc = pdev->soc;
  4281. /*
  4282. * hash based steering is disabled for Radios which are offloaded
  4283. * to NSS
  4284. */
  4285. if (!wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx))
  4286. *hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  4287. /*
  4288. * Below line of code will ensure the proper reo_dest ring is chosen
  4289. * for cases where toeplitz hash cannot be generated (ex: non TCP/UDP)
  4290. */
  4291. *reo_dest = pdev->reo_dest;
  4292. }
  4293. #ifdef IPA_OFFLOAD
  4294. /*
  4295. * dp_peer_setup_get_reo_hash() - get reo dest ring and hash values for a peer
  4296. * @vdev: Datapath VDEV handle
  4297. * @reo_dest: pointer to default reo_dest ring for vdev to be populated
  4298. * @hash_based: pointer to hash value (enabled/disabled) to be populated
  4299. *
  4300. * If IPA is enabled in ini, for SAP mode, disable hash based
  4301. * steering, use default reo_dst ring for RX. Use config values for other modes.
  4302. * Return: None
  4303. */
  4304. static void dp_peer_setup_get_reo_hash(struct dp_vdev *vdev,
  4305. enum cdp_host_reo_dest_ring *reo_dest,
  4306. bool *hash_based)
  4307. {
  4308. struct dp_soc *soc;
  4309. struct dp_pdev *pdev;
  4310. pdev = vdev->pdev;
  4311. soc = pdev->soc;
  4312. dp_vdev_get_default_reo_hash(vdev, reo_dest, hash_based);
  4313. /*
  4314. * If IPA is enabled, disable hash-based flow steering and set
  4315. * reo_dest_ring_4 as the REO ring to receive packets on.
  4316. * IPA is configured to reap reo_dest_ring_4.
  4317. *
  4318. * Note - REO DST indexes are from 0 - 3, while cdp_host_reo_dest_ring
  4319. * value enum value is from 1 - 4.
  4320. * Hence, *reo_dest = IPA_REO_DEST_RING_IDX + 1
  4321. */
  4322. if (wlan_cfg_is_ipa_enabled(soc->wlan_cfg_ctx)) {
  4323. if (vdev->opmode == wlan_op_mode_ap) {
  4324. *reo_dest = IPA_REO_DEST_RING_IDX + 1;
  4325. *hash_based = 0;
  4326. }
  4327. }
  4328. }
  4329. #else
  4330. /*
  4331. * dp_peer_setup_get_reo_hash() - get reo dest ring and hash values for a peer
  4332. * @vdev: Datapath VDEV handle
  4333. * @reo_dest: pointer to default reo_dest ring for vdev to be populated
  4334. * @hash_based: pointer to hash value (enabled/disabled) to be populated
  4335. *
  4336. * Use system config values for hash based steering.
  4337. * Return: None
  4338. */
  4339. static void dp_peer_setup_get_reo_hash(struct dp_vdev *vdev,
  4340. enum cdp_host_reo_dest_ring *reo_dest,
  4341. bool *hash_based)
  4342. {
  4343. dp_vdev_get_default_reo_hash(vdev, reo_dest, hash_based);
  4344. }
  4345. #endif /* IPA_OFFLOAD */
  4346. /*
  4347. * dp_peer_setup_wifi3() - initialize the peer
  4348. * @vdev_hdl: virtual device object
  4349. * @peer: Peer object
  4350. *
  4351. * Return: void
  4352. */
  4353. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  4354. {
  4355. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  4356. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  4357. struct dp_pdev *pdev;
  4358. struct dp_soc *soc;
  4359. bool hash_based = 0;
  4360. enum cdp_host_reo_dest_ring reo_dest;
  4361. /* preconditions */
  4362. qdf_assert(vdev);
  4363. qdf_assert(peer);
  4364. pdev = vdev->pdev;
  4365. soc = pdev->soc;
  4366. peer->last_assoc_rcvd = 0;
  4367. peer->last_disassoc_rcvd = 0;
  4368. peer->last_deauth_rcvd = 0;
  4369. dp_peer_setup_get_reo_hash(vdev, &reo_dest, &hash_based);
  4370. dp_info("pdev: %d vdev :%d opmode:%u hash-based-steering:%d default-reo_dest:%u",
  4371. pdev->pdev_id, vdev->vdev_id,
  4372. vdev->opmode, hash_based, reo_dest);
  4373. /*
  4374. * There are corner cases where the AD1 = AD2 = "VAPs address"
  4375. * i.e both the devices have same MAC address. In these
  4376. * cases we want such pkts to be processed in NULL Q handler
  4377. * which is REO2TCL ring. for this reason we should
  4378. * not setup reo_queues and default route for bss_peer.
  4379. */
  4380. if (peer->bss_peer && vdev->opmode == wlan_op_mode_ap)
  4381. return;
  4382. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  4383. /* TODO: Check the destination ring number to be passed to FW */
  4384. soc->cdp_soc.ol_ops->peer_set_default_routing(
  4385. pdev->ctrl_pdev, peer->mac_addr.raw,
  4386. peer->vdev->vdev_id, hash_based, reo_dest);
  4387. }
  4388. qdf_atomic_set(&peer->is_default_route_set, 1);
  4389. dp_peer_rx_init(pdev, peer);
  4390. return;
  4391. }
  4392. /*
  4393. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  4394. * @vdev_handle: virtual device object
  4395. * @htt_pkt_type: type of pkt
  4396. *
  4397. * Return: void
  4398. */
  4399. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  4400. enum htt_cmn_pkt_type val)
  4401. {
  4402. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4403. vdev->tx_encap_type = val;
  4404. }
  4405. /*
  4406. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  4407. * @vdev_handle: virtual device object
  4408. * @htt_pkt_type: type of pkt
  4409. *
  4410. * Return: void
  4411. */
  4412. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  4413. enum htt_cmn_pkt_type val)
  4414. {
  4415. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4416. vdev->rx_decap_type = val;
  4417. }
  4418. /*
  4419. * dp_set_ba_aging_timeout() - set ba aging timeout per AC
  4420. * @txrx_soc: cdp soc handle
  4421. * @ac: Access category
  4422. * @value: timeout value in millisec
  4423. *
  4424. * Return: void
  4425. */
  4426. static void dp_set_ba_aging_timeout(struct cdp_soc_t *txrx_soc,
  4427. uint8_t ac, uint32_t value)
  4428. {
  4429. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  4430. hal_set_ba_aging_timeout(soc->hal_soc, ac, value);
  4431. }
  4432. /*
  4433. * dp_get_ba_aging_timeout() - get ba aging timeout per AC
  4434. * @txrx_soc: cdp soc handle
  4435. * @ac: access category
  4436. * @value: timeout value in millisec
  4437. *
  4438. * Return: void
  4439. */
  4440. static void dp_get_ba_aging_timeout(struct cdp_soc_t *txrx_soc,
  4441. uint8_t ac, uint32_t *value)
  4442. {
  4443. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  4444. hal_get_ba_aging_timeout(soc->hal_soc, ac, value);
  4445. }
  4446. /*
  4447. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  4448. * @pdev_handle: physical device object
  4449. * @val: reo destination ring index (1 - 4)
  4450. *
  4451. * Return: void
  4452. */
  4453. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  4454. enum cdp_host_reo_dest_ring val)
  4455. {
  4456. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4457. if (pdev)
  4458. pdev->reo_dest = val;
  4459. }
  4460. /*
  4461. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  4462. * @pdev_handle: physical device object
  4463. *
  4464. * Return: reo destination ring index
  4465. */
  4466. static enum cdp_host_reo_dest_ring
  4467. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  4468. {
  4469. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4470. if (pdev)
  4471. return pdev->reo_dest;
  4472. else
  4473. return cdp_host_reo_dest_ring_unknown;
  4474. }
  4475. /*
  4476. * dp_set_filter_neighbour_peers() - set filter neighbour peers for smart mesh
  4477. * @pdev_handle: device object
  4478. * @val: value to be set
  4479. *
  4480. * Return: void
  4481. */
  4482. static int dp_set_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  4483. uint32_t val)
  4484. {
  4485. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4486. /* Enable/Disable smart mesh filtering. This flag will be checked
  4487. * during rx processing to check if packets are from NAC clients.
  4488. */
  4489. pdev->filter_neighbour_peers = val;
  4490. return 0;
  4491. }
  4492. /*
  4493. * dp_update_filter_neighbour_peers() - set neighbour peers(nac clients)
  4494. * address for smart mesh filtering
  4495. * @vdev_handle: virtual device object
  4496. * @cmd: Add/Del command
  4497. * @macaddr: nac client mac address
  4498. *
  4499. * Return: void
  4500. */
  4501. static int dp_update_filter_neighbour_peers(struct cdp_vdev *vdev_handle,
  4502. uint32_t cmd, uint8_t *macaddr)
  4503. {
  4504. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4505. struct dp_pdev *pdev = vdev->pdev;
  4506. struct dp_neighbour_peer *peer = NULL;
  4507. if (!macaddr)
  4508. goto fail0;
  4509. /* Store address of NAC (neighbour peer) which will be checked
  4510. * against TA of received packets.
  4511. */
  4512. if (cmd == DP_NAC_PARAM_ADD) {
  4513. peer = (struct dp_neighbour_peer *) qdf_mem_malloc(
  4514. sizeof(*peer));
  4515. if (!peer) {
  4516. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4517. FL("DP neighbour peer node memory allocation failed"));
  4518. goto fail0;
  4519. }
  4520. qdf_mem_copy(&peer->neighbour_peers_macaddr.raw[0],
  4521. macaddr, DP_MAC_ADDR_LEN);
  4522. peer->vdev = vdev;
  4523. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  4524. /* add this neighbour peer into the list */
  4525. TAILQ_INSERT_TAIL(&pdev->neighbour_peers_list, peer,
  4526. neighbour_peer_list_elem);
  4527. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  4528. /* first neighbour */
  4529. if (!pdev->neighbour_peers_added) {
  4530. pdev->neighbour_peers_added = true;
  4531. dp_ppdu_ring_cfg(pdev);
  4532. }
  4533. return 1;
  4534. } else if (cmd == DP_NAC_PARAM_DEL) {
  4535. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  4536. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  4537. neighbour_peer_list_elem) {
  4538. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  4539. macaddr, DP_MAC_ADDR_LEN)) {
  4540. /* delete this peer from the list */
  4541. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  4542. peer, neighbour_peer_list_elem);
  4543. qdf_mem_free(peer);
  4544. break;
  4545. }
  4546. }
  4547. /* last neighbour deleted */
  4548. if (TAILQ_EMPTY(&pdev->neighbour_peers_list)) {
  4549. pdev->neighbour_peers_added = false;
  4550. dp_ppdu_ring_cfg(pdev);
  4551. }
  4552. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  4553. if (!pdev->mcopy_mode && !pdev->neighbour_peers_added &&
  4554. !pdev->enhanced_stats_en)
  4555. dp_ppdu_ring_reset(pdev);
  4556. return 1;
  4557. }
  4558. fail0:
  4559. return 0;
  4560. }
  4561. /*
  4562. * dp_get_sec_type() - Get the security type
  4563. * @peer: Datapath peer handle
  4564. * @sec_idx: Security id (mcast, ucast)
  4565. *
  4566. * return sec_type: Security type
  4567. */
  4568. static int dp_get_sec_type(struct cdp_peer *peer, uint8_t sec_idx)
  4569. {
  4570. struct dp_peer *dpeer = (struct dp_peer *)peer;
  4571. return dpeer->security[sec_idx].sec_type;
  4572. }
  4573. /*
  4574. * dp_peer_authorize() - authorize txrx peer
  4575. * @peer_handle: Datapath peer handle
  4576. * @authorize
  4577. *
  4578. */
  4579. static void dp_peer_authorize(struct cdp_peer *peer_handle, uint32_t authorize)
  4580. {
  4581. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4582. struct dp_soc *soc;
  4583. if (peer != NULL) {
  4584. soc = peer->vdev->pdev->soc;
  4585. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  4586. peer->authorize = authorize ? 1 : 0;
  4587. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4588. }
  4589. }
  4590. static void dp_reset_and_release_peer_mem(struct dp_soc *soc,
  4591. struct dp_pdev *pdev,
  4592. struct dp_peer *peer,
  4593. uint32_t vdev_id)
  4594. {
  4595. struct dp_vdev *vdev = NULL;
  4596. struct dp_peer *bss_peer = NULL;
  4597. uint8_t *m_addr = NULL;
  4598. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4599. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4600. if (vdev->vdev_id == vdev_id)
  4601. break;
  4602. }
  4603. if (!vdev) {
  4604. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4605. "vdev is NULL");
  4606. } else {
  4607. if (vdev->vap_bss_peer == peer)
  4608. vdev->vap_bss_peer = NULL;
  4609. m_addr = peer->mac_addr.raw;
  4610. if (soc->cdp_soc.ol_ops->peer_unref_delete)
  4611. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->ctrl_pdev,
  4612. m_addr, vdev->mac_addr.raw, vdev->opmode,
  4613. peer->ctrl_peer, NULL);
  4614. if (vdev && vdev->vap_bss_peer) {
  4615. bss_peer = vdev->vap_bss_peer;
  4616. DP_UPDATE_STATS(vdev, peer);
  4617. }
  4618. }
  4619. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4620. /*
  4621. * Peer AST list hast to be empty here
  4622. */
  4623. DP_AST_ASSERT(TAILQ_EMPTY(&peer->ast_entry_list));
  4624. qdf_mem_free(peer);
  4625. }
  4626. /**
  4627. * dp_delete_pending_vdev() - check and process vdev delete
  4628. * @pdev: DP specific pdev pointer
  4629. * @vdev: DP specific vdev pointer
  4630. * @vdev_id: vdev id corresponding to vdev
  4631. *
  4632. * This API does following:
  4633. * 1) It releases tx flow pools buffers as vdev is
  4634. * going down and no peers are associated.
  4635. * 2) It also detaches vdev before cleaning vdev (struct dp_vdev) memory
  4636. */
  4637. static void dp_delete_pending_vdev(struct dp_pdev *pdev, struct dp_vdev *vdev,
  4638. uint8_t vdev_id)
  4639. {
  4640. ol_txrx_vdev_delete_cb vdev_delete_cb = NULL;
  4641. void *vdev_delete_context = NULL;
  4642. vdev_delete_cb = vdev->delete.callback;
  4643. vdev_delete_context = vdev->delete.context;
  4644. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4645. FL("deleting vdev object %pK (%pM)- its last peer is done"),
  4646. vdev, vdev->mac_addr.raw);
  4647. /* all peers are gone, go ahead and delete it */
  4648. dp_tx_flow_pool_unmap_handler(pdev, vdev_id,
  4649. FLOW_TYPE_VDEV, vdev_id);
  4650. dp_tx_vdev_detach(vdev);
  4651. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4652. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  4653. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4654. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4655. FL("deleting vdev object %pK (%pM)"),
  4656. vdev, vdev->mac_addr.raw);
  4657. qdf_mem_free(vdev);
  4658. vdev = NULL;
  4659. if (vdev_delete_cb)
  4660. vdev_delete_cb(vdev_delete_context);
  4661. }
  4662. /*
  4663. * dp_peer_unref_delete() - unref and delete peer
  4664. * @peer_handle: Datapath peer handle
  4665. *
  4666. */
  4667. void dp_peer_unref_delete(void *peer_handle)
  4668. {
  4669. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4670. struct dp_vdev *vdev = peer->vdev;
  4671. struct dp_pdev *pdev = vdev->pdev;
  4672. struct dp_soc *soc = pdev->soc;
  4673. struct dp_peer *tmppeer;
  4674. int found = 0;
  4675. uint16_t peer_id;
  4676. uint16_t vdev_id;
  4677. bool delete_vdev;
  4678. /*
  4679. * Hold the lock all the way from checking if the peer ref count
  4680. * is zero until the peer references are removed from the hash
  4681. * table and vdev list (if the peer ref count is zero).
  4682. * This protects against a new HL tx operation starting to use the
  4683. * peer object just after this function concludes it's done being used.
  4684. * Furthermore, the lock needs to be held while checking whether the
  4685. * vdev's list of peers is empty, to make sure that list is not modified
  4686. * concurrently with the empty check.
  4687. */
  4688. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  4689. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  4690. peer_id = peer->peer_ids[0];
  4691. vdev_id = vdev->vdev_id;
  4692. /*
  4693. * Make sure that the reference to the peer in
  4694. * peer object map is removed
  4695. */
  4696. if (peer_id != HTT_INVALID_PEER)
  4697. soc->peer_id_to_obj_map[peer_id] = NULL;
  4698. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  4699. "Deleting peer %pK (%pM)", peer, peer->mac_addr.raw);
  4700. /* remove the reference to the peer from the hash table */
  4701. dp_peer_find_hash_remove(soc, peer);
  4702. qdf_spin_lock_bh(&soc->ast_lock);
  4703. if (peer->self_ast_entry) {
  4704. dp_peer_del_ast(soc, peer->self_ast_entry);
  4705. peer->self_ast_entry = NULL;
  4706. }
  4707. qdf_spin_unlock_bh(&soc->ast_lock);
  4708. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  4709. if (tmppeer == peer) {
  4710. found = 1;
  4711. break;
  4712. }
  4713. }
  4714. if (found) {
  4715. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  4716. peer_list_elem);
  4717. } else {
  4718. /*Ignoring the remove operation as peer not found*/
  4719. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  4720. "peer:%pK not found in vdev:%pK peerlist:%pK",
  4721. peer, vdev, &peer->vdev->peer_list);
  4722. }
  4723. /* cleanup the peer data */
  4724. dp_peer_cleanup(vdev, peer);
  4725. /* check whether the parent vdev has no peers left */
  4726. if (TAILQ_EMPTY(&vdev->peer_list)) {
  4727. /*
  4728. * capture vdev delete pending flag's status
  4729. * while holding peer_ref_mutex lock
  4730. */
  4731. delete_vdev = vdev->delete.pending;
  4732. /*
  4733. * Now that there are no references to the peer, we can
  4734. * release the peer reference lock.
  4735. */
  4736. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4737. /*
  4738. * Check if the parent vdev was waiting for its peers
  4739. * to be deleted, in order for it to be deleted too.
  4740. */
  4741. if (delete_vdev)
  4742. dp_delete_pending_vdev(pdev, vdev, vdev_id);
  4743. } else {
  4744. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4745. }
  4746. dp_reset_and_release_peer_mem(soc, pdev, peer, vdev_id);
  4747. } else {
  4748. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4749. }
  4750. }
  4751. /*
  4752. * dp_peer_detach_wifi3() – Detach txrx peer
  4753. * @peer_handle: Datapath peer handle
  4754. * @bitmap: bitmap indicating special handling of request.
  4755. *
  4756. */
  4757. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap)
  4758. {
  4759. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4760. /* redirect the peer's rx delivery function to point to a
  4761. * discard func
  4762. */
  4763. peer->rx_opt_proc = dp_rx_discard;
  4764. /* Do not make ctrl_peer to NULL for connected sta peers.
  4765. * We need ctrl_peer to release the reference during dp
  4766. * peer free. This reference was held for
  4767. * obj_mgr peer during the creation of dp peer.
  4768. */
  4769. if (!(peer->vdev && (peer->vdev->opmode != wlan_op_mode_sta) &&
  4770. !peer->bss_peer))
  4771. peer->ctrl_peer = NULL;
  4772. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4773. FL("peer %pK (%pM)"), peer, peer->mac_addr.raw);
  4774. dp_local_peer_id_free(peer->vdev->pdev, peer);
  4775. qdf_spinlock_destroy(&peer->peer_info_lock);
  4776. /*
  4777. * Remove the reference added during peer_attach.
  4778. * The peer will still be left allocated until the
  4779. * PEER_UNMAP message arrives to remove the other
  4780. * reference, added by the PEER_MAP message.
  4781. */
  4782. dp_peer_unref_delete(peer_handle);
  4783. }
  4784. /*
  4785. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  4786. * @peer_handle: Datapath peer handle
  4787. *
  4788. */
  4789. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  4790. {
  4791. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  4792. return vdev->mac_addr.raw;
  4793. }
  4794. /*
  4795. * dp_vdev_set_wds() - Enable per packet stats
  4796. * @vdev_handle: DP VDEV handle
  4797. * @val: value
  4798. *
  4799. * Return: none
  4800. */
  4801. static int dp_vdev_set_wds(void *vdev_handle, uint32_t val)
  4802. {
  4803. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4804. vdev->wds_enabled = val;
  4805. return 0;
  4806. }
  4807. /*
  4808. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  4809. * @peer_handle: Datapath peer handle
  4810. *
  4811. */
  4812. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  4813. uint8_t vdev_id)
  4814. {
  4815. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  4816. struct dp_vdev *vdev = NULL;
  4817. if (qdf_unlikely(!pdev))
  4818. return NULL;
  4819. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4820. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4821. if (vdev->vdev_id == vdev_id)
  4822. break;
  4823. }
  4824. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4825. return (struct cdp_vdev *)vdev;
  4826. }
  4827. /*
  4828. * dp_get_mon_vdev_from_pdev_wifi3() - Get vdev handle of monitor mode
  4829. * @dev: PDEV handle
  4830. *
  4831. * Return: VDEV handle of monitor mode
  4832. */
  4833. static struct cdp_vdev *dp_get_mon_vdev_from_pdev_wifi3(struct cdp_pdev *dev)
  4834. {
  4835. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  4836. if (qdf_unlikely(!pdev))
  4837. return NULL;
  4838. return (struct cdp_vdev *)pdev->monitor_vdev;
  4839. }
  4840. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  4841. {
  4842. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4843. return vdev->opmode;
  4844. }
  4845. static
  4846. void dp_get_os_rx_handles_from_vdev_wifi3(struct cdp_vdev *pvdev,
  4847. ol_txrx_rx_fp *stack_fn_p,
  4848. ol_osif_vdev_handle *osif_vdev_p)
  4849. {
  4850. struct dp_vdev *vdev = dp_get_dp_vdev_from_cdp_vdev(pvdev);
  4851. qdf_assert(vdev);
  4852. *stack_fn_p = vdev->osif_rx_stack;
  4853. *osif_vdev_p = vdev->osif_vdev;
  4854. }
  4855. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  4856. {
  4857. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  4858. struct dp_pdev *pdev = vdev->pdev;
  4859. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  4860. }
  4861. /**
  4862. * dp_monitor_mode_ring_config() - Send the tlv config to fw for monitor buffer
  4863. * ring based on target
  4864. * @soc: soc handle
  4865. * @mac_for_pdev: pdev_id
  4866. * @pdev: physical device handle
  4867. * @ring_num: mac id
  4868. * @htt_tlv_filter: tlv filter
  4869. *
  4870. * Return: zero on success, non-zero on failure
  4871. */
  4872. static inline
  4873. QDF_STATUS dp_monitor_mode_ring_config(struct dp_soc *soc, uint8_t mac_for_pdev,
  4874. struct dp_pdev *pdev, uint8_t ring_num,
  4875. struct htt_rx_ring_tlv_filter htt_tlv_filter)
  4876. {
  4877. QDF_STATUS status;
  4878. if (soc->wlan_cfg_ctx->rxdma1_enable)
  4879. status = htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4880. pdev->rxdma_mon_buf_ring[ring_num]
  4881. .hal_srng,
  4882. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE,
  4883. &htt_tlv_filter);
  4884. else
  4885. status = htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4886. pdev->rx_mac_buf_ring[ring_num]
  4887. .hal_srng,
  4888. RXDMA_BUF, RX_BUFFER_SIZE,
  4889. &htt_tlv_filter);
  4890. return status;
  4891. }
  4892. /**
  4893. * dp_reset_monitor_mode() - Disable monitor mode
  4894. * @pdev_handle: Datapath PDEV handle
  4895. *
  4896. * Return: 0 on success, not 0 on failure
  4897. */
  4898. static QDF_STATUS dp_reset_monitor_mode(struct cdp_pdev *pdev_handle)
  4899. {
  4900. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4901. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  4902. struct dp_soc *soc = pdev->soc;
  4903. uint8_t pdev_id;
  4904. int mac_id;
  4905. QDF_STATUS status = QDF_STATUS_SUCCESS;
  4906. pdev_id = pdev->pdev_id;
  4907. soc = pdev->soc;
  4908. qdf_spin_lock_bh(&pdev->mon_lock);
  4909. qdf_mem_zero(&(htt_tlv_filter), sizeof(htt_tlv_filter));
  4910. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4911. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  4912. status = dp_monitor_mode_ring_config(soc, mac_for_pdev,
  4913. pdev, mac_id,
  4914. htt_tlv_filter);
  4915. if (status != QDF_STATUS_SUCCESS) {
  4916. dp_err("Failed to send tlv filter for monitor mode rings");
  4917. return status;
  4918. }
  4919. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4920. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4921. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE,
  4922. &htt_tlv_filter);
  4923. }
  4924. pdev->monitor_vdev = NULL;
  4925. pdev->mcopy_mode = 0;
  4926. pdev->monitor_configured = false;
  4927. qdf_spin_unlock_bh(&pdev->mon_lock);
  4928. return QDF_STATUS_SUCCESS;
  4929. }
  4930. /**
  4931. * dp_set_nac() - set peer_nac
  4932. * @peer_handle: Datapath PEER handle
  4933. *
  4934. * Return: void
  4935. */
  4936. static void dp_set_nac(struct cdp_peer *peer_handle)
  4937. {
  4938. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4939. peer->nac = 1;
  4940. }
  4941. /**
  4942. * dp_get_tx_pending() - read pending tx
  4943. * @pdev_handle: Datapath PDEV handle
  4944. *
  4945. * Return: outstanding tx
  4946. */
  4947. static int dp_get_tx_pending(struct cdp_pdev *pdev_handle)
  4948. {
  4949. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4950. return qdf_atomic_read(&pdev->num_tx_outstanding);
  4951. }
  4952. /**
  4953. * dp_get_peer_mac_from_peer_id() - get peer mac
  4954. * @pdev_handle: Datapath PDEV handle
  4955. * @peer_id: Peer ID
  4956. * @peer_mac: MAC addr of PEER
  4957. *
  4958. * Return: void
  4959. */
  4960. static void dp_get_peer_mac_from_peer_id(struct cdp_pdev *pdev_handle,
  4961. uint32_t peer_id, uint8_t *peer_mac)
  4962. {
  4963. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4964. struct dp_peer *peer;
  4965. if (pdev && peer_mac) {
  4966. peer = dp_peer_find_by_id(pdev->soc, (uint16_t)peer_id);
  4967. if (peer) {
  4968. qdf_mem_copy(peer_mac, peer->mac_addr.raw,
  4969. DP_MAC_ADDR_LEN);
  4970. dp_peer_unref_del_find_by_id(peer);
  4971. }
  4972. }
  4973. }
  4974. /**
  4975. * dp_pdev_configure_monitor_rings() - configure monitor rings
  4976. * @vdev_handle: Datapath VDEV handle
  4977. *
  4978. * Return: void
  4979. */
  4980. static QDF_STATUS dp_pdev_configure_monitor_rings(struct dp_pdev *pdev)
  4981. {
  4982. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  4983. struct dp_soc *soc;
  4984. uint8_t pdev_id;
  4985. int mac_id;
  4986. QDF_STATUS status = QDF_STATUS_SUCCESS;
  4987. pdev_id = pdev->pdev_id;
  4988. soc = pdev->soc;
  4989. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  4990. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]",
  4991. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  4992. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  4993. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  4994. pdev->mo_data_filter);
  4995. qdf_mem_zero(&(htt_tlv_filter), sizeof(htt_tlv_filter));
  4996. htt_tlv_filter.mpdu_start = 1;
  4997. htt_tlv_filter.msdu_start = 1;
  4998. htt_tlv_filter.packet = 1;
  4999. htt_tlv_filter.msdu_end = 1;
  5000. htt_tlv_filter.mpdu_end = 1;
  5001. htt_tlv_filter.packet_header = 1;
  5002. htt_tlv_filter.attention = 1;
  5003. htt_tlv_filter.ppdu_start = 0;
  5004. htt_tlv_filter.ppdu_end = 0;
  5005. htt_tlv_filter.ppdu_end_user_stats = 0;
  5006. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  5007. htt_tlv_filter.ppdu_end_status_done = 0;
  5008. htt_tlv_filter.header_per_msdu = 1;
  5009. htt_tlv_filter.enable_fp =
  5010. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  5011. htt_tlv_filter.enable_md = 0;
  5012. htt_tlv_filter.enable_mo =
  5013. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  5014. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  5015. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  5016. if (pdev->mcopy_mode)
  5017. htt_tlv_filter.fp_data_filter = 0;
  5018. else
  5019. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  5020. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  5021. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  5022. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  5023. htt_tlv_filter.offset_valid = false;
  5024. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5025. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  5026. status = dp_monitor_mode_ring_config(soc, mac_for_pdev,
  5027. pdev, mac_id,
  5028. htt_tlv_filter);
  5029. if (status != QDF_STATUS_SUCCESS) {
  5030. dp_err("Failed to send tlv filter for monitor mode rings");
  5031. return status;
  5032. }
  5033. }
  5034. qdf_mem_zero(&(htt_tlv_filter), sizeof(htt_tlv_filter));
  5035. htt_tlv_filter.mpdu_start = 1;
  5036. htt_tlv_filter.msdu_start = 0;
  5037. htt_tlv_filter.packet = 0;
  5038. htt_tlv_filter.msdu_end = 0;
  5039. htt_tlv_filter.mpdu_end = 0;
  5040. htt_tlv_filter.attention = 0;
  5041. htt_tlv_filter.ppdu_start = 1;
  5042. htt_tlv_filter.ppdu_end = 1;
  5043. htt_tlv_filter.ppdu_end_user_stats = 1;
  5044. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  5045. htt_tlv_filter.ppdu_end_status_done = 1;
  5046. htt_tlv_filter.enable_fp = 1;
  5047. htt_tlv_filter.enable_md = 0;
  5048. htt_tlv_filter.enable_mo = 1;
  5049. if (pdev->mcopy_mode) {
  5050. htt_tlv_filter.packet_header = 1;
  5051. }
  5052. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  5053. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  5054. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  5055. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  5056. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  5057. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  5058. htt_tlv_filter.offset_valid = false;
  5059. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5060. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  5061. pdev->pdev_id);
  5062. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  5063. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5064. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5065. }
  5066. return status;
  5067. }
  5068. /**
  5069. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  5070. * @vdev_handle: Datapath VDEV handle
  5071. * @smart_monitor: Flag to denote if its smart monitor mode
  5072. *
  5073. * Return: 0 on success, not 0 on failure
  5074. */
  5075. static QDF_STATUS dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle,
  5076. uint8_t smart_monitor)
  5077. {
  5078. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5079. struct dp_pdev *pdev;
  5080. qdf_assert(vdev);
  5081. pdev = vdev->pdev;
  5082. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  5083. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  5084. pdev, pdev->pdev_id, pdev->soc, vdev);
  5085. /*Check if current pdev's monitor_vdev exists */
  5086. if (pdev->monitor_configured) {
  5087. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  5088. "monitor vap already created vdev=%pK\n", vdev);
  5089. qdf_assert(vdev);
  5090. return QDF_STATUS_E_RESOURCES;
  5091. }
  5092. pdev->monitor_vdev = vdev;
  5093. pdev->monitor_configured = true;
  5094. /* If smart monitor mode, do not configure monitor ring */
  5095. if (smart_monitor)
  5096. return QDF_STATUS_SUCCESS;
  5097. return dp_pdev_configure_monitor_rings(pdev);
  5098. }
  5099. /**
  5100. * dp_pdev_set_advance_monitor_filter() - Set DP PDEV monitor filter
  5101. * @pdev_handle: Datapath PDEV handle
  5102. * @filter_val: Flag to select Filter for monitor mode
  5103. * Return: 0 on success, not 0 on failure
  5104. */
  5105. static QDF_STATUS
  5106. dp_pdev_set_advance_monitor_filter(struct cdp_pdev *pdev_handle,
  5107. struct cdp_monitor_filter *filter_val)
  5108. {
  5109. /* Many monitor VAPs can exists in a system but only one can be up at
  5110. * anytime
  5111. */
  5112. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5113. struct dp_vdev *vdev = pdev->monitor_vdev;
  5114. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  5115. struct dp_soc *soc;
  5116. uint8_t pdev_id;
  5117. int mac_id;
  5118. QDF_STATUS status = QDF_STATUS_SUCCESS;
  5119. pdev_id = pdev->pdev_id;
  5120. soc = pdev->soc;
  5121. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  5122. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK",
  5123. pdev, pdev_id, soc, vdev);
  5124. /*Check if current pdev's monitor_vdev exists */
  5125. if (!pdev->monitor_vdev) {
  5126. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  5127. "vdev=%pK", vdev);
  5128. qdf_assert(vdev);
  5129. }
  5130. /* update filter mode, type in pdev structure */
  5131. pdev->mon_filter_mode = filter_val->mode;
  5132. pdev->fp_mgmt_filter = filter_val->fp_mgmt;
  5133. pdev->fp_ctrl_filter = filter_val->fp_ctrl;
  5134. pdev->fp_data_filter = filter_val->fp_data;
  5135. pdev->mo_mgmt_filter = filter_val->mo_mgmt;
  5136. pdev->mo_ctrl_filter = filter_val->mo_ctrl;
  5137. pdev->mo_data_filter = filter_val->mo_data;
  5138. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  5139. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]",
  5140. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  5141. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  5142. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  5143. pdev->mo_data_filter);
  5144. qdf_mem_zero(&(htt_tlv_filter), sizeof(htt_tlv_filter));
  5145. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5146. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  5147. status = dp_monitor_mode_ring_config(soc, mac_for_pdev,
  5148. pdev, mac_id,
  5149. htt_tlv_filter);
  5150. if (status != QDF_STATUS_SUCCESS) {
  5151. dp_err("Failed to send tlv filter for monitor mode rings");
  5152. return status;
  5153. }
  5154. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  5155. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5156. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5157. }
  5158. htt_tlv_filter.mpdu_start = 1;
  5159. htt_tlv_filter.msdu_start = 1;
  5160. htt_tlv_filter.packet = 1;
  5161. htt_tlv_filter.msdu_end = 1;
  5162. htt_tlv_filter.mpdu_end = 1;
  5163. htt_tlv_filter.packet_header = 1;
  5164. htt_tlv_filter.attention = 1;
  5165. htt_tlv_filter.ppdu_start = 0;
  5166. htt_tlv_filter.ppdu_end = 0;
  5167. htt_tlv_filter.ppdu_end_user_stats = 0;
  5168. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  5169. htt_tlv_filter.ppdu_end_status_done = 0;
  5170. htt_tlv_filter.header_per_msdu = 1;
  5171. htt_tlv_filter.enable_fp =
  5172. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  5173. htt_tlv_filter.enable_md = 0;
  5174. htt_tlv_filter.enable_mo =
  5175. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  5176. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  5177. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  5178. if (pdev->mcopy_mode)
  5179. htt_tlv_filter.fp_data_filter = 0;
  5180. else
  5181. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  5182. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  5183. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  5184. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  5185. htt_tlv_filter.offset_valid = false;
  5186. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5187. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  5188. status = dp_monitor_mode_ring_config(soc, mac_for_pdev,
  5189. pdev, mac_id,
  5190. htt_tlv_filter);
  5191. if (status != QDF_STATUS_SUCCESS) {
  5192. dp_err("Failed to send tlv filter for monitor mode rings");
  5193. return status;
  5194. }
  5195. }
  5196. qdf_mem_zero(&(htt_tlv_filter), sizeof(htt_tlv_filter));
  5197. htt_tlv_filter.mpdu_start = 1;
  5198. htt_tlv_filter.msdu_start = 0;
  5199. htt_tlv_filter.packet = 0;
  5200. htt_tlv_filter.msdu_end = 0;
  5201. htt_tlv_filter.mpdu_end = 0;
  5202. htt_tlv_filter.attention = 0;
  5203. htt_tlv_filter.ppdu_start = 1;
  5204. htt_tlv_filter.ppdu_end = 1;
  5205. htt_tlv_filter.ppdu_end_user_stats = 1;
  5206. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  5207. htt_tlv_filter.ppdu_end_status_done = 1;
  5208. htt_tlv_filter.enable_fp = 1;
  5209. htt_tlv_filter.enable_md = 0;
  5210. htt_tlv_filter.enable_mo = 1;
  5211. if (pdev->mcopy_mode) {
  5212. htt_tlv_filter.packet_header = 1;
  5213. }
  5214. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  5215. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  5216. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  5217. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  5218. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  5219. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  5220. htt_tlv_filter.offset_valid = false;
  5221. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5222. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  5223. pdev->pdev_id);
  5224. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  5225. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5226. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5227. }
  5228. return QDF_STATUS_SUCCESS;
  5229. }
  5230. /**
  5231. * dp_get_pdev_id_frm_pdev() - get pdev_id
  5232. * @pdev_handle: Datapath PDEV handle
  5233. *
  5234. * Return: pdev_id
  5235. */
  5236. static
  5237. uint8_t dp_get_pdev_id_frm_pdev(struct cdp_pdev *pdev_handle)
  5238. {
  5239. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5240. return pdev->pdev_id;
  5241. }
  5242. /**
  5243. * dp_get_delay_stats_flag() - get delay stats flag
  5244. * @pdev_handle: Datapath PDEV handle
  5245. *
  5246. * Return: 0 if flag is disabled else 1
  5247. */
  5248. static
  5249. bool dp_get_delay_stats_flag(struct cdp_pdev *pdev_handle)
  5250. {
  5251. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5252. return pdev->delay_stats_flag;
  5253. }
  5254. /**
  5255. * dp_pdev_set_chan_noise_floor() - set channel noise floor
  5256. * @pdev_handle: Datapath PDEV handle
  5257. * @chan_noise_floor: Channel Noise Floor
  5258. *
  5259. * Return: void
  5260. */
  5261. static
  5262. void dp_pdev_set_chan_noise_floor(struct cdp_pdev *pdev_handle,
  5263. int16_t chan_noise_floor)
  5264. {
  5265. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5266. pdev->chan_noise_floor = chan_noise_floor;
  5267. }
  5268. /**
  5269. * dp_vdev_get_filter_ucast_data() - get DP VDEV monitor ucast filter
  5270. * @vdev_handle: Datapath VDEV handle
  5271. * Return: true on ucast filter flag set
  5272. */
  5273. static bool dp_vdev_get_filter_ucast_data(struct cdp_vdev *vdev_handle)
  5274. {
  5275. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5276. struct dp_pdev *pdev;
  5277. pdev = vdev->pdev;
  5278. if ((pdev->fp_data_filter & FILTER_DATA_UCAST) ||
  5279. (pdev->mo_data_filter & FILTER_DATA_UCAST))
  5280. return true;
  5281. return false;
  5282. }
  5283. /**
  5284. * dp_vdev_get_filter_mcast_data() - get DP VDEV monitor mcast filter
  5285. * @vdev_handle: Datapath VDEV handle
  5286. * Return: true on mcast filter flag set
  5287. */
  5288. static bool dp_vdev_get_filter_mcast_data(struct cdp_vdev *vdev_handle)
  5289. {
  5290. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5291. struct dp_pdev *pdev;
  5292. pdev = vdev->pdev;
  5293. if ((pdev->fp_data_filter & FILTER_DATA_MCAST) ||
  5294. (pdev->mo_data_filter & FILTER_DATA_MCAST))
  5295. return true;
  5296. return false;
  5297. }
  5298. /**
  5299. * dp_vdev_get_filter_non_data() - get DP VDEV monitor non_data filter
  5300. * @vdev_handle: Datapath VDEV handle
  5301. * Return: true on non data filter flag set
  5302. */
  5303. static bool dp_vdev_get_filter_non_data(struct cdp_vdev *vdev_handle)
  5304. {
  5305. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5306. struct dp_pdev *pdev;
  5307. pdev = vdev->pdev;
  5308. if ((pdev->fp_mgmt_filter & FILTER_MGMT_ALL) ||
  5309. (pdev->mo_mgmt_filter & FILTER_MGMT_ALL)) {
  5310. if ((pdev->fp_ctrl_filter & FILTER_CTRL_ALL) ||
  5311. (pdev->mo_ctrl_filter & FILTER_CTRL_ALL)) {
  5312. return true;
  5313. }
  5314. }
  5315. return false;
  5316. }
  5317. #ifdef MESH_MODE_SUPPORT
  5318. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  5319. {
  5320. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  5321. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5322. FL("val %d"), val);
  5323. vdev->mesh_vdev = val;
  5324. }
  5325. /*
  5326. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  5327. * @vdev_hdl: virtual device object
  5328. * @val: value to be set
  5329. *
  5330. * Return: void
  5331. */
  5332. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  5333. {
  5334. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  5335. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5336. FL("val %d"), val);
  5337. vdev->mesh_rx_filter = val;
  5338. }
  5339. #endif
  5340. /*
  5341. * dp_aggregate_pdev_ctrl_frames_stats()- function to agreegate peer stats
  5342. * Current scope is bar received count
  5343. *
  5344. * @pdev_handle: DP_PDEV handle
  5345. *
  5346. * Return: void
  5347. */
  5348. #define STATS_PROC_TIMEOUT (HZ/1000)
  5349. static void
  5350. dp_aggregate_pdev_ctrl_frames_stats(struct dp_pdev *pdev)
  5351. {
  5352. struct dp_vdev *vdev;
  5353. struct dp_peer *peer;
  5354. uint32_t waitcnt;
  5355. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  5356. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  5357. if (!peer) {
  5358. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5359. FL("DP Invalid Peer refernce"));
  5360. return;
  5361. }
  5362. if (peer->delete_in_progress) {
  5363. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5364. FL("DP Peer deletion in progress"));
  5365. continue;
  5366. }
  5367. qdf_atomic_inc(&peer->ref_cnt);
  5368. waitcnt = 0;
  5369. dp_peer_rxtid_stats(peer, dp_rx_bar_stats_cb, pdev);
  5370. while (!(qdf_atomic_read(&(pdev->stats_cmd_complete)))
  5371. && waitcnt < 10) {
  5372. schedule_timeout_interruptible(
  5373. STATS_PROC_TIMEOUT);
  5374. waitcnt++;
  5375. }
  5376. qdf_atomic_set(&(pdev->stats_cmd_complete), 0);
  5377. dp_peer_unref_delete(peer);
  5378. }
  5379. }
  5380. }
  5381. /**
  5382. * dp_rx_bar_stats_cb(): BAR received stats callback
  5383. * @soc: SOC handle
  5384. * @cb_ctxt: Call back context
  5385. * @reo_status: Reo status
  5386. *
  5387. * return: void
  5388. */
  5389. void dp_rx_bar_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  5390. union hal_reo_status *reo_status)
  5391. {
  5392. struct dp_pdev *pdev = (struct dp_pdev *)cb_ctxt;
  5393. struct hal_reo_queue_status *queue_status = &(reo_status->queue_status);
  5394. if (!qdf_atomic_read(&soc->cmn_init_done))
  5395. return;
  5396. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  5397. DP_TRACE_STATS(FATAL, "REO stats failure %d \n",
  5398. queue_status->header.status);
  5399. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  5400. return;
  5401. }
  5402. pdev->stats.rx.bar_recv_cnt += queue_status->bar_rcvd_cnt;
  5403. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  5404. }
  5405. /**
  5406. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  5407. * @vdev: DP VDEV handle
  5408. *
  5409. * return: void
  5410. */
  5411. void dp_aggregate_vdev_stats(struct dp_vdev *vdev,
  5412. struct cdp_vdev_stats *vdev_stats)
  5413. {
  5414. struct dp_peer *peer = NULL;
  5415. struct dp_soc *soc = NULL;
  5416. if (!vdev || !vdev->pdev)
  5417. return;
  5418. soc = vdev->pdev->soc;
  5419. qdf_mem_copy(vdev_stats, &vdev->stats, sizeof(vdev->stats));
  5420. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem)
  5421. dp_update_vdev_stats(vdev_stats, peer);
  5422. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  5423. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  5424. vdev_stats, vdev->vdev_id,
  5425. UPDATE_VDEV_STATS, vdev->pdev->pdev_id);
  5426. #endif
  5427. }
  5428. /**
  5429. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  5430. * @pdev: DP PDEV handle
  5431. *
  5432. * return: void
  5433. */
  5434. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  5435. {
  5436. struct dp_vdev *vdev = NULL;
  5437. struct dp_soc *soc;
  5438. struct cdp_vdev_stats *vdev_stats =
  5439. qdf_mem_malloc(sizeof(struct cdp_vdev_stats));
  5440. if (!vdev_stats) {
  5441. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5442. "DP alloc failure - unable to get alloc vdev stats");
  5443. return;
  5444. }
  5445. qdf_mem_zero(&pdev->stats.tx, sizeof(pdev->stats.tx));
  5446. qdf_mem_zero(&pdev->stats.rx, sizeof(pdev->stats.rx));
  5447. qdf_mem_zero(&pdev->stats.tx_i, sizeof(pdev->stats.tx_i));
  5448. if (pdev->mcopy_mode)
  5449. DP_UPDATE_STATS(pdev, pdev->invalid_peer);
  5450. soc = pdev->soc;
  5451. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  5452. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  5453. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  5454. dp_aggregate_vdev_stats(vdev, vdev_stats);
  5455. dp_update_pdev_stats(pdev, vdev_stats);
  5456. dp_update_pdev_ingress_stats(pdev, vdev);
  5457. }
  5458. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  5459. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  5460. qdf_mem_free(vdev_stats);
  5461. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  5462. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, pdev->soc, &pdev->stats,
  5463. pdev->pdev_id, UPDATE_PDEV_STATS, pdev->pdev_id);
  5464. #endif
  5465. }
  5466. /**
  5467. * dp_vdev_getstats() - get vdev packet level stats
  5468. * @vdev_handle: Datapath VDEV handle
  5469. * @stats: cdp network device stats structure
  5470. *
  5471. * Return: void
  5472. */
  5473. static void dp_vdev_getstats(void *vdev_handle,
  5474. struct cdp_dev_stats *stats)
  5475. {
  5476. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5477. struct dp_pdev *pdev;
  5478. struct dp_soc *soc;
  5479. struct cdp_vdev_stats *vdev_stats;
  5480. if (!vdev)
  5481. return;
  5482. pdev = vdev->pdev;
  5483. if (!pdev)
  5484. return;
  5485. soc = pdev->soc;
  5486. vdev_stats = qdf_mem_malloc(sizeof(struct cdp_vdev_stats));
  5487. if (!vdev_stats) {
  5488. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5489. "DP alloc failure - unable to get alloc vdev stats");
  5490. return;
  5491. }
  5492. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  5493. dp_aggregate_vdev_stats(vdev, vdev_stats);
  5494. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  5495. stats->tx_packets = vdev_stats->tx_i.rcvd.num;
  5496. stats->tx_bytes = vdev_stats->tx_i.rcvd.bytes;
  5497. stats->tx_errors = vdev_stats->tx.tx_failed +
  5498. vdev_stats->tx_i.dropped.dropped_pkt.num;
  5499. stats->tx_dropped = stats->tx_errors;
  5500. stats->rx_packets = vdev_stats->rx.unicast.num +
  5501. vdev_stats->rx.multicast.num +
  5502. vdev_stats->rx.bcast.num;
  5503. stats->rx_bytes = vdev_stats->rx.unicast.bytes +
  5504. vdev_stats->rx.multicast.bytes +
  5505. vdev_stats->rx.bcast.bytes;
  5506. }
  5507. /**
  5508. * dp_pdev_getstats() - get pdev packet level stats
  5509. * @pdev_handle: Datapath PDEV handle
  5510. * @stats: cdp network device stats structure
  5511. *
  5512. * Return: void
  5513. */
  5514. static void dp_pdev_getstats(void *pdev_handle,
  5515. struct cdp_dev_stats *stats)
  5516. {
  5517. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5518. dp_aggregate_pdev_stats(pdev);
  5519. stats->tx_packets = pdev->stats.tx_i.rcvd.num;
  5520. stats->tx_bytes = pdev->stats.tx_i.rcvd.bytes;
  5521. stats->tx_errors = pdev->stats.tx.tx_failed +
  5522. pdev->stats.tx_i.dropped.dropped_pkt.num;
  5523. stats->tx_dropped = stats->tx_errors;
  5524. stats->rx_packets = pdev->stats.rx.unicast.num +
  5525. pdev->stats.rx.multicast.num +
  5526. pdev->stats.rx.bcast.num;
  5527. stats->rx_bytes = pdev->stats.rx.unicast.bytes +
  5528. pdev->stats.rx.multicast.bytes +
  5529. pdev->stats.rx.bcast.bytes;
  5530. }
  5531. /**
  5532. * dp_get_device_stats() - get interface level packet stats
  5533. * @handle: device handle
  5534. * @stats: cdp network device stats structure
  5535. * @type: device type pdev/vdev
  5536. *
  5537. * Return: void
  5538. */
  5539. static void dp_get_device_stats(void *handle,
  5540. struct cdp_dev_stats *stats, uint8_t type)
  5541. {
  5542. switch (type) {
  5543. case UPDATE_VDEV_STATS:
  5544. dp_vdev_getstats(handle, stats);
  5545. break;
  5546. case UPDATE_PDEV_STATS:
  5547. dp_pdev_getstats(handle, stats);
  5548. break;
  5549. default:
  5550. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  5551. "apstats cannot be updated for this input "
  5552. "type %d", type);
  5553. break;
  5554. }
  5555. }
  5556. /**
  5557. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  5558. * @pdev: DP_PDEV Handle
  5559. *
  5560. * Return:void
  5561. */
  5562. static inline void
  5563. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  5564. {
  5565. uint8_t i = 0, index = 0;
  5566. DP_PRINT_STATS("PDEV Tx Stats:\n");
  5567. DP_PRINT_STATS("Received From Stack:");
  5568. DP_PRINT_STATS(" Packets = %d",
  5569. pdev->stats.tx_i.rcvd.num);
  5570. DP_PRINT_STATS(" Bytes = %llu",
  5571. pdev->stats.tx_i.rcvd.bytes);
  5572. DP_PRINT_STATS("Processed:");
  5573. DP_PRINT_STATS(" Packets = %d",
  5574. pdev->stats.tx_i.processed.num);
  5575. DP_PRINT_STATS(" Bytes = %llu",
  5576. pdev->stats.tx_i.processed.bytes);
  5577. DP_PRINT_STATS("Total Completions:");
  5578. DP_PRINT_STATS(" Packets = %u",
  5579. pdev->stats.tx.comp_pkt.num);
  5580. DP_PRINT_STATS(" Bytes = %llu",
  5581. pdev->stats.tx.comp_pkt.bytes);
  5582. DP_PRINT_STATS("Successful Completions:");
  5583. DP_PRINT_STATS(" Packets = %u",
  5584. pdev->stats.tx.tx_success.num);
  5585. DP_PRINT_STATS(" Bytes = %llu",
  5586. pdev->stats.tx.tx_success.bytes);
  5587. DP_PRINT_STATS("Dropped:");
  5588. DP_PRINT_STATS(" Total = %d",
  5589. pdev->stats.tx_i.dropped.dropped_pkt.num);
  5590. DP_PRINT_STATS(" Dma_map_error = %d",
  5591. pdev->stats.tx_i.dropped.dma_error);
  5592. DP_PRINT_STATS(" Ring Full = %d",
  5593. pdev->stats.tx_i.dropped.ring_full);
  5594. DP_PRINT_STATS(" Descriptor Not available = %d",
  5595. pdev->stats.tx_i.dropped.desc_na.num);
  5596. DP_PRINT_STATS(" HW enqueue failed= %d",
  5597. pdev->stats.tx_i.dropped.enqueue_fail);
  5598. DP_PRINT_STATS(" Resources Full = %d",
  5599. pdev->stats.tx_i.dropped.res_full);
  5600. DP_PRINT_STATS(" FW removed Pkts = %u",
  5601. pdev->stats.tx.dropped.fw_rem.num);
  5602. DP_PRINT_STATS(" FW removed bytes= %llu",
  5603. pdev->stats.tx.dropped.fw_rem.bytes);
  5604. DP_PRINT_STATS(" FW removed transmitted = %d",
  5605. pdev->stats.tx.dropped.fw_rem_tx);
  5606. DP_PRINT_STATS(" FW removed untransmitted = %d",
  5607. pdev->stats.tx.dropped.fw_rem_notx);
  5608. DP_PRINT_STATS(" FW removed untransmitted fw_reason1 = %d",
  5609. pdev->stats.tx.dropped.fw_reason1);
  5610. DP_PRINT_STATS(" FW removed untransmitted fw_reason2 = %d",
  5611. pdev->stats.tx.dropped.fw_reason2);
  5612. DP_PRINT_STATS(" FW removed untransmitted fw_reason3 = %d",
  5613. pdev->stats.tx.dropped.fw_reason3);
  5614. DP_PRINT_STATS(" Aged Out from msdu/mpdu queues = %d",
  5615. pdev->stats.tx.dropped.age_out);
  5616. DP_PRINT_STATS(" headroom insufficient = %d",
  5617. pdev->stats.tx_i.dropped.headroom_insufficient);
  5618. DP_PRINT_STATS(" Multicast:");
  5619. DP_PRINT_STATS(" Packets: %u",
  5620. pdev->stats.tx.mcast.num);
  5621. DP_PRINT_STATS(" Bytes: %llu",
  5622. pdev->stats.tx.mcast.bytes);
  5623. DP_PRINT_STATS("Scatter Gather:");
  5624. DP_PRINT_STATS(" Packets = %d",
  5625. pdev->stats.tx_i.sg.sg_pkt.num);
  5626. DP_PRINT_STATS(" Bytes = %llu",
  5627. pdev->stats.tx_i.sg.sg_pkt.bytes);
  5628. DP_PRINT_STATS(" Dropped By Host = %d",
  5629. pdev->stats.tx_i.sg.dropped_host.num);
  5630. DP_PRINT_STATS(" Dropped By Target = %d",
  5631. pdev->stats.tx_i.sg.dropped_target);
  5632. DP_PRINT_STATS("TSO:");
  5633. DP_PRINT_STATS(" Number of Segments = %d",
  5634. pdev->stats.tx_i.tso.num_seg);
  5635. DP_PRINT_STATS(" Packets = %d",
  5636. pdev->stats.tx_i.tso.tso_pkt.num);
  5637. DP_PRINT_STATS(" Bytes = %llu",
  5638. pdev->stats.tx_i.tso.tso_pkt.bytes);
  5639. DP_PRINT_STATS(" Dropped By Host = %d",
  5640. pdev->stats.tx_i.tso.dropped_host.num);
  5641. DP_PRINT_STATS("Mcast Enhancement:");
  5642. DP_PRINT_STATS(" Packets = %d",
  5643. pdev->stats.tx_i.mcast_en.mcast_pkt.num);
  5644. DP_PRINT_STATS(" Bytes = %llu",
  5645. pdev->stats.tx_i.mcast_en.mcast_pkt.bytes);
  5646. DP_PRINT_STATS(" Dropped: Map Errors = %d",
  5647. pdev->stats.tx_i.mcast_en.dropped_map_error);
  5648. DP_PRINT_STATS(" Dropped: Self Mac = %d",
  5649. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  5650. DP_PRINT_STATS(" Dropped: Send Fail = %d",
  5651. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  5652. DP_PRINT_STATS(" Unicast sent = %d",
  5653. pdev->stats.tx_i.mcast_en.ucast);
  5654. DP_PRINT_STATS("Raw:");
  5655. DP_PRINT_STATS(" Packets = %d",
  5656. pdev->stats.tx_i.raw.raw_pkt.num);
  5657. DP_PRINT_STATS(" Bytes = %llu",
  5658. pdev->stats.tx_i.raw.raw_pkt.bytes);
  5659. DP_PRINT_STATS(" DMA map error = %d",
  5660. pdev->stats.tx_i.raw.dma_map_error);
  5661. DP_PRINT_STATS("Reinjected:");
  5662. DP_PRINT_STATS(" Packets = %d",
  5663. pdev->stats.tx_i.reinject_pkts.num);
  5664. DP_PRINT_STATS(" Bytes = %llu\n",
  5665. pdev->stats.tx_i.reinject_pkts.bytes);
  5666. DP_PRINT_STATS("Inspected:");
  5667. DP_PRINT_STATS(" Packets = %d",
  5668. pdev->stats.tx_i.inspect_pkts.num);
  5669. DP_PRINT_STATS(" Bytes = %llu",
  5670. pdev->stats.tx_i.inspect_pkts.bytes);
  5671. DP_PRINT_STATS("Nawds Multicast:");
  5672. DP_PRINT_STATS(" Packets = %d",
  5673. pdev->stats.tx_i.nawds_mcast.num);
  5674. DP_PRINT_STATS(" Bytes = %llu",
  5675. pdev->stats.tx_i.nawds_mcast.bytes);
  5676. DP_PRINT_STATS("CCE Classified:");
  5677. DP_PRINT_STATS(" CCE Classified Packets: %u",
  5678. pdev->stats.tx_i.cce_classified);
  5679. DP_PRINT_STATS(" RAW CCE Classified Packets: %u",
  5680. pdev->stats.tx_i.cce_classified_raw);
  5681. DP_PRINT_STATS("Mesh stats:");
  5682. DP_PRINT_STATS(" frames to firmware: %u",
  5683. pdev->stats.tx_i.mesh.exception_fw);
  5684. DP_PRINT_STATS(" completions from fw: %u",
  5685. pdev->stats.tx_i.mesh.completion_fw);
  5686. DP_PRINT_STATS("PPDU stats counter");
  5687. for (index = 0; index < CDP_PPDU_STATS_MAX_TAG; index++) {
  5688. DP_PRINT_STATS(" Tag[%d] = %llu", index,
  5689. pdev->stats.ppdu_stats_counter[index]);
  5690. }
  5691. for (i = 0; i < CDP_WDI_NUM_EVENTS; i++) {
  5692. if (!pdev->stats.wdi_event[i])
  5693. DP_PRINT_STATS("Wdi msgs received from fw[%d]:%d",
  5694. i, pdev->stats.wdi_event[i]);
  5695. }
  5696. }
  5697. /**
  5698. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  5699. * @pdev: DP_PDEV Handle
  5700. *
  5701. * Return: void
  5702. */
  5703. static inline void
  5704. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  5705. {
  5706. DP_PRINT_STATS("PDEV Rx Stats:\n");
  5707. DP_PRINT_STATS("Received From HW (Per Rx Ring):");
  5708. DP_PRINT_STATS(" Packets = %d %d %d %d",
  5709. pdev->stats.rx.rcvd_reo[0].num,
  5710. pdev->stats.rx.rcvd_reo[1].num,
  5711. pdev->stats.rx.rcvd_reo[2].num,
  5712. pdev->stats.rx.rcvd_reo[3].num);
  5713. DP_PRINT_STATS(" Bytes = %llu %llu %llu %llu",
  5714. pdev->stats.rx.rcvd_reo[0].bytes,
  5715. pdev->stats.rx.rcvd_reo[1].bytes,
  5716. pdev->stats.rx.rcvd_reo[2].bytes,
  5717. pdev->stats.rx.rcvd_reo[3].bytes);
  5718. DP_PRINT_STATS("Replenished:");
  5719. DP_PRINT_STATS(" Packets = %d",
  5720. pdev->stats.replenish.pkts.num);
  5721. DP_PRINT_STATS(" Bytes = %llu",
  5722. pdev->stats.replenish.pkts.bytes);
  5723. DP_PRINT_STATS(" Buffers Added To Freelist = %d",
  5724. pdev->stats.buf_freelist);
  5725. DP_PRINT_STATS(" Low threshold intr = %d",
  5726. pdev->stats.replenish.low_thresh_intrs);
  5727. DP_PRINT_STATS("Dropped:");
  5728. DP_PRINT_STATS(" msdu_not_done = %d",
  5729. pdev->stats.dropped.msdu_not_done);
  5730. DP_PRINT_STATS(" mon_rx_drop = %d",
  5731. pdev->stats.dropped.mon_rx_drop);
  5732. DP_PRINT_STATS(" mec_drop = %d",
  5733. pdev->stats.rx.mec_drop.num);
  5734. DP_PRINT_STATS(" Bytes = %llu",
  5735. pdev->stats.rx.mec_drop.bytes);
  5736. DP_PRINT_STATS("Sent To Stack:");
  5737. DP_PRINT_STATS(" Packets = %d",
  5738. pdev->stats.rx.to_stack.num);
  5739. DP_PRINT_STATS(" Bytes = %llu",
  5740. pdev->stats.rx.to_stack.bytes);
  5741. DP_PRINT_STATS("Multicast/Broadcast:");
  5742. DP_PRINT_STATS(" Packets = %d",
  5743. pdev->stats.rx.multicast.num);
  5744. DP_PRINT_STATS(" Bytes = %llu",
  5745. pdev->stats.rx.multicast.bytes);
  5746. DP_PRINT_STATS("Errors:");
  5747. DP_PRINT_STATS(" Rxdma Ring Un-inititalized = %d",
  5748. pdev->stats.replenish.rxdma_err);
  5749. DP_PRINT_STATS(" Desc Alloc Failed: = %d",
  5750. pdev->stats.err.desc_alloc_fail);
  5751. DP_PRINT_STATS(" IP checksum error = %d",
  5752. pdev->stats.err.ip_csum_err);
  5753. DP_PRINT_STATS(" TCP/UDP checksum error = %d",
  5754. pdev->stats.err.tcp_udp_csum_err);
  5755. /* Get bar_recv_cnt */
  5756. dp_aggregate_pdev_ctrl_frames_stats(pdev);
  5757. DP_PRINT_STATS("BAR Received Count: = %d",
  5758. pdev->stats.rx.bar_recv_cnt);
  5759. }
  5760. /**
  5761. * dp_print_pdev_rx_mon_stats(): Print Pdev level RX monitor stats
  5762. * @pdev: DP_PDEV Handle
  5763. *
  5764. * Return: void
  5765. */
  5766. static inline void
  5767. dp_print_pdev_rx_mon_stats(struct dp_pdev *pdev)
  5768. {
  5769. struct cdp_pdev_mon_stats *rx_mon_stats;
  5770. rx_mon_stats = &pdev->rx_mon_stats;
  5771. DP_PRINT_STATS("PDEV Rx Monitor Stats:\n");
  5772. dp_rx_mon_print_dbg_ppdu_stats(rx_mon_stats);
  5773. DP_PRINT_STATS("status_ppdu_done_cnt = %d",
  5774. rx_mon_stats->status_ppdu_done);
  5775. DP_PRINT_STATS("dest_ppdu_done_cnt = %d",
  5776. rx_mon_stats->dest_ppdu_done);
  5777. DP_PRINT_STATS("dest_mpdu_done_cnt = %d",
  5778. rx_mon_stats->dest_mpdu_done);
  5779. DP_PRINT_STATS("dest_mpdu_drop_cnt = %d",
  5780. rx_mon_stats->dest_mpdu_drop);
  5781. DP_PRINT_STATS("dup_mon_linkdesc_cnt = %d",
  5782. rx_mon_stats->dup_mon_linkdesc_cnt);
  5783. DP_PRINT_STATS("dup_mon_buf_cnt = %d",
  5784. rx_mon_stats->dup_mon_buf_cnt);
  5785. }
  5786. /**
  5787. * dp_print_soc_tx_stats(): Print SOC level stats
  5788. * @soc DP_SOC Handle
  5789. *
  5790. * Return: void
  5791. */
  5792. static inline void
  5793. dp_print_soc_tx_stats(struct dp_soc *soc)
  5794. {
  5795. uint8_t desc_pool_id;
  5796. soc->stats.tx.desc_in_use = 0;
  5797. DP_PRINT_STATS("SOC Tx Stats:\n");
  5798. for (desc_pool_id = 0;
  5799. desc_pool_id < wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5800. desc_pool_id++)
  5801. soc->stats.tx.desc_in_use +=
  5802. soc->tx_desc[desc_pool_id].num_allocated;
  5803. DP_PRINT_STATS("Tx Descriptors In Use = %d",
  5804. soc->stats.tx.desc_in_use);
  5805. DP_PRINT_STATS("Tx Invalid peer:");
  5806. DP_PRINT_STATS(" Packets = %d",
  5807. soc->stats.tx.tx_invalid_peer.num);
  5808. DP_PRINT_STATS(" Bytes = %llu",
  5809. soc->stats.tx.tx_invalid_peer.bytes);
  5810. DP_PRINT_STATS("Packets dropped due to TCL ring full = %d %d %d",
  5811. soc->stats.tx.tcl_ring_full[0],
  5812. soc->stats.tx.tcl_ring_full[1],
  5813. soc->stats.tx.tcl_ring_full[2]);
  5814. }
  5815. /**
  5816. * dp_print_soc_rx_stats: Print SOC level Rx stats
  5817. * @soc: DP_SOC Handle
  5818. *
  5819. * Return:void
  5820. */
  5821. static inline void
  5822. dp_print_soc_rx_stats(struct dp_soc *soc)
  5823. {
  5824. uint32_t i;
  5825. char reo_error[DP_REO_ERR_LENGTH];
  5826. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  5827. uint8_t index = 0;
  5828. DP_PRINT_STATS("No of AST Entries = %d", soc->num_ast_entries);
  5829. DP_PRINT_STATS("SOC Rx Stats:\n");
  5830. DP_PRINT_STATS("Fragmented packets: %u",
  5831. soc->stats.rx.rx_frags);
  5832. DP_PRINT_STATS("Reo reinjected packets: %u",
  5833. soc->stats.rx.reo_reinject);
  5834. DP_PRINT_STATS("Errors:\n");
  5835. DP_PRINT_STATS("Rx Decrypt Errors = %d",
  5836. (soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_DECRYPT] +
  5837. soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_TKIP_MIC]));
  5838. DP_PRINT_STATS("Invalid RBM = %d",
  5839. soc->stats.rx.err.invalid_rbm);
  5840. DP_PRINT_STATS("Invalid Vdev = %d",
  5841. soc->stats.rx.err.invalid_vdev);
  5842. DP_PRINT_STATS("Invalid sa_idx or da_idx = %d",
  5843. soc->stats.rx.err.invalid_sa_da_idx);
  5844. DP_PRINT_STATS("Invalid Pdev = %d",
  5845. soc->stats.rx.err.invalid_pdev);
  5846. DP_PRINT_STATS("Invalid Peer = %d",
  5847. soc->stats.rx.err.rx_invalid_peer.num);
  5848. DP_PRINT_STATS("HAL Ring Access Fail = %d",
  5849. soc->stats.rx.err.hal_ring_access_fail);
  5850. DP_PRINT_STATS("RX frags: %d", soc->stats.rx.rx_frags);
  5851. DP_PRINT_STATS("RX frag wait: %d", soc->stats.rx.rx_frag_wait);
  5852. DP_PRINT_STATS("RX frag err: %d", soc->stats.rx.rx_frag_err);
  5853. DP_PRINT_STATS("RX HP out_of_sync: %d", soc->stats.rx.hp_oos);
  5854. DP_PRINT_STATS("RX DUP DESC: %d",
  5855. soc->stats.rx.err.hal_reo_dest_dup);
  5856. DP_PRINT_STATS("RX REL DUP DESC: %d",
  5857. soc->stats.rx.err.hal_wbm_rel_dup);
  5858. for (i = 0; i < HAL_RXDMA_ERR_MAX; i++) {
  5859. index += qdf_snprint(&rxdma_error[index],
  5860. DP_RXDMA_ERR_LENGTH - index,
  5861. " %d", soc->stats.rx.err.rxdma_error[i]);
  5862. }
  5863. DP_PRINT_STATS("RXDMA Error (0-31):%s",
  5864. rxdma_error);
  5865. index = 0;
  5866. for (i = 0; i < HAL_REO_ERR_MAX; i++) {
  5867. index += qdf_snprint(&reo_error[index],
  5868. DP_REO_ERR_LENGTH - index,
  5869. " %d", soc->stats.rx.err.reo_error[i]);
  5870. }
  5871. DP_PRINT_STATS("REO Error(0-14):%s",
  5872. reo_error);
  5873. }
  5874. /**
  5875. * dp_srng_get_str_from_ring_type() - Return string name for a ring
  5876. * @ring_type: Ring
  5877. *
  5878. * Return: char const pointer
  5879. */
  5880. static inline const
  5881. char *dp_srng_get_str_from_hal_ring_type(enum hal_ring_type ring_type)
  5882. {
  5883. switch (ring_type) {
  5884. case REO_DST:
  5885. return "Reo_dst";
  5886. case REO_EXCEPTION:
  5887. return "Reo_exception";
  5888. case REO_CMD:
  5889. return "Reo_cmd";
  5890. case REO_REINJECT:
  5891. return "Reo_reinject";
  5892. case REO_STATUS:
  5893. return "Reo_status";
  5894. case WBM2SW_RELEASE:
  5895. return "wbm2sw_release";
  5896. case TCL_DATA:
  5897. return "tcl_data";
  5898. case TCL_CMD:
  5899. return "tcl_cmd";
  5900. case TCL_STATUS:
  5901. return "tcl_status";
  5902. case SW2WBM_RELEASE:
  5903. return "sw2wbm_release";
  5904. case RXDMA_BUF:
  5905. return "Rxdma_buf";
  5906. case RXDMA_DST:
  5907. return "Rxdma_dst";
  5908. case RXDMA_MONITOR_BUF:
  5909. return "Rxdma_monitor_buf";
  5910. case RXDMA_MONITOR_DESC:
  5911. return "Rxdma_monitor_desc";
  5912. case RXDMA_MONITOR_STATUS:
  5913. return "Rxdma_monitor_status";
  5914. default:
  5915. dp_err("Invalid ring type");
  5916. break;
  5917. }
  5918. return "Invalid";
  5919. }
  5920. /**
  5921. * dp_print_ring_stat_from_hal(): Print hal level ring stats
  5922. * @soc: DP_SOC handle
  5923. * @srng: DP_SRNG handle
  5924. * @ring_name: SRNG name
  5925. * @ring_type: srng src/dst ring
  5926. *
  5927. * Return: void
  5928. */
  5929. static void
  5930. dp_print_ring_stat_from_hal(struct dp_soc *soc, struct dp_srng *srng,
  5931. enum hal_ring_type ring_type)
  5932. {
  5933. uint32_t tailp;
  5934. uint32_t headp;
  5935. int32_t hw_headp = -1;
  5936. int32_t hw_tailp = -1;
  5937. const char *ring_name;
  5938. struct hal_soc *hal_soc;
  5939. if (soc && srng && srng->hal_srng) {
  5940. hal_soc = (struct hal_soc *)soc->hal_soc;
  5941. ring_name = dp_srng_get_str_from_hal_ring_type(ring_type);
  5942. hal_get_sw_hptp(soc->hal_soc, srng->hal_srng, &tailp, &headp);
  5943. DP_PRINT_STATS("%s:SW:Head pointer = %d Tail Pointer = %d\n",
  5944. ring_name, headp, tailp);
  5945. hal_get_hw_hptp(soc->hal_soc, srng->hal_srng, &hw_headp,
  5946. &hw_tailp, ring_type);
  5947. DP_PRINT_STATS("%s:HW:Head pointer = %d Tail Pointer = %d\n",
  5948. ring_name, hw_headp, hw_tailp);
  5949. }
  5950. }
  5951. /**
  5952. * dp_print_mon_ring_stats_from_hal() - Print stat for monitor rings based
  5953. * on target
  5954. * @pdev: physical device handle
  5955. * @mac_id: mac id
  5956. *
  5957. * Return: void
  5958. */
  5959. static inline
  5960. void dp_print_mon_ring_stat_from_hal(struct dp_pdev *pdev, uint8_t mac_id)
  5961. {
  5962. if (pdev->soc->wlan_cfg_ctx->rxdma1_enable) {
  5963. dp_print_ring_stat_from_hal(pdev->soc,
  5964. &pdev->rxdma_mon_buf_ring[mac_id],
  5965. RXDMA_MONITOR_BUF);
  5966. dp_print_ring_stat_from_hal(pdev->soc,
  5967. &pdev->rxdma_mon_dst_ring[mac_id],
  5968. RXDMA_MONITOR_DST);
  5969. dp_print_ring_stat_from_hal(pdev->soc,
  5970. &pdev->rxdma_mon_desc_ring[mac_id],
  5971. RXDMA_MONITOR_DESC);
  5972. }
  5973. dp_print_ring_stat_from_hal(pdev->soc,
  5974. &pdev->rxdma_mon_status_ring[mac_id],
  5975. RXDMA_MONITOR_STATUS);
  5976. }
  5977. /**
  5978. * dp_print_ring_stats(): Print tail and head pointer
  5979. * @pdev: DP_PDEV handle
  5980. *
  5981. * Return:void
  5982. */
  5983. static inline void
  5984. dp_print_ring_stats(struct dp_pdev *pdev)
  5985. {
  5986. uint32_t i;
  5987. int mac_id;
  5988. dp_print_ring_stat_from_hal(pdev->soc,
  5989. &pdev->soc->reo_exception_ring,
  5990. REO_EXCEPTION);
  5991. dp_print_ring_stat_from_hal(pdev->soc,
  5992. &pdev->soc->reo_reinject_ring,
  5993. REO_REINJECT);
  5994. dp_print_ring_stat_from_hal(pdev->soc,
  5995. &pdev->soc->reo_cmd_ring,
  5996. REO_CMD);
  5997. dp_print_ring_stat_from_hal(pdev->soc,
  5998. &pdev->soc->reo_status_ring,
  5999. REO_STATUS);
  6000. dp_print_ring_stat_from_hal(pdev->soc,
  6001. &pdev->soc->rx_rel_ring,
  6002. WBM2SW_RELEASE);
  6003. dp_print_ring_stat_from_hal(pdev->soc,
  6004. &pdev->soc->tcl_cmd_ring,
  6005. TCL_CMD);
  6006. dp_print_ring_stat_from_hal(pdev->soc,
  6007. &pdev->soc->tcl_status_ring,
  6008. TCL_STATUS);
  6009. dp_print_ring_stat_from_hal(pdev->soc,
  6010. &pdev->soc->wbm_desc_rel_ring,
  6011. SW2WBM_RELEASE);
  6012. for (i = 0; i < MAX_REO_DEST_RINGS; i++)
  6013. dp_print_ring_stat_from_hal(pdev->soc,
  6014. &pdev->soc->reo_dest_ring[i],
  6015. REO_DST);
  6016. for (i = 0; i < pdev->soc->num_tcl_data_rings; i++)
  6017. dp_print_ring_stat_from_hal(pdev->soc,
  6018. &pdev->soc->tcl_data_ring[i],
  6019. TCL_DATA);
  6020. for (i = 0; i < MAX_TCL_DATA_RINGS; i++)
  6021. dp_print_ring_stat_from_hal(pdev->soc,
  6022. &pdev->soc->tx_comp_ring[i],
  6023. WBM2SW_RELEASE);
  6024. dp_print_ring_stat_from_hal(pdev->soc,
  6025. &pdev->rx_refill_buf_ring,
  6026. RXDMA_BUF);
  6027. dp_print_ring_stat_from_hal(pdev->soc,
  6028. &pdev->rx_refill_buf_ring2,
  6029. RXDMA_BUF);
  6030. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  6031. dp_print_ring_stat_from_hal(pdev->soc,
  6032. &pdev->rx_mac_buf_ring[i],
  6033. RXDMA_BUF);
  6034. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++)
  6035. dp_print_mon_ring_stat_from_hal(pdev, mac_id);
  6036. for (i = 0; i < NUM_RXDMA_RINGS_PER_PDEV; i++)
  6037. dp_print_ring_stat_from_hal(pdev->soc,
  6038. &pdev->rxdma_err_dst_ring[i],
  6039. RXDMA_DST);
  6040. }
  6041. /**
  6042. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  6043. * @vdev: DP_VDEV handle
  6044. *
  6045. * Return:void
  6046. */
  6047. static inline void
  6048. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  6049. {
  6050. struct dp_peer *peer = NULL;
  6051. if (!vdev || !vdev->pdev)
  6052. return;
  6053. DP_STATS_CLR(vdev->pdev);
  6054. DP_STATS_CLR(vdev->pdev->soc);
  6055. DP_STATS_CLR(vdev);
  6056. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  6057. if (!peer)
  6058. return;
  6059. DP_STATS_CLR(peer);
  6060. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  6061. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  6062. &peer->stats, peer->peer_ids[0],
  6063. UPDATE_PEER_STATS, vdev->pdev->pdev_id);
  6064. #endif
  6065. }
  6066. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  6067. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  6068. &vdev->stats, vdev->vdev_id,
  6069. UPDATE_VDEV_STATS, vdev->pdev->pdev_id);
  6070. #endif
  6071. }
  6072. /**
  6073. * dp_print_common_rates_info(): Print common rate for tx or rx
  6074. * @pkt_type_array: rate type array contains rate info
  6075. *
  6076. * Return:void
  6077. */
  6078. static inline void
  6079. dp_print_common_rates_info(struct cdp_pkt_type *pkt_type_array)
  6080. {
  6081. uint8_t mcs, pkt_type;
  6082. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  6083. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  6084. if (!dp_rate_string[pkt_type][mcs].valid)
  6085. continue;
  6086. DP_PRINT_STATS(" %s = %d",
  6087. dp_rate_string[pkt_type][mcs].mcs_type,
  6088. pkt_type_array[pkt_type].mcs_count[mcs]);
  6089. }
  6090. DP_PRINT_STATS("\n");
  6091. }
  6092. }
  6093. /**
  6094. * dp_print_rx_rates(): Print Rx rate stats
  6095. * @vdev: DP_VDEV handle
  6096. *
  6097. * Return:void
  6098. */
  6099. static inline void
  6100. dp_print_rx_rates(struct dp_vdev *vdev)
  6101. {
  6102. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  6103. uint8_t i;
  6104. uint8_t index = 0;
  6105. char nss[DP_NSS_LENGTH];
  6106. DP_PRINT_STATS("Rx Rate Info:\n");
  6107. dp_print_common_rates_info(pdev->stats.rx.pkt_type);
  6108. index = 0;
  6109. for (i = 0; i < SS_COUNT; i++) {
  6110. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  6111. " %d", pdev->stats.rx.nss[i]);
  6112. }
  6113. DP_PRINT_STATS("NSS(1-8) = %s",
  6114. nss);
  6115. DP_PRINT_STATS("SGI ="
  6116. " 0.8us %d,"
  6117. " 0.4us %d,"
  6118. " 1.6us %d,"
  6119. " 3.2us %d,",
  6120. pdev->stats.rx.sgi_count[0],
  6121. pdev->stats.rx.sgi_count[1],
  6122. pdev->stats.rx.sgi_count[2],
  6123. pdev->stats.rx.sgi_count[3]);
  6124. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  6125. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  6126. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  6127. DP_PRINT_STATS("Reception Type ="
  6128. " SU: %d,"
  6129. " MU_MIMO:%d,"
  6130. " MU_OFDMA:%d,"
  6131. " MU_OFDMA_MIMO:%d\n",
  6132. pdev->stats.rx.reception_type[0],
  6133. pdev->stats.rx.reception_type[1],
  6134. pdev->stats.rx.reception_type[2],
  6135. pdev->stats.rx.reception_type[3]);
  6136. DP_PRINT_STATS("Aggregation:\n");
  6137. DP_PRINT_STATS("Number of Msdu's Part of Ampdus = %d",
  6138. pdev->stats.rx.ampdu_cnt);
  6139. DP_PRINT_STATS("Number of Msdu's With No Mpdu Level Aggregation : %d",
  6140. pdev->stats.rx.non_ampdu_cnt);
  6141. DP_PRINT_STATS("Number of Msdu's Part of Amsdu: %d",
  6142. pdev->stats.rx.amsdu_cnt);
  6143. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation: %d",
  6144. pdev->stats.rx.non_amsdu_cnt);
  6145. }
  6146. /**
  6147. * dp_print_tx_rates(): Print tx rates
  6148. * @vdev: DP_VDEV handle
  6149. *
  6150. * Return:void
  6151. */
  6152. static inline void
  6153. dp_print_tx_rates(struct dp_vdev *vdev)
  6154. {
  6155. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  6156. uint8_t index;
  6157. char nss[DP_NSS_LENGTH];
  6158. int nss_index;
  6159. DP_PRINT_STATS("Tx Rate Info:\n");
  6160. dp_print_common_rates_info(pdev->stats.tx.pkt_type);
  6161. DP_PRINT_STATS("SGI ="
  6162. " 0.8us %d"
  6163. " 0.4us %d"
  6164. " 1.6us %d"
  6165. " 3.2us %d",
  6166. pdev->stats.tx.sgi_count[0],
  6167. pdev->stats.tx.sgi_count[1],
  6168. pdev->stats.tx.sgi_count[2],
  6169. pdev->stats.tx.sgi_count[3]);
  6170. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  6171. pdev->stats.tx.bw[0], pdev->stats.tx.bw[1],
  6172. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3]);
  6173. index = 0;
  6174. for (nss_index = 0; nss_index < SS_COUNT; nss_index++) {
  6175. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  6176. " %d", pdev->stats.tx.nss[nss_index]);
  6177. }
  6178. DP_PRINT_STATS("NSS(1-8) = %s", nss);
  6179. DP_PRINT_STATS("OFDMA = %d", pdev->stats.tx.ofdma);
  6180. DP_PRINT_STATS("STBC = %d", pdev->stats.tx.stbc);
  6181. DP_PRINT_STATS("LDPC = %d", pdev->stats.tx.ldpc);
  6182. DP_PRINT_STATS("Retries = %d", pdev->stats.tx.retries);
  6183. DP_PRINT_STATS("Last ack rssi = %d\n", pdev->stats.tx.last_ack_rssi);
  6184. DP_PRINT_STATS("Aggregation:\n");
  6185. DP_PRINT_STATS("Number of Msdu's Part of Amsdu = %d",
  6186. pdev->stats.tx.amsdu_cnt);
  6187. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation = %d",
  6188. pdev->stats.tx.non_amsdu_cnt);
  6189. }
  6190. /**
  6191. * dp_print_peer_stats():print peer stats
  6192. * @peer: DP_PEER handle
  6193. *
  6194. * return void
  6195. */
  6196. static inline void dp_print_peer_stats(struct dp_peer *peer)
  6197. {
  6198. uint8_t i;
  6199. uint32_t index;
  6200. uint32_t j;
  6201. char nss[DP_NSS_LENGTH];
  6202. char mu_group_id[DP_MU_GROUP_LENGTH];
  6203. DP_PRINT_STATS("Node Tx Stats:\n");
  6204. DP_PRINT_STATS("Total Packet Completions = %d",
  6205. peer->stats.tx.comp_pkt.num);
  6206. DP_PRINT_STATS("Total Bytes Completions = %llu",
  6207. peer->stats.tx.comp_pkt.bytes);
  6208. DP_PRINT_STATS("Success Packets = %d",
  6209. peer->stats.tx.tx_success.num);
  6210. DP_PRINT_STATS("Success Bytes = %llu",
  6211. peer->stats.tx.tx_success.bytes);
  6212. DP_PRINT_STATS("Unicast Success Packets = %d",
  6213. peer->stats.tx.ucast.num);
  6214. DP_PRINT_STATS("Unicast Success Bytes = %llu",
  6215. peer->stats.tx.ucast.bytes);
  6216. DP_PRINT_STATS("Multicast Success Packets = %d",
  6217. peer->stats.tx.mcast.num);
  6218. DP_PRINT_STATS("Multicast Success Bytes = %llu",
  6219. peer->stats.tx.mcast.bytes);
  6220. DP_PRINT_STATS("Broadcast Success Packets = %d",
  6221. peer->stats.tx.bcast.num);
  6222. DP_PRINT_STATS("Broadcast Success Bytes = %llu",
  6223. peer->stats.tx.bcast.bytes);
  6224. DP_PRINT_STATS("Packets Failed = %d",
  6225. peer->stats.tx.tx_failed);
  6226. DP_PRINT_STATS("Packets In OFDMA = %d",
  6227. peer->stats.tx.ofdma);
  6228. DP_PRINT_STATS("Packets In STBC = %d",
  6229. peer->stats.tx.stbc);
  6230. DP_PRINT_STATS("Packets In LDPC = %d",
  6231. peer->stats.tx.ldpc);
  6232. DP_PRINT_STATS("Packet Retries = %d",
  6233. peer->stats.tx.retries);
  6234. DP_PRINT_STATS("MSDU's Part of AMSDU = %d",
  6235. peer->stats.tx.amsdu_cnt);
  6236. DP_PRINT_STATS("Last Packet RSSI = %d",
  6237. peer->stats.tx.last_ack_rssi);
  6238. DP_PRINT_STATS("Dropped At FW: Removed Pkts = %u",
  6239. peer->stats.tx.dropped.fw_rem.num);
  6240. DP_PRINT_STATS("Dropped At FW: Removed bytes = %llu",
  6241. peer->stats.tx.dropped.fw_rem.bytes);
  6242. DP_PRINT_STATS("Dropped At FW: Removed transmitted = %d",
  6243. peer->stats.tx.dropped.fw_rem_tx);
  6244. DP_PRINT_STATS("Dropped At FW: Removed Untransmitted = %d",
  6245. peer->stats.tx.dropped.fw_rem_notx);
  6246. DP_PRINT_STATS("Dropped : Age Out = %d",
  6247. peer->stats.tx.dropped.age_out);
  6248. DP_PRINT_STATS("NAWDS : ");
  6249. DP_PRINT_STATS(" Nawds multicast Drop Tx Packet = %d",
  6250. peer->stats.tx.nawds_mcast_drop);
  6251. DP_PRINT_STATS(" Nawds multicast Tx Packet Count = %d",
  6252. peer->stats.tx.nawds_mcast.num);
  6253. DP_PRINT_STATS(" Nawds multicast Tx Packet Bytes = %llu",
  6254. peer->stats.tx.nawds_mcast.bytes);
  6255. DP_PRINT_STATS("Rate Info:");
  6256. dp_print_common_rates_info(peer->stats.tx.pkt_type);
  6257. DP_PRINT_STATS("SGI = "
  6258. " 0.8us %d"
  6259. " 0.4us %d"
  6260. " 1.6us %d"
  6261. " 3.2us %d",
  6262. peer->stats.tx.sgi_count[0],
  6263. peer->stats.tx.sgi_count[1],
  6264. peer->stats.tx.sgi_count[2],
  6265. peer->stats.tx.sgi_count[3]);
  6266. DP_PRINT_STATS("Excess Retries per AC ");
  6267. DP_PRINT_STATS(" Best effort = %d",
  6268. peer->stats.tx.excess_retries_per_ac[0]);
  6269. DP_PRINT_STATS(" Background= %d",
  6270. peer->stats.tx.excess_retries_per_ac[1]);
  6271. DP_PRINT_STATS(" Video = %d",
  6272. peer->stats.tx.excess_retries_per_ac[2]);
  6273. DP_PRINT_STATS(" Voice = %d",
  6274. peer->stats.tx.excess_retries_per_ac[3]);
  6275. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d\n",
  6276. peer->stats.tx.bw[0], peer->stats.tx.bw[1],
  6277. peer->stats.tx.bw[2], peer->stats.tx.bw[3]);
  6278. index = 0;
  6279. for (i = 0; i < SS_COUNT; i++) {
  6280. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  6281. " %d", peer->stats.tx.nss[i]);
  6282. }
  6283. DP_PRINT_STATS("NSS(1-8) = %s", nss);
  6284. DP_PRINT_STATS("Transmit Type :");
  6285. DP_PRINT_STATS("SU %d, MU_MIMO %d, MU_OFDMA %d, MU_MIMO_OFDMA %d",
  6286. peer->stats.tx.transmit_type[0],
  6287. peer->stats.tx.transmit_type[1],
  6288. peer->stats.tx.transmit_type[2],
  6289. peer->stats.tx.transmit_type[3]);
  6290. for (i = 0; i < MAX_MU_GROUP_ID;) {
  6291. index = 0;
  6292. for (j = 0; j < DP_MU_GROUP_SHOW && i < MAX_MU_GROUP_ID;
  6293. j++) {
  6294. index += qdf_snprint(&mu_group_id[index],
  6295. DP_MU_GROUP_LENGTH - index,
  6296. " %d",
  6297. peer->stats.tx.mu_group_id[i]);
  6298. i++;
  6299. }
  6300. DP_PRINT_STATS("User position list for GID %02d->%d: [%s]",
  6301. i - DP_MU_GROUP_SHOW, i - 1, mu_group_id);
  6302. }
  6303. DP_PRINT_STATS("Last Packet RU index [%d], Size [%d]",
  6304. peer->stats.tx.ru_start, peer->stats.tx.ru_tones);
  6305. DP_PRINT_STATS("RU Locations RU[26 52 106 242 484 996]:");
  6306. DP_PRINT_STATS("RU_26: %d", peer->stats.tx.ru_loc[0]);
  6307. DP_PRINT_STATS("RU 52: %d", peer->stats.tx.ru_loc[1]);
  6308. DP_PRINT_STATS("RU 106: %d", peer->stats.tx.ru_loc[2]);
  6309. DP_PRINT_STATS("RU 242: %d", peer->stats.tx.ru_loc[3]);
  6310. DP_PRINT_STATS("RU 484: %d", peer->stats.tx.ru_loc[4]);
  6311. DP_PRINT_STATS("RU 996: %d", peer->stats.tx.ru_loc[5]);
  6312. DP_PRINT_STATS("Aggregation:");
  6313. DP_PRINT_STATS(" Number of Msdu's Part of Amsdu = %d",
  6314. peer->stats.tx.amsdu_cnt);
  6315. DP_PRINT_STATS(" Number of Msdu's With No Msdu Level Aggregation = %d\n",
  6316. peer->stats.tx.non_amsdu_cnt);
  6317. DP_PRINT_STATS("Bytes and Packets transmitted in last one sec:");
  6318. DP_PRINT_STATS(" Bytes transmitted in last sec: %d",
  6319. peer->stats.tx.tx_byte_rate);
  6320. DP_PRINT_STATS(" Data transmitted in last sec: %d",
  6321. peer->stats.tx.tx_data_rate);
  6322. DP_PRINT_STATS("Node Rx Stats:");
  6323. DP_PRINT_STATS("Packets Sent To Stack = %d",
  6324. peer->stats.rx.to_stack.num);
  6325. DP_PRINT_STATS("Bytes Sent To Stack = %llu",
  6326. peer->stats.rx.to_stack.bytes);
  6327. for (i = 0; i < CDP_MAX_RX_RINGS; i++) {
  6328. DP_PRINT_STATS("Ring Id = %d", i);
  6329. DP_PRINT_STATS(" Packets Received = %d",
  6330. peer->stats.rx.rcvd_reo[i].num);
  6331. DP_PRINT_STATS(" Bytes Received = %llu",
  6332. peer->stats.rx.rcvd_reo[i].bytes);
  6333. }
  6334. DP_PRINT_STATS("Multicast Packets Received = %d",
  6335. peer->stats.rx.multicast.num);
  6336. DP_PRINT_STATS("Multicast Bytes Received = %llu",
  6337. peer->stats.rx.multicast.bytes);
  6338. DP_PRINT_STATS("Broadcast Packets Received = %d",
  6339. peer->stats.rx.bcast.num);
  6340. DP_PRINT_STATS("Broadcast Bytes Received = %llu",
  6341. peer->stats.rx.bcast.bytes);
  6342. DP_PRINT_STATS("Intra BSS Packets Received = %d",
  6343. peer->stats.rx.intra_bss.pkts.num);
  6344. DP_PRINT_STATS("Intra BSS Bytes Received = %llu",
  6345. peer->stats.rx.intra_bss.pkts.bytes);
  6346. DP_PRINT_STATS("Raw Packets Received = %d",
  6347. peer->stats.rx.raw.num);
  6348. DP_PRINT_STATS("Raw Bytes Received = %llu",
  6349. peer->stats.rx.raw.bytes);
  6350. DP_PRINT_STATS("Errors: MIC Errors = %d",
  6351. peer->stats.rx.err.mic_err);
  6352. DP_PRINT_STATS("Erros: Decryption Errors = %d",
  6353. peer->stats.rx.err.decrypt_err);
  6354. DP_PRINT_STATS("Msdu's Received As Part of Ampdu = %d",
  6355. peer->stats.rx.non_ampdu_cnt);
  6356. DP_PRINT_STATS("Msdu's Recived As Ampdu = %d",
  6357. peer->stats.rx.ampdu_cnt);
  6358. DP_PRINT_STATS("Msdu's Received Not Part of Amsdu's = %d",
  6359. peer->stats.rx.non_amsdu_cnt);
  6360. DP_PRINT_STATS("MSDUs Received As Part of Amsdu = %d",
  6361. peer->stats.rx.amsdu_cnt);
  6362. DP_PRINT_STATS("NAWDS : ");
  6363. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet = %d",
  6364. peer->stats.rx.nawds_mcast_drop);
  6365. DP_PRINT_STATS("SGI ="
  6366. " 0.8us %d"
  6367. " 0.4us %d"
  6368. " 1.6us %d"
  6369. " 3.2us %d",
  6370. peer->stats.rx.sgi_count[0],
  6371. peer->stats.rx.sgi_count[1],
  6372. peer->stats.rx.sgi_count[2],
  6373. peer->stats.rx.sgi_count[3]);
  6374. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d",
  6375. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  6376. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  6377. DP_PRINT_STATS("Reception Type ="
  6378. " SU %d,"
  6379. " MU_MIMO %d,"
  6380. " MU_OFDMA %d,"
  6381. " MU_OFDMA_MIMO %d",
  6382. peer->stats.rx.reception_type[0],
  6383. peer->stats.rx.reception_type[1],
  6384. peer->stats.rx.reception_type[2],
  6385. peer->stats.rx.reception_type[3]);
  6386. dp_print_common_rates_info(peer->stats.rx.pkt_type);
  6387. index = 0;
  6388. for (i = 0; i < SS_COUNT; i++) {
  6389. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  6390. " %d", peer->stats.rx.nss[i]);
  6391. }
  6392. DP_PRINT_STATS("NSS(1-8) = %s",
  6393. nss);
  6394. DP_PRINT_STATS("Aggregation:");
  6395. DP_PRINT_STATS(" Msdu's Part of Ampdu = %d",
  6396. peer->stats.rx.ampdu_cnt);
  6397. DP_PRINT_STATS(" Msdu's With No Mpdu Level Aggregation = %d",
  6398. peer->stats.rx.non_ampdu_cnt);
  6399. DP_PRINT_STATS(" Msdu's Part of Amsdu = %d",
  6400. peer->stats.rx.amsdu_cnt);
  6401. DP_PRINT_STATS(" Msdu's With No Msdu Level Aggregation = %d",
  6402. peer->stats.rx.non_amsdu_cnt);
  6403. DP_PRINT_STATS("Bytes and Packets received in last one sec:");
  6404. DP_PRINT_STATS(" Bytes received in last sec: %d",
  6405. peer->stats.rx.rx_byte_rate);
  6406. DP_PRINT_STATS(" Data received in last sec: %d",
  6407. peer->stats.rx.rx_data_rate);
  6408. }
  6409. /*
  6410. * dp_get_host_peer_stats()- function to print peer stats
  6411. * @pdev_handle: DP_PDEV handle
  6412. * @mac_addr: mac address of the peer
  6413. *
  6414. * Return: void
  6415. */
  6416. static void
  6417. dp_get_host_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  6418. {
  6419. struct dp_peer *peer;
  6420. uint8_t local_id;
  6421. if (!mac_addr) {
  6422. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  6423. "Invalid MAC address\n");
  6424. return;
  6425. }
  6426. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  6427. &local_id);
  6428. if (!peer) {
  6429. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  6430. "%s: Invalid peer\n", __func__);
  6431. return;
  6432. }
  6433. /* Making sure the peer is for the specific pdev */
  6434. if ((struct dp_pdev *)pdev_handle != peer->vdev->pdev) {
  6435. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  6436. "%s: Peer is not for this pdev\n", __func__);
  6437. return;
  6438. }
  6439. dp_print_peer_stats(peer);
  6440. dp_peer_rxtid_stats(peer, dp_rx_tid_stats_cb, NULL);
  6441. }
  6442. /**
  6443. * dp_print_soc_cfg_params()- Dump soc wlan config parameters
  6444. * @soc_handle: Soc handle
  6445. *
  6446. * Return: void
  6447. */
  6448. static void
  6449. dp_print_soc_cfg_params(struct dp_soc *soc)
  6450. {
  6451. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  6452. uint8_t index = 0, i = 0;
  6453. char ring_mask[DP_MAX_INT_CONTEXTS_STRING_LENGTH];
  6454. int num_of_int_contexts;
  6455. if (!soc) {
  6456. dp_err("Context is null");
  6457. return;
  6458. }
  6459. soc_cfg_ctx = soc->wlan_cfg_ctx;
  6460. if (!soc_cfg_ctx) {
  6461. dp_err("Context is null");
  6462. return;
  6463. }
  6464. num_of_int_contexts =
  6465. wlan_cfg_get_num_contexts(soc_cfg_ctx);
  6466. DP_TRACE_STATS(DEBUG, "No. of interrupt contexts: %u",
  6467. soc_cfg_ctx->num_int_ctxts);
  6468. DP_TRACE_STATS(DEBUG, "Max clients: %u",
  6469. soc_cfg_ctx->max_clients);
  6470. DP_TRACE_STATS(DEBUG, "Max alloc size: %u ",
  6471. soc_cfg_ctx->max_alloc_size);
  6472. DP_TRACE_STATS(DEBUG, "Per pdev tx ring: %u ",
  6473. soc_cfg_ctx->per_pdev_tx_ring);
  6474. DP_TRACE_STATS(DEBUG, "Num tcl data rings: %u ",
  6475. soc_cfg_ctx->num_tcl_data_rings);
  6476. DP_TRACE_STATS(DEBUG, "Per pdev rx ring: %u ",
  6477. soc_cfg_ctx->per_pdev_rx_ring);
  6478. DP_TRACE_STATS(DEBUG, "Per pdev lmac ring: %u ",
  6479. soc_cfg_ctx->per_pdev_lmac_ring);
  6480. DP_TRACE_STATS(DEBUG, "Num of reo dest rings: %u ",
  6481. soc_cfg_ctx->num_reo_dest_rings);
  6482. DP_TRACE_STATS(DEBUG, "Num tx desc pool: %u ",
  6483. soc_cfg_ctx->num_tx_desc_pool);
  6484. DP_TRACE_STATS(DEBUG, "Num tx ext desc pool: %u ",
  6485. soc_cfg_ctx->num_tx_ext_desc_pool);
  6486. DP_TRACE_STATS(DEBUG, "Num tx desc: %u ",
  6487. soc_cfg_ctx->num_tx_desc);
  6488. DP_TRACE_STATS(DEBUG, "Num tx ext desc: %u ",
  6489. soc_cfg_ctx->num_tx_ext_desc);
  6490. DP_TRACE_STATS(DEBUG, "Htt packet type: %u ",
  6491. soc_cfg_ctx->htt_packet_type);
  6492. DP_TRACE_STATS(DEBUG, "Max peer_ids: %u ",
  6493. soc_cfg_ctx->max_peer_id);
  6494. DP_TRACE_STATS(DEBUG, "Tx ring size: %u ",
  6495. soc_cfg_ctx->tx_ring_size);
  6496. DP_TRACE_STATS(DEBUG, "Tx comp ring size: %u ",
  6497. soc_cfg_ctx->tx_comp_ring_size);
  6498. DP_TRACE_STATS(DEBUG, "Tx comp ring size nss: %u ",
  6499. soc_cfg_ctx->tx_comp_ring_size_nss);
  6500. DP_TRACE_STATS(DEBUG, "Int batch threshold tx: %u ",
  6501. soc_cfg_ctx->int_batch_threshold_tx);
  6502. DP_TRACE_STATS(DEBUG, "Int timer threshold tx: %u ",
  6503. soc_cfg_ctx->int_timer_threshold_tx);
  6504. DP_TRACE_STATS(DEBUG, "Int batch threshold rx: %u ",
  6505. soc_cfg_ctx->int_batch_threshold_rx);
  6506. DP_TRACE_STATS(DEBUG, "Int timer threshold rx: %u ",
  6507. soc_cfg_ctx->int_timer_threshold_rx);
  6508. DP_TRACE_STATS(DEBUG, "Int batch threshold other: %u ",
  6509. soc_cfg_ctx->int_batch_threshold_other);
  6510. DP_TRACE_STATS(DEBUG, "Int timer threshold other: %u ",
  6511. soc_cfg_ctx->int_timer_threshold_other);
  6512. for (i = 0; i < num_of_int_contexts; i++) {
  6513. index += qdf_snprint(&ring_mask[index],
  6514. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6515. " %d",
  6516. soc_cfg_ctx->int_tx_ring_mask[i]);
  6517. }
  6518. DP_TRACE_STATS(DEBUG, "Tx ring mask (0-%d):%s",
  6519. num_of_int_contexts, ring_mask);
  6520. index = 0;
  6521. for (i = 0; i < num_of_int_contexts; i++) {
  6522. index += qdf_snprint(&ring_mask[index],
  6523. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6524. " %d",
  6525. soc_cfg_ctx->int_rx_ring_mask[i]);
  6526. }
  6527. DP_TRACE_STATS(DEBUG, "Rx ring mask (0-%d):%s",
  6528. num_of_int_contexts, ring_mask);
  6529. index = 0;
  6530. for (i = 0; i < num_of_int_contexts; i++) {
  6531. index += qdf_snprint(&ring_mask[index],
  6532. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6533. " %d",
  6534. soc_cfg_ctx->int_rx_mon_ring_mask[i]);
  6535. }
  6536. DP_TRACE_STATS(DEBUG, "Rx mon ring mask (0-%d):%s",
  6537. num_of_int_contexts, ring_mask);
  6538. index = 0;
  6539. for (i = 0; i < num_of_int_contexts; i++) {
  6540. index += qdf_snprint(&ring_mask[index],
  6541. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6542. " %d",
  6543. soc_cfg_ctx->int_rx_err_ring_mask[i]);
  6544. }
  6545. DP_TRACE_STATS(DEBUG, "Rx err ring mask (0-%d):%s",
  6546. num_of_int_contexts, ring_mask);
  6547. index = 0;
  6548. for (i = 0; i < num_of_int_contexts; i++) {
  6549. index += qdf_snprint(&ring_mask[index],
  6550. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6551. " %d",
  6552. soc_cfg_ctx->int_rx_wbm_rel_ring_mask[i]);
  6553. }
  6554. DP_TRACE_STATS(DEBUG, "Rx wbm rel ring mask (0-%d):%s",
  6555. num_of_int_contexts, ring_mask);
  6556. index = 0;
  6557. for (i = 0; i < num_of_int_contexts; i++) {
  6558. index += qdf_snprint(&ring_mask[index],
  6559. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6560. " %d",
  6561. soc_cfg_ctx->int_reo_status_ring_mask[i]);
  6562. }
  6563. DP_TRACE_STATS(DEBUG, "Reo ring mask (0-%d):%s",
  6564. num_of_int_contexts, ring_mask);
  6565. index = 0;
  6566. for (i = 0; i < num_of_int_contexts; i++) {
  6567. index += qdf_snprint(&ring_mask[index],
  6568. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6569. " %d",
  6570. soc_cfg_ctx->int_rxdma2host_ring_mask[i]);
  6571. }
  6572. DP_TRACE_STATS(DEBUG, "Rxdma2host ring mask (0-%d):%s",
  6573. num_of_int_contexts, ring_mask);
  6574. index = 0;
  6575. for (i = 0; i < num_of_int_contexts; i++) {
  6576. index += qdf_snprint(&ring_mask[index],
  6577. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6578. " %d",
  6579. soc_cfg_ctx->int_host2rxdma_ring_mask[i]);
  6580. }
  6581. DP_TRACE_STATS(DEBUG, "Host2rxdma ring mask (0-%d):%s",
  6582. num_of_int_contexts, ring_mask);
  6583. DP_TRACE_STATS(DEBUG, "Rx hash: %u ",
  6584. soc_cfg_ctx->rx_hash);
  6585. DP_TRACE_STATS(DEBUG, "Tso enabled: %u ",
  6586. soc_cfg_ctx->tso_enabled);
  6587. DP_TRACE_STATS(DEBUG, "Lro enabled: %u ",
  6588. soc_cfg_ctx->lro_enabled);
  6589. DP_TRACE_STATS(DEBUG, "Sg enabled: %u ",
  6590. soc_cfg_ctx->sg_enabled);
  6591. DP_TRACE_STATS(DEBUG, "Gro enabled: %u ",
  6592. soc_cfg_ctx->gro_enabled);
  6593. DP_TRACE_STATS(DEBUG, "rawmode enabled: %u ",
  6594. soc_cfg_ctx->rawmode_enabled);
  6595. DP_TRACE_STATS(DEBUG, "peer flow ctrl enabled: %u ",
  6596. soc_cfg_ctx->peer_flow_ctrl_enabled);
  6597. DP_TRACE_STATS(DEBUG, "napi enabled: %u ",
  6598. soc_cfg_ctx->napi_enabled);
  6599. DP_TRACE_STATS(DEBUG, "Tcp Udp checksum offload: %u ",
  6600. soc_cfg_ctx->tcp_udp_checksumoffload);
  6601. DP_TRACE_STATS(DEBUG, "Defrag timeout check: %u ",
  6602. soc_cfg_ctx->defrag_timeout_check);
  6603. DP_TRACE_STATS(DEBUG, "Rx defrag min timeout: %u ",
  6604. soc_cfg_ctx->rx_defrag_min_timeout);
  6605. DP_TRACE_STATS(DEBUG, "WBM release ring: %u ",
  6606. soc_cfg_ctx->wbm_release_ring);
  6607. DP_TRACE_STATS(DEBUG, "TCL CMD ring: %u ",
  6608. soc_cfg_ctx->tcl_cmd_ring);
  6609. DP_TRACE_STATS(DEBUG, "TCL Status ring: %u ",
  6610. soc_cfg_ctx->tcl_status_ring);
  6611. DP_TRACE_STATS(DEBUG, "REO Reinject ring: %u ",
  6612. soc_cfg_ctx->reo_reinject_ring);
  6613. DP_TRACE_STATS(DEBUG, "RX release ring: %u ",
  6614. soc_cfg_ctx->rx_release_ring);
  6615. DP_TRACE_STATS(DEBUG, "REO Exception ring: %u ",
  6616. soc_cfg_ctx->reo_exception_ring);
  6617. DP_TRACE_STATS(DEBUG, "REO CMD ring: %u ",
  6618. soc_cfg_ctx->reo_cmd_ring);
  6619. DP_TRACE_STATS(DEBUG, "REO STATUS ring: %u ",
  6620. soc_cfg_ctx->reo_status_ring);
  6621. DP_TRACE_STATS(DEBUG, "RXDMA refill ring: %u ",
  6622. soc_cfg_ctx->rxdma_refill_ring);
  6623. DP_TRACE_STATS(DEBUG, "RXDMA err dst ring: %u ",
  6624. soc_cfg_ctx->rxdma_err_dst_ring);
  6625. }
  6626. /**
  6627. * dp_print_vdev_cfg_params() - Print the pdev cfg parameters
  6628. * @pdev_handle: DP pdev handle
  6629. *
  6630. * Return - void
  6631. */
  6632. static void
  6633. dp_print_pdev_cfg_params(struct dp_pdev *pdev)
  6634. {
  6635. struct wlan_cfg_dp_pdev_ctxt *pdev_cfg_ctx;
  6636. if (!pdev) {
  6637. dp_err("Context is null");
  6638. return;
  6639. }
  6640. pdev_cfg_ctx = pdev->wlan_cfg_ctx;
  6641. if (!pdev_cfg_ctx) {
  6642. dp_err("Context is null");
  6643. return;
  6644. }
  6645. DP_TRACE_STATS(DEBUG, "Rx dma buf ring size: %d ",
  6646. pdev_cfg_ctx->rx_dma_buf_ring_size);
  6647. DP_TRACE_STATS(DEBUG, "DMA Mon buf ring size: %d ",
  6648. pdev_cfg_ctx->dma_mon_buf_ring_size);
  6649. DP_TRACE_STATS(DEBUG, "DMA Mon dest ring size: %d ",
  6650. pdev_cfg_ctx->dma_mon_dest_ring_size);
  6651. DP_TRACE_STATS(DEBUG, "DMA Mon status ring size: %d ",
  6652. pdev_cfg_ctx->dma_mon_status_ring_size);
  6653. DP_TRACE_STATS(DEBUG, "Rxdma monitor desc ring: %d",
  6654. pdev_cfg_ctx->rxdma_monitor_desc_ring);
  6655. DP_TRACE_STATS(DEBUG, "Num mac rings: %d ",
  6656. pdev_cfg_ctx->num_mac_rings);
  6657. }
  6658. /**
  6659. * dp_txrx_stats_help() - Helper function for Txrx_Stats
  6660. *
  6661. * Return: None
  6662. */
  6663. static void dp_txrx_stats_help(void)
  6664. {
  6665. dp_info("Command: iwpriv wlan0 txrx_stats <stats_option> <mac_id>");
  6666. dp_info("stats_option:");
  6667. dp_info(" 1 -- HTT Tx Statistics");
  6668. dp_info(" 2 -- HTT Rx Statistics");
  6669. dp_info(" 3 -- HTT Tx HW Queue Statistics");
  6670. dp_info(" 4 -- HTT Tx HW Sched Statistics");
  6671. dp_info(" 5 -- HTT Error Statistics");
  6672. dp_info(" 6 -- HTT TQM Statistics");
  6673. dp_info(" 7 -- HTT TQM CMDQ Statistics");
  6674. dp_info(" 8 -- HTT TX_DE_CMN Statistics");
  6675. dp_info(" 9 -- HTT Tx Rate Statistics");
  6676. dp_info(" 10 -- HTT Rx Rate Statistics");
  6677. dp_info(" 11 -- HTT Peer Statistics");
  6678. dp_info(" 12 -- HTT Tx SelfGen Statistics");
  6679. dp_info(" 13 -- HTT Tx MU HWQ Statistics");
  6680. dp_info(" 14 -- HTT RING_IF_INFO Statistics");
  6681. dp_info(" 15 -- HTT SRNG Statistics");
  6682. dp_info(" 16 -- HTT SFM Info Statistics");
  6683. dp_info(" 17 -- HTT PDEV_TX_MU_MIMO_SCHED INFO Statistics");
  6684. dp_info(" 18 -- HTT Peer List Details");
  6685. dp_info(" 20 -- Clear Host Statistics");
  6686. dp_info(" 21 -- Host Rx Rate Statistics");
  6687. dp_info(" 22 -- Host Tx Rate Statistics");
  6688. dp_info(" 23 -- Host Tx Statistics");
  6689. dp_info(" 24 -- Host Rx Statistics");
  6690. dp_info(" 25 -- Host AST Statistics");
  6691. dp_info(" 26 -- Host SRNG PTR Statistics");
  6692. dp_info(" 27 -- Host Mon Statistics");
  6693. dp_info(" 28 -- Host REO Queue Statistics");
  6694. dp_info(" 29 -- Host Soc cfg param Statistics");
  6695. dp_info(" 30 -- Host pdev cfg param Statistics");
  6696. }
  6697. /**
  6698. * dp_print_host_stats()- Function to print the stats aggregated at host
  6699. * @vdev_handle: DP_VDEV handle
  6700. * @type: host stats type
  6701. *
  6702. * Return: 0 on success, print error message in case of failure
  6703. */
  6704. static int
  6705. dp_print_host_stats(struct cdp_vdev *vdev_handle,
  6706. struct cdp_txrx_stats_req *req)
  6707. {
  6708. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6709. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  6710. enum cdp_host_txrx_stats type =
  6711. dp_stats_mapping_table[req->stats][STATS_HOST];
  6712. dp_aggregate_pdev_stats(pdev);
  6713. switch (type) {
  6714. case TXRX_CLEAR_STATS:
  6715. dp_txrx_host_stats_clr(vdev);
  6716. break;
  6717. case TXRX_RX_RATE_STATS:
  6718. dp_print_rx_rates(vdev);
  6719. break;
  6720. case TXRX_TX_RATE_STATS:
  6721. dp_print_tx_rates(vdev);
  6722. break;
  6723. case TXRX_TX_HOST_STATS:
  6724. dp_print_pdev_tx_stats(pdev);
  6725. dp_print_soc_tx_stats(pdev->soc);
  6726. break;
  6727. case TXRX_RX_HOST_STATS:
  6728. dp_print_pdev_rx_stats(pdev);
  6729. dp_print_soc_rx_stats(pdev->soc);
  6730. break;
  6731. case TXRX_AST_STATS:
  6732. dp_print_ast_stats(pdev->soc);
  6733. dp_print_peer_table(vdev);
  6734. break;
  6735. case TXRX_SRNG_PTR_STATS:
  6736. dp_print_ring_stats(pdev);
  6737. break;
  6738. case TXRX_RX_MON_STATS:
  6739. dp_print_pdev_rx_mon_stats(pdev);
  6740. break;
  6741. case TXRX_REO_QUEUE_STATS:
  6742. dp_get_host_peer_stats((struct cdp_pdev *)pdev, req->peer_addr);
  6743. break;
  6744. case TXRX_SOC_CFG_PARAMS:
  6745. dp_print_soc_cfg_params(pdev->soc);
  6746. break;
  6747. case TXRX_PDEV_CFG_PARAMS:
  6748. dp_print_pdev_cfg_params(pdev);
  6749. break;
  6750. default:
  6751. dp_info("Wrong Input For TxRx Host Stats");
  6752. dp_txrx_stats_help();
  6753. break;
  6754. }
  6755. return 0;
  6756. }
  6757. /*
  6758. * dp_ppdu_ring_reset()- Reset PPDU Stats ring
  6759. * @pdev: DP_PDEV handle
  6760. *
  6761. * Return: void
  6762. */
  6763. static void
  6764. dp_ppdu_ring_reset(struct dp_pdev *pdev)
  6765. {
  6766. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  6767. int mac_id;
  6768. qdf_mem_zero(&(htt_tlv_filter), sizeof(htt_tlv_filter));
  6769. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  6770. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  6771. pdev->pdev_id);
  6772. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  6773. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  6774. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  6775. }
  6776. }
  6777. /*
  6778. * dp_ppdu_ring_cfg()- Configure PPDU Stats ring
  6779. * @pdev: DP_PDEV handle
  6780. *
  6781. * Return: void
  6782. */
  6783. static void
  6784. dp_ppdu_ring_cfg(struct dp_pdev *pdev)
  6785. {
  6786. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  6787. int mac_id;
  6788. htt_tlv_filter.mpdu_start = 1;
  6789. htt_tlv_filter.msdu_start = 0;
  6790. htt_tlv_filter.packet = 0;
  6791. htt_tlv_filter.msdu_end = 0;
  6792. htt_tlv_filter.mpdu_end = 0;
  6793. htt_tlv_filter.attention = 0;
  6794. htt_tlv_filter.ppdu_start = 1;
  6795. htt_tlv_filter.ppdu_end = 1;
  6796. htt_tlv_filter.ppdu_end_user_stats = 1;
  6797. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  6798. htt_tlv_filter.ppdu_end_status_done = 1;
  6799. htt_tlv_filter.enable_fp = 1;
  6800. htt_tlv_filter.enable_md = 0;
  6801. if (pdev->neighbour_peers_added &&
  6802. pdev->soc->hw_nac_monitor_support) {
  6803. htt_tlv_filter.enable_md = 1;
  6804. htt_tlv_filter.packet_header = 1;
  6805. }
  6806. if (pdev->mcopy_mode) {
  6807. htt_tlv_filter.packet_header = 1;
  6808. htt_tlv_filter.enable_mo = 1;
  6809. }
  6810. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  6811. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  6812. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  6813. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  6814. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  6815. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  6816. if (pdev->neighbour_peers_added &&
  6817. pdev->soc->hw_nac_monitor_support)
  6818. htt_tlv_filter.md_data_filter = FILTER_DATA_ALL;
  6819. htt_tlv_filter.offset_valid = false;
  6820. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  6821. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  6822. pdev->pdev_id);
  6823. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  6824. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  6825. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  6826. }
  6827. }
  6828. /*
  6829. * is_ppdu_txrx_capture_enabled() - API to check both pktlog and debug_sniffer
  6830. * modes are enabled or not.
  6831. * @dp_pdev: dp pdev handle.
  6832. *
  6833. * Return: bool
  6834. */
  6835. static inline bool is_ppdu_txrx_capture_enabled(struct dp_pdev *pdev)
  6836. {
  6837. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable &&
  6838. !pdev->mcopy_mode)
  6839. return true;
  6840. else
  6841. return false;
  6842. }
  6843. /*
  6844. *dp_set_bpr_enable() - API to enable/disable bpr feature
  6845. *@pdev_handle: DP_PDEV handle.
  6846. *@val: Provided value.
  6847. *
  6848. *Return: 0 for success. nonzero for failure.
  6849. */
  6850. static QDF_STATUS
  6851. dp_set_bpr_enable(struct cdp_pdev *pdev_handle, int val)
  6852. {
  6853. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6854. switch (val) {
  6855. case CDP_BPR_DISABLE:
  6856. pdev->bpr_enable = CDP_BPR_DISABLE;
  6857. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en &&
  6858. !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  6859. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  6860. } else if (pdev->enhanced_stats_en &&
  6861. !pdev->tx_sniffer_enable && !pdev->mcopy_mode &&
  6862. !pdev->pktlog_ppdu_stats) {
  6863. dp_h2t_cfg_stats_msg_send(pdev,
  6864. DP_PPDU_STATS_CFG_ENH_STATS,
  6865. pdev->pdev_id);
  6866. }
  6867. break;
  6868. case CDP_BPR_ENABLE:
  6869. pdev->bpr_enable = CDP_BPR_ENABLE;
  6870. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable &&
  6871. !pdev->mcopy_mode && !pdev->pktlog_ppdu_stats) {
  6872. dp_h2t_cfg_stats_msg_send(pdev,
  6873. DP_PPDU_STATS_CFG_BPR,
  6874. pdev->pdev_id);
  6875. } else if (pdev->enhanced_stats_en &&
  6876. !pdev->tx_sniffer_enable && !pdev->mcopy_mode &&
  6877. !pdev->pktlog_ppdu_stats) {
  6878. dp_h2t_cfg_stats_msg_send(pdev,
  6879. DP_PPDU_STATS_CFG_BPR_ENH,
  6880. pdev->pdev_id);
  6881. } else if (pdev->pktlog_ppdu_stats) {
  6882. dp_h2t_cfg_stats_msg_send(pdev,
  6883. DP_PPDU_STATS_CFG_BPR_PKTLOG,
  6884. pdev->pdev_id);
  6885. }
  6886. break;
  6887. default:
  6888. break;
  6889. }
  6890. return QDF_STATUS_SUCCESS;
  6891. }
  6892. /*
  6893. * dp_pdev_tid_stats_ingress_inc
  6894. * @pdev: pdev handle
  6895. * @val: increase in value
  6896. *
  6897. * Return: void
  6898. */
  6899. static void
  6900. dp_pdev_tid_stats_ingress_inc(struct cdp_pdev *pdev, uint32_t val)
  6901. {
  6902. struct dp_pdev *dp_pdev = (struct dp_pdev *)pdev;
  6903. dp_pdev->stats.tid_stats.ingress_stack += val;
  6904. }
  6905. /*
  6906. * dp_pdev_tid_stats_osif_drop
  6907. * @pdev: pdev handle
  6908. * @val: increase in value
  6909. *
  6910. * Return: void
  6911. */
  6912. static void
  6913. dp_pdev_tid_stats_osif_drop(struct cdp_pdev *pdev, uint32_t val)
  6914. {
  6915. struct dp_pdev *dp_pdev = (struct dp_pdev *)pdev;
  6916. dp_pdev->stats.tid_stats.osif_drop += val;
  6917. }
  6918. /*
  6919. * dp_config_debug_sniffer()- API to enable/disable debug sniffer
  6920. * @pdev_handle: DP_PDEV handle
  6921. * @val: user provided value
  6922. *
  6923. * Return: 0 for success. nonzero for failure.
  6924. */
  6925. static QDF_STATUS
  6926. dp_config_debug_sniffer(struct cdp_pdev *pdev_handle, int val)
  6927. {
  6928. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6929. QDF_STATUS status = QDF_STATUS_SUCCESS;
  6930. if (pdev->mcopy_mode)
  6931. dp_reset_monitor_mode(pdev_handle);
  6932. switch (val) {
  6933. case 0:
  6934. pdev->tx_sniffer_enable = 0;
  6935. pdev->mcopy_mode = 0;
  6936. pdev->monitor_configured = false;
  6937. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en &&
  6938. !pdev->bpr_enable) {
  6939. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  6940. dp_ppdu_ring_reset(pdev);
  6941. } else if (pdev->enhanced_stats_en && !pdev->bpr_enable) {
  6942. dp_h2t_cfg_stats_msg_send(pdev,
  6943. DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  6944. } else if (!pdev->enhanced_stats_en && pdev->bpr_enable) {
  6945. dp_h2t_cfg_stats_msg_send(pdev,
  6946. DP_PPDU_STATS_CFG_BPR_ENH,
  6947. pdev->pdev_id);
  6948. } else {
  6949. dp_h2t_cfg_stats_msg_send(pdev,
  6950. DP_PPDU_STATS_CFG_BPR,
  6951. pdev->pdev_id);
  6952. }
  6953. break;
  6954. case 1:
  6955. pdev->tx_sniffer_enable = 1;
  6956. pdev->mcopy_mode = 0;
  6957. pdev->monitor_configured = false;
  6958. if (!pdev->pktlog_ppdu_stats)
  6959. dp_h2t_cfg_stats_msg_send(pdev,
  6960. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  6961. break;
  6962. case 2:
  6963. if (pdev->monitor_vdev) {
  6964. status = QDF_STATUS_E_RESOURCES;
  6965. break;
  6966. }
  6967. pdev->mcopy_mode = 1;
  6968. dp_pdev_configure_monitor_rings(pdev);
  6969. pdev->monitor_configured = true;
  6970. pdev->tx_sniffer_enable = 0;
  6971. if (!pdev->pktlog_ppdu_stats)
  6972. dp_h2t_cfg_stats_msg_send(pdev,
  6973. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  6974. break;
  6975. default:
  6976. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6977. "Invalid value");
  6978. break;
  6979. }
  6980. return status;
  6981. }
  6982. /*
  6983. * dp_enable_enhanced_stats()- API to enable enhanced statistcs
  6984. * @pdev_handle: DP_PDEV handle
  6985. *
  6986. * Return: void
  6987. */
  6988. static void
  6989. dp_enable_enhanced_stats(struct cdp_pdev *pdev_handle)
  6990. {
  6991. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6992. if (pdev->enhanced_stats_en == 0)
  6993. dp_cal_client_timer_start(pdev->cal_client_ctx);
  6994. pdev->enhanced_stats_en = 1;
  6995. if (!pdev->mcopy_mode && !pdev->neighbour_peers_added &&
  6996. !pdev->monitor_vdev)
  6997. dp_ppdu_ring_cfg(pdev);
  6998. if (is_ppdu_txrx_capture_enabled(pdev) && !pdev->bpr_enable) {
  6999. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  7000. } else if (is_ppdu_txrx_capture_enabled(pdev) && pdev->bpr_enable) {
  7001. dp_h2t_cfg_stats_msg_send(pdev,
  7002. DP_PPDU_STATS_CFG_BPR_ENH,
  7003. pdev->pdev_id);
  7004. }
  7005. }
  7006. /*
  7007. * dp_disable_enhanced_stats()- API to disable enhanced statistcs
  7008. * @pdev_handle: DP_PDEV handle
  7009. *
  7010. * Return: void
  7011. */
  7012. static void
  7013. dp_disable_enhanced_stats(struct cdp_pdev *pdev_handle)
  7014. {
  7015. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7016. if (pdev->enhanced_stats_en == 1)
  7017. dp_cal_client_timer_stop(pdev->cal_client_ctx);
  7018. pdev->enhanced_stats_en = 0;
  7019. if (is_ppdu_txrx_capture_enabled(pdev) && !pdev->bpr_enable) {
  7020. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  7021. } else if (is_ppdu_txrx_capture_enabled(pdev) && pdev->bpr_enable) {
  7022. dp_h2t_cfg_stats_msg_send(pdev,
  7023. DP_PPDU_STATS_CFG_BPR,
  7024. pdev->pdev_id);
  7025. }
  7026. if (!pdev->mcopy_mode && !pdev->neighbour_peers_added &&
  7027. !pdev->monitor_vdev)
  7028. dp_ppdu_ring_reset(pdev);
  7029. }
  7030. /*
  7031. * dp_get_fw_peer_stats()- function to print peer stats
  7032. * @pdev_handle: DP_PDEV handle
  7033. * @mac_addr: mac address of the peer
  7034. * @cap: Type of htt stats requested
  7035. * @is_wait: if set, wait on completion from firmware response
  7036. *
  7037. * Currently Supporting only MAC ID based requests Only
  7038. * 1: HTT_PEER_STATS_REQ_MODE_NO_QUERY
  7039. * 2: HTT_PEER_STATS_REQ_MODE_QUERY_TQM
  7040. * 3: HTT_PEER_STATS_REQ_MODE_FLUSH_TQM
  7041. *
  7042. * Return: void
  7043. */
  7044. static void
  7045. dp_get_fw_peer_stats(struct cdp_pdev *pdev_handle, uint8_t *mac_addr,
  7046. uint32_t cap, uint32_t is_wait)
  7047. {
  7048. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7049. int i;
  7050. uint32_t config_param0 = 0;
  7051. uint32_t config_param1 = 0;
  7052. uint32_t config_param2 = 0;
  7053. uint32_t config_param3 = 0;
  7054. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(config_param0, 1);
  7055. config_param0 |= (1 << (cap + 1));
  7056. for (i = 0; i < HTT_PEER_STATS_MAX_TLV; i++) {
  7057. config_param1 |= (1 << i);
  7058. }
  7059. config_param2 |= (mac_addr[0] & 0x000000ff);
  7060. config_param2 |= ((mac_addr[1] << 8) & 0x0000ff00);
  7061. config_param2 |= ((mac_addr[2] << 16) & 0x00ff0000);
  7062. config_param2 |= ((mac_addr[3] << 24) & 0xff000000);
  7063. config_param3 |= (mac_addr[4] & 0x000000ff);
  7064. config_param3 |= ((mac_addr[5] << 8) & 0x0000ff00);
  7065. if (is_wait) {
  7066. qdf_event_reset(&pdev->fw_peer_stats_event);
  7067. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  7068. config_param0, config_param1,
  7069. config_param2, config_param3,
  7070. 0, 1, 0);
  7071. qdf_wait_single_event(&pdev->fw_peer_stats_event,
  7072. DP_FW_PEER_STATS_CMP_TIMEOUT_MSEC);
  7073. } else {
  7074. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  7075. config_param0, config_param1,
  7076. config_param2, config_param3,
  7077. 0, 0, 0);
  7078. }
  7079. }
  7080. /* This struct definition will be removed from here
  7081. * once it get added in FW headers*/
  7082. struct httstats_cmd_req {
  7083. uint32_t config_param0;
  7084. uint32_t config_param1;
  7085. uint32_t config_param2;
  7086. uint32_t config_param3;
  7087. int cookie;
  7088. u_int8_t stats_id;
  7089. };
  7090. /*
  7091. * dp_get_htt_stats: function to process the httstas request
  7092. * @pdev_handle: DP pdev handle
  7093. * @data: pointer to request data
  7094. * @data_len: length for request data
  7095. *
  7096. * return: void
  7097. */
  7098. static void
  7099. dp_get_htt_stats(struct cdp_pdev *pdev_handle, void *data, uint32_t data_len)
  7100. {
  7101. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7102. struct httstats_cmd_req *req = (struct httstats_cmd_req *)data;
  7103. QDF_ASSERT(data_len == sizeof(struct httstats_cmd_req));
  7104. dp_h2t_ext_stats_msg_send(pdev, req->stats_id,
  7105. req->config_param0, req->config_param1,
  7106. req->config_param2, req->config_param3,
  7107. req->cookie, 0, 0);
  7108. }
  7109. /*
  7110. * dp_set_pdev_param: function to set parameters in pdev
  7111. * @pdev_handle: DP pdev handle
  7112. * @param: parameter type to be set
  7113. * @val: value of parameter to be set
  7114. *
  7115. * Return: 0 for success. nonzero for failure.
  7116. */
  7117. static QDF_STATUS dp_set_pdev_param(struct cdp_pdev *pdev_handle,
  7118. enum cdp_pdev_param_type param,
  7119. uint8_t val)
  7120. {
  7121. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7122. switch (param) {
  7123. case CDP_CONFIG_DEBUG_SNIFFER:
  7124. return dp_config_debug_sniffer(pdev_handle, val);
  7125. case CDP_CONFIG_BPR_ENABLE:
  7126. return dp_set_bpr_enable(pdev_handle, val);
  7127. case CDP_CONFIG_PRIMARY_RADIO:
  7128. pdev->is_primary = val;
  7129. break;
  7130. case CDP_CONFIG_CAPTURE_LATENCY:
  7131. if (val == 1)
  7132. pdev->latency_capture_enable = true;
  7133. else
  7134. pdev->latency_capture_enable = false;
  7135. break;
  7136. case CDP_INGRESS_STATS:
  7137. dp_pdev_tid_stats_ingress_inc(pdev_handle, val);
  7138. break;
  7139. case CDP_OSIF_DROP:
  7140. dp_pdev_tid_stats_osif_drop(pdev_handle, val);
  7141. break;
  7142. default:
  7143. return QDF_STATUS_E_INVAL;
  7144. }
  7145. return QDF_STATUS_SUCCESS;
  7146. }
  7147. /*
  7148. * dp_calculate_delay_stats: function to get rx delay stats
  7149. * @vdev_handle: DP vdev handle
  7150. * @nbuf: skb
  7151. *
  7152. * Return: void
  7153. */
  7154. static void dp_calculate_delay_stats(struct cdp_vdev *vdev_handle,
  7155. qdf_nbuf_t nbuf)
  7156. {
  7157. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7158. dp_rx_compute_delay(vdev, nbuf);
  7159. }
  7160. /*
  7161. * dp_get_vdev_param: function to get parameters from vdev
  7162. * @param: parameter type to get value
  7163. *
  7164. * return: void
  7165. */
  7166. static uint32_t dp_get_vdev_param(struct cdp_vdev *vdev_handle,
  7167. enum cdp_vdev_param_type param)
  7168. {
  7169. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7170. uint32_t val;
  7171. switch (param) {
  7172. case CDP_ENABLE_WDS:
  7173. val = vdev->wds_enabled;
  7174. break;
  7175. case CDP_ENABLE_MEC:
  7176. val = vdev->mec_enabled;
  7177. break;
  7178. case CDP_ENABLE_DA_WAR:
  7179. val = vdev->pdev->soc->da_war_enabled;
  7180. break;
  7181. default:
  7182. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7183. "param value %d is wrong\n",
  7184. param);
  7185. val = -1;
  7186. break;
  7187. }
  7188. return val;
  7189. }
  7190. /*
  7191. * dp_set_vdev_param: function to set parameters in vdev
  7192. * @param: parameter type to be set
  7193. * @val: value of parameter to be set
  7194. *
  7195. * return: void
  7196. */
  7197. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  7198. enum cdp_vdev_param_type param, uint32_t val)
  7199. {
  7200. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7201. switch (param) {
  7202. case CDP_ENABLE_WDS:
  7203. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7204. "wds_enable %d for vdev(%p) id(%d)\n",
  7205. val, vdev, vdev->vdev_id);
  7206. vdev->wds_enabled = val;
  7207. break;
  7208. case CDP_ENABLE_MEC:
  7209. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7210. "mec_enable %d for vdev(%p) id(%d)\n",
  7211. val, vdev, vdev->vdev_id);
  7212. vdev->mec_enabled = val;
  7213. break;
  7214. case CDP_ENABLE_DA_WAR:
  7215. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7216. "da_war_enable %d for vdev(%p) id(%d)\n",
  7217. val, vdev, vdev->vdev_id);
  7218. vdev->pdev->soc->da_war_enabled = val;
  7219. dp_wds_flush_ast_table_wifi3(((struct cdp_soc_t *)
  7220. vdev->pdev->soc));
  7221. break;
  7222. case CDP_ENABLE_NAWDS:
  7223. vdev->nawds_enabled = val;
  7224. break;
  7225. case CDP_ENABLE_MCAST_EN:
  7226. vdev->mcast_enhancement_en = val;
  7227. break;
  7228. case CDP_ENABLE_PROXYSTA:
  7229. vdev->proxysta_vdev = val;
  7230. break;
  7231. case CDP_UPDATE_TDLS_FLAGS:
  7232. vdev->tdls_link_connected = val;
  7233. break;
  7234. case CDP_CFG_WDS_AGING_TIMER:
  7235. if (val == 0)
  7236. qdf_timer_stop(&vdev->pdev->soc->ast_aging_timer);
  7237. else if (val != vdev->wds_aging_timer_val)
  7238. qdf_timer_mod(&vdev->pdev->soc->ast_aging_timer, val);
  7239. vdev->wds_aging_timer_val = val;
  7240. break;
  7241. case CDP_ENABLE_AP_BRIDGE:
  7242. if (wlan_op_mode_sta != vdev->opmode)
  7243. vdev->ap_bridge_enabled = val;
  7244. else
  7245. vdev->ap_bridge_enabled = false;
  7246. break;
  7247. case CDP_ENABLE_CIPHER:
  7248. vdev->sec_type = val;
  7249. break;
  7250. case CDP_ENABLE_QWRAP_ISOLATION:
  7251. vdev->isolation_vdev = val;
  7252. break;
  7253. default:
  7254. break;
  7255. }
  7256. dp_tx_vdev_update_search_flags(vdev);
  7257. }
  7258. /**
  7259. * dp_peer_set_nawds: set nawds bit in peer
  7260. * @peer_handle: pointer to peer
  7261. * @value: enable/disable nawds
  7262. *
  7263. * return: void
  7264. */
  7265. static void dp_peer_set_nawds(struct cdp_peer *peer_handle, uint8_t value)
  7266. {
  7267. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  7268. peer->nawds_enabled = value;
  7269. }
  7270. /*
  7271. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  7272. * @vdev_handle: DP_VDEV handle
  7273. * @map_id:ID of map that needs to be updated
  7274. *
  7275. * Return: void
  7276. */
  7277. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  7278. uint8_t map_id)
  7279. {
  7280. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7281. vdev->dscp_tid_map_id = map_id;
  7282. return;
  7283. }
  7284. #ifdef DP_RATETABLE_SUPPORT
  7285. static int dp_txrx_get_ratekbps(int preamb, int mcs,
  7286. int htflag, int gintval)
  7287. {
  7288. uint32_t rix;
  7289. return dp_getrateindex((uint32_t)gintval, (uint16_t)mcs, 1,
  7290. (uint8_t)preamb, 1, &rix);
  7291. }
  7292. #else
  7293. static int dp_txrx_get_ratekbps(int preamb, int mcs,
  7294. int htflag, int gintval)
  7295. {
  7296. return 0;
  7297. }
  7298. #endif
  7299. /* dp_txrx_get_pdev_stats - Returns cdp_pdev_stats
  7300. * @peer_handle: DP pdev handle
  7301. *
  7302. * return : cdp_pdev_stats pointer
  7303. */
  7304. static struct cdp_pdev_stats*
  7305. dp_txrx_get_pdev_stats(struct cdp_pdev *pdev_handle)
  7306. {
  7307. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7308. dp_aggregate_pdev_stats(pdev);
  7309. return &pdev->stats;
  7310. }
  7311. /* dp_txrx_get_peer_stats - will return cdp_peer_stats
  7312. * @peer_handle: DP_PEER handle
  7313. *
  7314. * return : cdp_peer_stats pointer
  7315. */
  7316. static struct cdp_peer_stats*
  7317. dp_txrx_get_peer_stats(struct cdp_peer *peer_handle)
  7318. {
  7319. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  7320. qdf_assert(peer);
  7321. return &peer->stats;
  7322. }
  7323. /* dp_txrx_reset_peer_stats - reset cdp_peer_stats for particular peer
  7324. * @peer_handle: DP_PEER handle
  7325. *
  7326. * return : void
  7327. */
  7328. static void dp_txrx_reset_peer_stats(struct cdp_peer *peer_handle)
  7329. {
  7330. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  7331. qdf_assert(peer);
  7332. qdf_mem_zero(&peer->stats, sizeof(peer->stats));
  7333. }
  7334. /* dp_txrx_get_vdev_stats - Update buffer with cdp_vdev_stats
  7335. * @vdev_handle: DP_VDEV handle
  7336. * @buf: buffer for vdev stats
  7337. *
  7338. * return : int
  7339. */
  7340. static int dp_txrx_get_vdev_stats(struct cdp_vdev *vdev_handle, void *buf,
  7341. bool is_aggregate)
  7342. {
  7343. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7344. struct cdp_vdev_stats *vdev_stats;
  7345. struct dp_pdev *pdev;
  7346. struct dp_soc *soc;
  7347. if (!vdev)
  7348. return 1;
  7349. pdev = vdev->pdev;
  7350. if (!pdev)
  7351. return 1;
  7352. soc = pdev->soc;
  7353. vdev_stats = (struct cdp_vdev_stats *)buf;
  7354. if (is_aggregate) {
  7355. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  7356. dp_aggregate_vdev_stats(vdev, buf);
  7357. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  7358. } else {
  7359. qdf_mem_copy(vdev_stats, &vdev->stats, sizeof(vdev->stats));
  7360. }
  7361. return 0;
  7362. }
  7363. /*
  7364. * dp_get_total_per(): get total per
  7365. * @pdev_handle: DP_PDEV handle
  7366. *
  7367. * Return: % error rate using retries per packet and success packets
  7368. */
  7369. static int dp_get_total_per(struct cdp_pdev *pdev_handle)
  7370. {
  7371. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7372. dp_aggregate_pdev_stats(pdev);
  7373. if ((pdev->stats.tx.tx_success.num + pdev->stats.tx.retries) == 0)
  7374. return 0;
  7375. return ((pdev->stats.tx.retries * 100) /
  7376. ((pdev->stats.tx.tx_success.num) + (pdev->stats.tx.retries)));
  7377. }
  7378. /*
  7379. * dp_txrx_stats_publish(): publish pdev stats into a buffer
  7380. * @pdev_handle: DP_PDEV handle
  7381. * @buf: to hold pdev_stats
  7382. *
  7383. * Return: int
  7384. */
  7385. static int
  7386. dp_txrx_stats_publish(struct cdp_pdev *pdev_handle, void *buf)
  7387. {
  7388. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7389. struct cdp_pdev_stats *buffer = (struct cdp_pdev_stats *) buf;
  7390. struct cdp_txrx_stats_req req = {0,};
  7391. dp_aggregate_pdev_stats(pdev);
  7392. req.stats = (enum cdp_stats)HTT_DBG_EXT_STATS_PDEV_TX;
  7393. req.cookie_val = 1;
  7394. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  7395. req.param1, req.param2, req.param3, 0,
  7396. req.cookie_val, 0);
  7397. msleep(DP_MAX_SLEEP_TIME);
  7398. req.stats = (enum cdp_stats)HTT_DBG_EXT_STATS_PDEV_RX;
  7399. req.cookie_val = 1;
  7400. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  7401. req.param1, req.param2, req.param3, 0,
  7402. req.cookie_val, 0);
  7403. msleep(DP_MAX_SLEEP_TIME);
  7404. qdf_mem_copy(buffer, &pdev->stats, sizeof(pdev->stats));
  7405. return TXRX_STATS_LEVEL;
  7406. }
  7407. /**
  7408. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  7409. * @pdev: DP_PDEV handle
  7410. * @map_id: ID of map that needs to be updated
  7411. * @tos: index value in map
  7412. * @tid: tid value passed by the user
  7413. *
  7414. * Return: void
  7415. */
  7416. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  7417. uint8_t map_id, uint8_t tos, uint8_t tid)
  7418. {
  7419. uint8_t dscp;
  7420. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  7421. struct dp_soc *soc = pdev->soc;
  7422. if (!soc)
  7423. return;
  7424. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  7425. pdev->dscp_tid_map[map_id][dscp] = tid;
  7426. if (map_id < soc->num_hw_dscp_tid_map)
  7427. hal_tx_update_dscp_tid(soc->hal_soc, tid,
  7428. map_id, dscp);
  7429. return;
  7430. }
  7431. /**
  7432. * dp_hmmc_tid_override_en_wifi3(): Function to enable hmmc tid override.
  7433. * @pdev_handle: pdev handle
  7434. * @val: hmmc-dscp flag value
  7435. *
  7436. * Return: void
  7437. */
  7438. static void dp_hmmc_tid_override_en_wifi3(struct cdp_pdev *pdev_handle,
  7439. bool val)
  7440. {
  7441. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7442. pdev->hmmc_tid_override_en = val;
  7443. }
  7444. /**
  7445. * dp_set_hmmc_tid_val_wifi3(): Function to set hmmc tid value.
  7446. * @pdev_handle: pdev handle
  7447. * @tid: tid value
  7448. *
  7449. * Return: void
  7450. */
  7451. static void dp_set_hmmc_tid_val_wifi3(struct cdp_pdev *pdev_handle,
  7452. uint8_t tid)
  7453. {
  7454. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7455. pdev->hmmc_tid = tid;
  7456. }
  7457. /**
  7458. * dp_fw_stats_process(): Process TxRX FW stats request
  7459. * @vdev_handle: DP VDEV handle
  7460. * @req: stats request
  7461. *
  7462. * return: int
  7463. */
  7464. static int dp_fw_stats_process(struct cdp_vdev *vdev_handle,
  7465. struct cdp_txrx_stats_req *req)
  7466. {
  7467. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7468. struct dp_pdev *pdev = NULL;
  7469. uint32_t stats = req->stats;
  7470. uint8_t mac_id = req->mac_id;
  7471. if (!vdev) {
  7472. DP_TRACE(NONE, "VDEV not found");
  7473. return 1;
  7474. }
  7475. pdev = vdev->pdev;
  7476. /*
  7477. * For HTT_DBG_EXT_STATS_RESET command, FW need to config
  7478. * from param0 to param3 according to below rule:
  7479. *
  7480. * PARAM:
  7481. * - config_param0 : start_offset (stats type)
  7482. * - config_param1 : stats bmask from start offset
  7483. * - config_param2 : stats bmask from start offset + 32
  7484. * - config_param3 : stats bmask from start offset + 64
  7485. */
  7486. if (req->stats == CDP_TXRX_STATS_0) {
  7487. req->param0 = HTT_DBG_EXT_STATS_PDEV_TX;
  7488. req->param1 = 0xFFFFFFFF;
  7489. req->param2 = 0xFFFFFFFF;
  7490. req->param3 = 0xFFFFFFFF;
  7491. } else if (req->stats == (uint8_t)HTT_DBG_EXT_STATS_PDEV_TX_MU) {
  7492. req->param0 = HTT_DBG_EXT_STATS_SET_VDEV_MASK(vdev->vdev_id);
  7493. }
  7494. return dp_h2t_ext_stats_msg_send(pdev, stats, req->param0,
  7495. req->param1, req->param2, req->param3,
  7496. 0, 0, mac_id);
  7497. }
  7498. /**
  7499. * dp_txrx_stats_request - function to map to firmware and host stats
  7500. * @vdev: virtual handle
  7501. * @req: stats request
  7502. *
  7503. * Return: QDF_STATUS
  7504. */
  7505. static
  7506. QDF_STATUS dp_txrx_stats_request(struct cdp_vdev *vdev,
  7507. struct cdp_txrx_stats_req *req)
  7508. {
  7509. int host_stats;
  7510. int fw_stats;
  7511. enum cdp_stats stats;
  7512. int num_stats;
  7513. if (!vdev || !req) {
  7514. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7515. "Invalid vdev/req instance");
  7516. return QDF_STATUS_E_INVAL;
  7517. }
  7518. stats = req->stats;
  7519. if (stats >= CDP_TXRX_MAX_STATS)
  7520. return QDF_STATUS_E_INVAL;
  7521. /*
  7522. * DP_CURR_FW_STATS_AVAIL: no of FW stats currently available
  7523. * has to be updated if new FW HTT stats added
  7524. */
  7525. if (stats > CDP_TXRX_STATS_HTT_MAX)
  7526. stats = stats + DP_CURR_FW_STATS_AVAIL - DP_HTT_DBG_EXT_STATS_MAX;
  7527. num_stats = QDF_ARRAY_SIZE(dp_stats_mapping_table);
  7528. if (stats >= num_stats) {
  7529. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7530. "%s: Invalid stats option: %d", __func__, stats);
  7531. return QDF_STATUS_E_INVAL;
  7532. }
  7533. req->stats = stats;
  7534. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  7535. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  7536. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  7537. "stats: %u fw_stats_type: %d host_stats: %d",
  7538. stats, fw_stats, host_stats);
  7539. if (fw_stats != TXRX_FW_STATS_INVALID) {
  7540. /* update request with FW stats type */
  7541. req->stats = fw_stats;
  7542. return dp_fw_stats_process(vdev, req);
  7543. }
  7544. if ((host_stats != TXRX_HOST_STATS_INVALID) &&
  7545. (host_stats <= TXRX_HOST_STATS_MAX))
  7546. return dp_print_host_stats(vdev, req);
  7547. else
  7548. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  7549. "Wrong Input for TxRx Stats");
  7550. return QDF_STATUS_SUCCESS;
  7551. }
  7552. /*
  7553. * dp_print_napi_stats(): NAPI stats
  7554. * @soc - soc handle
  7555. */
  7556. static void dp_print_napi_stats(struct dp_soc *soc)
  7557. {
  7558. hif_print_napi_stats(soc->hif_handle);
  7559. }
  7560. /*
  7561. * dp_print_per_ring_stats(): Packet count per ring
  7562. * @soc - soc handle
  7563. */
  7564. static void dp_print_per_ring_stats(struct dp_soc *soc)
  7565. {
  7566. uint8_t ring;
  7567. uint16_t core;
  7568. uint64_t total_packets;
  7569. DP_TRACE_STATS(INFO_HIGH, "Reo packets per ring:");
  7570. for (ring = 0; ring < MAX_REO_DEST_RINGS; ring++) {
  7571. total_packets = 0;
  7572. DP_TRACE_STATS(INFO_HIGH,
  7573. "Packets on ring %u:", ring);
  7574. for (core = 0; core < NR_CPUS; core++) {
  7575. DP_TRACE_STATS(INFO_HIGH,
  7576. "Packets arriving on core %u: %llu",
  7577. core,
  7578. soc->stats.rx.ring_packets[core][ring]);
  7579. total_packets += soc->stats.rx.ring_packets[core][ring];
  7580. }
  7581. DP_TRACE_STATS(INFO_HIGH,
  7582. "Total packets on ring %u: %llu",
  7583. ring, total_packets);
  7584. }
  7585. }
  7586. /*
  7587. * dp_txrx_path_stats() - Function to display dump stats
  7588. * @soc - soc handle
  7589. *
  7590. * return: none
  7591. */
  7592. static void dp_txrx_path_stats(struct dp_soc *soc)
  7593. {
  7594. uint8_t error_code;
  7595. uint8_t loop_pdev;
  7596. struct dp_pdev *pdev;
  7597. uint8_t i;
  7598. if (!soc) {
  7599. DP_TRACE(ERROR, "%s: Invalid access",
  7600. __func__);
  7601. return;
  7602. }
  7603. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  7604. pdev = soc->pdev_list[loop_pdev];
  7605. dp_aggregate_pdev_stats(pdev);
  7606. DP_TRACE_STATS(INFO_HIGH, "Tx path Statistics:");
  7607. DP_TRACE_STATS(INFO_HIGH, "from stack: %u msdus (%llu bytes)",
  7608. pdev->stats.tx_i.rcvd.num,
  7609. pdev->stats.tx_i.rcvd.bytes);
  7610. DP_TRACE_STATS(INFO_HIGH,
  7611. "processed from host: %u msdus (%llu bytes)",
  7612. pdev->stats.tx_i.processed.num,
  7613. pdev->stats.tx_i.processed.bytes);
  7614. DP_TRACE_STATS(INFO_HIGH,
  7615. "successfully transmitted: %u msdus (%llu bytes)",
  7616. pdev->stats.tx.tx_success.num,
  7617. pdev->stats.tx.tx_success.bytes);
  7618. DP_TRACE_STATS(INFO_HIGH, "Dropped in host:");
  7619. DP_TRACE_STATS(INFO_HIGH, "Total packets dropped: %u,",
  7620. pdev->stats.tx_i.dropped.dropped_pkt.num);
  7621. DP_TRACE_STATS(INFO_HIGH, "Descriptor not available: %u",
  7622. pdev->stats.tx_i.dropped.desc_na.num);
  7623. DP_TRACE_STATS(INFO_HIGH, "Ring full: %u",
  7624. pdev->stats.tx_i.dropped.ring_full);
  7625. DP_TRACE_STATS(INFO_HIGH, "Enqueue fail: %u",
  7626. pdev->stats.tx_i.dropped.enqueue_fail);
  7627. DP_TRACE_STATS(INFO_HIGH, "DMA Error: %u",
  7628. pdev->stats.tx_i.dropped.dma_error);
  7629. DP_TRACE_STATS(INFO_HIGH, "Dropped in hardware:");
  7630. DP_TRACE_STATS(INFO_HIGH, "total packets dropped: %u",
  7631. pdev->stats.tx.tx_failed);
  7632. DP_TRACE_STATS(INFO_HIGH, "mpdu age out: %u",
  7633. pdev->stats.tx.dropped.age_out);
  7634. DP_TRACE_STATS(INFO_HIGH, "firmware removed packets: %u",
  7635. pdev->stats.tx.dropped.fw_rem.num);
  7636. DP_TRACE_STATS(INFO_HIGH, "firmware removed bytes: %llu",
  7637. pdev->stats.tx.dropped.fw_rem.bytes);
  7638. DP_TRACE_STATS(INFO_HIGH, "firmware removed tx: %u",
  7639. pdev->stats.tx.dropped.fw_rem_tx);
  7640. DP_TRACE_STATS(INFO_HIGH, "firmware removed notx %u",
  7641. pdev->stats.tx.dropped.fw_rem_notx);
  7642. DP_TRACE_STATS(INFO_HIGH, "Invalid peer on tx path: %u",
  7643. pdev->soc->stats.tx.tx_invalid_peer.num);
  7644. DP_TRACE_STATS(INFO_HIGH, "Tx packets sent per interrupt:");
  7645. DP_TRACE_STATS(INFO_HIGH, "Single Packet: %u",
  7646. pdev->stats.tx_comp_histogram.pkts_1);
  7647. DP_TRACE_STATS(INFO_HIGH, "2-20 Packets: %u",
  7648. pdev->stats.tx_comp_histogram.pkts_2_20);
  7649. DP_TRACE_STATS(INFO_HIGH, "21-40 Packets: %u",
  7650. pdev->stats.tx_comp_histogram.pkts_21_40);
  7651. DP_TRACE_STATS(INFO_HIGH, "41-60 Packets: %u",
  7652. pdev->stats.tx_comp_histogram.pkts_41_60);
  7653. DP_TRACE_STATS(INFO_HIGH, "61-80 Packets: %u",
  7654. pdev->stats.tx_comp_histogram.pkts_61_80);
  7655. DP_TRACE_STATS(INFO_HIGH, "81-100 Packets: %u",
  7656. pdev->stats.tx_comp_histogram.pkts_81_100);
  7657. DP_TRACE_STATS(INFO_HIGH, "101-200 Packets: %u",
  7658. pdev->stats.tx_comp_histogram.pkts_101_200);
  7659. DP_TRACE_STATS(INFO_HIGH, " 201+ Packets: %u",
  7660. pdev->stats.tx_comp_histogram.pkts_201_plus);
  7661. DP_TRACE_STATS(INFO_HIGH, "Rx path statistics");
  7662. DP_TRACE_STATS(INFO_HIGH,
  7663. "delivered %u msdus ( %llu bytes),",
  7664. pdev->stats.rx.to_stack.num,
  7665. pdev->stats.rx.to_stack.bytes);
  7666. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  7667. DP_TRACE_STATS(INFO_HIGH,
  7668. "received on reo[%d] %u msdus( %llu bytes),",
  7669. i, pdev->stats.rx.rcvd_reo[i].num,
  7670. pdev->stats.rx.rcvd_reo[i].bytes);
  7671. DP_TRACE_STATS(INFO_HIGH,
  7672. "intra-bss packets %u msdus ( %llu bytes),",
  7673. pdev->stats.rx.intra_bss.pkts.num,
  7674. pdev->stats.rx.intra_bss.pkts.bytes);
  7675. DP_TRACE_STATS(INFO_HIGH,
  7676. "intra-bss fails %u msdus ( %llu bytes),",
  7677. pdev->stats.rx.intra_bss.fail.num,
  7678. pdev->stats.rx.intra_bss.fail.bytes);
  7679. DP_TRACE_STATS(INFO_HIGH,
  7680. "raw packets %u msdus ( %llu bytes),",
  7681. pdev->stats.rx.raw.num,
  7682. pdev->stats.rx.raw.bytes);
  7683. DP_TRACE_STATS(INFO_HIGH, "dropped: error %u msdus",
  7684. pdev->stats.rx.err.mic_err);
  7685. DP_TRACE_STATS(INFO_HIGH, "Invalid peer on rx path: %u",
  7686. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  7687. DP_TRACE_STATS(INFO_HIGH, "sw_peer_id invalid %u",
  7688. pdev->soc->stats.rx.err.rx_invalid_peer_id.num);
  7689. DP_TRACE_STATS(INFO_HIGH, "Reo Statistics");
  7690. DP_TRACE_STATS(INFO_HIGH, "rbm error: %u msdus",
  7691. pdev->soc->stats.rx.err.invalid_rbm);
  7692. DP_TRACE_STATS(INFO_HIGH, "hal ring access fail: %u msdus",
  7693. pdev->soc->stats.rx.err.hal_ring_access_fail);
  7694. for (error_code = 0; error_code < HAL_REO_ERR_MAX;
  7695. error_code++) {
  7696. if (!pdev->soc->stats.rx.err.reo_error[error_code])
  7697. continue;
  7698. DP_TRACE_STATS(INFO_HIGH,
  7699. "Reo error number (%u): %u msdus",
  7700. error_code,
  7701. pdev->soc->stats.rx.err
  7702. .reo_error[error_code]);
  7703. }
  7704. for (error_code = 0; error_code < HAL_RXDMA_ERR_MAX;
  7705. error_code++) {
  7706. if (!pdev->soc->stats.rx.err.rxdma_error[error_code])
  7707. continue;
  7708. DP_TRACE_STATS(INFO_HIGH,
  7709. "Rxdma error number (%u): %u msdus",
  7710. error_code,
  7711. pdev->soc->stats.rx.err
  7712. .rxdma_error[error_code]);
  7713. }
  7714. DP_TRACE_STATS(INFO_HIGH, "Rx packets reaped per interrupt:");
  7715. DP_TRACE_STATS(INFO_HIGH, "Single Packet: %u",
  7716. pdev->stats.rx_ind_histogram.pkts_1);
  7717. DP_TRACE_STATS(INFO_HIGH, "2-20 Packets: %u",
  7718. pdev->stats.rx_ind_histogram.pkts_2_20);
  7719. DP_TRACE_STATS(INFO_HIGH, "21-40 Packets: %u",
  7720. pdev->stats.rx_ind_histogram.pkts_21_40);
  7721. DP_TRACE_STATS(INFO_HIGH, "41-60 Packets: %u",
  7722. pdev->stats.rx_ind_histogram.pkts_41_60);
  7723. DP_TRACE_STATS(INFO_HIGH, "61-80 Packets: %u",
  7724. pdev->stats.rx_ind_histogram.pkts_61_80);
  7725. DP_TRACE_STATS(INFO_HIGH, "81-100 Packets: %u",
  7726. pdev->stats.rx_ind_histogram.pkts_81_100);
  7727. DP_TRACE_STATS(INFO_HIGH, "101-200 Packets: %u",
  7728. pdev->stats.rx_ind_histogram.pkts_101_200);
  7729. DP_TRACE_STATS(INFO_HIGH, " 201+ Packets: %u",
  7730. pdev->stats.rx_ind_histogram.pkts_201_plus);
  7731. DP_TRACE_STATS(INFO_HIGH, "%s: tso_enable: %u lro_enable: %u rx_hash: %u napi_enable: %u",
  7732. __func__,
  7733. pdev->soc->wlan_cfg_ctx
  7734. ->tso_enabled,
  7735. pdev->soc->wlan_cfg_ctx
  7736. ->lro_enabled,
  7737. pdev->soc->wlan_cfg_ctx
  7738. ->rx_hash,
  7739. pdev->soc->wlan_cfg_ctx
  7740. ->napi_enabled);
  7741. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  7742. DP_TRACE_STATS(INFO_HIGH, "%s: Tx flow stop queue: %u tx flow start queue offset: %u",
  7743. __func__,
  7744. pdev->soc->wlan_cfg_ctx
  7745. ->tx_flow_stop_queue_threshold,
  7746. pdev->soc->wlan_cfg_ctx
  7747. ->tx_flow_start_queue_offset);
  7748. #endif
  7749. }
  7750. }
  7751. /*
  7752. * dp_txrx_dump_stats() - Dump statistics
  7753. * @value - Statistics option
  7754. */
  7755. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value,
  7756. enum qdf_stats_verbosity_level level)
  7757. {
  7758. struct dp_soc *soc =
  7759. (struct dp_soc *)psoc;
  7760. QDF_STATUS status = QDF_STATUS_SUCCESS;
  7761. if (!soc) {
  7762. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7763. "%s: soc is NULL", __func__);
  7764. return QDF_STATUS_E_INVAL;
  7765. }
  7766. switch (value) {
  7767. case CDP_TXRX_PATH_STATS:
  7768. dp_txrx_path_stats(soc);
  7769. break;
  7770. case CDP_RX_RING_STATS:
  7771. dp_print_per_ring_stats(soc);
  7772. break;
  7773. case CDP_TXRX_TSO_STATS:
  7774. /* TODO: NOT IMPLEMENTED */
  7775. break;
  7776. case CDP_DUMP_TX_FLOW_POOL_INFO:
  7777. cdp_dump_flow_pool_info((struct cdp_soc_t *)soc);
  7778. break;
  7779. case CDP_DP_NAPI_STATS:
  7780. dp_print_napi_stats(soc);
  7781. break;
  7782. case CDP_TXRX_DESC_STATS:
  7783. /* TODO: NOT IMPLEMENTED */
  7784. break;
  7785. default:
  7786. status = QDF_STATUS_E_INVAL;
  7787. break;
  7788. }
  7789. return status;
  7790. }
  7791. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  7792. /**
  7793. * dp_update_flow_control_parameters() - API to store datapath
  7794. * config parameters
  7795. * @soc: soc handle
  7796. * @cfg: ini parameter handle
  7797. *
  7798. * Return: void
  7799. */
  7800. static inline
  7801. void dp_update_flow_control_parameters(struct dp_soc *soc,
  7802. struct cdp_config_params *params)
  7803. {
  7804. soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold =
  7805. params->tx_flow_stop_queue_threshold;
  7806. soc->wlan_cfg_ctx->tx_flow_start_queue_offset =
  7807. params->tx_flow_start_queue_offset;
  7808. }
  7809. #else
  7810. static inline
  7811. void dp_update_flow_control_parameters(struct dp_soc *soc,
  7812. struct cdp_config_params *params)
  7813. {
  7814. }
  7815. #endif
  7816. /**
  7817. * dp_update_config_parameters() - API to store datapath
  7818. * config parameters
  7819. * @soc: soc handle
  7820. * @cfg: ini parameter handle
  7821. *
  7822. * Return: status
  7823. */
  7824. static
  7825. QDF_STATUS dp_update_config_parameters(struct cdp_soc *psoc,
  7826. struct cdp_config_params *params)
  7827. {
  7828. struct dp_soc *soc = (struct dp_soc *)psoc;
  7829. if (!(soc)) {
  7830. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7831. "%s: Invalid handle", __func__);
  7832. return QDF_STATUS_E_INVAL;
  7833. }
  7834. soc->wlan_cfg_ctx->tso_enabled = params->tso_enable;
  7835. soc->wlan_cfg_ctx->lro_enabled = params->lro_enable;
  7836. soc->wlan_cfg_ctx->rx_hash = params->flow_steering_enable;
  7837. soc->wlan_cfg_ctx->tcp_udp_checksumoffload =
  7838. params->tcp_udp_checksumoffload;
  7839. soc->wlan_cfg_ctx->napi_enabled = params->napi_enable;
  7840. soc->wlan_cfg_ctx->ipa_enabled = params->ipa_enable;
  7841. soc->wlan_cfg_ctx->gro_enabled = params->gro_enable;
  7842. dp_update_flow_control_parameters(soc, params);
  7843. return QDF_STATUS_SUCCESS;
  7844. }
  7845. /**
  7846. * dp_txrx_set_wds_rx_policy() - API to store datapath
  7847. * config parameters
  7848. * @vdev_handle - datapath vdev handle
  7849. * @cfg: ini parameter handle
  7850. *
  7851. * Return: status
  7852. */
  7853. #ifdef WDS_VENDOR_EXTENSION
  7854. void
  7855. dp_txrx_set_wds_rx_policy(
  7856. struct cdp_vdev *vdev_handle,
  7857. u_int32_t val)
  7858. {
  7859. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7860. struct dp_peer *peer;
  7861. if (vdev->opmode == wlan_op_mode_ap) {
  7862. /* for ap, set it on bss_peer */
  7863. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  7864. if (peer->bss_peer) {
  7865. peer->wds_ecm.wds_rx_filter = 1;
  7866. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  7867. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  7868. break;
  7869. }
  7870. }
  7871. } else if (vdev->opmode == wlan_op_mode_sta) {
  7872. peer = TAILQ_FIRST(&vdev->peer_list);
  7873. peer->wds_ecm.wds_rx_filter = 1;
  7874. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  7875. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  7876. }
  7877. }
  7878. /**
  7879. * dp_txrx_peer_wds_tx_policy_update() - API to set tx wds policy
  7880. *
  7881. * @peer_handle - datapath peer handle
  7882. * @wds_tx_ucast: policy for unicast transmission
  7883. * @wds_tx_mcast: policy for multicast transmission
  7884. *
  7885. * Return: void
  7886. */
  7887. void
  7888. dp_txrx_peer_wds_tx_policy_update(struct cdp_peer *peer_handle,
  7889. int wds_tx_ucast, int wds_tx_mcast)
  7890. {
  7891. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  7892. if (wds_tx_ucast || wds_tx_mcast) {
  7893. peer->wds_enabled = 1;
  7894. peer->wds_ecm.wds_tx_ucast_4addr = wds_tx_ucast;
  7895. peer->wds_ecm.wds_tx_mcast_4addr = wds_tx_mcast;
  7896. } else {
  7897. peer->wds_enabled = 0;
  7898. peer->wds_ecm.wds_tx_ucast_4addr = 0;
  7899. peer->wds_ecm.wds_tx_mcast_4addr = 0;
  7900. }
  7901. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  7902. FL("Policy Update set to :\
  7903. peer->wds_enabled %d\
  7904. peer->wds_ecm.wds_tx_ucast_4addr %d\
  7905. peer->wds_ecm.wds_tx_mcast_4addr %d"),
  7906. peer->wds_enabled, peer->wds_ecm.wds_tx_ucast_4addr,
  7907. peer->wds_ecm.wds_tx_mcast_4addr);
  7908. return;
  7909. }
  7910. #endif
  7911. static struct cdp_wds_ops dp_ops_wds = {
  7912. .vdev_set_wds = dp_vdev_set_wds,
  7913. #ifdef WDS_VENDOR_EXTENSION
  7914. .txrx_set_wds_rx_policy = dp_txrx_set_wds_rx_policy,
  7915. .txrx_wds_peer_tx_policy_update = dp_txrx_peer_wds_tx_policy_update,
  7916. #endif
  7917. };
  7918. /*
  7919. * dp_txrx_data_tx_cb_set(): set the callback for non standard tx
  7920. * @vdev_handle - datapath vdev handle
  7921. * @callback - callback function
  7922. * @ctxt: callback context
  7923. *
  7924. */
  7925. static void
  7926. dp_txrx_data_tx_cb_set(struct cdp_vdev *vdev_handle,
  7927. ol_txrx_data_tx_cb callback, void *ctxt)
  7928. {
  7929. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7930. vdev->tx_non_std_data_callback.func = callback;
  7931. vdev->tx_non_std_data_callback.ctxt = ctxt;
  7932. }
  7933. /**
  7934. * dp_pdev_get_dp_txrx_handle() - get dp handle from pdev
  7935. * @pdev_hdl: datapath pdev handle
  7936. *
  7937. * Return: opaque pointer to dp txrx handle
  7938. */
  7939. static void *dp_pdev_get_dp_txrx_handle(struct cdp_pdev *pdev_hdl)
  7940. {
  7941. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  7942. return pdev->dp_txrx_handle;
  7943. }
  7944. /**
  7945. * dp_pdev_set_dp_txrx_handle() - set dp handle in pdev
  7946. * @pdev_hdl: datapath pdev handle
  7947. * @dp_txrx_hdl: opaque pointer for dp_txrx_handle
  7948. *
  7949. * Return: void
  7950. */
  7951. static void
  7952. dp_pdev_set_dp_txrx_handle(struct cdp_pdev *pdev_hdl, void *dp_txrx_hdl)
  7953. {
  7954. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  7955. pdev->dp_txrx_handle = dp_txrx_hdl;
  7956. }
  7957. /**
  7958. * dp_soc_get_dp_txrx_handle() - get context for external-dp from dp soc
  7959. * @soc_handle: datapath soc handle
  7960. *
  7961. * Return: opaque pointer to external dp (non-core DP)
  7962. */
  7963. static void *dp_soc_get_dp_txrx_handle(struct cdp_soc *soc_handle)
  7964. {
  7965. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  7966. return soc->external_txrx_handle;
  7967. }
  7968. /**
  7969. * dp_soc_set_dp_txrx_handle() - set external dp handle in soc
  7970. * @soc_handle: datapath soc handle
  7971. * @txrx_handle: opaque pointer to external dp (non-core DP)
  7972. *
  7973. * Return: void
  7974. */
  7975. static void
  7976. dp_soc_set_dp_txrx_handle(struct cdp_soc *soc_handle, void *txrx_handle)
  7977. {
  7978. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  7979. soc->external_txrx_handle = txrx_handle;
  7980. }
  7981. /**
  7982. * dp_get_cfg_capabilities() - get dp capabilities
  7983. * @soc_handle: datapath soc handle
  7984. * @dp_caps: enum for dp capabilities
  7985. *
  7986. * Return: bool to determine if dp caps is enabled
  7987. */
  7988. static bool
  7989. dp_get_cfg_capabilities(struct cdp_soc_t *soc_handle,
  7990. enum cdp_capabilities dp_caps)
  7991. {
  7992. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  7993. return wlan_cfg_get_dp_caps(soc->wlan_cfg_ctx, dp_caps);
  7994. }
  7995. #ifdef FEATURE_AST
  7996. static void dp_peer_teardown_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  7997. {
  7998. struct dp_vdev *vdev = (struct dp_vdev *) vdev_hdl;
  7999. struct dp_peer *peer = (struct dp_peer *) peer_hdl;
  8000. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  8001. /*
  8002. * For BSS peer, new peer is not created on alloc_node if the
  8003. * peer with same address already exists , instead refcnt is
  8004. * increased for existing peer. Correspondingly in delete path,
  8005. * only refcnt is decreased; and peer is only deleted , when all
  8006. * references are deleted. So delete_in_progress should not be set
  8007. * for bss_peer, unless only 2 reference remains (peer map reference
  8008. * and peer hash table reference).
  8009. */
  8010. if (peer->bss_peer && (qdf_atomic_read(&peer->ref_cnt) > 2)) {
  8011. return;
  8012. }
  8013. qdf_spin_lock_bh(&soc->ast_lock);
  8014. peer->delete_in_progress = true;
  8015. dp_peer_delete_ast_entries(soc, peer);
  8016. qdf_spin_unlock_bh(&soc->ast_lock);
  8017. }
  8018. #endif
  8019. #ifdef ATH_SUPPORT_NAC_RSSI
  8020. /**
  8021. * dp_vdev_get_neighbour_rssi(): Store RSSI for configured NAC
  8022. * @vdev_hdl: DP vdev handle
  8023. * @rssi: rssi value
  8024. *
  8025. * Return: 0 for success. nonzero for failure.
  8026. */
  8027. static QDF_STATUS dp_vdev_get_neighbour_rssi(struct cdp_vdev *vdev_hdl,
  8028. char *mac_addr,
  8029. uint8_t *rssi)
  8030. {
  8031. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  8032. struct dp_pdev *pdev = vdev->pdev;
  8033. struct dp_neighbour_peer *peer = NULL;
  8034. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  8035. *rssi = 0;
  8036. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  8037. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  8038. neighbour_peer_list_elem) {
  8039. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  8040. mac_addr, DP_MAC_ADDR_LEN) == 0) {
  8041. *rssi = peer->rssi;
  8042. status = QDF_STATUS_SUCCESS;
  8043. break;
  8044. }
  8045. }
  8046. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  8047. return status;
  8048. }
  8049. static QDF_STATUS dp_config_for_nac_rssi(struct cdp_vdev *vdev_handle,
  8050. enum cdp_nac_param_cmd cmd, char *bssid, char *client_macaddr,
  8051. uint8_t chan_num)
  8052. {
  8053. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  8054. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  8055. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  8056. pdev->nac_rssi_filtering = 1;
  8057. /* Store address of NAC (neighbour peer) which will be checked
  8058. * against TA of received packets.
  8059. */
  8060. if (cmd == CDP_NAC_PARAM_ADD) {
  8061. dp_update_filter_neighbour_peers(vdev_handle, DP_NAC_PARAM_ADD,
  8062. client_macaddr);
  8063. } else if (cmd == CDP_NAC_PARAM_DEL) {
  8064. dp_update_filter_neighbour_peers(vdev_handle,
  8065. DP_NAC_PARAM_DEL,
  8066. client_macaddr);
  8067. }
  8068. if (soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi)
  8069. soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi
  8070. ((void *)vdev->pdev->ctrl_pdev,
  8071. vdev->vdev_id, cmd, bssid);
  8072. return QDF_STATUS_SUCCESS;
  8073. }
  8074. #endif
  8075. /**
  8076. * dp_enable_peer_based_pktlog() - Set Flag for peer based filtering
  8077. * for pktlog
  8078. * @txrx_pdev_handle: cdp_pdev handle
  8079. * @enb_dsb: Enable or disable peer based filtering
  8080. *
  8081. * Return: QDF_STATUS
  8082. */
  8083. static int
  8084. dp_enable_peer_based_pktlog(
  8085. struct cdp_pdev *txrx_pdev_handle,
  8086. char *mac_addr, uint8_t enb_dsb)
  8087. {
  8088. struct dp_peer *peer;
  8089. uint8_t local_id;
  8090. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev_handle;
  8091. peer = (struct dp_peer *)dp_find_peer_by_addr(txrx_pdev_handle,
  8092. mac_addr, &local_id);
  8093. if (!peer) {
  8094. dp_err("Invalid Peer");
  8095. return QDF_STATUS_E_FAILURE;
  8096. }
  8097. peer->peer_based_pktlog_filter = enb_dsb;
  8098. pdev->dp_peer_based_pktlog = enb_dsb;
  8099. return QDF_STATUS_SUCCESS;
  8100. }
  8101. static QDF_STATUS dp_peer_map_attach_wifi3(struct cdp_soc_t *soc_hdl,
  8102. uint32_t max_peers,
  8103. uint32_t max_ast_index,
  8104. bool peer_map_unmap_v2)
  8105. {
  8106. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  8107. soc->max_peers = max_peers;
  8108. qdf_print ("%s max_peers %u, max_ast_index: %u\n",
  8109. __func__, max_peers, max_ast_index);
  8110. wlan_cfg_set_max_ast_idx(soc->wlan_cfg_ctx, max_ast_index);
  8111. if (dp_peer_find_attach(soc))
  8112. return QDF_STATUS_E_FAILURE;
  8113. soc->is_peer_map_unmap_v2 = peer_map_unmap_v2;
  8114. return QDF_STATUS_SUCCESS;
  8115. }
  8116. /**
  8117. * dp_pdev_set_ctrl_pdev() - set ctrl pdev handle in dp pdev
  8118. * @dp_pdev: dp pdev handle
  8119. * @ctrl_pdev: UMAC ctrl pdev handle
  8120. *
  8121. * Return: void
  8122. */
  8123. static void dp_pdev_set_ctrl_pdev(struct cdp_pdev *dp_pdev,
  8124. struct cdp_ctrl_objmgr_pdev *ctrl_pdev)
  8125. {
  8126. struct dp_pdev *pdev = (struct dp_pdev *)dp_pdev;
  8127. pdev->ctrl_pdev = ctrl_pdev;
  8128. }
  8129. /*
  8130. * dp_get_cfg() - get dp cfg
  8131. * @soc: cdp soc handle
  8132. * @cfg: cfg enum
  8133. *
  8134. * Return: cfg value
  8135. */
  8136. static uint32_t dp_get_cfg(void *soc, enum cdp_dp_cfg cfg)
  8137. {
  8138. struct dp_soc *dpsoc = (struct dp_soc *)soc;
  8139. uint32_t value = 0;
  8140. switch (cfg) {
  8141. case cfg_dp_enable_data_stall:
  8142. value = dpsoc->wlan_cfg_ctx->enable_data_stall_detection;
  8143. break;
  8144. case cfg_dp_enable_ip_tcp_udp_checksum_offload:
  8145. value = dpsoc->wlan_cfg_ctx->tcp_udp_checksumoffload;
  8146. break;
  8147. case cfg_dp_tso_enable:
  8148. value = dpsoc->wlan_cfg_ctx->tso_enabled;
  8149. break;
  8150. case cfg_dp_lro_enable:
  8151. value = dpsoc->wlan_cfg_ctx->lro_enabled;
  8152. break;
  8153. case cfg_dp_gro_enable:
  8154. value = dpsoc->wlan_cfg_ctx->gro_enabled;
  8155. break;
  8156. case cfg_dp_tx_flow_start_queue_offset:
  8157. value = dpsoc->wlan_cfg_ctx->tx_flow_start_queue_offset;
  8158. break;
  8159. case cfg_dp_tx_flow_stop_queue_threshold:
  8160. value = dpsoc->wlan_cfg_ctx->tx_flow_stop_queue_threshold;
  8161. break;
  8162. case cfg_dp_disable_intra_bss_fwd:
  8163. value = dpsoc->wlan_cfg_ctx->disable_intra_bss_fwd;
  8164. break;
  8165. default:
  8166. value = 0;
  8167. }
  8168. return value;
  8169. }
  8170. #ifdef CONFIG_WIN
  8171. /**
  8172. * dp_tx_flow_ctrl_configure_pdev() - Configure flow control params
  8173. * @pdev_hdl: datapath pdev handle
  8174. * @param: ol ath params
  8175. * @value: value of the flag
  8176. * @buff: Buffer to be passed
  8177. *
  8178. * Implemented this function same as legacy function. In legacy code, single
  8179. * function is used to display stats and update pdev params.
  8180. *
  8181. * Return: 0 for success. nonzero for failure.
  8182. */
  8183. static uint32_t dp_tx_flow_ctrl_configure_pdev(void *pdev_handle,
  8184. enum _ol_ath_param_t param,
  8185. uint32_t value, void *buff)
  8186. {
  8187. struct dp_soc *soc = NULL;
  8188. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  8189. if (qdf_unlikely(!pdev))
  8190. return 1;
  8191. soc = pdev->soc;
  8192. if (!soc)
  8193. return 1;
  8194. switch (param) {
  8195. case OL_ATH_PARAM_VIDEO_DELAY_STATS_FC:
  8196. if (value)
  8197. pdev->delay_stats_flag = true;
  8198. else
  8199. pdev->delay_stats_flag = false;
  8200. break;
  8201. case OL_ATH_PARAM_VIDEO_STATS_FC:
  8202. qdf_print("------- TID Stats ------\n");
  8203. dp_pdev_print_tid_stats(pdev);
  8204. qdf_print("------ Delay Stats ------\n");
  8205. dp_pdev_print_delay_stats(pdev);
  8206. break;
  8207. case OL_ATH_PARAM_TOTAL_Q_SIZE:
  8208. {
  8209. uint32_t tx_min, tx_max;
  8210. tx_min = wlan_cfg_get_min_tx_desc(soc->wlan_cfg_ctx);
  8211. tx_max = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  8212. if (!buff) {
  8213. if ((value >= tx_min) && (value <= tx_max)) {
  8214. pdev->num_tx_allowed = value;
  8215. } else {
  8216. QDF_TRACE(QDF_MODULE_ID_DP,
  8217. QDF_TRACE_LEVEL_INFO,
  8218. "Failed to update num_tx_allowed, Q_min = %d Q_max = %d",
  8219. tx_min, tx_max);
  8220. break;
  8221. }
  8222. } else {
  8223. *(int *)buff = pdev->num_tx_allowed;
  8224. }
  8225. }
  8226. break;
  8227. default:
  8228. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  8229. "%s: not handled param %d ", __func__, param);
  8230. break;
  8231. }
  8232. return 0;
  8233. }
  8234. #endif
  8235. static struct cdp_cmn_ops dp_ops_cmn = {
  8236. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  8237. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  8238. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  8239. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  8240. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  8241. .txrx_pdev_deinit = dp_pdev_deinit_wifi3,
  8242. .txrx_peer_create = dp_peer_create_wifi3,
  8243. .txrx_peer_setup = dp_peer_setup_wifi3,
  8244. #ifdef FEATURE_AST
  8245. .txrx_peer_teardown = dp_peer_teardown_wifi3,
  8246. #else
  8247. .txrx_peer_teardown = NULL,
  8248. #endif
  8249. .txrx_peer_add_ast = dp_peer_add_ast_wifi3,
  8250. .txrx_peer_update_ast = dp_peer_update_ast_wifi3,
  8251. .txrx_peer_get_ast_info_by_soc = dp_peer_get_ast_info_by_soc_wifi3,
  8252. .txrx_peer_get_ast_info_by_pdev =
  8253. dp_peer_get_ast_info_by_pdevid_wifi3,
  8254. .txrx_peer_ast_delete_by_soc =
  8255. dp_peer_ast_entry_del_by_soc,
  8256. .txrx_peer_ast_delete_by_pdev =
  8257. dp_peer_ast_entry_del_by_pdev,
  8258. .txrx_peer_delete = dp_peer_delete_wifi3,
  8259. .txrx_vdev_register = dp_vdev_register_wifi3,
  8260. .txrx_vdev_flush_peers = dp_vdev_flush_peers,
  8261. .txrx_soc_detach = dp_soc_detach_wifi3,
  8262. .txrx_soc_deinit = dp_soc_deinit_wifi3,
  8263. .txrx_soc_init = dp_soc_init_wifi3,
  8264. .txrx_tso_soc_attach = dp_tso_soc_attach,
  8265. .txrx_tso_soc_detach = dp_tso_soc_detach,
  8266. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  8267. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  8268. .txrx_get_mon_vdev_from_pdev = dp_get_mon_vdev_from_pdev_wifi3,
  8269. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  8270. .txrx_ath_getstats = dp_get_device_stats,
  8271. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  8272. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  8273. .addba_resp_tx_completion = dp_addba_resp_tx_completion_wifi3,
  8274. .delba_process = dp_delba_process_wifi3,
  8275. .set_addba_response = dp_set_addba_response,
  8276. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  8277. .flush_cache_rx_queue = NULL,
  8278. /* TODO: get API's for dscp-tid need to be added*/
  8279. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  8280. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  8281. .hmmc_tid_override_en = dp_hmmc_tid_override_en_wifi3,
  8282. .set_hmmc_tid_val = dp_set_hmmc_tid_val_wifi3,
  8283. .txrx_get_total_per = dp_get_total_per,
  8284. .txrx_stats_request = dp_txrx_stats_request,
  8285. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  8286. .txrx_get_pdev_id_frm_pdev = dp_get_pdev_id_frm_pdev,
  8287. .txrx_get_vow_config_frm_pdev = dp_get_delay_stats_flag,
  8288. .txrx_pdev_set_chan_noise_floor = dp_pdev_set_chan_noise_floor,
  8289. .txrx_set_nac = dp_set_nac,
  8290. .txrx_get_tx_pending = dp_get_tx_pending,
  8291. .txrx_set_pdev_tx_capture = dp_config_debug_sniffer,
  8292. .txrx_get_peer_mac_from_peer_id = dp_get_peer_mac_from_peer_id,
  8293. .display_stats = dp_txrx_dump_stats,
  8294. .txrx_soc_set_nss_cfg = dp_soc_set_nss_cfg_wifi3,
  8295. .txrx_soc_get_nss_cfg = dp_soc_get_nss_cfg_wifi3,
  8296. .txrx_intr_attach = dp_soc_interrupt_attach_wrapper,
  8297. .txrx_intr_detach = dp_soc_interrupt_detach,
  8298. .set_pn_check = dp_set_pn_check_wifi3,
  8299. .update_config_parameters = dp_update_config_parameters,
  8300. /* TODO: Add other functions */
  8301. .txrx_data_tx_cb_set = dp_txrx_data_tx_cb_set,
  8302. .get_dp_txrx_handle = dp_pdev_get_dp_txrx_handle,
  8303. .set_dp_txrx_handle = dp_pdev_set_dp_txrx_handle,
  8304. .get_soc_dp_txrx_handle = dp_soc_get_dp_txrx_handle,
  8305. .set_soc_dp_txrx_handle = dp_soc_set_dp_txrx_handle,
  8306. .txrx_set_ba_aging_timeout = dp_set_ba_aging_timeout,
  8307. .txrx_get_ba_aging_timeout = dp_get_ba_aging_timeout,
  8308. .tx_send = dp_tx_send,
  8309. .txrx_peer_reset_ast = dp_wds_reset_ast_wifi3,
  8310. .txrx_peer_reset_ast_table = dp_wds_reset_ast_table_wifi3,
  8311. .txrx_peer_flush_ast_table = dp_wds_flush_ast_table_wifi3,
  8312. .txrx_peer_map_attach = dp_peer_map_attach_wifi3,
  8313. .txrx_pdev_set_ctrl_pdev = dp_pdev_set_ctrl_pdev,
  8314. .txrx_get_os_rx_handles_from_vdev =
  8315. dp_get_os_rx_handles_from_vdev_wifi3,
  8316. .delba_tx_completion = dp_delba_tx_completion_wifi3,
  8317. .get_dp_capabilities = dp_get_cfg_capabilities,
  8318. .txrx_get_cfg = dp_get_cfg,
  8319. };
  8320. static struct cdp_ctrl_ops dp_ops_ctrl = {
  8321. .txrx_peer_authorize = dp_peer_authorize,
  8322. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  8323. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  8324. #ifdef MESH_MODE_SUPPORT
  8325. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  8326. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  8327. #endif
  8328. .txrx_set_vdev_param = dp_set_vdev_param,
  8329. .txrx_peer_set_nawds = dp_peer_set_nawds,
  8330. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  8331. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  8332. .txrx_set_filter_neighbour_peers = dp_set_filter_neighbour_peers,
  8333. .txrx_update_filter_neighbour_peers =
  8334. dp_update_filter_neighbour_peers,
  8335. .txrx_get_sec_type = dp_get_sec_type,
  8336. /* TODO: Add other functions */
  8337. .txrx_wdi_event_sub = dp_wdi_event_sub,
  8338. .txrx_wdi_event_unsub = dp_wdi_event_unsub,
  8339. #ifdef WDI_EVENT_ENABLE
  8340. .txrx_get_pldev = dp_get_pldev,
  8341. #endif
  8342. .txrx_set_pdev_param = dp_set_pdev_param,
  8343. #ifdef ATH_SUPPORT_NAC_RSSI
  8344. .txrx_vdev_config_for_nac_rssi = dp_config_for_nac_rssi,
  8345. .txrx_vdev_get_neighbour_rssi = dp_vdev_get_neighbour_rssi,
  8346. #endif
  8347. .set_key = dp_set_michael_key,
  8348. .txrx_get_vdev_param = dp_get_vdev_param,
  8349. .enable_peer_based_pktlog = dp_enable_peer_based_pktlog,
  8350. .calculate_delay_stats = dp_calculate_delay_stats,
  8351. };
  8352. static struct cdp_me_ops dp_ops_me = {
  8353. #ifdef ATH_SUPPORT_IQUE
  8354. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  8355. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  8356. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  8357. #endif
  8358. };
  8359. static struct cdp_mon_ops dp_ops_mon = {
  8360. .txrx_monitor_set_filter_ucast_data = NULL,
  8361. .txrx_monitor_set_filter_mcast_data = NULL,
  8362. .txrx_monitor_set_filter_non_data = NULL,
  8363. .txrx_monitor_get_filter_ucast_data = dp_vdev_get_filter_ucast_data,
  8364. .txrx_monitor_get_filter_mcast_data = dp_vdev_get_filter_mcast_data,
  8365. .txrx_monitor_get_filter_non_data = dp_vdev_get_filter_non_data,
  8366. .txrx_reset_monitor_mode = dp_reset_monitor_mode,
  8367. /* Added support for HK advance filter */
  8368. .txrx_set_advance_monitor_filter = dp_pdev_set_advance_monitor_filter,
  8369. };
  8370. static struct cdp_host_stats_ops dp_ops_host_stats = {
  8371. .txrx_per_peer_stats = dp_get_host_peer_stats,
  8372. .get_fw_peer_stats = dp_get_fw_peer_stats,
  8373. .get_htt_stats = dp_get_htt_stats,
  8374. .txrx_enable_enhanced_stats = dp_enable_enhanced_stats,
  8375. .txrx_disable_enhanced_stats = dp_disable_enhanced_stats,
  8376. .txrx_stats_publish = dp_txrx_stats_publish,
  8377. .txrx_get_vdev_stats = dp_txrx_get_vdev_stats,
  8378. .txrx_get_peer_stats = dp_txrx_get_peer_stats,
  8379. .txrx_reset_peer_stats = dp_txrx_reset_peer_stats,
  8380. .txrx_get_pdev_stats = dp_txrx_get_pdev_stats,
  8381. .txrx_get_ratekbps = dp_txrx_get_ratekbps,
  8382. /* TODO */
  8383. };
  8384. static struct cdp_raw_ops dp_ops_raw = {
  8385. /* TODO */
  8386. };
  8387. #ifdef CONFIG_WIN
  8388. static struct cdp_pflow_ops dp_ops_pflow = {
  8389. dp_tx_flow_ctrl_configure_pdev,
  8390. };
  8391. #endif /* CONFIG_WIN */
  8392. #ifdef FEATURE_RUNTIME_PM
  8393. /**
  8394. * dp_runtime_suspend() - ensure DP is ready to runtime suspend
  8395. * @opaque_pdev: DP pdev context
  8396. *
  8397. * DP is ready to runtime suspend if there are no pending TX packets.
  8398. *
  8399. * Return: QDF_STATUS
  8400. */
  8401. static QDF_STATUS dp_runtime_suspend(struct cdp_pdev *opaque_pdev)
  8402. {
  8403. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  8404. struct dp_soc *soc = pdev->soc;
  8405. /* Abort if there are any pending TX packets */
  8406. if (dp_get_tx_pending(opaque_pdev) > 0) {
  8407. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  8408. FL("Abort suspend due to pending TX packets"));
  8409. return QDF_STATUS_E_AGAIN;
  8410. }
  8411. if (soc->intr_mode == DP_INTR_POLL)
  8412. qdf_timer_stop(&soc->int_timer);
  8413. return QDF_STATUS_SUCCESS;
  8414. }
  8415. /**
  8416. * dp_runtime_resume() - ensure DP is ready to runtime resume
  8417. * @opaque_pdev: DP pdev context
  8418. *
  8419. * Resume DP for runtime PM.
  8420. *
  8421. * Return: QDF_STATUS
  8422. */
  8423. static QDF_STATUS dp_runtime_resume(struct cdp_pdev *opaque_pdev)
  8424. {
  8425. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  8426. struct dp_soc *soc = pdev->soc;
  8427. void *hal_srng;
  8428. int i;
  8429. if (soc->intr_mode == DP_INTR_POLL)
  8430. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  8431. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  8432. hal_srng = soc->tcl_data_ring[i].hal_srng;
  8433. if (hal_srng) {
  8434. /* We actually only need to acquire the lock */
  8435. hal_srng_access_start(soc->hal_soc, hal_srng);
  8436. /* Update SRC ring head pointer for HW to send
  8437. all pending packets */
  8438. hal_srng_access_end(soc->hal_soc, hal_srng);
  8439. }
  8440. }
  8441. return QDF_STATUS_SUCCESS;
  8442. }
  8443. #endif /* FEATURE_RUNTIME_PM */
  8444. #ifndef CONFIG_WIN
  8445. static struct cdp_misc_ops dp_ops_misc = {
  8446. #ifdef FEATURE_WLAN_TDLS
  8447. .tx_non_std = dp_tx_non_std,
  8448. #endif /* FEATURE_WLAN_TDLS */
  8449. .get_opmode = dp_get_opmode,
  8450. #ifdef FEATURE_RUNTIME_PM
  8451. .runtime_suspend = dp_runtime_suspend,
  8452. .runtime_resume = dp_runtime_resume,
  8453. #endif /* FEATURE_RUNTIME_PM */
  8454. .pkt_log_init = dp_pkt_log_init,
  8455. .pkt_log_con_service = dp_pkt_log_con_service,
  8456. .get_num_rx_contexts = dp_get_num_rx_contexts,
  8457. };
  8458. static struct cdp_flowctl_ops dp_ops_flowctl = {
  8459. /* WIFI 3.0 DP implement as required. */
  8460. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  8461. .flow_pool_map_handler = dp_tx_flow_pool_map,
  8462. .flow_pool_unmap_handler = dp_tx_flow_pool_unmap,
  8463. .register_pause_cb = dp_txrx_register_pause_cb,
  8464. .dump_flow_pool_info = dp_tx_dump_flow_pool_info,
  8465. .tx_desc_thresh_reached = dp_tx_desc_thresh_reached,
  8466. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  8467. };
  8468. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  8469. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  8470. };
  8471. #ifdef IPA_OFFLOAD
  8472. static struct cdp_ipa_ops dp_ops_ipa = {
  8473. .ipa_get_resource = dp_ipa_get_resource,
  8474. .ipa_set_doorbell_paddr = dp_ipa_set_doorbell_paddr,
  8475. .ipa_op_response = dp_ipa_op_response,
  8476. .ipa_register_op_cb = dp_ipa_register_op_cb,
  8477. .ipa_get_stat = dp_ipa_get_stat,
  8478. .ipa_tx_data_frame = dp_tx_send_ipa_data_frame,
  8479. .ipa_enable_autonomy = dp_ipa_enable_autonomy,
  8480. .ipa_disable_autonomy = dp_ipa_disable_autonomy,
  8481. .ipa_setup = dp_ipa_setup,
  8482. .ipa_cleanup = dp_ipa_cleanup,
  8483. .ipa_setup_iface = dp_ipa_setup_iface,
  8484. .ipa_cleanup_iface = dp_ipa_cleanup_iface,
  8485. .ipa_enable_pipes = dp_ipa_enable_pipes,
  8486. .ipa_disable_pipes = dp_ipa_disable_pipes,
  8487. .ipa_set_perf_level = dp_ipa_set_perf_level
  8488. };
  8489. #endif
  8490. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  8491. {
  8492. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  8493. struct dp_soc *soc = pdev->soc;
  8494. int timeout = SUSPEND_DRAIN_WAIT;
  8495. int drain_wait_delay = 50; /* 50 ms */
  8496. /* Abort if there are any pending TX packets */
  8497. while (dp_get_tx_pending(opaque_pdev) > 0) {
  8498. qdf_sleep(drain_wait_delay);
  8499. if (timeout <= 0) {
  8500. dp_err("TX frames are pending, abort suspend");
  8501. return QDF_STATUS_E_TIMEOUT;
  8502. }
  8503. timeout = timeout - drain_wait_delay;
  8504. }
  8505. if (soc->intr_mode == DP_INTR_POLL)
  8506. qdf_timer_stop(&soc->int_timer);
  8507. return QDF_STATUS_SUCCESS;
  8508. }
  8509. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  8510. {
  8511. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  8512. struct dp_soc *soc = pdev->soc;
  8513. if (soc->intr_mode == DP_INTR_POLL)
  8514. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  8515. return QDF_STATUS_SUCCESS;
  8516. }
  8517. static struct cdp_bus_ops dp_ops_bus = {
  8518. .bus_suspend = dp_bus_suspend,
  8519. .bus_resume = dp_bus_resume
  8520. };
  8521. static struct cdp_ocb_ops dp_ops_ocb = {
  8522. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  8523. };
  8524. static struct cdp_throttle_ops dp_ops_throttle = {
  8525. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  8526. };
  8527. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  8528. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  8529. };
  8530. static struct cdp_cfg_ops dp_ops_cfg = {
  8531. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  8532. };
  8533. /*
  8534. * dp_peer_get_ref_find_by_addr - get peer with addr by ref count inc
  8535. * @dev: physical device instance
  8536. * @peer_mac_addr: peer mac address
  8537. * @local_id: local id for the peer
  8538. * @debug_id: to track enum peer access
  8539. *
  8540. * Return: peer instance pointer
  8541. */
  8542. static inline void *
  8543. dp_peer_get_ref_find_by_addr(struct cdp_pdev *dev, uint8_t *peer_mac_addr,
  8544. uint8_t *local_id,
  8545. enum peer_debug_id_type debug_id)
  8546. {
  8547. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  8548. struct dp_peer *peer;
  8549. peer = dp_peer_find_hash_find(pdev->soc, peer_mac_addr, 0, DP_VDEV_ALL);
  8550. if (!peer)
  8551. return NULL;
  8552. *local_id = peer->local_id;
  8553. DP_TRACE(INFO, "%s: peer %pK id %d", __func__, peer, *local_id);
  8554. return peer;
  8555. }
  8556. /*
  8557. * dp_peer_release_ref - release peer ref count
  8558. * @peer: peer handle
  8559. * @debug_id: to track enum peer access
  8560. *
  8561. * Return: None
  8562. */
  8563. static inline
  8564. void dp_peer_release_ref(void *peer, enum peer_debug_id_type debug_id)
  8565. {
  8566. dp_peer_unref_delete(peer);
  8567. }
  8568. static struct cdp_peer_ops dp_ops_peer = {
  8569. .register_peer = dp_register_peer,
  8570. .clear_peer = dp_clear_peer,
  8571. .find_peer_by_addr = dp_find_peer_by_addr,
  8572. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  8573. .peer_get_ref_by_addr = dp_peer_get_ref_find_by_addr,
  8574. .peer_release_ref = dp_peer_release_ref,
  8575. .local_peer_id = dp_local_peer_id,
  8576. .peer_find_by_local_id = dp_peer_find_by_local_id,
  8577. .peer_state_update = dp_peer_state_update,
  8578. .get_vdevid = dp_get_vdevid,
  8579. .get_vdev_by_sta_id = dp_get_vdev_by_sta_id,
  8580. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  8581. .get_vdev_for_peer = dp_get_vdev_for_peer,
  8582. .get_peer_state = dp_get_peer_state,
  8583. };
  8584. #endif
  8585. static struct cdp_ops dp_txrx_ops = {
  8586. .cmn_drv_ops = &dp_ops_cmn,
  8587. .ctrl_ops = &dp_ops_ctrl,
  8588. .me_ops = &dp_ops_me,
  8589. .mon_ops = &dp_ops_mon,
  8590. .host_stats_ops = &dp_ops_host_stats,
  8591. .wds_ops = &dp_ops_wds,
  8592. .raw_ops = &dp_ops_raw,
  8593. #ifdef CONFIG_WIN
  8594. .pflow_ops = &dp_ops_pflow,
  8595. #endif /* CONFIG_WIN */
  8596. #ifndef CONFIG_WIN
  8597. .misc_ops = &dp_ops_misc,
  8598. .cfg_ops = &dp_ops_cfg,
  8599. .flowctl_ops = &dp_ops_flowctl,
  8600. .l_flowctl_ops = &dp_ops_l_flowctl,
  8601. #ifdef IPA_OFFLOAD
  8602. .ipa_ops = &dp_ops_ipa,
  8603. #endif
  8604. .bus_ops = &dp_ops_bus,
  8605. .ocb_ops = &dp_ops_ocb,
  8606. .peer_ops = &dp_ops_peer,
  8607. .throttle_ops = &dp_ops_throttle,
  8608. .mob_stats_ops = &dp_ops_mob_stats,
  8609. #endif
  8610. };
  8611. /*
  8612. * dp_soc_set_txrx_ring_map()
  8613. * @dp_soc: DP handler for soc
  8614. *
  8615. * Return: Void
  8616. */
  8617. static void dp_soc_set_txrx_ring_map(struct dp_soc *soc)
  8618. {
  8619. uint32_t i;
  8620. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  8621. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_DEFAULT_MAP][i];
  8622. }
  8623. }
  8624. #ifdef QCA_WIFI_QCA8074
  8625. #ifndef QCA_MEM_ATTACH_ON_WIFI3
  8626. /**
  8627. * dp_soc_attach_wifi3() - Attach txrx SOC
  8628. * @ctrl_psoc: Opaque SOC handle from control plane
  8629. * @htc_handle: Opaque HTC handle
  8630. * @hif_handle: Opaque HIF handle
  8631. * @qdf_osdev: QDF device
  8632. * @ol_ops: Offload Operations
  8633. * @device_id: Device ID
  8634. *
  8635. * Return: DP SOC handle on success, NULL on failure
  8636. */
  8637. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  8638. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  8639. struct ol_if_ops *ol_ops, uint16_t device_id)
  8640. {
  8641. struct dp_soc *dp_soc = NULL;
  8642. dp_soc = dp_soc_attach(ctrl_psoc, htc_handle, qdf_osdev,
  8643. ol_ops, device_id);
  8644. if (!dp_soc)
  8645. return NULL;
  8646. if (!dp_soc_init(dp_soc, htc_handle, hif_handle))
  8647. return NULL;
  8648. return (void *)dp_soc;
  8649. }
  8650. #else
  8651. /**
  8652. * dp_soc_attach_wifi3() - Attach txrx SOC
  8653. * @ctrl_psoc: Opaque SOC handle from control plane
  8654. * @htc_handle: Opaque HTC handle
  8655. * @hif_handle: Opaque HIF handle
  8656. * @qdf_osdev: QDF device
  8657. * @ol_ops: Offload Operations
  8658. * @device_id: Device ID
  8659. *
  8660. * Return: DP SOC handle on success, NULL on failure
  8661. */
  8662. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  8663. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  8664. struct ol_if_ops *ol_ops, uint16_t device_id)
  8665. {
  8666. struct dp_soc *dp_soc = NULL;
  8667. dp_soc = dp_soc_attach(ctrl_psoc, htc_handle, qdf_osdev,
  8668. ol_ops, device_id);
  8669. return (void *)dp_soc;
  8670. }
  8671. #endif
  8672. /**
  8673. * dp_soc_attach() - Attach txrx SOC
  8674. * @ctrl_psoc: Opaque SOC handle from control plane
  8675. * @htc_handle: Opaque HTC handle
  8676. * @qdf_osdev: QDF device
  8677. * @ol_ops: Offload Operations
  8678. * @device_id: Device ID
  8679. *
  8680. * Return: DP SOC handle on success, NULL on failure
  8681. */
  8682. static struct dp_soc *
  8683. dp_soc_attach(void *ctrl_psoc, HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  8684. struct ol_if_ops *ol_ops, uint16_t device_id)
  8685. {
  8686. int int_ctx;
  8687. struct dp_soc *soc = NULL;
  8688. struct htt_soc *htt_soc = NULL;
  8689. soc = qdf_mem_malloc(sizeof(*soc));
  8690. if (!soc) {
  8691. dp_err("DP SOC memory allocation failed");
  8692. goto fail0;
  8693. }
  8694. int_ctx = 0;
  8695. soc->device_id = device_id;
  8696. soc->cdp_soc.ops = &dp_txrx_ops;
  8697. soc->cdp_soc.ol_ops = ol_ops;
  8698. soc->ctrl_psoc = ctrl_psoc;
  8699. soc->osdev = qdf_osdev;
  8700. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_MAPS;
  8701. soc->wlan_cfg_ctx = wlan_cfg_soc_attach(soc->ctrl_psoc);
  8702. if (!soc->wlan_cfg_ctx) {
  8703. dp_err("wlan_cfg_ctx failed\n");
  8704. goto fail1;
  8705. }
  8706. htt_soc = qdf_mem_malloc(sizeof(*htt_soc));
  8707. if (!htt_soc) {
  8708. dp_err("HTT attach failed");
  8709. goto fail1;
  8710. }
  8711. soc->htt_handle = htt_soc;
  8712. htt_soc->dp_soc = soc;
  8713. htt_soc->htc_soc = htc_handle;
  8714. if (htt_soc_htc_prealloc(htt_soc) != QDF_STATUS_SUCCESS)
  8715. goto fail2;
  8716. return (void *)soc;
  8717. fail2:
  8718. qdf_mem_free(htt_soc);
  8719. fail1:
  8720. qdf_mem_free(soc);
  8721. fail0:
  8722. return NULL;
  8723. }
  8724. /**
  8725. * dp_soc_init() - Initialize txrx SOC
  8726. * @dp_soc: Opaque DP SOC handle
  8727. * @htc_handle: Opaque HTC handle
  8728. * @hif_handle: Opaque HIF handle
  8729. *
  8730. * Return: DP SOC handle on success, NULL on failure
  8731. */
  8732. void *dp_soc_init(void *dpsoc, HTC_HANDLE htc_handle, void *hif_handle)
  8733. {
  8734. int target_type;
  8735. struct dp_soc *soc = (struct dp_soc *)dpsoc;
  8736. struct htt_soc *htt_soc = (struct htt_soc *)soc->htt_handle;
  8737. htt_soc->htc_soc = htc_handle;
  8738. soc->hif_handle = hif_handle;
  8739. soc->hal_soc = hif_get_hal_handle(soc->hif_handle);
  8740. if (!soc->hal_soc)
  8741. return NULL;
  8742. htt_soc_initialize(soc->htt_handle, soc->ctrl_psoc, htt_soc->htc_soc,
  8743. soc->hal_soc, soc->osdev);
  8744. target_type = hal_get_target_type(soc->hal_soc);
  8745. switch (target_type) {
  8746. case TARGET_TYPE_QCA6290:
  8747. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  8748. REO_DST_RING_SIZE_QCA6290);
  8749. soc->ast_override_support = 1;
  8750. soc->da_war_enabled = false;
  8751. break;
  8752. #ifdef QCA_WIFI_QCA6390
  8753. case TARGET_TYPE_QCA6390:
  8754. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  8755. REO_DST_RING_SIZE_QCA6290);
  8756. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, true);
  8757. soc->ast_override_support = 1;
  8758. if (con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  8759. int int_ctx;
  8760. for (int_ctx = 0; int_ctx < WLAN_CFG_INT_NUM_CONTEXTS; int_ctx++) {
  8761. soc->wlan_cfg_ctx->int_rx_ring_mask[int_ctx] = 0;
  8762. soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[int_ctx] = 0;
  8763. }
  8764. }
  8765. soc->wlan_cfg_ctx->rxdma1_enable = 0;
  8766. break;
  8767. #endif
  8768. case TARGET_TYPE_QCA8074:
  8769. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  8770. REO_DST_RING_SIZE_QCA8074);
  8771. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, true);
  8772. soc->hw_nac_monitor_support = 1;
  8773. soc->da_war_enabled = true;
  8774. break;
  8775. case TARGET_TYPE_QCA8074V2:
  8776. case TARGET_TYPE_QCA6018:
  8777. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  8778. REO_DST_RING_SIZE_QCA8074);
  8779. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, false);
  8780. soc->hw_nac_monitor_support = 1;
  8781. soc->ast_override_support = 1;
  8782. soc->per_tid_basize_max_tid = 8;
  8783. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_V2_MAPS;
  8784. soc->da_war_enabled = false;
  8785. break;
  8786. default:
  8787. qdf_print("%s: Unknown tgt type %d\n", __func__, target_type);
  8788. qdf_assert_always(0);
  8789. break;
  8790. }
  8791. wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx,
  8792. cfg_get(soc->ctrl_psoc, CFG_DP_RX_HASH));
  8793. soc->cce_disable = false;
  8794. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  8795. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  8796. CDP_CFG_MAX_PEER_ID);
  8797. if (ret != -EINVAL) {
  8798. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  8799. }
  8800. ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  8801. CDP_CFG_CCE_DISABLE);
  8802. if (ret == 1)
  8803. soc->cce_disable = true;
  8804. }
  8805. qdf_spinlock_create(&soc->peer_ref_mutex);
  8806. qdf_spinlock_create(&soc->ast_lock);
  8807. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  8808. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  8809. /* fill the tx/rx cpu ring map*/
  8810. dp_soc_set_txrx_ring_map(soc);
  8811. qdf_spinlock_create(&soc->htt_stats.lock);
  8812. /* initialize work queue for stats processing */
  8813. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  8814. return soc;
  8815. }
  8816. /**
  8817. * dp_soc_init_wifi3() - Initialize txrx SOC
  8818. * @dp_soc: Opaque DP SOC handle
  8819. * @ctrl_psoc: Opaque SOC handle from control plane(Unused)
  8820. * @hif_handle: Opaque HIF handle
  8821. * @htc_handle: Opaque HTC handle
  8822. * @qdf_osdev: QDF device (Unused)
  8823. * @ol_ops: Offload Operations (Unused)
  8824. * @device_id: Device ID (Unused)
  8825. *
  8826. * Return: DP SOC handle on success, NULL on failure
  8827. */
  8828. void *dp_soc_init_wifi3(void *dpsoc, void *ctrl_psoc, void *hif_handle,
  8829. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  8830. struct ol_if_ops *ol_ops, uint16_t device_id)
  8831. {
  8832. return dp_soc_init(dpsoc, htc_handle, hif_handle);
  8833. }
  8834. #endif
  8835. /*
  8836. * dp_get_pdev_for_mac_id() - Return pdev for mac_id
  8837. *
  8838. * @soc: handle to DP soc
  8839. * @mac_id: MAC id
  8840. *
  8841. * Return: Return pdev corresponding to MAC
  8842. */
  8843. void *dp_get_pdev_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  8844. {
  8845. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  8846. return soc->pdev_list[mac_id];
  8847. /* Typically for MCL as there only 1 PDEV*/
  8848. return soc->pdev_list[0];
  8849. }
  8850. /*
  8851. * dp_is_hw_dbs_enable() - Procedure to check if DBS is supported
  8852. * @soc: DP SoC context
  8853. * @max_mac_rings: No of MAC rings
  8854. *
  8855. * Return: None
  8856. */
  8857. static
  8858. void dp_is_hw_dbs_enable(struct dp_soc *soc,
  8859. int *max_mac_rings)
  8860. {
  8861. bool dbs_enable = false;
  8862. if (soc->cdp_soc.ol_ops->is_hw_dbs_2x2_capable)
  8863. dbs_enable = soc->cdp_soc.ol_ops->
  8864. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  8865. *max_mac_rings = (dbs_enable)?(*max_mac_rings):1;
  8866. }
  8867. /*
  8868. * dp_is_soc_reinit() - Check if soc reinit is true
  8869. * @soc: DP SoC context
  8870. *
  8871. * Return: true or false
  8872. */
  8873. bool dp_is_soc_reinit(struct dp_soc *soc)
  8874. {
  8875. return soc->dp_soc_reinit;
  8876. }
  8877. /*
  8878. * dp_set_pktlog_wifi3() - attach txrx vdev
  8879. * @pdev: Datapath PDEV handle
  8880. * @event: which event's notifications are being subscribed to
  8881. * @enable: WDI event subscribe or not. (True or False)
  8882. *
  8883. * Return: Success, NULL on failure
  8884. */
  8885. #ifdef WDI_EVENT_ENABLE
  8886. int dp_set_pktlog_wifi3(struct dp_pdev *pdev, uint32_t event,
  8887. bool enable)
  8888. {
  8889. struct dp_soc *soc = NULL;
  8890. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  8891. int max_mac_rings = wlan_cfg_get_num_mac_rings
  8892. (pdev->wlan_cfg_ctx);
  8893. uint8_t mac_id = 0;
  8894. soc = pdev->soc;
  8895. dp_is_hw_dbs_enable(soc, &max_mac_rings);
  8896. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  8897. FL("Max_mac_rings %d "),
  8898. max_mac_rings);
  8899. if (enable) {
  8900. switch (event) {
  8901. case WDI_EVENT_RX_DESC:
  8902. if (pdev->monitor_vdev) {
  8903. /* Nothing needs to be done if monitor mode is
  8904. * enabled
  8905. */
  8906. return 0;
  8907. }
  8908. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_FULL) {
  8909. pdev->rx_pktlog_mode = DP_RX_PKTLOG_FULL;
  8910. htt_tlv_filter.mpdu_start = 1;
  8911. htt_tlv_filter.msdu_start = 1;
  8912. htt_tlv_filter.msdu_end = 1;
  8913. htt_tlv_filter.mpdu_end = 1;
  8914. htt_tlv_filter.packet_header = 1;
  8915. htt_tlv_filter.attention = 1;
  8916. htt_tlv_filter.ppdu_start = 1;
  8917. htt_tlv_filter.ppdu_end = 1;
  8918. htt_tlv_filter.ppdu_end_user_stats = 1;
  8919. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  8920. htt_tlv_filter.ppdu_end_status_done = 1;
  8921. htt_tlv_filter.enable_fp = 1;
  8922. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  8923. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  8924. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  8925. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  8926. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  8927. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  8928. htt_tlv_filter.offset_valid = false;
  8929. for (mac_id = 0; mac_id < max_mac_rings;
  8930. mac_id++) {
  8931. int mac_for_pdev =
  8932. dp_get_mac_id_for_pdev(mac_id,
  8933. pdev->pdev_id);
  8934. htt_h2t_rx_ring_cfg(soc->htt_handle,
  8935. mac_for_pdev,
  8936. pdev->rxdma_mon_status_ring[mac_id]
  8937. .hal_srng,
  8938. RXDMA_MONITOR_STATUS,
  8939. RX_BUFFER_SIZE,
  8940. &htt_tlv_filter);
  8941. }
  8942. if (soc->reap_timer_init)
  8943. qdf_timer_mod(&soc->mon_reap_timer,
  8944. DP_INTR_POLL_TIMER_MS);
  8945. }
  8946. break;
  8947. case WDI_EVENT_LITE_RX:
  8948. if (pdev->monitor_vdev) {
  8949. /* Nothing needs to be done if monitor mode is
  8950. * enabled
  8951. */
  8952. return 0;
  8953. }
  8954. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_LITE) {
  8955. pdev->rx_pktlog_mode = DP_RX_PKTLOG_LITE;
  8956. htt_tlv_filter.ppdu_start = 1;
  8957. htt_tlv_filter.ppdu_end = 1;
  8958. htt_tlv_filter.ppdu_end_user_stats = 1;
  8959. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  8960. htt_tlv_filter.ppdu_end_status_done = 1;
  8961. htt_tlv_filter.mpdu_start = 1;
  8962. htt_tlv_filter.enable_fp = 1;
  8963. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  8964. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  8965. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  8966. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  8967. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  8968. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  8969. htt_tlv_filter.offset_valid = false;
  8970. for (mac_id = 0; mac_id < max_mac_rings;
  8971. mac_id++) {
  8972. int mac_for_pdev =
  8973. dp_get_mac_id_for_pdev(mac_id,
  8974. pdev->pdev_id);
  8975. htt_h2t_rx_ring_cfg(soc->htt_handle,
  8976. mac_for_pdev,
  8977. pdev->rxdma_mon_status_ring[mac_id]
  8978. .hal_srng,
  8979. RXDMA_MONITOR_STATUS,
  8980. RX_BUFFER_SIZE_PKTLOG_LITE,
  8981. &htt_tlv_filter);
  8982. }
  8983. if (soc->reap_timer_init)
  8984. qdf_timer_mod(&soc->mon_reap_timer,
  8985. DP_INTR_POLL_TIMER_MS);
  8986. }
  8987. break;
  8988. case WDI_EVENT_LITE_T2H:
  8989. if (pdev->monitor_vdev) {
  8990. /* Nothing needs to be done if monitor mode is
  8991. * enabled
  8992. */
  8993. return 0;
  8994. }
  8995. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  8996. int mac_for_pdev = dp_get_mac_id_for_pdev(
  8997. mac_id, pdev->pdev_id);
  8998. pdev->pktlog_ppdu_stats = true;
  8999. dp_h2t_cfg_stats_msg_send(pdev,
  9000. DP_PPDU_TXLITE_STATS_BITMASK_CFG,
  9001. mac_for_pdev);
  9002. }
  9003. break;
  9004. default:
  9005. /* Nothing needs to be done for other pktlog types */
  9006. break;
  9007. }
  9008. } else {
  9009. switch (event) {
  9010. case WDI_EVENT_RX_DESC:
  9011. case WDI_EVENT_LITE_RX:
  9012. if (pdev->monitor_vdev) {
  9013. /* Nothing needs to be done if monitor mode is
  9014. * enabled
  9015. */
  9016. return 0;
  9017. }
  9018. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_DISABLED) {
  9019. pdev->rx_pktlog_mode = DP_RX_PKTLOG_DISABLED;
  9020. for (mac_id = 0; mac_id < max_mac_rings;
  9021. mac_id++) {
  9022. int mac_for_pdev =
  9023. dp_get_mac_id_for_pdev(mac_id,
  9024. pdev->pdev_id);
  9025. htt_h2t_rx_ring_cfg(soc->htt_handle,
  9026. mac_for_pdev,
  9027. pdev->rxdma_mon_status_ring[mac_id]
  9028. .hal_srng,
  9029. RXDMA_MONITOR_STATUS,
  9030. RX_BUFFER_SIZE,
  9031. &htt_tlv_filter);
  9032. }
  9033. if (soc->reap_timer_init)
  9034. qdf_timer_stop(&soc->mon_reap_timer);
  9035. }
  9036. break;
  9037. case WDI_EVENT_LITE_T2H:
  9038. if (pdev->monitor_vdev) {
  9039. /* Nothing needs to be done if monitor mode is
  9040. * enabled
  9041. */
  9042. return 0;
  9043. }
  9044. /* To disable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  9045. * passing value 0. Once these macros will define in htt
  9046. * header file will use proper macros
  9047. */
  9048. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  9049. int mac_for_pdev =
  9050. dp_get_mac_id_for_pdev(mac_id,
  9051. pdev->pdev_id);
  9052. pdev->pktlog_ppdu_stats = false;
  9053. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  9054. dp_h2t_cfg_stats_msg_send(pdev, 0,
  9055. mac_for_pdev);
  9056. } else if (pdev->tx_sniffer_enable || pdev->mcopy_mode) {
  9057. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_SNIFFER,
  9058. mac_for_pdev);
  9059. } else if (pdev->enhanced_stats_en) {
  9060. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS,
  9061. mac_for_pdev);
  9062. }
  9063. }
  9064. break;
  9065. default:
  9066. /* Nothing needs to be done for other pktlog types */
  9067. break;
  9068. }
  9069. }
  9070. return 0;
  9071. }
  9072. #endif
  9073. /**
  9074. * dp_bucket_index() - Return index from array
  9075. *
  9076. * @delay: delay measured
  9077. * @array: array used to index corresponding delay
  9078. *
  9079. * Return: index
  9080. */
  9081. static uint8_t dp_bucket_index(uint32_t delay, uint16_t *array)
  9082. {
  9083. uint8_t i = CDP_DELAY_BUCKET_0;
  9084. for (; i < CDP_DELAY_BUCKET_MAX; i++) {
  9085. if (delay >= array[i] && delay <= array[i + 1])
  9086. return i;
  9087. }
  9088. return (CDP_DELAY_BUCKET_MAX - 1);
  9089. }
  9090. /**
  9091. * dp_fill_delay_buckets() - Fill delay statistics bucket for each
  9092. * type of delay
  9093. *
  9094. * @pdev: pdev handle
  9095. * @delay: delay in ms
  9096. * @t: tid value
  9097. * @mode: type of tx delay mode
  9098. * Return: pointer to cdp_delay_stats structure
  9099. */
  9100. static struct cdp_delay_stats *
  9101. dp_fill_delay_buckets(struct dp_pdev *pdev, uint32_t delay,
  9102. uint8_t tid, uint8_t mode)
  9103. {
  9104. uint8_t delay_index = 0;
  9105. struct cdp_tid_tx_stats *tstats =
  9106. &pdev->stats.tid_stats.tid_tx_stats[tid];
  9107. struct cdp_tid_rx_stats *rstats =
  9108. &pdev->stats.tid_stats.tid_rx_stats[tid];
  9109. /*
  9110. * cdp_fw_to_hw_delay_range
  9111. * Fw to hw delay ranges in milliseconds
  9112. */
  9113. uint16_t cdp_fw_to_hw_delay[CDP_DELAY_BUCKET_MAX] = {
  9114. 0, 10, 20, 30, 40, 50, 60, 70, 80, 90, 100, 250, 500};
  9115. /*
  9116. * cdp_sw_enq_delay_range
  9117. * Software enqueue delay ranges in milliseconds
  9118. */
  9119. uint16_t cdp_sw_enq_delay[CDP_DELAY_BUCKET_MAX] = {
  9120. 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12};
  9121. /*
  9122. * cdp_intfrm_delay_range
  9123. * Interframe delay ranges in milliseconds
  9124. */
  9125. uint16_t cdp_intfrm_delay[CDP_DELAY_BUCKET_MAX] = {
  9126. 0, 5, 10, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60};
  9127. /*
  9128. * Update delay stats in proper bucket
  9129. */
  9130. switch (mode) {
  9131. /* Software Enqueue delay ranges */
  9132. case CDP_DELAY_STATS_SW_ENQ:
  9133. delay_index = dp_bucket_index(delay, cdp_sw_enq_delay);
  9134. tstats->swq_delay.delay_bucket[delay_index]++;
  9135. return &tstats->swq_delay;
  9136. /* Tx Completion delay ranges */
  9137. case CDP_DELAY_STATS_FW_HW_TRANSMIT:
  9138. delay_index = dp_bucket_index(delay, cdp_fw_to_hw_delay);
  9139. tstats->hwtx_delay.delay_bucket[delay_index]++;
  9140. return &tstats->hwtx_delay;
  9141. /* Interframe tx delay ranges */
  9142. case CDP_DELAY_STATS_TX_INTERFRAME:
  9143. delay_index = dp_bucket_index(delay, cdp_intfrm_delay);
  9144. tstats->intfrm_delay.delay_bucket[delay_index]++;
  9145. return &tstats->intfrm_delay;
  9146. /* Interframe rx delay ranges */
  9147. case CDP_DELAY_STATS_RX_INTERFRAME:
  9148. delay_index = dp_bucket_index(delay, cdp_intfrm_delay);
  9149. rstats->intfrm_delay.delay_bucket[delay_index]++;
  9150. return &rstats->intfrm_delay;
  9151. /* Ring reap to indication to network stack */
  9152. case CDP_DELAY_STATS_REAP_STACK:
  9153. delay_index = dp_bucket_index(delay, cdp_intfrm_delay);
  9154. rstats->to_stack_delay.delay_bucket[delay_index]++;
  9155. return &rstats->to_stack_delay;
  9156. default:
  9157. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  9158. "%s Incorrect delay mode: %d", __func__, mode);
  9159. }
  9160. return NULL;
  9161. }
  9162. /**
  9163. * dp_update_delay_stats() - Update delay statistics in structure
  9164. * and fill min, max and avg delay
  9165. *
  9166. * @pdev: pdev handle
  9167. * @delay: delay in ms
  9168. * @tid: tid value
  9169. * @mode: type of tx delay mode
  9170. * Return: none
  9171. */
  9172. void dp_update_delay_stats(struct dp_pdev *pdev, uint32_t delay,
  9173. uint8_t tid, uint8_t mode)
  9174. {
  9175. struct cdp_delay_stats *dstats = NULL;
  9176. /*
  9177. * Delay ranges are different for different delay modes
  9178. * Get the correct index to update delay bucket
  9179. */
  9180. dstats = dp_fill_delay_buckets(pdev, delay, tid, mode);
  9181. if (qdf_unlikely(!dstats))
  9182. return;
  9183. if (delay != 0) {
  9184. /*
  9185. * Compute minimum,average and maximum
  9186. * delay
  9187. */
  9188. if (delay < dstats->min_delay)
  9189. dstats->min_delay = delay;
  9190. if (delay > dstats->max_delay)
  9191. dstats->max_delay = delay;
  9192. /*
  9193. * Average over delay measured till now
  9194. */
  9195. if (!dstats->avg_delay)
  9196. dstats->avg_delay = delay;
  9197. else
  9198. dstats->avg_delay = ((delay + dstats->avg_delay) / 2);
  9199. }
  9200. }