main.c 117 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470447144724473447444754476447744784479448044814482448344844485448644874488448944904491449244934494449544964497449844994500450145024503450445054506450745084509451045114512451345144515451645174518451945204521452245234524452545264527452845294530453145324533453445354536453745384539454045414542454345444545454645474548454945504551455245534554455545564557455845594560456145624563456445654566456745684569457045714572457345744575457645774578457945804581458245834584458545864587458845894590459145924593459445954596459745984599460046014602460346044605460646074608460946104611461246134614461546164617461846194620462146224623462446254626462746284629463046314632463346344635463646374638463946404641464246434644464546464647464846494650465146524653465446554656465746584659466046614662466346644665466646674668466946704671467246734674467546764677467846794680468146824683468446854686468746884689469046914692469346944695469646974698469947004701470247034704470547064707470847094710471147124713471447154716471747184719472047214722472347244725472647274728472947304731473247334734473547364737473847394740474147424743474447454746474747484749475047514752475347544755475647574758475947604761476247634764476547664767476847694770477147724773477447754776477747784779478047814782478347844785478647874788478947904791479247934794479547964797479847994800480148024803480448054806480748084809481048114812481348144815481648174818481948204821482248234824482548264827482848294830483148324833483448354836483748384839484048414842484348444845484648474848484948504851485248534854485548564857485848594860486148624863486448654866486748684869
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <trace/hooks/remoteproc.h>
  46. #include <linux/soc/qcom/slatecom_interface.h>
  47. #include "main.h"
  48. #include "qmi.h"
  49. #include "debug.h"
  50. #include "power.h"
  51. #include "genl.h"
  52. #define MAX_PROP_SIZE 32
  53. #define NUM_LOG_PAGES 10
  54. #define NUM_LOG_LONG_PAGES 4
  55. #define ICNSS_MAGIC 0x5abc5abc
  56. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  57. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  58. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  59. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  60. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  61. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  62. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  63. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  64. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  65. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  66. #define ICNSS_MAX_PROBE_CNT 2
  67. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  68. #define PROBE_TIMEOUT 15000
  69. #define SMP2P_SOC_WAKE_TIMEOUT 500
  70. #ifdef CONFIG_ICNSS2_DEBUG
  71. static unsigned long qmi_timeout = 3000;
  72. module_param(qmi_timeout, ulong, 0600);
  73. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  74. #else
  75. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  76. #endif
  77. #define ICNSS_RECOVERY_TIMEOUT 60000
  78. #define ICNSS_CAL_TIMEOUT 40000
  79. static struct icnss_priv *penv;
  80. static struct work_struct wpss_loader;
  81. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  82. #define ICNSS_EVENT_PENDING 2989
  83. #define ICNSS_EVENT_SYNC BIT(0)
  84. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  85. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  86. ICNSS_EVENT_SYNC)
  87. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  88. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  89. #define SMP2P_GET_MAX_RETRY 4
  90. #define SMP2P_GET_RETRY_DELAY_MS 500
  91. #define RAMDUMP_NUM_DEVICES 256
  92. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  93. #define WLAN_EN_TEMP_THRESHOLD 5000
  94. #define WLAN_EN_DELAY 500
  95. #define ICNSS_RPROC_LEN 10
  96. static DEFINE_IDA(rd_minor_id);
  97. enum icnss_pdr_cause_index {
  98. ICNSS_FW_CRASH,
  99. ICNSS_ROOT_PD_CRASH,
  100. ICNSS_ROOT_PD_SHUTDOWN,
  101. ICNSS_HOST_ERROR,
  102. };
  103. static const char * const icnss_pdr_cause[] = {
  104. [ICNSS_FW_CRASH] = "FW crash",
  105. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  106. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  107. [ICNSS_HOST_ERROR] = "Host error",
  108. };
  109. static void icnss_set_plat_priv(struct icnss_priv *priv)
  110. {
  111. penv = priv;
  112. }
  113. static struct icnss_priv *icnss_get_plat_priv(void)
  114. {
  115. return penv;
  116. }
  117. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  118. {
  119. if (priv && priv->rproc) {
  120. rproc_shutdown(priv->rproc);
  121. rproc_put(priv->rproc);
  122. priv->rproc = NULL;
  123. }
  124. }
  125. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  126. struct kobj_attribute *attr,
  127. const char *buf, size_t count)
  128. {
  129. struct icnss_priv *priv = icnss_get_plat_priv();
  130. icnss_pr_dbg("Received shutdown indication");
  131. atomic_set(&priv->is_shutdown, true);
  132. if (priv->wpss_supported && priv->device_id == ADRASTEA_DEVICE_ID)
  133. icnss_wpss_unload(priv);
  134. return count;
  135. }
  136. static struct kobj_attribute icnss_sysfs_attribute =
  137. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  138. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  139. {
  140. if (atomic_inc_return(&priv->pm_count) != 1)
  141. return;
  142. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  143. atomic_read(&priv->pm_count));
  144. pm_stay_awake(&priv->pdev->dev);
  145. priv->stats.pm_stay_awake++;
  146. }
  147. static void icnss_pm_relax(struct icnss_priv *priv)
  148. {
  149. int r = atomic_dec_return(&priv->pm_count);
  150. WARN_ON(r < 0);
  151. if (r != 0)
  152. return;
  153. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  154. atomic_read(&priv->pm_count));
  155. pm_relax(&priv->pdev->dev);
  156. priv->stats.pm_relax++;
  157. }
  158. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  159. {
  160. switch (type) {
  161. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  162. return "SERVER_ARRIVE";
  163. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  164. return "SERVER_EXIT";
  165. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  166. return "FW_READY";
  167. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  168. return "REGISTER_DRIVER";
  169. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  170. return "UNREGISTER_DRIVER";
  171. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  172. return "PD_SERVICE_DOWN";
  173. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  174. return "FW_EARLY_CRASH_IND";
  175. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  176. return "IDLE_SHUTDOWN";
  177. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  178. return "IDLE_RESTART";
  179. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  180. return "FW_INIT_DONE";
  181. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  182. return "QDSS_TRACE_REQ_MEM";
  183. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  184. return "QDSS_TRACE_SAVE";
  185. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  186. return "QDSS_TRACE_FREE";
  187. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  188. return "M3_DUMP_UPLOAD";
  189. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  190. return "QDSS_TRACE_REQ_DATA";
  191. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  192. return "SUBSYS_RESTART_LEVEL";
  193. case ICNSS_DRIVER_EVENT_MAX:
  194. return "EVENT_MAX";
  195. }
  196. return "UNKNOWN";
  197. };
  198. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  199. {
  200. switch (type) {
  201. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  202. return "SOC_WAKE_REQUEST";
  203. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  204. return "SOC_WAKE_RELEASE";
  205. case ICNSS_SOC_WAKE_EVENT_MAX:
  206. return "SOC_EVENT_MAX";
  207. }
  208. return "UNKNOWN";
  209. };
  210. int icnss_driver_event_post(struct icnss_priv *priv,
  211. enum icnss_driver_event_type type,
  212. u32 flags, void *data)
  213. {
  214. struct icnss_driver_event *event;
  215. unsigned long irq_flags;
  216. int gfp = GFP_KERNEL;
  217. int ret = 0;
  218. if (!priv)
  219. return -ENODEV;
  220. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  221. icnss_driver_event_to_str(type), type, current->comm,
  222. flags, priv->state);
  223. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  224. icnss_pr_err("Invalid Event type: %d, can't post", type);
  225. return -EINVAL;
  226. }
  227. if (in_interrupt() || irqs_disabled())
  228. gfp = GFP_ATOMIC;
  229. event = kzalloc(sizeof(*event), gfp);
  230. if (event == NULL)
  231. return -ENOMEM;
  232. icnss_pm_stay_awake(priv);
  233. event->type = type;
  234. event->data = data;
  235. init_completion(&event->complete);
  236. event->ret = ICNSS_EVENT_PENDING;
  237. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  238. spin_lock_irqsave(&priv->event_lock, irq_flags);
  239. list_add_tail(&event->list, &priv->event_list);
  240. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  241. priv->stats.events[type].posted++;
  242. queue_work(priv->event_wq, &priv->event_work);
  243. if (!(flags & ICNSS_EVENT_SYNC))
  244. goto out;
  245. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  246. wait_for_completion(&event->complete);
  247. else
  248. ret = wait_for_completion_interruptible(&event->complete);
  249. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  250. icnss_driver_event_to_str(type), type, priv->state, ret,
  251. event->ret);
  252. spin_lock_irqsave(&priv->event_lock, irq_flags);
  253. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  254. event->sync = false;
  255. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  256. ret = -EINTR;
  257. goto out;
  258. }
  259. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  260. ret = event->ret;
  261. kfree(event);
  262. out:
  263. icnss_pm_relax(priv);
  264. return ret;
  265. }
  266. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  267. enum icnss_soc_wake_event_type type,
  268. u32 flags, void *data)
  269. {
  270. struct icnss_soc_wake_event *event;
  271. unsigned long irq_flags;
  272. int gfp = GFP_KERNEL;
  273. int ret = 0;
  274. if (!priv)
  275. return -ENODEV;
  276. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  277. icnss_soc_wake_event_to_str(type),
  278. type, current->comm, flags, priv->state);
  279. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  280. icnss_pr_err("Invalid Event type: %d, can't post", type);
  281. return -EINVAL;
  282. }
  283. if (in_interrupt() || irqs_disabled())
  284. gfp = GFP_ATOMIC;
  285. event = kzalloc(sizeof(*event), gfp);
  286. if (!event)
  287. return -ENOMEM;
  288. icnss_pm_stay_awake(priv);
  289. event->type = type;
  290. event->data = data;
  291. init_completion(&event->complete);
  292. event->ret = ICNSS_EVENT_PENDING;
  293. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  294. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  295. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  296. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  297. priv->stats.soc_wake_events[type].posted++;
  298. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  299. if (!(flags & ICNSS_EVENT_SYNC))
  300. goto out;
  301. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  302. wait_for_completion(&event->complete);
  303. else
  304. ret = wait_for_completion_interruptible(&event->complete);
  305. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  306. icnss_soc_wake_event_to_str(type),
  307. type, priv->state, ret, event->ret);
  308. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  309. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  310. event->sync = false;
  311. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  312. ret = -EINTR;
  313. goto out;
  314. }
  315. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  316. ret = event->ret;
  317. kfree(event);
  318. out:
  319. icnss_pm_relax(priv);
  320. return ret;
  321. }
  322. bool icnss_is_fw_ready(void)
  323. {
  324. if (!penv)
  325. return false;
  326. else
  327. return test_bit(ICNSS_FW_READY, &penv->state);
  328. }
  329. EXPORT_SYMBOL(icnss_is_fw_ready);
  330. void icnss_block_shutdown(bool status)
  331. {
  332. if (!penv)
  333. return;
  334. if (status) {
  335. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  336. reinit_completion(&penv->unblock_shutdown);
  337. } else {
  338. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  339. complete(&penv->unblock_shutdown);
  340. }
  341. }
  342. EXPORT_SYMBOL(icnss_block_shutdown);
  343. bool icnss_is_fw_down(void)
  344. {
  345. struct icnss_priv *priv = icnss_get_plat_priv();
  346. if (!priv)
  347. return false;
  348. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  349. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  350. test_bit(ICNSS_REJUVENATE, &priv->state);
  351. }
  352. EXPORT_SYMBOL(icnss_is_fw_down);
  353. unsigned long icnss_get_device_config(void)
  354. {
  355. struct icnss_priv *priv = icnss_get_plat_priv();
  356. if (!priv)
  357. return 0;
  358. return priv->device_config;
  359. }
  360. EXPORT_SYMBOL(icnss_get_device_config);
  361. bool icnss_is_rejuvenate(void)
  362. {
  363. if (!penv)
  364. return false;
  365. else
  366. return test_bit(ICNSS_REJUVENATE, &penv->state);
  367. }
  368. EXPORT_SYMBOL(icnss_is_rejuvenate);
  369. bool icnss_is_pdr(void)
  370. {
  371. if (!penv)
  372. return false;
  373. else
  374. return test_bit(ICNSS_PDR, &penv->state);
  375. }
  376. EXPORT_SYMBOL(icnss_is_pdr);
  377. static int icnss_send_smp2p(struct icnss_priv *priv,
  378. enum icnss_smp2p_msg_id msg_id,
  379. enum smp2p_out_entry smp2p_entry)
  380. {
  381. unsigned int value = 0;
  382. int ret;
  383. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  384. return -EINVAL;
  385. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  386. if (msg_id == ICNSS_RESET_MSG) {
  387. priv->smp2p_info[smp2p_entry].seq = 0;
  388. ret = qcom_smem_state_update_bits(
  389. priv->smp2p_info[smp2p_entry].smem_state,
  390. ICNSS_SMEM_VALUE_MASK,
  391. 0);
  392. if (ret)
  393. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  394. ret, icnss_smp2p_str[smp2p_entry]);
  395. return ret;
  396. }
  397. if (test_bit(ICNSS_FW_DOWN, &priv->state))
  398. return -ENODEV;
  399. value |= priv->smp2p_info[smp2p_entry].seq++;
  400. value <<= ICNSS_SMEM_SEQ_NO_POS;
  401. value |= msg_id;
  402. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  403. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  404. reinit_completion(&penv->smp2p_soc_wake_wait);
  405. ret = qcom_smem_state_update_bits(
  406. priv->smp2p_info[smp2p_entry].smem_state,
  407. ICNSS_SMEM_VALUE_MASK,
  408. value);
  409. if (ret) {
  410. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  411. icnss_smp2p_str[smp2p_entry]);
  412. } else {
  413. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  414. msg_id == ICNSS_SOC_WAKE_REL) {
  415. if (!wait_for_completion_timeout(
  416. &priv->smp2p_soc_wake_wait,
  417. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  418. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  419. icnss_smp2p_str[smp2p_entry]);
  420. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  421. ICNSS_ASSERT(0);
  422. }
  423. }
  424. }
  425. return ret;
  426. }
  427. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  428. {
  429. struct icnss_priv *priv = ctx;
  430. if (priv)
  431. priv->force_err_fatal = true;
  432. icnss_pr_err("Received force error fatal request from FW\n");
  433. return IRQ_HANDLED;
  434. }
  435. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  436. {
  437. struct icnss_priv *priv = ctx;
  438. struct icnss_uevent_fw_down_data fw_down_data = {0};
  439. icnss_pr_err("Received early crash indication from FW\n");
  440. if (priv) {
  441. set_bit(ICNSS_FW_DOWN, &priv->state);
  442. icnss_ignore_fw_timeout(true);
  443. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  444. clear_bit(ICNSS_FW_READY, &priv->state);
  445. fw_down_data.crashed = true;
  446. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  447. &fw_down_data);
  448. }
  449. }
  450. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  451. 0, NULL);
  452. return IRQ_HANDLED;
  453. }
  454. static void register_fw_error_notifications(struct device *dev)
  455. {
  456. struct icnss_priv *priv = dev_get_drvdata(dev);
  457. struct device_node *dev_node;
  458. int irq = 0, ret = 0;
  459. if (!priv)
  460. return;
  461. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  462. if (!dev_node) {
  463. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  464. return;
  465. }
  466. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  467. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  468. ret = irq = of_irq_get_byname(dev_node,
  469. "qcom,smp2p-force-fatal-error");
  470. if (ret < 0) {
  471. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  472. irq);
  473. return;
  474. }
  475. }
  476. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  477. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  478. "wlanfw-err", priv);
  479. if (ret < 0) {
  480. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  481. irq, ret);
  482. return;
  483. }
  484. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  485. priv->fw_error_fatal_irq = irq;
  486. }
  487. static void register_early_crash_notifications(struct device *dev)
  488. {
  489. struct icnss_priv *priv = dev_get_drvdata(dev);
  490. struct device_node *dev_node;
  491. int irq = 0, ret = 0;
  492. if (!priv)
  493. return;
  494. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  495. if (!dev_node) {
  496. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  497. return;
  498. }
  499. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  500. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  501. ret = irq = of_irq_get_byname(dev_node,
  502. "qcom,smp2p-early-crash-ind");
  503. if (ret < 0) {
  504. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  505. irq);
  506. return;
  507. }
  508. }
  509. ret = devm_request_threaded_irq(dev, irq, NULL,
  510. fw_crash_indication_handler,
  511. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  512. "wlanfw-early-crash-ind", priv);
  513. if (ret < 0) {
  514. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  515. irq, ret);
  516. return;
  517. }
  518. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  519. priv->fw_early_crash_irq = irq;
  520. }
  521. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  522. {
  523. struct thermal_zone_device *thermal_dev;
  524. const char *tsens;
  525. int ret;
  526. ret = of_property_read_string(priv->pdev->dev.of_node,
  527. "tsens",
  528. &tsens);
  529. if (ret)
  530. return ret;
  531. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  532. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  533. if (IS_ERR(thermal_dev)) {
  534. icnss_pr_err("Fail to get thermal zone. ret: %d",
  535. PTR_ERR(thermal_dev));
  536. return PTR_ERR(thermal_dev);
  537. }
  538. ret = thermal_zone_get_temp(thermal_dev, temp);
  539. if (ret)
  540. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  541. return ret;
  542. }
  543. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  544. {
  545. struct icnss_priv *priv = ctx;
  546. if (priv)
  547. complete(&priv->smp2p_soc_wake_wait);
  548. return IRQ_HANDLED;
  549. }
  550. static void register_soc_wake_notif(struct device *dev)
  551. {
  552. struct icnss_priv *priv = dev_get_drvdata(dev);
  553. struct device_node *dev_node;
  554. int irq = 0, ret = 0;
  555. if (!priv)
  556. return;
  557. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  558. if (!dev_node) {
  559. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  560. return;
  561. }
  562. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  563. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  564. ret = irq = of_irq_get_byname(dev_node,
  565. "qcom,smp2p-soc-wake-ack");
  566. if (ret < 0) {
  567. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  568. irq);
  569. return;
  570. }
  571. }
  572. ret = devm_request_threaded_irq(dev, irq, NULL,
  573. fw_soc_wake_ack_handler,
  574. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  575. IRQF_TRIGGER_FALLING,
  576. "wlanfw-soc-wake-ack", priv);
  577. if (ret < 0) {
  578. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  579. irq, ret);
  580. return;
  581. }
  582. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  583. priv->fw_soc_wake_ack_irq = irq;
  584. }
  585. int icnss_call_driver_uevent(struct icnss_priv *priv,
  586. enum icnss_uevent uevent, void *data)
  587. {
  588. struct icnss_uevent_data uevent_data;
  589. if (!priv->ops || !priv->ops->uevent)
  590. return 0;
  591. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  592. priv->state, uevent);
  593. uevent_data.uevent = uevent;
  594. uevent_data.data = data;
  595. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  596. }
  597. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  598. {
  599. int i;
  600. int ret = 0;
  601. ret = icnss_qmi_get_dms_mac(priv);
  602. if (ret == 0 && priv->dms.mac_valid)
  603. goto qmi_send;
  604. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  605. * Thus assert on failure to get MAC from DMS even after retries
  606. */
  607. if (priv->use_nv_mac) {
  608. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  609. if (priv->dms.mac_valid)
  610. break;
  611. ret = icnss_qmi_get_dms_mac(priv);
  612. if (ret != -EAGAIN)
  613. break;
  614. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  615. }
  616. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  617. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  618. ICNSS_ASSERT(0);
  619. return -EINVAL;
  620. }
  621. }
  622. qmi_send:
  623. if (priv->dms.mac_valid)
  624. ret =
  625. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  626. ARRAY_SIZE(priv->dms.mac));
  627. return ret;
  628. }
  629. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  630. enum smp2p_out_entry smp2p_entry)
  631. {
  632. int retry = 0;
  633. int error;
  634. if (priv->smp2p_info[smp2p_entry].smem_state)
  635. return;
  636. retry:
  637. priv->smp2p_info[smp2p_entry].smem_state =
  638. qcom_smem_state_get(&priv->pdev->dev,
  639. icnss_smp2p_str[smp2p_entry],
  640. &priv->smp2p_info[smp2p_entry].smem_bit);
  641. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  642. if (retry++ < SMP2P_GET_MAX_RETRY) {
  643. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  644. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  645. error, icnss_smp2p_str[smp2p_entry]);
  646. msleep(SMP2P_GET_RETRY_DELAY_MS);
  647. goto retry;
  648. }
  649. ICNSS_ASSERT(0);
  650. return;
  651. }
  652. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  653. }
  654. static inline
  655. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  656. {
  657. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  658. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  659. } else {
  660. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  661. }
  662. }
  663. static enum wlfw_wlan_rf_subtype_v01 icnss_rf_subtype_value_to_type(u32 val)
  664. {
  665. switch (val) {
  666. case WLAN_RF_SLATE:
  667. return WLFW_WLAN_RF_SLATE_V01;
  668. case WLAN_RF_APACHE:
  669. return WLFW_WLAN_RF_APACHE_V01;
  670. default:
  671. return WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01;
  672. }
  673. }
  674. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  675. void *data)
  676. {
  677. int ret = 0;
  678. int temp = 0;
  679. bool ignore_assert = false;
  680. enum wlfw_wlan_rf_subtype_v01 rf_subtype;
  681. if (!priv)
  682. return -ENODEV;
  683. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  684. clear_bit(ICNSS_FW_DOWN, &priv->state);
  685. clear_bit(ICNSS_FW_READY, &priv->state);
  686. icnss_ignore_fw_timeout(false);
  687. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  688. icnss_pr_err("QMI Server already in Connected State\n");
  689. ICNSS_ASSERT(0);
  690. }
  691. ret = icnss_connect_to_fw_server(priv, data);
  692. if (ret)
  693. goto fail;
  694. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  695. if (priv->is_slate_rfa) {
  696. if (!test_bit(ICNSS_SLATE_UP, &priv->state)) {
  697. reinit_completion(&priv->slate_boot_complete);
  698. icnss_pr_dbg("Waiting for slate boot up notification, 0x%lx\n",
  699. priv->state);
  700. wait_for_completion(&priv->slate_boot_complete);
  701. }
  702. send_wlan_state(GMI_MGR_WLAN_BOOT_INIT);
  703. icnss_pr_info("sent wlan boot init command\n");
  704. }
  705. ret = wlfw_ind_register_send_sync_msg(priv);
  706. if (ret < 0) {
  707. if (ret == -EALREADY) {
  708. ret = 0;
  709. goto qmi_registered;
  710. }
  711. ignore_assert = true;
  712. goto fail;
  713. }
  714. if (priv->is_rf_subtype_valid) {
  715. rf_subtype = icnss_rf_subtype_value_to_type(priv->rf_subtype);
  716. if (rf_subtype != WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01) {
  717. ret = wlfw_wlan_hw_init_cfg_msg(priv, rf_subtype);
  718. if (ret < 0)
  719. icnss_pr_dbg("Sending rf_subtype failed ret %d\n",
  720. ret);
  721. } else {
  722. icnss_pr_dbg("Invalid rf subtype %d in DT\n",
  723. priv->rf_subtype);
  724. }
  725. }
  726. if (priv->device_id == WCN6750_DEVICE_ID) {
  727. if (!icnss_get_temperature(priv, &temp)) {
  728. icnss_pr_dbg("Temperature: %d\n", temp);
  729. if (temp < WLAN_EN_TEMP_THRESHOLD)
  730. icnss_set_wlan_en_delay(priv);
  731. }
  732. ret = wlfw_host_cap_send_sync(priv);
  733. if (ret < 0)
  734. goto fail;
  735. }
  736. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  737. if (!priv->msa_va) {
  738. icnss_pr_err("Invalid MSA address\n");
  739. ret = -EINVAL;
  740. goto fail;
  741. }
  742. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  743. if (ret < 0) {
  744. ignore_assert = true;
  745. goto fail;
  746. }
  747. ret = wlfw_msa_ready_send_sync_msg(priv);
  748. if (ret < 0) {
  749. ignore_assert = true;
  750. goto fail;
  751. }
  752. }
  753. ret = wlfw_cap_send_sync_msg(priv);
  754. if (ret < 0) {
  755. ignore_assert = true;
  756. goto fail;
  757. }
  758. ret = icnss_hw_power_on(priv);
  759. if (ret)
  760. goto fail;
  761. if (priv->device_id == WCN6750_DEVICE_ID) {
  762. ret = wlfw_device_info_send_msg(priv);
  763. if (ret < 0) {
  764. ignore_assert = true;
  765. goto device_info_failure;
  766. }
  767. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  768. priv->mem_base_pa,
  769. priv->mem_base_size);
  770. if (!priv->mem_base_va) {
  771. icnss_pr_err("Ioremap failed for bar address\n");
  772. goto device_info_failure;
  773. }
  774. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  775. &priv->mem_base_pa,
  776. priv->mem_base_va);
  777. if (priv->mhi_state_info_pa)
  778. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  779. priv->mhi_state_info_pa,
  780. PAGE_SIZE);
  781. if (!priv->mhi_state_info_va)
  782. icnss_pr_err("Ioremap failed for MHI info address\n");
  783. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  784. &priv->mhi_state_info_pa,
  785. priv->mhi_state_info_va);
  786. }
  787. if (priv->bdf_download_support) {
  788. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  789. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  790. priv->ctrl_params.bdf_type);
  791. if (ret < 0)
  792. goto device_info_failure;
  793. }
  794. if (priv->device_id == WCN6750_DEVICE_ID) {
  795. if (!priv->fw_soc_wake_ack_irq)
  796. register_soc_wake_notif(&priv->pdev->dev);
  797. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  798. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  799. }
  800. if (priv->wpss_supported)
  801. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  802. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  803. if (priv->bdf_download_support) {
  804. ret = wlfw_cal_report_req(priv);
  805. if (ret < 0)
  806. goto device_info_failure;
  807. }
  808. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  809. dynamic_feature_mask);
  810. }
  811. if (!priv->fw_error_fatal_irq)
  812. register_fw_error_notifications(&priv->pdev->dev);
  813. if (!priv->fw_early_crash_irq)
  814. register_early_crash_notifications(&priv->pdev->dev);
  815. if (priv->psf_supported)
  816. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  817. return ret;
  818. device_info_failure:
  819. icnss_hw_power_off(priv);
  820. fail:
  821. ICNSS_ASSERT(ignore_assert);
  822. qmi_registered:
  823. return ret;
  824. }
  825. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  826. {
  827. if (!priv)
  828. return -ENODEV;
  829. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  830. icnss_clear_server(priv);
  831. if (priv->psf_supported)
  832. priv->last_updated_voltage = 0;
  833. return 0;
  834. }
  835. static int icnss_call_driver_probe(struct icnss_priv *priv)
  836. {
  837. int ret = 0;
  838. int probe_cnt = 0;
  839. if (!priv->ops || !priv->ops->probe)
  840. return 0;
  841. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  842. return -EINVAL;
  843. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  844. icnss_hw_power_on(priv);
  845. icnss_block_shutdown(true);
  846. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  847. ret = priv->ops->probe(&priv->pdev->dev);
  848. probe_cnt++;
  849. if (ret != -EPROBE_DEFER)
  850. break;
  851. }
  852. if (ret < 0) {
  853. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  854. ret, priv->state, probe_cnt);
  855. icnss_block_shutdown(false);
  856. goto out;
  857. }
  858. icnss_block_shutdown(false);
  859. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  860. return 0;
  861. out:
  862. icnss_hw_power_off(priv);
  863. return ret;
  864. }
  865. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  866. {
  867. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  868. goto out;
  869. if (!priv->ops || !priv->ops->shutdown)
  870. goto out;
  871. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  872. goto out;
  873. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  874. priv->ops->shutdown(&priv->pdev->dev);
  875. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  876. out:
  877. return 0;
  878. }
  879. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  880. {
  881. int ret = 0;
  882. icnss_pm_relax(priv);
  883. icnss_call_driver_shutdown(priv);
  884. clear_bit(ICNSS_PDR, &priv->state);
  885. clear_bit(ICNSS_REJUVENATE, &priv->state);
  886. clear_bit(ICNSS_PD_RESTART, &priv->state);
  887. priv->early_crash_ind = false;
  888. priv->is_ssr = false;
  889. if (!priv->ops || !priv->ops->reinit)
  890. goto out;
  891. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  892. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  893. priv->state);
  894. goto out;
  895. }
  896. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  897. goto call_probe;
  898. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  899. icnss_hw_power_on(priv);
  900. icnss_block_shutdown(true);
  901. ret = priv->ops->reinit(&priv->pdev->dev);
  902. if (ret < 0) {
  903. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  904. ret, priv->state);
  905. if (!priv->allow_recursive_recovery)
  906. ICNSS_ASSERT(false);
  907. icnss_block_shutdown(false);
  908. goto out_power_off;
  909. }
  910. icnss_block_shutdown(false);
  911. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  912. return 0;
  913. call_probe:
  914. return icnss_call_driver_probe(priv);
  915. out_power_off:
  916. icnss_hw_power_off(priv);
  917. out:
  918. return ret;
  919. }
  920. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  921. {
  922. int ret = 0;
  923. if (!priv)
  924. return -ENODEV;
  925. del_timer(&priv->recovery_timer);
  926. set_bit(ICNSS_FW_READY, &priv->state);
  927. clear_bit(ICNSS_MODE_ON, &priv->state);
  928. atomic_set(&priv->soc_wake_ref_count, 0);
  929. if (priv->device_id == WCN6750_DEVICE_ID)
  930. icnss_free_qdss_mem(priv);
  931. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  932. icnss_hw_power_off(priv);
  933. if (!priv->pdev) {
  934. icnss_pr_err("Device is not ready\n");
  935. ret = -ENODEV;
  936. goto out;
  937. }
  938. if (priv->is_slate_rfa && test_bit(ICNSS_SLATE_UP, &priv->state)) {
  939. send_wlan_state(GMI_MGR_WLAN_BOOT_COMPLETE);
  940. icnss_pr_info("sent wlan boot complete command\n");
  941. }
  942. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  943. ret = icnss_pd_restart_complete(priv);
  944. } else {
  945. if (priv->wpss_supported)
  946. icnss_setup_dms_mac(priv);
  947. ret = icnss_call_driver_probe(priv);
  948. }
  949. icnss_vreg_unvote(priv);
  950. out:
  951. return ret;
  952. }
  953. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  954. {
  955. int ret = 0;
  956. if (!priv)
  957. return -ENODEV;
  958. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  959. if (icnss_wlfw_qdss_dnld_send_sync(priv))
  960. icnss_pr_info("Failed to download qdss configuration file");
  961. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state)) {
  962. mod_timer(&priv->recovery_timer,
  963. jiffies + msecs_to_jiffies(ICNSS_CAL_TIMEOUT));
  964. ret = wlfw_wlan_mode_send_sync_msg(priv,
  965. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  966. } else {
  967. icnss_driver_event_fw_ready_ind(priv, NULL);
  968. }
  969. return ret;
  970. }
  971. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  972. {
  973. struct platform_device *pdev = priv->pdev;
  974. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  975. int i, j;
  976. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  977. if (!qdss_mem[i].va && qdss_mem[i].size) {
  978. qdss_mem[i].va =
  979. dma_alloc_coherent(&pdev->dev,
  980. qdss_mem[i].size,
  981. &qdss_mem[i].pa,
  982. GFP_KERNEL);
  983. if (!qdss_mem[i].va) {
  984. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  985. qdss_mem[i].size,
  986. qdss_mem[i].type, i);
  987. break;
  988. }
  989. }
  990. }
  991. /* Best-effort allocation for QDSS trace */
  992. if (i < priv->qdss_mem_seg_len) {
  993. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  994. qdss_mem[j].type = 0;
  995. qdss_mem[j].size = 0;
  996. }
  997. priv->qdss_mem_seg_len = i;
  998. }
  999. return 0;
  1000. }
  1001. void icnss_free_qdss_mem(struct icnss_priv *priv)
  1002. {
  1003. struct platform_device *pdev = priv->pdev;
  1004. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1005. int i;
  1006. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1007. if (qdss_mem[i].va && qdss_mem[i].size) {
  1008. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  1009. &qdss_mem[i].pa, qdss_mem[i].size,
  1010. qdss_mem[i].type);
  1011. dma_free_coherent(&pdev->dev,
  1012. qdss_mem[i].size, qdss_mem[i].va,
  1013. qdss_mem[i].pa);
  1014. qdss_mem[i].va = NULL;
  1015. qdss_mem[i].pa = 0;
  1016. qdss_mem[i].size = 0;
  1017. qdss_mem[i].type = 0;
  1018. }
  1019. }
  1020. priv->qdss_mem_seg_len = 0;
  1021. }
  1022. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  1023. {
  1024. int ret = 0;
  1025. ret = icnss_alloc_qdss_mem(priv);
  1026. if (ret < 0)
  1027. return ret;
  1028. return wlfw_qdss_trace_mem_info_send_sync(priv);
  1029. }
  1030. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  1031. u64 pa, u32 size, int *seg_id)
  1032. {
  1033. int i = 0;
  1034. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1035. u64 offset = 0;
  1036. void *va = NULL;
  1037. u64 local_pa;
  1038. u32 local_size;
  1039. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1040. local_pa = (u64)qdss_mem[i].pa;
  1041. local_size = (u32)qdss_mem[i].size;
  1042. if (pa == local_pa && size <= local_size) {
  1043. va = qdss_mem[i].va;
  1044. break;
  1045. }
  1046. if (pa > local_pa &&
  1047. pa < local_pa + local_size &&
  1048. pa + size <= local_pa + local_size) {
  1049. offset = pa - local_pa;
  1050. va = qdss_mem[i].va + offset;
  1051. break;
  1052. }
  1053. }
  1054. *seg_id = i;
  1055. return va;
  1056. }
  1057. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1058. void *data)
  1059. {
  1060. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1061. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1062. int ret = 0;
  1063. int i;
  1064. void *va = NULL;
  1065. u64 pa;
  1066. u32 size;
  1067. int seg_id = 0;
  1068. if (!priv->qdss_mem_seg_len) {
  1069. icnss_pr_err("Memory for QDSS trace is not available\n");
  1070. return -ENOMEM;
  1071. }
  1072. if (event_data->mem_seg_len == 0) {
  1073. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1074. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1075. ICNSS_GENL_MSG_TYPE_QDSS,
  1076. event_data->file_name,
  1077. qdss_mem[i].size);
  1078. if (ret < 0) {
  1079. icnss_pr_err("Fail to save QDSS data: %d\n",
  1080. ret);
  1081. break;
  1082. }
  1083. }
  1084. } else {
  1085. for (i = 0; i < event_data->mem_seg_len; i++) {
  1086. pa = event_data->mem_seg[i].addr;
  1087. size = event_data->mem_seg[i].size;
  1088. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1089. size, &seg_id);
  1090. if (!va) {
  1091. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1092. &pa);
  1093. ret = -EINVAL;
  1094. break;
  1095. }
  1096. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1097. event_data->file_name, size);
  1098. if (ret < 0) {
  1099. icnss_pr_err("Fail to save QDSS data: %d\n",
  1100. ret);
  1101. break;
  1102. }
  1103. }
  1104. }
  1105. kfree(data);
  1106. return ret;
  1107. }
  1108. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1109. {
  1110. int dec, c = atomic_read(v);
  1111. do {
  1112. dec = c - 1;
  1113. if (unlikely(dec < 1))
  1114. break;
  1115. } while (!atomic_try_cmpxchg(v, &c, dec));
  1116. return dec;
  1117. }
  1118. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1119. void *data)
  1120. {
  1121. int ret = 0;
  1122. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1123. if (!priv)
  1124. return -ENODEV;
  1125. if (!data)
  1126. return -EINVAL;
  1127. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1128. event_data->total_size);
  1129. kfree(data);
  1130. return ret;
  1131. }
  1132. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1133. {
  1134. int ret = 0;
  1135. if (!priv)
  1136. return -ENODEV;
  1137. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1138. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1139. atomic_read(&priv->soc_wake_ref_count));
  1140. return 0;
  1141. }
  1142. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1143. ICNSS_SMP2P_OUT_SOC_WAKE);
  1144. if (!ret)
  1145. atomic_inc(&priv->soc_wake_ref_count);
  1146. return ret;
  1147. }
  1148. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1149. {
  1150. int ret = 0;
  1151. if (!priv)
  1152. return -ENODEV;
  1153. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1154. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1155. priv->soc_wake_ref_count);
  1156. return 0;
  1157. }
  1158. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1159. ICNSS_SMP2P_OUT_SOC_WAKE);
  1160. return ret;
  1161. }
  1162. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1163. void *data)
  1164. {
  1165. int ret = 0;
  1166. int probe_cnt = 0;
  1167. if (priv->ops)
  1168. return -EEXIST;
  1169. priv->ops = data;
  1170. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1171. set_bit(ICNSS_FW_READY, &priv->state);
  1172. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1173. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1174. priv->state);
  1175. return -ENODEV;
  1176. }
  1177. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1178. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1179. priv->state);
  1180. goto out;
  1181. }
  1182. ret = icnss_hw_power_on(priv);
  1183. if (ret)
  1184. goto out;
  1185. icnss_block_shutdown(true);
  1186. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1187. ret = priv->ops->probe(&priv->pdev->dev);
  1188. probe_cnt++;
  1189. if (ret != -EPROBE_DEFER)
  1190. break;
  1191. }
  1192. if (ret) {
  1193. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1194. ret, priv->state, probe_cnt);
  1195. icnss_block_shutdown(false);
  1196. goto power_off;
  1197. }
  1198. icnss_block_shutdown(false);
  1199. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1200. return 0;
  1201. power_off:
  1202. icnss_hw_power_off(priv);
  1203. out:
  1204. return ret;
  1205. }
  1206. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1207. void *data)
  1208. {
  1209. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1210. priv->ops = NULL;
  1211. goto out;
  1212. }
  1213. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1214. icnss_block_shutdown(true);
  1215. if (priv->ops)
  1216. priv->ops->remove(&priv->pdev->dev);
  1217. icnss_block_shutdown(false);
  1218. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1219. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1220. priv->ops = NULL;
  1221. icnss_hw_power_off(priv);
  1222. out:
  1223. return 0;
  1224. }
  1225. static int icnss_fw_crashed(struct icnss_priv *priv,
  1226. struct icnss_event_pd_service_down_data *event_data)
  1227. {
  1228. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1229. set_bit(ICNSS_PD_RESTART, &priv->state);
  1230. clear_bit(ICNSS_FW_READY, &priv->state);
  1231. icnss_pm_stay_awake(priv);
  1232. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1233. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_CRASHED, NULL);
  1234. if (event_data && event_data->fw_rejuvenate)
  1235. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1236. return 0;
  1237. }
  1238. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1239. struct icnss_uevent_hang_data *hang_data)
  1240. {
  1241. if (!priv->hang_event_data_va)
  1242. return -EINVAL;
  1243. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1244. priv->hang_event_data_len,
  1245. GFP_ATOMIC);
  1246. if (!priv->hang_event_data)
  1247. return -ENOMEM;
  1248. // Update the hang event params
  1249. hang_data->hang_event_data = priv->hang_event_data;
  1250. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1251. return 0;
  1252. }
  1253. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1254. {
  1255. struct icnss_uevent_hang_data hang_data = {0};
  1256. int ret = 0xFF;
  1257. if (priv->early_crash_ind) {
  1258. ret = icnss_update_hang_event_data(priv, &hang_data);
  1259. if (ret)
  1260. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1261. }
  1262. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1263. &hang_data);
  1264. if (!ret) {
  1265. kfree(priv->hang_event_data);
  1266. priv->hang_event_data = NULL;
  1267. }
  1268. return 0;
  1269. }
  1270. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1271. void *data)
  1272. {
  1273. struct icnss_event_pd_service_down_data *event_data = data;
  1274. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1275. icnss_ignore_fw_timeout(false);
  1276. goto out;
  1277. }
  1278. if (priv->force_err_fatal)
  1279. ICNSS_ASSERT(0);
  1280. if (priv->device_id == WCN6750_DEVICE_ID) {
  1281. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1282. ICNSS_SMP2P_OUT_SOC_WAKE);
  1283. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1284. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1285. }
  1286. if (priv->wpss_supported)
  1287. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1288. ICNSS_SMP2P_OUT_POWER_SAVE);
  1289. icnss_send_hang_event_data(priv);
  1290. if (priv->early_crash_ind) {
  1291. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1292. event_data->crashed, priv->state);
  1293. goto out;
  1294. }
  1295. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1296. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1297. event_data->crashed, priv->state);
  1298. if (!priv->allow_recursive_recovery)
  1299. ICNSS_ASSERT(0);
  1300. goto out;
  1301. }
  1302. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1303. icnss_fw_crashed(priv, event_data);
  1304. out:
  1305. kfree(data);
  1306. return 0;
  1307. }
  1308. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1309. void *data)
  1310. {
  1311. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1312. icnss_ignore_fw_timeout(false);
  1313. goto out;
  1314. }
  1315. priv->early_crash_ind = true;
  1316. icnss_fw_crashed(priv, NULL);
  1317. out:
  1318. kfree(data);
  1319. return 0;
  1320. }
  1321. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1322. void *data)
  1323. {
  1324. int ret = 0;
  1325. if (!priv->ops || !priv->ops->idle_shutdown)
  1326. return 0;
  1327. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1328. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1329. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1330. ret = -EBUSY;
  1331. } else {
  1332. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1333. priv->state);
  1334. icnss_block_shutdown(true);
  1335. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1336. icnss_block_shutdown(false);
  1337. }
  1338. return ret;
  1339. }
  1340. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1341. void *data)
  1342. {
  1343. int ret = 0;
  1344. if (!priv->ops || !priv->ops->idle_restart)
  1345. return 0;
  1346. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1347. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1348. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1349. ret = -EBUSY;
  1350. } else {
  1351. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1352. priv->state);
  1353. icnss_block_shutdown(true);
  1354. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1355. icnss_block_shutdown(false);
  1356. }
  1357. return ret;
  1358. }
  1359. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1360. {
  1361. icnss_free_qdss_mem(priv);
  1362. return 0;
  1363. }
  1364. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1365. void *data)
  1366. {
  1367. struct icnss_m3_upload_segments_req_data *event_data = data;
  1368. struct qcom_dump_segment segment;
  1369. int i, status = 0, ret = 0;
  1370. struct list_head head;
  1371. if (!dump_enabled()) {
  1372. icnss_pr_info("Dump collection is not enabled\n");
  1373. return ret;
  1374. }
  1375. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1376. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1377. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1378. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1379. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1380. return ret;
  1381. INIT_LIST_HEAD(&head);
  1382. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1383. memset(&segment, 0, sizeof(segment));
  1384. segment.va = devm_ioremap(&priv->pdev->dev,
  1385. event_data->m3_segment[i].addr,
  1386. event_data->m3_segment[i].size);
  1387. if (!segment.va) {
  1388. icnss_pr_err("Failed to ioremap M3 Dump region");
  1389. ret = -ENOMEM;
  1390. goto send_resp;
  1391. }
  1392. segment.size = event_data->m3_segment[i].size;
  1393. list_add(&segment.node, &head);
  1394. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1395. event_data->m3_segment[i].name);
  1396. switch (event_data->m3_segment[i].type) {
  1397. case QMI_M3_SEGMENT_PHYAREG_V01:
  1398. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1399. break;
  1400. case QMI_M3_SEGMENT_PHYDBG_V01:
  1401. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1402. break;
  1403. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1404. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1405. break;
  1406. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1407. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1408. break;
  1409. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1410. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1411. break;
  1412. default:
  1413. icnss_pr_err("Invalid Segment type: %d",
  1414. event_data->m3_segment[i].type);
  1415. }
  1416. if (ret) {
  1417. status = ret;
  1418. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1419. event_data->m3_segment[i].name, ret);
  1420. }
  1421. list_del(&segment.node);
  1422. }
  1423. send_resp:
  1424. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1425. status);
  1426. return ret;
  1427. }
  1428. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1429. {
  1430. int ret = 0;
  1431. struct icnss_subsys_restart_level_data *event_data = data;
  1432. if (!priv)
  1433. return -ENODEV;
  1434. if (!data)
  1435. return -EINVAL;
  1436. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1437. kfree(data);
  1438. return ret;
  1439. }
  1440. static void icnss_driver_event_work(struct work_struct *work)
  1441. {
  1442. struct icnss_priv *priv =
  1443. container_of(work, struct icnss_priv, event_work);
  1444. struct icnss_driver_event *event;
  1445. unsigned long flags;
  1446. int ret;
  1447. icnss_pm_stay_awake(priv);
  1448. spin_lock_irqsave(&priv->event_lock, flags);
  1449. while (!list_empty(&priv->event_list)) {
  1450. event = list_first_entry(&priv->event_list,
  1451. struct icnss_driver_event, list);
  1452. list_del(&event->list);
  1453. spin_unlock_irqrestore(&priv->event_lock, flags);
  1454. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1455. icnss_driver_event_to_str(event->type),
  1456. event->sync ? "-sync" : "", event->type,
  1457. priv->state);
  1458. switch (event->type) {
  1459. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1460. ret = icnss_driver_event_server_arrive(priv,
  1461. event->data);
  1462. break;
  1463. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1464. ret = icnss_driver_event_server_exit(priv);
  1465. break;
  1466. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1467. ret = icnss_driver_event_fw_ready_ind(priv,
  1468. event->data);
  1469. break;
  1470. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1471. ret = icnss_driver_event_register_driver(priv,
  1472. event->data);
  1473. break;
  1474. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1475. ret = icnss_driver_event_unregister_driver(priv,
  1476. event->data);
  1477. break;
  1478. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1479. ret = icnss_driver_event_pd_service_down(priv,
  1480. event->data);
  1481. break;
  1482. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1483. ret = icnss_driver_event_early_crash_ind(priv,
  1484. event->data);
  1485. break;
  1486. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1487. ret = icnss_driver_event_idle_shutdown(priv,
  1488. event->data);
  1489. break;
  1490. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1491. ret = icnss_driver_event_idle_restart(priv,
  1492. event->data);
  1493. break;
  1494. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1495. ret = icnss_driver_event_fw_init_done(priv,
  1496. event->data);
  1497. break;
  1498. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1499. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1500. break;
  1501. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1502. ret = icnss_qdss_trace_save_hdlr(priv,
  1503. event->data);
  1504. break;
  1505. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1506. ret = icnss_qdss_trace_free_hdlr(priv);
  1507. break;
  1508. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1509. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1510. break;
  1511. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1512. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1513. event->data);
  1514. break;
  1515. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1516. ret = icnss_subsys_restart_level(priv, event->data);
  1517. break;
  1518. default:
  1519. icnss_pr_err("Invalid Event type: %d", event->type);
  1520. kfree(event);
  1521. continue;
  1522. }
  1523. priv->stats.events[event->type].processed++;
  1524. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1525. icnss_driver_event_to_str(event->type),
  1526. event->sync ? "-sync" : "", event->type, ret,
  1527. priv->state);
  1528. spin_lock_irqsave(&priv->event_lock, flags);
  1529. if (event->sync) {
  1530. event->ret = ret;
  1531. complete(&event->complete);
  1532. continue;
  1533. }
  1534. spin_unlock_irqrestore(&priv->event_lock, flags);
  1535. kfree(event);
  1536. spin_lock_irqsave(&priv->event_lock, flags);
  1537. }
  1538. spin_unlock_irqrestore(&priv->event_lock, flags);
  1539. icnss_pm_relax(priv);
  1540. }
  1541. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1542. {
  1543. struct icnss_priv *priv =
  1544. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1545. struct icnss_soc_wake_event *event;
  1546. unsigned long flags;
  1547. int ret;
  1548. icnss_pm_stay_awake(priv);
  1549. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1550. while (!list_empty(&priv->soc_wake_msg_list)) {
  1551. event = list_first_entry(&priv->soc_wake_msg_list,
  1552. struct icnss_soc_wake_event, list);
  1553. list_del(&event->list);
  1554. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1555. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1556. icnss_soc_wake_event_to_str(event->type),
  1557. event->sync ? "-sync" : "", event->type,
  1558. priv->state);
  1559. switch (event->type) {
  1560. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1561. ret = icnss_event_soc_wake_request(priv,
  1562. event->data);
  1563. break;
  1564. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1565. ret = icnss_event_soc_wake_release(priv,
  1566. event->data);
  1567. break;
  1568. default:
  1569. icnss_pr_err("Invalid Event type: %d", event->type);
  1570. kfree(event);
  1571. continue;
  1572. }
  1573. priv->stats.soc_wake_events[event->type].processed++;
  1574. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1575. icnss_soc_wake_event_to_str(event->type),
  1576. event->sync ? "-sync" : "", event->type, ret,
  1577. priv->state);
  1578. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1579. if (event->sync) {
  1580. event->ret = ret;
  1581. complete(&event->complete);
  1582. continue;
  1583. }
  1584. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1585. kfree(event);
  1586. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1587. }
  1588. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1589. icnss_pm_relax(priv);
  1590. }
  1591. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1592. {
  1593. int ret = 0;
  1594. struct qcom_dump_segment segment;
  1595. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1596. struct list_head head;
  1597. if (!dump_enabled()) {
  1598. icnss_pr_info("Dump collection is not enabled\n");
  1599. return ret;
  1600. }
  1601. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1602. return ret;
  1603. INIT_LIST_HEAD(&head);
  1604. memset(&segment, 0, sizeof(segment));
  1605. segment.va = priv->msa_va;
  1606. segment.size = priv->msa_mem_size;
  1607. list_add(&segment.node, &head);
  1608. if (!msa0_dump_dev->dev) {
  1609. icnss_pr_err("Created Dump Device not found\n");
  1610. return 0;
  1611. }
  1612. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1613. if (ret) {
  1614. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1615. return ret;
  1616. }
  1617. list_del(&segment.node);
  1618. return ret;
  1619. }
  1620. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1621. void *data)
  1622. {
  1623. struct qcom_ssr_notify_data *notif = data;
  1624. int ret = 0;
  1625. if (!notif->crashed) {
  1626. if (atomic_read(&priv->is_shutdown)) {
  1627. atomic_set(&priv->is_shutdown, false);
  1628. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1629. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1630. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1631. clear_bit(ICNSS_FW_READY, &priv->state);
  1632. icnss_driver_event_post(priv,
  1633. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1634. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1635. NULL);
  1636. }
  1637. }
  1638. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1639. if (!wait_for_completion_timeout(
  1640. &priv->unblock_shutdown,
  1641. msecs_to_jiffies(PROBE_TIMEOUT)))
  1642. icnss_pr_err("modem block shutdown timeout\n");
  1643. }
  1644. ret = wlfw_send_modem_shutdown_msg(priv);
  1645. if (ret < 0)
  1646. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1647. ret);
  1648. }
  1649. }
  1650. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1651. {
  1652. switch (code) {
  1653. case QCOM_SSR_BEFORE_POWERUP:
  1654. return "BEFORE_POWERUP";
  1655. case QCOM_SSR_AFTER_POWERUP:
  1656. return "AFTER_POWERUP";
  1657. case QCOM_SSR_BEFORE_SHUTDOWN:
  1658. return "BEFORE_SHUTDOWN";
  1659. case QCOM_SSR_AFTER_SHUTDOWN:
  1660. return "AFTER_SHUTDOWN";
  1661. default:
  1662. return "UNKNOWN";
  1663. }
  1664. };
  1665. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1666. unsigned long code,
  1667. void *data)
  1668. {
  1669. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1670. wpss_early_ssr_nb);
  1671. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1672. icnss_qcom_ssr_notify_state_to_str(code), code);
  1673. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1674. set_bit(ICNSS_FW_DOWN, &priv->state);
  1675. icnss_ignore_fw_timeout(true);
  1676. }
  1677. return NOTIFY_DONE;
  1678. }
  1679. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1680. unsigned long code,
  1681. void *data)
  1682. {
  1683. struct icnss_event_pd_service_down_data *event_data;
  1684. struct qcom_ssr_notify_data *notif = data;
  1685. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1686. wpss_ssr_nb);
  1687. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1688. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1689. icnss_qcom_ssr_notify_state_to_str(code), code);
  1690. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1691. icnss_pr_info("Collecting msa0 segment dump\n");
  1692. icnss_msa0_ramdump(priv);
  1693. goto out;
  1694. }
  1695. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1696. goto out;
  1697. priv->is_ssr = true;
  1698. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1699. priv->state, notif->crashed);
  1700. if (priv->device_id == ADRASTEA_DEVICE_ID)
  1701. icnss_update_state_send_modem_shutdown(priv, data);
  1702. set_bit(ICNSS_FW_DOWN, &priv->state);
  1703. icnss_ignore_fw_timeout(true);
  1704. if (notif->crashed)
  1705. priv->stats.recovery.root_pd_crash++;
  1706. else
  1707. priv->stats.recovery.root_pd_shutdown++;
  1708. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1709. if (event_data == NULL)
  1710. return notifier_from_errno(-ENOMEM);
  1711. event_data->crashed = notif->crashed;
  1712. fw_down_data.crashed = !!notif->crashed;
  1713. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1714. clear_bit(ICNSS_FW_READY, &priv->state);
  1715. fw_down_data.crashed = !!notif->crashed;
  1716. icnss_call_driver_uevent(priv,
  1717. ICNSS_UEVENT_FW_DOWN,
  1718. &fw_down_data);
  1719. }
  1720. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1721. ICNSS_EVENT_SYNC, event_data);
  1722. if (notif->crashed)
  1723. mod_timer(&priv->recovery_timer,
  1724. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1725. out:
  1726. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1727. return NOTIFY_OK;
  1728. }
  1729. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1730. unsigned long code,
  1731. void *data)
  1732. {
  1733. struct icnss_event_pd_service_down_data *event_data;
  1734. struct qcom_ssr_notify_data *notif = data;
  1735. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1736. modem_ssr_nb);
  1737. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1738. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1739. icnss_qcom_ssr_notify_state_to_str(code), code);
  1740. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1741. icnss_pr_info("Collecting msa0 segment dump\n");
  1742. icnss_msa0_ramdump(priv);
  1743. goto out;
  1744. }
  1745. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1746. goto out;
  1747. priv->is_ssr = true;
  1748. if (notif->crashed) {
  1749. priv->stats.recovery.root_pd_crash++;
  1750. priv->root_pd_shutdown = false;
  1751. } else {
  1752. priv->stats.recovery.root_pd_shutdown++;
  1753. priv->root_pd_shutdown = true;
  1754. }
  1755. icnss_update_state_send_modem_shutdown(priv, data);
  1756. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1757. set_bit(ICNSS_FW_DOWN, &priv->state);
  1758. icnss_ignore_fw_timeout(true);
  1759. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1760. clear_bit(ICNSS_FW_READY, &priv->state);
  1761. fw_down_data.crashed = !!notif->crashed;
  1762. icnss_call_driver_uevent(priv,
  1763. ICNSS_UEVENT_FW_DOWN,
  1764. &fw_down_data);
  1765. }
  1766. goto out;
  1767. }
  1768. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1769. priv->state, notif->crashed);
  1770. set_bit(ICNSS_FW_DOWN, &priv->state);
  1771. icnss_ignore_fw_timeout(true);
  1772. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1773. if (event_data == NULL)
  1774. return notifier_from_errno(-ENOMEM);
  1775. event_data->crashed = notif->crashed;
  1776. fw_down_data.crashed = !!notif->crashed;
  1777. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1778. clear_bit(ICNSS_FW_READY, &priv->state);
  1779. fw_down_data.crashed = !!notif->crashed;
  1780. icnss_call_driver_uevent(priv,
  1781. ICNSS_UEVENT_FW_DOWN,
  1782. &fw_down_data);
  1783. }
  1784. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1785. ICNSS_EVENT_SYNC, event_data);
  1786. if (notif->crashed)
  1787. mod_timer(&priv->recovery_timer,
  1788. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1789. out:
  1790. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1791. return NOTIFY_OK;
  1792. }
  1793. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1794. {
  1795. int ret = 0;
  1796. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1797. priv->wpss_early_notify_handler =
  1798. qcom_register_early_ssr_notifier("wpss",
  1799. &priv->wpss_early_ssr_nb);
  1800. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1801. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1802. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1803. }
  1804. return ret;
  1805. }
  1806. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1807. {
  1808. int ret = 0;
  1809. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1810. /*
  1811. * Assign priority of icnss wpss notifier callback over IPA
  1812. * modem notifier callback which is 0
  1813. */
  1814. priv->wpss_ssr_nb.priority = 1;
  1815. priv->wpss_notify_handler =
  1816. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1817. if (IS_ERR(priv->wpss_notify_handler)) {
  1818. ret = PTR_ERR(priv->wpss_notify_handler);
  1819. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1820. }
  1821. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1822. return ret;
  1823. }
  1824. static int icnss_slate_notifier_nb(struct notifier_block *nb,
  1825. unsigned long code,
  1826. void *data)
  1827. {
  1828. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1829. slate_ssr_nb);
  1830. int ret = 0;
  1831. icnss_pr_vdbg("Slate-subsys-notify: event %lu\n", code);
  1832. if (code == QCOM_SSR_AFTER_POWERUP) {
  1833. set_bit(ICNSS_SLATE_UP, &priv->state);
  1834. complete(&priv->slate_boot_complete);
  1835. icnss_pr_dbg("Slate boot complete, state: 0x%lx\n",
  1836. priv->state);
  1837. } else if (code == QCOM_SSR_BEFORE_SHUTDOWN &&
  1838. test_bit(ICNSS_SLATE_UP, &priv->state)) {
  1839. clear_bit(ICNSS_SLATE_UP, &priv->state);
  1840. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1841. icnss_pr_err("PD_RESTART in progress 0x%lx\n",
  1842. priv->state);
  1843. goto skip_pdr;
  1844. }
  1845. icnss_pr_dbg("Initiating PDR 0x%lx\n", priv->state);
  1846. ret = icnss_trigger_recovery(&priv->pdev->dev);
  1847. if (ret < 0) {
  1848. icnss_fatal_err("Fail to trigger PDR: ret: %d, state: 0x%lx\n",
  1849. ret, priv->state);
  1850. goto skip_pdr;
  1851. }
  1852. }
  1853. skip_pdr:
  1854. return NOTIFY_OK;
  1855. }
  1856. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  1857. {
  1858. int ret = 0;
  1859. priv->slate_ssr_nb.notifier_call = icnss_slate_notifier_nb;
  1860. priv->slate_notify_handler =
  1861. qcom_register_ssr_notifier("slatefw", &priv->slate_ssr_nb);
  1862. if (IS_ERR(priv->slate_notify_handler)) {
  1863. ret = PTR_ERR(priv->slate_notify_handler);
  1864. icnss_pr_err("SLATE register notifier failed: %d\n", ret);
  1865. }
  1866. set_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state);
  1867. return ret;
  1868. }
  1869. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  1870. {
  1871. if (!test_and_clear_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state))
  1872. return 0;
  1873. qcom_unregister_ssr_notifier(priv->slate_notify_handler,
  1874. &priv->slate_ssr_nb);
  1875. priv->slate_notify_handler = NULL;
  1876. return 0;
  1877. }
  1878. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  1879. {
  1880. int ret = 0;
  1881. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  1882. /*
  1883. * Assign priority of icnss modem notifier callback over IPA
  1884. * modem notifier callback which is 0
  1885. */
  1886. priv->modem_ssr_nb.priority = 1;
  1887. priv->modem_notify_handler =
  1888. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  1889. if (IS_ERR(priv->modem_notify_handler)) {
  1890. ret = PTR_ERR(priv->modem_notify_handler);
  1891. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  1892. }
  1893. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1894. return ret;
  1895. }
  1896. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  1897. {
  1898. if (IS_ERR(priv->wpss_early_notify_handler))
  1899. return;
  1900. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  1901. &priv->wpss_early_ssr_nb);
  1902. priv->wpss_early_notify_handler = NULL;
  1903. }
  1904. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  1905. {
  1906. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1907. return 0;
  1908. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  1909. &priv->wpss_ssr_nb);
  1910. priv->wpss_notify_handler = NULL;
  1911. return 0;
  1912. }
  1913. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  1914. {
  1915. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1916. return 0;
  1917. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  1918. &priv->modem_ssr_nb);
  1919. priv->modem_notify_handler = NULL;
  1920. return 0;
  1921. }
  1922. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  1923. {
  1924. struct icnss_priv *priv = priv_cb;
  1925. struct icnss_event_pd_service_down_data *event_data;
  1926. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1927. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  1928. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  1929. state, priv->state);
  1930. switch (state) {
  1931. case SERVREG_SERVICE_STATE_DOWN:
  1932. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1933. if (!event_data)
  1934. return;
  1935. event_data->crashed = true;
  1936. if (!priv->is_ssr) {
  1937. set_bit(ICNSS_PDR, &penv->state);
  1938. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  1939. cause = ICNSS_HOST_ERROR;
  1940. priv->stats.recovery.pdr_host_error++;
  1941. } else {
  1942. cause = ICNSS_FW_CRASH;
  1943. priv->stats.recovery.pdr_fw_crash++;
  1944. }
  1945. } else if (priv->root_pd_shutdown) {
  1946. cause = ICNSS_ROOT_PD_SHUTDOWN;
  1947. event_data->crashed = false;
  1948. }
  1949. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  1950. priv->state, icnss_pdr_cause[cause]);
  1951. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1952. set_bit(ICNSS_FW_DOWN, &priv->state);
  1953. icnss_ignore_fw_timeout(true);
  1954. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1955. clear_bit(ICNSS_FW_READY, &priv->state);
  1956. fw_down_data.crashed = event_data->crashed;
  1957. icnss_call_driver_uevent(priv,
  1958. ICNSS_UEVENT_FW_DOWN,
  1959. &fw_down_data);
  1960. }
  1961. }
  1962. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  1963. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1964. ICNSS_EVENT_SYNC, event_data);
  1965. if (event_data->crashed)
  1966. mod_timer(&priv->recovery_timer,
  1967. jiffies +
  1968. msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1969. break;
  1970. case SERVREG_SERVICE_STATE_UP:
  1971. clear_bit(ICNSS_FW_DOWN, &priv->state);
  1972. break;
  1973. default:
  1974. break;
  1975. }
  1976. return;
  1977. }
  1978. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  1979. {
  1980. struct pdr_handle *handle = NULL;
  1981. struct pdr_service *service = NULL;
  1982. int err = 0;
  1983. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  1984. if (IS_ERR_OR_NULL(handle)) {
  1985. err = PTR_ERR(handle);
  1986. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  1987. goto out;
  1988. }
  1989. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  1990. if (IS_ERR_OR_NULL(service)) {
  1991. err = PTR_ERR(service);
  1992. icnss_pr_err("Failed to add lookup, err %d", err);
  1993. goto out;
  1994. }
  1995. priv->pdr_handle = handle;
  1996. priv->pdr_service = service;
  1997. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  1998. icnss_pr_info("PDR registration happened");
  1999. out:
  2000. return err;
  2001. }
  2002. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  2003. {
  2004. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  2005. return;
  2006. pdr_handle_release(priv->pdr_handle);
  2007. }
  2008. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  2009. {
  2010. int ret = 0;
  2011. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  2012. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  2013. ret = PTR_ERR(priv->icnss_ramdump_class);
  2014. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  2015. return ret;
  2016. }
  2017. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  2018. ICNSS_RAMDUMP_NAME);
  2019. if (ret < 0) {
  2020. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  2021. goto fail_alloc_major;
  2022. }
  2023. return 0;
  2024. fail_alloc_major:
  2025. class_destroy(priv->icnss_ramdump_class);
  2026. return ret;
  2027. }
  2028. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  2029. {
  2030. int ret = 0;
  2031. struct icnss_ramdump_info *ramdump_info;
  2032. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  2033. if (!ramdump_info)
  2034. return ERR_PTR(-ENOMEM);
  2035. if (!dev_name) {
  2036. icnss_pr_err("%s: Invalid device name.\n", __func__);
  2037. return NULL;
  2038. }
  2039. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  2040. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  2041. if (ramdump_info->minor < 0) {
  2042. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  2043. ramdump_info->minor);
  2044. ret = -ENODEV;
  2045. goto fail_out_of_minors;
  2046. }
  2047. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  2048. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  2049. ramdump_info->minor),
  2050. ramdump_info, ramdump_info->name);
  2051. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  2052. ret = PTR_ERR(ramdump_info->dev);
  2053. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  2054. ramdump_info->name, ret);
  2055. goto fail_device_create;
  2056. }
  2057. return (void *)ramdump_info;
  2058. fail_device_create:
  2059. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  2060. fail_out_of_minors:
  2061. kfree(ramdump_info);
  2062. return ERR_PTR(ret);
  2063. }
  2064. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  2065. {
  2066. int ret = 0;
  2067. if (!priv || !priv->pdev) {
  2068. icnss_pr_err("Platform priv or pdev is NULL\n");
  2069. return -EINVAL;
  2070. }
  2071. ret = icnss_ramdump_devnode_init(priv);
  2072. if (ret)
  2073. return ret;
  2074. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  2075. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  2076. icnss_pr_err("Failed to create msa0 dump device!");
  2077. return -ENOMEM;
  2078. }
  2079. if (priv->device_id == WCN6750_DEVICE_ID) {
  2080. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  2081. ICNSS_M3_SEGMENT(
  2082. ICNSS_M3_SEGMENT_PHYAREG));
  2083. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  2084. !priv->m3_dump_phyareg->dev) {
  2085. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  2086. return -ENOMEM;
  2087. }
  2088. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  2089. ICNSS_M3_SEGMENT(
  2090. ICNSS_M3_SEGMENT_PHYA));
  2091. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  2092. !priv->m3_dump_phydbg->dev) {
  2093. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  2094. return -ENOMEM;
  2095. }
  2096. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  2097. ICNSS_M3_SEGMENT(
  2098. ICNSS_M3_SEGMENT_WMACREG));
  2099. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  2100. !priv->m3_dump_wmac0reg->dev) {
  2101. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  2102. return -ENOMEM;
  2103. }
  2104. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  2105. ICNSS_M3_SEGMENT(
  2106. ICNSS_M3_SEGMENT_WCSSDBG));
  2107. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  2108. !priv->m3_dump_wcssdbg->dev) {
  2109. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  2110. return -ENOMEM;
  2111. }
  2112. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  2113. ICNSS_M3_SEGMENT(
  2114. ICNSS_M3_SEGMENT_PHYAM3));
  2115. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  2116. !priv->m3_dump_phyapdmem->dev) {
  2117. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  2118. return -ENOMEM;
  2119. }
  2120. }
  2121. return 0;
  2122. }
  2123. static int icnss_enable_recovery(struct icnss_priv *priv)
  2124. {
  2125. int ret;
  2126. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2127. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2128. return 0;
  2129. }
  2130. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2131. icnss_pr_dbg("SSR disabled through module parameter\n");
  2132. goto enable_pdr;
  2133. }
  2134. ret = icnss_register_ramdump_devices(priv);
  2135. if (ret)
  2136. return ret;
  2137. if (priv->wpss_supported) {
  2138. icnss_wpss_early_ssr_register_notifier(priv);
  2139. icnss_wpss_ssr_register_notifier(priv);
  2140. return 0;
  2141. }
  2142. icnss_modem_ssr_register_notifier(priv);
  2143. if (priv->is_slate_rfa)
  2144. icnss_slate_ssr_register_notifier(priv);
  2145. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2146. icnss_pr_dbg("PDR disabled through module parameter\n");
  2147. return 0;
  2148. }
  2149. enable_pdr:
  2150. ret = icnss_pd_restart_enable(priv);
  2151. if (ret)
  2152. return ret;
  2153. return 0;
  2154. }
  2155. static int icnss_dev_id_match(struct icnss_priv *priv,
  2156. struct device_info *dev_info)
  2157. {
  2158. while (dev_info->device_id) {
  2159. if (priv->device_id == dev_info->device_id)
  2160. return 1;
  2161. dev_info++;
  2162. }
  2163. return 0;
  2164. }
  2165. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2166. unsigned long *thermal_state)
  2167. {
  2168. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2169. *thermal_state = icnss_tcdev->max_thermal_state;
  2170. return 0;
  2171. }
  2172. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2173. unsigned long *thermal_state)
  2174. {
  2175. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2176. *thermal_state = icnss_tcdev->curr_thermal_state;
  2177. return 0;
  2178. }
  2179. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2180. unsigned long thermal_state)
  2181. {
  2182. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2183. struct device *dev = &penv->pdev->dev;
  2184. int ret = 0;
  2185. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2186. return 0;
  2187. if (thermal_state > icnss_tcdev->max_thermal_state)
  2188. return -EINVAL;
  2189. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2190. thermal_state, icnss_tcdev->tcdev_id);
  2191. mutex_lock(&penv->tcdev_lock);
  2192. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2193. icnss_tcdev->tcdev_id);
  2194. if (!ret)
  2195. icnss_tcdev->curr_thermal_state = thermal_state;
  2196. mutex_unlock(&penv->tcdev_lock);
  2197. if (ret) {
  2198. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2199. ret, icnss_tcdev->tcdev_id);
  2200. return ret;
  2201. }
  2202. return 0;
  2203. }
  2204. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2205. .get_max_state = icnss_tcdev_get_max_state,
  2206. .get_cur_state = icnss_tcdev_get_cur_state,
  2207. .set_cur_state = icnss_tcdev_set_cur_state,
  2208. };
  2209. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2210. int tcdev_id)
  2211. {
  2212. struct icnss_priv *priv = dev_get_drvdata(dev);
  2213. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2214. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2215. struct device_node *dev_node;
  2216. int ret = 0;
  2217. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2218. if (!icnss_tcdev)
  2219. return -ENOMEM;
  2220. icnss_tcdev->tcdev_id = tcdev_id;
  2221. icnss_tcdev->max_thermal_state = max_state;
  2222. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2223. "qcom,icnss_cdev%d", tcdev_id);
  2224. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2225. if (!dev_node) {
  2226. icnss_pr_err("Failed to get cooling device node\n");
  2227. return -EINVAL;
  2228. }
  2229. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2230. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2231. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2232. dev_node,
  2233. cdev_node_name, icnss_tcdev,
  2234. &icnss_cooling_ops);
  2235. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2236. ret = PTR_ERR(icnss_tcdev->tcdev);
  2237. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2238. ret, icnss_tcdev->tcdev_id);
  2239. } else {
  2240. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2241. icnss_tcdev->tcdev_id);
  2242. list_add(&icnss_tcdev->tcdev_list,
  2243. &priv->icnss_tcdev_list);
  2244. }
  2245. } else {
  2246. icnss_pr_dbg("Cooling device registration not supported");
  2247. ret = -EOPNOTSUPP;
  2248. }
  2249. return ret;
  2250. }
  2251. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2252. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2253. {
  2254. struct icnss_priv *priv = dev_get_drvdata(dev);
  2255. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2256. while (!list_empty(&priv->icnss_tcdev_list)) {
  2257. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2258. struct icnss_thermal_cdev,
  2259. tcdev_list);
  2260. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2261. list_del(&icnss_tcdev->tcdev_list);
  2262. kfree(icnss_tcdev);
  2263. }
  2264. }
  2265. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2266. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2267. unsigned long *thermal_state,
  2268. int tcdev_id)
  2269. {
  2270. struct icnss_priv *priv = dev_get_drvdata(dev);
  2271. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2272. mutex_lock(&priv->tcdev_lock);
  2273. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2274. if (icnss_tcdev->tcdev_id != tcdev_id)
  2275. continue;
  2276. *thermal_state = icnss_tcdev->curr_thermal_state;
  2277. mutex_unlock(&priv->tcdev_lock);
  2278. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2279. icnss_tcdev->curr_thermal_state, tcdev_id);
  2280. return 0;
  2281. }
  2282. mutex_unlock(&priv->tcdev_lock);
  2283. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2284. return -EINVAL;
  2285. }
  2286. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2287. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2288. int cmd_len, void *cb_ctx,
  2289. int (*cb)(void *ctx, void *event, int event_len))
  2290. {
  2291. struct icnss_priv *priv = icnss_get_plat_priv();
  2292. int ret;
  2293. if (!priv)
  2294. return -ENODEV;
  2295. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2296. return -EINVAL;
  2297. priv->get_info_cb = cb;
  2298. priv->get_info_cb_ctx = cb_ctx;
  2299. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2300. if (ret) {
  2301. priv->get_info_cb = NULL;
  2302. priv->get_info_cb_ctx = NULL;
  2303. }
  2304. return ret;
  2305. }
  2306. EXPORT_SYMBOL(icnss_qmi_send);
  2307. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2308. struct module *owner, const char *mod_name)
  2309. {
  2310. int ret = 0;
  2311. struct icnss_priv *priv = icnss_get_plat_priv();
  2312. if (!priv || !priv->pdev) {
  2313. ret = -ENODEV;
  2314. goto out;
  2315. }
  2316. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2317. if (priv->ops) {
  2318. icnss_pr_err("Driver already registered\n");
  2319. ret = -EEXIST;
  2320. goto out;
  2321. }
  2322. if (!ops->dev_info) {
  2323. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2324. return -EINVAL;
  2325. }
  2326. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2327. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2328. ops->dev_info->name);
  2329. return -ENODEV;
  2330. }
  2331. if (!ops->probe || !ops->remove) {
  2332. ret = -EINVAL;
  2333. goto out;
  2334. }
  2335. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2336. 0, ops);
  2337. if (ret == -EINTR)
  2338. ret = 0;
  2339. out:
  2340. return ret;
  2341. }
  2342. EXPORT_SYMBOL(__icnss_register_driver);
  2343. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2344. {
  2345. int ret;
  2346. struct icnss_priv *priv = icnss_get_plat_priv();
  2347. if (!priv || !priv->pdev) {
  2348. ret = -ENODEV;
  2349. goto out;
  2350. }
  2351. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2352. if (!priv->ops) {
  2353. icnss_pr_err("Driver not registered\n");
  2354. ret = -ENOENT;
  2355. goto out;
  2356. }
  2357. ret = icnss_driver_event_post(priv,
  2358. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2359. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2360. out:
  2361. return ret;
  2362. }
  2363. EXPORT_SYMBOL(icnss_unregister_driver);
  2364. static struct icnss_msi_config msi_config = {
  2365. .total_vectors = 28,
  2366. .total_users = 2,
  2367. .users = (struct icnss_msi_user[]) {
  2368. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2369. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2370. },
  2371. };
  2372. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2373. {
  2374. priv->msi_config = &msi_config;
  2375. return 0;
  2376. }
  2377. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2378. int *num_vectors, u32 *user_base_data,
  2379. u32 *base_vector)
  2380. {
  2381. struct icnss_priv *priv = dev_get_drvdata(dev);
  2382. struct icnss_msi_config *msi_config;
  2383. int idx;
  2384. if (!priv)
  2385. return -ENODEV;
  2386. msi_config = priv->msi_config;
  2387. if (!msi_config) {
  2388. icnss_pr_err("MSI is not supported.\n");
  2389. return -EINVAL;
  2390. }
  2391. for (idx = 0; idx < msi_config->total_users; idx++) {
  2392. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2393. *num_vectors = msi_config->users[idx].num_vectors;
  2394. *user_base_data = msi_config->users[idx].base_vector
  2395. + priv->msi_base_data;
  2396. *base_vector = msi_config->users[idx].base_vector;
  2397. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2398. user_name, *num_vectors, *user_base_data,
  2399. *base_vector);
  2400. return 0;
  2401. }
  2402. }
  2403. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2404. return -EINVAL;
  2405. }
  2406. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2407. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2408. {
  2409. struct icnss_priv *priv = dev_get_drvdata(dev);
  2410. int irq_num;
  2411. irq_num = priv->srng_irqs[vector];
  2412. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2413. irq_num, vector);
  2414. return irq_num;
  2415. }
  2416. EXPORT_SYMBOL(icnss_get_msi_irq);
  2417. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2418. u32 *msi_addr_high)
  2419. {
  2420. struct icnss_priv *priv = dev_get_drvdata(dev);
  2421. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2422. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2423. }
  2424. EXPORT_SYMBOL(icnss_get_msi_address);
  2425. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2426. irqreturn_t (*handler)(int, void *),
  2427. unsigned long flags, const char *name, void *ctx)
  2428. {
  2429. int ret = 0;
  2430. unsigned int irq;
  2431. struct ce_irq_list *irq_entry;
  2432. struct icnss_priv *priv = dev_get_drvdata(dev);
  2433. if (!priv || !priv->pdev) {
  2434. ret = -ENODEV;
  2435. goto out;
  2436. }
  2437. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2438. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2439. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2440. ret = -EINVAL;
  2441. goto out;
  2442. }
  2443. irq = priv->ce_irqs[ce_id];
  2444. irq_entry = &priv->ce_irq_list[ce_id];
  2445. if (irq_entry->handler || irq_entry->irq) {
  2446. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2447. irq, ce_id);
  2448. ret = -EEXIST;
  2449. goto out;
  2450. }
  2451. ret = request_irq(irq, handler, flags, name, ctx);
  2452. if (ret) {
  2453. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2454. irq, ce_id, ret);
  2455. goto out;
  2456. }
  2457. irq_entry->irq = irq;
  2458. irq_entry->handler = handler;
  2459. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2460. penv->stats.ce_irqs[ce_id].request++;
  2461. out:
  2462. return ret;
  2463. }
  2464. EXPORT_SYMBOL(icnss_ce_request_irq);
  2465. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2466. {
  2467. int ret = 0;
  2468. unsigned int irq;
  2469. struct ce_irq_list *irq_entry;
  2470. if (!penv || !penv->pdev || !dev) {
  2471. ret = -ENODEV;
  2472. goto out;
  2473. }
  2474. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2475. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2476. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2477. ret = -EINVAL;
  2478. goto out;
  2479. }
  2480. irq = penv->ce_irqs[ce_id];
  2481. irq_entry = &penv->ce_irq_list[ce_id];
  2482. if (!irq_entry->handler || !irq_entry->irq) {
  2483. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2484. ret = -EEXIST;
  2485. goto out;
  2486. }
  2487. free_irq(irq, ctx);
  2488. irq_entry->irq = 0;
  2489. irq_entry->handler = NULL;
  2490. penv->stats.ce_irqs[ce_id].free++;
  2491. out:
  2492. return ret;
  2493. }
  2494. EXPORT_SYMBOL(icnss_ce_free_irq);
  2495. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2496. {
  2497. unsigned int irq;
  2498. if (!penv || !penv->pdev || !dev) {
  2499. icnss_pr_err("Platform driver not initialized\n");
  2500. return;
  2501. }
  2502. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2503. penv->state);
  2504. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2505. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2506. return;
  2507. }
  2508. penv->stats.ce_irqs[ce_id].enable++;
  2509. irq = penv->ce_irqs[ce_id];
  2510. enable_irq(irq);
  2511. }
  2512. EXPORT_SYMBOL(icnss_enable_irq);
  2513. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2514. {
  2515. unsigned int irq;
  2516. if (!penv || !penv->pdev || !dev) {
  2517. icnss_pr_err("Platform driver not initialized\n");
  2518. return;
  2519. }
  2520. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2521. penv->state);
  2522. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2523. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2524. ce_id);
  2525. return;
  2526. }
  2527. irq = penv->ce_irqs[ce_id];
  2528. disable_irq(irq);
  2529. penv->stats.ce_irqs[ce_id].disable++;
  2530. }
  2531. EXPORT_SYMBOL(icnss_disable_irq);
  2532. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2533. {
  2534. char *fw_build_timestamp = NULL;
  2535. struct icnss_priv *priv = dev_get_drvdata(dev);
  2536. if (!priv) {
  2537. icnss_pr_err("Platform driver not initialized\n");
  2538. return -EINVAL;
  2539. }
  2540. info->v_addr = priv->mem_base_va;
  2541. info->p_addr = priv->mem_base_pa;
  2542. info->chip_id = priv->chip_info.chip_id;
  2543. info->chip_family = priv->chip_info.chip_family;
  2544. info->board_id = priv->board_id;
  2545. info->soc_id = priv->soc_id;
  2546. info->fw_version = priv->fw_version_info.fw_version;
  2547. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2548. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2549. strlcpy(info->fw_build_timestamp,
  2550. priv->fw_version_info.fw_build_timestamp,
  2551. WLFW_MAX_TIMESTAMP_LEN + 1);
  2552. strlcpy(info->fw_build_id, priv->fw_build_id,
  2553. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2554. return 0;
  2555. }
  2556. EXPORT_SYMBOL(icnss_get_soc_info);
  2557. int icnss_get_mhi_state(struct device *dev)
  2558. {
  2559. struct icnss_priv *priv = dev_get_drvdata(dev);
  2560. if (!priv) {
  2561. icnss_pr_err("Platform driver not initialized\n");
  2562. return -EINVAL;
  2563. }
  2564. if (!priv->mhi_state_info_va)
  2565. return -ENOMEM;
  2566. return ioread32(priv->mhi_state_info_va);
  2567. }
  2568. EXPORT_SYMBOL(icnss_get_mhi_state);
  2569. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2570. {
  2571. int ret;
  2572. struct icnss_priv *priv;
  2573. if (!dev)
  2574. return -ENODEV;
  2575. priv = dev_get_drvdata(dev);
  2576. if (!priv) {
  2577. icnss_pr_err("Platform driver not initialized\n");
  2578. return -EINVAL;
  2579. }
  2580. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2581. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2582. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2583. priv->state);
  2584. return -EINVAL;
  2585. }
  2586. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2587. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2588. if (ret)
  2589. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2590. ret, fw_log_mode);
  2591. return ret;
  2592. }
  2593. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2594. int icnss_force_wake_request(struct device *dev)
  2595. {
  2596. struct icnss_priv *priv;
  2597. if (!dev)
  2598. return -ENODEV;
  2599. priv = dev_get_drvdata(dev);
  2600. if (!priv) {
  2601. icnss_pr_err("Platform driver not initialized\n");
  2602. return -EINVAL;
  2603. }
  2604. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2605. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2606. atomic_read(&priv->soc_wake_ref_count));
  2607. return 0;
  2608. }
  2609. icnss_pr_soc_wake("Calling SOC Wake request");
  2610. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2611. 0, NULL);
  2612. return 0;
  2613. }
  2614. EXPORT_SYMBOL(icnss_force_wake_request);
  2615. int icnss_force_wake_release(struct device *dev)
  2616. {
  2617. struct icnss_priv *priv;
  2618. if (!dev)
  2619. return -ENODEV;
  2620. priv = dev_get_drvdata(dev);
  2621. if (!priv) {
  2622. icnss_pr_err("Platform driver not initialized\n");
  2623. return -EINVAL;
  2624. }
  2625. icnss_pr_soc_wake("Calling SOC Wake response");
  2626. if (atomic_read(&priv->soc_wake_ref_count) &&
  2627. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2628. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2629. atomic_read(&priv->soc_wake_ref_count));
  2630. return 0;
  2631. }
  2632. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2633. 0, NULL);
  2634. return 0;
  2635. }
  2636. EXPORT_SYMBOL(icnss_force_wake_release);
  2637. int icnss_is_device_awake(struct device *dev)
  2638. {
  2639. struct icnss_priv *priv = dev_get_drvdata(dev);
  2640. if (!priv) {
  2641. icnss_pr_err("Platform driver not initialized\n");
  2642. return -EINVAL;
  2643. }
  2644. return atomic_read(&priv->soc_wake_ref_count);
  2645. }
  2646. EXPORT_SYMBOL(icnss_is_device_awake);
  2647. int icnss_is_pci_ep_awake(struct device *dev)
  2648. {
  2649. struct icnss_priv *priv = dev_get_drvdata(dev);
  2650. if (!priv) {
  2651. icnss_pr_err("Platform driver not initialized\n");
  2652. return -EINVAL;
  2653. }
  2654. if (!priv->mhi_state_info_va)
  2655. return -ENOMEM;
  2656. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2657. }
  2658. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2659. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2660. uint32_t mem_type, uint32_t data_len,
  2661. uint8_t *output)
  2662. {
  2663. int ret = 0;
  2664. struct icnss_priv *priv = dev_get_drvdata(dev);
  2665. if (priv->magic != ICNSS_MAGIC) {
  2666. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2667. dev, priv, priv->magic);
  2668. return -EINVAL;
  2669. }
  2670. if (!output || data_len == 0
  2671. || data_len > WLFW_MAX_DATA_SIZE) {
  2672. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2673. output, data_len);
  2674. ret = -EINVAL;
  2675. goto out;
  2676. }
  2677. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2678. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2679. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2680. priv->state);
  2681. ret = -EINVAL;
  2682. goto out;
  2683. }
  2684. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2685. data_len, output);
  2686. out:
  2687. return ret;
  2688. }
  2689. EXPORT_SYMBOL(icnss_athdiag_read);
  2690. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2691. uint32_t mem_type, uint32_t data_len,
  2692. uint8_t *input)
  2693. {
  2694. int ret = 0;
  2695. struct icnss_priv *priv = dev_get_drvdata(dev);
  2696. if (priv->magic != ICNSS_MAGIC) {
  2697. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2698. dev, priv, priv->magic);
  2699. return -EINVAL;
  2700. }
  2701. if (!input || data_len == 0
  2702. || data_len > WLFW_MAX_DATA_SIZE) {
  2703. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2704. input, data_len);
  2705. ret = -EINVAL;
  2706. goto out;
  2707. }
  2708. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2709. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2710. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2711. priv->state);
  2712. ret = -EINVAL;
  2713. goto out;
  2714. }
  2715. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2716. data_len, input);
  2717. out:
  2718. return ret;
  2719. }
  2720. EXPORT_SYMBOL(icnss_athdiag_write);
  2721. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2722. enum icnss_driver_mode mode,
  2723. const char *host_version)
  2724. {
  2725. struct icnss_priv *priv = dev_get_drvdata(dev);
  2726. int temp = 0;
  2727. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2728. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2729. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2730. priv->state);
  2731. return -EINVAL;
  2732. }
  2733. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2734. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2735. priv->state);
  2736. return -EINVAL;
  2737. }
  2738. if (priv->wpss_supported &&
  2739. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2740. icnss_setup_dms_mac(priv);
  2741. if (priv->device_id == WCN6750_DEVICE_ID) {
  2742. if (!icnss_get_temperature(priv, &temp)) {
  2743. icnss_pr_dbg("Temperature: %d\n", temp);
  2744. if (temp < WLAN_EN_TEMP_THRESHOLD)
  2745. icnss_set_wlan_en_delay(priv);
  2746. }
  2747. }
  2748. return icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2749. }
  2750. EXPORT_SYMBOL(icnss_wlan_enable);
  2751. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2752. {
  2753. struct icnss_priv *priv = dev_get_drvdata(dev);
  2754. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2755. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2756. priv->state);
  2757. return 0;
  2758. }
  2759. return icnss_send_wlan_disable_to_fw(priv);
  2760. }
  2761. EXPORT_SYMBOL(icnss_wlan_disable);
  2762. bool icnss_is_qmi_disable(struct device *dev)
  2763. {
  2764. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2765. }
  2766. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2767. int icnss_get_ce_id(struct device *dev, int irq)
  2768. {
  2769. int i;
  2770. if (!penv || !penv->pdev || !dev)
  2771. return -ENODEV;
  2772. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2773. if (penv->ce_irqs[i] == irq)
  2774. return i;
  2775. }
  2776. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2777. return -EINVAL;
  2778. }
  2779. EXPORT_SYMBOL(icnss_get_ce_id);
  2780. int icnss_get_irq(struct device *dev, int ce_id)
  2781. {
  2782. int irq;
  2783. if (!penv || !penv->pdev || !dev)
  2784. return -ENODEV;
  2785. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  2786. return -EINVAL;
  2787. irq = penv->ce_irqs[ce_id];
  2788. return irq;
  2789. }
  2790. EXPORT_SYMBOL(icnss_get_irq);
  2791. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  2792. {
  2793. struct icnss_priv *priv = dev_get_drvdata(dev);
  2794. if (!priv) {
  2795. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  2796. return NULL;
  2797. }
  2798. return priv->iommu_domain;
  2799. }
  2800. EXPORT_SYMBOL(icnss_smmu_get_domain);
  2801. int icnss_smmu_map(struct device *dev,
  2802. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  2803. {
  2804. struct icnss_priv *priv = dev_get_drvdata(dev);
  2805. int flag = IOMMU_READ | IOMMU_WRITE;
  2806. bool dma_coherent = false;
  2807. unsigned long iova;
  2808. int prop_len = 0;
  2809. size_t len;
  2810. int ret = 0;
  2811. if (!priv) {
  2812. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2813. dev, priv);
  2814. return -EINVAL;
  2815. }
  2816. if (!iova_addr) {
  2817. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  2818. &paddr, size);
  2819. return -EINVAL;
  2820. }
  2821. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  2822. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  2823. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  2824. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2825. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2826. iova,
  2827. &priv->smmu_iova_ipa_start,
  2828. priv->smmu_iova_ipa_len);
  2829. return -ENOMEM;
  2830. }
  2831. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  2832. icnss_pr_dbg("dma-coherent is %s\n",
  2833. dma_coherent ? "enabled" : "disabled");
  2834. if (dma_coherent)
  2835. flag |= IOMMU_CACHE;
  2836. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  2837. ret = iommu_map(priv->iommu_domain, iova,
  2838. rounddown(paddr, PAGE_SIZE), len,
  2839. flag);
  2840. if (ret) {
  2841. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  2842. return ret;
  2843. }
  2844. priv->smmu_iova_ipa_current = iova + len;
  2845. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  2846. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  2847. return 0;
  2848. }
  2849. EXPORT_SYMBOL(icnss_smmu_map);
  2850. int icnss_smmu_unmap(struct device *dev,
  2851. uint32_t iova_addr, size_t size)
  2852. {
  2853. struct icnss_priv *priv = dev_get_drvdata(dev);
  2854. unsigned long iova;
  2855. size_t len, unmapped_len;
  2856. if (!priv) {
  2857. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2858. dev, priv);
  2859. return -EINVAL;
  2860. }
  2861. if (!iova_addr) {
  2862. icnss_pr_err("iova_addr is NULL, size %zu\n",
  2863. size);
  2864. return -EINVAL;
  2865. }
  2866. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  2867. PAGE_SIZE);
  2868. iova = rounddown(iova_addr, PAGE_SIZE);
  2869. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2870. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2871. iova,
  2872. &priv->smmu_iova_ipa_start,
  2873. priv->smmu_iova_ipa_len);
  2874. return -ENOMEM;
  2875. }
  2876. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  2877. iova, len);
  2878. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  2879. if (unmapped_len != len) {
  2880. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  2881. return -EINVAL;
  2882. }
  2883. priv->smmu_iova_ipa_current = iova;
  2884. return 0;
  2885. }
  2886. EXPORT_SYMBOL(icnss_smmu_unmap);
  2887. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  2888. {
  2889. return socinfo_get_serial_number();
  2890. }
  2891. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  2892. int icnss_trigger_recovery(struct device *dev)
  2893. {
  2894. int ret = 0;
  2895. struct icnss_priv *priv = dev_get_drvdata(dev);
  2896. if (priv->magic != ICNSS_MAGIC) {
  2897. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  2898. ret = -EINVAL;
  2899. goto out;
  2900. }
  2901. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2902. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  2903. priv->state);
  2904. ret = -EPERM;
  2905. goto out;
  2906. }
  2907. if (priv->wpss_supported) {
  2908. icnss_pr_vdbg("Initiate Root PD restart");
  2909. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  2910. ICNSS_SMP2P_OUT_POWER_SAVE);
  2911. if (!ret)
  2912. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2913. return ret;
  2914. }
  2915. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  2916. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  2917. priv->state);
  2918. ret = -EOPNOTSUPP;
  2919. goto out;
  2920. }
  2921. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  2922. priv->state);
  2923. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  2924. if (!ret)
  2925. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2926. out:
  2927. return ret;
  2928. }
  2929. EXPORT_SYMBOL(icnss_trigger_recovery);
  2930. int icnss_idle_shutdown(struct device *dev)
  2931. {
  2932. struct icnss_priv *priv = dev_get_drvdata(dev);
  2933. if (!priv) {
  2934. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2935. return -EINVAL;
  2936. }
  2937. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2938. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2939. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  2940. return -EBUSY;
  2941. }
  2942. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  2943. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2944. }
  2945. EXPORT_SYMBOL(icnss_idle_shutdown);
  2946. int icnss_idle_restart(struct device *dev)
  2947. {
  2948. struct icnss_priv *priv = dev_get_drvdata(dev);
  2949. if (!priv) {
  2950. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2951. return -EINVAL;
  2952. }
  2953. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2954. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2955. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  2956. return -EBUSY;
  2957. }
  2958. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  2959. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2960. }
  2961. EXPORT_SYMBOL(icnss_idle_restart);
  2962. int icnss_exit_power_save(struct device *dev)
  2963. {
  2964. struct icnss_priv *priv = dev_get_drvdata(dev);
  2965. icnss_pr_vdbg("Calling Exit Power Save\n");
  2966. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2967. !test_bit(ICNSS_MODE_ON, &priv->state))
  2968. return 0;
  2969. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  2970. ICNSS_SMP2P_OUT_POWER_SAVE);
  2971. }
  2972. EXPORT_SYMBOL(icnss_exit_power_save);
  2973. int icnss_prevent_l1(struct device *dev)
  2974. {
  2975. struct icnss_priv *priv = dev_get_drvdata(dev);
  2976. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2977. !test_bit(ICNSS_MODE_ON, &priv->state))
  2978. return 0;
  2979. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  2980. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  2981. }
  2982. EXPORT_SYMBOL(icnss_prevent_l1);
  2983. void icnss_allow_l1(struct device *dev)
  2984. {
  2985. struct icnss_priv *priv = dev_get_drvdata(dev);
  2986. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2987. !test_bit(ICNSS_MODE_ON, &priv->state))
  2988. return;
  2989. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  2990. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  2991. }
  2992. EXPORT_SYMBOL(icnss_allow_l1);
  2993. void icnss_allow_recursive_recovery(struct device *dev)
  2994. {
  2995. struct icnss_priv *priv = dev_get_drvdata(dev);
  2996. priv->allow_recursive_recovery = true;
  2997. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  2998. }
  2999. void icnss_disallow_recursive_recovery(struct device *dev)
  3000. {
  3001. struct icnss_priv *priv = dev_get_drvdata(dev);
  3002. priv->allow_recursive_recovery = false;
  3003. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  3004. }
  3005. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  3006. {
  3007. struct kobject *icnss_kobject;
  3008. int ret = 0;
  3009. atomic_set(&priv->is_shutdown, false);
  3010. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  3011. if (!icnss_kobject) {
  3012. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  3013. return -EINVAL;
  3014. }
  3015. priv->icnss_kobject = icnss_kobject;
  3016. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  3017. if (ret) {
  3018. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  3019. return ret;
  3020. }
  3021. return ret;
  3022. }
  3023. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  3024. {
  3025. struct kobject *icnss_kobject;
  3026. icnss_kobject = priv->icnss_kobject;
  3027. if (icnss_kobject)
  3028. kobject_put(icnss_kobject);
  3029. }
  3030. static ssize_t qdss_tr_start_store(struct device *dev,
  3031. struct device_attribute *attr,
  3032. const char *buf, size_t count)
  3033. {
  3034. struct icnss_priv *priv = dev_get_drvdata(dev);
  3035. wlfw_qdss_trace_start(priv);
  3036. icnss_pr_dbg("Received QDSS start command\n");
  3037. return count;
  3038. }
  3039. static ssize_t qdss_tr_stop_store(struct device *dev,
  3040. struct device_attribute *attr,
  3041. const char *user_buf, size_t count)
  3042. {
  3043. struct icnss_priv *priv = dev_get_drvdata(dev);
  3044. u32 option = 0;
  3045. if (sscanf(user_buf, "%du", &option) != 1)
  3046. return -EINVAL;
  3047. wlfw_qdss_trace_stop(priv, option);
  3048. icnss_pr_dbg("Received QDSS stop command\n");
  3049. return count;
  3050. }
  3051. static ssize_t qdss_conf_download_store(struct device *dev,
  3052. struct device_attribute *attr,
  3053. const char *buf, size_t count)
  3054. {
  3055. struct icnss_priv *priv = dev_get_drvdata(dev);
  3056. icnss_wlfw_qdss_dnld_send_sync(priv);
  3057. icnss_pr_dbg("Received QDSS download config command\n");
  3058. return count;
  3059. }
  3060. static ssize_t hw_trc_override_store(struct device *dev,
  3061. struct device_attribute *attr,
  3062. const char *buf, size_t count)
  3063. {
  3064. struct icnss_priv *priv = dev_get_drvdata(dev);
  3065. int tmp = 0;
  3066. if (sscanf(buf, "%du", &tmp) != 1)
  3067. return -EINVAL;
  3068. priv->hw_trc_override = tmp;
  3069. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3070. return count;
  3071. }
  3072. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  3073. {
  3074. struct icnss_priv *priv = icnss_get_plat_priv();
  3075. phandle rproc_phandle;
  3076. int ret;
  3077. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  3078. &rproc_phandle)) {
  3079. icnss_pr_err("error reading rproc phandle\n");
  3080. return;
  3081. }
  3082. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  3083. if (IS_ERR_OR_NULL(priv->rproc)) {
  3084. icnss_pr_err("rproc not found");
  3085. return;
  3086. }
  3087. ret = rproc_boot(priv->rproc);
  3088. if (ret) {
  3089. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  3090. rproc_put(priv->rproc);
  3091. }
  3092. }
  3093. static ssize_t wpss_boot_store(struct device *dev,
  3094. struct device_attribute *attr,
  3095. const char *buf, size_t count)
  3096. {
  3097. struct icnss_priv *priv = dev_get_drvdata(dev);
  3098. int wpss_rproc = 0;
  3099. if (!priv->wpss_supported)
  3100. return count;
  3101. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  3102. icnss_pr_err("Failed to read wpss rproc info");
  3103. return -EINVAL;
  3104. }
  3105. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  3106. if (wpss_rproc == 1)
  3107. schedule_work(&wpss_loader);
  3108. else if (wpss_rproc == 0)
  3109. icnss_wpss_unload(priv);
  3110. return count;
  3111. }
  3112. static ssize_t wlan_en_delay_store(struct device *dev,
  3113. struct device_attribute *attr,
  3114. const char *buf, size_t count)
  3115. {
  3116. struct icnss_priv *priv = dev_get_drvdata(dev);
  3117. uint32_t wlan_en_delay = 0;
  3118. if (priv->device_id != WCN6750_DEVICE_ID)
  3119. return count;
  3120. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3121. icnss_pr_err("Failed to read wlan_en_delay");
  3122. return -EINVAL;
  3123. }
  3124. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3125. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3126. return count;
  3127. }
  3128. static DEVICE_ATTR_WO(qdss_tr_start);
  3129. static DEVICE_ATTR_WO(qdss_tr_stop);
  3130. static DEVICE_ATTR_WO(qdss_conf_download);
  3131. static DEVICE_ATTR_WO(hw_trc_override);
  3132. static DEVICE_ATTR_WO(wpss_boot);
  3133. static DEVICE_ATTR_WO(wlan_en_delay);
  3134. static struct attribute *icnss_attrs[] = {
  3135. &dev_attr_qdss_tr_start.attr,
  3136. &dev_attr_qdss_tr_stop.attr,
  3137. &dev_attr_qdss_conf_download.attr,
  3138. &dev_attr_hw_trc_override.attr,
  3139. &dev_attr_wpss_boot.attr,
  3140. &dev_attr_wlan_en_delay.attr,
  3141. NULL,
  3142. };
  3143. static struct attribute_group icnss_attr_group = {
  3144. .attrs = icnss_attrs,
  3145. };
  3146. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3147. {
  3148. struct device *dev = &priv->pdev->dev;
  3149. int ret;
  3150. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3151. if (ret) {
  3152. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3153. ret);
  3154. goto out;
  3155. }
  3156. return 0;
  3157. out:
  3158. return ret;
  3159. }
  3160. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3161. {
  3162. sysfs_remove_link(kernel_kobj, "icnss");
  3163. }
  3164. static int icnss_sysfs_create(struct icnss_priv *priv)
  3165. {
  3166. int ret = 0;
  3167. ret = devm_device_add_group(&priv->pdev->dev,
  3168. &icnss_attr_group);
  3169. if (ret) {
  3170. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3171. ret);
  3172. goto out;
  3173. }
  3174. icnss_create_sysfs_link(priv);
  3175. ret = icnss_create_shutdown_sysfs(priv);
  3176. if (ret)
  3177. goto remove_icnss_group;
  3178. return 0;
  3179. remove_icnss_group:
  3180. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3181. out:
  3182. return ret;
  3183. }
  3184. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3185. {
  3186. icnss_destroy_shutdown_sysfs(priv);
  3187. icnss_remove_sysfs_link(priv);
  3188. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3189. }
  3190. static int icnss_resource_parse(struct icnss_priv *priv)
  3191. {
  3192. int ret = 0, i = 0;
  3193. struct platform_device *pdev = priv->pdev;
  3194. struct device *dev = &pdev->dev;
  3195. struct resource *res;
  3196. u32 int_prop;
  3197. ret = icnss_get_vreg(priv);
  3198. if (ret) {
  3199. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3200. goto out;
  3201. }
  3202. ret = icnss_get_clk(priv);
  3203. if (ret) {
  3204. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3205. goto put_vreg;
  3206. }
  3207. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3208. ret = icnss_get_psf_info(priv);
  3209. if (ret < 0)
  3210. goto out;
  3211. priv->psf_supported = true;
  3212. }
  3213. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3214. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3215. "membase");
  3216. if (!res) {
  3217. icnss_pr_err("Memory base not found in DT\n");
  3218. ret = -EINVAL;
  3219. goto put_clk;
  3220. }
  3221. priv->mem_base_pa = res->start;
  3222. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3223. resource_size(res));
  3224. if (!priv->mem_base_va) {
  3225. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3226. &priv->mem_base_pa);
  3227. ret = -EINVAL;
  3228. goto put_clk;
  3229. }
  3230. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3231. &priv->mem_base_pa,
  3232. priv->mem_base_va);
  3233. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3234. res = platform_get_resource(priv->pdev,
  3235. IORESOURCE_IRQ, i);
  3236. if (!res) {
  3237. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3238. ret = -ENODEV;
  3239. goto put_clk;
  3240. } else {
  3241. priv->ce_irqs[i] = res->start;
  3242. }
  3243. }
  3244. if (of_property_read_u32(pdev->dev.of_node, "qcom,rf_subtype",
  3245. &priv->rf_subtype) == 0) {
  3246. priv->is_rf_subtype_valid = true;
  3247. icnss_pr_dbg("RF subtype 0x%x\n", priv->rf_subtype);
  3248. }
  3249. if (of_property_read_bool(pdev->dev.of_node,
  3250. "qcom,is_slate_rfa")) {
  3251. priv->is_slate_rfa = true;
  3252. icnss_pr_err("SLATE rfa is enabled\n");
  3253. }
  3254. } else if (priv->device_id == WCN6750_DEVICE_ID) {
  3255. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3256. "msi_addr");
  3257. if (!res) {
  3258. icnss_pr_err("MSI address not found in DT\n");
  3259. ret = -EINVAL;
  3260. goto put_clk;
  3261. }
  3262. priv->msi_addr_pa = res->start;
  3263. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3264. PAGE_SIZE,
  3265. DMA_FROM_DEVICE, 0);
  3266. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3267. icnss_pr_err("MSI: failed to map msi address\n");
  3268. priv->msi_addr_iova = 0;
  3269. ret = -ENOMEM;
  3270. goto put_clk;
  3271. }
  3272. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3273. &priv->msi_addr_pa,
  3274. priv->msi_addr_iova);
  3275. ret = of_property_read_u32_index(dev->of_node,
  3276. "interrupts",
  3277. 1,
  3278. &int_prop);
  3279. if (ret) {
  3280. icnss_pr_dbg("Read interrupt prop failed");
  3281. goto put_clk;
  3282. }
  3283. priv->msi_base_data = int_prop + 32;
  3284. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3285. priv->msi_base_data, int_prop);
  3286. icnss_get_msi_assignment(priv);
  3287. for (i = 0; i < msi_config.total_vectors; i++) {
  3288. res = platform_get_resource(priv->pdev,
  3289. IORESOURCE_IRQ, i);
  3290. if (!res) {
  3291. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3292. ret = -ENODEV;
  3293. goto put_clk;
  3294. } else {
  3295. priv->srng_irqs[i] = res->start;
  3296. }
  3297. }
  3298. }
  3299. return 0;
  3300. put_clk:
  3301. icnss_put_clk(priv);
  3302. put_vreg:
  3303. icnss_put_vreg(priv);
  3304. out:
  3305. return ret;
  3306. }
  3307. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3308. {
  3309. int ret = 0;
  3310. struct platform_device *pdev = priv->pdev;
  3311. struct device *dev = &pdev->dev;
  3312. struct device_node *np = NULL;
  3313. u64 prop_size = 0;
  3314. const __be32 *addrp = NULL;
  3315. np = of_parse_phandle(dev->of_node,
  3316. "qcom,wlan-msa-fixed-region", 0);
  3317. if (np) {
  3318. addrp = of_get_address(np, 0, &prop_size, NULL);
  3319. if (!addrp) {
  3320. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3321. ret = -EINVAL;
  3322. of_node_put(np);
  3323. goto out;
  3324. }
  3325. priv->msa_pa = of_translate_address(np, addrp);
  3326. if (priv->msa_pa == OF_BAD_ADDR) {
  3327. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3328. ret = -EINVAL;
  3329. of_node_put(np);
  3330. goto out;
  3331. }
  3332. of_node_put(np);
  3333. priv->msa_va = memremap(priv->msa_pa,
  3334. (unsigned long)prop_size, MEMREMAP_WT);
  3335. if (!priv->msa_va) {
  3336. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3337. &priv->msa_pa);
  3338. ret = -EINVAL;
  3339. goto out;
  3340. }
  3341. priv->msa_mem_size = prop_size;
  3342. } else {
  3343. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3344. &priv->msa_mem_size);
  3345. if (ret || priv->msa_mem_size == 0) {
  3346. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3347. priv->msa_mem_size, ret);
  3348. goto out;
  3349. }
  3350. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3351. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3352. if (!priv->msa_va) {
  3353. icnss_pr_err("DMA alloc failed for MSA\n");
  3354. ret = -ENOMEM;
  3355. goto out;
  3356. }
  3357. }
  3358. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3359. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3360. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3361. "qcom,fw-prefix");
  3362. return 0;
  3363. out:
  3364. return ret;
  3365. }
  3366. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3367. struct device *dev, unsigned long iova,
  3368. int flags, void *handler_token)
  3369. {
  3370. struct icnss_priv *priv = handler_token;
  3371. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3372. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3373. if (!priv) {
  3374. icnss_pr_err("priv is NULL\n");
  3375. return -ENODEV;
  3376. }
  3377. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3378. fw_down_data.crashed = true;
  3379. icnss_call_driver_uevent(priv, ICNSS_UEVENT_SMMU_FAULT,
  3380. &fw_down_data);
  3381. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3382. &fw_down_data);
  3383. }
  3384. icnss_trigger_recovery(&priv->pdev->dev);
  3385. /* IOMMU driver requires non-zero return value to print debug info. */
  3386. return -EINVAL;
  3387. }
  3388. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3389. {
  3390. int ret = 0;
  3391. struct platform_device *pdev = priv->pdev;
  3392. struct device *dev = &pdev->dev;
  3393. const char *iommu_dma_type;
  3394. struct resource *res;
  3395. u32 addr_win[2];
  3396. ret = of_property_read_u32_array(dev->of_node,
  3397. "qcom,iommu-dma-addr-pool",
  3398. addr_win,
  3399. ARRAY_SIZE(addr_win));
  3400. if (ret) {
  3401. icnss_pr_err("SMMU IOVA base not found\n");
  3402. } else {
  3403. priv->smmu_iova_start = addr_win[0];
  3404. priv->smmu_iova_len = addr_win[1];
  3405. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3406. &priv->smmu_iova_start,
  3407. priv->smmu_iova_len);
  3408. priv->iommu_domain =
  3409. iommu_get_domain_for_dev(&pdev->dev);
  3410. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3411. &iommu_dma_type);
  3412. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3413. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3414. priv->smmu_s1_enable = true;
  3415. if (priv->device_id == WCN6750_DEVICE_ID)
  3416. iommu_set_fault_handler(priv->iommu_domain,
  3417. icnss_smmu_fault_handler,
  3418. priv);
  3419. }
  3420. res = platform_get_resource_byname(pdev,
  3421. IORESOURCE_MEM,
  3422. "smmu_iova_ipa");
  3423. if (!res) {
  3424. icnss_pr_err("SMMU IOVA IPA not found\n");
  3425. } else {
  3426. priv->smmu_iova_ipa_start = res->start;
  3427. priv->smmu_iova_ipa_current = res->start;
  3428. priv->smmu_iova_ipa_len = resource_size(res);
  3429. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3430. &priv->smmu_iova_ipa_start,
  3431. priv->smmu_iova_ipa_len);
  3432. }
  3433. }
  3434. return 0;
  3435. }
  3436. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3437. {
  3438. if (!priv)
  3439. return -ENODEV;
  3440. if (!priv->smmu_iova_len)
  3441. return -EINVAL;
  3442. *addr = priv->smmu_iova_start;
  3443. *size = priv->smmu_iova_len;
  3444. return 0;
  3445. }
  3446. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3447. {
  3448. if (!priv)
  3449. return -ENODEV;
  3450. if (!priv->smmu_iova_ipa_len)
  3451. return -EINVAL;
  3452. *addr = priv->smmu_iova_ipa_start;
  3453. *size = priv->smmu_iova_ipa_len;
  3454. return 0;
  3455. }
  3456. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3457. char *name)
  3458. {
  3459. if (!priv)
  3460. return;
  3461. if (!priv->use_prefix_path) {
  3462. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3463. return;
  3464. }
  3465. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3466. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3467. ADRASTEA_PATH_PREFIX "%s", name);
  3468. else
  3469. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3470. QCA6750_PATH_PREFIX "%s", name);
  3471. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3472. }
  3473. static const struct platform_device_id icnss_platform_id_table[] = {
  3474. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3475. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3476. { },
  3477. };
  3478. static const struct of_device_id icnss_dt_match[] = {
  3479. {
  3480. .compatible = "qcom,wcn6750",
  3481. .data = (void *)&icnss_platform_id_table[0]},
  3482. {
  3483. .compatible = "qcom,icnss",
  3484. .data = (void *)&icnss_platform_id_table[1]},
  3485. { },
  3486. };
  3487. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3488. static void icnss_init_control_params(struct icnss_priv *priv)
  3489. {
  3490. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3491. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3492. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3493. if (priv->device_id == WCN6750_DEVICE_ID ||
  3494. of_property_read_bool(priv->pdev->dev.of_node,
  3495. "wpss-support-enable"))
  3496. priv->wpss_supported = true;
  3497. if (of_property_read_bool(priv->pdev->dev.of_node,
  3498. "bdf-download-support"))
  3499. priv->bdf_download_support = true;
  3500. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3501. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3502. }
  3503. static void icnss_read_device_configs(struct icnss_priv *priv)
  3504. {
  3505. if (of_property_read_bool(priv->pdev->dev.of_node,
  3506. "wlan-ipa-disabled")) {
  3507. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3508. }
  3509. }
  3510. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3511. {
  3512. pm_runtime_get_sync(&priv->pdev->dev);
  3513. pm_runtime_forbid(&priv->pdev->dev);
  3514. pm_runtime_set_active(&priv->pdev->dev);
  3515. pm_runtime_enable(&priv->pdev->dev);
  3516. }
  3517. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3518. {
  3519. pm_runtime_disable(&priv->pdev->dev);
  3520. pm_runtime_allow(&priv->pdev->dev);
  3521. pm_runtime_put_sync(&priv->pdev->dev);
  3522. }
  3523. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3524. {
  3525. return of_property_read_bool(priv->pdev->dev.of_node,
  3526. "use-nv-mac");
  3527. }
  3528. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3529. {
  3530. struct icnss_subsys_restart_level_data *restart_level_data;
  3531. icnss_pr_info("rproc name: %s recovery disable: %d",
  3532. rproc->name, rproc->recovery_disabled);
  3533. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3534. if (!restart_level_data)
  3535. return;
  3536. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3537. if (rproc->recovery_disabled)
  3538. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3539. else
  3540. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3541. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3542. 0, restart_level_data);
  3543. }
  3544. }
  3545. static int icnss_probe(struct platform_device *pdev)
  3546. {
  3547. int ret = 0;
  3548. struct device *dev = &pdev->dev;
  3549. struct icnss_priv *priv;
  3550. const struct of_device_id *of_id;
  3551. const struct platform_device_id *device_id;
  3552. if (dev_get_drvdata(dev)) {
  3553. icnss_pr_err("Driver is already initialized\n");
  3554. return -EEXIST;
  3555. }
  3556. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3557. if (!of_id || !of_id->data) {
  3558. icnss_pr_err("Failed to find of match device!\n");
  3559. ret = -ENODEV;
  3560. goto out_reset_drvdata;
  3561. }
  3562. device_id = of_id->data;
  3563. icnss_pr_dbg("Platform driver probe\n");
  3564. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3565. if (!priv)
  3566. return -ENOMEM;
  3567. priv->magic = ICNSS_MAGIC;
  3568. dev_set_drvdata(dev, priv);
  3569. priv->pdev = pdev;
  3570. priv->device_id = device_id->driver_data;
  3571. priv->is_chain1_supported = true;
  3572. INIT_LIST_HEAD(&priv->vreg_list);
  3573. INIT_LIST_HEAD(&priv->clk_list);
  3574. icnss_allow_recursive_recovery(dev);
  3575. icnss_init_control_params(priv);
  3576. icnss_read_device_configs(priv);
  3577. ret = icnss_resource_parse(priv);
  3578. if (ret)
  3579. goto out_reset_drvdata;
  3580. ret = icnss_msa_dt_parse(priv);
  3581. if (ret)
  3582. goto out_free_resources;
  3583. ret = icnss_smmu_dt_parse(priv);
  3584. if (ret)
  3585. goto out_free_resources;
  3586. spin_lock_init(&priv->event_lock);
  3587. spin_lock_init(&priv->on_off_lock);
  3588. spin_lock_init(&priv->soc_wake_msg_lock);
  3589. mutex_init(&priv->dev_lock);
  3590. mutex_init(&priv->tcdev_lock);
  3591. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3592. if (!priv->event_wq) {
  3593. icnss_pr_err("Workqueue creation failed\n");
  3594. ret = -EFAULT;
  3595. goto smmu_cleanup;
  3596. }
  3597. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3598. INIT_LIST_HEAD(&priv->event_list);
  3599. ret = icnss_register_fw_service(priv);
  3600. if (ret < 0) {
  3601. icnss_pr_err("fw service registration failed: %d\n", ret);
  3602. goto out_destroy_wq;
  3603. }
  3604. icnss_enable_recovery(priv);
  3605. icnss_debugfs_create(priv);
  3606. icnss_sysfs_create(priv);
  3607. ret = device_init_wakeup(&priv->pdev->dev, true);
  3608. if (ret)
  3609. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3610. ret);
  3611. icnss_set_plat_priv(priv);
  3612. init_completion(&priv->unblock_shutdown);
  3613. if (priv->is_slate_rfa)
  3614. init_completion(&priv->slate_boot_complete);
  3615. if (priv->device_id == WCN6750_DEVICE_ID) {
  3616. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3617. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3618. if (!priv->soc_wake_wq) {
  3619. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3620. ret = -EFAULT;
  3621. goto out_unregister_fw_service;
  3622. }
  3623. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3624. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3625. ret = icnss_genl_init();
  3626. if (ret < 0)
  3627. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3628. init_completion(&priv->smp2p_soc_wake_wait);
  3629. icnss_runtime_pm_init(priv);
  3630. icnss_aop_mbox_init(priv);
  3631. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3632. priv->bdf_download_support = true;
  3633. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3634. }
  3635. if (priv->wpss_supported) {
  3636. ret = icnss_dms_init(priv);
  3637. if (ret)
  3638. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3639. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3640. icnss_pr_dbg("NV MAC feature is %s\n",
  3641. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3642. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3643. }
  3644. timer_setup(&priv->recovery_timer,
  3645. icnss_recovery_timeout_hdlr, 0);
  3646. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3647. icnss_pr_info("Platform driver probed successfully\n");
  3648. return 0;
  3649. out_unregister_fw_service:
  3650. icnss_unregister_fw_service(priv);
  3651. out_destroy_wq:
  3652. destroy_workqueue(priv->event_wq);
  3653. smmu_cleanup:
  3654. priv->iommu_domain = NULL;
  3655. out_free_resources:
  3656. icnss_put_resources(priv);
  3657. out_reset_drvdata:
  3658. dev_set_drvdata(dev, NULL);
  3659. return ret;
  3660. }
  3661. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3662. {
  3663. if (IS_ERR_OR_NULL(ramdump_info))
  3664. return;
  3665. device_unregister(ramdump_info->dev);
  3666. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3667. kfree(ramdump_info);
  3668. }
  3669. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  3670. {
  3671. if (priv->batt_psy)
  3672. power_supply_put(penv->batt_psy);
  3673. if (priv->psf_supported) {
  3674. flush_workqueue(priv->soc_update_wq);
  3675. destroy_workqueue(priv->soc_update_wq);
  3676. power_supply_unreg_notifier(&priv->psf_nb);
  3677. }
  3678. }
  3679. static int icnss_remove(struct platform_device *pdev)
  3680. {
  3681. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  3682. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  3683. del_timer(&priv->recovery_timer);
  3684. device_init_wakeup(&priv->pdev->dev, false);
  3685. icnss_debugfs_destroy(priv);
  3686. icnss_unregister_power_supply_notifier(penv);
  3687. icnss_sysfs_destroy(priv);
  3688. complete_all(&priv->unblock_shutdown);
  3689. if (priv->is_slate_rfa)
  3690. icnss_slate_ssr_unregister_notifier(priv);
  3691. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  3692. if (priv->wpss_supported) {
  3693. icnss_dms_deinit(priv);
  3694. icnss_wpss_early_ssr_unregister_notifier(priv);
  3695. icnss_wpss_ssr_unregister_notifier(priv);
  3696. } else {
  3697. icnss_modem_ssr_unregister_notifier(priv);
  3698. icnss_pdr_unregister_notifier(priv);
  3699. }
  3700. if (priv->device_id == WCN6750_DEVICE_ID) {
  3701. icnss_genl_exit();
  3702. icnss_runtime_pm_deinit(priv);
  3703. if (!IS_ERR_OR_NULL(priv->mbox_chan))
  3704. mbox_free_channel(priv->mbox_chan);
  3705. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3706. complete_all(&priv->smp2p_soc_wake_wait);
  3707. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  3708. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  3709. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  3710. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  3711. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  3712. if (priv->soc_wake_wq)
  3713. destroy_workqueue(priv->soc_wake_wq);
  3714. }
  3715. class_destroy(priv->icnss_ramdump_class);
  3716. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  3717. icnss_unregister_fw_service(priv);
  3718. if (priv->event_wq)
  3719. destroy_workqueue(priv->event_wq);
  3720. priv->iommu_domain = NULL;
  3721. icnss_hw_power_off(priv);
  3722. icnss_put_resources(priv);
  3723. dev_set_drvdata(&pdev->dev, NULL);
  3724. return 0;
  3725. }
  3726. void icnss_recovery_timeout_hdlr(struct timer_list *t)
  3727. {
  3728. struct icnss_priv *priv = from_timer(priv, t, recovery_timer);
  3729. icnss_pr_err("Timeout waiting for FW Ready 0x%lx\n", priv->state);
  3730. ICNSS_ASSERT(0);
  3731. }
  3732. #ifdef CONFIG_PM_SLEEP
  3733. static int icnss_pm_suspend(struct device *dev)
  3734. {
  3735. struct icnss_priv *priv = dev_get_drvdata(dev);
  3736. int ret = 0;
  3737. if (priv->magic != ICNSS_MAGIC) {
  3738. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  3739. dev, priv, priv->magic);
  3740. return -EINVAL;
  3741. }
  3742. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  3743. if (!priv->ops || !priv->ops->pm_suspend ||
  3744. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3745. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3746. return 0;
  3747. ret = priv->ops->pm_suspend(dev);
  3748. if (ret == 0) {
  3749. if (priv->device_id == WCN6750_DEVICE_ID) {
  3750. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3751. !test_bit(ICNSS_MODE_ON, &priv->state))
  3752. return 0;
  3753. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3754. ICNSS_SMP2P_OUT_POWER_SAVE);
  3755. }
  3756. priv->stats.pm_suspend++;
  3757. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  3758. } else {
  3759. priv->stats.pm_suspend_err++;
  3760. }
  3761. return ret;
  3762. }
  3763. static int icnss_pm_resume(struct device *dev)
  3764. {
  3765. struct icnss_priv *priv = dev_get_drvdata(dev);
  3766. int ret = 0;
  3767. if (priv->magic != ICNSS_MAGIC) {
  3768. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  3769. dev, priv, priv->magic);
  3770. return -EINVAL;
  3771. }
  3772. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  3773. if (!priv->ops || !priv->ops->pm_resume ||
  3774. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3775. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3776. goto out;
  3777. ret = priv->ops->pm_resume(dev);
  3778. out:
  3779. if (ret == 0) {
  3780. priv->stats.pm_resume++;
  3781. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  3782. } else {
  3783. priv->stats.pm_resume_err++;
  3784. }
  3785. return ret;
  3786. }
  3787. static int icnss_pm_suspend_noirq(struct device *dev)
  3788. {
  3789. struct icnss_priv *priv = dev_get_drvdata(dev);
  3790. int ret = 0;
  3791. if (priv->magic != ICNSS_MAGIC) {
  3792. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  3793. dev, priv, priv->magic);
  3794. return -EINVAL;
  3795. }
  3796. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  3797. if (!priv->ops || !priv->ops->suspend_noirq ||
  3798. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3799. goto out;
  3800. ret = priv->ops->suspend_noirq(dev);
  3801. out:
  3802. if (ret == 0) {
  3803. priv->stats.pm_suspend_noirq++;
  3804. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3805. } else {
  3806. priv->stats.pm_suspend_noirq_err++;
  3807. }
  3808. return ret;
  3809. }
  3810. static int icnss_pm_resume_noirq(struct device *dev)
  3811. {
  3812. struct icnss_priv *priv = dev_get_drvdata(dev);
  3813. int ret = 0;
  3814. if (priv->magic != ICNSS_MAGIC) {
  3815. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  3816. dev, priv, priv->magic);
  3817. return -EINVAL;
  3818. }
  3819. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  3820. if (!priv->ops || !priv->ops->resume_noirq ||
  3821. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3822. goto out;
  3823. ret = priv->ops->resume_noirq(dev);
  3824. out:
  3825. if (ret == 0) {
  3826. priv->stats.pm_resume_noirq++;
  3827. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3828. } else {
  3829. priv->stats.pm_resume_noirq_err++;
  3830. }
  3831. return ret;
  3832. }
  3833. static int icnss_pm_runtime_suspend(struct device *dev)
  3834. {
  3835. struct icnss_priv *priv = dev_get_drvdata(dev);
  3836. int ret = 0;
  3837. if (priv->device_id != WCN6750_DEVICE_ID) {
  3838. icnss_pr_err("Ignore runtime suspend:\n");
  3839. goto out;
  3840. }
  3841. if (priv->magic != ICNSS_MAGIC) {
  3842. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  3843. dev, priv, priv->magic);
  3844. return -EINVAL;
  3845. }
  3846. if (!priv->ops || !priv->ops->runtime_suspend ||
  3847. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3848. goto out;
  3849. icnss_pr_vdbg("Runtime suspend\n");
  3850. ret = priv->ops->runtime_suspend(dev);
  3851. if (!ret) {
  3852. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3853. !test_bit(ICNSS_MODE_ON, &priv->state))
  3854. return 0;
  3855. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3856. ICNSS_SMP2P_OUT_POWER_SAVE);
  3857. }
  3858. out:
  3859. return ret;
  3860. }
  3861. static int icnss_pm_runtime_resume(struct device *dev)
  3862. {
  3863. struct icnss_priv *priv = dev_get_drvdata(dev);
  3864. int ret = 0;
  3865. if (priv->device_id != WCN6750_DEVICE_ID) {
  3866. icnss_pr_err("Ignore runtime resume:\n");
  3867. goto out;
  3868. }
  3869. if (priv->magic != ICNSS_MAGIC) {
  3870. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  3871. dev, priv, priv->magic);
  3872. return -EINVAL;
  3873. }
  3874. if (!priv->ops || !priv->ops->runtime_resume ||
  3875. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3876. goto out;
  3877. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  3878. ret = priv->ops->runtime_resume(dev);
  3879. out:
  3880. return ret;
  3881. }
  3882. static int icnss_pm_runtime_idle(struct device *dev)
  3883. {
  3884. struct icnss_priv *priv = dev_get_drvdata(dev);
  3885. if (priv->device_id != WCN6750_DEVICE_ID) {
  3886. icnss_pr_err("Ignore runtime idle:\n");
  3887. goto out;
  3888. }
  3889. icnss_pr_vdbg("Runtime idle\n");
  3890. pm_request_autosuspend(dev);
  3891. out:
  3892. return -EBUSY;
  3893. }
  3894. #endif
  3895. static const struct dev_pm_ops icnss_pm_ops = {
  3896. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  3897. icnss_pm_resume)
  3898. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  3899. icnss_pm_resume_noirq)
  3900. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  3901. icnss_pm_runtime_idle)
  3902. };
  3903. static struct platform_driver icnss_driver = {
  3904. .probe = icnss_probe,
  3905. .remove = icnss_remove,
  3906. .driver = {
  3907. .name = "icnss2",
  3908. .pm = &icnss_pm_ops,
  3909. .of_match_table = icnss_dt_match,
  3910. },
  3911. };
  3912. static int __init icnss_initialize(void)
  3913. {
  3914. icnss_debug_init();
  3915. return platform_driver_register(&icnss_driver);
  3916. }
  3917. static void __exit icnss_exit(void)
  3918. {
  3919. platform_driver_unregister(&icnss_driver);
  3920. icnss_debug_deinit();
  3921. }
  3922. module_init(icnss_initialize);
  3923. module_exit(icnss_exit);
  3924. MODULE_LICENSE("GPL v2");
  3925. MODULE_DESCRIPTION("iWCN CORE platform driver");