dp_main.c 87 KB

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  1. /*
  2. * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <hal_api.h>
  22. #include <hif.h>
  23. #include <htt.h>
  24. #include <wdi_event.h>
  25. #include <queue.h>
  26. #include "dp_htt.h"
  27. #include "dp_types.h"
  28. #include "dp_internal.h"
  29. #include "dp_tx.h"
  30. #include "dp_rx.h"
  31. #include <cdp_txrx_handle.h>
  32. #include <wlan_cfg.h>
  33. #include "cdp_txrx_cmn_struct.h"
  34. #include <qdf_util.h>
  35. #include "dp_peer.h"
  36. #define DP_INTR_POLL_TIMER_MS 100
  37. #define DP_MCS_LENGTH (6*MAX_MCS)
  38. #define DP_NSS_LENGTH (6*SS_COUNT)
  39. #define DP_RXDMA_ERR_LENGTH (6*MAX_RXDMA_ERRORS)
  40. #define DP_REO_ERR_LENGTH (6*REO_ERROR_TYPE_MAX)
  41. /**
  42. * default_dscp_tid_map - Default DSCP-TID mapping
  43. *
  44. * DSCP TID AC
  45. * 000000 0 WME_AC_BE
  46. * 001000 1 WME_AC_BK
  47. * 010000 1 WME_AC_BK
  48. * 011000 0 WME_AC_BE
  49. * 100000 5 WME_AC_VI
  50. * 101000 5 WME_AC_VI
  51. * 110000 6 WME_AC_VO
  52. * 111000 6 WME_AC_VO
  53. */
  54. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  55. 0, 0, 0, 0, 0, 0, 0, 0,
  56. 1, 1, 1, 1, 1, 1, 1, 1,
  57. 1, 1, 1, 1, 1, 1, 1, 1,
  58. 0, 0, 0, 0, 0, 0, 0, 0,
  59. 5, 5, 5, 5, 5, 5, 5, 5,
  60. 5, 5, 5, 5, 5, 5, 5, 5,
  61. 6, 6, 6, 6, 6, 6, 6, 6,
  62. 6, 6, 6, 6, 6, 6, 6, 6,
  63. };
  64. /**
  65. * @brief Select the type of statistics
  66. */
  67. enum dp_stats_type {
  68. STATS_FW = 0,
  69. STATS_HOST = 1,
  70. STATS_TYPE_MAX = 2,
  71. };
  72. /**
  73. * @brief General Firmware statistics options
  74. *
  75. */
  76. enum dp_fw_stats {
  77. TXRX_FW_STATS_INVALID = -1,
  78. };
  79. /**
  80. * @brief Firmware and Host statistics
  81. * currently supported
  82. */
  83. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  84. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  85. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  86. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  87. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  88. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  89. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  90. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  91. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  92. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  93. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  94. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  95. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  96. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  97. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  98. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  99. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  100. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  101. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  102. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  103. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  104. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  105. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  106. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  107. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  108. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  109. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  110. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  111. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  112. };
  113. /**
  114. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  115. */
  116. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  117. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  118. {
  119. void *hal_soc = soc->hal_soc;
  120. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  121. /* TODO: See if we should get align size from hal */
  122. uint32_t ring_base_align = 8;
  123. struct hal_srng_params ring_params;
  124. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  125. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  126. srng->hal_srng = NULL;
  127. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  128. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  129. soc->osdev, soc->osdev->dev, srng->alloc_size,
  130. &(srng->base_paddr_unaligned));
  131. if (!srng->base_vaddr_unaligned) {
  132. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  133. FL("alloc failed - ring_type: %d, ring_num %d"),
  134. ring_type, ring_num);
  135. return QDF_STATUS_E_NOMEM;
  136. }
  137. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  138. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  139. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  140. ((unsigned long)(ring_params.ring_base_vaddr) -
  141. (unsigned long)srng->base_vaddr_unaligned);
  142. ring_params.num_entries = num_entries;
  143. /* TODO: Check MSI support and get MSI settings from HIF layer */
  144. ring_params.msi_data = 0;
  145. ring_params.msi_addr = 0;
  146. /* TODO: Setup interrupt timer and batch counter thresholds for
  147. * interrupt mitigation based on ring type
  148. */
  149. ring_params.intr_timer_thres_us = 8;
  150. ring_params.intr_batch_cntr_thres_entries = 1;
  151. /* TODO: Currently hal layer takes care of endianness related settings.
  152. * See if these settings need to passed from DP layer
  153. */
  154. ring_params.flags = 0;
  155. /* Enable low threshold interrupts for rx buffer rings (regular and
  156. * monitor buffer rings.
  157. * TODO: See if this is required for any other ring
  158. */
  159. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF)) {
  160. /* TODO: Setting low threshold to 1/8th of ring size
  161. * see if this needs to be configurable
  162. */
  163. ring_params.low_threshold = num_entries >> 3;
  164. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  165. }
  166. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  167. mac_id, &ring_params);
  168. return 0;
  169. }
  170. /**
  171. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  172. * Any buffers allocated and attached to ring entries are expected to be freed
  173. * before calling this function.
  174. */
  175. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  176. int ring_type, int ring_num)
  177. {
  178. if (!srng->hal_srng) {
  179. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  180. FL("Ring type: %d, num:%d not setup"),
  181. ring_type, ring_num);
  182. return;
  183. }
  184. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  185. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  186. srng->alloc_size,
  187. srng->base_vaddr_unaligned,
  188. srng->base_paddr_unaligned, 0);
  189. }
  190. /* TODO: Need this interface from HIF */
  191. void *hif_get_hal_handle(void *hif_handle);
  192. /*
  193. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  194. * @dp_ctx: DP SOC handle
  195. * @budget: Number of frames/descriptors that can be processed in one shot
  196. *
  197. * Return: remaining budget/quota for the soc device
  198. */
  199. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  200. {
  201. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  202. struct dp_soc *soc = int_ctx->soc;
  203. int ring = 0;
  204. uint32_t work_done = 0;
  205. uint32_t budget = dp_budget;
  206. uint8_t tx_mask = int_ctx->tx_ring_mask;
  207. uint8_t rx_mask = int_ctx->rx_ring_mask;
  208. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  209. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  210. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  211. /* Process Tx completion interrupts first to return back buffers */
  212. if (tx_mask) {
  213. for (ring = 0; ring < soc->num_tcl_data_rings; ring++) {
  214. if (tx_mask & (1 << ring)) {
  215. work_done =
  216. dp_tx_comp_handler(soc, ring, budget);
  217. budget -= work_done;
  218. if (work_done)
  219. QDF_TRACE(QDF_MODULE_ID_DP,
  220. QDF_TRACE_LEVEL_INFO,
  221. "tx mask 0x%x ring %d,"
  222. "budget %d",
  223. tx_mask, ring, budget);
  224. if (budget <= 0)
  225. goto budget_done;
  226. }
  227. }
  228. }
  229. /* Process REO Exception ring interrupt */
  230. if (rx_err_mask) {
  231. work_done = dp_rx_err_process(soc,
  232. soc->reo_exception_ring.hal_srng, budget);
  233. budget -= work_done;
  234. if (work_done)
  235. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  236. "REO Exception Ring: work_done %d budget %d",
  237. work_done, budget);
  238. if (budget <= 0) {
  239. goto budget_done;
  240. }
  241. }
  242. /* Process Rx WBM release ring interrupt */
  243. if (rx_wbm_rel_mask) {
  244. work_done = dp_rx_wbm_err_process(soc,
  245. soc->rx_rel_ring.hal_srng, budget);
  246. budget -= work_done;
  247. if (work_done)
  248. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  249. "WBM Release Ring: work_done %d budget %d",
  250. work_done, budget);
  251. if (budget <= 0) {
  252. goto budget_done;
  253. }
  254. }
  255. /* Process Rx interrupts */
  256. if (rx_mask) {
  257. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  258. if (rx_mask & (1 << ring)) {
  259. work_done =
  260. dp_rx_process(soc,
  261. soc->reo_dest_ring[ring].hal_srng,
  262. budget);
  263. budget -= work_done;
  264. if (work_done)
  265. QDF_TRACE(QDF_MODULE_ID_DP,
  266. QDF_TRACE_LEVEL_INFO,
  267. "rx mask 0x%x ring %d,"
  268. "budget %d",
  269. tx_mask, ring, budget);
  270. if (budget <= 0)
  271. goto budget_done;
  272. }
  273. }
  274. }
  275. if (reo_status_mask)
  276. dp_reo_status_ring_handler(soc);
  277. budget_done:
  278. return dp_budget - budget;
  279. }
  280. /* dp_interrupt_timer()- timer poll for interrupts
  281. *
  282. * @arg: SoC Handle
  283. *
  284. * Return:
  285. *
  286. */
  287. #ifdef DP_INTR_POLL_BASED
  288. static void dp_interrupt_timer(void *arg)
  289. {
  290. struct dp_soc *soc = (struct dp_soc *) arg;
  291. int i;
  292. if (qdf_atomic_read(&soc->cmn_init_done)) {
  293. for (i = 0;
  294. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  295. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  296. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  297. }
  298. }
  299. /*
  300. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  301. * @txrx_soc: DP SOC handle
  302. *
  303. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  304. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  305. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  306. *
  307. * Return: 0 for success. nonzero for failure.
  308. */
  309. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  310. {
  311. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  312. int i;
  313. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  314. soc->intr_ctx[i].tx_ring_mask = 0xF;
  315. soc->intr_ctx[i].rx_ring_mask = 0xF;
  316. soc->intr_ctx[i].rx_mon_ring_mask = 0xF;
  317. soc->intr_ctx[i].rx_err_ring_mask = 0x1;
  318. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0x1;
  319. soc->intr_ctx[i].reo_status_ring_mask = 0x1;
  320. soc->intr_ctx[i].soc = soc;
  321. }
  322. qdf_timer_init(soc->osdev, &soc->int_timer,
  323. dp_interrupt_timer, (void *)soc,
  324. QDF_TIMER_TYPE_WAKE_APPS);
  325. return QDF_STATUS_SUCCESS;
  326. }
  327. /*
  328. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  329. * @txrx_soc: DP SOC handle
  330. *
  331. * Return: void
  332. */
  333. static void dp_soc_interrupt_detach(void *txrx_soc)
  334. {
  335. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  336. qdf_timer_stop(&soc->int_timer);
  337. qdf_timer_free(&soc->int_timer);
  338. }
  339. #else
  340. /*
  341. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  342. * @txrx_soc: DP SOC handle
  343. *
  344. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  345. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  346. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  347. *
  348. * Return: 0 for success. nonzero for failure.
  349. */
  350. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  351. {
  352. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  353. int i = 0;
  354. int num_irq = 0;
  355. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  356. int j = 0;
  357. int ret = 0;
  358. /* Map of IRQ ids registered with one interrupt context */
  359. int irq_id_map[HIF_MAX_GRP_IRQ];
  360. int tx_mask =
  361. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  362. int rx_mask =
  363. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  364. int rx_mon_mask =
  365. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  366. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  367. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  368. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  369. soc->intr_ctx[i].soc = soc;
  370. num_irq = 0;
  371. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  372. if (tx_mask & (1 << j)) {
  373. irq_id_map[num_irq++] =
  374. (wbm2host_tx_completions_ring1 - j);
  375. }
  376. if (rx_mask & (1 << j)) {
  377. irq_id_map[num_irq++] =
  378. (reo2host_destination_ring1 - j);
  379. }
  380. if (rx_mon_mask & (1 << j)) {
  381. irq_id_map[num_irq++] =
  382. (rxdma2host_monitor_destination_mac1
  383. - j);
  384. }
  385. }
  386. ret = hif_register_ext_group_int_handler(soc->hif_handle,
  387. num_irq, irq_id_map,
  388. dp_service_srngs,
  389. &soc->intr_ctx[i]);
  390. if (ret) {
  391. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  392. FL("failed, ret = %d"), ret);
  393. return QDF_STATUS_E_FAILURE;
  394. }
  395. }
  396. return QDF_STATUS_SUCCESS;
  397. }
  398. /*
  399. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  400. * @txrx_soc: DP SOC handle
  401. *
  402. * Return: void
  403. */
  404. static void dp_soc_interrupt_detach(void *txrx_soc)
  405. {
  406. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  407. int i;
  408. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  409. soc->intr_ctx[i].tx_ring_mask = 0;
  410. soc->intr_ctx[i].rx_ring_mask = 0;
  411. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  412. }
  413. }
  414. #endif
  415. #define AVG_MAX_MPDUS_PER_TID 128
  416. #define AVG_TIDS_PER_CLIENT 2
  417. #define AVG_FLOWS_PER_TID 2
  418. #define AVG_MSDUS_PER_FLOW 128
  419. #define AVG_MSDUS_PER_MPDU 4
  420. /*
  421. * Allocate and setup link descriptor pool that will be used by HW for
  422. * various link and queue descriptors and managed by WBM
  423. */
  424. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  425. {
  426. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  427. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  428. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  429. uint32_t num_mpdus_per_link_desc =
  430. hal_num_mpdus_per_link_desc(soc->hal_soc);
  431. uint32_t num_msdus_per_link_desc =
  432. hal_num_msdus_per_link_desc(soc->hal_soc);
  433. uint32_t num_mpdu_links_per_queue_desc =
  434. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  435. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  436. uint32_t total_link_descs, total_mem_size;
  437. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  438. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  439. uint32_t num_link_desc_banks;
  440. uint32_t last_bank_size = 0;
  441. uint32_t entry_size, num_entries;
  442. int i;
  443. /* Only Tx queue descriptors are allocated from common link descriptor
  444. * pool Rx queue descriptors are not included in this because (REO queue
  445. * extension descriptors) they are expected to be allocated contiguously
  446. * with REO queue descriptors
  447. */
  448. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  449. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  450. num_mpdu_queue_descs = num_mpdu_link_descs /
  451. num_mpdu_links_per_queue_desc;
  452. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  453. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  454. num_msdus_per_link_desc;
  455. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  456. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  457. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  458. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  459. /* Round up to power of 2 */
  460. total_link_descs = 1;
  461. while (total_link_descs < num_entries)
  462. total_link_descs <<= 1;
  463. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  464. FL("total_link_descs: %u, link_desc_size: %d"),
  465. total_link_descs, link_desc_size);
  466. total_mem_size = total_link_descs * link_desc_size;
  467. total_mem_size += link_desc_align;
  468. if (total_mem_size <= max_alloc_size) {
  469. num_link_desc_banks = 0;
  470. last_bank_size = total_mem_size;
  471. } else {
  472. num_link_desc_banks = (total_mem_size) /
  473. (max_alloc_size - link_desc_align);
  474. last_bank_size = total_mem_size %
  475. (max_alloc_size - link_desc_align);
  476. }
  477. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  478. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  479. total_mem_size, num_link_desc_banks);
  480. for (i = 0; i < num_link_desc_banks; i++) {
  481. soc->link_desc_banks[i].base_vaddr_unaligned =
  482. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  483. max_alloc_size,
  484. &(soc->link_desc_banks[i].base_paddr_unaligned));
  485. soc->link_desc_banks[i].size = max_alloc_size;
  486. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  487. soc->link_desc_banks[i].base_vaddr_unaligned) +
  488. ((unsigned long)(
  489. soc->link_desc_banks[i].base_vaddr_unaligned) %
  490. link_desc_align));
  491. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  492. soc->link_desc_banks[i].base_paddr_unaligned) +
  493. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  494. (unsigned long)(
  495. soc->link_desc_banks[i].base_vaddr_unaligned));
  496. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  497. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  498. FL("Link descriptor memory alloc failed"));
  499. goto fail;
  500. }
  501. }
  502. if (last_bank_size) {
  503. /* Allocate last bank in case total memory required is not exact
  504. * multiple of max_alloc_size
  505. */
  506. soc->link_desc_banks[i].base_vaddr_unaligned =
  507. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  508. last_bank_size,
  509. &(soc->link_desc_banks[i].base_paddr_unaligned));
  510. soc->link_desc_banks[i].size = last_bank_size;
  511. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  512. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  513. ((unsigned long)(
  514. soc->link_desc_banks[i].base_vaddr_unaligned) %
  515. link_desc_align));
  516. soc->link_desc_banks[i].base_paddr =
  517. (unsigned long)(
  518. soc->link_desc_banks[i].base_paddr_unaligned) +
  519. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  520. (unsigned long)(
  521. soc->link_desc_banks[i].base_vaddr_unaligned));
  522. }
  523. /* Allocate and setup link descriptor idle list for HW internal use */
  524. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  525. total_mem_size = entry_size * total_link_descs;
  526. if (total_mem_size <= max_alloc_size) {
  527. void *desc;
  528. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  529. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  530. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  531. FL("Link desc idle ring setup failed"));
  532. goto fail;
  533. }
  534. hal_srng_access_start_unlocked(soc->hal_soc,
  535. soc->wbm_idle_link_ring.hal_srng);
  536. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  537. soc->link_desc_banks[i].base_paddr; i++) {
  538. uint32_t num_entries = (soc->link_desc_banks[i].size -
  539. (unsigned long)(
  540. soc->link_desc_banks[i].base_vaddr) -
  541. (unsigned long)(
  542. soc->link_desc_banks[i].base_vaddr_unaligned))
  543. / link_desc_size;
  544. unsigned long paddr = (unsigned long)(
  545. soc->link_desc_banks[i].base_paddr);
  546. while (num_entries && (desc = hal_srng_src_get_next(
  547. soc->hal_soc,
  548. soc->wbm_idle_link_ring.hal_srng))) {
  549. hal_set_link_desc_addr(desc, i, paddr);
  550. num_entries--;
  551. paddr += link_desc_size;
  552. }
  553. }
  554. hal_srng_access_end_unlocked(soc->hal_soc,
  555. soc->wbm_idle_link_ring.hal_srng);
  556. } else {
  557. uint32_t num_scatter_bufs;
  558. uint32_t num_entries_per_buf;
  559. uint32_t rem_entries;
  560. uint8_t *scatter_buf_ptr;
  561. uint16_t scatter_buf_num;
  562. soc->wbm_idle_scatter_buf_size =
  563. hal_idle_list_scatter_buf_size(soc->hal_soc);
  564. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  565. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  566. num_scatter_bufs = (total_mem_size /
  567. soc->wbm_idle_scatter_buf_size) + (total_mem_size %
  568. soc->wbm_idle_scatter_buf_size) ? 1 : 0;
  569. for (i = 0; i < num_scatter_bufs; i++) {
  570. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  571. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  572. soc->wbm_idle_scatter_buf_size,
  573. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  574. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  575. QDF_TRACE(QDF_MODULE_ID_DP,
  576. QDF_TRACE_LEVEL_ERROR,
  577. FL("Scatter list memory alloc failed"));
  578. goto fail;
  579. }
  580. }
  581. /* Populate idle list scatter buffers with link descriptor
  582. * pointers
  583. */
  584. scatter_buf_num = 0;
  585. scatter_buf_ptr = (uint8_t *)(
  586. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  587. rem_entries = num_entries_per_buf;
  588. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  589. soc->link_desc_banks[i].base_paddr; i++) {
  590. uint32_t num_link_descs =
  591. (soc->link_desc_banks[i].size -
  592. (unsigned long)(
  593. soc->link_desc_banks[i].base_vaddr) -
  594. (unsigned long)(
  595. soc->link_desc_banks[i].base_vaddr_unaligned)) /
  596. link_desc_size;
  597. unsigned long paddr = (unsigned long)(
  598. soc->link_desc_banks[i].base_paddr);
  599. void *desc = NULL;
  600. while (num_link_descs && (desc =
  601. hal_srng_src_get_next(soc->hal_soc,
  602. soc->wbm_idle_link_ring.hal_srng))) {
  603. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  604. i, paddr);
  605. num_link_descs--;
  606. paddr += link_desc_size;
  607. if (rem_entries) {
  608. rem_entries--;
  609. scatter_buf_ptr += link_desc_size;
  610. } else {
  611. rem_entries = num_entries_per_buf;
  612. scatter_buf_num++;
  613. scatter_buf_ptr = (uint8_t *)(
  614. soc->wbm_idle_scatter_buf_base_vaddr[
  615. scatter_buf_num]);
  616. }
  617. }
  618. }
  619. /* Setup link descriptor idle list in HW */
  620. hal_setup_link_idle_list(soc->hal_soc,
  621. soc->wbm_idle_scatter_buf_base_paddr,
  622. soc->wbm_idle_scatter_buf_base_vaddr,
  623. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  624. (uint32_t)(scatter_buf_ptr -
  625. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  626. scatter_buf_num])));
  627. }
  628. return 0;
  629. fail:
  630. if (soc->wbm_idle_link_ring.hal_srng) {
  631. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  632. WBM_IDLE_LINK, 0);
  633. }
  634. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  635. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  636. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  637. soc->wbm_idle_scatter_buf_size,
  638. soc->wbm_idle_scatter_buf_base_vaddr[i],
  639. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  640. }
  641. }
  642. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  643. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  644. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  645. soc->link_desc_banks[i].size,
  646. soc->link_desc_banks[i].base_vaddr_unaligned,
  647. soc->link_desc_banks[i].base_paddr_unaligned,
  648. 0);
  649. }
  650. }
  651. return QDF_STATUS_E_FAILURE;
  652. }
  653. #ifdef notused
  654. /*
  655. * Free link descriptor pool that was setup HW
  656. */
  657. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  658. {
  659. int i;
  660. if (soc->wbm_idle_link_ring.hal_srng) {
  661. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  662. WBM_IDLE_LINK, 0);
  663. }
  664. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  665. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  666. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  667. soc->wbm_idle_scatter_buf_size,
  668. soc->wbm_idle_scatter_buf_base_vaddr[i],
  669. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  670. }
  671. }
  672. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  673. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  674. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  675. soc->link_desc_banks[i].size,
  676. soc->link_desc_banks[i].base_vaddr_unaligned,
  677. soc->link_desc_banks[i].base_paddr_unaligned,
  678. 0);
  679. }
  680. }
  681. }
  682. #endif /* notused */
  683. /* TODO: Following should be configurable */
  684. #define WBM_RELEASE_RING_SIZE 64
  685. #define TCL_DATA_RING_SIZE 512
  686. #define TX_COMP_RING_SIZE 1024
  687. #define TCL_CMD_RING_SIZE 32
  688. #define TCL_STATUS_RING_SIZE 32
  689. #define REO_DST_RING_SIZE 2048
  690. #define REO_REINJECT_RING_SIZE 32
  691. #define RX_RELEASE_RING_SIZE 1024
  692. #define REO_EXCEPTION_RING_SIZE 128
  693. #define REO_CMD_RING_SIZE 32
  694. #define REO_STATUS_RING_SIZE 32
  695. #define RXDMA_BUF_RING_SIZE 1024
  696. #define RXDMA_REFILL_RING_SIZE 2048
  697. #define RXDMA_MONITOR_BUF_RING_SIZE 2048
  698. #define RXDMA_MONITOR_DST_RING_SIZE 2048
  699. #define RXDMA_MONITOR_STATUS_RING_SIZE 2048
  700. /*
  701. * dp_soc_cmn_setup() - Common SoC level initializion
  702. * @soc: Datapath SOC handle
  703. *
  704. * This is an internal function used to setup common SOC data structures,
  705. * to be called from PDEV attach after receiving HW mode capabilities from FW
  706. */
  707. static int dp_soc_cmn_setup(struct dp_soc *soc)
  708. {
  709. int i;
  710. struct hal_reo_params reo_params;
  711. if (qdf_atomic_read(&soc->cmn_init_done))
  712. return 0;
  713. if (dp_peer_find_attach(soc))
  714. goto fail0;
  715. if (dp_hw_link_desc_pool_setup(soc))
  716. goto fail1;
  717. /* Setup SRNG rings */
  718. /* Common rings */
  719. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  720. WBM_RELEASE_RING_SIZE)) {
  721. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  722. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  723. goto fail1;
  724. }
  725. soc->num_tcl_data_rings = 0;
  726. /* Tx data rings */
  727. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  728. soc->num_tcl_data_rings =
  729. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  730. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  731. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  732. TCL_DATA, i, 0, TCL_DATA_RING_SIZE)) {
  733. QDF_TRACE(QDF_MODULE_ID_DP,
  734. QDF_TRACE_LEVEL_ERROR,
  735. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  736. goto fail1;
  737. }
  738. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  739. WBM2SW_RELEASE, i, 0, TX_COMP_RING_SIZE)) {
  740. QDF_TRACE(QDF_MODULE_ID_DP,
  741. QDF_TRACE_LEVEL_ERROR,
  742. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  743. goto fail1;
  744. }
  745. }
  746. } else {
  747. /* This will be incremented during per pdev ring setup */
  748. soc->num_tcl_data_rings = 0;
  749. }
  750. if (dp_tx_soc_attach(soc)) {
  751. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  752. FL("dp_tx_soc_attach failed"));
  753. goto fail1;
  754. }
  755. /* TCL command and status rings */
  756. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  757. TCL_CMD_RING_SIZE)) {
  758. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  759. FL("dp_srng_setup failed for tcl_cmd_ring"));
  760. goto fail1;
  761. }
  762. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  763. TCL_STATUS_RING_SIZE)) {
  764. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  765. FL("dp_srng_setup failed for tcl_status_ring"));
  766. goto fail1;
  767. }
  768. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  769. * descriptors
  770. */
  771. /* Rx data rings */
  772. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  773. soc->num_reo_dest_rings =
  774. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  775. QDF_TRACE(QDF_MODULE_ID_DP,
  776. QDF_TRACE_LEVEL_ERROR,
  777. FL("num_reo_dest_rings %d\n"), soc->num_reo_dest_rings);
  778. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  779. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  780. i, 0, REO_DST_RING_SIZE)) {
  781. QDF_TRACE(QDF_MODULE_ID_DP,
  782. QDF_TRACE_LEVEL_ERROR,
  783. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  784. goto fail1;
  785. }
  786. }
  787. } else {
  788. /* This will be incremented during per pdev ring setup */
  789. soc->num_reo_dest_rings = 0;
  790. }
  791. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  792. /* REO reinjection ring */
  793. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  794. REO_REINJECT_RING_SIZE)) {
  795. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  796. FL("dp_srng_setup failed for reo_reinject_ring"));
  797. goto fail1;
  798. }
  799. /* Rx release ring */
  800. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  801. RX_RELEASE_RING_SIZE)) {
  802. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  803. FL("dp_srng_setup failed for rx_rel_ring"));
  804. goto fail1;
  805. }
  806. /* Rx exception ring */
  807. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  808. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  809. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  810. FL("dp_srng_setup failed for reo_exception_ring"));
  811. goto fail1;
  812. }
  813. /* REO command and status rings */
  814. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  815. REO_CMD_RING_SIZE)) {
  816. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  817. FL("dp_srng_setup failed for reo_cmd_ring"));
  818. goto fail1;
  819. }
  820. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  821. TAILQ_INIT(&soc->rx.reo_cmd_list);
  822. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  823. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  824. REO_STATUS_RING_SIZE)) {
  825. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  826. FL("dp_srng_setup failed for reo_status_ring"));
  827. goto fail1;
  828. }
  829. dp_soc_interrupt_attach(soc);
  830. /* Setup HW REO */
  831. qdf_mem_zero(&reo_params, sizeof(reo_params));
  832. if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx))
  833. reo_params.rx_hash_enabled = true;
  834. hal_reo_setup(soc->hal_soc, &reo_params);
  835. qdf_atomic_set(&soc->cmn_init_done, 1);
  836. return 0;
  837. fail1:
  838. /*
  839. * Cleanup will be done as part of soc_detach, which will
  840. * be called on pdev attach failure
  841. */
  842. fail0:
  843. return QDF_STATUS_E_FAILURE;
  844. }
  845. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  846. static void dp_lro_hash_setup(struct dp_soc *soc)
  847. {
  848. struct cdp_lro_hash_config lro_hash;
  849. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  850. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  851. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  852. FL("LRO disabled RX hash disabled"));
  853. return;
  854. }
  855. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  856. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx)) {
  857. lro_hash.lro_enable = 1;
  858. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  859. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  860. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  861. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  862. }
  863. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR, FL("enabled"));
  864. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  865. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  866. LRO_IPV4_SEED_ARR_SZ));
  867. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  868. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  869. LRO_IPV6_SEED_ARR_SZ));
  870. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  871. "lro_hash: lro_enable: 0x%x"
  872. "lro_hash: tcp_flag 0x%x tcp_flag_mask 0x%x",
  873. lro_hash.lro_enable, lro_hash.tcp_flag,
  874. lro_hash.tcp_flag_mask);
  875. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  876. FL("lro_hash: toeplitz_hash_ipv4:"));
  877. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  878. QDF_TRACE_LEVEL_ERROR,
  879. (void *)lro_hash.toeplitz_hash_ipv4,
  880. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  881. LRO_IPV4_SEED_ARR_SZ));
  882. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  883. FL("lro_hash: toeplitz_hash_ipv6:"));
  884. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  885. QDF_TRACE_LEVEL_ERROR,
  886. (void *)lro_hash.toeplitz_hash_ipv6,
  887. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  888. LRO_IPV6_SEED_ARR_SZ));
  889. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  890. if (soc->cdp_soc.ol_ops->lro_hash_config)
  891. (void)soc->cdp_soc.ol_ops->lro_hash_config
  892. (soc->osif_soc, &lro_hash);
  893. }
  894. /*
  895. * dp_rxdma_ring_setup() - configure the RX DMA rings
  896. * @soc: data path SoC handle
  897. * @pdev: Physical device handle
  898. *
  899. * Return: 0 - success, > 0 - failure
  900. */
  901. #ifdef QCA_HOST2FW_RXBUF_RING
  902. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  903. struct dp_pdev *pdev)
  904. {
  905. int max_mac_rings =
  906. wlan_cfg_get_num_mac_rings
  907. (pdev->wlan_cfg_ctx);
  908. int i;
  909. for (i = 0; i < max_mac_rings; i++) {
  910. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  911. "%s: pdev_id %d mac_id %d\n",
  912. __func__, pdev->pdev_id, i);
  913. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  914. RXDMA_BUF, 1, i, RXDMA_BUF_RING_SIZE)) {
  915. QDF_TRACE(QDF_MODULE_ID_DP,
  916. QDF_TRACE_LEVEL_ERROR,
  917. FL("failed rx mac ring setup"));
  918. return QDF_STATUS_E_FAILURE;
  919. }
  920. }
  921. return QDF_STATUS_SUCCESS;
  922. }
  923. #else
  924. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  925. struct dp_pdev *pdev)
  926. {
  927. return QDF_STATUS_SUCCESS;
  928. }
  929. #endif
  930. /**
  931. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  932. * @pdev - DP_PDEV handle
  933. *
  934. * Return: void
  935. */
  936. static inline void
  937. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  938. {
  939. uint8_t map_id;
  940. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  941. qdf_mem_copy(pdev->dscp_tid_map[map_id], default_dscp_tid_map,
  942. sizeof(default_dscp_tid_map));
  943. }
  944. for (map_id = 0; map_id < HAL_MAX_HW_DSCP_TID_MAPS; map_id++) {
  945. hal_tx_set_dscp_tid_map(pdev->soc->hal_soc,
  946. pdev->dscp_tid_map[map_id],
  947. map_id);
  948. }
  949. }
  950. /*
  951. * dp_pdev_attach_wifi3() - attach txrx pdev
  952. * @osif_pdev: Opaque PDEV handle from OSIF/HDD
  953. * @txrx_soc: Datapath SOC handle
  954. * @htc_handle: HTC handle for host-target interface
  955. * @qdf_osdev: QDF OS device
  956. * @pdev_id: PDEV ID
  957. *
  958. * Return: DP PDEV handle on success, NULL on failure
  959. */
  960. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  961. struct cdp_cfg *ctrl_pdev,
  962. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  963. {
  964. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  965. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  966. if (!pdev) {
  967. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  968. FL("DP PDEV memory allocation failed"));
  969. goto fail0;
  970. }
  971. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  972. if (!pdev->wlan_cfg_ctx) {
  973. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  974. FL("pdev cfg_attach failed"));
  975. qdf_mem_free(pdev);
  976. goto fail0;
  977. }
  978. pdev->soc = soc;
  979. pdev->osif_pdev = ctrl_pdev;
  980. pdev->pdev_id = pdev_id;
  981. soc->pdev_list[pdev_id] = pdev;
  982. TAILQ_INIT(&pdev->vdev_list);
  983. pdev->vdev_count = 0;
  984. if (dp_soc_cmn_setup(soc)) {
  985. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  986. FL("dp_soc_cmn_setup failed"));
  987. goto fail1;
  988. }
  989. /* Setup per PDEV TCL rings if configured */
  990. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  991. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  992. pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  993. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  994. FL("dp_srng_setup failed for tcl_data_ring"));
  995. goto fail1;
  996. }
  997. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  998. WBM2SW_RELEASE, pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  999. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1000. FL("dp_srng_setup failed for tx_comp_ring"));
  1001. goto fail1;
  1002. }
  1003. soc->num_tcl_data_rings++;
  1004. }
  1005. /* Tx specific init */
  1006. if (dp_tx_pdev_attach(pdev)) {
  1007. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1008. FL("dp_tx_pdev_attach failed"));
  1009. goto fail1;
  1010. }
  1011. /* Setup per PDEV REO rings if configured */
  1012. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1013. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  1014. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  1015. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1016. FL("dp_srng_setup failed for reo_dest_ringn"));
  1017. goto fail1;
  1018. }
  1019. soc->num_reo_dest_rings++;
  1020. }
  1021. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  1022. RXDMA_REFILL_RING_SIZE)) {
  1023. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1024. FL("dp_srng_setup failed rx refill ring"));
  1025. goto fail1;
  1026. }
  1027. if (dp_rxdma_ring_setup(soc, pdev)) {
  1028. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1029. FL("RXDMA ring config failed"));
  1030. goto fail1;
  1031. }
  1032. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0,
  1033. pdev_id, RXDMA_MONITOR_BUF_RING_SIZE)) {
  1034. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1035. FL("dp_srng_setup failed for rxdma_mon_buf_ring"));
  1036. goto fail1;
  1037. }
  1038. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0,
  1039. pdev_id, RXDMA_MONITOR_DST_RING_SIZE)) {
  1040. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1041. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  1042. goto fail1;
  1043. }
  1044. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring,
  1045. RXDMA_MONITOR_STATUS, 0, pdev_id,
  1046. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  1047. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1048. FL("dp_srng_setup failed for rxdma_mon_status_ring"));
  1049. goto fail1;
  1050. }
  1051. /* Rx specific init */
  1052. if (dp_rx_pdev_attach(pdev)) {
  1053. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1054. FL("dp_rx_pdev_attach failed "));
  1055. goto fail0;
  1056. }
  1057. DP_STATS_INIT(pdev);
  1058. #ifndef CONFIG_WIN
  1059. /* MCL */
  1060. dp_local_peer_id_pool_init(pdev);
  1061. #endif
  1062. dp_lro_hash_setup(soc);
  1063. dp_dscp_tid_map_setup(pdev);
  1064. return (struct cdp_pdev *)pdev;
  1065. fail1:
  1066. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  1067. fail0:
  1068. return NULL;
  1069. }
  1070. /*
  1071. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  1072. * @soc: data path SoC handle
  1073. * @pdev: Physical device handle
  1074. *
  1075. * Return: void
  1076. */
  1077. #ifdef QCA_HOST2FW_RXBUF_RING
  1078. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  1079. struct dp_pdev *pdev)
  1080. {
  1081. int max_mac_rings =
  1082. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  1083. int i;
  1084. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  1085. max_mac_rings : MAX_RX_MAC_RINGS;
  1086. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  1087. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  1088. RXDMA_BUF, 1);
  1089. }
  1090. #else
  1091. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  1092. struct dp_pdev *pdev)
  1093. {
  1094. }
  1095. #endif
  1096. /*
  1097. * dp_pdev_detach_wifi3() - detach txrx pdev
  1098. * @txrx_pdev: Datapath PDEV handle
  1099. * @force: Force detach
  1100. *
  1101. */
  1102. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  1103. {
  1104. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  1105. struct dp_soc *soc = pdev->soc;
  1106. dp_tx_pdev_detach(pdev);
  1107. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1108. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  1109. TCL_DATA, pdev->pdev_id);
  1110. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  1111. WBM2SW_RELEASE, pdev->pdev_id);
  1112. }
  1113. dp_rx_pdev_detach(pdev);
  1114. /* Setup per PDEV REO rings if configured */
  1115. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1116. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  1117. REO_DST, pdev->pdev_id);
  1118. }
  1119. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  1120. dp_rxdma_ring_cleanup(soc, pdev);
  1121. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0);
  1122. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0);
  1123. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring,
  1124. RXDMA_MONITOR_STATUS, 0);
  1125. soc->pdev_list[pdev->pdev_id] = NULL;
  1126. qdf_mem_free(pdev);
  1127. }
  1128. /*
  1129. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  1130. * @soc: DP SOC handle
  1131. */
  1132. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  1133. {
  1134. struct reo_desc_list_node *desc;
  1135. struct dp_rx_tid *rx_tid;
  1136. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  1137. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  1138. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  1139. rx_tid = &desc->rx_tid;
  1140. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1141. rx_tid->hw_qdesc_alloc_size,
  1142. rx_tid->hw_qdesc_vaddr_unaligned,
  1143. rx_tid->hw_qdesc_paddr_unaligned, 0);
  1144. qdf_mem_free(desc);
  1145. }
  1146. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  1147. qdf_list_destroy(&soc->reo_desc_freelist);
  1148. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  1149. }
  1150. /*
  1151. * dp_soc_detach_wifi3() - Detach txrx SOC
  1152. * @txrx_soc: DP SOC handle
  1153. *
  1154. */
  1155. static void dp_soc_detach_wifi3(void *txrx_soc)
  1156. {
  1157. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1158. int i;
  1159. qdf_atomic_set(&soc->cmn_init_done, 0);
  1160. dp_soc_interrupt_detach(soc);
  1161. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1162. if (soc->pdev_list[i])
  1163. dp_pdev_detach_wifi3(
  1164. (struct cdp_pdev *)soc->pdev_list[i], 1);
  1165. }
  1166. dp_peer_find_detach(soc);
  1167. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  1168. * SW descriptors
  1169. */
  1170. /* Free the ring memories */
  1171. /* Common rings */
  1172. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  1173. /* Tx data rings */
  1174. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1175. dp_tx_soc_detach(soc);
  1176. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  1177. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  1178. TCL_DATA, i);
  1179. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  1180. WBM2SW_RELEASE, i);
  1181. }
  1182. }
  1183. /* TCL command and status rings */
  1184. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  1185. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  1186. /* Rx data rings */
  1187. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1188. soc->num_reo_dest_rings =
  1189. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1190. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  1191. /* TODO: Get number of rings and ring sizes
  1192. * from wlan_cfg
  1193. */
  1194. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  1195. REO_DST, i);
  1196. }
  1197. }
  1198. /* REO reinjection ring */
  1199. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  1200. /* Rx release ring */
  1201. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  1202. /* Rx exception ring */
  1203. /* TODO: Better to store ring_type and ring_num in
  1204. * dp_srng during setup
  1205. */
  1206. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  1207. /* REO command and status rings */
  1208. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  1209. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  1210. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  1211. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  1212. htt_soc_detach(soc->htt_handle);
  1213. dp_reo_desc_freelist_destroy(soc);
  1214. }
  1215. /*
  1216. * dp_rxdma_ring_config() - configure the RX DMA rings
  1217. *
  1218. * This function is used to configure the MAC rings.
  1219. * On MCL host provides buffers in Host2FW ring
  1220. * FW refills (copies) buffers to the ring and updates
  1221. * ring_idx in register
  1222. *
  1223. * @soc: data path SoC handle
  1224. * @pdev: Physical device handle
  1225. *
  1226. * Return: void
  1227. */
  1228. #ifdef QCA_HOST2FW_RXBUF_RING
  1229. static void dp_rxdma_ring_config(struct dp_soc *soc)
  1230. {
  1231. int i;
  1232. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1233. struct dp_pdev *pdev = soc->pdev_list[i];
  1234. if (pdev) {
  1235. int mac_id = 0;
  1236. int j;
  1237. int max_mac_rings =
  1238. wlan_cfg_get_num_mac_rings
  1239. (pdev->wlan_cfg_ctx);
  1240. htt_srng_setup(soc->htt_handle, 0,
  1241. pdev->rx_refill_buf_ring.hal_srng,
  1242. RXDMA_BUF);
  1243. if (!soc->cdp_soc.ol_ops->
  1244. is_hw_dbs_2x2_capable()) {
  1245. max_mac_rings = 1;
  1246. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1247. QDF_TRACE_LEVEL_ERROR,
  1248. FL("DBS enabled, max_mac_rings %d\n"),
  1249. max_mac_rings);
  1250. } else {
  1251. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1252. QDF_TRACE_LEVEL_ERROR,
  1253. FL("DBS disabled max_mac_rings %d\n"),
  1254. max_mac_rings);
  1255. }
  1256. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1257. FL("pdev_id %d max_mac_rings %d\n"),
  1258. pdev->pdev_id, max_mac_rings);
  1259. for (j = 0; j < max_mac_rings; j++) {
  1260. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1261. QDF_TRACE_LEVEL_ERROR,
  1262. FL("mac_id %d\n"), mac_id);
  1263. htt_srng_setup(soc->htt_handle, mac_id,
  1264. pdev->rx_mac_buf_ring[j]
  1265. .hal_srng,
  1266. RXDMA_BUF);
  1267. mac_id++;
  1268. }
  1269. }
  1270. }
  1271. }
  1272. #else
  1273. static void dp_rxdma_ring_config(struct dp_soc *soc)
  1274. {
  1275. int i;
  1276. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1277. struct dp_pdev *pdev = soc->pdev_list[i];
  1278. if (pdev) {
  1279. htt_srng_setup(soc->htt_handle, i,
  1280. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  1281. }
  1282. }
  1283. }
  1284. #endif
  1285. /*
  1286. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  1287. * @txrx_soc: Datapath SOC handle
  1288. */
  1289. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  1290. {
  1291. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  1292. htt_soc_attach_target(soc->htt_handle);
  1293. dp_rxdma_ring_config(soc);
  1294. DP_STATS_INIT(soc);
  1295. return 0;
  1296. }
  1297. /*
  1298. * dp_vdev_attach_wifi3() - attach txrx vdev
  1299. * @txrx_pdev: Datapath PDEV handle
  1300. * @vdev_mac_addr: MAC address of the virtual interface
  1301. * @vdev_id: VDEV Id
  1302. * @wlan_op_mode: VDEV operating mode
  1303. *
  1304. * Return: DP VDEV handle on success, NULL on failure
  1305. */
  1306. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  1307. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  1308. {
  1309. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  1310. struct dp_soc *soc = pdev->soc;
  1311. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  1312. if (!vdev) {
  1313. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1314. FL("DP VDEV memory allocation failed"));
  1315. goto fail0;
  1316. }
  1317. vdev->pdev = pdev;
  1318. vdev->vdev_id = vdev_id;
  1319. vdev->opmode = op_mode;
  1320. vdev->osdev = soc->osdev;
  1321. vdev->osif_rx = NULL;
  1322. vdev->osif_rsim_rx_decap = NULL;
  1323. vdev->osif_rx_mon = NULL;
  1324. vdev->osif_tx_free_ext = NULL;
  1325. vdev->osif_vdev = NULL;
  1326. vdev->delete.pending = 0;
  1327. vdev->safemode = 0;
  1328. vdev->drop_unenc = 1;
  1329. #ifdef notyet
  1330. vdev->filters_num = 0;
  1331. #endif
  1332. qdf_mem_copy(
  1333. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1334. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1335. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1336. vdev->dscp_tid_map_id = 0;
  1337. /* TODO: Initialize default HTT meta data that will be used in
  1338. * TCL descriptors for packets transmitted from this VDEV
  1339. */
  1340. TAILQ_INIT(&vdev->peer_list);
  1341. /* add this vdev into the pdev's list */
  1342. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  1343. pdev->vdev_count++;
  1344. dp_tx_vdev_attach(vdev);
  1345. #ifdef DP_INTR_POLL_BASED
  1346. if (pdev->vdev_count == 1)
  1347. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  1348. #endif
  1349. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1350. "Created vdev %p (%pM)", vdev, vdev->mac_addr.raw);
  1351. DP_STATS_INIT(vdev);
  1352. return (struct cdp_vdev *)vdev;
  1353. fail0:
  1354. return NULL;
  1355. }
  1356. /**
  1357. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  1358. * @vdev: Datapath VDEV handle
  1359. * @osif_vdev: OSIF vdev handle
  1360. * @txrx_ops: Tx and Rx operations
  1361. *
  1362. * Return: DP VDEV handle on success, NULL on failure
  1363. */
  1364. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  1365. void *osif_vdev,
  1366. struct ol_txrx_ops *txrx_ops)
  1367. {
  1368. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1369. vdev->osif_vdev = osif_vdev;
  1370. vdev->osif_rx = txrx_ops->rx.rx;
  1371. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  1372. vdev->osif_rx_mon = txrx_ops->rx.mon;
  1373. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  1374. #ifdef notyet
  1375. #if ATH_SUPPORT_WAPI
  1376. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  1377. #endif
  1378. #if UMAC_SUPPORT_PROXY_ARP
  1379. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  1380. #endif
  1381. #endif
  1382. /* TODO: Enable the following once Tx code is integrated */
  1383. txrx_ops->tx.tx = dp_tx_send;
  1384. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1385. "DP Vdev Register success");
  1386. }
  1387. /*
  1388. * dp_vdev_detach_wifi3() - Detach txrx vdev
  1389. * @txrx_vdev: Datapath VDEV handle
  1390. * @callback: Callback OL_IF on completion of detach
  1391. * @cb_context: Callback context
  1392. *
  1393. */
  1394. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  1395. ol_txrx_vdev_delete_cb callback, void *cb_context)
  1396. {
  1397. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1398. struct dp_pdev *pdev = vdev->pdev;
  1399. struct dp_soc *soc = pdev->soc;
  1400. /* preconditions */
  1401. qdf_assert(vdev);
  1402. /* remove the vdev from its parent pdev's list */
  1403. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  1404. /*
  1405. * Use peer_ref_mutex while accessing peer_list, in case
  1406. * a peer is in the process of being removed from the list.
  1407. */
  1408. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1409. /* check that the vdev has no peers allocated */
  1410. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  1411. /* debug print - will be removed later */
  1412. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1413. FL("not deleting vdev object %p (%pM)"
  1414. "until deletion finishes for all its peers"),
  1415. vdev, vdev->mac_addr.raw);
  1416. /* indicate that the vdev needs to be deleted */
  1417. vdev->delete.pending = 1;
  1418. vdev->delete.callback = callback;
  1419. vdev->delete.context = cb_context;
  1420. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1421. return;
  1422. }
  1423. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1424. dp_tx_vdev_detach(vdev);
  1425. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1426. FL("deleting vdev object %p (%pM)"), vdev, vdev->mac_addr.raw);
  1427. qdf_mem_free(vdev);
  1428. if (callback)
  1429. callback(cb_context);
  1430. }
  1431. /*
  1432. * dp_peer_create_wifi3() - attach txrx peer
  1433. * @txrx_vdev: Datapath VDEV handle
  1434. * @peer_mac_addr: Peer MAC address
  1435. *
  1436. * Return: DP peeer handle on success, NULL on failure
  1437. */
  1438. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  1439. uint8_t *peer_mac_addr)
  1440. {
  1441. struct dp_peer *peer;
  1442. int i;
  1443. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1444. struct dp_pdev *pdev;
  1445. struct dp_soc *soc;
  1446. /* preconditions */
  1447. qdf_assert(vdev);
  1448. qdf_assert(peer_mac_addr);
  1449. pdev = vdev->pdev;
  1450. soc = pdev->soc;
  1451. #ifdef notyet
  1452. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  1453. soc->mempool_ol_ath_peer);
  1454. #else
  1455. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  1456. #endif
  1457. if (!peer)
  1458. return NULL; /* failure */
  1459. qdf_mem_zero(peer, sizeof(struct dp_peer));
  1460. qdf_spinlock_create(&peer->peer_info_lock);
  1461. /* store provided params */
  1462. peer->vdev = vdev;
  1463. qdf_mem_copy(
  1464. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1465. /* TODO: See of rx_opt_proc is really required */
  1466. peer->rx_opt_proc = soc->rx_opt_proc;
  1467. /* initialize the peer_id */
  1468. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  1469. peer->peer_ids[i] = HTT_INVALID_PEER;
  1470. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1471. qdf_atomic_init(&peer->ref_cnt);
  1472. /* keep one reference for attach */
  1473. qdf_atomic_inc(&peer->ref_cnt);
  1474. /* add this peer into the vdev's list */
  1475. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  1476. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1477. /* TODO: See if hash based search is required */
  1478. dp_peer_find_hash_add(soc, peer);
  1479. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1480. "vdev %p created peer %p (%pM) ref_cnt: %d",
  1481. vdev, peer, peer->mac_addr.raw,
  1482. qdf_atomic_read(&peer->ref_cnt));
  1483. /*
  1484. * For every peer MAp message search and set if bss_peer
  1485. */
  1486. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  1487. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1488. "vdev bss_peer!!!!");
  1489. peer->bss_peer = 1;
  1490. vdev->vap_bss_peer = peer;
  1491. }
  1492. #ifndef CONFIG_WIN
  1493. dp_local_peer_id_alloc(pdev, peer);
  1494. #endif
  1495. DP_STATS_INIT(peer);
  1496. return (void *)peer;
  1497. }
  1498. /*
  1499. * dp_peer_setup_wifi3() - initialize the peer
  1500. * @vdev_hdl: virtual device object
  1501. * @peer: Peer object
  1502. *
  1503. * Return: void
  1504. */
  1505. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  1506. {
  1507. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  1508. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  1509. struct dp_pdev *pdev;
  1510. struct dp_soc *soc;
  1511. bool hash_based = 0;
  1512. /* preconditions */
  1513. qdf_assert(vdev);
  1514. qdf_assert(peer);
  1515. pdev = vdev->pdev;
  1516. soc = pdev->soc;
  1517. dp_peer_rx_init(pdev, peer);
  1518. peer->last_assoc_rcvd = 0;
  1519. peer->last_disassoc_rcvd = 0;
  1520. peer->last_deauth_rcvd = 0;
  1521. hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  1522. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1523. FL("hash based steering %d\n"), hash_based);
  1524. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  1525. /* TODO: Check the destination ring number to be passed to FW */
  1526. soc->cdp_soc.ol_ops->peer_set_default_routing(
  1527. pdev->osif_pdev, peer->mac_addr.raw,
  1528. peer->vdev->vdev_id, hash_based, 1);
  1529. }
  1530. return;
  1531. }
  1532. /*
  1533. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  1534. * @vdev_handle: virtual device object
  1535. * @htt_pkt_type: type of pkt
  1536. *
  1537. * Return: void
  1538. */
  1539. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  1540. enum htt_cmn_pkt_type val)
  1541. {
  1542. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1543. vdev->tx_encap_type = val;
  1544. }
  1545. /*
  1546. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  1547. * @vdev_handle: virtual device object
  1548. * @htt_pkt_type: type of pkt
  1549. *
  1550. * Return: void
  1551. */
  1552. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  1553. enum htt_cmn_pkt_type val)
  1554. {
  1555. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1556. vdev->rx_decap_type = val;
  1557. }
  1558. /*
  1559. * dp_peer_authorize() - authorize txrx peer
  1560. * @peer_handle: Datapath peer handle
  1561. * @authorize
  1562. *
  1563. */
  1564. static void dp_peer_authorize(void *peer_handle, uint32_t authorize)
  1565. {
  1566. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1567. struct dp_soc *soc;
  1568. if (peer != NULL) {
  1569. soc = peer->vdev->pdev->soc;
  1570. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1571. peer->authorize = authorize ? 1 : 0;
  1572. #ifdef notyet /* ATH_BAND_STEERING */
  1573. peer->peer_bs_inact_flag = 0;
  1574. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1575. #endif
  1576. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1577. }
  1578. }
  1579. /*
  1580. * dp_peer_unref_delete() - unref and delete peer
  1581. * @peer_handle: Datapath peer handle
  1582. *
  1583. */
  1584. void dp_peer_unref_delete(void *peer_handle)
  1585. {
  1586. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1587. struct dp_vdev *vdev = peer->vdev;
  1588. struct dp_pdev *pdev = vdev->pdev;
  1589. struct dp_soc *soc = pdev->soc;
  1590. struct dp_peer *tmppeer;
  1591. int found = 0;
  1592. uint16_t peer_id;
  1593. /*
  1594. * Hold the lock all the way from checking if the peer ref count
  1595. * is zero until the peer references are removed from the hash
  1596. * table and vdev list (if the peer ref count is zero).
  1597. * This protects against a new HL tx operation starting to use the
  1598. * peer object just after this function concludes it's done being used.
  1599. * Furthermore, the lock needs to be held while checking whether the
  1600. * vdev's list of peers is empty, to make sure that list is not modified
  1601. * concurrently with the empty check.
  1602. */
  1603. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1604. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1605. "%s: peer %p ref_cnt(before decrement): %d\n", __func__,
  1606. peer, qdf_atomic_read(&peer->ref_cnt));
  1607. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  1608. peer_id = peer->peer_ids[0];
  1609. /*
  1610. * Make sure that the reference to the peer in
  1611. * peer object map is removed
  1612. */
  1613. if (peer_id != HTT_INVALID_PEER)
  1614. soc->peer_id_to_obj_map[peer_id] = NULL;
  1615. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1616. "Deleting peer %p (%pM)", peer, peer->mac_addr.raw);
  1617. /* remove the reference to the peer from the hash table */
  1618. dp_peer_find_hash_remove(soc, peer);
  1619. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  1620. if (tmppeer == peer) {
  1621. found = 1;
  1622. break;
  1623. }
  1624. }
  1625. if (found) {
  1626. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  1627. peer_list_elem);
  1628. } else {
  1629. /*Ignoring the remove operation as peer not found*/
  1630. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1631. "peer %p not found in vdev (%p)->peer_list:%p",
  1632. peer, vdev, &peer->vdev->peer_list);
  1633. }
  1634. /* cleanup the peer data */
  1635. dp_peer_cleanup(vdev, peer);
  1636. /* check whether the parent vdev has no peers left */
  1637. if (TAILQ_EMPTY(&vdev->peer_list)) {
  1638. /*
  1639. * Now that there are no references to the peer, we can
  1640. * release the peer reference lock.
  1641. */
  1642. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1643. /*
  1644. * Check if the parent vdev was waiting for its peers
  1645. * to be deleted, in order for it to be deleted too.
  1646. */
  1647. if (vdev->delete.pending) {
  1648. ol_txrx_vdev_delete_cb vdev_delete_cb =
  1649. vdev->delete.callback;
  1650. void *vdev_delete_context =
  1651. vdev->delete.context;
  1652. QDF_TRACE(QDF_MODULE_ID_DP,
  1653. QDF_TRACE_LEVEL_INFO_HIGH,
  1654. FL("deleting vdev object %p (%pM)"
  1655. " - its last peer is done"),
  1656. vdev, vdev->mac_addr.raw);
  1657. /* all peers are gone, go ahead and delete it */
  1658. qdf_mem_free(vdev);
  1659. if (vdev_delete_cb)
  1660. vdev_delete_cb(vdev_delete_context);
  1661. }
  1662. } else {
  1663. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1664. }
  1665. #ifdef notyet
  1666. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  1667. #else
  1668. qdf_mem_free(peer);
  1669. #endif
  1670. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  1671. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->osif_pdev,
  1672. vdev->vdev_id, peer->mac_addr.raw);
  1673. }
  1674. } else {
  1675. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1676. }
  1677. }
  1678. /*
  1679. * dp_peer_detach_wifi3() – Detach txrx peer
  1680. * @peer_handle: Datapath peer handle
  1681. *
  1682. */
  1683. static void dp_peer_delete_wifi3(void *peer_handle)
  1684. {
  1685. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1686. /* redirect the peer's rx delivery function to point to a
  1687. * discard func
  1688. */
  1689. peer->rx_opt_proc = dp_rx_discard;
  1690. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1691. FL("peer %p (%pM)"), peer, peer->mac_addr.raw);
  1692. #ifndef CONFIG_WIN
  1693. dp_local_peer_id_free(peer->vdev->pdev, peer);
  1694. #endif
  1695. qdf_spinlock_destroy(&peer->peer_info_lock);
  1696. /*
  1697. * Remove the reference added during peer_attach.
  1698. * The peer will still be left allocated until the
  1699. * PEER_UNMAP message arrives to remove the other
  1700. * reference, added by the PEER_MAP message.
  1701. */
  1702. dp_peer_unref_delete(peer_handle);
  1703. }
  1704. /*
  1705. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  1706. * @peer_handle: Datapath peer handle
  1707. *
  1708. */
  1709. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  1710. {
  1711. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  1712. return vdev->mac_addr.raw;
  1713. }
  1714. /*
  1715. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  1716. * @peer_handle: Datapath peer handle
  1717. *
  1718. */
  1719. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  1720. uint8_t vdev_id)
  1721. {
  1722. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  1723. struct dp_vdev *vdev = NULL;
  1724. if (qdf_unlikely(!pdev))
  1725. return NULL;
  1726. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1727. if (vdev->vdev_id == vdev_id)
  1728. break;
  1729. }
  1730. return (struct cdp_vdev *)vdev;
  1731. }
  1732. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  1733. {
  1734. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1735. return vdev->opmode;
  1736. }
  1737. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  1738. {
  1739. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  1740. struct dp_pdev *pdev = vdev->pdev;
  1741. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  1742. }
  1743. #ifdef MESH_MODE_SUPPORT
  1744. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  1745. {
  1746. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  1747. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1748. FL("val %d"), val);
  1749. vdev->mesh_vdev = val;
  1750. }
  1751. /*
  1752. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  1753. * @vdev_hdl: virtual device object
  1754. * @val: value to be set
  1755. *
  1756. * Return: void
  1757. */
  1758. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  1759. {
  1760. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  1761. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1762. FL("val %d"), val);
  1763. vdev->mesh_rx_filter = val;
  1764. }
  1765. #endif
  1766. /**
  1767. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  1768. * @vdev: DP VDEV handle
  1769. *
  1770. * return: void
  1771. */
  1772. void dp_aggregate_vdev_stats(struct dp_vdev *vdev)
  1773. {
  1774. struct dp_peer *peer = NULL;
  1775. int i;
  1776. qdf_mem_set(&(vdev->stats.tx), sizeof(vdev->stats.tx), 0x0);
  1777. qdf_mem_set(&(vdev->stats.rx), sizeof(vdev->stats.rx), 0x0);
  1778. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  1779. if (!peer)
  1780. return;
  1781. for (i = 0; i <= MAX_MCS; i++) {
  1782. DP_STATS_AGGR(vdev, peer, tx.pkt_type[0].mcs_count[i]);
  1783. DP_STATS_AGGR(vdev, peer, tx.pkt_type[1].mcs_count[i]);
  1784. DP_STATS_AGGR(vdev, peer, tx.pkt_type[2].mcs_count[i]);
  1785. DP_STATS_AGGR(vdev, peer, tx.pkt_type[3].mcs_count[i]);
  1786. DP_STATS_AGGR(vdev, peer, tx.pkt_type[4].mcs_count[i]);
  1787. DP_STATS_AGGR(vdev, peer, rx.mcs_count[i]);
  1788. }
  1789. for (i = 0; i < SUPPORTED_BW; i++) {
  1790. DP_STATS_AGGR(vdev, peer, tx.bw[i]);
  1791. DP_STATS_AGGR(vdev, peer, rx.bw[i]);
  1792. }
  1793. for (i = 0; i < SS_COUNT; i++)
  1794. DP_STATS_AGGR(vdev, peer, rx.nss[i]);
  1795. for (i = 0; i < WME_AC_MAX; i++) {
  1796. DP_STATS_AGGR(vdev, peer, tx.wme_ac_type[i]);
  1797. DP_STATS_AGGR(vdev, peer, rx.wme_ac_type[i]);
  1798. DP_STATS_AGGR(vdev, peer, tx.excess_retries_ac[i]);
  1799. }
  1800. for (i = 0; i < MAX_MCS + 1; i++) {
  1801. DP_STATS_AGGR(vdev, peer, tx.sgi_count[i]);
  1802. DP_STATS_AGGR(vdev, peer, rx.sgi_count[i]);
  1803. }
  1804. DP_STATS_AGGR_PKT(vdev, peer, tx.comp_pkt);
  1805. DP_STATS_AGGR_PKT(vdev, peer, tx.ucast);
  1806. DP_STATS_AGGR_PKT(vdev, peer, tx.mcast);
  1807. DP_STATS_AGGR_PKT(vdev, peer, tx.tx_success);
  1808. DP_STATS_AGGR(vdev, peer, tx.tx_failed);
  1809. DP_STATS_AGGR(vdev, peer, tx.ofdma);
  1810. DP_STATS_AGGR(vdev, peer, tx.stbc);
  1811. DP_STATS_AGGR(vdev, peer, tx.ldpc);
  1812. DP_STATS_AGGR(vdev, peer, tx.retries);
  1813. DP_STATS_AGGR(vdev, peer, tx.non_amsdu_cnt);
  1814. DP_STATS_AGGR(vdev, peer, tx.amsdu_cnt);
  1815. DP_STATS_AGGR(vdev, peer, tx.dropped.dma_map_error);
  1816. DP_STATS_AGGR(vdev, peer, tx.dropped.ring_full);
  1817. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard);
  1818. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_retired);
  1819. DP_STATS_AGGR(vdev, peer, tx.dropped.mpdu_age_out);
  1820. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_reason1);
  1821. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_reason2);
  1822. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_reason3);
  1823. DP_STATS_AGGR(vdev, peer, rx.err.mic_err);
  1824. DP_STATS_AGGR(vdev, peer, rx.err.decrypt_err);
  1825. DP_STATS_AGGR(vdev, peer, rx.non_ampdu_cnt);
  1826. DP_STATS_AGGR(vdev, peer, rx.non_amsdu_cnt);
  1827. DP_STATS_AGGR(vdev, peer, rx.amsdu_cnt);
  1828. DP_STATS_AGGR_PKT(vdev, peer, rx.to_stack);
  1829. DP_STATS_AGGR_PKT(vdev, peer, rx.rcvd_reo);
  1830. DP_STATS_AGGR_PKT(vdev, peer, rx.unicast);
  1831. DP_STATS_AGGR_PKT(vdev, peer, rx.multicast);
  1832. DP_STATS_AGGR_PKT(vdev, peer, rx.wds);
  1833. DP_STATS_AGGR_PKT(vdev, peer, rx.raw);
  1834. DP_STATS_AGGR_PKT(vdev, peer, rx.intra_bss);
  1835. vdev->stats.tx.last_ack_rssi =
  1836. peer->stats.tx.last_ack_rssi;
  1837. }
  1838. }
  1839. /**
  1840. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  1841. * @pdev: DP PDEV handle
  1842. *
  1843. * return: void
  1844. */
  1845. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  1846. {
  1847. struct dp_vdev *vdev = NULL;
  1848. uint8_t i;
  1849. qdf_mem_set(&(pdev->stats.tx), sizeof(pdev->stats.tx), 0x0);
  1850. qdf_mem_set(&(pdev->stats.rx), sizeof(pdev->stats.rx), 0x0);
  1851. qdf_mem_set(&(pdev->stats.tx_i), sizeof(pdev->stats.tx_i), 0x0);
  1852. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1853. if (!vdev)
  1854. return;
  1855. dp_aggregate_vdev_stats(vdev);
  1856. for (i = 0; i <= MAX_MCS; i++) {
  1857. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[0].mcs_count[i]);
  1858. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[1].mcs_count[i]);
  1859. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[2].mcs_count[i]);
  1860. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[3].mcs_count[i]);
  1861. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[4].mcs_count[i]);
  1862. DP_STATS_AGGR(pdev, vdev, rx.mcs_count[i]);
  1863. }
  1864. for (i = 0; i < SUPPORTED_BW; i++) {
  1865. DP_STATS_AGGR(pdev, vdev, tx.bw[i]);
  1866. DP_STATS_AGGR(pdev, vdev, rx.bw[i]);
  1867. }
  1868. for (i = 0; i < SS_COUNT; i++)
  1869. DP_STATS_AGGR(pdev, vdev, rx.nss[i]);
  1870. for (i = 0; i < WME_AC_MAX; i++) {
  1871. DP_STATS_AGGR(pdev, vdev, tx.wme_ac_type[i]);
  1872. DP_STATS_AGGR(pdev, vdev, rx.wme_ac_type[i]);
  1873. DP_STATS_AGGR(pdev, vdev,
  1874. tx.excess_retries_ac[i]);
  1875. }
  1876. for (i = 0; i < MAX_MCS + 1; i++) {
  1877. DP_STATS_AGGR(pdev, vdev, tx.sgi_count[i]);
  1878. DP_STATS_AGGR(pdev, vdev, rx.sgi_count[i]);
  1879. }
  1880. DP_STATS_AGGR_PKT(pdev, vdev, tx.comp_pkt);
  1881. DP_STATS_AGGR_PKT(pdev, vdev, tx.ucast);
  1882. DP_STATS_AGGR_PKT(pdev, vdev, tx.mcast);
  1883. DP_STATS_AGGR_PKT(pdev, vdev, tx.tx_success);
  1884. DP_STATS_AGGR(pdev, vdev, tx.tx_failed);
  1885. DP_STATS_AGGR(pdev, vdev, tx.ofdma);
  1886. DP_STATS_AGGR(pdev, vdev, tx.stbc);
  1887. DP_STATS_AGGR(pdev, vdev, tx.ldpc);
  1888. DP_STATS_AGGR(pdev, vdev, tx.retries);
  1889. DP_STATS_AGGR(pdev, vdev, tx.non_amsdu_cnt);
  1890. DP_STATS_AGGR(pdev, vdev, tx.amsdu_cnt);
  1891. DP_STATS_AGGR(pdev, vdev, tx.dropped.dma_map_error);
  1892. DP_STATS_AGGR(pdev, vdev, tx.dropped.ring_full);
  1893. DP_STATS_AGGR(pdev, vdev, tx.dropped.fw_discard);
  1894. DP_STATS_AGGR(pdev, vdev,
  1895. tx.dropped.fw_discard_retired);
  1896. DP_STATS_AGGR(pdev, vdev, tx.dropped.mpdu_age_out);
  1897. DP_STATS_AGGR(pdev, vdev,
  1898. tx.dropped.fw_discard_reason1);
  1899. DP_STATS_AGGR(pdev, vdev,
  1900. tx.dropped.fw_discard_reason2);
  1901. DP_STATS_AGGR(pdev, vdev,
  1902. tx.dropped.fw_discard_reason3);
  1903. DP_STATS_AGGR(pdev, vdev, rx.err.mic_err);
  1904. DP_STATS_AGGR(pdev, vdev, rx.err.decrypt_err);
  1905. DP_STATS_AGGR(pdev, vdev, rx.non_ampdu_cnt);
  1906. DP_STATS_AGGR(pdev, vdev, rx.ampdu_cnt);
  1907. DP_STATS_AGGR(pdev, vdev, rx.non_amsdu_cnt);
  1908. DP_STATS_AGGR(pdev, vdev, rx.amsdu_cnt);
  1909. DP_STATS_AGGR_PKT(pdev, vdev, rx.to_stack);
  1910. DP_STATS_AGGR_PKT(pdev, vdev, rx.rcvd_reo);
  1911. DP_STATS_AGGR_PKT(pdev, vdev, rx.unicast);
  1912. DP_STATS_AGGR_PKT(pdev, vdev, rx.multicast);
  1913. DP_STATS_AGGR_PKT(pdev, vdev, rx.wds);
  1914. DP_STATS_AGGR_PKT(pdev, vdev, rx.intra_bss);
  1915. DP_STATS_AGGR_PKT(pdev, vdev, rx.raw);
  1916. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.rcvd);
  1917. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.freed);
  1918. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.processed);
  1919. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.reinject_pkts);
  1920. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.inspect_pkts);
  1921. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.raw_pkt);
  1922. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.tso.tso_pkt);
  1923. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_host);
  1924. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_target);
  1925. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_host);
  1926. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_target);
  1927. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.sg.sg_pkt);
  1928. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.mcast_en.mcast_pkt);
  1929. DP_STATS_AGGR(pdev, vdev,
  1930. tx_i.mcast_en.dropped_map_error);
  1931. DP_STATS_AGGR(pdev, vdev,
  1932. tx_i.mcast_en.dropped_self_mac);
  1933. DP_STATS_AGGR(pdev, vdev,
  1934. tx_i.mcast_en.dropped_send_fail);
  1935. DP_STATS_AGGR(pdev, vdev, tx_i.mcast_en.ucast);
  1936. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.dropped.dropped_pkt);
  1937. pdev->stats.tx.last_ack_rssi =
  1938. vdev->stats.tx.last_ack_rssi;
  1939. pdev->stats.tx_i.tso.num_seg =
  1940. vdev->stats.tx_i.tso.num_seg;
  1941. }
  1942. }
  1943. /**
  1944. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  1945. * @pdev: DP_PDEV Handle
  1946. *
  1947. * Return:void
  1948. */
  1949. static inline void
  1950. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  1951. {
  1952. DP_TRACE(NONE, "WLAN Tx Stats:\n");
  1953. DP_TRACE(NONE, "Received From Stack:\n");
  1954. DP_TRACE(NONE, "Total Packets Received = %d",
  1955. pdev->stats.tx_i.rcvd.num);
  1956. DP_TRACE(NONE, "Bytes Sent = %d",
  1957. pdev->stats.tx_i.rcvd.bytes);
  1958. DP_TRACE(NONE, "Processed:\n");
  1959. DP_TRACE(NONE, "Msdu Processed = %d",
  1960. pdev->stats.tx_i.processed.num);
  1961. DP_TRACE(NONE, "Bytes Processed = %d",
  1962. pdev->stats.tx_i.processed.bytes);
  1963. DP_TRACE(NONE, "Completions:\n");
  1964. DP_TRACE(NONE, "Msdu Sent = %d",
  1965. pdev->stats.tx.comp_pkt.num);
  1966. DP_TRACE(NONE, "Bytes Sent = %d",
  1967. pdev->stats.tx.comp_pkt.bytes);
  1968. DP_TRACE(NONE, "Freed:\n");
  1969. DP_TRACE(NONE, "Msdus Freed = %d",
  1970. pdev->stats.tx_i.freed.num);
  1971. DP_TRACE(NONE, "Bytes Freed = %d",
  1972. pdev->stats.tx_i.freed.bytes);
  1973. DP_TRACE(NONE, "Dropped:\n");
  1974. DP_TRACE(NONE, "Total Packets Dropped = %d",
  1975. pdev->stats.tx_i.dropped.dropped_pkt.num);
  1976. DP_TRACE(NONE, "Bytes Dropped = %d",
  1977. pdev->stats.tx_i.dropped.dropped_pkt.bytes);
  1978. DP_TRACE(NONE, "Dma_map_error = %d",
  1979. pdev->stats.tx.dropped.dma_map_error);
  1980. DP_TRACE(NONE, "Ring Full = %d", pdev->stats.tx.dropped.ring_full);
  1981. DP_TRACE(NONE, "Fw Discard = %d",
  1982. pdev->stats.tx.dropped.fw_discard);
  1983. DP_TRACE(NONE, "Fw Discard Retired = %d",
  1984. pdev->stats.tx.dropped.fw_discard_retired);
  1985. DP_TRACE(NONE, "Firmware Discard Untransmitted = %d",
  1986. pdev->stats.tx.dropped.fw_discard_untransmitted);
  1987. DP_TRACE(NONE, "Mpdu Age Out = %d",
  1988. pdev->stats.tx.dropped.mpdu_age_out);
  1989. DP_TRACE(NONE, "Firmware Discard Reason1 = %d",
  1990. pdev->stats.tx.dropped.fw_discard_reason1);
  1991. DP_TRACE(NONE, "Firmware Discard Reason2 = %d",
  1992. pdev->stats.tx.dropped.fw_discard_reason2);
  1993. DP_TRACE(NONE, "Firmware Discard Reason3 = %d",
  1994. pdev->stats.tx.dropped.fw_discard_reason3);
  1995. DP_TRACE(NONE, "Scatter Gather:\n");
  1996. DP_TRACE(NONE, "Total Packets = %d",
  1997. pdev->stats.tx_i.sg.sg_pkt.num);
  1998. DP_TRACE(NONE, "Total Bytes = %d",
  1999. pdev->stats.tx_i.sg.sg_pkt.bytes);
  2000. DP_TRACE(NONE, "Dropped By Host = %d",
  2001. pdev->stats.tx_i.sg.dropped_host);
  2002. DP_TRACE(NONE, "Dropped By Target = %d",
  2003. pdev->stats.tx_i.sg.dropped_target);
  2004. DP_TRACE(NONE, "Tso:\n");
  2005. DP_TRACE(NONE, "Number of Segments = %d",
  2006. pdev->stats.tx_i.tso.num_seg);
  2007. DP_TRACE(NONE, "Number Packets = %d",
  2008. pdev->stats.tx_i.tso.tso_pkt.num);
  2009. DP_TRACE(NONE, "Total Bytes = %d",
  2010. pdev->stats.tx_i.tso.tso_pkt.bytes);
  2011. DP_TRACE(NONE, "Dropped By Host = %d",
  2012. pdev->stats.tx_i.tso.dropped_host);
  2013. DP_TRACE(NONE, "Mcast Enhancement:\n");
  2014. DP_TRACE(NONE, "Dropped: Map Errors = %d",
  2015. pdev->stats.tx_i.mcast_en.dropped_map_error);
  2016. DP_TRACE(NONE, "Dropped: Self Mac = %d",
  2017. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  2018. DP_TRACE(NONE, "Dropped: Send Fail = %d",
  2019. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  2020. DP_TRACE(NONE, "Total Unicast sent = %d",
  2021. pdev->stats.tx_i.mcast_en.ucast);
  2022. }
  2023. /**
  2024. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  2025. * @pdev: DP_PDEV Handle
  2026. *
  2027. * Return: void
  2028. */
  2029. static inline void
  2030. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  2031. {
  2032. DP_TRACE(NONE, "WLAN Rx Stats:\n");
  2033. DP_TRACE(NONE, "Received From HW (Reo Dest Ring):\n");
  2034. DP_TRACE(NONE, "Total Packets Received = %d",
  2035. pdev->stats.rx.rcvd_reo.num);
  2036. DP_TRACE(NONE, "Bytes Sent = %d",
  2037. pdev->stats.rx.rcvd_reo.bytes);
  2038. DP_TRACE(NONE, "Replenished:\n");
  2039. DP_TRACE(NONE, "Total Packets Replenished = %d",
  2040. pdev->stats.replenished.num);
  2041. DP_TRACE(NONE, "Bytes Sent = %d",
  2042. pdev->stats.replenished.bytes);
  2043. DP_TRACE(NONE, "Buffers Added To Freelist = %d",
  2044. pdev->stats.buf_freelist);
  2045. DP_TRACE(NONE, "Dropped:\n");
  2046. DP_TRACE(NONE, "Total Packets With No Peer = %d",
  2047. pdev->stats.dropped.no_peer.num);
  2048. DP_TRACE(NONE, "Bytes Sent With No Peer = %d",
  2049. pdev->stats.dropped.no_peer.bytes);
  2050. DP_TRACE(NONE, "Total Packets With Msdu Not Done = %d",
  2051. pdev->stats.dropped.msdu_not_done.num);
  2052. DP_TRACE(NONE, "Bytes Sent With Msdu Not Done = %d",
  2053. pdev->stats.dropped.msdu_not_done.bytes);
  2054. DP_TRACE(NONE, "Sent To Stack:\n");
  2055. DP_TRACE(NONE, "Packets Sent To Stack = %d",
  2056. pdev->stats.rx.to_stack.num);
  2057. DP_TRACE(NONE, "Bytes Sent To Stack = %d",
  2058. pdev->stats.rx.to_stack.bytes);
  2059. DP_TRACE(NONE, "Errors:\n");
  2060. DP_TRACE(NONE, "Rxdma Ring Unititalized: %d",
  2061. pdev->stats.err.rxdma_unitialized);
  2062. DP_TRACE(NONE, "Desc Alloc Failed: %d",
  2063. pdev->stats.err.desc_alloc_fail);
  2064. }
  2065. /**
  2066. * dp_print_soc_tx_stats(): Print SOC level stats
  2067. * @soc DP_SOC Handle
  2068. *
  2069. * Return: void
  2070. */
  2071. static inline void
  2072. dp_print_soc_tx_stats(struct dp_soc *soc)
  2073. {
  2074. DP_TRACE(NONE, "SOC Tx Stats:\n");
  2075. DP_TRACE(NONE, "Tx Descriptors In Use = %d",
  2076. soc->stats.tx.desc_in_use);
  2077. }
  2078. /**
  2079. * dp_print_soc_rx_stats: Print SOC level Rx stats
  2080. * @soc: DP_SOC Handle
  2081. *
  2082. * Return:void
  2083. */
  2084. static inline void
  2085. dp_print_soc_rx_stats(struct dp_soc *soc)
  2086. {
  2087. uint32_t i;
  2088. char reo_error[DP_REO_ERR_LENGTH];
  2089. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  2090. uint8_t index = 0;
  2091. DP_TRACE(NONE, "SOC Rx Stats:\n");
  2092. DP_TRACE(NONE, "Errors:\n");
  2093. DP_TRACE(NONE, "Invalid RBM = %d",
  2094. soc->stats.rx.err.invalid_rbm);
  2095. DP_TRACE(NONE, "Invalid Vdev = %d",
  2096. soc->stats.rx.err.invalid_vdev);
  2097. DP_TRACE(NONE, "Invalid Pdev = %d",
  2098. soc->stats.rx.err.invalid_pdev);
  2099. DP_TRACE(NONE, "HAL Ring Access Fail = %d",
  2100. soc->stats.rx.err.hal_ring_access_fail);
  2101. for (i = 0; i < MAX_RXDMA_ERRORS; i++) {
  2102. index += qdf_snprint(&rxdma_error[index],
  2103. DP_RXDMA_ERR_LENGTH - index,
  2104. " %d,", soc->stats.rx.err.rxdma_error[i]);
  2105. }
  2106. DP_TRACE(NONE, "RXDMA Error (0-31):%s",
  2107. rxdma_error);
  2108. index = 0;
  2109. for (i = 0; i < REO_ERROR_TYPE_MAX; i++) {
  2110. index += qdf_snprint(&reo_error[index],
  2111. DP_REO_ERR_LENGTH - index,
  2112. " %d,", soc->stats.rx.err.reo_error[i]);
  2113. }
  2114. DP_TRACE(NONE, "REO Error(0-14):%s",
  2115. reo_error);
  2116. }
  2117. /**
  2118. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  2119. * @vdev: DP_VDEV handle
  2120. *
  2121. * Return:void
  2122. */
  2123. static inline void
  2124. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  2125. {
  2126. struct dp_peer *peer = NULL;
  2127. DP_STATS_CLR(vdev->pdev);
  2128. DP_STATS_CLR(vdev->pdev->soc);
  2129. DP_STATS_CLR(vdev);
  2130. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2131. if (!peer)
  2132. return;
  2133. DP_STATS_CLR(peer);
  2134. }
  2135. }
  2136. /**
  2137. * dp_print_rx_rates(): Print Rx rate stats
  2138. * @vdev: DP_VDEV handle
  2139. *
  2140. * Return:void
  2141. */
  2142. static inline void
  2143. dp_print_rx_rates(struct dp_vdev *vdev)
  2144. {
  2145. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  2146. uint8_t i;
  2147. uint8_t index = 0;
  2148. char mcs[DP_MCS_LENGTH];
  2149. char nss[DP_NSS_LENGTH];
  2150. DP_TRACE(NONE, "Rx Rate Info:\n");
  2151. for (i = 0; i < MAX_MCS; i++) {
  2152. index += qdf_snprint(&mcs[index], DP_MCS_LENGTH - index,
  2153. " %d,", pdev->stats.rx.mcs_count[i]);
  2154. }
  2155. DP_TRACE(NONE, "MCS(0-11):%s",
  2156. mcs);
  2157. index = 0;
  2158. for (i = 0; i < SS_COUNT; i++) {
  2159. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  2160. " %d,", pdev->stats.rx.nss[i]);
  2161. }
  2162. DP_TRACE(NONE, "NSS(0-7):%s",
  2163. nss);
  2164. DP_TRACE(NONE, "SGI:"
  2165. " 0.8us %d,"
  2166. " 0.4us %d,"
  2167. " 1.6us %d,"
  2168. " 3.2us %d,",
  2169. pdev->stats.rx.sgi_count[0],
  2170. pdev->stats.rx.sgi_count[1],
  2171. pdev->stats.rx.sgi_count[2],
  2172. pdev->stats.rx.sgi_count[3]);
  2173. DP_TRACE(NONE, "BW Counts: 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  2174. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  2175. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  2176. DP_TRACE(NONE, "Reception Type:"
  2177. " SU: %d,"
  2178. " MU_MIMO:%d,"
  2179. " MU_OFDMA:%d,"
  2180. " MU_OFDMA_MIMO:%d",
  2181. pdev->stats.rx.reception_type[0],
  2182. pdev->stats.rx.reception_type[1],
  2183. pdev->stats.rx.reception_type[2],
  2184. pdev->stats.rx.reception_type[3]);
  2185. DP_TRACE(NONE, "Aggregation:\n");
  2186. DP_TRACE(NONE, "Number of Msdu's Part of Ampdu = %d",
  2187. pdev->stats.rx.ampdu_cnt);
  2188. DP_TRACE(NONE, "Number of Msdu's With No Mpdu Level Aggregation : %d",
  2189. pdev->stats.rx.non_ampdu_cnt);
  2190. DP_TRACE(NONE, "Number of Msdu's Part of Amsdu: %d",
  2191. pdev->stats.rx.amsdu_cnt);
  2192. DP_TRACE(NONE, "Number of Msdu's With No Msdu Level Aggregation: %d",
  2193. pdev->stats.rx.non_amsdu_cnt);
  2194. }
  2195. /**
  2196. * dp_print_tx_rates(): Print tx rates
  2197. * @vdev: DP_VDEV handle
  2198. *
  2199. * Return:void
  2200. */
  2201. static inline void
  2202. dp_print_tx_rates(struct dp_vdev *vdev)
  2203. {
  2204. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  2205. uint8_t i, pkt_type;
  2206. char mcs[DOT11_MAX][DP_MCS_LENGTH];
  2207. uint32_t index;
  2208. DP_TRACE(NONE, "Tx Rate Info:\n");
  2209. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  2210. index = 0;
  2211. for (i = 0; i < MAX_MCS; i++) {
  2212. index += qdf_snprint(&mcs[pkt_type][index],
  2213. DP_MCS_LENGTH - index,
  2214. " %d ",
  2215. pdev->stats.tx.pkt_type[pkt_type].
  2216. mcs_count[i]);
  2217. }
  2218. }
  2219. DP_TRACE(NONE, "Packet Type 11A MCS(0-7):%s",
  2220. mcs[0]);
  2221. DP_TRACE(NONE, "Packet Type 11A MCS Invalid = %d",
  2222. pdev->stats.tx.pkt_type[DOT11_A].mcs_count[MAX_MCS]);
  2223. DP_TRACE(NONE, "Packet Type 11B MCS(0-6):%s",
  2224. mcs[1]);
  2225. DP_TRACE(NONE, "Packet Type 11B MCS Invalid = %d",
  2226. pdev->stats.tx.pkt_type[DOT11_B].mcs_count[MAX_MCS]);
  2227. DP_TRACE(NONE, "Packet Type 11N MCS(0-7):%s",
  2228. mcs[2]);
  2229. DP_TRACE(NONE, "Packet Type 11N MCS Invalid = %d",
  2230. pdev->stats.tx.pkt_type[DOT11_N].mcs_count[MAX_MCS]);
  2231. DP_TRACE(NONE, "Packet Type 11AC MCS(0-9):%s",
  2232. mcs[3]);
  2233. DP_TRACE(NONE, "Packet Type 11AC MCS Invalid = %d",
  2234. pdev->stats.tx.pkt_type[DOT11_AC].mcs_count[MAX_MCS]);
  2235. DP_TRACE(NONE, "Packet Type 11AX MCS(0-11):%s",
  2236. mcs[4]);
  2237. DP_TRACE(NONE, "Packet Type 11AX MCS Invalid = %d",
  2238. pdev->stats.tx.pkt_type[DOT11_AX].mcs_count[MAX_MCS]);
  2239. }
  2240. /**
  2241. * dp_print_peer_stats():print peer stats
  2242. * @peer: DP_PEER handle
  2243. *
  2244. * return void
  2245. */
  2246. static inline void dp_print_peer_stats(struct dp_peer *peer)
  2247. {
  2248. uint8_t i, pkt_type;
  2249. char mcs[DOT11_MAX][DP_MCS_LENGTH];
  2250. uint32_t index;
  2251. char nss[DP_NSS_LENGTH];
  2252. char mcs_rx[DP_MCS_LENGTH];
  2253. DP_TRACE(NONE, "Node Tx Stats:\n");
  2254. DP_TRACE(NONE, "Total Packet Completions %d",
  2255. peer->stats.tx.comp_pkt.num);
  2256. DP_TRACE(NONE, "Total Bytes Completions %d",
  2257. peer->stats.tx.comp_pkt.bytes);
  2258. DP_TRACE(NONE, "Success Packets %d",
  2259. peer->stats.tx.tx_success.num);
  2260. DP_TRACE(NONE, "Success Bytes %d",
  2261. peer->stats.tx.tx_success.bytes);
  2262. DP_TRACE(NONE, "Packets Failed %d",
  2263. peer->stats.tx.tx_failed);
  2264. DP_TRACE(NONE, "Packets In OFDMA %d",
  2265. peer->stats.tx.ofdma);
  2266. DP_TRACE(NONE, "Packets In STBC %d",
  2267. peer->stats.tx.stbc);
  2268. DP_TRACE(NONE, "Packets In LDPC %d",
  2269. peer->stats.tx.ldpc);
  2270. DP_TRACE(NONE, "Packet Retries %d",
  2271. peer->stats.tx.retries);
  2272. DP_TRACE(NONE, "Msdu's Not Part of Ampdu %d",
  2273. peer->stats.tx.non_amsdu_cnt);
  2274. DP_TRACE(NONE, "Mpdu's Part of Ampdu %d",
  2275. peer->stats.tx.amsdu_cnt);
  2276. DP_TRACE(NONE, "Last Packet RSSI %d",
  2277. peer->stats.tx.last_ack_rssi);
  2278. DP_TRACE(NONE, "Dropped At Host: Due To DMA Map Error %d",
  2279. peer->stats.tx.dropped.dma_map_error);
  2280. DP_TRACE(NONE, "Dropped At Host: Due To Ring Full %d",
  2281. peer->stats.tx.dropped.ring_full);
  2282. DP_TRACE(NONE, "Dropped At FW: FW Discard %d",
  2283. peer->stats.tx.dropped.fw_discard);
  2284. DP_TRACE(NONE, "Dropped At FW: FW Discard Retired %d",
  2285. peer->stats.tx.dropped.fw_discard_retired);
  2286. DP_TRACE(NONE, "Dropped At FW: FW Discard Untransmitted %d",
  2287. peer->stats.tx.dropped.fw_discard_untransmitted);
  2288. DP_TRACE(NONE, "Dropped : Mpdu Age Out %d",
  2289. peer->stats.tx.dropped.mpdu_age_out);
  2290. DP_TRACE(NONE, "Dropped : FW Discard Reason1 %d",
  2291. peer->stats.tx.dropped.fw_discard_reason1);
  2292. DP_TRACE(NONE, "Dropped : FW Discard Reason2 %d",
  2293. peer->stats.tx.dropped.fw_discard_reason2);
  2294. DP_TRACE(NONE, "Dropped : FW Discard Reason3 %d",
  2295. peer->stats.tx.dropped.fw_discard_reason3);
  2296. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  2297. index = 0;
  2298. for (i = 0; i < MAX_MCS; i++) {
  2299. index += qdf_snprint(&mcs[pkt_type][index],
  2300. DP_MCS_LENGTH - index,
  2301. " %d ",
  2302. peer->stats.tx.pkt_type[pkt_type].
  2303. mcs_count[i]);
  2304. }
  2305. }
  2306. DP_TRACE(NONE, "Packet Type 11A MCS(0-7):%s",
  2307. mcs[0]);
  2308. DP_TRACE(NONE, "Packet Type 11A MCS Invalid = %d",
  2309. peer->stats.tx.pkt_type[DOT11_A].mcs_count[MAX_MCS]);
  2310. DP_TRACE(NONE, "Packet Type 11B MCS(0-6):%s",
  2311. mcs[1]);
  2312. DP_TRACE(NONE, "Packet Type 11B MCS Invalid = %d",
  2313. peer->stats.tx.pkt_type[DOT11_B].mcs_count[MAX_MCS]);
  2314. DP_TRACE(NONE, "Packet Type 11N MCS(0-7):%s",
  2315. mcs[2]);
  2316. DP_TRACE(NONE, "Packet Type 11N MCS Invalid = %d",
  2317. peer->stats.tx.pkt_type[DOT11_N].mcs_count[MAX_MCS]);
  2318. DP_TRACE(NONE, "Packet Type 11AC MCS(0-9):%s",
  2319. mcs[3]);
  2320. DP_TRACE(NONE, "Packet Type 11AC MCS Invalid = %d",
  2321. peer->stats.tx.pkt_type[DOT11_AC].mcs_count[MAX_MCS]);
  2322. DP_TRACE(NONE, "Packet Type 11AX MCS(0-11):%s",
  2323. mcs[4]);
  2324. DP_TRACE(NONE, "Packet Type 11AX MCS Invalid = %d",
  2325. peer->stats.tx.pkt_type[DOT11_AX].mcs_count[MAX_MCS]);
  2326. DP_TRACE(NONE, "SGI:"
  2327. " 0.8us %d,"
  2328. " 0.4us %d,"
  2329. " 1.6us %d,"
  2330. " 3.2us %d,",
  2331. peer->stats.tx.sgi_count[0],
  2332. peer->stats.tx.sgi_count[1],
  2333. peer->stats.tx.sgi_count[2],
  2334. peer->stats.tx.sgi_count[3]);
  2335. DP_TRACE(NONE, "BW Counts: 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  2336. peer->stats.tx.bw[0], peer->stats.tx.bw[1],
  2337. peer->stats.tx.bw[2], peer->stats.tx.bw[3]);
  2338. DP_TRACE(NONE, "Node Rx Stats:\n");
  2339. DP_TRACE(NONE, "Packets Sent To Stack %d",
  2340. peer->stats.rx.to_stack.num);
  2341. DP_TRACE(NONE, "Bytes Sent To Stack %d",
  2342. peer->stats.rx.to_stack.bytes);
  2343. DP_TRACE(NONE, "Packets Received %d", peer->stats.rx.rcvd_reo.num);
  2344. DP_TRACE(NONE, "Bytes Received %d", peer->stats.rx.rcvd_reo.bytes);
  2345. DP_TRACE(NONE, "Unicast Packets Received %d",
  2346. peer->stats.rx.unicast.num);
  2347. DP_TRACE(NONE, "Unicast Bytes Received %d",
  2348. peer->stats.rx.unicast.bytes);
  2349. DP_TRACE(NONE, "Multicast Packets Received %d",
  2350. peer->stats.rx.multicast.num);
  2351. DP_TRACE(NONE, "Multicast Bytes Received %d",
  2352. peer->stats.rx.multicast.bytes);
  2353. DP_TRACE(NONE, "WDS Packets Received %d",
  2354. peer->stats.rx.wds.num);
  2355. DP_TRACE(NONE, "WDS Bytes Received %d",
  2356. peer->stats.rx.wds.bytes);
  2357. DP_TRACE(NONE, "Intra BSS Packets Received %d",
  2358. peer->stats.rx.intra_bss.num);
  2359. DP_TRACE(NONE, "Intra BSS Bytes Received %d",
  2360. peer->stats.rx.intra_bss.bytes);
  2361. DP_TRACE(NONE, "Raw Packets Received %d",
  2362. peer->stats.rx.raw.num);
  2363. DP_TRACE(NONE, "Raw Bytes Received %d",
  2364. peer->stats.rx.raw.bytes);
  2365. DP_TRACE(NONE, "Errors: MIC Errors %d",
  2366. peer->stats.rx.err.mic_err);
  2367. DP_TRACE(NONE, "Erros: Decryption Errors %d",
  2368. peer->stats.rx.err.decrypt_err);
  2369. DP_TRACE(NONE, "Msdu's Received As Part of Ampdu %d",
  2370. peer->stats.rx.non_ampdu_cnt);
  2371. DP_TRACE(NONE, "Msdu's Recived As Ampdu %d", peer->stats.rx.ampdu_cnt);
  2372. DP_TRACE(NONE, "Msdu's Received Not Part of Amsdu's %d",
  2373. peer->stats.rx.non_amsdu_cnt);
  2374. DP_TRACE(NONE, "MSDUs Received As Part of Amsdu %d",
  2375. peer->stats.rx.amsdu_cnt);
  2376. DP_TRACE(NONE, "SGI:"
  2377. " 0.8us %d,"
  2378. " 0.4us %d,"
  2379. " 1.6us %d,"
  2380. " 3.2us %d,",
  2381. peer->stats.rx.sgi_count[0],
  2382. peer->stats.rx.sgi_count[1],
  2383. peer->stats.rx.sgi_count[2],
  2384. peer->stats.rx.sgi_count[3]);
  2385. DP_TRACE(NONE, "BW Counts: 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  2386. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  2387. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  2388. DP_TRACE(NONE, "Reception Type:"
  2389. " SU %d,"
  2390. " MU_MIMO %d,"
  2391. " MU_OFDMA %d,"
  2392. " MU_OFDMA_MIMO %d",
  2393. peer->stats.rx.reception_type[0],
  2394. peer->stats.rx.reception_type[1],
  2395. peer->stats.rx.reception_type[2],
  2396. peer->stats.rx.reception_type[3]);
  2397. index = 0;
  2398. for (i = 0; i < MAX_MCS; i++) {
  2399. index += qdf_snprint(&mcs_rx[index], DP_MCS_LENGTH - index,
  2400. " %d,", peer->stats.rx.mcs_count[i]);
  2401. }
  2402. DP_TRACE(NONE, "MCS(0-11):%s",
  2403. mcs_rx);
  2404. index = 0;
  2405. for (i = 0; i < SS_COUNT; i++) {
  2406. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  2407. " %d,", peer->stats.rx.nss[i]);
  2408. }
  2409. DP_TRACE(NONE, "NSS(0-7):%s",
  2410. nss);
  2411. }
  2412. /**
  2413. * dp_print_host_stats()- Function to print the stats aggregated at host
  2414. * @vdev_handle: DP_VDEV handle
  2415. * @req: ol_txrx_stats_req
  2416. * @type: host stats type
  2417. *
  2418. * Available Stat types
  2419. * TXRX_RX_RATE_STATS: Print Rx Rate Info
  2420. * TXRX_TX_RATE_STATS: Print Tx Rate Info
  2421. * TXRX_TX_HOST_STATS: Print Tx Stats
  2422. * TXRX_RX_HOST_STATS: Print Rx Stats
  2423. * TXRX_CLEAR_STATS : Clear the stats
  2424. *
  2425. * Return: 0 on success, print error message in case of failure
  2426. */
  2427. static int
  2428. dp_print_host_stats(struct cdp_vdev *vdev_handle, struct ol_txrx_stats_req *req,
  2429. enum cdp_host_txrx_stats type)
  2430. {
  2431. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2432. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  2433. dp_aggregate_pdev_stats(pdev);
  2434. switch (type) {
  2435. case TXRX_RX_RATE_STATS:
  2436. dp_print_rx_rates(vdev);
  2437. break;
  2438. case TXRX_TX_RATE_STATS:
  2439. dp_print_tx_rates(vdev);
  2440. break;
  2441. case TXRX_TX_HOST_STATS:
  2442. dp_print_pdev_tx_stats(pdev);
  2443. dp_print_soc_tx_stats(pdev->soc);
  2444. break;
  2445. case TXRX_RX_HOST_STATS:
  2446. dp_print_pdev_rx_stats(pdev);
  2447. dp_print_soc_rx_stats(pdev->soc);
  2448. break;
  2449. case TXRX_CLEAR_STATS:
  2450. dp_txrx_host_stats_clr(vdev);
  2451. break;
  2452. default:
  2453. DP_TRACE(NONE, "Wrong Input For TxRx Host Stats");
  2454. break;
  2455. }
  2456. return 0;
  2457. }
  2458. /*
  2459. * dp_get_peer_stats()- function to print peer stats
  2460. * @pdev_handle: DP_PDEV handle
  2461. * @mac_addr: mac address of the peer
  2462. *
  2463. * Return: void
  2464. */
  2465. static void
  2466. dp_get_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  2467. {
  2468. struct dp_peer *peer;
  2469. uint8_t local_id;
  2470. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  2471. &local_id);
  2472. dp_print_peer_stats(peer);
  2473. return;
  2474. }
  2475. /*
  2476. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  2477. * @vdev_handle: DP_VDEV handle
  2478. * @map_id:ID of map that needs to be updated
  2479. *
  2480. * Return: void
  2481. */
  2482. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  2483. uint8_t map_id)
  2484. {
  2485. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2486. vdev->dscp_tid_map_id = map_id;
  2487. return;
  2488. }
  2489. /**
  2490. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  2491. * @pdev: DP_PDEV handle
  2492. * @map_id: ID of map that needs to be updated
  2493. * @tos: index value in map
  2494. * @tid: tid value passed by the user
  2495. *
  2496. * Return: void
  2497. */
  2498. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  2499. uint8_t map_id, uint8_t tos, uint8_t tid)
  2500. {
  2501. uint8_t dscp;
  2502. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  2503. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  2504. pdev->dscp_tid_map[map_id][dscp] = tid;
  2505. hal_tx_update_dscp_tid(pdev->soc->hal_soc, tid,
  2506. map_id, dscp);
  2507. return;
  2508. }
  2509. /*
  2510. * dp_txrx_stats() - function to map to firmware and host stats
  2511. * @vdev: virtual handle
  2512. * @req: statistics request handle
  2513. * @stats: type of statistics requested
  2514. *
  2515. * Return: integer
  2516. */
  2517. static int dp_txrx_stats(struct cdp_vdev *vdev,
  2518. struct ol_txrx_stats_req *req, enum cdp_stats stats)
  2519. {
  2520. int host_stats;
  2521. int fw_stats;
  2522. if (stats >= CDP_TXRX_MAX_STATS)
  2523. return 0;
  2524. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  2525. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  2526. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2527. "stats: %u fw_stats_type: %d host_stats_type: %d",
  2528. stats, fw_stats, host_stats);
  2529. /* TODO: Firmware Mapping not implemented */
  2530. if (host_stats != TXRX_HOST_STATS_INVALID)
  2531. return dp_print_host_stats(vdev, req, host_stats);
  2532. return 0;
  2533. }
  2534. static struct cdp_cmn_ops dp_ops_cmn = {
  2535. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  2536. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  2537. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  2538. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  2539. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  2540. .txrx_peer_create = dp_peer_create_wifi3,
  2541. .txrx_peer_setup = dp_peer_setup_wifi3,
  2542. .txrx_peer_teardown = NULL,
  2543. .txrx_peer_delete = dp_peer_delete_wifi3,
  2544. .txrx_vdev_register = dp_vdev_register_wifi3,
  2545. .txrx_soc_detach = dp_soc_detach_wifi3,
  2546. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  2547. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  2548. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  2549. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  2550. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  2551. .delba_process = dp_delba_process_wifi3,
  2552. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  2553. /* TODO: get API's for dscp-tid need to be added*/
  2554. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  2555. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  2556. .txrx_stats = dp_txrx_stats,
  2557. /* TODO: Add other functions */
  2558. };
  2559. static struct cdp_ctrl_ops dp_ops_ctrl = {
  2560. .txrx_peer_authorize = dp_peer_authorize,
  2561. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  2562. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  2563. #ifdef MESH_MODE_SUPPORT
  2564. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  2565. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  2566. #endif
  2567. /* TODO: Add other functions */
  2568. };
  2569. static struct cdp_me_ops dp_ops_me = {
  2570. /* TODO */
  2571. };
  2572. static struct cdp_mon_ops dp_ops_mon = {
  2573. /* TODO */
  2574. };
  2575. static struct cdp_host_stats_ops dp_ops_host_stats = {
  2576. .txrx_host_stats_get = dp_print_host_stats,
  2577. .txrx_per_peer_stats = dp_get_peer_stats,
  2578. /* TODO */
  2579. };
  2580. static struct cdp_wds_ops dp_ops_wds = {
  2581. /* TODO */
  2582. };
  2583. static struct cdp_raw_ops dp_ops_raw = {
  2584. /* TODO */
  2585. };
  2586. #ifdef CONFIG_WIN
  2587. static struct cdp_pflow_ops dp_ops_pflow = {
  2588. /* TODO */
  2589. };
  2590. #endif /* CONFIG_WIN */
  2591. #ifndef CONFIG_WIN
  2592. static struct cdp_misc_ops dp_ops_misc = {
  2593. .get_opmode = dp_get_opmode,
  2594. };
  2595. static struct cdp_flowctl_ops dp_ops_flowctl = {
  2596. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  2597. };
  2598. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  2599. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  2600. };
  2601. static struct cdp_ipa_ops dp_ops_ipa = {
  2602. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  2603. };
  2604. static struct cdp_lro_ops dp_ops_lro = {
  2605. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  2606. };
  2607. /**
  2608. * dp_dummy_bus_suspend() - dummy bus suspend op
  2609. *
  2610. * FIXME - This is a placeholder for the actual logic!
  2611. *
  2612. * Return: QDF_STATUS_SUCCESS
  2613. */
  2614. inline QDF_STATUS dp_dummy_bus_suspend(void)
  2615. {
  2616. return QDF_STATUS_SUCCESS;
  2617. }
  2618. /**
  2619. * dp_dummy_bus_resume() - dummy bus resume
  2620. *
  2621. * FIXME - This is a placeholder for the actual logic!
  2622. *
  2623. * Return: QDF_STATUS_SUCCESS
  2624. */
  2625. inline QDF_STATUS dp_dummy_bus_resume(void)
  2626. {
  2627. return QDF_STATUS_SUCCESS;
  2628. }
  2629. static struct cdp_bus_ops dp_ops_bus = {
  2630. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  2631. .bus_suspend = dp_dummy_bus_suspend,
  2632. .bus_resume = dp_dummy_bus_resume
  2633. };
  2634. static struct cdp_ocb_ops dp_ops_ocb = {
  2635. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  2636. };
  2637. static struct cdp_throttle_ops dp_ops_throttle = {
  2638. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  2639. };
  2640. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  2641. };
  2642. static struct cdp_cfg_ops dp_ops_cfg = {
  2643. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  2644. };
  2645. static struct cdp_peer_ops dp_ops_peer = {
  2646. .register_peer = dp_register_peer,
  2647. .clear_peer = dp_clear_peer,
  2648. .find_peer_by_addr = dp_find_peer_by_addr,
  2649. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  2650. .local_peer_id = dp_local_peer_id,
  2651. .peer_find_by_local_id = dp_peer_find_by_local_id,
  2652. .peer_state_update = dp_peer_state_update,
  2653. .get_vdevid = dp_get_vdevid,
  2654. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  2655. .get_vdev_for_peer = dp_get_vdev_for_peer,
  2656. .get_peer_state = dp_get_peer_state,
  2657. .last_assoc_received = dp_get_last_assoc_received,
  2658. .last_disassoc_received = dp_get_last_disassoc_received,
  2659. .last_deauth_received = dp_get_last_deauth_received,
  2660. };
  2661. #endif
  2662. static struct cdp_ops dp_txrx_ops = {
  2663. .cmn_drv_ops = &dp_ops_cmn,
  2664. .ctrl_ops = &dp_ops_ctrl,
  2665. .me_ops = &dp_ops_me,
  2666. .mon_ops = &dp_ops_mon,
  2667. .host_stats_ops = &dp_ops_host_stats,
  2668. .wds_ops = &dp_ops_wds,
  2669. .raw_ops = &dp_ops_raw,
  2670. #ifdef CONFIG_WIN
  2671. .pflow_ops = &dp_ops_pflow,
  2672. #endif /* CONFIG_WIN */
  2673. #ifndef CONFIG_WIN
  2674. .misc_ops = &dp_ops_misc,
  2675. .cfg_ops = &dp_ops_cfg,
  2676. .flowctl_ops = &dp_ops_flowctl,
  2677. .l_flowctl_ops = &dp_ops_l_flowctl,
  2678. .ipa_ops = &dp_ops_ipa,
  2679. .lro_ops = &dp_ops_lro,
  2680. .bus_ops = &dp_ops_bus,
  2681. .ocb_ops = &dp_ops_ocb,
  2682. .peer_ops = &dp_ops_peer,
  2683. .throttle_ops = &dp_ops_throttle,
  2684. .mob_stats_ops = &dp_ops_mob_stats,
  2685. #endif
  2686. };
  2687. /*
  2688. * dp_soc_attach_wifi3() - Attach txrx SOC
  2689. * @osif_soc: Opaque SOC handle from OSIF/HDD
  2690. * @htc_handle: Opaque HTC handle
  2691. * @hif_handle: Opaque HIF handle
  2692. * @qdf_osdev: QDF device
  2693. *
  2694. * Return: DP SOC handle on success, NULL on failure
  2695. */
  2696. /*
  2697. * Local prototype added to temporarily address warning caused by
  2698. * -Wmissing-prototypes. A more correct solution, namely to expose
  2699. * a prototype in an appropriate header file, will come later.
  2700. */
  2701. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  2702. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  2703. struct ol_if_ops *ol_ops);
  2704. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  2705. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  2706. struct ol_if_ops *ol_ops)
  2707. {
  2708. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  2709. if (!soc) {
  2710. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2711. FL("DP SOC memory allocation failed"));
  2712. goto fail0;
  2713. }
  2714. soc->cdp_soc.ops = &dp_txrx_ops;
  2715. soc->cdp_soc.ol_ops = ol_ops;
  2716. soc->osif_soc = osif_soc;
  2717. soc->osdev = qdf_osdev;
  2718. soc->hif_handle = hif_handle;
  2719. soc->hal_soc = hif_get_hal_handle(hif_handle);
  2720. soc->htt_handle = htt_soc_attach(soc, osif_soc, htc_handle,
  2721. soc->hal_soc, qdf_osdev);
  2722. if (!soc->htt_handle) {
  2723. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2724. FL("HTT attach failed"));
  2725. goto fail1;
  2726. }
  2727. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  2728. if (!soc->wlan_cfg_ctx) {
  2729. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2730. FL("wlan_cfg_soc_attach failed"));
  2731. goto fail2;
  2732. }
  2733. qdf_spinlock_create(&soc->peer_ref_mutex);
  2734. if (dp_soc_interrupt_attach(soc) != QDF_STATUS_SUCCESS) {
  2735. goto fail2;
  2736. }
  2737. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  2738. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  2739. return (void *)soc;
  2740. fail2:
  2741. htt_soc_detach(soc->htt_handle);
  2742. fail1:
  2743. qdf_mem_free(soc);
  2744. fail0:
  2745. return NULL;
  2746. }