dsi_panel.c 125 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/slab.h>
  8. #include <linux/gpio.h>
  9. #include <linux/of_gpio.h>
  10. #include <linux/pwm.h>
  11. #include <video/mipi_display.h>
  12. #include "dsi_panel.h"
  13. #include "dsi_ctrl_hw.h"
  14. #include "dsi_parser.h"
  15. #include "sde_dbg.h"
  16. #include "sde_dsc_helper.h"
  17. #include "sde_vdc_helper.h"
  18. /**
  19. * topology is currently defined by a set of following 3 values:
  20. * 1. num of layer mixers
  21. * 2. num of compression encoders
  22. * 3. num of interfaces
  23. */
  24. #define TOPOLOGY_SET_LEN 3
  25. #define MAX_TOPOLOGY 5
  26. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  27. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  28. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  29. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  30. #define MAX_PANEL_JITTER 10
  31. #define DEFAULT_PANEL_PREFILL_LINES 25
  32. #define HIGH_REFRESH_RATE_THRESHOLD_TIME_US 500
  33. #define MIN_PREFILL_LINES 40
  34. #define RSCC_MODE_THRESHOLD_TIME_US 40
  35. #define DCS_COMMAND_THRESHOLD_TIME_US 40
  36. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  37. {
  38. char *bp;
  39. bp = buf;
  40. /* First 7 bytes are cmd header */
  41. *bp++ = 0x0A;
  42. *bp++ = 1;
  43. *bp++ = 0;
  44. *bp++ = 0;
  45. *bp++ = pps_delay_ms;
  46. *bp++ = 0;
  47. *bp++ = 128;
  48. }
  49. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  50. char *buf, int pps_id, u32 size)
  51. {
  52. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  53. buf += DSI_CMD_PPS_HDR_SIZE;
  54. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  55. size);
  56. }
  57. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  58. char *buf, int pps_id, u32 size)
  59. {
  60. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  61. buf += DSI_CMD_PPS_HDR_SIZE;
  62. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  63. size);
  64. }
  65. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  66. {
  67. int rc = 0;
  68. int i;
  69. struct regulator *vreg = NULL;
  70. for (i = 0; i < panel->power_info.count; i++) {
  71. vreg = devm_regulator_get(panel->parent,
  72. panel->power_info.vregs[i].vreg_name);
  73. rc = PTR_ERR_OR_ZERO(vreg);
  74. if (rc) {
  75. DSI_ERR("failed to get %s regulator\n",
  76. panel->power_info.vregs[i].vreg_name);
  77. goto error_put;
  78. }
  79. panel->power_info.vregs[i].vreg = vreg;
  80. }
  81. return rc;
  82. error_put:
  83. for (i = i - 1; i >= 0; i--) {
  84. devm_regulator_put(panel->power_info.vregs[i].vreg);
  85. panel->power_info.vregs[i].vreg = NULL;
  86. }
  87. return rc;
  88. }
  89. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  90. {
  91. int rc = 0;
  92. int i;
  93. for (i = panel->power_info.count - 1; i >= 0; i--)
  94. devm_regulator_put(panel->power_info.vregs[i].vreg);
  95. return rc;
  96. }
  97. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  98. {
  99. int rc = 0;
  100. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  101. if (gpio_is_valid(r_config->reset_gpio)) {
  102. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  103. if (rc) {
  104. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  105. goto error;
  106. }
  107. }
  108. if (gpio_is_valid(r_config->disp_en_gpio)) {
  109. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  110. if (rc) {
  111. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  112. goto error_release_reset;
  113. }
  114. }
  115. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  116. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  117. if (rc) {
  118. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  119. goto error_release_disp_en;
  120. }
  121. }
  122. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  123. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  124. if (rc) {
  125. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  126. goto error_release_mode_sel;
  127. }
  128. }
  129. if (gpio_is_valid(panel->panel_test_gpio)) {
  130. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  131. if (rc) {
  132. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  133. rc);
  134. panel->panel_test_gpio = -1;
  135. rc = 0;
  136. }
  137. }
  138. goto error;
  139. error_release_mode_sel:
  140. if (gpio_is_valid(panel->bl_config.en_gpio))
  141. gpio_free(panel->bl_config.en_gpio);
  142. error_release_disp_en:
  143. if (gpio_is_valid(r_config->disp_en_gpio))
  144. gpio_free(r_config->disp_en_gpio);
  145. error_release_reset:
  146. if (gpio_is_valid(r_config->reset_gpio))
  147. gpio_free(r_config->reset_gpio);
  148. error:
  149. return rc;
  150. }
  151. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  152. {
  153. int rc = 0;
  154. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  155. if (gpio_is_valid(r_config->reset_gpio))
  156. gpio_free(r_config->reset_gpio);
  157. if (gpio_is_valid(r_config->disp_en_gpio))
  158. gpio_free(r_config->disp_en_gpio);
  159. if (gpio_is_valid(panel->bl_config.en_gpio))
  160. gpio_free(panel->bl_config.en_gpio);
  161. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  162. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  163. if (gpio_is_valid(panel->panel_test_gpio))
  164. gpio_free(panel->panel_test_gpio);
  165. return rc;
  166. }
  167. static int dsi_panel_trigger_esd_attack_sub(int reset_gpio)
  168. {
  169. if (!gpio_is_valid(reset_gpio)) {
  170. DSI_INFO("failed to pull down the reset gpio\n");
  171. return -EINVAL;
  172. }
  173. gpio_set_value(reset_gpio, 0);
  174. SDE_EVT32(SDE_EVTLOG_FUNC_CASE1);
  175. DSI_INFO("GPIO pulled low to simulate ESD\n");
  176. return 0;
  177. }
  178. static int dsi_panel_vm_trigger_esd_attack(struct dsi_panel *panel)
  179. {
  180. struct dsi_parser_utils *utils = &panel->utils;
  181. int reset_gpio;
  182. int rc = 0;
  183. reset_gpio = utils->get_named_gpio(utils->data,
  184. "qcom,platform-reset-gpio", 0);
  185. if (!gpio_is_valid(reset_gpio)) {
  186. DSI_ERR("[%s] reset gpio not provided\n", panel->name);
  187. return -EINVAL;
  188. }
  189. rc = gpio_request(reset_gpio, "reset_gpio");
  190. if (rc) {
  191. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  192. return rc;
  193. }
  194. rc = dsi_panel_trigger_esd_attack_sub(reset_gpio);
  195. gpio_free(reset_gpio);
  196. return rc;
  197. }
  198. static int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  199. {
  200. struct dsi_panel_reset_config *r_config;
  201. if (!panel) {
  202. DSI_ERR("Invalid panel param\n");
  203. return -EINVAL;
  204. }
  205. r_config = &panel->reset_config;
  206. if (!r_config) {
  207. DSI_ERR("Invalid panel reset configuration\n");
  208. return -EINVAL;
  209. }
  210. return dsi_panel_trigger_esd_attack_sub(r_config->reset_gpio);
  211. }
  212. static int dsi_panel_reset(struct dsi_panel *panel)
  213. {
  214. int rc = 0;
  215. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  216. int i;
  217. if (!gpio_is_valid(r_config->reset_gpio))
  218. goto skip_reset_gpio;
  219. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  220. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  221. if (rc) {
  222. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  223. goto exit;
  224. }
  225. }
  226. if (r_config->count) {
  227. rc = gpio_direction_output(r_config->reset_gpio,
  228. r_config->sequence[0].level);
  229. if (rc) {
  230. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  231. goto exit;
  232. }
  233. }
  234. for (i = 0; i < r_config->count; i++) {
  235. gpio_set_value(r_config->reset_gpio,
  236. r_config->sequence[i].level);
  237. if (r_config->sequence[i].sleep_ms)
  238. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  239. (r_config->sequence[i].sleep_ms * 1000) + 100);
  240. }
  241. skip_reset_gpio:
  242. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  243. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  244. if (rc)
  245. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  246. }
  247. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  248. bool out = true;
  249. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  250. || (panel->reset_config.mode_sel_state
  251. == MODE_GPIO_LOW))
  252. out = false;
  253. else if ((panel->reset_config.mode_sel_state
  254. == MODE_SEL_SINGLE_PORT) ||
  255. (panel->reset_config.mode_sel_state
  256. == MODE_GPIO_HIGH))
  257. out = true;
  258. rc = gpio_direction_output(
  259. panel->reset_config.lcd_mode_sel_gpio, out);
  260. if (rc)
  261. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  262. }
  263. if (gpio_is_valid(panel->panel_test_gpio)) {
  264. rc = gpio_direction_input(panel->panel_test_gpio);
  265. if (rc)
  266. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  267. rc);
  268. }
  269. exit:
  270. return rc;
  271. }
  272. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  273. {
  274. int rc = 0;
  275. struct pinctrl_state *state;
  276. if (panel->host_config.ext_bridge_mode)
  277. return 0;
  278. if (!panel->pinctrl.pinctrl)
  279. return 0;
  280. if (enable)
  281. state = panel->pinctrl.active;
  282. else
  283. state = panel->pinctrl.suspend;
  284. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  285. if (rc)
  286. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  287. panel->name, rc);
  288. return rc;
  289. }
  290. static int dsi_panel_power_on(struct dsi_panel *panel)
  291. {
  292. int rc = 0;
  293. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  294. if (rc) {
  295. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  296. panel->name, rc);
  297. goto exit;
  298. }
  299. rc = dsi_panel_set_pinctrl_state(panel, true);
  300. if (rc) {
  301. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  302. goto error_disable_vregs;
  303. }
  304. rc = dsi_panel_reset(panel);
  305. if (rc) {
  306. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  307. goto error_disable_gpio;
  308. }
  309. goto exit;
  310. error_disable_gpio:
  311. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  312. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  313. if (gpio_is_valid(panel->bl_config.en_gpio))
  314. gpio_set_value(panel->bl_config.en_gpio, 0);
  315. (void)dsi_panel_set_pinctrl_state(panel, false);
  316. error_disable_vregs:
  317. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  318. exit:
  319. return rc;
  320. }
  321. static int dsi_panel_power_off(struct dsi_panel *panel)
  322. {
  323. int rc = 0;
  324. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  325. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  326. if (gpio_is_valid(panel->reset_config.reset_gpio) &&
  327. !panel->reset_gpio_always_on)
  328. gpio_set_value(panel->reset_config.reset_gpio, 0);
  329. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  330. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  331. if (gpio_is_valid(panel->panel_test_gpio)) {
  332. rc = gpio_direction_input(panel->panel_test_gpio);
  333. if (rc)
  334. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  335. rc);
  336. }
  337. rc = dsi_panel_set_pinctrl_state(panel, false);
  338. if (rc) {
  339. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  340. rc);
  341. }
  342. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  343. if (rc)
  344. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  345. panel->name, rc);
  346. return rc;
  347. }
  348. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  349. enum dsi_cmd_set_type type)
  350. {
  351. int rc = 0, i = 0;
  352. ssize_t len;
  353. struct dsi_cmd_desc *cmds;
  354. u32 count;
  355. enum dsi_cmd_set_state state;
  356. struct dsi_display_mode *mode;
  357. if (!panel || !panel->cur_mode)
  358. return -EINVAL;
  359. mode = panel->cur_mode;
  360. cmds = mode->priv_info->cmd_sets[type].cmds;
  361. count = mode->priv_info->cmd_sets[type].count;
  362. state = mode->priv_info->cmd_sets[type].state;
  363. SDE_EVT32(type, state, count);
  364. if (count == 0) {
  365. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  366. panel->name, type);
  367. goto error;
  368. }
  369. for (i = 0; i < count; i++) {
  370. cmds->ctrl_flags = 0;
  371. if (state == DSI_CMD_SET_STATE_LP)
  372. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  373. if (type == DSI_CMD_SET_VID_SWITCH_OUT)
  374. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  375. len = dsi_host_transfer_sub(panel->host, cmds);
  376. if (len < 0) {
  377. rc = len;
  378. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  379. goto error;
  380. }
  381. if (cmds->post_wait_ms)
  382. usleep_range(cmds->post_wait_ms*1000,
  383. ((cmds->post_wait_ms*1000)+10));
  384. cmds++;
  385. }
  386. error:
  387. return rc;
  388. }
  389. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  390. {
  391. int rc = 0;
  392. if (panel->host_config.ext_bridge_mode)
  393. return 0;
  394. devm_pinctrl_put(panel->pinctrl.pinctrl);
  395. return rc;
  396. }
  397. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  398. {
  399. int rc = 0;
  400. if (panel->host_config.ext_bridge_mode)
  401. return 0;
  402. /* TODO: pinctrl is defined in dsi dt node */
  403. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  404. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  405. rc = PTR_ERR(panel->pinctrl.pinctrl);
  406. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  407. goto error;
  408. }
  409. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  410. "panel_active");
  411. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  412. rc = PTR_ERR(panel->pinctrl.active);
  413. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  414. goto error;
  415. }
  416. panel->pinctrl.suspend =
  417. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  418. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  419. rc = PTR_ERR(panel->pinctrl.suspend);
  420. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  421. goto error;
  422. }
  423. panel->pinctrl.pwm_pin =
  424. pinctrl_lookup_state(panel->pinctrl.pinctrl, "pwm_pin");
  425. if (IS_ERR_OR_NULL(panel->pinctrl.pwm_pin)) {
  426. panel->pinctrl.pwm_pin = NULL;
  427. DSI_DEBUG("failed to get pinctrl pwm_pin");
  428. }
  429. error:
  430. return rc;
  431. }
  432. static int dsi_panel_wled_register(struct dsi_panel *panel,
  433. struct dsi_backlight_config *bl)
  434. {
  435. struct backlight_device *bd;
  436. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  437. if (!bd) {
  438. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  439. panel->name, -EPROBE_DEFER);
  440. return -EPROBE_DEFER;
  441. }
  442. bl->raw_bd = bd;
  443. return 0;
  444. }
  445. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  446. u32 bl_lvl)
  447. {
  448. int rc = 0;
  449. unsigned long mode_flags = 0;
  450. struct mipi_dsi_device *dsi = NULL;
  451. if (!panel || (bl_lvl > 0xffff)) {
  452. DSI_ERR("invalid params\n");
  453. return -EINVAL;
  454. }
  455. dsi = &panel->mipi_device;
  456. if (unlikely(panel->bl_config.lp_mode)) {
  457. mode_flags = dsi->mode_flags;
  458. dsi->mode_flags |= MIPI_DSI_MODE_LPM;
  459. }
  460. if (panel->bl_config.bl_inverted_dbv)
  461. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  462. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  463. if (rc < 0)
  464. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  465. if (unlikely(panel->bl_config.lp_mode))
  466. dsi->mode_flags = mode_flags;
  467. return rc;
  468. }
  469. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  470. u32 bl_lvl)
  471. {
  472. int rc = 0;
  473. u32 duty = 0;
  474. u32 period_ns = 0;
  475. struct dsi_backlight_config *bl;
  476. if (!panel) {
  477. DSI_ERR("Invalid Params\n");
  478. return -EINVAL;
  479. }
  480. bl = &panel->bl_config;
  481. if (!bl->pwm_bl) {
  482. DSI_ERR("pwm device not found\n");
  483. return -EINVAL;
  484. }
  485. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  486. duty = bl_lvl * period_ns;
  487. duty /= bl->bl_max_level;
  488. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  489. if (rc) {
  490. DSI_ERR("[%s] failed to change pwm config, rc=%d\n", panel->name,
  491. rc);
  492. goto error;
  493. }
  494. if (bl_lvl == 0 && bl->pwm_enabled) {
  495. pwm_disable(bl->pwm_bl);
  496. bl->pwm_enabled = false;
  497. return 0;
  498. }
  499. if (bl_lvl != 0 && !bl->pwm_enabled) {
  500. rc = pwm_enable(bl->pwm_bl);
  501. if (rc) {
  502. DSI_ERR("[%s] failed to enable pwm, rc=%d\n", panel->name,
  503. rc);
  504. goto error;
  505. }
  506. bl->pwm_enabled = true;
  507. }
  508. error:
  509. return rc;
  510. }
  511. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  512. {
  513. int rc = 0;
  514. struct dsi_backlight_config *bl = &panel->bl_config;
  515. if (panel->host_config.ext_bridge_mode)
  516. return 0;
  517. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  518. switch (bl->type) {
  519. case DSI_BACKLIGHT_WLED:
  520. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  521. break;
  522. case DSI_BACKLIGHT_DCS:
  523. rc = dsi_panel_update_backlight(panel, bl_lvl);
  524. break;
  525. case DSI_BACKLIGHT_EXTERNAL:
  526. break;
  527. case DSI_BACKLIGHT_PWM:
  528. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  529. break;
  530. default:
  531. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  532. rc = -ENOTSUPP;
  533. }
  534. return rc;
  535. }
  536. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  537. {
  538. u32 cur_bl_level;
  539. struct backlight_device *bd = bl->raw_bd;
  540. /* default the brightness level to 50% */
  541. cur_bl_level = bl->bl_max_level >> 1;
  542. switch (bl->type) {
  543. case DSI_BACKLIGHT_WLED:
  544. /* Try to query the backlight level from the backlight device */
  545. if (bd->ops && bd->ops->get_brightness)
  546. cur_bl_level = bd->ops->get_brightness(bd);
  547. break;
  548. case DSI_BACKLIGHT_DCS:
  549. case DSI_BACKLIGHT_EXTERNAL:
  550. case DSI_BACKLIGHT_PWM:
  551. default:
  552. /*
  553. * Ideally, we should read the backlight level from the
  554. * panel. For now, just set it default value.
  555. */
  556. break;
  557. }
  558. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  559. return cur_bl_level;
  560. }
  561. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  562. {
  563. struct dsi_backlight_config *bl = &panel->bl_config;
  564. bl->bl_level = dsi_panel_get_brightness(bl);
  565. }
  566. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  567. {
  568. int rc = 0;
  569. struct dsi_backlight_config *bl = &panel->bl_config;
  570. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0))
  571. bl->pwm_bl = devm_pwm_get(panel->parent, NULL);
  572. #else
  573. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  574. #endif
  575. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  576. rc = PTR_ERR(bl->pwm_bl);
  577. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  578. rc);
  579. return rc;
  580. }
  581. if (panel->pinctrl.pwm_pin) {
  582. rc = pinctrl_select_state(panel->pinctrl.pinctrl,
  583. panel->pinctrl.pwm_pin);
  584. if (rc)
  585. DSI_ERR("[%s] failed to set pwm pinctrl, rc=%d\n",
  586. panel->name, rc);
  587. }
  588. return 0;
  589. }
  590. static int dsi_panel_bl_register(struct dsi_panel *panel)
  591. {
  592. int rc = 0;
  593. struct dsi_backlight_config *bl = &panel->bl_config;
  594. if (panel->host_config.ext_bridge_mode)
  595. return 0;
  596. switch (bl->type) {
  597. case DSI_BACKLIGHT_WLED:
  598. rc = dsi_panel_wled_register(panel, bl);
  599. break;
  600. case DSI_BACKLIGHT_DCS:
  601. break;
  602. case DSI_BACKLIGHT_EXTERNAL:
  603. break;
  604. case DSI_BACKLIGHT_PWM:
  605. rc = dsi_panel_pwm_register(panel);
  606. break;
  607. default:
  608. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  609. rc = -ENOTSUPP;
  610. goto error;
  611. }
  612. error:
  613. return rc;
  614. }
  615. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  616. {
  617. int rc = 0;
  618. struct dsi_backlight_config *bl = &panel->bl_config;
  619. if (panel->host_config.ext_bridge_mode)
  620. return 0;
  621. switch (bl->type) {
  622. case DSI_BACKLIGHT_WLED:
  623. break;
  624. case DSI_BACKLIGHT_DCS:
  625. break;
  626. case DSI_BACKLIGHT_EXTERNAL:
  627. break;
  628. case DSI_BACKLIGHT_PWM:
  629. break;
  630. default:
  631. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  632. rc = -ENOTSUPP;
  633. goto error;
  634. }
  635. error:
  636. return rc;
  637. }
  638. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  639. struct dsi_parser_utils *utils)
  640. {
  641. int rc = 0;
  642. u64 tmp64 = 0;
  643. struct dsi_display_mode *display_mode;
  644. struct dsi_display_mode_priv_info *priv_info;
  645. u32 usecs_fps = 0;
  646. display_mode = container_of(mode, struct dsi_display_mode, timing);
  647. priv_info = display_mode->priv_info;
  648. rc = utils->read_u64(utils->data,
  649. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  650. if (rc == -EOVERFLOW) {
  651. tmp64 = 0;
  652. rc = utils->read_u32(utils->data,
  653. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  654. }
  655. mode->clk_rate_hz = !rc ? tmp64 : 0;
  656. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  657. mode->pclk_scale.numer = 1;
  658. mode->pclk_scale.denom = 1;
  659. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  660. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  661. &mode->mdp_transfer_time_us);
  662. if (rc)
  663. mode->mdp_transfer_time_us = 0;
  664. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us-min",
  665. &priv_info->mdp_transfer_time_us_min);
  666. if (rc)
  667. priv_info->mdp_transfer_time_us_min = 0;
  668. else if (!rc && mode->mdp_transfer_time_us < priv_info->mdp_transfer_time_us_min)
  669. mode->mdp_transfer_time_us = priv_info->mdp_transfer_time_us_min;
  670. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us-max",
  671. &priv_info->mdp_transfer_time_us_max);
  672. if (rc)
  673. priv_info->mdp_transfer_time_us_max = 0;
  674. else if (!rc && mode->mdp_transfer_time_us > priv_info->mdp_transfer_time_us_max)
  675. mode->mdp_transfer_time_us = priv_info->mdp_transfer_time_us_max;
  676. priv_info->disable_rsc_solver = utils->read_bool(utils->data, "qcom,disable-rsc-solver");
  677. rc = utils->read_u32(utils->data,
  678. "qcom,mdss-dsi-panel-framerate",
  679. &mode->refresh_rate);
  680. if (rc) {
  681. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  682. rc);
  683. goto error;
  684. }
  685. usecs_fps = DIV_ROUND_UP((1 * 1000 * 1000), mode->refresh_rate);
  686. if (mode->mdp_transfer_time_us > usecs_fps)
  687. mode->mdp_transfer_time_us = 0;
  688. priv_info->mdp_transfer_time_us = mode->mdp_transfer_time_us;
  689. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  690. &mode->h_active);
  691. if (rc) {
  692. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  693. rc);
  694. goto error;
  695. }
  696. rc = utils->read_u32(utils->data,
  697. "qcom,mdss-dsi-h-front-porch",
  698. &mode->h_front_porch);
  699. if (rc) {
  700. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  701. rc);
  702. goto error;
  703. }
  704. rc = utils->read_u32(utils->data,
  705. "qcom,mdss-dsi-h-back-porch",
  706. &mode->h_back_porch);
  707. if (rc) {
  708. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  709. rc);
  710. goto error;
  711. }
  712. rc = utils->read_u32(utils->data,
  713. "qcom,mdss-dsi-h-pulse-width",
  714. &mode->h_sync_width);
  715. if (rc) {
  716. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  717. rc);
  718. goto error;
  719. }
  720. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  721. &mode->h_skew);
  722. if (rc)
  723. DSI_DEBUG("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  724. rc);
  725. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  726. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  727. mode->h_sync_width);
  728. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  729. &mode->v_active);
  730. if (rc) {
  731. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  732. rc);
  733. goto error;
  734. }
  735. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  736. &mode->v_back_porch);
  737. if (rc) {
  738. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  739. rc);
  740. goto error;
  741. }
  742. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  743. &mode->v_front_porch);
  744. if (rc) {
  745. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  746. rc);
  747. goto error;
  748. }
  749. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  750. &mode->v_sync_width);
  751. if (rc) {
  752. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  753. rc);
  754. goto error;
  755. }
  756. rc = utils->read_u32(utils->data, "qcom,qsync-mode-min-refresh-rate", &mode->qsync_min_fps);
  757. if (rc) {
  758. DSI_DEBUG("qsync min fps not defined in timing node\n");
  759. rc = 0;
  760. }
  761. rc = utils->read_u32(utils->data, "qcom,dsi-qsync-mode-avr-step-fps", &mode->avr_step_fps);
  762. if (rc) {
  763. DSI_DEBUG("avr step fps not defined in timing node\n");
  764. rc = 0;
  765. }
  766. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  767. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  768. mode->v_sync_width);
  769. error:
  770. return rc;
  771. }
  772. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  773. struct dsi_parser_utils *utils,
  774. const char *name)
  775. {
  776. int rc = 0;
  777. u32 bpp = 0;
  778. enum dsi_pixel_format fmt;
  779. const char *packing;
  780. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  781. if (rc) {
  782. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  783. name, rc);
  784. return rc;
  785. }
  786. host->bpp = bpp;
  787. switch (bpp) {
  788. case 3:
  789. fmt = DSI_PIXEL_FORMAT_RGB111;
  790. break;
  791. case 8:
  792. fmt = DSI_PIXEL_FORMAT_RGB332;
  793. break;
  794. case 12:
  795. fmt = DSI_PIXEL_FORMAT_RGB444;
  796. break;
  797. case 16:
  798. fmt = DSI_PIXEL_FORMAT_RGB565;
  799. break;
  800. case 18:
  801. fmt = DSI_PIXEL_FORMAT_RGB666;
  802. break;
  803. case 30:
  804. fmt = DSI_PIXEL_FORMAT_RGB101010;
  805. break;
  806. case 24:
  807. default:
  808. fmt = DSI_PIXEL_FORMAT_RGB888;
  809. break;
  810. }
  811. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  812. packing = utils->get_property(utils->data,
  813. "qcom,mdss-dsi-pixel-packing",
  814. NULL);
  815. if (packing && !strcmp(packing, "loose"))
  816. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  817. }
  818. host->dst_format = fmt;
  819. return rc;
  820. }
  821. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  822. struct dsi_parser_utils *utils,
  823. const char *name)
  824. {
  825. int rc = 0;
  826. bool lane_enabled;
  827. u32 num_of_lanes = 0;
  828. lane_enabled = utils->read_bool(utils->data,
  829. "qcom,mdss-dsi-lane-0-state");
  830. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  831. lane_enabled = utils->read_bool(utils->data,
  832. "qcom,mdss-dsi-lane-1-state");
  833. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  834. lane_enabled = utils->read_bool(utils->data,
  835. "qcom,mdss-dsi-lane-2-state");
  836. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  837. lane_enabled = utils->read_bool(utils->data,
  838. "qcom,mdss-dsi-lane-3-state");
  839. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  840. if (host->data_lanes & DSI_DATA_LANE_0)
  841. num_of_lanes++;
  842. if (host->data_lanes & DSI_DATA_LANE_1)
  843. num_of_lanes++;
  844. if (host->data_lanes & DSI_DATA_LANE_2)
  845. num_of_lanes++;
  846. if (host->data_lanes & DSI_DATA_LANE_3)
  847. num_of_lanes++;
  848. host->num_data_lanes = num_of_lanes;
  849. if (host->data_lanes == 0) {
  850. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  851. rc = -EINVAL;
  852. }
  853. return rc;
  854. }
  855. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  856. struct dsi_parser_utils *utils,
  857. const char *name)
  858. {
  859. int rc = 0;
  860. const char *swap_mode;
  861. swap_mode = utils->get_property(utils->data,
  862. "qcom,mdss-dsi-color-order", NULL);
  863. if (swap_mode) {
  864. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  865. host->swap_mode = DSI_COLOR_SWAP_RGB;
  866. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  867. host->swap_mode = DSI_COLOR_SWAP_RBG;
  868. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  869. host->swap_mode = DSI_COLOR_SWAP_BRG;
  870. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  871. host->swap_mode = DSI_COLOR_SWAP_GRB;
  872. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  873. host->swap_mode = DSI_COLOR_SWAP_GBR;
  874. } else {
  875. DSI_ERR("[%s] Unrecognized color order-%s\n",
  876. name, swap_mode);
  877. rc = -EINVAL;
  878. }
  879. } else {
  880. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  881. host->swap_mode = DSI_COLOR_SWAP_RGB;
  882. }
  883. /* bit swap on color channel is not defined in dt */
  884. host->bit_swap_red = false;
  885. host->bit_swap_green = false;
  886. host->bit_swap_blue = false;
  887. return rc;
  888. }
  889. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  890. struct dsi_parser_utils *utils,
  891. const char *name)
  892. {
  893. const char *trig;
  894. int rc = 0;
  895. trig = utils->get_property(utils->data,
  896. "qcom,mdss-dsi-mdp-trigger", NULL);
  897. if (trig) {
  898. if (!strcmp(trig, "none")) {
  899. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  900. } else if (!strcmp(trig, "trigger_te")) {
  901. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  902. } else if (!strcmp(trig, "trigger_sw")) {
  903. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  904. } else if (!strcmp(trig, "trigger_sw_te")) {
  905. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  906. } else {
  907. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  908. name, trig);
  909. rc = -EINVAL;
  910. }
  911. } else {
  912. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  913. name);
  914. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  915. }
  916. trig = utils->get_property(utils->data,
  917. "qcom,mdss-dsi-dma-trigger", NULL);
  918. if (trig) {
  919. if (!strcmp(trig, "none")) {
  920. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  921. } else if (!strcmp(trig, "trigger_te")) {
  922. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  923. } else if (!strcmp(trig, "trigger_sw")) {
  924. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  925. } else if (!strcmp(trig, "trigger_sw_seof")) {
  926. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  927. } else if (!strcmp(trig, "trigger_sw_te")) {
  928. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  929. } else {
  930. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  931. name, trig);
  932. rc = -EINVAL;
  933. }
  934. } else {
  935. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  936. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  937. }
  938. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  939. &host->te_mode);
  940. if (rc) {
  941. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  942. host->te_mode = 1;
  943. rc = 0;
  944. }
  945. return rc;
  946. }
  947. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  948. struct dsi_parser_utils *utils,
  949. const char *name)
  950. {
  951. u32 val = 0, line_no = 0, window = 0;
  952. int rc = 0;
  953. bool panel_cphy_mode = false;
  954. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  955. if (!rc) {
  956. host->t_clk_post = val;
  957. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  958. }
  959. val = 0;
  960. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  961. if (!rc) {
  962. host->t_clk_pre = val;
  963. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  964. }
  965. host->ignore_rx_eot = utils->read_bool(utils->data,
  966. "qcom,mdss-dsi-rx-eot-ignore");
  967. host->append_tx_eot = utils->read_bool(utils->data,
  968. "qcom,mdss-dsi-tx-eot-append");
  969. host->ext_bridge_mode = utils->read_bool(utils->data,
  970. "qcom,mdss-dsi-ext-bridge-mode");
  971. host->force_hs_clk_lane = utils->read_bool(utils->data,
  972. "qcom,mdss-dsi-force-clock-lane-hs");
  973. panel_cphy_mode = utils->read_bool(utils->data,
  974. "qcom,panel-cphy-mode");
  975. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  976. : DSI_PHY_TYPE_DPHY;
  977. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  978. &line_no);
  979. if (rc)
  980. host->dma_sched_line = 0;
  981. else
  982. host->dma_sched_line = line_no;
  983. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-window",
  984. &window);
  985. if (rc)
  986. host->dma_sched_window = 0;
  987. else
  988. host->dma_sched_window = window;
  989. rc = utils->read_u32(utils->data, "qcom,vert-padding-value", &host->vpadding);
  990. host->line_insertion_enable = (rc || host->vpadding <= 0) ? false : true;
  991. DSI_DEBUG("[%s] DMA scheduling parameters Line: %d Window: %d\n", name,
  992. host->dma_sched_line, host->dma_sched_window);
  993. return 0;
  994. }
  995. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  996. struct dsi_parser_utils *utils,
  997. const char *name)
  998. {
  999. int rc = 0;
  1000. u32 val = 0;
  1001. bool supported = false;
  1002. struct dsi_split_link_config *split_link = &host->split_link;
  1003. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  1004. if (!supported) {
  1005. DSI_DEBUG("[%s] Split link is not supported\n", name);
  1006. split_link->enabled = false;
  1007. return;
  1008. }
  1009. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  1010. if (rc || val < 1) {
  1011. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  1012. split_link->num_sublinks = 2;
  1013. } else {
  1014. split_link->num_sublinks = val;
  1015. }
  1016. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  1017. if (rc || val < 1) {
  1018. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  1019. split_link->lanes_per_sublink = 2;
  1020. } else {
  1021. split_link->lanes_per_sublink = val;
  1022. }
  1023. supported = utils->read_bool(utils->data, "qcom,split-link-sublink-swap");
  1024. if (!supported)
  1025. split_link->sublink_swap = false;
  1026. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  1027. split_link->num_sublinks, split_link->lanes_per_sublink);
  1028. split_link->enabled = true;
  1029. }
  1030. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  1031. {
  1032. int rc = 0;
  1033. struct dsi_parser_utils *utils = &panel->utils;
  1034. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  1035. panel->name);
  1036. if (rc) {
  1037. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  1038. panel->name, rc);
  1039. goto error;
  1040. }
  1041. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  1042. panel->name);
  1043. if (rc) {
  1044. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  1045. panel->name, rc);
  1046. goto error;
  1047. }
  1048. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  1049. panel->name);
  1050. if (rc) {
  1051. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  1052. panel->name, rc);
  1053. goto error;
  1054. }
  1055. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  1056. panel->name);
  1057. if (rc) {
  1058. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  1059. panel->name, rc);
  1060. goto error;
  1061. }
  1062. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1063. panel->name);
  1064. if (rc) {
  1065. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  1066. panel->name, rc);
  1067. goto error;
  1068. }
  1069. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1070. panel->name);
  1071. error:
  1072. return rc;
  1073. }
  1074. static int dsi_panel_parse_avr_caps(struct dsi_panel *panel,
  1075. struct device_node *of_node)
  1076. {
  1077. struct dsi_avr_capabilities *avr_caps = &panel->avr_caps;
  1078. struct dsi_parser_utils *utils = &panel->utils;
  1079. int val, rc = 0;
  1080. rc = of_property_read_u32(of_node, "qcom,dsi-qsync-avr-step-fps", &val);
  1081. if (rc)
  1082. DSI_DEBUG("[%s] avr step fps not defined rc:%d\n", panel->name, rc);
  1083. avr_caps->avr_step_fps = rc ? 0 : val;
  1084. val = utils->count_u32_elems(utils->data, "qcom,dsi-qsync-avr-step-list");
  1085. if (val <= 0) {
  1086. DSI_DEBUG("[%s] optional avr step list not defined, val:%d\n", panel->name, val);
  1087. return 0;
  1088. } else if (val > 1 && val != panel->dfps_caps.dfps_list_len) {
  1089. DSI_ERR("[%s] avr step list size %d not same as dfps list %d\n",
  1090. panel->name, val, panel->dfps_caps.dfps_list_len);
  1091. return -EINVAL;
  1092. } else if ((val > 0) && (avr_caps->avr_step_fps)) {
  1093. DSI_ERR("[%s] both modes of avr-steps are defined\n", panel->name);
  1094. return -EINVAL;
  1095. }
  1096. avr_caps->avr_step_fps_list = kcalloc(val, sizeof(u32), GFP_KERNEL);
  1097. if (!avr_caps->avr_step_fps_list)
  1098. return -ENOMEM;
  1099. rc = utils->read_u32_array(utils->data, "qcom,dsi-qsync-avr-step-list",
  1100. avr_caps->avr_step_fps_list, val);
  1101. if (rc) {
  1102. kfree(avr_caps->avr_step_fps_list);
  1103. return rc;
  1104. }
  1105. avr_caps->avr_step_fps_list_len = val;
  1106. return rc;
  1107. }
  1108. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1109. struct device_node *of_node)
  1110. {
  1111. int rc = 0;
  1112. u32 val = 0, i;
  1113. struct dsi_qsync_capabilities *qsync_caps = &panel->qsync_caps;
  1114. struct dsi_parser_utils *utils = &panel->utils;
  1115. const char *name = panel->name;
  1116. qsync_caps->qsync_support = utils->read_bool(utils->data, "qcom,qsync-enable");
  1117. if (!qsync_caps->qsync_support) {
  1118. DSI_DEBUG("qsync feature not enabled\n");
  1119. goto error;
  1120. }
  1121. /**
  1122. * "mdss-dsi-qsync-min-refresh-rate" is defined in cmd mode and
  1123. * video mode when there is only one qsync min fps present.
  1124. */
  1125. rc = of_property_read_u32(of_node,
  1126. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1127. &val);
  1128. if (rc)
  1129. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1130. panel->name, rc);
  1131. qsync_caps->qsync_min_fps = val;
  1132. /**
  1133. * "dsi-supported-qsync-min-fps-list" may be defined in video
  1134. * mode, only in dfps case when "qcom,dsi-supported-dfps-list"
  1135. * is defined.
  1136. */
  1137. qsync_caps->qsync_min_fps_list_len = utils->count_u32_elems(utils->data,
  1138. "qcom,dsi-supported-qsync-min-fps-list");
  1139. if (qsync_caps->qsync_min_fps_list_len < 1) {
  1140. qsync_caps->qsync_min_fps_list_len = 0;
  1141. goto qsync_support;
  1142. }
  1143. /**
  1144. * qcom,dsi-supported-qsync-min-fps-list cannot be defined
  1145. * along with qcom,mdss-dsi-qsync-min-refresh-rate.
  1146. */
  1147. if (qsync_caps->qsync_min_fps_list_len >= 1 &&
  1148. qsync_caps->qsync_min_fps) {
  1149. DSI_ERR("[%s] Both qsync nodes are defined\n",
  1150. name);
  1151. rc = -EINVAL;
  1152. goto error;
  1153. }
  1154. if (panel->dfps_caps.dfps_list_len !=
  1155. qsync_caps->qsync_min_fps_list_len) {
  1156. DSI_ERR("[%s] Qsync min fps list mismatch with dfps\n", name);
  1157. rc = -EINVAL;
  1158. goto error;
  1159. }
  1160. qsync_caps->qsync_min_fps_list =
  1161. kcalloc(qsync_caps->qsync_min_fps_list_len, sizeof(u32),
  1162. GFP_KERNEL);
  1163. if (!qsync_caps->qsync_min_fps_list) {
  1164. rc = -ENOMEM;
  1165. goto error;
  1166. }
  1167. rc = utils->read_u32_array(utils->data,
  1168. "qcom,dsi-supported-qsync-min-fps-list",
  1169. qsync_caps->qsync_min_fps_list,
  1170. qsync_caps->qsync_min_fps_list_len);
  1171. if (rc) {
  1172. DSI_ERR("[%s] Qsync min fps list parse failed\n", name);
  1173. rc = -EINVAL;
  1174. goto error;
  1175. }
  1176. qsync_caps->qsync_min_fps = qsync_caps->qsync_min_fps_list[0];
  1177. for (i = 1; i < qsync_caps->qsync_min_fps_list_len; i++) {
  1178. if (qsync_caps->qsync_min_fps_list[i] <
  1179. qsync_caps->qsync_min_fps)
  1180. qsync_caps->qsync_min_fps =
  1181. qsync_caps->qsync_min_fps_list[i];
  1182. }
  1183. qsync_support:
  1184. /* allow qsync support only if DFPS is with VFP approach */
  1185. if ((panel->dfps_caps.dfps_support) &&
  1186. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP)) {
  1187. qsync_caps->qsync_support = false;
  1188. qsync_caps->qsync_min_fps = 0;
  1189. }
  1190. error:
  1191. if (rc < 0) {
  1192. qsync_caps->qsync_min_fps = 0;
  1193. qsync_caps->qsync_min_fps_list_len = 0;
  1194. }
  1195. return rc;
  1196. }
  1197. static int dsi_panel_parse_dyn_clk_list(struct dsi_display_mode *mode,
  1198. struct dsi_parser_utils *utils)
  1199. {
  1200. int i, rc = 0;
  1201. struct msm_dyn_clk_list *bit_clk_list;
  1202. if (!mode || !mode->priv_info) {
  1203. DSI_ERR("invalid arguments\n");
  1204. return -EINVAL;
  1205. }
  1206. bit_clk_list = &mode->priv_info->bit_clk_list;
  1207. bit_clk_list->count = utils->count_u32_elems(utils->data, "qcom,dsi-dyn-clk-list");
  1208. if (bit_clk_list->count < 1 || bit_clk_list->count > 100) {
  1209. DSI_ERR("invalid number of bit clock values, must be between 1 and 100\n");
  1210. return -EINVAL;
  1211. }
  1212. bit_clk_list->rates = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1213. if (!bit_clk_list->rates) {
  1214. DSI_ERR("failed to allocate space for bit clock list\n");
  1215. rc = -ENOMEM;
  1216. goto error;
  1217. }
  1218. bit_clk_list->front_porches = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1219. if (!bit_clk_list->front_porches) {
  1220. DSI_ERR("failed to allocate space for front porch list\n");
  1221. rc = -ENOMEM;
  1222. goto error;
  1223. }
  1224. bit_clk_list->pixel_clks_khz = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1225. if (!bit_clk_list->pixel_clks_khz) {
  1226. DSI_ERR("failed to allocate space for pclk list\n");
  1227. rc = -ENOMEM;
  1228. goto error;
  1229. }
  1230. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1231. bit_clk_list->rates, bit_clk_list->count);
  1232. if (rc) {
  1233. DSI_ERR("failed to parse supported bit clk list values, rc=%d\n", rc);
  1234. goto error;
  1235. }
  1236. for (i = 0; i < bit_clk_list->count; i++)
  1237. DSI_DEBUG("bit clk rate[%d]:%d\n", i, bit_clk_list->rates[i]);
  1238. return 0;
  1239. error:
  1240. bit_clk_list->count = 0;
  1241. kfree(bit_clk_list->rates);
  1242. kfree(bit_clk_list->front_porches);
  1243. kfree(bit_clk_list->pixel_clks_khz);
  1244. return rc;
  1245. }
  1246. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1247. {
  1248. int rc = 0;
  1249. bool supported = false;
  1250. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1251. struct dsi_parser_utils *utils = &panel->utils;
  1252. const char *type;
  1253. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1254. if (!supported) {
  1255. dyn_clk_caps->dyn_clk_support = false;
  1256. return rc;
  1257. }
  1258. dyn_clk_caps->dyn_clk_support = true;
  1259. type = utils->get_property(utils->data,
  1260. "qcom,dsi-dyn-clk-type", NULL);
  1261. if (!type) {
  1262. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1263. dyn_clk_caps->maintain_const_fps = false;
  1264. return 0;
  1265. }
  1266. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1267. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1268. dyn_clk_caps->maintain_const_fps = true;
  1269. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1270. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1271. dyn_clk_caps->maintain_const_fps = true;
  1272. } else {
  1273. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1274. dyn_clk_caps->maintain_const_fps = false;
  1275. }
  1276. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1277. return 0;
  1278. }
  1279. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1280. {
  1281. int rc = 0;
  1282. bool supported = false;
  1283. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1284. struct dsi_parser_utils *utils = &panel->utils;
  1285. const char *name = panel->name;
  1286. const char *type;
  1287. u32 i;
  1288. supported = utils->read_bool(utils->data,
  1289. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1290. if (!supported) {
  1291. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1292. dfps_caps->dfps_support = false;
  1293. return rc;
  1294. }
  1295. type = utils->get_property(utils->data,
  1296. "qcom,mdss-dsi-pan-fps-update", NULL);
  1297. if (!type) {
  1298. DSI_ERR("[%s] dfps type not defined\n", name);
  1299. rc = -EINVAL;
  1300. goto error;
  1301. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1302. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1303. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1304. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1305. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1306. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1307. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1308. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1309. } else {
  1310. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1311. rc = -EINVAL;
  1312. goto error;
  1313. }
  1314. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1315. "qcom,dsi-supported-dfps-list");
  1316. if (dfps_caps->dfps_list_len < 1) {
  1317. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1318. rc = -EINVAL;
  1319. goto error;
  1320. }
  1321. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1322. GFP_KERNEL);
  1323. if (!dfps_caps->dfps_list) {
  1324. rc = -ENOMEM;
  1325. goto error;
  1326. }
  1327. rc = utils->read_u32_array(utils->data,
  1328. "qcom,dsi-supported-dfps-list",
  1329. dfps_caps->dfps_list,
  1330. dfps_caps->dfps_list_len);
  1331. if (rc) {
  1332. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1333. rc = -EINVAL;
  1334. goto error;
  1335. }
  1336. dfps_caps->dfps_support = true;
  1337. /* calculate max and min fps */
  1338. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1339. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1340. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1341. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1342. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1343. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1344. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1345. }
  1346. error:
  1347. return rc;
  1348. }
  1349. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1350. struct dsi_parser_utils *utils,
  1351. const char *name)
  1352. {
  1353. int rc = 0;
  1354. const char *traffic_mode;
  1355. u32 vc_id = 0;
  1356. u32 val = 0;
  1357. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1358. if (rc) {
  1359. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1360. cfg->pulse_mode_hsa_he = false;
  1361. } else if (val == 1) {
  1362. cfg->pulse_mode_hsa_he = true;
  1363. } else if (val == 0) {
  1364. cfg->pulse_mode_hsa_he = false;
  1365. } else {
  1366. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1367. name);
  1368. rc = -EINVAL;
  1369. goto error;
  1370. }
  1371. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1372. "qcom,mdss-dsi-hfp-power-mode");
  1373. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1374. "qcom,mdss-dsi-hbp-power-mode");
  1375. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1376. "qcom,mdss-dsi-hsa-power-mode");
  1377. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1378. "qcom,mdss-dsi-last-line-interleave");
  1379. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1380. "qcom,mdss-dsi-bllp-eof-power-mode");
  1381. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1382. "qcom,mdss-dsi-bllp-power-mode");
  1383. traffic_mode = utils->get_property(utils->data,
  1384. "qcom,mdss-dsi-traffic-mode",
  1385. NULL);
  1386. if (!traffic_mode) {
  1387. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1388. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1389. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1390. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1391. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1392. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1393. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1394. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1395. } else {
  1396. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1397. traffic_mode);
  1398. rc = -EINVAL;
  1399. goto error;
  1400. }
  1401. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1402. &vc_id);
  1403. if (rc) {
  1404. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1405. cfg->vc_id = 0;
  1406. } else {
  1407. cfg->vc_id = vc_id;
  1408. }
  1409. error:
  1410. return rc;
  1411. }
  1412. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1413. struct dsi_parser_utils *utils,
  1414. const char *name)
  1415. {
  1416. u32 val = 0;
  1417. int rc = 0;
  1418. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1419. if (rc) {
  1420. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1421. cfg->wr_mem_start = 0x2C;
  1422. } else {
  1423. cfg->wr_mem_start = val;
  1424. }
  1425. val = 0;
  1426. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1427. &val);
  1428. if (rc) {
  1429. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1430. cfg->wr_mem_continue = 0x3C;
  1431. } else {
  1432. cfg->wr_mem_continue = val;
  1433. }
  1434. /* TODO: fix following */
  1435. cfg->max_cmd_packets_interleave = 0;
  1436. val = 0;
  1437. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1438. &val);
  1439. if (rc) {
  1440. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1441. cfg->insert_dcs_command = true;
  1442. } else if (val == 1) {
  1443. cfg->insert_dcs_command = true;
  1444. } else if (val == 0) {
  1445. cfg->insert_dcs_command = false;
  1446. } else {
  1447. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1448. name);
  1449. rc = -EINVAL;
  1450. goto error;
  1451. }
  1452. cfg->mdp_idle_ctrl_en =
  1453. utils->read_bool(utils->data, "qcom,mdss-dsi-mdp-idle-ctrl-en");
  1454. if (cfg->mdp_idle_ctrl_en) {
  1455. val = 0;
  1456. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-mdp-idle-ctrl-len", &val);
  1457. if (rc) {
  1458. DSI_DEBUG("[%s] mdp idle ctrl len is not defined\n", name);
  1459. cfg->mdp_idle_ctrl_len = 0;
  1460. cfg->mdp_idle_ctrl_en = false;
  1461. rc = 0;
  1462. } else {
  1463. cfg->mdp_idle_ctrl_len = val;
  1464. }
  1465. }
  1466. error:
  1467. return rc;
  1468. }
  1469. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1470. {
  1471. int rc = 0;
  1472. struct dsi_parser_utils *utils = &panel->utils;
  1473. bool panel_mode_switch_enabled;
  1474. enum dsi_op_mode panel_mode;
  1475. const char *mode;
  1476. mode = utils->get_property(utils->data,
  1477. "qcom,mdss-dsi-panel-type", NULL);
  1478. if (!mode) {
  1479. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1480. panel_mode = DSI_OP_VIDEO_MODE;
  1481. } else if (!strcmp(mode, "dsi_video_mode")) {
  1482. panel_mode = DSI_OP_VIDEO_MODE;
  1483. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1484. panel_mode = DSI_OP_CMD_MODE;
  1485. } else {
  1486. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1487. rc = -EINVAL;
  1488. goto error;
  1489. }
  1490. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1491. "qcom,mdss-dsi-panel-mode-switch");
  1492. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1493. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1494. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1495. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1496. utils,
  1497. panel->name);
  1498. if (rc) {
  1499. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1500. panel->name, rc);
  1501. goto error;
  1502. }
  1503. }
  1504. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1505. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1506. utils,
  1507. panel->name);
  1508. if (rc) {
  1509. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1510. panel->name, rc);
  1511. goto error;
  1512. }
  1513. }
  1514. panel->poms_align_vsync = utils->read_bool(utils->data,
  1515. "qcom,poms-align-panel-vsync");
  1516. panel->panel_mode = panel_mode;
  1517. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1518. panel->panel_ack_disabled = utils->read_bool(utils->data,
  1519. "qcom,panel-ack-disabled");
  1520. error:
  1521. return rc;
  1522. }
  1523. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1524. {
  1525. int rc = 0;
  1526. u32 val = 0;
  1527. const char *str;
  1528. struct dsi_panel_phy_props *props = &panel->phy_props;
  1529. struct dsi_parser_utils *utils = &panel->utils;
  1530. const char *name = panel->name;
  1531. rc = utils->read_u32(utils->data,
  1532. "qcom,mdss-pan-physical-width-dimension", &val);
  1533. if (rc) {
  1534. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1535. props->panel_width_mm = 0;
  1536. rc = 0;
  1537. } else {
  1538. props->panel_width_mm = val;
  1539. }
  1540. rc = utils->read_u32(utils->data,
  1541. "qcom,mdss-pan-physical-height-dimension",
  1542. &val);
  1543. if (rc) {
  1544. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1545. props->panel_height_mm = 0;
  1546. rc = 0;
  1547. } else {
  1548. props->panel_height_mm = val;
  1549. }
  1550. str = utils->get_property(utils->data,
  1551. "qcom,mdss-dsi-panel-orientation", NULL);
  1552. if (!str) {
  1553. props->rotation = DSI_PANEL_ROTATE_NONE;
  1554. } else if (!strcmp(str, "180")) {
  1555. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1556. } else if (!strcmp(str, "hflip")) {
  1557. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1558. } else if (!strcmp(str, "vflip")) {
  1559. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1560. } else {
  1561. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1562. rc = -EINVAL;
  1563. goto error;
  1564. }
  1565. error:
  1566. return rc;
  1567. }
  1568. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1569. "qcom,mdss-dsi-pre-on-command",
  1570. "qcom,mdss-dsi-on-command",
  1571. "qcom,vid-on-commands",
  1572. "qcom,cmd-on-commands",
  1573. "qcom,mdss-dsi-post-panel-on-command",
  1574. "qcom,mdss-dsi-pre-off-command",
  1575. "qcom,mdss-dsi-off-command",
  1576. "qcom,mdss-dsi-post-off-command",
  1577. "qcom,mdss-dsi-pre-res-switch",
  1578. "qcom,mdss-dsi-res-switch",
  1579. "qcom,mdss-dsi-post-res-switch",
  1580. "qcom,video-mode-switch-in-commands",
  1581. "qcom,video-mode-switch-out-commands",
  1582. "qcom,cmd-mode-switch-in-commands",
  1583. "qcom,cmd-mode-switch-out-commands",
  1584. "qcom,mdss-dsi-panel-status-command",
  1585. "qcom,mdss-dsi-lp1-command",
  1586. "qcom,mdss-dsi-lp2-command",
  1587. "qcom,mdss-dsi-nolp-command",
  1588. "PPS not parsed from DTSI, generated dynamically",
  1589. "ROI not parsed from DTSI, generated dynamically",
  1590. "qcom,mdss-dsi-timing-switch-command",
  1591. "qcom,mdss-dsi-post-mode-switch-on-command",
  1592. "qcom,mdss-dsi-qsync-on-commands",
  1593. "qcom,mdss-dsi-qsync-off-commands",
  1594. };
  1595. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1596. "qcom,mdss-dsi-pre-on-command-state",
  1597. "qcom,mdss-dsi-on-command-state",
  1598. "qcom,vid-on-commands-state",
  1599. "qcom,cmd-on-commands-state",
  1600. "qcom,mdss-dsi-post-on-command-state",
  1601. "qcom,mdss-dsi-pre-off-command-state",
  1602. "qcom,mdss-dsi-off-command-state",
  1603. "qcom,mdss-dsi-post-off-command-state",
  1604. "qcom,mdss-dsi-pre-res-switch-state",
  1605. "qcom,mdss-dsi-res-switch-state",
  1606. "qcom,mdss-dsi-post-res-switch-state",
  1607. "qcom,video-mode-switch-in-commands-state",
  1608. "qcom,video-mode-switch-out-commands-state",
  1609. "qcom,cmd-mode-switch-in-commands-state",
  1610. "qcom,cmd-mode-switch-out-commands-state",
  1611. "qcom,mdss-dsi-panel-status-command-state",
  1612. "qcom,mdss-dsi-lp1-command-state",
  1613. "qcom,mdss-dsi-lp2-command-state",
  1614. "qcom,mdss-dsi-nolp-command-state",
  1615. "PPS not parsed from DTSI, generated dynamically",
  1616. "ROI not parsed from DTSI, generated dynamically",
  1617. "qcom,mdss-dsi-timing-switch-command-state",
  1618. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1619. "qcom,mdss-dsi-qsync-on-commands-state",
  1620. "qcom,mdss-dsi-qsync-off-commands-state",
  1621. };
  1622. int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1623. {
  1624. const u32 cmd_set_min_size = 7;
  1625. u32 count = 0;
  1626. u32 packet_length;
  1627. u32 tmp;
  1628. while (length >= cmd_set_min_size) {
  1629. packet_length = cmd_set_min_size;
  1630. tmp = ((data[5] << 8) | (data[6]));
  1631. packet_length += tmp;
  1632. if (packet_length > length) {
  1633. DSI_ERR("format error\n");
  1634. return -EINVAL;
  1635. }
  1636. length -= packet_length;
  1637. data += packet_length;
  1638. count++;
  1639. }
  1640. *cnt = count;
  1641. return 0;
  1642. }
  1643. int dsi_panel_create_cmd_packets(const char *data,
  1644. u32 length,
  1645. u32 count,
  1646. struct dsi_cmd_desc *cmd)
  1647. {
  1648. int rc = 0;
  1649. int i, j;
  1650. u8 *payload;
  1651. for (i = 0; i < count; i++) {
  1652. u32 size;
  1653. cmd[i].msg.type = data[0];
  1654. cmd[i].msg.channel = data[2];
  1655. cmd[i].msg.flags |= data[3];
  1656. cmd[i].ctrl = 0;
  1657. cmd[i].post_wait_ms = data[4];
  1658. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1659. if (cmd[i].msg.flags & MIPI_DSI_MSG_BATCH_COMMAND)
  1660. cmd[i].last_command = false;
  1661. else
  1662. cmd[i].last_command = true;
  1663. size = cmd[i].msg.tx_len * sizeof(u8);
  1664. payload = kzalloc(size, GFP_KERNEL);
  1665. if (!payload) {
  1666. rc = -ENOMEM;
  1667. goto error_free_payloads;
  1668. }
  1669. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1670. payload[j] = data[7 + j];
  1671. cmd[i].msg.tx_buf = payload;
  1672. data += (7 + cmd[i].msg.tx_len);
  1673. }
  1674. return rc;
  1675. error_free_payloads:
  1676. for (i = i - 1; i >= 0; i--) {
  1677. cmd--;
  1678. kfree(cmd->msg.tx_buf);
  1679. }
  1680. return rc;
  1681. }
  1682. void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1683. {
  1684. u32 i = 0;
  1685. struct dsi_cmd_desc *cmd;
  1686. for (i = 0; i < set->count; i++) {
  1687. cmd = &set->cmds[i];
  1688. kfree(cmd->msg.tx_buf);
  1689. }
  1690. }
  1691. void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1692. {
  1693. kfree(set->cmds);
  1694. }
  1695. int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1696. u32 packet_count)
  1697. {
  1698. u32 size;
  1699. size = packet_count * sizeof(*cmd->cmds);
  1700. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1701. if (!cmd->cmds)
  1702. return -ENOMEM;
  1703. cmd->count = packet_count;
  1704. return 0;
  1705. }
  1706. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1707. enum dsi_cmd_set_type type,
  1708. struct dsi_parser_utils *utils)
  1709. {
  1710. int rc = 0;
  1711. u32 length = 0;
  1712. const char *data;
  1713. const char *state;
  1714. u32 packet_count = 0;
  1715. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1716. &length);
  1717. if (!data) {
  1718. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1719. rc = -ENOTSUPP;
  1720. goto error;
  1721. }
  1722. DSI_DEBUG("type=%d, name=%s, length=%d\n", type, cmd_set_prop_map[type], length);
  1723. print_hex_dump_debug("", DUMP_PREFIX_NONE, 8, 1, data, length, false);
  1724. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1725. if (rc) {
  1726. DSI_ERR("commands failed, rc=%d\n", rc);
  1727. goto error;
  1728. }
  1729. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1730. packet_count, length);
  1731. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1732. if (rc) {
  1733. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1734. goto error;
  1735. }
  1736. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1737. cmd->cmds);
  1738. if (rc) {
  1739. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1740. goto error_free_mem;
  1741. }
  1742. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1743. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1744. cmd->state = DSI_CMD_SET_STATE_LP;
  1745. } else if (!strcmp(state, "dsi_hs_mode")) {
  1746. cmd->state = DSI_CMD_SET_STATE_HS;
  1747. } else {
  1748. DSI_ERR("[%s] command state unrecognized-%s\n",
  1749. cmd_set_state_map[type], state);
  1750. goto error_free_mem;
  1751. }
  1752. return rc;
  1753. error_free_mem:
  1754. kfree(cmd->cmds);
  1755. cmd->cmds = NULL;
  1756. error:
  1757. return rc;
  1758. }
  1759. static int dsi_panel_parse_cmd_sets(
  1760. struct dsi_display_mode_priv_info *priv_info,
  1761. struct dsi_parser_utils *utils)
  1762. {
  1763. int rc = 0;
  1764. struct dsi_panel_cmd_set *set;
  1765. u32 i;
  1766. if (!priv_info) {
  1767. DSI_ERR("invalid mode priv info\n");
  1768. return -EINVAL;
  1769. }
  1770. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1771. set = &priv_info->cmd_sets[i];
  1772. set->type = i;
  1773. set->count = 0;
  1774. if (i == DSI_CMD_SET_PPS) {
  1775. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1776. if (rc)
  1777. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1778. i, rc);
  1779. set->state = DSI_CMD_SET_STATE_LP;
  1780. } else {
  1781. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1782. if (rc)
  1783. DSI_DEBUG("failed to parse set %d\n", i);
  1784. }
  1785. }
  1786. rc = 0;
  1787. return rc;
  1788. }
  1789. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1790. {
  1791. int rc = 0;
  1792. int i;
  1793. u32 length = 0;
  1794. u32 count = 0;
  1795. u32 size = 0;
  1796. u32 *arr_32 = NULL;
  1797. const u32 *arr;
  1798. struct dsi_parser_utils *utils = &panel->utils;
  1799. struct dsi_reset_seq *seq;
  1800. if (panel->host_config.ext_bridge_mode)
  1801. return 0;
  1802. arr = utils->get_property(utils->data,
  1803. "qcom,mdss-dsi-reset-sequence", &length);
  1804. if (!arr) {
  1805. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1806. rc = -EINVAL;
  1807. goto error;
  1808. }
  1809. if (length & 0x1) {
  1810. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1811. panel->name);
  1812. rc = -EINVAL;
  1813. goto error;
  1814. }
  1815. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1816. length = length / sizeof(u32);
  1817. size = length * sizeof(u32);
  1818. arr_32 = kzalloc(size, GFP_KERNEL);
  1819. if (!arr_32) {
  1820. rc = -ENOMEM;
  1821. goto error;
  1822. }
  1823. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1824. arr_32, length);
  1825. if (rc) {
  1826. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1827. goto error_free_arr_32;
  1828. }
  1829. count = length / 2;
  1830. size = count * sizeof(*seq);
  1831. seq = kzalloc(size, GFP_KERNEL);
  1832. if (!seq) {
  1833. rc = -ENOMEM;
  1834. goto error_free_arr_32;
  1835. }
  1836. panel->reset_config.sequence = seq;
  1837. panel->reset_config.count = count;
  1838. for (i = 0; i < length; i += 2) {
  1839. seq->level = arr_32[i];
  1840. seq->sleep_ms = arr_32[i + 1];
  1841. seq++;
  1842. }
  1843. error_free_arr_32:
  1844. kfree(arr_32);
  1845. error:
  1846. return rc;
  1847. }
  1848. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1849. {
  1850. struct dsi_parser_utils *utils = &panel->utils;
  1851. const char *string;
  1852. int i, rc = 0;
  1853. panel->ulps_feature_enabled =
  1854. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1855. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1856. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1857. panel->ulps_suspend_enabled =
  1858. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1859. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1860. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1861. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1862. "qcom,mdss-dsi-te-using-wd");
  1863. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1864. "qcom,cmd-sync-wait-broadcast");
  1865. panel->lp11_init = utils->read_bool(utils->data,
  1866. "qcom,mdss-dsi-lp11-init");
  1867. panel->reset_gpio_always_on = utils->read_bool(utils->data,
  1868. "qcom,platform-reset-gpio-always-on");
  1869. panel->spr_info.enable = false;
  1870. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1871. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1872. if (!rc) {
  1873. // find match for pack-type string
  1874. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1875. if (msm_spr_pack_type_str[i] &&
  1876. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1877. panel->spr_info.enable = true;
  1878. panel->spr_info.pack_type = i;
  1879. break;
  1880. }
  1881. }
  1882. }
  1883. pr_debug("%s source side spr packing, pack-type %s\n",
  1884. panel->spr_info.enable ? "enable" : "disable",
  1885. panel->spr_info.enable ?
  1886. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1887. return 0;
  1888. }
  1889. static int dsi_panel_parse_wd_jitter_config(struct dsi_display_mode_priv_info *priv_info,
  1890. struct dsi_parser_utils *utils, u32 *jitter)
  1891. {
  1892. int rc = 0;
  1893. struct msm_display_wd_jitter_config *wd_jitter = &priv_info->wd_jitter;
  1894. u32 ltj[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 1};
  1895. u32 ltj_time = 0;
  1896. const u32 max_ltj = 10;
  1897. if (!(utils->read_bool(utils->data, "qcom,dsi-wd-jitter-enable"))) {
  1898. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1899. priv_info->panel_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  1900. return 0;
  1901. }
  1902. rc = utils->read_u32_array(utils->data, "qcom,dsi-wd-ltj-max-jitter", ltj,
  1903. DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1904. rc |= utils->read_u32(utils->data, "qcom,dsi-wd-ltj-time-sec", &ltj_time);
  1905. if (rc || !ltj[1] || !ltj_time || (ltj[0] / ltj[1] >= max_ltj)) {
  1906. DSI_DEBUG("No valid long term jitter defined\n");
  1907. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1908. priv_info->panel_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  1909. rc = -EINVAL;
  1910. } else {
  1911. wd_jitter->ltj_max_numer = ltj[0];
  1912. wd_jitter->ltj_max_denom = ltj[1];
  1913. wd_jitter->ltj_time_sec = ltj_time;
  1914. wd_jitter->jitter_type = MSM_DISPLAY_WD_LTJ_JITTER;
  1915. }
  1916. if (jitter[0] && jitter[1]) {
  1917. if (jitter[0] / jitter[1] > MAX_PANEL_JITTER) {
  1918. wd_jitter->inst_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1919. wd_jitter->inst_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  1920. } else {
  1921. wd_jitter->inst_jitter_numer = jitter[0];
  1922. wd_jitter->inst_jitter_denom = jitter[1];
  1923. }
  1924. wd_jitter->jitter_type |= MSM_DISPLAY_WD_INSTANTANEOUS_JITTER;
  1925. } else if (rc) {
  1926. wd_jitter->inst_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1927. wd_jitter->inst_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  1928. wd_jitter->jitter_type |= MSM_DISPLAY_WD_INSTANTANEOUS_JITTER;
  1929. }
  1930. priv_info->panel_jitter_numer = rc ?
  1931. wd_jitter->inst_jitter_numer : wd_jitter->ltj_max_numer;
  1932. priv_info->panel_jitter_denom = rc ?
  1933. wd_jitter->inst_jitter_denom : wd_jitter->ltj_max_denom;
  1934. return 0;
  1935. }
  1936. static int dsi_panel_parse_jitter_config(
  1937. struct dsi_display_mode *mode,
  1938. struct dsi_parser_utils *utils)
  1939. {
  1940. int rc;
  1941. struct dsi_display_mode_priv_info *priv_info;
  1942. struct dsi_panel *panel;
  1943. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1944. u64 jitter_val = 0;
  1945. priv_info = mode->priv_info;
  1946. panel = container_of(utils, struct dsi_panel, utils);
  1947. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1948. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1949. if (rc) {
  1950. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1951. } else {
  1952. jitter_val = jitter[0];
  1953. jitter_val = div_u64(jitter_val, jitter[1]);
  1954. }
  1955. if (panel->te_using_watchdog_timer) {
  1956. dsi_panel_parse_wd_jitter_config(priv_info, utils, jitter);
  1957. } else if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1958. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1959. priv_info->panel_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  1960. } else {
  1961. priv_info->panel_jitter_numer = jitter[0];
  1962. priv_info->panel_jitter_denom = jitter[1];
  1963. }
  1964. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1965. &priv_info->panel_prefill_lines);
  1966. if (rc) {
  1967. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1968. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1969. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1970. } else if (priv_info->panel_prefill_lines >=
  1971. DSI_V_TOTAL(&mode->timing)) {
  1972. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1973. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1974. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1975. }
  1976. return 0;
  1977. }
  1978. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1979. {
  1980. int rc = 0;
  1981. char *supply_name;
  1982. if (panel->host_config.ext_bridge_mode)
  1983. return 0;
  1984. if (!strcmp(panel->type, "primary"))
  1985. supply_name = "qcom,panel-supply-entries";
  1986. else
  1987. supply_name = "qcom,panel-sec-supply-entries";
  1988. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1989. &panel->power_info, supply_name);
  1990. if (rc) {
  1991. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1992. goto error;
  1993. }
  1994. error:
  1995. return rc;
  1996. }
  1997. int dsi_panel_get_io_resources(struct dsi_panel *panel,
  1998. struct msm_io_res *io_res)
  1999. {
  2000. struct dsi_parser_utils *utils = &panel->utils;
  2001. struct list_head *mem_list = &io_res->mem;
  2002. int reset_gpio;
  2003. int rc = 0;
  2004. reset_gpio = utils->get_named_gpio(utils->data,
  2005. "qcom,platform-reset-gpio", 0);
  2006. if (gpio_is_valid(reset_gpio)) {
  2007. rc = msm_dss_get_gpio_io_mem(reset_gpio, mem_list);
  2008. if (rc) {
  2009. DSI_ERR("[%s] failed to retrieve the reset gpio address\n", panel->name);
  2010. goto end;
  2011. }
  2012. }
  2013. end:
  2014. return rc;
  2015. }
  2016. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  2017. {
  2018. int rc = 0;
  2019. const char *data;
  2020. struct dsi_parser_utils *utils = &panel->utils;
  2021. char *reset_gpio_name, *mode_set_gpio_name;
  2022. if (!strcmp(panel->type, "primary")) {
  2023. reset_gpio_name = "qcom,platform-reset-gpio";
  2024. mode_set_gpio_name = "qcom,panel-mode-gpio";
  2025. } else {
  2026. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  2027. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  2028. }
  2029. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  2030. reset_gpio_name, 0);
  2031. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  2032. !panel->host_config.ext_bridge_mode) {
  2033. DSI_DEBUG("[%s] reset gpio not set, rc=%d\n", panel->name,
  2034. panel->reset_config.reset_gpio);
  2035. }
  2036. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  2037. "qcom,5v-boost-gpio",
  2038. 0);
  2039. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  2040. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  2041. panel->name, rc);
  2042. panel->reset_config.disp_en_gpio =
  2043. utils->get_named_gpio(utils->data,
  2044. "qcom,platform-en-gpio", 0);
  2045. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  2046. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  2047. panel->name, rc);
  2048. }
  2049. }
  2050. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  2051. utils->data, mode_set_gpio_name, 0);
  2052. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  2053. DSI_DEBUG("mode gpio not specified\n");
  2054. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  2055. data = utils->get_property(utils->data,
  2056. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  2057. if (data) {
  2058. if (!strcmp(data, "single_port"))
  2059. panel->reset_config.mode_sel_state =
  2060. MODE_SEL_SINGLE_PORT;
  2061. else if (!strcmp(data, "dual_port"))
  2062. panel->reset_config.mode_sel_state =
  2063. MODE_SEL_DUAL_PORT;
  2064. else if (!strcmp(data, "high"))
  2065. panel->reset_config.mode_sel_state =
  2066. MODE_GPIO_HIGH;
  2067. else if (!strcmp(data, "low"))
  2068. panel->reset_config.mode_sel_state =
  2069. MODE_GPIO_LOW;
  2070. } else {
  2071. /* Set default mode as SPLIT mode */
  2072. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  2073. }
  2074. /* TODO: release memory */
  2075. rc = dsi_panel_parse_reset_sequence(panel);
  2076. if (rc) {
  2077. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  2078. panel->name, rc);
  2079. goto error;
  2080. }
  2081. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  2082. "qcom,mdss-dsi-panel-test-pin",
  2083. 0);
  2084. if (!gpio_is_valid(panel->panel_test_gpio))
  2085. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  2086. __LINE__);
  2087. error:
  2088. return rc;
  2089. }
  2090. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  2091. {
  2092. int rc = 0;
  2093. u32 val;
  2094. struct dsi_backlight_config *config = &panel->bl_config;
  2095. struct dsi_parser_utils *utils = &panel->utils;
  2096. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  2097. &val);
  2098. if (rc) {
  2099. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  2100. goto error;
  2101. }
  2102. config->pwm_period_usecs = val;
  2103. error:
  2104. return rc;
  2105. }
  2106. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  2107. {
  2108. int rc = 0;
  2109. u32 val = 0;
  2110. const char *bl_type = NULL;
  2111. const char *data = NULL;
  2112. const char *state = NULL;
  2113. struct dsi_parser_utils *utils = &panel->utils;
  2114. char *bl_name = NULL;
  2115. if (!strcmp(panel->type, "primary"))
  2116. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  2117. else
  2118. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  2119. bl_type = utils->get_property(utils->data, bl_name, NULL);
  2120. if (!bl_type) {
  2121. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2122. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  2123. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  2124. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  2125. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  2126. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  2127. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  2128. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  2129. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  2130. } else {
  2131. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  2132. panel->name, bl_type);
  2133. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2134. }
  2135. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  2136. if (!data) {
  2137. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2138. } else if (!strcmp(data, "delay_until_first_frame")) {
  2139. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  2140. } else {
  2141. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  2142. panel->name, data);
  2143. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2144. }
  2145. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  2146. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  2147. panel->bl_config.dimming_min_bl = 0;
  2148. panel->bl_config.dimming_status = DIMMING_ENABLE;
  2149. panel->bl_config.user_disable_notification = false;
  2150. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  2151. if (rc) {
  2152. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  2153. panel->name);
  2154. panel->bl_config.bl_min_level = 0;
  2155. } else {
  2156. panel->bl_config.bl_min_level = val;
  2157. }
  2158. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  2159. if (rc) {
  2160. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  2161. panel->name);
  2162. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  2163. } else {
  2164. panel->bl_config.bl_max_level = val;
  2165. }
  2166. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  2167. &val);
  2168. if (rc) {
  2169. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  2170. panel->name);
  2171. panel->bl_config.brightness_max_level = 255;
  2172. rc = 0;
  2173. } else {
  2174. panel->bl_config.brightness_max_level = val;
  2175. }
  2176. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  2177. "qcom,mdss-dsi-bl-inverted-dbv");
  2178. state = utils->get_property(utils->data, "qcom,bl-dsc-cmd-state", NULL);
  2179. if (!state || !strcmp(state, "dsi_hs_mode"))
  2180. panel->bl_config.lp_mode = false;
  2181. else if (!strcmp(state, "dsi_lp_mode"))
  2182. panel->bl_config.lp_mode = true;
  2183. else
  2184. DSI_ERR("bl-dsc-cmd-state command state unrecognized-%s\n",
  2185. state);
  2186. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  2187. rc = dsi_panel_parse_bl_pwm_config(panel);
  2188. if (rc) {
  2189. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  2190. panel->name, rc);
  2191. goto error;
  2192. }
  2193. }
  2194. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  2195. "qcom,platform-bklight-en-gpio",
  2196. 0);
  2197. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  2198. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  2199. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2200. panel->name, rc);
  2201. rc = -EPROBE_DEFER;
  2202. goto error;
  2203. } else {
  2204. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2205. panel->name, rc);
  2206. rc = 0;
  2207. goto error;
  2208. }
  2209. }
  2210. error:
  2211. return rc;
  2212. }
  2213. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  2214. struct dsi_parser_utils *utils)
  2215. {
  2216. const char *data;
  2217. u32 len, i;
  2218. int rc = 0;
  2219. struct dsi_display_mode_priv_info *priv_info;
  2220. u64 pixel_clk_khz;
  2221. if (!mode || !mode->priv_info)
  2222. return -EINVAL;
  2223. priv_info = mode->priv_info;
  2224. data = utils->get_property(utils->data,
  2225. "qcom,mdss-dsi-panel-phy-timings", &len);
  2226. if (!data) {
  2227. DSI_DEBUG("Unable to read Phy timing settings\n");
  2228. } else {
  2229. priv_info->phy_timing_val =
  2230. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2231. if (!priv_info->phy_timing_val)
  2232. return -EINVAL;
  2233. for (i = 0; i < len; i++)
  2234. priv_info->phy_timing_val[i] = data[i];
  2235. priv_info->phy_timing_len = len;
  2236. }
  2237. if (mode->panel_mode_caps & DSI_OP_VIDEO_MODE) {
  2238. /*
  2239. * For command mode we update the pclk as part of
  2240. * function dsi_panel_calc_dsi_transfer_time( )
  2241. * as we set it based on dsi clock or mdp transfer time.
  2242. */
  2243. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  2244. DSI_V_TOTAL(&mode->timing) *
  2245. mode->timing.refresh_rate);
  2246. do_div(pixel_clk_khz, 1000);
  2247. mode->pixel_clk_khz = pixel_clk_khz;
  2248. }
  2249. return rc;
  2250. }
  2251. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2252. struct dsi_parser_utils *utils)
  2253. {
  2254. u32 data;
  2255. int rc = -EINVAL;
  2256. int intf_width;
  2257. const char *compression;
  2258. struct dsi_display_mode_priv_info *priv_info;
  2259. if (!mode || !mode->priv_info)
  2260. return -EINVAL;
  2261. priv_info = mode->priv_info;
  2262. priv_info->dsc_enabled = false;
  2263. compression = utils->get_property(utils->data,
  2264. "qcom,compression-mode", NULL);
  2265. if (compression && !strcmp(compression, "dsc"))
  2266. priv_info->dsc_enabled = true;
  2267. if (!priv_info->dsc_enabled) {
  2268. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  2269. return 0;
  2270. }
  2271. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2272. if (rc) {
  2273. priv_info->dsc.config.dsc_version_major = 0x1;
  2274. priv_info->dsc.config.dsc_version_minor = 0x1;
  2275. rc = 0;
  2276. } else {
  2277. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2278. * major version information
  2279. */
  2280. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  2281. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  2282. if ((priv_info->dsc.config.dsc_version_major != 0x1) ||
  2283. ((priv_info->dsc.config.dsc_version_minor
  2284. != 0x1) &&
  2285. (priv_info->dsc.config.dsc_version_minor
  2286. != 0x2))) {
  2287. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2288. __func__,
  2289. priv_info->dsc.config.dsc_version_major,
  2290. priv_info->dsc.config.dsc_version_minor
  2291. );
  2292. rc = -EINVAL;
  2293. goto error;
  2294. }
  2295. }
  2296. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2297. if (rc) {
  2298. priv_info->dsc.scr_rev = 0x0;
  2299. rc = 0;
  2300. } else {
  2301. priv_info->dsc.scr_rev = data & 0xff;
  2302. /* only one scr rev supported */
  2303. if (priv_info->dsc.scr_rev > 0x1) {
  2304. DSI_ERR("%s: DSC scr version:%d not supported\n",
  2305. __func__, priv_info->dsc.scr_rev);
  2306. rc = -EINVAL;
  2307. goto error;
  2308. }
  2309. }
  2310. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2311. if (rc) {
  2312. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  2313. goto error;
  2314. }
  2315. priv_info->dsc.config.slice_height = data;
  2316. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2317. if (rc) {
  2318. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2319. goto error;
  2320. }
  2321. priv_info->dsc.config.slice_width = data;
  2322. intf_width = mode->timing.h_active;
  2323. if (intf_width % priv_info->dsc.config.slice_width) {
  2324. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2325. intf_width, priv_info->dsc.config.slice_width);
  2326. rc = -EINVAL;
  2327. goto error;
  2328. }
  2329. priv_info->dsc.config.pic_width = mode->timing.h_active;
  2330. priv_info->dsc.config.pic_height = mode->timing.v_active;
  2331. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2332. if (rc) {
  2333. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2334. goto error;
  2335. } else if (!data || (data > 2)) {
  2336. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2337. goto error;
  2338. }
  2339. priv_info->dsc.slice_per_pkt = data;
  2340. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2341. &data);
  2342. if (rc) {
  2343. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2344. goto error;
  2345. }
  2346. priv_info->dsc.config.bits_per_component = data;
  2347. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2348. if (rc) {
  2349. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2350. data = 0;
  2351. }
  2352. priv_info->dsc.pps_delay_ms = data;
  2353. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2354. &data);
  2355. if (rc) {
  2356. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2357. goto error;
  2358. }
  2359. priv_info->dsc.config.bits_per_pixel = data << 4;
  2360. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2361. &data);
  2362. if (rc) {
  2363. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2364. rc = 0;
  2365. data = MSM_CHROMA_444;
  2366. } else if (data == MSM_CHROMA_422) {
  2367. priv_info->dsc.config.native_422 = 1;
  2368. } else if (data == MSM_CHROMA_420) {
  2369. priv_info->dsc.config.native_420 = 1;
  2370. }
  2371. priv_info->dsc.chroma_format = data;
  2372. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2373. &data);
  2374. if (rc) {
  2375. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2376. rc = 0;
  2377. data = MSM_RGB;
  2378. }
  2379. priv_info->dsc.source_color_space = data;
  2380. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2381. "qcom,mdss-dsc-block-prediction-enable");
  2382. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2383. priv_info->dsc.config.slice_width);
  2384. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2385. priv_info->dsc.scr_rev);
  2386. if (rc) {
  2387. DSI_DEBUG("failed populating dsc params\n");
  2388. rc = -EINVAL;
  2389. goto error;
  2390. }
  2391. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2392. if (rc) {
  2393. DSI_DEBUG("failed populating other dsc params\n");
  2394. rc = -EINVAL;
  2395. goto error;
  2396. }
  2397. priv_info->pclk_scale.numer =
  2398. priv_info->dsc.config.bits_per_pixel >> 4;
  2399. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2400. priv_info->dsc.chroma_format,
  2401. priv_info->dsc.config.bits_per_component);
  2402. mode->timing.dsc_enabled = true;
  2403. mode->timing.dsc = &priv_info->dsc;
  2404. mode->timing.pclk_scale = priv_info->pclk_scale;
  2405. error:
  2406. return rc;
  2407. }
  2408. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2409. struct dsi_parser_utils *utils, int traffic_mode)
  2410. {
  2411. u32 data;
  2412. int rc = -EINVAL;
  2413. const char *compression;
  2414. struct dsi_display_mode_priv_info *priv_info;
  2415. int intf_width;
  2416. if (!mode || !mode->priv_info)
  2417. return -EINVAL;
  2418. priv_info = mode->priv_info;
  2419. priv_info->vdc_enabled = false;
  2420. compression = utils->get_property(utils->data,
  2421. "qcom,compression-mode", NULL);
  2422. if (compression && !strcmp(compression, "vdc"))
  2423. priv_info->vdc_enabled = true;
  2424. if (!priv_info->vdc_enabled) {
  2425. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2426. return 0;
  2427. }
  2428. priv_info->vdc.traffic_mode = traffic_mode;
  2429. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2430. if (rc) {
  2431. priv_info->vdc.version_major = 0x1;
  2432. priv_info->vdc.version_minor = 0x2;
  2433. priv_info->vdc.version_release = 0x0;
  2434. rc = 0;
  2435. } else {
  2436. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2437. * major version information
  2438. */
  2439. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2440. priv_info->vdc.version_minor = data & 0x0F;
  2441. if ((priv_info->vdc.version_major != 0x1) &&
  2442. ((priv_info->vdc.version_minor
  2443. != 0x2))) {
  2444. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2445. __func__,
  2446. priv_info->vdc.version_major,
  2447. priv_info->vdc.version_minor
  2448. );
  2449. rc = -EINVAL;
  2450. goto error;
  2451. }
  2452. }
  2453. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2454. if (rc) {
  2455. priv_info->vdc.version_release = 0x0;
  2456. rc = 0;
  2457. } else {
  2458. priv_info->vdc.version_release = data & 0xff;
  2459. /* only one release version is supported */
  2460. if (priv_info->vdc.version_release != 0x0) {
  2461. DSI_ERR("unsupported vdc release version %d\n",
  2462. priv_info->vdc.version_release);
  2463. rc = -EINVAL;
  2464. goto error;
  2465. }
  2466. }
  2467. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2468. priv_info->vdc.version_major,
  2469. priv_info->vdc.version_minor,
  2470. priv_info->vdc.version_release);
  2471. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2472. if (rc) {
  2473. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2474. goto error;
  2475. }
  2476. priv_info->vdc.slice_height = data;
  2477. /* slice height should be atleast 16 lines */
  2478. if (priv_info->vdc.slice_height < 16) {
  2479. DSI_ERR("invalid slice height %d\n",
  2480. priv_info->vdc.slice_height);
  2481. rc = -EINVAL;
  2482. goto error;
  2483. }
  2484. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2485. if (rc) {
  2486. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2487. goto error;
  2488. }
  2489. priv_info->vdc.slice_width = data;
  2490. /*
  2491. * slide-width should be multiple of 8
  2492. * slice-width should be atlease 64 pixels
  2493. */
  2494. if ((priv_info->vdc.slice_width & 7) ||
  2495. (priv_info->vdc.slice_width < 64)) {
  2496. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2497. rc = -EINVAL;
  2498. goto error;
  2499. }
  2500. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2501. if (rc) {
  2502. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2503. goto error;
  2504. } else if (!data || (data > 2)) {
  2505. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2506. rc = -EINVAL;
  2507. goto error;
  2508. }
  2509. intf_width = mode->timing.h_active;
  2510. priv_info->vdc.slice_per_pkt = data;
  2511. priv_info->vdc.frame_width = mode->timing.h_active;
  2512. priv_info->vdc.frame_height = mode->timing.v_active;
  2513. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2514. &data);
  2515. if (rc) {
  2516. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2517. goto error;
  2518. }
  2519. priv_info->vdc.bits_per_component = data;
  2520. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2521. if (rc) {
  2522. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2523. data = 0;
  2524. }
  2525. priv_info->vdc.pps_delay_ms = data;
  2526. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2527. &data);
  2528. if (rc) {
  2529. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2530. goto error;
  2531. }
  2532. priv_info->vdc.bits_per_pixel = data << 4;
  2533. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2534. &data);
  2535. if (rc) {
  2536. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2537. rc = 0;
  2538. data = MSM_CHROMA_444;
  2539. }
  2540. priv_info->vdc.chroma_format = data;
  2541. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2542. &data);
  2543. if (rc) {
  2544. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2545. rc = 0;
  2546. data = MSM_RGB;
  2547. }
  2548. priv_info->vdc.source_color_space = data;
  2549. rc = sde_vdc_populate_config(&priv_info->vdc,
  2550. intf_width, traffic_mode);
  2551. if (rc) {
  2552. DSI_DEBUG("failed populating vdc config\n");
  2553. rc = -EINVAL;
  2554. goto error;
  2555. }
  2556. priv_info->pclk_scale.numer =
  2557. priv_info->vdc.bits_per_pixel >> 4;
  2558. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2559. priv_info->vdc.chroma_format,
  2560. priv_info->vdc.bits_per_component);
  2561. mode->timing.vdc_enabled = true;
  2562. mode->timing.vdc = &priv_info->vdc;
  2563. mode->timing.pclk_scale = priv_info->pclk_scale;
  2564. error:
  2565. return rc;
  2566. }
  2567. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2568. {
  2569. int rc = 0;
  2570. struct drm_panel_hdr_properties *hdr_prop;
  2571. struct dsi_parser_utils *utils = &panel->utils;
  2572. hdr_prop = &panel->hdr_props;
  2573. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2574. "qcom,mdss-dsi-panel-hdr-enabled");
  2575. if (hdr_prop->hdr_enabled) {
  2576. rc = utils->read_u32_array(utils->data,
  2577. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2578. hdr_prop->display_primaries,
  2579. DISPLAY_PRIMARIES_MAX);
  2580. if (rc) {
  2581. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2582. __func__, __LINE__, rc);
  2583. hdr_prop->hdr_enabled = false;
  2584. return rc;
  2585. }
  2586. rc = utils->read_u32(utils->data,
  2587. "qcom,mdss-dsi-panel-peak-brightness",
  2588. &(hdr_prop->peak_brightness));
  2589. if (rc) {
  2590. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2591. __func__, __LINE__, rc);
  2592. hdr_prop->hdr_enabled = false;
  2593. return rc;
  2594. }
  2595. rc = utils->read_u32(utils->data,
  2596. "qcom,mdss-dsi-panel-blackness-level",
  2597. &(hdr_prop->blackness_level));
  2598. if (rc) {
  2599. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2600. __func__, __LINE__, rc);
  2601. hdr_prop->hdr_enabled = false;
  2602. return rc;
  2603. }
  2604. }
  2605. return 0;
  2606. }
  2607. static int dsi_panel_parse_topology(
  2608. struct dsi_display_mode_priv_info *priv_info,
  2609. struct dsi_parser_utils *utils,
  2610. int topology_override)
  2611. {
  2612. struct msm_display_topology *topology;
  2613. u32 top_count, top_sel, *array = NULL;
  2614. int i, len = 0;
  2615. int rc = -EINVAL;
  2616. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2617. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2618. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2619. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2620. return rc;
  2621. }
  2622. top_count = len / TOPOLOGY_SET_LEN;
  2623. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2624. if (!array)
  2625. return -ENOMEM;
  2626. rc = utils->read_u32_array(utils->data,
  2627. "qcom,display-topology", array, len);
  2628. if (rc) {
  2629. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2630. goto read_fail;
  2631. }
  2632. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2633. if (!topology) {
  2634. rc = -ENOMEM;
  2635. goto read_fail;
  2636. }
  2637. for (i = 0; i < top_count; i++) {
  2638. struct msm_display_topology *top = &topology[i];
  2639. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2640. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2641. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2642. }
  2643. if (topology_override >= 0 && topology_override < top_count) {
  2644. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2645. topology_override,
  2646. topology[topology_override].num_lm,
  2647. topology[topology_override].num_enc,
  2648. topology[topology_override].num_intf);
  2649. top_sel = topology_override;
  2650. goto parse_done;
  2651. }
  2652. rc = utils->read_u32(utils->data,
  2653. "qcom,default-topology-index", &top_sel);
  2654. if (rc) {
  2655. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2656. goto parse_fail;
  2657. }
  2658. if (top_sel >= top_count) {
  2659. rc = -EINVAL;
  2660. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2661. rc);
  2662. goto parse_fail;
  2663. }
  2664. if (!(priv_info->dsc_enabled || priv_info->vdc_enabled) !=
  2665. !topology[top_sel].num_enc) {
  2666. DSI_ERR("topology and compression info mismatch dsc:%d vdc:%d num_enc:%d\n",
  2667. priv_info->dsc_enabled, priv_info->vdc_enabled,
  2668. topology[top_sel].num_enc);
  2669. goto parse_fail;
  2670. }
  2671. if (priv_info->dsc_enabled)
  2672. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_DSC;
  2673. else if (priv_info->vdc_enabled)
  2674. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_VDC;
  2675. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2676. topology[top_sel].num_lm,
  2677. topology[top_sel].num_enc,
  2678. topology[top_sel].num_intf);
  2679. parse_done:
  2680. memcpy(&priv_info->topology, &topology[top_sel],
  2681. sizeof(struct msm_display_topology));
  2682. parse_fail:
  2683. kfree(topology);
  2684. read_fail:
  2685. kfree(array);
  2686. return rc;
  2687. }
  2688. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2689. struct msm_roi_alignment *align)
  2690. {
  2691. int len = 0, rc = 0;
  2692. u32 value[6];
  2693. struct property *data;
  2694. if (!align)
  2695. return -EINVAL;
  2696. memset(align, 0, sizeof(*align));
  2697. data = utils->find_property(utils->data,
  2698. "qcom,panel-roi-alignment", &len);
  2699. len /= sizeof(u32);
  2700. if (!data) {
  2701. DSI_ERR("panel roi alignment not found\n");
  2702. rc = -EINVAL;
  2703. } else if (len != 6) {
  2704. DSI_ERR("incorrect roi alignment len %d\n", len);
  2705. rc = -EINVAL;
  2706. } else {
  2707. rc = utils->read_u32_array(utils->data,
  2708. "qcom,panel-roi-alignment", value, len);
  2709. if (rc)
  2710. DSI_DEBUG("error reading panel roi alignment values\n");
  2711. else {
  2712. align->xstart_pix_align = value[0];
  2713. align->ystart_pix_align = value[1];
  2714. align->width_pix_align = value[2];
  2715. align->height_pix_align = value[3];
  2716. align->min_width = value[4];
  2717. align->min_height = value[5];
  2718. }
  2719. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2720. align->xstart_pix_align,
  2721. align->width_pix_align,
  2722. align->ystart_pix_align,
  2723. align->height_pix_align,
  2724. align->min_width,
  2725. align->min_height);
  2726. }
  2727. return rc;
  2728. }
  2729. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2730. struct dsi_parser_utils *utils)
  2731. {
  2732. struct msm_roi_caps *roi_caps = NULL;
  2733. const char *data;
  2734. int rc = 0;
  2735. if (!mode || !mode->priv_info) {
  2736. DSI_ERR("invalid arguments\n");
  2737. return -EINVAL;
  2738. }
  2739. roi_caps = &mode->priv_info->roi_caps;
  2740. memset(roi_caps, 0, sizeof(*roi_caps));
  2741. data = utils->get_property(utils->data,
  2742. "qcom,partial-update-enabled", NULL);
  2743. if (data) {
  2744. if (!strcmp(data, "dual_roi"))
  2745. roi_caps->num_roi = 2;
  2746. else if (!strcmp(data, "single_roi"))
  2747. roi_caps->num_roi = 1;
  2748. else {
  2749. DSI_INFO(
  2750. "invalid value for qcom,partial-update-enabled: %s\n",
  2751. data);
  2752. return 0;
  2753. }
  2754. } else {
  2755. DSI_DEBUG("partial update disabled as the property is not set\n");
  2756. return 0;
  2757. }
  2758. roi_caps->merge_rois = utils->read_bool(utils->data,
  2759. "qcom,partial-update-roi-merge");
  2760. roi_caps->enabled = roi_caps->num_roi > 0;
  2761. if (roi_caps->enabled)
  2762. rc = dsi_panel_parse_roi_alignment(utils,
  2763. &roi_caps->align);
  2764. if (rc)
  2765. memset(roi_caps, 0, sizeof(*roi_caps));
  2766. else if (mode->priv_info->dsc_enabled &&
  2767. ((roi_caps->align.min_width % mode->priv_info->dsc.config.slice_width) ||
  2768. (roi_caps->align.min_height % mode->priv_info->dsc.config.slice_height))) {
  2769. memset(roi_caps, 0, sizeof(*roi_caps));
  2770. DSI_ERR("panel roi can't match DSC slice settings,disable partial update\n");
  2771. }
  2772. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2773. roi_caps->enabled);
  2774. return rc;
  2775. }
  2776. static bool dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2777. struct dsi_parser_utils *utils)
  2778. {
  2779. if (!mode || !mode->priv_info) {
  2780. DSI_ERR("invalid arguments\n");
  2781. return false;
  2782. }
  2783. if (utils->read_bool(utils->data, "qcom,mdss-dsi-video-mode"))
  2784. mode->panel_mode_caps |= DSI_OP_VIDEO_MODE;
  2785. if (utils->read_bool(utils->data, "qcom,mdss-dsi-cmd-mode"))
  2786. mode->panel_mode_caps |= DSI_OP_CMD_MODE;
  2787. if (!mode->panel_mode_caps)
  2788. return false;
  2789. return true;
  2790. };
  2791. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2792. {
  2793. int dms_enabled;
  2794. const char *data;
  2795. struct dsi_parser_utils *utils = &panel->utils;
  2796. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2797. dms_enabled = utils->read_bool(utils->data,
  2798. "qcom,dynamic-mode-switch-enabled");
  2799. if (!dms_enabled)
  2800. return 0;
  2801. data = utils->get_property(utils->data,
  2802. "qcom,dynamic-mode-switch-type", NULL);
  2803. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2804. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2805. } else {
  2806. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2807. panel->name, data);
  2808. return -EINVAL;
  2809. }
  2810. return 0;
  2811. };
  2812. /*
  2813. * The length of all the valid values to be checked should not be greater
  2814. * than the length of returned data from read command.
  2815. */
  2816. static bool
  2817. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2818. {
  2819. int i;
  2820. struct drm_panel_esd_config *config = &panel->esd_config;
  2821. for (i = 0; i < count; ++i) {
  2822. if (config->status_valid_params[i] >
  2823. config->status_cmds_rlen[i]) {
  2824. DSI_DEBUG("ignore valid params\n");
  2825. return false;
  2826. }
  2827. }
  2828. return true;
  2829. }
  2830. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2831. char *prop_key, u32 **target, u32 cmd_cnt)
  2832. {
  2833. int tmp;
  2834. if (!utils->find_property(utils->data, prop_key, &tmp))
  2835. return false;
  2836. tmp /= sizeof(u32);
  2837. if (tmp != cmd_cnt) {
  2838. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2839. tmp, cmd_cnt);
  2840. return false;
  2841. }
  2842. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2843. if (IS_ERR_OR_NULL(*target)) {
  2844. DSI_ERR("Error allocating memory for property\n");
  2845. return false;
  2846. }
  2847. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2848. DSI_ERR("cannot get values from dts\n");
  2849. kfree(*target);
  2850. *target = NULL;
  2851. return false;
  2852. }
  2853. return true;
  2854. }
  2855. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2856. {
  2857. kfree(esd_config->status_buf);
  2858. kfree(esd_config->return_buf);
  2859. kfree(esd_config->status_value);
  2860. kfree(esd_config->status_valid_params);
  2861. kfree(esd_config->status_cmds_rlen);
  2862. kfree(esd_config->status_cmd.cmds);
  2863. }
  2864. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2865. {
  2866. struct drm_panel_esd_config *esd_config;
  2867. int rc = 0;
  2868. u32 tmp;
  2869. u32 i, status_len, *lenp;
  2870. struct property *data;
  2871. struct dsi_parser_utils *utils = &panel->utils;
  2872. if (!panel) {
  2873. DSI_ERR("Invalid Params\n");
  2874. return -EINVAL;
  2875. }
  2876. esd_config = &panel->esd_config;
  2877. if (!esd_config)
  2878. return -EINVAL;
  2879. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2880. DSI_CMD_SET_PANEL_STATUS, utils);
  2881. if (!esd_config->status_cmd.count) {
  2882. DSI_ERR("panel status command parsing failed\n");
  2883. rc = -EINVAL;
  2884. goto error;
  2885. }
  2886. if (!dsi_panel_parse_esd_status_len(utils,
  2887. "qcom,mdss-dsi-panel-status-read-length",
  2888. &panel->esd_config.status_cmds_rlen,
  2889. esd_config->status_cmd.count)) {
  2890. DSI_ERR("Invalid status read length\n");
  2891. rc = -EINVAL;
  2892. goto error1;
  2893. }
  2894. if (dsi_panel_parse_esd_status_len(utils,
  2895. "qcom,mdss-dsi-panel-status-valid-params",
  2896. &panel->esd_config.status_valid_params,
  2897. esd_config->status_cmd.count)) {
  2898. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2899. esd_config->status_cmd.count)) {
  2900. rc = -EINVAL;
  2901. goto error2;
  2902. }
  2903. }
  2904. status_len = 0;
  2905. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2906. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2907. status_len += lenp[i];
  2908. if (!status_len) {
  2909. rc = -EINVAL;
  2910. goto error2;
  2911. }
  2912. /*
  2913. * Some panel may need multiple read commands to properly
  2914. * check panel status. Do a sanity check for proper status
  2915. * value which will be compared with the value read by dsi
  2916. * controller during ESD check. Also check if multiple read
  2917. * commands are there then, there should be corresponding
  2918. * status check values for each read command.
  2919. */
  2920. data = utils->find_property(utils->data,
  2921. "qcom,mdss-dsi-panel-status-value", &tmp);
  2922. tmp /= sizeof(u32);
  2923. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2924. esd_config->groups = tmp / status_len;
  2925. } else {
  2926. DSI_ERR("error parse panel-status-value\n");
  2927. rc = -EINVAL;
  2928. goto error2;
  2929. }
  2930. esd_config->status_value =
  2931. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2932. GFP_KERNEL);
  2933. if (!esd_config->status_value) {
  2934. rc = -ENOMEM;
  2935. goto error2;
  2936. }
  2937. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2938. sizeof(unsigned char), GFP_KERNEL);
  2939. if (!esd_config->return_buf) {
  2940. rc = -ENOMEM;
  2941. goto error3;
  2942. }
  2943. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2944. if (!esd_config->status_buf) {
  2945. rc = -ENOMEM;
  2946. goto error4;
  2947. }
  2948. rc = utils->read_u32_array(utils->data,
  2949. "qcom,mdss-dsi-panel-status-value",
  2950. esd_config->status_value, esd_config->groups * status_len);
  2951. if (rc) {
  2952. DSI_DEBUG("error reading panel status values\n");
  2953. memset(esd_config->status_value, 0,
  2954. esd_config->groups * status_len);
  2955. }
  2956. return 0;
  2957. error4:
  2958. kfree(esd_config->return_buf);
  2959. error3:
  2960. kfree(esd_config->status_value);
  2961. error2:
  2962. kfree(esd_config->status_valid_params);
  2963. kfree(esd_config->status_cmds_rlen);
  2964. error1:
  2965. kfree(esd_config->status_cmd.cmds);
  2966. error:
  2967. return rc;
  2968. }
  2969. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2970. {
  2971. int rc = 0;
  2972. const char *string;
  2973. struct drm_panel_esd_config *esd_config;
  2974. struct dsi_parser_utils *utils = &panel->utils;
  2975. u8 *esd_mode = NULL;
  2976. esd_config = &panel->esd_config;
  2977. esd_config->status_mode = ESD_MODE_MAX;
  2978. esd_config->esd_enabled = utils->read_bool(utils->data,
  2979. "qcom,esd-check-enabled");
  2980. if (!esd_config->esd_enabled)
  2981. return 0;
  2982. rc = utils->read_string(utils->data,
  2983. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2984. if (!rc) {
  2985. if (!strcmp(string, "bta_check")) {
  2986. esd_config->status_mode = ESD_MODE_SW_BTA;
  2987. } else if (!strcmp(string, "reg_read")) {
  2988. esd_config->status_mode = ESD_MODE_REG_READ;
  2989. } else if (!strcmp(string, "te_signal_check")) {
  2990. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2991. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2992. } else {
  2993. DSI_ERR("TE-ESD not valid for video mode\n");
  2994. rc = -EINVAL;
  2995. goto error;
  2996. }
  2997. } else {
  2998. DSI_ERR("No valid panel-status-check-mode string\n");
  2999. rc = -EINVAL;
  3000. goto error;
  3001. }
  3002. } else {
  3003. DSI_DEBUG("status check method not defined!\n");
  3004. rc = -EINVAL;
  3005. goto error;
  3006. }
  3007. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  3008. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  3009. if (rc) {
  3010. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  3011. rc);
  3012. goto error;
  3013. }
  3014. esd_mode = "register_read";
  3015. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  3016. esd_mode = "bta_trigger";
  3017. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  3018. esd_mode = "te_check";
  3019. }
  3020. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  3021. return 0;
  3022. error:
  3023. panel->esd_config.esd_enabled = false;
  3024. return rc;
  3025. }
  3026. static void dsi_panel_update_util(struct dsi_panel *panel,
  3027. struct device_node *parser_node)
  3028. {
  3029. struct dsi_parser_utils *utils = &panel->utils;
  3030. if (parser_node) {
  3031. *utils = *dsi_parser_get_parser_utils();
  3032. utils->data = parser_node;
  3033. DSI_DEBUG("switching to parser APIs\n");
  3034. goto end;
  3035. }
  3036. *utils = *dsi_parser_get_of_utils();
  3037. utils->data = panel->panel_of_node;
  3038. end:
  3039. utils->node = panel->panel_of_node;
  3040. }
  3041. static int dsi_panel_vm_stub(struct dsi_panel *panel)
  3042. {
  3043. return 0;
  3044. }
  3045. static void dsi_panel_setup_vm_ops(struct dsi_panel *panel, bool trusted_vm_env)
  3046. {
  3047. if (trusted_vm_env) {
  3048. panel->panel_ops.pinctrl_init = dsi_panel_vm_stub;
  3049. panel->panel_ops.gpio_request = dsi_panel_vm_stub;
  3050. panel->panel_ops.pinctrl_deinit = dsi_panel_vm_stub;
  3051. panel->panel_ops.gpio_release = dsi_panel_vm_stub;
  3052. panel->panel_ops.bl_register = dsi_panel_vm_stub;
  3053. panel->panel_ops.bl_unregister = dsi_panel_vm_stub;
  3054. panel->panel_ops.parse_gpios = dsi_panel_vm_stub;
  3055. panel->panel_ops.parse_power_cfg = dsi_panel_vm_stub;
  3056. panel->panel_ops.trigger_esd_attack = dsi_panel_vm_trigger_esd_attack;
  3057. } else {
  3058. panel->panel_ops.pinctrl_init = dsi_panel_pinctrl_init;
  3059. panel->panel_ops.gpio_request = dsi_panel_gpio_request;
  3060. panel->panel_ops.pinctrl_deinit = dsi_panel_pinctrl_deinit;
  3061. panel->panel_ops.gpio_release = dsi_panel_gpio_release;
  3062. panel->panel_ops.bl_register = dsi_panel_bl_register;
  3063. panel->panel_ops.bl_unregister = dsi_panel_bl_unregister;
  3064. panel->panel_ops.parse_gpios = dsi_panel_parse_gpios;
  3065. panel->panel_ops.parse_power_cfg = dsi_panel_parse_power_cfg;
  3066. panel->panel_ops.trigger_esd_attack = dsi_panel_trigger_esd_attack;
  3067. }
  3068. }
  3069. struct dsi_panel *dsi_panel_get(struct device *parent,
  3070. struct device_node *of_node,
  3071. struct device_node *parser_node,
  3072. const char *type,
  3073. int topology_override,
  3074. bool trusted_vm_env)
  3075. {
  3076. struct dsi_panel *panel;
  3077. struct dsi_parser_utils *utils;
  3078. const char *panel_physical_type;
  3079. int rc = 0;
  3080. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  3081. if (!panel)
  3082. return ERR_PTR(-ENOMEM);
  3083. dsi_panel_setup_vm_ops(panel, trusted_vm_env);
  3084. panel->panel_of_node = of_node;
  3085. panel->parent = parent;
  3086. panel->type = type;
  3087. dsi_panel_update_util(panel, parser_node);
  3088. utils = &panel->utils;
  3089. panel->name = utils->get_property(utils->data,
  3090. "qcom,mdss-dsi-panel-name", NULL);
  3091. if (!panel->name)
  3092. panel->name = DSI_PANEL_DEFAULT_LABEL;
  3093. /*
  3094. * Set panel type to LCD as default.
  3095. */
  3096. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  3097. panel_physical_type = utils->get_property(utils->data,
  3098. "qcom,mdss-dsi-panel-physical-type", NULL);
  3099. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  3100. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  3101. rc = dsi_panel_parse_host_config(panel);
  3102. if (rc) {
  3103. DSI_ERR("failed to parse host configuration, rc=%d\n",
  3104. rc);
  3105. goto error;
  3106. }
  3107. rc = dsi_panel_parse_panel_mode(panel);
  3108. if (rc) {
  3109. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  3110. rc);
  3111. goto error;
  3112. }
  3113. rc = dsi_panel_parse_dfps_caps(panel);
  3114. if (rc)
  3115. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  3116. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  3117. if (rc)
  3118. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  3119. rc = dsi_panel_parse_avr_caps(panel, of_node);
  3120. if (rc)
  3121. DSI_ERR("failed to parse AVR features, rc=%d\n", rc);
  3122. rc = dsi_panel_parse_dyn_clk_caps(panel);
  3123. if (rc)
  3124. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  3125. rc = dsi_panel_parse_phy_props(panel);
  3126. if (rc) {
  3127. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  3128. rc);
  3129. goto error;
  3130. }
  3131. rc = panel->panel_ops.parse_gpios(panel);
  3132. if (rc) {
  3133. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  3134. goto error;
  3135. }
  3136. rc = panel->panel_ops.parse_power_cfg(panel);
  3137. if (rc)
  3138. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  3139. rc = dsi_panel_parse_bl_config(panel);
  3140. if (rc) {
  3141. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  3142. if (rc == -EPROBE_DEFER)
  3143. goto error;
  3144. }
  3145. rc = dsi_panel_parse_misc_features(panel);
  3146. if (rc)
  3147. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  3148. rc = dsi_panel_parse_hdr_config(panel);
  3149. if (rc)
  3150. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  3151. rc = dsi_panel_get_mode_count(panel);
  3152. if (rc) {
  3153. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  3154. goto error;
  3155. }
  3156. rc = dsi_panel_parse_dms_info(panel);
  3157. if (rc)
  3158. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  3159. rc = dsi_panel_parse_esd_config(panel);
  3160. if (rc)
  3161. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  3162. rc = dsi_panel_vreg_get(panel);
  3163. if (rc) {
  3164. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  3165. panel->name, rc);
  3166. goto error;
  3167. }
  3168. panel->power_mode = SDE_MODE_DPMS_OFF;
  3169. drm_panel_init(&panel->drm_panel, &panel->mipi_device.dev,
  3170. NULL, DRM_MODE_CONNECTOR_DSI);
  3171. panel->mipi_device.dev.of_node = of_node;
  3172. drm_panel_add(&panel->drm_panel);
  3173. mutex_init(&panel->panel_lock);
  3174. return panel;
  3175. error:
  3176. kfree(panel);
  3177. return ERR_PTR(rc);
  3178. }
  3179. void dsi_panel_put(struct dsi_panel *panel)
  3180. {
  3181. drm_panel_remove(&panel->drm_panel);
  3182. /* free resources allocated for ESD check */
  3183. dsi_panel_esd_config_deinit(&panel->esd_config);
  3184. kfree(panel->avr_caps.avr_step_fps_list);
  3185. kfree(panel);
  3186. }
  3187. int dsi_panel_drv_init(struct dsi_panel *panel,
  3188. struct mipi_dsi_host *host)
  3189. {
  3190. int rc = 0;
  3191. struct mipi_dsi_device *dev;
  3192. if (!panel || !host) {
  3193. DSI_ERR("invalid params\n");
  3194. return -EINVAL;
  3195. }
  3196. mutex_lock(&panel->panel_lock);
  3197. dev = &panel->mipi_device;
  3198. dev->host = host;
  3199. /*
  3200. * We dont have device structure since panel is not a device node.
  3201. * When using drm panel framework, the device is probed when the host is
  3202. * create.
  3203. */
  3204. dev->channel = 0;
  3205. dev->lanes = 4;
  3206. panel->host = host;
  3207. rc = panel->panel_ops.pinctrl_init(panel);
  3208. if (rc) {
  3209. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  3210. panel->name, rc);
  3211. goto exit;
  3212. }
  3213. rc = panel->panel_ops.gpio_request(panel);
  3214. if (rc) {
  3215. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  3216. rc);
  3217. goto error_pinctrl_deinit;
  3218. }
  3219. rc = panel->panel_ops.bl_register(panel);
  3220. if (rc) {
  3221. if (rc != -EPROBE_DEFER)
  3222. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  3223. panel->name, rc);
  3224. goto error_gpio_release;
  3225. }
  3226. goto exit;
  3227. error_gpio_release:
  3228. (void)dsi_panel_gpio_release(panel);
  3229. error_pinctrl_deinit:
  3230. (void)dsi_panel_pinctrl_deinit(panel);
  3231. exit:
  3232. mutex_unlock(&panel->panel_lock);
  3233. return rc;
  3234. }
  3235. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  3236. {
  3237. int rc = 0;
  3238. if (!panel) {
  3239. DSI_ERR("invalid params\n");
  3240. return -EINVAL;
  3241. }
  3242. mutex_lock(&panel->panel_lock);
  3243. rc = panel->panel_ops.bl_unregister(panel);
  3244. if (rc)
  3245. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  3246. panel->name, rc);
  3247. rc = panel->panel_ops.gpio_release(panel);
  3248. if (rc)
  3249. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  3250. rc);
  3251. rc = panel->panel_ops.pinctrl_deinit(panel);
  3252. if (rc)
  3253. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  3254. rc);
  3255. rc = dsi_panel_vreg_put(panel);
  3256. if (rc)
  3257. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  3258. panel->host = NULL;
  3259. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  3260. mutex_unlock(&panel->panel_lock);
  3261. return rc;
  3262. }
  3263. int dsi_panel_validate_mode(struct dsi_panel *panel,
  3264. struct dsi_display_mode *mode)
  3265. {
  3266. return 0;
  3267. }
  3268. static int dsi_panel_get_max_res_count(struct dsi_parser_utils *utils,
  3269. struct device_node *node, u32 *dsc_count, u32 *lm_count)
  3270. {
  3271. const char *compression;
  3272. u32 *array = NULL, top_count, len, i;
  3273. int rc = -EINVAL;
  3274. bool dsc_enable = false;
  3275. *dsc_count = 0;
  3276. *lm_count = 0;
  3277. compression = utils->get_property(node, "qcom,compression-mode", NULL);
  3278. if (compression && !strcmp(compression, "dsc"))
  3279. dsc_enable = true;
  3280. len = utils->count_u32_elems(node, "qcom,display-topology");
  3281. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  3282. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY))
  3283. return rc;
  3284. top_count = len / TOPOLOGY_SET_LEN;
  3285. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  3286. if (!array)
  3287. return -ENOMEM;
  3288. rc = utils->read_u32_array(node, "qcom,display-topology", array, len);
  3289. if (rc) {
  3290. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  3291. goto read_fail;
  3292. }
  3293. for (i = 0; i < top_count; i++) {
  3294. *lm_count = max(*lm_count, array[i * TOPOLOGY_SET_LEN]);
  3295. if (dsc_enable)
  3296. *dsc_count = max(*dsc_count,
  3297. array[i * TOPOLOGY_SET_LEN + 1]);
  3298. }
  3299. read_fail:
  3300. kfree(array);
  3301. return 0;
  3302. }
  3303. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  3304. {
  3305. const u32 SINGLE_MODE_SUPPORT = 1;
  3306. struct dsi_parser_utils *utils;
  3307. struct device_node *timings_np, *child_np;
  3308. int num_dfps_rates;
  3309. int num_video_modes = 0, num_cmd_modes = 0;
  3310. int count, rc = 0;
  3311. u32 dsc_count = 0, lm_count = 0;
  3312. if (!panel) {
  3313. DSI_ERR("invalid params\n");
  3314. return -EINVAL;
  3315. }
  3316. utils = &panel->utils;
  3317. panel->num_timing_nodes = 0;
  3318. timings_np = utils->get_child_by_name(utils->data,
  3319. "qcom,mdss-dsi-display-timings");
  3320. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  3321. DSI_ERR("no display timing nodes defined\n");
  3322. rc = -EINVAL;
  3323. goto error;
  3324. }
  3325. count = utils->get_child_count(timings_np);
  3326. if ((!count && !panel->host_config.ext_bridge_mode) ||
  3327. count > DSI_MODE_MAX) {
  3328. DSI_ERR("invalid count of timing nodes: %d\n", count);
  3329. rc = -EINVAL;
  3330. goto error;
  3331. }
  3332. /* No multiresolution support is available for video mode panels.
  3333. * Multi-mode is supported for video mode during POMS is enabled.
  3334. */
  3335. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  3336. !panel->host_config.ext_bridge_mode &&
  3337. !panel->panel_mode_switch_enabled)
  3338. count = SINGLE_MODE_SUPPORT;
  3339. panel->num_timing_nodes = count;
  3340. dsi_for_each_child_node(timings_np, child_np) {
  3341. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  3342. num_video_modes++;
  3343. else if (utils->read_bool(child_np,
  3344. "qcom,mdss-dsi-cmd-mode"))
  3345. num_cmd_modes++;
  3346. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  3347. num_video_modes++;
  3348. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  3349. num_cmd_modes++;
  3350. dsi_panel_get_max_res_count(utils, child_np,
  3351. &dsc_count, &lm_count);
  3352. panel->dsc_count = max(dsc_count, panel->dsc_count);
  3353. panel->lm_count = max(lm_count, panel->lm_count);
  3354. }
  3355. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  3356. panel->dfps_caps.dfps_list_len;
  3357. /*
  3358. * Inflate num_of_modes by fps in dfps.
  3359. * Single command mode for video mode panels supporting
  3360. * panel operating mode switch.
  3361. */
  3362. num_video_modes = num_video_modes * num_dfps_rates;
  3363. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  3364. (panel->panel_mode_switch_enabled))
  3365. num_cmd_modes = 1;
  3366. panel->num_display_modes = num_video_modes + num_cmd_modes;
  3367. error:
  3368. return rc;
  3369. }
  3370. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  3371. struct dsi_panel_phy_props *phy_props)
  3372. {
  3373. int rc = 0;
  3374. if (!panel || !phy_props) {
  3375. DSI_ERR("invalid params\n");
  3376. return -EINVAL;
  3377. }
  3378. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  3379. return rc;
  3380. }
  3381. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  3382. struct dsi_dfps_capabilities *dfps_caps)
  3383. {
  3384. int rc = 0;
  3385. if (!panel || !dfps_caps) {
  3386. DSI_ERR("invalid params\n");
  3387. return -EINVAL;
  3388. }
  3389. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  3390. return rc;
  3391. }
  3392. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  3393. {
  3394. int i;
  3395. if (!mode->priv_info)
  3396. return;
  3397. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  3398. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3399. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3400. }
  3401. kfree(mode->priv_info);
  3402. }
  3403. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  3404. struct dsi_display_mode *mode, u32 frame_threshold_us)
  3405. {
  3406. u32 frame_time_us, nslices;
  3407. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  3408. dsi_transfer_time_us, pixel_clk_khz;
  3409. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3410. struct dsi_mode_info *timing = &mode->timing;
  3411. struct dsi_display_mode *display_mode;
  3412. u32 jitter_numer, jitter_denom, prefill_lines;
  3413. u32 default_prefill_lines, actual_prefill_lines, vtotal;
  3414. u32 min_threshold_us, prefill_time_us, max_transfer_us, packet_overhead;
  3415. u32 bits_per_symbol = 16, num_of_symbols = 7; /* For Cphy */
  3416. u16 bpp;
  3417. /* Packet overhead in bits,
  3418. * DPHY: 4 bytes header + 2 bytes checksum + 1 byte dcs data command.
  3419. * CPHY: 8 bytes header + 4 bytes checksum + 2 bytes SYNC +
  3420. * 1 byte dcs data command.
  3421. */
  3422. if (config->phy_type & DSI_PHY_TYPE_CPHY)
  3423. packet_overhead = 120;
  3424. else
  3425. packet_overhead = 56;
  3426. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3427. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3428. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3429. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3430. if (timing->refresh_rate >= 120)
  3431. frame_threshold_us = HIGH_REFRESH_RATE_THRESHOLD_TIME_US;
  3432. if (timing->dsc_enabled) {
  3433. nslices = (timing->h_active)/(dsc->config.slice_width);
  3434. /* (slice width x bit-per-pixel + packet overhead) x
  3435. * number of slices x height x fps / lane
  3436. */
  3437. bpp = DSC_BPP(dsc->config);
  3438. bits_per_line = ((dsc->config.slice_width * bpp) +
  3439. packet_overhead) * nslices;
  3440. bits_per_line = bits_per_line / (config->num_data_lanes);
  3441. min_bitclk_hz = (bits_per_line * timing->v_active *
  3442. timing->refresh_rate);
  3443. } else {
  3444. total_active_pixels = ((dsi_h_active_dce(timing)
  3445. * timing->v_active));
  3446. /* calculate the actual bitclk needed to transfer the frame */
  3447. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3448. (config->bpp));
  3449. do_div(min_bitclk_hz, config->num_data_lanes);
  3450. }
  3451. timing->min_dsi_clk_hz = min_bitclk_hz;
  3452. if (config->phy_type == DSI_PHY_TYPE_CPHY) {
  3453. do_div(timing->min_dsi_clk_hz, bits_per_symbol);
  3454. timing->min_dsi_clk_hz *= num_of_symbols;
  3455. }
  3456. /*
  3457. * Apart from prefill line time, we need to take into account RSCC mode threshold time. In
  3458. * cases where RSC is disabled, as jitter is no longer considered we need to make sure we
  3459. * have enough time for DCS command transfer. As of now, the RSC threshold time and DCS
  3460. * threshold time are configured to 40us.
  3461. */
  3462. if (mode->priv_info->disable_rsc_solver) {
  3463. min_threshold_us = DCS_COMMAND_THRESHOLD_TIME_US;
  3464. } else {
  3465. min_threshold_us = mult_frac(frame_time_us, jitter_numer, (jitter_denom * 100));
  3466. min_threshold_us += RSCC_MODE_THRESHOLD_TIME_US;
  3467. }
  3468. /*
  3469. * Increase the prefill_lines proportionately as recommended
  3470. * 40lines for 60fps, 60 for 90fps, 120lines for 120fps, and so on.
  3471. */
  3472. default_prefill_lines = mult_frac(MIN_PREFILL_LINES, timing->refresh_rate, 60);
  3473. actual_prefill_lines = timing->v_back_porch + timing->v_front_porch + timing->v_sync_width;
  3474. vtotal = actual_prefill_lines + timing->v_active;
  3475. /* consider the max of default prefill lines and actual prefill lines */
  3476. prefill_lines = max(actual_prefill_lines, default_prefill_lines);
  3477. prefill_time_us = mult_frac(frame_time_us, prefill_lines, vtotal);
  3478. min_threshold_us = min_threshold_us + prefill_time_us;
  3479. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3480. if (timing->clk_rate_hz) {
  3481. /* adjust the transfer time proportionately for bit clk*/
  3482. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3483. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3484. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3485. } else if (mode->priv_info->mdp_transfer_time_us) {
  3486. max_transfer_us = frame_time_us - min_threshold_us;
  3487. mode->priv_info->mdp_transfer_time_us = min(
  3488. mode->priv_info->mdp_transfer_time_us,
  3489. max_transfer_us);
  3490. timing->dsi_transfer_time_us =
  3491. mode->priv_info->mdp_transfer_time_us;
  3492. } else {
  3493. if ((min_threshold_us > frame_threshold_us) ||
  3494. (mode->priv_info->disable_rsc_solver))
  3495. frame_threshold_us = min_threshold_us;
  3496. timing->dsi_transfer_time_us = frame_time_us -
  3497. frame_threshold_us;
  3498. }
  3499. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3500. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3501. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3502. timing->mdp_transfer_time_us =
  3503. mode->priv_info->mdp_transfer_time_us;
  3504. }
  3505. /* Calculate pclk_khz to update modeinfo */
  3506. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3507. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3508. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3509. do_div(pixel_clk_khz, config->bpp);
  3510. display_mode->pixel_clk_khz = pixel_clk_khz;
  3511. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3512. }
  3513. int dsi_panel_get_mode(struct dsi_panel *panel,
  3514. u32 index, struct dsi_display_mode *mode,
  3515. int topology_override)
  3516. {
  3517. struct device_node *timings_np, *child_np;
  3518. struct dsi_parser_utils *utils;
  3519. struct dsi_display_mode_priv_info *prv_info;
  3520. u32 child_idx = 0;
  3521. int rc = 0, num_timings;
  3522. int traffic_mode;
  3523. void *utils_data = NULL;
  3524. if (!panel || !mode) {
  3525. DSI_ERR("invalid params\n");
  3526. return -EINVAL;
  3527. }
  3528. mutex_lock(&panel->panel_lock);
  3529. utils = &panel->utils;
  3530. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3531. if (!mode->priv_info) {
  3532. rc = -ENOMEM;
  3533. goto done;
  3534. }
  3535. prv_info = mode->priv_info;
  3536. timings_np = utils->get_child_by_name(utils->data,
  3537. "qcom,mdss-dsi-display-timings");
  3538. if (!timings_np) {
  3539. DSI_ERR("no display timing nodes defined\n");
  3540. rc = -EINVAL;
  3541. goto parse_fail;
  3542. }
  3543. num_timings = utils->get_child_count(timings_np);
  3544. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3545. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3546. rc = -EINVAL;
  3547. goto parse_fail;
  3548. }
  3549. utils_data = utils->data;
  3550. traffic_mode = panel->video_config.traffic_mode;
  3551. dsi_for_each_child_node(timings_np, child_np) {
  3552. if (index != child_idx++)
  3553. continue;
  3554. utils->data = child_np;
  3555. if (panel->panel_mode_switch_enabled) {
  3556. if (!dsi_panel_parse_panel_mode_caps(mode, utils)) {
  3557. mode->panel_mode_caps = panel->panel_mode;
  3558. DSI_INFO("panel mode isn't specified in timing[%d]\n",
  3559. child_idx);
  3560. }
  3561. } else {
  3562. mode->panel_mode_caps = panel->panel_mode;
  3563. }
  3564. rc = utils->read_u32(utils->data, "cell-index", &mode->mode_idx);
  3565. if (rc)
  3566. mode->mode_idx = index;
  3567. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3568. if (rc) {
  3569. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3570. goto parse_fail;
  3571. }
  3572. if (panel->dyn_clk_caps.dyn_clk_support) {
  3573. rc = dsi_panel_parse_dyn_clk_list(mode, utils);
  3574. if (rc)
  3575. DSI_ERR("failed to parse dynamic clk rates, rc=%d\n", rc);
  3576. }
  3577. rc = dsi_panel_parse_dsc_params(mode, utils);
  3578. if (rc) {
  3579. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3580. goto parse_fail;
  3581. }
  3582. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode);
  3583. if (rc) {
  3584. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3585. goto parse_fail;
  3586. }
  3587. rc = dsi_panel_parse_topology(prv_info, utils,
  3588. topology_override);
  3589. if (rc) {
  3590. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3591. goto parse_fail;
  3592. }
  3593. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3594. if (rc) {
  3595. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3596. goto parse_fail;
  3597. }
  3598. rc = dsi_panel_parse_jitter_config(mode, utils);
  3599. if (rc)
  3600. DSI_ERR(
  3601. "failed to parse panel jitter config, rc=%d\n", rc);
  3602. rc = dsi_panel_parse_phy_timing(mode, utils);
  3603. if (rc) {
  3604. DSI_ERR(
  3605. "failed to parse panel phy timings, rc=%d\n", rc);
  3606. goto parse_fail;
  3607. }
  3608. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3609. if (rc)
  3610. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3611. }
  3612. goto done;
  3613. parse_fail:
  3614. kfree(mode->priv_info);
  3615. mode->priv_info = NULL;
  3616. done:
  3617. utils->data = utils_data;
  3618. mutex_unlock(&panel->panel_lock);
  3619. return rc;
  3620. }
  3621. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3622. struct dsi_display_mode *mode,
  3623. struct dsi_host_config *config)
  3624. {
  3625. int rc = 0;
  3626. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3627. if (!panel || !mode || !config) {
  3628. DSI_ERR("invalid params\n");
  3629. return -EINVAL;
  3630. }
  3631. mutex_lock(&panel->panel_lock);
  3632. config->panel_mode = panel->panel_mode;
  3633. memcpy(&config->common_config, &panel->host_config,
  3634. sizeof(config->common_config));
  3635. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3636. memcpy(&config->u.video_engine, &panel->video_config,
  3637. sizeof(config->u.video_engine));
  3638. } else {
  3639. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3640. sizeof(config->u.cmd_engine));
  3641. }
  3642. memcpy(&config->video_timing, &mode->timing,
  3643. sizeof(config->video_timing));
  3644. config->video_timing.mdp_transfer_time_us =
  3645. mode->priv_info->mdp_transfer_time_us;
  3646. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3647. config->video_timing.dsc = &mode->priv_info->dsc;
  3648. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3649. config->video_timing.vdc = &mode->priv_info->vdc;
  3650. if (dyn_clk_caps->dyn_clk_support)
  3651. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3652. else
  3653. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3654. config->esc_clk_rate_hz = 19200000;
  3655. mutex_unlock(&panel->panel_lock);
  3656. return rc;
  3657. }
  3658. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3659. {
  3660. int rc = 0;
  3661. if (!panel) {
  3662. DSI_ERR("invalid params\n");
  3663. return -EINVAL;
  3664. }
  3665. mutex_lock(&panel->panel_lock);
  3666. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3667. if (panel->lp11_init)
  3668. goto error;
  3669. rc = dsi_panel_power_on(panel);
  3670. if (rc) {
  3671. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3672. goto error;
  3673. }
  3674. error:
  3675. mutex_unlock(&panel->panel_lock);
  3676. return rc;
  3677. }
  3678. int dsi_panel_update_pps(struct dsi_panel *panel)
  3679. {
  3680. int rc = 0;
  3681. struct dsi_panel_cmd_set *set = NULL;
  3682. struct dsi_display_mode_priv_info *priv_info = NULL;
  3683. if (!panel || !panel->cur_mode) {
  3684. DSI_ERR("invalid params\n");
  3685. return -EINVAL;
  3686. }
  3687. mutex_lock(&panel->panel_lock);
  3688. priv_info = panel->cur_mode->priv_info;
  3689. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3690. if (priv_info->dsc_enabled)
  3691. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3692. panel->dce_pps_cmd, 0,
  3693. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3694. else if (priv_info->vdc_enabled)
  3695. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3696. panel->dce_pps_cmd, 0,
  3697. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3698. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3699. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3700. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3701. if (rc) {
  3702. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3703. goto error;
  3704. }
  3705. }
  3706. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3707. if (rc) {
  3708. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3709. panel->name, rc);
  3710. }
  3711. dsi_panel_destroy_cmd_packets(set);
  3712. error:
  3713. mutex_unlock(&panel->panel_lock);
  3714. return rc;
  3715. }
  3716. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3717. {
  3718. int rc = 0;
  3719. if (!panel) {
  3720. DSI_ERR("invalid params\n");
  3721. return -EINVAL;
  3722. }
  3723. mutex_lock(&panel->panel_lock);
  3724. if (!panel->panel_initialized)
  3725. goto exit;
  3726. /*
  3727. * Consider LP1->LP2->LP1.
  3728. * If the panel is already in LP mode, do not need to
  3729. * set the regulator.
  3730. * IBB and AB power mode would be set at the same time
  3731. * in PMIC driver, so we only call ibb setting that is enough.
  3732. */
  3733. if (dsi_panel_is_type_oled(panel) &&
  3734. panel->power_mode != SDE_MODE_DPMS_LP2)
  3735. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3736. "ibb", REGULATOR_MODE_IDLE);
  3737. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3738. if (rc)
  3739. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3740. panel->name, rc);
  3741. exit:
  3742. mutex_unlock(&panel->panel_lock);
  3743. return rc;
  3744. }
  3745. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3746. {
  3747. int rc = 0;
  3748. if (!panel) {
  3749. DSI_ERR("invalid params\n");
  3750. return -EINVAL;
  3751. }
  3752. mutex_lock(&panel->panel_lock);
  3753. if (!panel->panel_initialized)
  3754. goto exit;
  3755. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3756. if (rc)
  3757. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3758. panel->name, rc);
  3759. exit:
  3760. mutex_unlock(&panel->panel_lock);
  3761. return rc;
  3762. }
  3763. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3764. {
  3765. int rc = 0;
  3766. if (!panel) {
  3767. DSI_ERR("invalid params\n");
  3768. return -EINVAL;
  3769. }
  3770. mutex_lock(&panel->panel_lock);
  3771. if (!panel->panel_initialized)
  3772. goto exit;
  3773. /*
  3774. * Consider about LP1->LP2->NOLP.
  3775. */
  3776. if (dsi_panel_is_type_oled(panel) &&
  3777. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3778. panel->power_mode == SDE_MODE_DPMS_LP2))
  3779. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3780. "ibb", REGULATOR_MODE_NORMAL);
  3781. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3782. if (rc)
  3783. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3784. panel->name, rc);
  3785. exit:
  3786. mutex_unlock(&panel->panel_lock);
  3787. return rc;
  3788. }
  3789. int dsi_panel_prepare(struct dsi_panel *panel)
  3790. {
  3791. int rc = 0;
  3792. if (!panel) {
  3793. DSI_ERR("invalid params\n");
  3794. return -EINVAL;
  3795. }
  3796. mutex_lock(&panel->panel_lock);
  3797. if (panel->lp11_init) {
  3798. rc = dsi_panel_power_on(panel);
  3799. if (rc) {
  3800. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3801. panel->name, rc);
  3802. goto error;
  3803. }
  3804. }
  3805. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3806. if (rc) {
  3807. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3808. panel->name, rc);
  3809. goto error;
  3810. }
  3811. error:
  3812. mutex_unlock(&panel->panel_lock);
  3813. return rc;
  3814. }
  3815. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3816. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3817. {
  3818. static const int ROI_CMD_LEN = 5;
  3819. int rc = 0;
  3820. /* DTYPE_DCS_LWRITE */
  3821. char *caset, *paset;
  3822. set->cmds = NULL;
  3823. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3824. if (!caset) {
  3825. rc = -ENOMEM;
  3826. goto exit;
  3827. }
  3828. caset[0] = 0x2a;
  3829. caset[1] = (roi->x & 0xFF00) >> 8;
  3830. caset[2] = roi->x & 0xFF;
  3831. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3832. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3833. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3834. if (!paset) {
  3835. rc = -ENOMEM;
  3836. goto error_free_mem;
  3837. }
  3838. paset[0] = 0x2b;
  3839. paset[1] = (roi->y & 0xFF00) >> 8;
  3840. paset[2] = roi->y & 0xFF;
  3841. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3842. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3843. set->type = DSI_CMD_SET_ROI;
  3844. set->state = DSI_CMD_SET_STATE_LP;
  3845. set->count = 2; /* send caset + paset together */
  3846. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3847. if (!set->cmds) {
  3848. rc = -ENOMEM;
  3849. goto error_free_mem;
  3850. }
  3851. set->cmds[0].msg.channel = 0;
  3852. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3853. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3854. set->cmds[0].msg.flags |= MIPI_DSI_MSG_BATCH_COMMAND;
  3855. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3856. set->cmds[0].msg.tx_buf = caset;
  3857. set->cmds[0].msg.rx_len = 0;
  3858. set->cmds[0].msg.rx_buf = 0;
  3859. set->cmds[0].last_command = 0;
  3860. set->cmds[0].post_wait_ms = 0;
  3861. set->cmds[0].ctrl = unicast ? ctrl_idx : 0;
  3862. set->cmds[1].msg.channel = 0;
  3863. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3864. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3865. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3866. set->cmds[1].msg.tx_buf = paset;
  3867. set->cmds[1].msg.rx_len = 0;
  3868. set->cmds[1].msg.rx_buf = 0;
  3869. set->cmds[1].last_command = 1;
  3870. set->cmds[1].post_wait_ms = 0;
  3871. set->cmds[1].ctrl = unicast ? ctrl_idx : 0;
  3872. goto exit;
  3873. error_free_mem:
  3874. kfree(caset);
  3875. kfree(paset);
  3876. kfree(set->cmds);
  3877. exit:
  3878. return rc;
  3879. }
  3880. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3881. int ctrl_idx)
  3882. {
  3883. int rc = 0;
  3884. if (!panel) {
  3885. DSI_ERR("invalid params\n");
  3886. return -EINVAL;
  3887. }
  3888. mutex_lock(&panel->panel_lock);
  3889. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3890. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3891. if (rc)
  3892. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3893. panel->name, rc);
  3894. mutex_unlock(&panel->panel_lock);
  3895. return rc;
  3896. }
  3897. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3898. int ctrl_idx)
  3899. {
  3900. int rc = 0;
  3901. if (!panel) {
  3902. DSI_ERR("invalid params\n");
  3903. return -EINVAL;
  3904. }
  3905. mutex_lock(&panel->panel_lock);
  3906. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3907. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3908. if (rc)
  3909. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3910. panel->name, rc);
  3911. mutex_unlock(&panel->panel_lock);
  3912. return rc;
  3913. }
  3914. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3915. struct dsi_rect *roi)
  3916. {
  3917. int rc = 0;
  3918. struct dsi_panel_cmd_set *set;
  3919. struct dsi_display_mode_priv_info *priv_info;
  3920. if (!panel || !panel->cur_mode) {
  3921. DSI_ERR("Invalid params\n");
  3922. return -EINVAL;
  3923. }
  3924. priv_info = panel->cur_mode->priv_info;
  3925. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3926. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3927. if (rc) {
  3928. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3929. panel->name, rc);
  3930. return rc;
  3931. }
  3932. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3933. roi->x, roi->y, roi->w, roi->h);
  3934. SDE_EVT32(roi->x, roi->y, roi->w, roi->h);
  3935. mutex_lock(&panel->panel_lock);
  3936. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3937. if (rc)
  3938. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3939. panel->name, rc);
  3940. mutex_unlock(&panel->panel_lock);
  3941. dsi_panel_destroy_cmd_packets(set);
  3942. dsi_panel_dealloc_cmd_packets(set);
  3943. return rc;
  3944. }
  3945. int dsi_panel_switch_cmd_mode_out(struct dsi_panel *panel)
  3946. {
  3947. int rc = 0;
  3948. if (!panel) {
  3949. DSI_ERR("Invalid params\n");
  3950. return -EINVAL;
  3951. }
  3952. mutex_lock(&panel->panel_lock);
  3953. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_OUT);
  3954. if (rc)
  3955. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_OUT cmds, rc=%d\n",
  3956. panel->name, rc);
  3957. mutex_unlock(&panel->panel_lock);
  3958. return rc;
  3959. }
  3960. int dsi_panel_switch_video_mode_out(struct dsi_panel *panel)
  3961. {
  3962. int rc = 0;
  3963. if (!panel) {
  3964. DSI_ERR("Invalid params\n");
  3965. return -EINVAL;
  3966. }
  3967. mutex_lock(&panel->panel_lock);
  3968. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_OUT);
  3969. if (rc)
  3970. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_OUT cmds, rc=%d\n",
  3971. panel->name, rc);
  3972. mutex_unlock(&panel->panel_lock);
  3973. return rc;
  3974. }
  3975. int dsi_panel_switch_video_mode_in(struct dsi_panel *panel)
  3976. {
  3977. int rc = 0;
  3978. if (!panel) {
  3979. DSI_ERR("Invalid params\n");
  3980. return -EINVAL;
  3981. }
  3982. mutex_lock(&panel->panel_lock);
  3983. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_IN);
  3984. if (rc)
  3985. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_IN cmds, rc=%d\n",
  3986. panel->name, rc);
  3987. mutex_unlock(&panel->panel_lock);
  3988. return rc;
  3989. }
  3990. int dsi_panel_switch_cmd_mode_in(struct dsi_panel *panel)
  3991. {
  3992. int rc = 0;
  3993. if (!panel) {
  3994. DSI_ERR("Invalid params\n");
  3995. return -EINVAL;
  3996. }
  3997. mutex_lock(&panel->panel_lock);
  3998. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_IN);
  3999. if (rc)
  4000. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_IN cmds, rc=%d\n",
  4001. panel->name, rc);
  4002. mutex_unlock(&panel->panel_lock);
  4003. return rc;
  4004. }
  4005. int dsi_panel_switch(struct dsi_panel *panel)
  4006. {
  4007. int rc = 0;
  4008. if (!panel) {
  4009. DSI_ERR("Invalid params\n");
  4010. return -EINVAL;
  4011. }
  4012. mutex_lock(&panel->panel_lock);
  4013. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  4014. if (rc)
  4015. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  4016. panel->name, rc);
  4017. mutex_unlock(&panel->panel_lock);
  4018. return rc;
  4019. }
  4020. int dsi_panel_post_switch(struct dsi_panel *panel)
  4021. {
  4022. int rc = 0;
  4023. if (!panel) {
  4024. DSI_ERR("Invalid params\n");
  4025. return -EINVAL;
  4026. }
  4027. mutex_lock(&panel->panel_lock);
  4028. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  4029. if (rc)
  4030. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  4031. panel->name, rc);
  4032. mutex_unlock(&panel->panel_lock);
  4033. return rc;
  4034. }
  4035. int dsi_panel_enable(struct dsi_panel *panel)
  4036. {
  4037. int rc = 0;
  4038. if (!panel) {
  4039. DSI_ERR("Invalid params\n");
  4040. return -EINVAL;
  4041. }
  4042. mutex_lock(&panel->panel_lock);
  4043. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  4044. if (rc) {
  4045. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  4046. panel->name, rc);
  4047. goto error;
  4048. }
  4049. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  4050. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_ON);
  4051. if (rc) {
  4052. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_ON cmds, rc=%d\n",
  4053. panel->name, rc);
  4054. goto error;
  4055. }
  4056. } else if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  4057. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_ON);
  4058. if (rc) {
  4059. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_ON cmds, rc=%d\n",
  4060. panel->name, rc);
  4061. goto error;
  4062. }
  4063. }
  4064. panel->panel_initialized = true;
  4065. error:
  4066. mutex_unlock(&panel->panel_lock);
  4067. return rc;
  4068. }
  4069. int dsi_panel_post_enable(struct dsi_panel *panel)
  4070. {
  4071. int rc = 0;
  4072. if (!panel) {
  4073. DSI_ERR("invalid params\n");
  4074. return -EINVAL;
  4075. }
  4076. mutex_lock(&panel->panel_lock);
  4077. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  4078. if (rc) {
  4079. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  4080. panel->name, rc);
  4081. goto error;
  4082. }
  4083. error:
  4084. mutex_unlock(&panel->panel_lock);
  4085. return rc;
  4086. }
  4087. int dsi_panel_pre_disable(struct dsi_panel *panel)
  4088. {
  4089. int rc = 0;
  4090. if (!panel) {
  4091. DSI_ERR("invalid params\n");
  4092. return -EINVAL;
  4093. }
  4094. mutex_lock(&panel->panel_lock);
  4095. if (gpio_is_valid(panel->bl_config.en_gpio))
  4096. gpio_set_value(panel->bl_config.en_gpio, 0);
  4097. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  4098. if (rc) {
  4099. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  4100. panel->name, rc);
  4101. goto error;
  4102. }
  4103. error:
  4104. mutex_unlock(&panel->panel_lock);
  4105. return rc;
  4106. }
  4107. int dsi_panel_disable(struct dsi_panel *panel)
  4108. {
  4109. int rc = 0;
  4110. if (!panel) {
  4111. DSI_ERR("invalid params\n");
  4112. return -EINVAL;
  4113. }
  4114. mutex_lock(&panel->panel_lock);
  4115. /* Avoid sending panel off commands when ESD recovery is underway */
  4116. if (!atomic_read(&panel->esd_recovery_pending)) {
  4117. /*
  4118. * Need to set IBB/AB regulator mode to STANDBY,
  4119. * if panel is going off from AOD mode.
  4120. */
  4121. if (dsi_panel_is_type_oled(panel) &&
  4122. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  4123. panel->power_mode == SDE_MODE_DPMS_LP2))
  4124. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  4125. "ibb", REGULATOR_MODE_STANDBY);
  4126. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  4127. if (rc) {
  4128. /*
  4129. * Sending panel off commands may fail when DSI
  4130. * controller is in a bad state. These failures can be
  4131. * ignored since controller will go for full reset on
  4132. * subsequent display enable anyway.
  4133. */
  4134. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  4135. panel->name, rc);
  4136. rc = 0;
  4137. }
  4138. }
  4139. panel->panel_initialized = false;
  4140. panel->power_mode = SDE_MODE_DPMS_OFF;
  4141. mutex_unlock(&panel->panel_lock);
  4142. return rc;
  4143. }
  4144. int dsi_panel_unprepare(struct dsi_panel *panel)
  4145. {
  4146. int rc = 0;
  4147. if (!panel) {
  4148. DSI_ERR("invalid params\n");
  4149. return -EINVAL;
  4150. }
  4151. mutex_lock(&panel->panel_lock);
  4152. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  4153. if (rc) {
  4154. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  4155. panel->name, rc);
  4156. goto error;
  4157. }
  4158. error:
  4159. mutex_unlock(&panel->panel_lock);
  4160. return rc;
  4161. }
  4162. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  4163. {
  4164. int rc = 0;
  4165. if (!panel) {
  4166. DSI_ERR("invalid params\n");
  4167. return -EINVAL;
  4168. }
  4169. mutex_lock(&panel->panel_lock);
  4170. rc = dsi_panel_power_off(panel);
  4171. if (rc) {
  4172. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  4173. panel->name, rc);
  4174. goto error;
  4175. }
  4176. error:
  4177. mutex_unlock(&panel->panel_lock);
  4178. return rc;
  4179. }