sdm660-internal.c 93 KB

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  1. /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/of_gpio.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/module.h>
  15. #include <sound/pcm_params.h>
  16. #include "msm-pcm-routing-v2.h"
  17. #include "sdm660-common.h"
  18. #include "codecs/msm-cdc-pinctrl.h"
  19. #include "codecs/sdm660_cdc/msm-digital-cdc.h"
  20. #include "codecs/sdm660_cdc/msm-analog-cdc.h"
  21. #include "codecs/msm_sdw/msm_sdw.h"
  22. #include <linux/pm_qos.h>
  23. #define __CHIPSET__ "SDM660 "
  24. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  25. #define WCD_MBHC_DEF_RLOADS 5
  26. #define WCN_CDC_SLIM_RX_CH_MAX 2
  27. #define WCN_CDC_SLIM_TX_CH_MAX 3
  28. #define WSA8810_NAME_1 "wsa881x.20170211"
  29. #define WSA8810_NAME_2 "wsa881x.20170212"
  30. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  31. enum {
  32. INT0_MI2S = 0,
  33. INT1_MI2S,
  34. INT2_MI2S,
  35. INT3_MI2S,
  36. INT4_MI2S,
  37. INT5_MI2S,
  38. INT6_MI2S,
  39. INT_MI2S_MAX,
  40. };
  41. enum {
  42. BT_SLIM7,
  43. FM_SLIM8,
  44. SLIM_MAX,
  45. };
  46. /*TDM default offset currently only supporting TDM_RX_0 and TDM_TX_0 */
  47. static unsigned int tdm_slot_offset[TDM_PORT_MAX][TDM_SLOT_OFFSET_MAX] = {
  48. {0, 4, 8, 12, 16, 20, 24, 28},/* TX_0 | RX_0 */
  49. {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_1 | RX_1 */
  50. {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_2 | RX_2 */
  51. {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_3 | RX_3 */
  52. {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_4 | RX_4 */
  53. {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_5 | RX_5 */
  54. {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_6 | RX_6 */
  55. {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_7 | RX_7 */
  56. };
  57. static struct afe_clk_set int_mi2s_clk[INT_MI2S_MAX] = {
  58. {
  59. AFE_API_VERSION_I2S_CONFIG,
  60. Q6AFE_LPASS_CLK_ID_INT0_MI2S_IBIT,
  61. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  62. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  63. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  64. 0,
  65. },
  66. {
  67. AFE_API_VERSION_I2S_CONFIG,
  68. Q6AFE_LPASS_CLK_ID_INT1_MI2S_IBIT,
  69. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  70. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  71. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  72. 0,
  73. },
  74. {
  75. AFE_API_VERSION_I2S_CONFIG,
  76. Q6AFE_LPASS_CLK_ID_INT2_MI2S_IBIT,
  77. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  78. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  79. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  80. 0,
  81. },
  82. {
  83. AFE_API_VERSION_I2S_CONFIG,
  84. Q6AFE_LPASS_CLK_ID_INT3_MI2S_IBIT,
  85. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  86. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  87. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  88. 0,
  89. },
  90. {
  91. AFE_API_VERSION_I2S_CONFIG,
  92. Q6AFE_LPASS_CLK_ID_INT4_MI2S_IBIT,
  93. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  94. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  95. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  96. 0,
  97. },
  98. {
  99. AFE_API_VERSION_I2S_CONFIG,
  100. Q6AFE_LPASS_CLK_ID_INT5_MI2S_IBIT,
  101. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  102. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  103. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  104. 0,
  105. },
  106. {
  107. AFE_API_VERSION_I2S_CONFIG,
  108. Q6AFE_LPASS_CLK_ID_INT6_MI2S_IBIT,
  109. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  110. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  111. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  112. 0,
  113. },
  114. };
  115. struct dev_config {
  116. u32 sample_rate;
  117. u32 bit_format;
  118. u32 channels;
  119. };
  120. /* Default configuration of MI2S channels */
  121. static struct dev_config int_mi2s_cfg[] = {
  122. [INT0_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  123. [INT1_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  124. [INT2_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  125. [INT3_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  126. [INT4_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  127. [INT5_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  128. [INT6_MI2S] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  129. };
  130. static struct dev_config bt_fm_cfg[] = {
  131. [BT_SLIM7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  132. [FM_SLIM8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  133. };
  134. static char const *int_mi2s_rate_text[] = {"KHZ_8", "KHZ_16",
  135. "KHZ_32", "KHZ_44P1", "KHZ_48",
  136. "KHZ_96", "KHZ_192"};
  137. static const char *const int_mi2s_ch_text[] = {"One", "Two"};
  138. static const char *const int_mi2s_tx_ch_text[] = {"One", "Two",
  139. "Three", "Four"};
  140. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE"};
  141. static const char *const loopback_mclk_text[] = {"DISABLE", "ENABLE"};
  142. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  143. "KHZ_44P1", "KHZ_48",
  144. "KHZ_88P2", "KHZ_96"};
  145. static SOC_ENUM_SINGLE_EXT_DECL(int0_mi2s_rx_sample_rate, int_mi2s_rate_text);
  146. static SOC_ENUM_SINGLE_EXT_DECL(int0_mi2s_rx_chs, int_mi2s_ch_text);
  147. static SOC_ENUM_SINGLE_EXT_DECL(int0_mi2s_rx_format, bit_format_text);
  148. static SOC_ENUM_SINGLE_EXT_DECL(int2_mi2s_tx_sample_rate, int_mi2s_rate_text);
  149. static SOC_ENUM_SINGLE_EXT_DECL(int2_mi2s_tx_chs, int_mi2s_tx_ch_text);
  150. static SOC_ENUM_SINGLE_EXT_DECL(int2_mi2s_tx_format, bit_format_text);
  151. static SOC_ENUM_SINGLE_EXT_DECL(int3_mi2s_tx_sample_rate, int_mi2s_rate_text);
  152. static SOC_ENUM_SINGLE_EXT_DECL(int3_mi2s_tx_chs, int_mi2s_tx_ch_text);
  153. static SOC_ENUM_SINGLE_EXT_DECL(int3_mi2s_tx_format, bit_format_text);
  154. static SOC_ENUM_SINGLE_EXT_DECL(int4_mi2s_rx_sample_rate, int_mi2s_rate_text);
  155. static SOC_ENUM_SINGLE_EXT_DECL(int4_mi2s_rx_chs, int_mi2s_ch_text);
  156. static SOC_ENUM_SINGLE_EXT_DECL(int4_mi2s_rx_format, bit_format_text);
  157. static SOC_ENUM_SINGLE_EXT_DECL(int5_mi2s_tx_chs, int_mi2s_ch_text);
  158. static SOC_ENUM_SINGLE_EXT_DECL(loopback_mclk_en, loopback_mclk_text);
  159. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  160. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  161. struct snd_kcontrol *kcontrol, int event);
  162. static int msm_int_enable_dig_cdc_clk(struct snd_soc_codec *codec, int enable,
  163. bool dapm);
  164. static int msm_int_mclk0_event(struct snd_soc_dapm_widget *w,
  165. struct snd_kcontrol *kcontrol, int event);
  166. static int msm_int_mi2s_snd_startup(struct snd_pcm_substream *substream);
  167. static void msm_int_mi2s_snd_shutdown(struct snd_pcm_substream *substream);
  168. static struct wcd_mbhc_config *mbhc_cfg_ptr;
  169. static struct snd_info_entry *codec_root;
  170. static int int_mi2s_get_bit_format_val(int bit_format)
  171. {
  172. int val = 0;
  173. switch (bit_format) {
  174. case SNDRV_PCM_FORMAT_S24_3LE:
  175. val = 2;
  176. break;
  177. case SNDRV_PCM_FORMAT_S24_LE:
  178. val = 1;
  179. break;
  180. case SNDRV_PCM_FORMAT_S16_LE:
  181. default:
  182. val = 0;
  183. break;
  184. }
  185. return val;
  186. }
  187. static int int_mi2s_get_bit_format(int val)
  188. {
  189. int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  190. switch (val) {
  191. case 0:
  192. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  193. break;
  194. case 1:
  195. bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
  196. break;
  197. case 2:
  198. bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
  199. break;
  200. default:
  201. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  202. break;
  203. }
  204. return bit_fmt;
  205. }
  206. static int int_mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  207. {
  208. int port_id = 0;
  209. if (strnstr(kcontrol->id.name, "INT0_MI2S", sizeof("INT0_MI2S")))
  210. port_id = INT0_MI2S;
  211. else if (strnstr(kcontrol->id.name, "INT2_MI2S", sizeof("INT2_MI2S")))
  212. port_id = INT2_MI2S;
  213. else if (strnstr(kcontrol->id.name, "INT3_MI2S", sizeof("INT3_MI2S")))
  214. port_id = INT3_MI2S;
  215. else if (strnstr(kcontrol->id.name, "INT4_MI2S", sizeof("INT4_MI2S")))
  216. port_id = INT4_MI2S;
  217. else {
  218. pr_err("%s: unsupported channel: %s",
  219. __func__, kcontrol->id.name);
  220. return -EINVAL;
  221. }
  222. return port_id;
  223. }
  224. static int int_mi2s_bit_format_get(struct snd_kcontrol *kcontrol,
  225. struct snd_ctl_elem_value *ucontrol)
  226. {
  227. int ch_num = int_mi2s_get_port_idx(kcontrol);
  228. if (ch_num < 0)
  229. return ch_num;
  230. ucontrol->value.enumerated.item[0] =
  231. int_mi2s_get_bit_format_val(int_mi2s_cfg[ch_num].bit_format);
  232. pr_debug("%s: int_mi2s[%d]_bit_format = %d, ucontrol value = %d\n",
  233. __func__, ch_num, int_mi2s_cfg[ch_num].bit_format,
  234. ucontrol->value.enumerated.item[0]);
  235. return 0;
  236. }
  237. static int int_mi2s_bit_format_put(struct snd_kcontrol *kcontrol,
  238. struct snd_ctl_elem_value *ucontrol)
  239. {
  240. int ch_num = int_mi2s_get_port_idx(kcontrol);
  241. if (ch_num < 0)
  242. return ch_num;
  243. int_mi2s_cfg[ch_num].bit_format =
  244. int_mi2s_get_bit_format(ucontrol->value.enumerated.item[0]);
  245. pr_debug("%s: int_mi2s[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  246. __func__, ch_num, int_mi2s_cfg[ch_num].bit_format,
  247. ucontrol->value.enumerated.item[0]);
  248. return 0;
  249. }
  250. static inline int param_is_mask(int p)
  251. {
  252. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  253. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  254. }
  255. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  256. int n)
  257. {
  258. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  259. }
  260. static void param_set_mask(struct snd_pcm_hw_params *p, int n, unsigned int bit)
  261. {
  262. if (bit >= SNDRV_MASK_MAX)
  263. return;
  264. if (param_is_mask(n)) {
  265. struct snd_mask *m = param_to_mask(p, n);
  266. m->bits[0] = 0;
  267. m->bits[1] = 0;
  268. m->bits[bit >> 5] |= (1 << (bit & 31));
  269. }
  270. }
  271. static int int_mi2s_get_sample_rate_val(int sample_rate)
  272. {
  273. int sample_rate_val;
  274. switch (sample_rate) {
  275. case SAMPLING_RATE_8KHZ:
  276. sample_rate_val = 0;
  277. break;
  278. case SAMPLING_RATE_16KHZ:
  279. sample_rate_val = 1;
  280. break;
  281. case SAMPLING_RATE_32KHZ:
  282. sample_rate_val = 2;
  283. break;
  284. case SAMPLING_RATE_44P1KHZ:
  285. sample_rate_val = 3;
  286. break;
  287. case SAMPLING_RATE_48KHZ:
  288. sample_rate_val = 4;
  289. break;
  290. case SAMPLING_RATE_96KHZ:
  291. sample_rate_val = 5;
  292. break;
  293. case SAMPLING_RATE_192KHZ:
  294. sample_rate_val = 6;
  295. break;
  296. default:
  297. sample_rate_val = 4;
  298. break;
  299. }
  300. return sample_rate_val;
  301. }
  302. static int int_mi2s_get_sample_rate(int value)
  303. {
  304. int sample_rate;
  305. switch (value) {
  306. case 0:
  307. sample_rate = SAMPLING_RATE_8KHZ;
  308. break;
  309. case 1:
  310. sample_rate = SAMPLING_RATE_16KHZ;
  311. break;
  312. case 2:
  313. sample_rate = SAMPLING_RATE_32KHZ;
  314. break;
  315. case 3:
  316. sample_rate = SAMPLING_RATE_44P1KHZ;
  317. break;
  318. case 4:
  319. sample_rate = SAMPLING_RATE_48KHZ;
  320. break;
  321. case 5:
  322. sample_rate = SAMPLING_RATE_96KHZ;
  323. break;
  324. case 6:
  325. sample_rate = SAMPLING_RATE_192KHZ;
  326. break;
  327. default:
  328. sample_rate = SAMPLING_RATE_48KHZ;
  329. break;
  330. }
  331. return sample_rate;
  332. }
  333. static int int_mi2s_sample_rate_put(struct snd_kcontrol *kcontrol,
  334. struct snd_ctl_elem_value *ucontrol)
  335. {
  336. int idx = int_mi2s_get_port_idx(kcontrol);
  337. if (idx < 0)
  338. return idx;
  339. int_mi2s_cfg[idx].sample_rate =
  340. int_mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  341. pr_debug("%s: idx[%d]_sample_rate = %d, item = %d\n", __func__,
  342. idx, int_mi2s_cfg[idx].sample_rate,
  343. ucontrol->value.enumerated.item[0]);
  344. return 0;
  345. }
  346. static int int_mi2s_sample_rate_get(struct snd_kcontrol *kcontrol,
  347. struct snd_ctl_elem_value *ucontrol)
  348. {
  349. int idx = int_mi2s_get_port_idx(kcontrol);
  350. if (idx < 0)
  351. return idx;
  352. ucontrol->value.enumerated.item[0] =
  353. int_mi2s_get_sample_rate_val(int_mi2s_cfg[idx].sample_rate);
  354. pr_debug("%s: idx[%d]_sample_rate = %d, item = %d\n", __func__,
  355. idx, int_mi2s_cfg[idx].sample_rate,
  356. ucontrol->value.enumerated.item[0]);
  357. return 0;
  358. }
  359. static int int_mi2s_ch_get(struct snd_kcontrol *kcontrol,
  360. struct snd_ctl_elem_value *ucontrol)
  361. {
  362. int idx = int_mi2s_get_port_idx(kcontrol);
  363. if (idx < 0)
  364. return idx;
  365. pr_debug("%s: int_mi2s_[%d]_rx_ch = %d\n", __func__,
  366. idx, int_mi2s_cfg[idx].channels);
  367. ucontrol->value.enumerated.item[0] = int_mi2s_cfg[idx].channels - 1;
  368. return 0;
  369. }
  370. static int int_mi2s_ch_put(struct snd_kcontrol *kcontrol,
  371. struct snd_ctl_elem_value *ucontrol)
  372. {
  373. int idx = int_mi2s_get_port_idx(kcontrol);
  374. if (idx < 0)
  375. return idx;
  376. int_mi2s_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  377. pr_debug("%s: int_mi2s_[%d]_ch = %d\n", __func__,
  378. idx, int_mi2s_cfg[idx].channels);
  379. return 1;
  380. }
  381. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  382. SND_SOC_DAPM_SUPPLY_S("INT_MCLK0", -1, SND_SOC_NOPM, 0, 0,
  383. msm_int_mclk0_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  384. SND_SOC_DAPM_MIC("Handset Mic", NULL),
  385. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  386. SND_SOC_DAPM_MIC("Secondary Mic", NULL),
  387. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  388. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  389. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  390. SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
  391. };
  392. static int msm_config_hph_compander_gpio(bool enable,
  393. struct snd_soc_codec *codec)
  394. {
  395. struct snd_soc_card *card = codec->component.card;
  396. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  397. int ret = 0;
  398. pr_debug("%s: %s HPH Compander\n", __func__,
  399. enable ? "Enable" : "Disable");
  400. if (enable) {
  401. ret = msm_cdc_pinctrl_select_active_state(pdata->comp_gpio_p);
  402. if (ret) {
  403. pr_err("%s: gpio set cannot be activated %s\n",
  404. __func__, "comp_gpio");
  405. goto done;
  406. }
  407. } else {
  408. ret = msm_cdc_pinctrl_select_sleep_state(pdata->comp_gpio_p);
  409. if (ret) {
  410. pr_err("%s: gpio set cannot be de-activated %s\n",
  411. __func__, "comp_gpio");
  412. goto done;
  413. }
  414. }
  415. done:
  416. return ret;
  417. }
  418. static int is_ext_spk_gpio_support(struct platform_device *pdev,
  419. struct msm_asoc_mach_data *pdata)
  420. {
  421. const char *spk_ext_pa = "qcom,msm-spk-ext-pa";
  422. pr_debug("%s:Enter\n", __func__);
  423. pdata->spk_ext_pa_gpio = of_get_named_gpio(pdev->dev.of_node,
  424. spk_ext_pa, 0);
  425. if (pdata->spk_ext_pa_gpio < 0) {
  426. dev_dbg(&pdev->dev,
  427. "%s: missing %s in dt node\n", __func__, spk_ext_pa);
  428. } else {
  429. if (!gpio_is_valid(pdata->spk_ext_pa_gpio)) {
  430. pr_err("%s: Invalid external speaker gpio: %d",
  431. __func__, pdata->spk_ext_pa_gpio);
  432. return -EINVAL;
  433. }
  434. }
  435. return 0;
  436. }
  437. static int enable_spk_ext_pa(struct snd_soc_codec *codec, int enable)
  438. {
  439. struct snd_soc_card *card = codec->component.card;
  440. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  441. int ret;
  442. if (!gpio_is_valid(pdata->spk_ext_pa_gpio)) {
  443. pr_err("%s: Invalid gpio: %d\n", __func__,
  444. pdata->spk_ext_pa_gpio);
  445. return false;
  446. }
  447. pr_debug("%s: %s external speaker PA\n", __func__,
  448. enable ? "Enable" : "Disable");
  449. if (enable) {
  450. ret = msm_cdc_pinctrl_select_active_state(
  451. pdata->ext_spk_gpio_p);
  452. if (ret) {
  453. pr_err("%s: gpio set cannot be de-activated %s\n",
  454. __func__, "ext_spk_gpio");
  455. return ret;
  456. }
  457. gpio_set_value_cansleep(pdata->spk_ext_pa_gpio, enable);
  458. } else {
  459. gpio_set_value_cansleep(pdata->spk_ext_pa_gpio, enable);
  460. ret = msm_cdc_pinctrl_select_sleep_state(
  461. pdata->ext_spk_gpio_p);
  462. if (ret) {
  463. pr_err("%s: gpio set cannot be de-activated %s\n",
  464. __func__, "ext_spk_gpio");
  465. return ret;
  466. }
  467. }
  468. return 0;
  469. }
  470. static int int_mi2s_get_idx_from_beid(int32_t id)
  471. {
  472. int idx = 0;
  473. switch (id) {
  474. case MSM_BACKEND_DAI_INT0_MI2S_RX:
  475. idx = INT0_MI2S;
  476. break;
  477. case MSM_BACKEND_DAI_INT2_MI2S_TX:
  478. idx = INT2_MI2S;
  479. break;
  480. case MSM_BACKEND_DAI_INT3_MI2S_TX:
  481. idx = INT3_MI2S;
  482. break;
  483. case MSM_BACKEND_DAI_INT4_MI2S_RX:
  484. idx = INT4_MI2S;
  485. break;
  486. case MSM_BACKEND_DAI_INT5_MI2S_TX:
  487. idx = INT5_MI2S;
  488. break;
  489. default:
  490. idx = INT0_MI2S;
  491. break;
  492. }
  493. return idx;
  494. }
  495. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  496. struct snd_pcm_hw_params *params)
  497. {
  498. struct snd_interval *rate = hw_param_interval(params,
  499. SNDRV_PCM_HW_PARAM_RATE);
  500. struct snd_interval *channels = hw_param_interval(params,
  501. SNDRV_PCM_HW_PARAM_CHANNELS);
  502. pr_debug("%s()\n", __func__);
  503. rate->min = rate->max = 48000;
  504. channels->min = channels->max = 2;
  505. return 0;
  506. }
  507. static int int_mi2s_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  508. struct snd_pcm_hw_params *params)
  509. {
  510. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  511. struct snd_interval *rate = hw_param_interval(params,
  512. SNDRV_PCM_HW_PARAM_RATE);
  513. struct snd_interval *channels = hw_param_interval(params,
  514. SNDRV_PCM_HW_PARAM_CHANNELS);
  515. int idx;
  516. pr_debug("%s: format = %d, rate = %d\n",
  517. __func__, params_format(params), params_rate(params));
  518. switch (dai_link->id) {
  519. case MSM_BACKEND_DAI_INT0_MI2S_RX:
  520. case MSM_BACKEND_DAI_INT2_MI2S_TX:
  521. case MSM_BACKEND_DAI_INT3_MI2S_TX:
  522. case MSM_BACKEND_DAI_INT4_MI2S_RX:
  523. case MSM_BACKEND_DAI_INT5_MI2S_TX:
  524. idx = int_mi2s_get_idx_from_beid(dai_link->id);
  525. rate->min = rate->max = int_mi2s_cfg[idx].sample_rate;
  526. channels->min = channels->max =
  527. int_mi2s_cfg[idx].channels;
  528. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  529. int_mi2s_cfg[idx].bit_format);
  530. break;
  531. default:
  532. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  533. break;
  534. }
  535. return 0;
  536. }
  537. static int msm_btfm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  538. struct snd_pcm_hw_params *params)
  539. {
  540. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  541. struct snd_interval *rate = hw_param_interval(params,
  542. SNDRV_PCM_HW_PARAM_RATE);
  543. struct snd_interval *channels = hw_param_interval(params,
  544. SNDRV_PCM_HW_PARAM_CHANNELS);
  545. switch (dai_link->id) {
  546. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  547. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  548. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  549. bt_fm_cfg[BT_SLIM7].bit_format);
  550. rate->min = rate->max = bt_fm_cfg[BT_SLIM7].sample_rate;
  551. channels->min = channels->max =
  552. bt_fm_cfg[BT_SLIM7].channels;
  553. break;
  554. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  555. rate->min = rate->max = bt_fm_cfg[FM_SLIM8].sample_rate;
  556. channels->min = channels->max =
  557. bt_fm_cfg[FM_SLIM8].channels;
  558. break;
  559. default:
  560. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  561. break;
  562. }
  563. return 0;
  564. }
  565. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  566. struct snd_ctl_elem_value *ucontrol)
  567. {
  568. ucontrol->value.integer.value[0] =
  569. (int_mi2s_cfg[INT5_MI2S].channels/2 - 1);
  570. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  571. ucontrol->value.integer.value[0]);
  572. return 0;
  573. }
  574. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  575. struct snd_ctl_elem_value *ucontrol)
  576. {
  577. int_mi2s_cfg[INT5_MI2S].channels =
  578. roundup_pow_of_two(ucontrol->value.integer.value[0] + 2);
  579. pr_debug("%s: msm_vi_feed_tx_ch = %d\n",
  580. __func__, int_mi2s_cfg[INT5_MI2S].channels);
  581. return 1;
  582. }
  583. static int msm_int_enable_dig_cdc_clk(struct snd_soc_codec *codec,
  584. int enable, bool dapm)
  585. {
  586. int ret = 0;
  587. struct msm_asoc_mach_data *pdata = NULL;
  588. int clk_freq_in_hz;
  589. bool int_mclk0_freq_chg = false;
  590. pdata = snd_soc_card_get_drvdata(codec->component.card);
  591. pr_debug("%s: enable %d mclk ref counter %d\n",
  592. __func__, enable,
  593. atomic_read(&pdata->int_mclk0_rsc_ref));
  594. if (enable) {
  595. if (int_mi2s_cfg[INT0_MI2S].sample_rate ==
  596. SAMPLING_RATE_44P1KHZ) {
  597. clk_freq_in_hz = NATIVE_MCLK_RATE;
  598. pdata->native_clk_set = true;
  599. } else {
  600. clk_freq_in_hz = pdata->mclk_freq;
  601. pdata->native_clk_set = false;
  602. }
  603. if (pdata->digital_cdc_core_clk.clk_freq_in_hz
  604. != clk_freq_in_hz)
  605. int_mclk0_freq_chg = true;
  606. if (!atomic_read(&pdata->int_mclk0_rsc_ref) ||
  607. int_mclk0_freq_chg) {
  608. cancel_delayed_work_sync(
  609. &pdata->disable_int_mclk0_work);
  610. mutex_lock(&pdata->cdc_int_mclk0_mutex);
  611. if (atomic_read(&pdata->int_mclk0_enabled) == false ||
  612. int_mclk0_freq_chg) {
  613. if (atomic_read(&pdata->int_mclk0_enabled)) {
  614. pdata->digital_cdc_core_clk.enable = 0;
  615. afe_set_lpass_clock_v2(
  616. AFE_PORT_ID_INT0_MI2S_RX,
  617. &pdata->digital_cdc_core_clk);
  618. }
  619. pdata->digital_cdc_core_clk.clk_freq_in_hz =
  620. clk_freq_in_hz;
  621. pdata->digital_cdc_core_clk.enable = 1;
  622. ret = afe_set_lpass_clock_v2(
  623. AFE_PORT_ID_INT0_MI2S_RX,
  624. &pdata->digital_cdc_core_clk);
  625. if (ret < 0) {
  626. pr_err("%s: failed to enable CCLK\n",
  627. __func__);
  628. mutex_unlock(
  629. &pdata->cdc_int_mclk0_mutex);
  630. return ret;
  631. }
  632. pr_debug("enabled digital codec core clk\n");
  633. atomic_set(&pdata->int_mclk0_enabled, true);
  634. }
  635. mutex_unlock(&pdata->cdc_int_mclk0_mutex);
  636. }
  637. atomic_inc(&pdata->int_mclk0_rsc_ref);
  638. } else {
  639. cancel_delayed_work_sync(&pdata->disable_int_mclk0_work);
  640. mutex_lock(&pdata->cdc_int_mclk0_mutex);
  641. if (atomic_read(&pdata->int_mclk0_enabled) == true) {
  642. pdata->digital_cdc_core_clk.clk_freq_in_hz =
  643. DEFAULT_MCLK_RATE;
  644. pdata->digital_cdc_core_clk.enable = 0;
  645. ret = afe_set_lpass_clock_v2(
  646. AFE_PORT_ID_INT0_MI2S_RX,
  647. &pdata->digital_cdc_core_clk);
  648. if (ret < 0)
  649. pr_err("%s: failed to disable CCLK\n",
  650. __func__);
  651. atomic_set(&pdata->int_mclk0_enabled, false);
  652. atomic_set(&pdata->int_mclk0_rsc_ref, 0);
  653. }
  654. mutex_unlock(&pdata->cdc_int_mclk0_mutex);
  655. }
  656. return ret;
  657. }
  658. static int loopback_mclk_get(struct snd_kcontrol *kcontrol,
  659. struct snd_ctl_elem_value *ucontrol)
  660. {
  661. pr_debug("%s\n", __func__);
  662. return 0;
  663. }
  664. static int loopback_mclk_put(struct snd_kcontrol *kcontrol,
  665. struct snd_ctl_elem_value *ucontrol)
  666. {
  667. int ret = -EINVAL;
  668. struct msm_asoc_mach_data *pdata = NULL;
  669. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  670. pdata = snd_soc_card_get_drvdata(codec->component.card);
  671. pr_debug("%s: mclk_rsc_ref %d enable %ld\n",
  672. __func__, atomic_read(&pdata->int_mclk0_rsc_ref),
  673. ucontrol->value.integer.value[0]);
  674. switch (ucontrol->value.integer.value[0]) {
  675. case 1:
  676. ret = msm_cdc_pinctrl_select_active_state(pdata->pdm_gpio_p);
  677. if (ret) {
  678. pr_err("%s: failed to enable the pri gpios: %d\n",
  679. __func__, ret);
  680. break;
  681. }
  682. mutex_lock(&pdata->cdc_int_mclk0_mutex);
  683. if ((!atomic_read(&pdata->int_mclk0_rsc_ref)) &&
  684. (!atomic_read(&pdata->int_mclk0_enabled))) {
  685. pdata->digital_cdc_core_clk.enable = 1;
  686. ret = afe_set_lpass_clock_v2(
  687. AFE_PORT_ID_INT0_MI2S_RX,
  688. &pdata->digital_cdc_core_clk);
  689. if (ret < 0) {
  690. pr_err("%s: failed to enable the MCLK: %d\n",
  691. __func__, ret);
  692. mutex_unlock(&pdata->cdc_int_mclk0_mutex);
  693. ret = msm_cdc_pinctrl_select_sleep_state(
  694. pdata->pdm_gpio_p);
  695. if (ret)
  696. pr_err("%s: failed to disable the pri gpios: %d\n",
  697. __func__, ret);
  698. break;
  699. }
  700. atomic_set(&pdata->int_mclk0_enabled, true);
  701. }
  702. mutex_unlock(&pdata->cdc_int_mclk0_mutex);
  703. atomic_inc(&pdata->int_mclk0_rsc_ref);
  704. msm_anlg_cdc_mclk_enable(codec, 1, true);
  705. break;
  706. case 0:
  707. if (atomic_read(&pdata->int_mclk0_rsc_ref) <= 0)
  708. break;
  709. msm_anlg_cdc_mclk_enable(codec, 0, true);
  710. mutex_lock(&pdata->cdc_int_mclk0_mutex);
  711. if ((!atomic_dec_return(&pdata->int_mclk0_rsc_ref)) &&
  712. (atomic_read(&pdata->int_mclk0_enabled))) {
  713. pdata->digital_cdc_core_clk.enable = 0;
  714. ret = afe_set_lpass_clock_v2(
  715. AFE_PORT_ID_INT0_MI2S_RX,
  716. &pdata->digital_cdc_core_clk);
  717. if (ret < 0) {
  718. pr_err("%s: failed to disable the CCLK: %d\n",
  719. __func__, ret);
  720. mutex_unlock(&pdata->cdc_int_mclk0_mutex);
  721. break;
  722. }
  723. atomic_set(&pdata->int_mclk0_enabled, false);
  724. }
  725. mutex_unlock(&pdata->cdc_int_mclk0_mutex);
  726. ret = msm_cdc_pinctrl_select_sleep_state(pdata->pdm_gpio_p);
  727. if (ret)
  728. pr_err("%s: failed to disable the pri gpios: %d\n",
  729. __func__, ret);
  730. break;
  731. default:
  732. pr_err("%s: Unexpected input value\n", __func__);
  733. break;
  734. }
  735. return ret;
  736. }
  737. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  738. struct snd_ctl_elem_value *ucontrol)
  739. {
  740. /*
  741. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  742. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  743. * value.
  744. */
  745. switch (bt_fm_cfg[BT_SLIM7].sample_rate) {
  746. case SAMPLING_RATE_96KHZ:
  747. ucontrol->value.integer.value[0] = 5;
  748. break;
  749. case SAMPLING_RATE_88P2KHZ:
  750. ucontrol->value.integer.value[0] = 4;
  751. break;
  752. case SAMPLING_RATE_48KHZ:
  753. ucontrol->value.integer.value[0] = 3;
  754. break;
  755. case SAMPLING_RATE_44P1KHZ:
  756. ucontrol->value.integer.value[0] = 2;
  757. break;
  758. case SAMPLING_RATE_16KHZ:
  759. ucontrol->value.integer.value[0] = 1;
  760. break;
  761. case SAMPLING_RATE_8KHZ:
  762. default:
  763. ucontrol->value.integer.value[0] = 0;
  764. break;
  765. }
  766. pr_debug("%s: sample rate = %d", __func__,
  767. bt_fm_cfg[BT_SLIM7].sample_rate);
  768. return 0;
  769. }
  770. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  771. struct snd_ctl_elem_value *ucontrol)
  772. {
  773. switch (ucontrol->value.integer.value[0]) {
  774. case 1:
  775. bt_fm_cfg[BT_SLIM7].sample_rate = SAMPLING_RATE_16KHZ;
  776. break;
  777. case 2:
  778. bt_fm_cfg[BT_SLIM7].sample_rate = SAMPLING_RATE_44P1KHZ;
  779. break;
  780. case 3:
  781. bt_fm_cfg[BT_SLIM7].sample_rate = SAMPLING_RATE_48KHZ;
  782. break;
  783. case 4:
  784. bt_fm_cfg[BT_SLIM7].sample_rate = SAMPLING_RATE_88P2KHZ;
  785. break;
  786. case 5:
  787. bt_fm_cfg[BT_SLIM7].sample_rate = SAMPLING_RATE_96KHZ;
  788. break;
  789. case 0:
  790. default:
  791. bt_fm_cfg[BT_SLIM7].sample_rate = SAMPLING_RATE_8KHZ;
  792. break;
  793. }
  794. pr_debug("%s: sample rates: slim7_rx = %d, value = %d\n",
  795. __func__,
  796. bt_fm_cfg[BT_SLIM7].sample_rate,
  797. ucontrol->value.enumerated.item[0]);
  798. return 0;
  799. }
  800. static const struct snd_kcontrol_new msm_snd_controls[] = {
  801. SOC_ENUM_EXT("INT0_MI2S_RX Format", int0_mi2s_rx_format,
  802. int_mi2s_bit_format_get, int_mi2s_bit_format_put),
  803. SOC_ENUM_EXT("INT2_MI2S_TX Format", int2_mi2s_tx_format,
  804. int_mi2s_bit_format_get, int_mi2s_bit_format_put),
  805. SOC_ENUM_EXT("INT3_MI2S_TX Format", int3_mi2s_tx_format,
  806. int_mi2s_bit_format_get, int_mi2s_bit_format_put),
  807. SOC_ENUM_EXT("INT0_MI2S_RX SampleRate", int0_mi2s_rx_sample_rate,
  808. int_mi2s_sample_rate_get,
  809. int_mi2s_sample_rate_put),
  810. SOC_ENUM_EXT("INT2_MI2S_TX SampleRate", int2_mi2s_tx_sample_rate,
  811. int_mi2s_sample_rate_get,
  812. int_mi2s_sample_rate_put),
  813. SOC_ENUM_EXT("INT3_MI2S_TX SampleRate", int3_mi2s_tx_sample_rate,
  814. int_mi2s_sample_rate_get,
  815. int_mi2s_sample_rate_put),
  816. SOC_ENUM_EXT("INT0_MI2S_RX Channels", int0_mi2s_rx_chs,
  817. int_mi2s_ch_get, int_mi2s_ch_put),
  818. SOC_ENUM_EXT("INT2_MI2S_TX Channels", int2_mi2s_tx_chs,
  819. int_mi2s_ch_get, int_mi2s_ch_put),
  820. SOC_ENUM_EXT("INT3_MI2S_TX Channels", int3_mi2s_tx_chs,
  821. int_mi2s_ch_get, int_mi2s_ch_put),
  822. SOC_ENUM_EXT("Loopback MCLK", loopback_mclk_en,
  823. loopback_mclk_get, loopback_mclk_put),
  824. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  825. msm_bt_sample_rate_get,
  826. msm_bt_sample_rate_put),
  827. };
  828. static const struct snd_kcontrol_new msm_sdw_controls[] = {
  829. SOC_ENUM_EXT("INT4_MI2S_RX Format", int4_mi2s_rx_format,
  830. int_mi2s_bit_format_get, int_mi2s_bit_format_put),
  831. SOC_ENUM_EXT("INT4_MI2S_RX SampleRate", int4_mi2s_rx_sample_rate,
  832. int_mi2s_sample_rate_get,
  833. int_mi2s_sample_rate_put),
  834. SOC_ENUM_EXT("INT4_MI2S_RX Channels", int4_mi2s_rx_chs,
  835. int_mi2s_ch_get, int_mi2s_ch_put),
  836. SOC_ENUM_EXT("VI_FEED_TX Channels", int5_mi2s_tx_chs,
  837. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  838. };
  839. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  840. struct snd_kcontrol *kcontrol, int event)
  841. {
  842. struct msm_asoc_mach_data *pdata = NULL;
  843. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  844. int ret = 0;
  845. pdata = snd_soc_card_get_drvdata(codec->component.card);
  846. pr_debug("%s: event = %d\n", __func__, event);
  847. switch (event) {
  848. case SND_SOC_DAPM_PRE_PMU:
  849. ret = msm_cdc_pinctrl_select_active_state(pdata->dmic_gpio_p);
  850. if (ret < 0) {
  851. pr_err("%s: gpio set cannot be activated %sd",
  852. __func__, "dmic_gpio");
  853. return ret;
  854. }
  855. break;
  856. case SND_SOC_DAPM_POST_PMD:
  857. ret = msm_cdc_pinctrl_select_sleep_state(pdata->dmic_gpio_p);
  858. if (ret < 0) {
  859. pr_err("%s: gpio set cannot be de-activated %sd",
  860. __func__, "dmic_gpio");
  861. return ret;
  862. }
  863. break;
  864. default:
  865. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  866. return -EINVAL;
  867. }
  868. return 0;
  869. }
  870. static int msm_int_mclk0_event(struct snd_soc_dapm_widget *w,
  871. struct snd_kcontrol *kcontrol, int event)
  872. {
  873. struct msm_asoc_mach_data *pdata = NULL;
  874. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  875. int ret = 0;
  876. pdata = snd_soc_card_get_drvdata(codec->component.card);
  877. pr_debug("%s: event = %d\n", __func__, event);
  878. switch (event) {
  879. case SND_SOC_DAPM_PRE_PMU:
  880. ret = msm_cdc_pinctrl_select_active_state(pdata->pdm_gpio_p);
  881. if (ret < 0) {
  882. pr_err("%s: gpio set cannot be activated %s\n",
  883. __func__, "int_pdm");
  884. return ret;
  885. }
  886. msm_int_enable_dig_cdc_clk(codec, 1, true);
  887. msm_anlg_cdc_mclk_enable(codec, 1, true);
  888. break;
  889. case SND_SOC_DAPM_POST_PMD:
  890. pr_debug("%s: mclk_res_ref = %d\n",
  891. __func__, atomic_read(&pdata->int_mclk0_rsc_ref));
  892. ret = msm_cdc_pinctrl_select_sleep_state(pdata->pdm_gpio_p);
  893. if (ret < 0) {
  894. pr_err("%s: gpio set cannot be de-activated %sd",
  895. __func__, "int_pdm");
  896. return ret;
  897. }
  898. pr_debug("%s: disabling MCLK\n", __func__);
  899. /* disable the codec mclk config*/
  900. msm_anlg_cdc_mclk_enable(codec, 0, true);
  901. msm_int_enable_dig_cdc_clk(codec, 0, true);
  902. break;
  903. default:
  904. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  905. return -EINVAL;
  906. }
  907. return 0;
  908. }
  909. static int int_mi2s_get_port_id(int id)
  910. {
  911. int afe_port_id;
  912. switch (id) {
  913. case MSM_BACKEND_DAI_INT0_MI2S_RX:
  914. afe_port_id = AFE_PORT_ID_INT0_MI2S_RX;
  915. break;
  916. case MSM_BACKEND_DAI_INT2_MI2S_TX:
  917. afe_port_id = AFE_PORT_ID_INT2_MI2S_TX;
  918. break;
  919. case MSM_BACKEND_DAI_INT3_MI2S_TX:
  920. afe_port_id = AFE_PORT_ID_INT3_MI2S_TX;
  921. break;
  922. case MSM_BACKEND_DAI_INT4_MI2S_RX:
  923. afe_port_id = AFE_PORT_ID_INT4_MI2S_RX;
  924. break;
  925. case MSM_BACKEND_DAI_INT5_MI2S_TX:
  926. afe_port_id = AFE_PORT_ID_INT5_MI2S_TX;
  927. break;
  928. default:
  929. pr_err("%s: Invalid id: %d\n", __func__, id);
  930. afe_port_id = -EINVAL;
  931. }
  932. return afe_port_id;
  933. }
  934. static int int_mi2s_get_index(int port_id)
  935. {
  936. int index;
  937. switch (port_id) {
  938. case AFE_PORT_ID_INT0_MI2S_RX:
  939. index = INT0_MI2S;
  940. break;
  941. case AFE_PORT_ID_INT2_MI2S_TX:
  942. index = INT2_MI2S;
  943. break;
  944. case AFE_PORT_ID_INT3_MI2S_TX:
  945. index = INT3_MI2S;
  946. break;
  947. case AFE_PORT_ID_INT4_MI2S_RX:
  948. index = INT4_MI2S;
  949. break;
  950. case AFE_PORT_ID_INT5_MI2S_TX:
  951. index = INT5_MI2S;
  952. break;
  953. default:
  954. pr_err("%s: Invalid port_id: %d\n", __func__, port_id);
  955. index = -EINVAL;
  956. }
  957. return index;
  958. }
  959. static u32 get_int_mi2s_bits_per_sample(u32 bit_format)
  960. {
  961. u32 bit_per_sample;
  962. switch (bit_format) {
  963. case SNDRV_PCM_FORMAT_S24_3LE:
  964. case SNDRV_PCM_FORMAT_S24_LE:
  965. bit_per_sample = 32;
  966. break;
  967. case SNDRV_PCM_FORMAT_S16_LE:
  968. default:
  969. bit_per_sample = 16;
  970. break;
  971. }
  972. return bit_per_sample;
  973. }
  974. static void update_int_mi2s_clk_val(int idx, int stream)
  975. {
  976. u32 bit_per_sample;
  977. bit_per_sample =
  978. get_int_mi2s_bits_per_sample(int_mi2s_cfg[idx].bit_format);
  979. int_mi2s_clk[idx].clk_freq_in_hz =
  980. (int_mi2s_cfg[idx].sample_rate * 2 * bit_per_sample);
  981. }
  982. static int int_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  983. {
  984. int ret = 0;
  985. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  986. int port_id = 0;
  987. int index;
  988. port_id = int_mi2s_get_port_id(rtd->dai_link->id);
  989. if (port_id < 0) {
  990. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  991. ret = port_id;
  992. goto done;
  993. }
  994. index = int_mi2s_get_index(port_id);
  995. if (index < 0) {
  996. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  997. ret = port_id;
  998. goto done;
  999. }
  1000. if (enable) {
  1001. update_int_mi2s_clk_val(index, substream->stream);
  1002. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  1003. int_mi2s_clk[index].clk_freq_in_hz);
  1004. }
  1005. int_mi2s_clk[index].enable = enable;
  1006. ret = afe_set_lpass_clock_v2(port_id,
  1007. &int_mi2s_clk[index]);
  1008. if (ret < 0) {
  1009. dev_err(rtd->card->dev,
  1010. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  1011. __func__, port_id, ret);
  1012. goto done;
  1013. }
  1014. done:
  1015. return ret;
  1016. }
  1017. static int msm_sdw_mi2s_snd_startup(struct snd_pcm_substream *substream)
  1018. {
  1019. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1020. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  1021. int ret = 0;
  1022. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  1023. substream->name, substream->stream);
  1024. ret = int_mi2s_set_sclk(substream, true);
  1025. if (ret < 0) {
  1026. pr_err("%s: failed to enable sclk %d\n",
  1027. __func__, ret);
  1028. return ret;
  1029. }
  1030. ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_CBS_CFS);
  1031. if (ret < 0)
  1032. pr_err("%s: set fmt cpu dai failed; ret=%d\n", __func__, ret);
  1033. return ret;
  1034. }
  1035. static void msm_sdw_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  1036. {
  1037. int ret;
  1038. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  1039. substream->name, substream->stream);
  1040. ret = int_mi2s_set_sclk(substream, false);
  1041. if (ret < 0)
  1042. pr_err("%s:clock disable failed; ret=%d\n", __func__,
  1043. ret);
  1044. }
  1045. static int msm_int_mi2s_snd_startup(struct snd_pcm_substream *substream)
  1046. {
  1047. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1048. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  1049. struct snd_soc_codec *codec = rtd->codec_dais[ANA_CDC]->codec;
  1050. int ret = 0;
  1051. struct msm_asoc_mach_data *pdata = NULL;
  1052. pdata = snd_soc_card_get_drvdata(codec->component.card);
  1053. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  1054. substream->name, substream->stream);
  1055. ret = int_mi2s_set_sclk(substream, true);
  1056. if (ret < 0) {
  1057. pr_err("%s: failed to enable sclk %d\n",
  1058. __func__, ret);
  1059. return ret;
  1060. }
  1061. ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_CBS_CFS);
  1062. if (ret < 0)
  1063. pr_err("%s: set fmt cpu dai failed; ret=%d\n", __func__, ret);
  1064. return ret;
  1065. }
  1066. static void msm_int_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  1067. {
  1068. int ret;
  1069. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  1070. substream->name, substream->stream);
  1071. ret = int_mi2s_set_sclk(substream, false);
  1072. if (ret < 0)
  1073. pr_err("%s:clock disable failed; ret=%d\n", __func__,
  1074. ret);
  1075. }
  1076. static void *def_msm_int_wcd_mbhc_cal(void)
  1077. {
  1078. void *msm_int_wcd_cal;
  1079. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  1080. u16 *btn_low, *btn_high;
  1081. msm_int_wcd_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  1082. WCD_MBHC_DEF_RLOADS), GFP_KERNEL);
  1083. if (!msm_int_wcd_cal)
  1084. return NULL;
  1085. #define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(msm_int_wcd_cal)->X) = (Y))
  1086. S(v_hs_max, 1500);
  1087. #undef S
  1088. #define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(msm_int_wcd_cal)->X) = (Y))
  1089. S(num_btn, WCD_MBHC_DEF_BUTTONS);
  1090. #undef S
  1091. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(msm_int_wcd_cal);
  1092. btn_low = btn_cfg->_v_btn_low;
  1093. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  1094. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  1095. /*
  1096. * In SW we are maintaining two sets of threshold register
  1097. * one for current source and another for Micbias.
  1098. * all btn_low corresponds to threshold for current source
  1099. * all bt_high corresponds to threshold for Micbias
  1100. * Below thresholds are based on following resistances
  1101. * 0-70 == Button 0
  1102. * 110-180 == Button 1
  1103. * 210-290 == Button 2
  1104. * 360-680 == Button 3
  1105. */
  1106. btn_low[0] = 75;
  1107. btn_high[0] = 75;
  1108. btn_low[1] = 150;
  1109. btn_high[1] = 150;
  1110. btn_low[2] = 225;
  1111. btn_high[2] = 225;
  1112. btn_low[3] = 450;
  1113. btn_high[3] = 450;
  1114. btn_low[4] = 500;
  1115. btn_high[4] = 500;
  1116. return msm_int_wcd_cal;
  1117. }
  1118. static int msm_audrx_init(struct snd_soc_pcm_runtime *rtd)
  1119. {
  1120. struct snd_soc_codec *dig_cdc = rtd->codec_dais[DIG_CDC]->codec;
  1121. struct snd_soc_codec *ana_cdc = rtd->codec_dais[ANA_CDC]->codec;
  1122. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(ana_cdc);
  1123. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  1124. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(rtd->card);
  1125. struct snd_card *card;
  1126. int ret = -ENOMEM;
  1127. pr_debug("%s(),dev_name%s\n", __func__, dev_name(cpu_dai->dev));
  1128. ret = snd_soc_add_codec_controls(ana_cdc, msm_snd_controls,
  1129. ARRAY_SIZE(msm_snd_controls));
  1130. if (ret < 0) {
  1131. pr_err("%s: add_codec_controls failed: %d\n",
  1132. __func__, ret);
  1133. return ret;
  1134. }
  1135. ret = snd_soc_add_codec_controls(ana_cdc, msm_common_snd_controls,
  1136. msm_common_snd_controls_size());
  1137. if (ret < 0) {
  1138. pr_err("%s: add common snd controls failed: %d\n",
  1139. __func__, ret);
  1140. return ret;
  1141. }
  1142. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  1143. ARRAY_SIZE(msm_int_dapm_widgets));
  1144. snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
  1145. snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
  1146. snd_soc_dapm_ignore_suspend(dapm, "Secondary Mic");
  1147. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  1148. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  1149. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  1150. snd_soc_dapm_ignore_suspend(dapm, "HEADPHONE");
  1151. snd_soc_dapm_ignore_suspend(dapm, "SPK_OUT");
  1152. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  1153. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  1154. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  1155. snd_soc_dapm_sync(dapm);
  1156. dapm = snd_soc_codec_get_dapm(dig_cdc);
  1157. snd_soc_dapm_ignore_suspend(dapm, "DMIC1");
  1158. snd_soc_dapm_ignore_suspend(dapm, "DMIC2");
  1159. snd_soc_dapm_ignore_suspend(dapm, "DMIC3");
  1160. snd_soc_dapm_ignore_suspend(dapm, "DMIC4");
  1161. snd_soc_dapm_sync(dapm);
  1162. msm_anlg_cdc_spk_ext_pa_cb(enable_spk_ext_pa, ana_cdc);
  1163. msm_dig_cdc_hph_comp_cb(msm_config_hph_compander_gpio, dig_cdc);
  1164. card = rtd->card->snd_card;
  1165. if (!codec_root)
  1166. codec_root = snd_info_create_subdir(card->module, "codecs",
  1167. card->proc_root);
  1168. if (!codec_root) {
  1169. pr_debug("%s: Cannot create codecs module entry\n",
  1170. __func__);
  1171. goto done;
  1172. }
  1173. pdata->codec_root = codec_root;
  1174. msm_dig_codec_info_create_codec_entry(codec_root, dig_cdc);
  1175. msm_anlg_codec_info_create_codec_entry(codec_root, ana_cdc);
  1176. done:
  1177. msm_set_codec_reg_done(true);
  1178. return 0;
  1179. }
  1180. static int msm_sdw_audrx_init(struct snd_soc_pcm_runtime *rtd)
  1181. {
  1182. struct snd_soc_codec *codec = rtd->codec;
  1183. struct snd_soc_dapm_context *dapm =
  1184. snd_soc_codec_get_dapm(codec);
  1185. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(rtd->card);
  1186. struct snd_soc_component *aux_comp;
  1187. struct snd_card *card;
  1188. snd_soc_add_codec_controls(codec, msm_sdw_controls,
  1189. ARRAY_SIZE(msm_sdw_controls));
  1190. snd_soc_dapm_ignore_suspend(dapm, "AIF1_SDW Playback");
  1191. snd_soc_dapm_ignore_suspend(dapm, "VIfeed_SDW");
  1192. snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
  1193. snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
  1194. snd_soc_dapm_ignore_suspend(dapm, "AIF1_SDW VI");
  1195. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_SDW");
  1196. snd_soc_dapm_sync(dapm);
  1197. /*
  1198. * Send speaker configuration only for WSA8810.
  1199. * Default configuration is for WSA8815.
  1200. */
  1201. pr_debug("%s: Number of aux devices: %d\n",
  1202. __func__, rtd->card->num_aux_devs);
  1203. if (rtd->card->num_aux_devs &&
  1204. !list_empty(&rtd->card->aux_comp_list)) {
  1205. aux_comp = list_first_entry(&rtd->card->aux_comp_list,
  1206. struct snd_soc_component, list_aux);
  1207. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  1208. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  1209. msm_sdw_set_spkr_mode(rtd->codec, SPKR_MODE_1);
  1210. msm_sdw_set_spkr_gain_offset(rtd->codec,
  1211. RX_GAIN_OFFSET_M1P5_DB);
  1212. }
  1213. }
  1214. card = rtd->card->snd_card;
  1215. if (!codec_root)
  1216. codec_root = snd_info_create_subdir(card->module, "codecs",
  1217. card->proc_root);
  1218. if (!codec_root) {
  1219. pr_debug("%s: Cannot create codecs module entry\n",
  1220. __func__);
  1221. goto done;
  1222. }
  1223. pdata->codec_root = codec_root;
  1224. msm_sdw_codec_info_create_codec_entry(codec_root, codec);
  1225. done:
  1226. return 0;
  1227. }
  1228. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  1229. {
  1230. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  1231. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
  1232. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  1233. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  1234. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  1235. }
  1236. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  1237. struct snd_pcm_hw_params *params)
  1238. {
  1239. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1240. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  1241. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  1242. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  1243. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  1244. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  1245. int ret;
  1246. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  1247. codec_dai->name, codec_dai->id);
  1248. ret = snd_soc_dai_get_channel_map(codec_dai,
  1249. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  1250. if (ret) {
  1251. dev_err(rtd->dev,
  1252. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  1253. __func__, ret);
  1254. goto exit;
  1255. }
  1256. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) id %d\n",
  1257. __func__, tx_ch_cnt, dai_link->id);
  1258. ret = snd_soc_dai_set_channel_map(cpu_dai,
  1259. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  1260. if (ret)
  1261. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  1262. __func__, ret);
  1263. exit:
  1264. return ret;
  1265. }
  1266. static unsigned int tdm_param_set_slot_mask(u16 port_id, int slot_width,
  1267. int slots)
  1268. {
  1269. unsigned int slot_mask = 0;
  1270. int i, j;
  1271. unsigned int *slot_offset;
  1272. for (i = TDM_0; i < TDM_PORT_MAX; i++) {
  1273. slot_offset = tdm_slot_offset[i];
  1274. for (j = 0; j < TDM_SLOT_OFFSET_MAX; j++) {
  1275. if (slot_offset[j] != AFE_SLOT_MAPPING_OFFSET_INVALID)
  1276. slot_mask |=
  1277. (1 << ((slot_offset[j] * 8) / slot_width));
  1278. else
  1279. break;
  1280. }
  1281. }
  1282. return slot_mask;
  1283. }
  1284. static int msm_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  1285. struct snd_pcm_hw_params *params)
  1286. {
  1287. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1288. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  1289. int ret = 0;
  1290. int channels, slot_width, slots;
  1291. unsigned int slot_mask;
  1292. unsigned int *slot_offset;
  1293. int offset_channels = 0;
  1294. int i;
  1295. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  1296. channels = params_channels(params);
  1297. switch (channels) {
  1298. case 1:
  1299. case 2:
  1300. case 3:
  1301. case 4:
  1302. case 5:
  1303. case 6:
  1304. case 7:
  1305. case 8:
  1306. switch (params_format(params)) {
  1307. case SNDRV_PCM_FORMAT_S32_LE:
  1308. case SNDRV_PCM_FORMAT_S24_LE:
  1309. case SNDRV_PCM_FORMAT_S16_LE:
  1310. /*
  1311. * up to 8 channels HW config should
  1312. * use 32 bit slot width for max support of
  1313. * stream bit width. (slot_width > bit_width)
  1314. */
  1315. slot_width = 32;
  1316. break;
  1317. default:
  1318. pr_err("%s: invalid param format 0x%x\n",
  1319. __func__, params_format(params));
  1320. return -EINVAL;
  1321. }
  1322. slots = 8;
  1323. slot_mask = tdm_param_set_slot_mask(cpu_dai->id,
  1324. slot_width,
  1325. slots);
  1326. if (!slot_mask) {
  1327. pr_err("%s: invalid slot_mask 0x%x\n",
  1328. __func__, slot_mask);
  1329. return -EINVAL;
  1330. }
  1331. break;
  1332. default:
  1333. pr_err("%s: invalid param channels %d\n",
  1334. __func__, channels);
  1335. return -EINVAL;
  1336. }
  1337. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  1338. switch (cpu_dai->id) {
  1339. case AFE_PORT_ID_PRIMARY_TDM_RX:
  1340. case AFE_PORT_ID_SECONDARY_TDM_RX:
  1341. case AFE_PORT_ID_TERTIARY_TDM_RX:
  1342. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  1343. case AFE_PORT_ID_QUINARY_TDM_RX:
  1344. case AFE_PORT_ID_PRIMARY_TDM_TX:
  1345. case AFE_PORT_ID_SECONDARY_TDM_TX:
  1346. case AFE_PORT_ID_TERTIARY_TDM_TX:
  1347. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  1348. case AFE_PORT_ID_QUINARY_TDM_TX:
  1349. slot_offset = tdm_slot_offset[TDM_0];
  1350. break;
  1351. default:
  1352. pr_err("%s: dai id 0x%x not supported\n",
  1353. __func__, cpu_dai->id);
  1354. return -EINVAL;
  1355. }
  1356. for (i = 0; i < TDM_SLOT_OFFSET_MAX; i++) {
  1357. if (slot_offset[i] != AFE_SLOT_MAPPING_OFFSET_INVALID)
  1358. offset_channels++;
  1359. else
  1360. break;
  1361. }
  1362. if (offset_channels == 0) {
  1363. pr_err("%s: slot offset not supported, offset_channels %d\n",
  1364. __func__, offset_channels);
  1365. return -EINVAL;
  1366. }
  1367. if (channels > offset_channels) {
  1368. pr_err("%s: channels %d exceed offset_channels %d\n",
  1369. __func__, channels, offset_channels);
  1370. return -EINVAL;
  1371. }
  1372. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  1373. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  1374. slots, slot_width);
  1375. if (ret < 0) {
  1376. pr_err("%s: failed to set tdm slot, err:%d\n",
  1377. __func__, ret);
  1378. goto end;
  1379. }
  1380. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, NULL,
  1381. channels, slot_offset);
  1382. if (ret < 0) {
  1383. pr_err("%s: failed to set channel map, err:%d\n",
  1384. __func__, ret);
  1385. goto end;
  1386. }
  1387. } else {
  1388. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  1389. slots, slot_width);
  1390. if (ret < 0) {
  1391. pr_err("%s: failed to set tdm slot, err:%d\n",
  1392. __func__, ret);
  1393. goto end;
  1394. }
  1395. ret = snd_soc_dai_set_channel_map(cpu_dai, channels,
  1396. slot_offset, 0, NULL);
  1397. if (ret < 0) {
  1398. pr_err("%s: failed to set channel map, err:%d\n",
  1399. __func__, ret);
  1400. goto end;
  1401. }
  1402. }
  1403. end:
  1404. return ret;
  1405. }
  1406. static int msm_snd_card_late_probe(struct snd_soc_card *card)
  1407. {
  1408. const char *be_dl_name = LPASS_BE_INT0_MI2S_RX;
  1409. struct snd_soc_codec *ana_cdc;
  1410. struct snd_soc_pcm_runtime *rtd;
  1411. int ret = 0;
  1412. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  1413. if (!rtd) {
  1414. dev_err(card->dev,
  1415. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  1416. __func__, be_dl_name);
  1417. return -EINVAL;
  1418. }
  1419. ana_cdc = rtd->codec_dais[ANA_CDC]->codec;
  1420. mbhc_cfg_ptr->calibration = def_msm_int_wcd_mbhc_cal();
  1421. if (!mbhc_cfg_ptr->calibration)
  1422. return -ENOMEM;
  1423. ret = msm_anlg_cdc_hs_detect(ana_cdc, mbhc_cfg_ptr);
  1424. if (ret) {
  1425. dev_err(card->dev,
  1426. "%s: msm_anlg_cdc_hs_detect failed\n", __func__);
  1427. kfree(mbhc_cfg_ptr->calibration);
  1428. }
  1429. return ret;
  1430. }
  1431. static struct snd_soc_ops msm_tdm_be_ops = {
  1432. .hw_params = msm_tdm_snd_hw_params
  1433. };
  1434. static struct snd_soc_ops msm_wcn_ops = {
  1435. .hw_params = msm_wcn_hw_params,
  1436. };
  1437. static struct snd_soc_ops msm_mi2s_be_ops = {
  1438. .startup = msm_mi2s_snd_startup,
  1439. .shutdown = msm_mi2s_snd_shutdown,
  1440. };
  1441. static struct snd_soc_ops msm_aux_pcm_be_ops = {
  1442. .startup = msm_aux_pcm_snd_startup,
  1443. .shutdown = msm_aux_pcm_snd_shutdown,
  1444. };
  1445. static struct snd_soc_ops msm_int_mi2s_be_ops = {
  1446. .startup = msm_int_mi2s_snd_startup,
  1447. .shutdown = msm_int_mi2s_snd_shutdown,
  1448. };
  1449. static struct snd_soc_ops msm_sdw_mi2s_be_ops = {
  1450. .startup = msm_sdw_mi2s_snd_startup,
  1451. .shutdown = msm_sdw_mi2s_snd_shutdown,
  1452. };
  1453. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  1454. {
  1455. cpumask_t mask;
  1456. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  1457. pm_qos_remove_request(&substream->latency_pm_qos_req);
  1458. cpumask_clear(&mask);
  1459. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  1460. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  1461. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  1462. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  1463. pm_qos_add_request(&substream->latency_pm_qos_req,
  1464. PM_QOS_CPU_DMA_LATENCY,
  1465. MSM_LL_QOS_VALUE);
  1466. return 0;
  1467. }
  1468. static struct snd_soc_ops msm_fe_qos_ops = {
  1469. .prepare = msm_fe_qos_prepare,
  1470. };
  1471. struct snd_soc_dai_link_component dlc_rx1[] = {
  1472. {
  1473. .of_node = NULL,
  1474. .dai_name = "msm_dig_cdc_dai_rx1",
  1475. },
  1476. {
  1477. .of_node = NULL,
  1478. .dai_name = "msm_anlg_cdc_i2s_rx1",
  1479. },
  1480. };
  1481. struct snd_soc_dai_link_component dlc_tx1[] = {
  1482. {
  1483. .of_node = NULL,
  1484. .dai_name = "msm_dig_cdc_dai_tx1",
  1485. },
  1486. {
  1487. .of_node = NULL,
  1488. .dai_name = "msm_anlg_cdc_i2s_tx1",
  1489. },
  1490. };
  1491. struct snd_soc_dai_link_component dlc_tx2[] = {
  1492. {
  1493. .of_node = NULL,
  1494. .dai_name = "msm_dig_cdc_dai_tx2",
  1495. },
  1496. {
  1497. .of_node = NULL,
  1498. .dai_name = "msm_anlg_cdc_i2s_tx2",
  1499. },
  1500. };
  1501. /* Digital audio interface glue - connects codec <---> CPU */
  1502. static struct snd_soc_dai_link msm_int_dai[] = {
  1503. /* FrontEnd DAI Links */
  1504. {/* hw:x,0 */
  1505. .name = MSM_DAILINK_NAME(Media1),
  1506. .stream_name = "MultiMedia1",
  1507. .cpu_dai_name = "MultiMedia1",
  1508. .platform_name = "msm-pcm-dsp.0",
  1509. .dynamic = 1,
  1510. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1511. SND_SOC_DPCM_TRIGGER_POST},
  1512. .codec_dai_name = "snd-soc-dummy-dai",
  1513. .codec_name = "snd-soc-dummy",
  1514. .ignore_suspend = 1,
  1515. .dpcm_playback = 1,
  1516. .dpcm_capture = 1,
  1517. /* this dai link has playback support */
  1518. .ignore_pmdown_time = 1,
  1519. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  1520. },
  1521. {/* hw:x,1 */
  1522. .name = MSM_DAILINK_NAME(Media2),
  1523. .stream_name = "MultiMedia2",
  1524. .cpu_dai_name = "MultiMedia2",
  1525. .platform_name = "msm-pcm-dsp.0",
  1526. .dynamic = 1,
  1527. .dpcm_playback = 1,
  1528. .dpcm_capture = 1,
  1529. .codec_dai_name = "snd-soc-dummy-dai",
  1530. .codec_name = "snd-soc-dummy",
  1531. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1532. SND_SOC_DPCM_TRIGGER_POST},
  1533. .ignore_suspend = 1,
  1534. /* this dai link has playback support */
  1535. .ignore_pmdown_time = 1,
  1536. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  1537. },
  1538. {/* hw:x,2 */
  1539. .name = "VoiceMMode1",
  1540. .stream_name = "VoiceMMode1",
  1541. .cpu_dai_name = "VoiceMMode1",
  1542. .platform_name = "msm-pcm-voice",
  1543. .dynamic = 1,
  1544. .dpcm_capture = 1,
  1545. .dpcm_playback = 1,
  1546. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1547. SND_SOC_DPCM_TRIGGER_POST},
  1548. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1549. .ignore_suspend = 1,
  1550. .ignore_pmdown_time = 1,
  1551. .codec_dai_name = "snd-soc-dummy-dai",
  1552. .codec_name = "snd-soc-dummy",
  1553. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  1554. },
  1555. {/* hw:x,3 */
  1556. .name = "MSM VoIP",
  1557. .stream_name = "VoIP",
  1558. .cpu_dai_name = "VoIP",
  1559. .platform_name = "msm-voip-dsp",
  1560. .dynamic = 1,
  1561. .dpcm_playback = 1,
  1562. .dpcm_capture = 1,
  1563. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1564. SND_SOC_DPCM_TRIGGER_POST},
  1565. .codec_dai_name = "snd-soc-dummy-dai",
  1566. .codec_name = "snd-soc-dummy",
  1567. .ignore_suspend = 1,
  1568. /* this dai link has playback support */
  1569. .ignore_pmdown_time = 1,
  1570. .id = MSM_FRONTEND_DAI_VOIP,
  1571. },
  1572. {/* hw:x,4 */
  1573. .name = MSM_DAILINK_NAME(ULL),
  1574. .stream_name = "ULL",
  1575. .cpu_dai_name = "MultiMedia3",
  1576. .platform_name = "msm-pcm-dsp.2",
  1577. .dynamic = 1,
  1578. .dpcm_playback = 1,
  1579. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1580. SND_SOC_DPCM_TRIGGER_POST},
  1581. .codec_dai_name = "snd-soc-dummy-dai",
  1582. .codec_name = "snd-soc-dummy",
  1583. .ignore_suspend = 1,
  1584. /* this dai link has playback support */
  1585. .ignore_pmdown_time = 1,
  1586. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  1587. },
  1588. /* Hostless PCM purpose */
  1589. {/* hw:x,5 */
  1590. .name = "INT4 MI2S_RX Hostless",
  1591. .stream_name = "INT4 MI2S_RX Hostless",
  1592. .cpu_dai_name = "INT4_MI2S_RX_HOSTLESS",
  1593. .platform_name = "msm-pcm-hostless",
  1594. .dynamic = 1,
  1595. .dpcm_playback = 1,
  1596. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1597. SND_SOC_DPCM_TRIGGER_POST},
  1598. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1599. .ignore_suspend = 1,
  1600. /* this dailink has playback support */
  1601. .ignore_pmdown_time = 1,
  1602. /* This dainlink has MI2S support */
  1603. .codec_dai_name = "snd-soc-dummy-dai",
  1604. .codec_name = "snd-soc-dummy",
  1605. },
  1606. {/* hw:x,6 */
  1607. .name = "MSM AFE-PCM RX",
  1608. .stream_name = "AFE-PROXY RX",
  1609. .cpu_dai_name = "msm-dai-q6-dev.241",
  1610. .codec_name = "msm-stub-codec.1",
  1611. .codec_dai_name = "msm-stub-rx",
  1612. .platform_name = "msm-pcm-afe",
  1613. .ignore_suspend = 1,
  1614. /* this dai link has playback support */
  1615. .ignore_pmdown_time = 1,
  1616. },
  1617. {/* hw:x,7 */
  1618. .name = "MSM AFE-PCM TX",
  1619. .stream_name = "AFE-PROXY TX",
  1620. .cpu_dai_name = "msm-dai-q6-dev.240",
  1621. .codec_name = "msm-stub-codec.1",
  1622. .codec_dai_name = "msm-stub-tx",
  1623. .platform_name = "msm-pcm-afe",
  1624. .ignore_suspend = 1,
  1625. },
  1626. {/* hw:x,8 */
  1627. .name = MSM_DAILINK_NAME(Compress1),
  1628. .stream_name = "Compress1",
  1629. .cpu_dai_name = "MultiMedia4",
  1630. .platform_name = "msm-compress-dsp",
  1631. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  1632. .dynamic = 1,
  1633. .dpcm_capture = 1,
  1634. .dpcm_playback = 1,
  1635. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1636. SND_SOC_DPCM_TRIGGER_POST},
  1637. .codec_dai_name = "snd-soc-dummy-dai",
  1638. .codec_name = "snd-soc-dummy",
  1639. .ignore_suspend = 1,
  1640. .ignore_pmdown_time = 1,
  1641. /* this dai link has playback support */
  1642. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  1643. },
  1644. {/* hw:x,9*/
  1645. .name = "AUXPCM Hostless",
  1646. .stream_name = "AUXPCM Hostless",
  1647. .cpu_dai_name = "AUXPCM_HOSTLESS",
  1648. .platform_name = "msm-pcm-hostless",
  1649. .dynamic = 1,
  1650. .dpcm_capture = 1,
  1651. .dpcm_playback = 1,
  1652. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1653. SND_SOC_DPCM_TRIGGER_POST},
  1654. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1655. .ignore_suspend = 1,
  1656. /* this dai link has playback support */
  1657. .ignore_pmdown_time = 1,
  1658. .codec_dai_name = "snd-soc-dummy-dai",
  1659. .codec_name = "snd-soc-dummy",
  1660. },
  1661. {/* hw:x,10 */
  1662. .name = "SLIMBUS_1 Hostless",
  1663. .stream_name = "SLIMBUS_1 Hostless",
  1664. .cpu_dai_name = "SLIMBUS1_HOSTLESS",
  1665. .platform_name = "msm-pcm-hostless",
  1666. .dynamic = 1,
  1667. .dpcm_capture = 1,
  1668. .dpcm_playback = 1,
  1669. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1670. SND_SOC_DPCM_TRIGGER_POST},
  1671. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1672. .ignore_suspend = 1,
  1673. .ignore_pmdown_time = 1, /* dai link has playback support */
  1674. .codec_dai_name = "snd-soc-dummy-dai",
  1675. .codec_name = "snd-soc-dummy",
  1676. },
  1677. {/* hw:x,11 */
  1678. .name = "INT3 MI2S_TX Hostless",
  1679. .stream_name = "INT3 MI2S_TX Hostless",
  1680. .cpu_dai_name = "INT3_MI2S_TX_HOSTLESS",
  1681. .platform_name = "msm-pcm-hostless",
  1682. .dynamic = 1,
  1683. .dpcm_capture = 1,
  1684. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1685. SND_SOC_DPCM_TRIGGER_POST},
  1686. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1687. .ignore_suspend = 1,
  1688. .codec_dai_name = "snd-soc-dummy-dai",
  1689. .codec_name = "snd-soc-dummy",
  1690. },
  1691. {/* hw:x,12 */
  1692. .name = "SLIMBUS_7 Hostless",
  1693. .stream_name = "SLIMBUS_7 Hostless",
  1694. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  1695. .platform_name = "msm-pcm-hostless",
  1696. .dynamic = 1,
  1697. .dpcm_capture = 1,
  1698. .dpcm_playback = 1,
  1699. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1700. SND_SOC_DPCM_TRIGGER_POST},
  1701. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1702. .ignore_suspend = 1,
  1703. .ignore_pmdown_time = 1, /* dai link has playback support */
  1704. .codec_dai_name = "snd-soc-dummy-dai",
  1705. .codec_name = "snd-soc-dummy",
  1706. },
  1707. {/* hw:x,13 */
  1708. .name = MSM_DAILINK_NAME(LowLatency),
  1709. .stream_name = "MultiMedia5",
  1710. .cpu_dai_name = "MultiMedia5",
  1711. .platform_name = "msm-pcm-dsp.1",
  1712. .dynamic = 1,
  1713. .dpcm_capture = 1,
  1714. .dpcm_playback = 1,
  1715. .codec_dai_name = "snd-soc-dummy-dai",
  1716. .codec_name = "snd-soc-dummy",
  1717. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1718. SND_SOC_DPCM_TRIGGER_POST},
  1719. .ignore_suspend = 1,
  1720. /* this dai link has playback support */
  1721. .ignore_pmdown_time = 1,
  1722. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  1723. .ops = &msm_fe_qos_ops,
  1724. },
  1725. /* LSM FE */
  1726. {/* hw:x,14 */
  1727. .name = "Listen 1 Audio Service",
  1728. .stream_name = "Listen 1 Audio Service",
  1729. .cpu_dai_name = "LSM1",
  1730. .platform_name = "msm-lsm-client",
  1731. .dynamic = 1,
  1732. .dpcm_capture = 1,
  1733. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1734. SND_SOC_DPCM_TRIGGER_POST },
  1735. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1736. .ignore_suspend = 1,
  1737. .codec_dai_name = "snd-soc-dummy-dai",
  1738. .codec_name = "snd-soc-dummy",
  1739. .id = MSM_FRONTEND_DAI_LSM1,
  1740. },
  1741. {/* hw:x,15 */
  1742. .name = MSM_DAILINK_NAME(Compress2),
  1743. .stream_name = "Compress2",
  1744. .cpu_dai_name = "MultiMedia7",
  1745. .platform_name = "msm-compress-dsp",
  1746. .dynamic = 1,
  1747. .dpcm_capture = 1,
  1748. .dpcm_playback = 1,
  1749. .codec_dai_name = "snd-soc-dummy-dai",
  1750. .codec_name = "snd-soc-dummy",
  1751. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1752. SND_SOC_DPCM_TRIGGER_POST},
  1753. .ignore_suspend = 1,
  1754. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  1755. },
  1756. {/* hw:x,16 */
  1757. .name = MSM_DAILINK_NAME(MultiMedia10),
  1758. .stream_name = "MultiMedia10",
  1759. .cpu_dai_name = "MultiMedia10",
  1760. .platform_name = "msm-pcm-dsp.1",
  1761. .dynamic = 1,
  1762. .dpcm_capture = 1,
  1763. .dpcm_playback = 1,
  1764. .dpcm_capture = 1,
  1765. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1766. SND_SOC_DPCM_TRIGGER_POST},
  1767. .codec_dai_name = "snd-soc-dummy-dai",
  1768. .codec_name = "snd-soc-dummy",
  1769. .ignore_suspend = 1,
  1770. .ignore_pmdown_time = 1,
  1771. /* this dai link has playback support */
  1772. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  1773. },
  1774. {/* hw:x,17 */
  1775. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  1776. .stream_name = "MM_NOIRQ",
  1777. .cpu_dai_name = "MultiMedia8",
  1778. .platform_name = "msm-pcm-dsp-noirq",
  1779. .dynamic = 1,
  1780. .dpcm_capture = 1,
  1781. .dpcm_playback = 1,
  1782. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1783. SND_SOC_DPCM_TRIGGER_POST},
  1784. .codec_dai_name = "snd-soc-dummy-dai",
  1785. .codec_name = "snd-soc-dummy",
  1786. .ignore_suspend = 1,
  1787. .ignore_pmdown_time = 1,
  1788. /* this dai link has playback support */
  1789. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  1790. .ops = &msm_fe_qos_ops,
  1791. },
  1792. {/* hw:x,18 */
  1793. .name = "HDMI_RX_HOSTLESS",
  1794. .stream_name = "HDMI_RX_HOSTLESS",
  1795. .cpu_dai_name = "HDMI_HOSTLESS",
  1796. .platform_name = "msm-pcm-hostless",
  1797. .dynamic = 1,
  1798. .dpcm_playback = 1,
  1799. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1800. SND_SOC_DPCM_TRIGGER_POST},
  1801. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1802. .ignore_suspend = 1,
  1803. .ignore_pmdown_time = 1,
  1804. .codec_dai_name = "snd-soc-dummy-dai",
  1805. .codec_name = "snd-soc-dummy",
  1806. },
  1807. {/* hw:x,19 */
  1808. .name = "VoiceMMode2",
  1809. .stream_name = "VoiceMMode2",
  1810. .cpu_dai_name = "VoiceMMode2",
  1811. .platform_name = "msm-pcm-voice",
  1812. .dynamic = 1,
  1813. .dpcm_capture = 1,
  1814. .dpcm_playback = 1,
  1815. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1816. SND_SOC_DPCM_TRIGGER_POST},
  1817. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1818. .ignore_suspend = 1,
  1819. .ignore_pmdown_time = 1,
  1820. .codec_dai_name = "snd-soc-dummy-dai",
  1821. .codec_name = "snd-soc-dummy",
  1822. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  1823. },
  1824. {/* hw:x,20 */
  1825. .name = "Listen 2 Audio Service",
  1826. .stream_name = "Listen 2 Audio Service",
  1827. .cpu_dai_name = "LSM2",
  1828. .platform_name = "msm-lsm-client",
  1829. .dynamic = 1,
  1830. .dpcm_capture = 1,
  1831. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1832. SND_SOC_DPCM_TRIGGER_POST },
  1833. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1834. .ignore_suspend = 1,
  1835. .codec_dai_name = "snd-soc-dummy-dai",
  1836. .codec_name = "snd-soc-dummy",
  1837. .id = MSM_FRONTEND_DAI_LSM2,
  1838. },
  1839. {/* hw:x,21 */
  1840. .name = "Listen 3 Audio Service",
  1841. .stream_name = "Listen 3 Audio Service",
  1842. .cpu_dai_name = "LSM3",
  1843. .platform_name = "msm-lsm-client",
  1844. .dynamic = 1,
  1845. .dpcm_capture = 1,
  1846. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1847. SND_SOC_DPCM_TRIGGER_POST },
  1848. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1849. .ignore_suspend = 1,
  1850. .codec_dai_name = "snd-soc-dummy-dai",
  1851. .codec_name = "snd-soc-dummy",
  1852. .id = MSM_FRONTEND_DAI_LSM3,
  1853. },
  1854. {/* hw:x,22 */
  1855. .name = "Listen 4 Audio Service",
  1856. .stream_name = "Listen 4 Audio Service",
  1857. .cpu_dai_name = "LSM4",
  1858. .platform_name = "msm-lsm-client",
  1859. .dynamic = 1,
  1860. .dpcm_capture = 1,
  1861. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1862. SND_SOC_DPCM_TRIGGER_POST },
  1863. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1864. .ignore_suspend = 1,
  1865. .codec_dai_name = "snd-soc-dummy-dai",
  1866. .codec_name = "snd-soc-dummy",
  1867. .id = MSM_FRONTEND_DAI_LSM4,
  1868. },
  1869. {/* hw:x,23 */
  1870. .name = "Listen 5 Audio Service",
  1871. .stream_name = "Listen 5 Audio Service",
  1872. .cpu_dai_name = "LSM5",
  1873. .platform_name = "msm-lsm-client",
  1874. .dynamic = 1,
  1875. .dpcm_capture = 1,
  1876. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1877. SND_SOC_DPCM_TRIGGER_POST },
  1878. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1879. .ignore_suspend = 1,
  1880. .codec_dai_name = "snd-soc-dummy-dai",
  1881. .codec_name = "snd-soc-dummy",
  1882. .id = MSM_FRONTEND_DAI_LSM5,
  1883. },
  1884. {/* hw:x,24 */
  1885. .name = "Listen 6 Audio Service",
  1886. .stream_name = "Listen 6 Audio Service",
  1887. .cpu_dai_name = "LSM6",
  1888. .platform_name = "msm-lsm-client",
  1889. .dynamic = 1,
  1890. .dpcm_capture = 1,
  1891. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1892. SND_SOC_DPCM_TRIGGER_POST },
  1893. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1894. .ignore_suspend = 1,
  1895. .codec_dai_name = "snd-soc-dummy-dai",
  1896. .codec_name = "snd-soc-dummy",
  1897. .id = MSM_FRONTEND_DAI_LSM6
  1898. },
  1899. {/* hw:x,25 */
  1900. .name = "Listen 7 Audio Service",
  1901. .stream_name = "Listen 7 Audio Service",
  1902. .cpu_dai_name = "LSM7",
  1903. .platform_name = "msm-lsm-client",
  1904. .dynamic = 1,
  1905. .dpcm_capture = 1,
  1906. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1907. SND_SOC_DPCM_TRIGGER_POST },
  1908. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1909. .ignore_suspend = 1,
  1910. .codec_dai_name = "snd-soc-dummy-dai",
  1911. .codec_name = "snd-soc-dummy",
  1912. .id = MSM_FRONTEND_DAI_LSM7,
  1913. },
  1914. {/* hw:x,26 */
  1915. .name = "Listen 8 Audio Service",
  1916. .stream_name = "Listen 8 Audio Service",
  1917. .cpu_dai_name = "LSM8",
  1918. .platform_name = "msm-lsm-client",
  1919. .dynamic = 1,
  1920. .dpcm_capture = 1,
  1921. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1922. SND_SOC_DPCM_TRIGGER_POST },
  1923. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1924. .ignore_suspend = 1,
  1925. .codec_dai_name = "snd-soc-dummy-dai",
  1926. .codec_name = "snd-soc-dummy",
  1927. .id = MSM_FRONTEND_DAI_LSM8,
  1928. },
  1929. {/* hw:x,27 */
  1930. .name = MSM_DAILINK_NAME(Media9),
  1931. .stream_name = "MultiMedia9",
  1932. .cpu_dai_name = "MultiMedia9",
  1933. .platform_name = "msm-pcm-dsp.0",
  1934. .dynamic = 1,
  1935. .dpcm_capture = 1,
  1936. .dpcm_playback = 1,
  1937. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1938. SND_SOC_DPCM_TRIGGER_POST},
  1939. .codec_dai_name = "snd-soc-dummy-dai",
  1940. .codec_name = "snd-soc-dummy",
  1941. .ignore_suspend = 1,
  1942. .ignore_pmdown_time = 1,
  1943. /* this dai link has playback support */
  1944. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  1945. },
  1946. {/* hw:x,28 */
  1947. .name = MSM_DAILINK_NAME(Compress4),
  1948. .stream_name = "Compress4",
  1949. .cpu_dai_name = "MultiMedia11",
  1950. .platform_name = "msm-compress-dsp",
  1951. .dynamic = 1,
  1952. .dpcm_capture = 1,
  1953. .dpcm_playback = 1,
  1954. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1955. SND_SOC_DPCM_TRIGGER_POST},
  1956. .codec_dai_name = "snd-soc-dummy-dai",
  1957. .codec_name = "snd-soc-dummy",
  1958. .ignore_suspend = 1,
  1959. .ignore_pmdown_time = 1,
  1960. /* this dai link has playback support */
  1961. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  1962. },
  1963. {/* hw:x,29 */
  1964. .name = MSM_DAILINK_NAME(Compress5),
  1965. .stream_name = "Compress5",
  1966. .cpu_dai_name = "MultiMedia12",
  1967. .platform_name = "msm-compress-dsp",
  1968. .dynamic = 1,
  1969. .dpcm_capture = 1,
  1970. .dpcm_playback = 1,
  1971. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1972. SND_SOC_DPCM_TRIGGER_POST},
  1973. .codec_dai_name = "snd-soc-dummy-dai",
  1974. .codec_name = "snd-soc-dummy",
  1975. .ignore_suspend = 1,
  1976. .ignore_pmdown_time = 1,
  1977. /* this dai link has playback support */
  1978. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  1979. },
  1980. {/* hw:x,30 */
  1981. .name = MSM_DAILINK_NAME(Compress6),
  1982. .stream_name = "Compress6",
  1983. .cpu_dai_name = "MultiMedia13",
  1984. .platform_name = "msm-compress-dsp",
  1985. .dynamic = 1,
  1986. .dpcm_capture = 1,
  1987. .dpcm_playback = 1,
  1988. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1989. SND_SOC_DPCM_TRIGGER_POST},
  1990. .codec_dai_name = "snd-soc-dummy-dai",
  1991. .codec_name = "snd-soc-dummy",
  1992. .ignore_suspend = 1,
  1993. .ignore_pmdown_time = 1,
  1994. /* this dai link has playback support */
  1995. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  1996. },
  1997. {/* hw:x,31 */
  1998. .name = MSM_DAILINK_NAME(Compress7),
  1999. .stream_name = "Compress7",
  2000. .cpu_dai_name = "MultiMedia14",
  2001. .platform_name = "msm-compress-dsp",
  2002. .dynamic = 1,
  2003. .dpcm_capture = 1,
  2004. .dpcm_playback = 1,
  2005. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  2006. SND_SOC_DPCM_TRIGGER_POST},
  2007. .codec_dai_name = "snd-soc-dummy-dai",
  2008. .codec_name = "snd-soc-dummy",
  2009. .ignore_suspend = 1,
  2010. .ignore_pmdown_time = 1,
  2011. /* this dai link has playback support */
  2012. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  2013. },
  2014. {/* hw:x,32 */
  2015. .name = MSM_DAILINK_NAME(Compress8),
  2016. .stream_name = "Compress8",
  2017. .cpu_dai_name = "MultiMedia15",
  2018. .platform_name = "msm-compress-dsp",
  2019. .dynamic = 1,
  2020. .dpcm_capture = 1,
  2021. .dpcm_playback = 1,
  2022. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  2023. SND_SOC_DPCM_TRIGGER_POST},
  2024. .codec_dai_name = "snd-soc-dummy-dai",
  2025. .codec_name = "snd-soc-dummy",
  2026. .ignore_suspend = 1,
  2027. .ignore_pmdown_time = 1,
  2028. /* this dai link has playback support */
  2029. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  2030. },
  2031. {/* hw:x,33 */
  2032. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  2033. .stream_name = "MM_NOIRQ_2",
  2034. .cpu_dai_name = "MultiMedia16",
  2035. .platform_name = "msm-pcm-dsp-noirq",
  2036. .dynamic = 1,
  2037. .dpcm_capture = 1,
  2038. .dpcm_playback = 1,
  2039. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  2040. SND_SOC_DPCM_TRIGGER_POST},
  2041. .codec_dai_name = "snd-soc-dummy-dai",
  2042. .codec_name = "snd-soc-dummy",
  2043. .ignore_suspend = 1,
  2044. .ignore_pmdown_time = 1,
  2045. /* this dai link has playback support */
  2046. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  2047. },
  2048. {/* hw:x,34 */
  2049. .name = "SLIMBUS_8 Hostless",
  2050. .stream_name = "SLIMBUS8_HOSTLESS Capture",
  2051. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  2052. .platform_name = "msm-pcm-hostless",
  2053. .dynamic = 1,
  2054. .dpcm_capture = 1,
  2055. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  2056. SND_SOC_DPCM_TRIGGER_POST},
  2057. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  2058. .ignore_suspend = 1,
  2059. .codec_dai_name = "snd-soc-dummy-dai",
  2060. .codec_name = "snd-soc-dummy",
  2061. },
  2062. {/* hw:x,35 */
  2063. .name = "Primary MI2S_RX Hostless",
  2064. .stream_name = "Primary MI2S_RX Hostless",
  2065. .cpu_dai_name = "PRI_MI2S_RX_HOSTLESS",
  2066. .platform_name = "msm-pcm-hostless",
  2067. .dynamic = 1,
  2068. .dpcm_playback = 1,
  2069. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  2070. SND_SOC_DPCM_TRIGGER_POST},
  2071. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  2072. .ignore_suspend = 1,
  2073. /* this dailink has playback support */
  2074. .ignore_pmdown_time = 1,
  2075. /* This dainlink has MI2S support */
  2076. .codec_dai_name = "snd-soc-dummy-dai",
  2077. .codec_name = "snd-soc-dummy",
  2078. },
  2079. {/* hw:x,36 */
  2080. .name = "Secondary MI2S_RX Hostless",
  2081. .stream_name = "Secondary MI2S_RX Hostless",
  2082. .cpu_dai_name = "SEC_MI2S_RX_HOSTLESS",
  2083. .platform_name = "msm-pcm-hostless",
  2084. .dynamic = 1,
  2085. .dpcm_playback = 1,
  2086. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  2087. SND_SOC_DPCM_TRIGGER_POST},
  2088. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  2089. .ignore_suspend = 1,
  2090. /* this dailink has playback support */
  2091. .ignore_pmdown_time = 1,
  2092. /* This dainlink has MI2S support */
  2093. .codec_dai_name = "snd-soc-dummy-dai",
  2094. .codec_name = "snd-soc-dummy",
  2095. },
  2096. {/* hw:x,37 */
  2097. .name = "Tertiary MI2S_RX Hostless",
  2098. .stream_name = "Tertiary MI2S_RX Hostless",
  2099. .cpu_dai_name = "TERT_MI2S_RX_HOSTLESS",
  2100. .platform_name = "msm-pcm-hostless",
  2101. .dynamic = 1,
  2102. .dpcm_playback = 1,
  2103. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  2104. SND_SOC_DPCM_TRIGGER_POST},
  2105. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  2106. .ignore_suspend = 1,
  2107. /* this dailink has playback support */
  2108. .ignore_pmdown_time = 1,
  2109. /* This dainlink has MI2S support */
  2110. .codec_dai_name = "snd-soc-dummy-dai",
  2111. .codec_name = "snd-soc-dummy",
  2112. },
  2113. {/* hw:x,38 */
  2114. .name = "INT0 MI2S_RX Hostless",
  2115. .stream_name = "INT0 MI2S_RX Hostless",
  2116. .cpu_dai_name = "INT0_MI2S_RX_HOSTLESS",
  2117. .platform_name = "msm-pcm-hostless",
  2118. .dynamic = 1,
  2119. .dpcm_playback = 1,
  2120. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  2121. SND_SOC_DPCM_TRIGGER_POST},
  2122. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  2123. .ignore_suspend = 1,
  2124. /* this dailink has playback support */
  2125. .ignore_pmdown_time = 1,
  2126. /* This dainlink has MI2S support */
  2127. .codec_dai_name = "snd-soc-dummy-dai",
  2128. .codec_name = "snd-soc-dummy",
  2129. },
  2130. {/* hw:x,39 */
  2131. .name = "SDM660 HFP TX",
  2132. .stream_name = "MultiMedia6",
  2133. .cpu_dai_name = "MultiMedia6",
  2134. .platform_name = "msm-pcm-loopback",
  2135. .dynamic = 1,
  2136. .dpcm_playback = 1,
  2137. .dpcm_capture = 1,
  2138. .codec_dai_name = "snd-soc-dummy-dai",
  2139. .codec_name = "snd-soc-dummy",
  2140. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  2141. SND_SOC_DPCM_TRIGGER_POST},
  2142. .ignore_suspend = 1,
  2143. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  2144. .ignore_pmdown_time = 1,
  2145. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  2146. },
  2147. };
  2148. static struct snd_soc_dai_link msm_int_wsa_dai[] = {
  2149. {/* hw:x,40 */
  2150. .name = LPASS_BE_INT5_MI2S_TX,
  2151. .stream_name = "INT5_mi2s Capture",
  2152. .cpu_dai_name = "msm-dai-q6-mi2s.12",
  2153. .platform_name = "msm-pcm-hostless",
  2154. .codec_name = "msm_sdw_codec",
  2155. .codec_dai_name = "msm_sdw_vifeedback",
  2156. .id = MSM_BACKEND_DAI_INT5_MI2S_TX,
  2157. .be_hw_params_fixup = int_mi2s_be_hw_params_fixup,
  2158. .ops = &msm_sdw_mi2s_be_ops,
  2159. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  2160. .ignore_suspend = 1,
  2161. .dpcm_capture = 1,
  2162. },
  2163. };
  2164. static struct snd_soc_dai_link msm_int_compress_capture_dai[] = {
  2165. {/* hw:x,41 */
  2166. .name = "Compress9",
  2167. .stream_name = "Compress9",
  2168. .cpu_dai_name = "MultiMedia17",
  2169. .platform_name = "msm-compress-dsp",
  2170. .dynamic = 1,
  2171. .dpcm_capture = 1,
  2172. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  2173. SND_SOC_DPCM_TRIGGER_POST},
  2174. .codec_dai_name = "snd-soc-dummy-dai",
  2175. .codec_name = "snd-soc-dummy",
  2176. .ignore_suspend = 1,
  2177. .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
  2178. },
  2179. {/* hw:x,42 */
  2180. .name = "Compress10",
  2181. .stream_name = "Compress10",
  2182. .cpu_dai_name = "MultiMedia18",
  2183. .platform_name = "msm-compress-dsp",
  2184. .dynamic = 1,
  2185. .dpcm_capture = 1,
  2186. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  2187. SND_SOC_DPCM_TRIGGER_POST},
  2188. .codec_dai_name = "snd-soc-dummy-dai",
  2189. .codec_name = "snd-soc-dummy",
  2190. .ignore_suspend = 1,
  2191. .id = MSM_FRONTEND_DAI_MULTIMEDIA18,
  2192. },
  2193. {/* hw:x,43 */
  2194. .name = "Compress11",
  2195. .stream_name = "Compress11",
  2196. .cpu_dai_name = "MultiMedia19",
  2197. .platform_name = "msm-compress-dsp",
  2198. .dynamic = 1,
  2199. .dpcm_capture = 1,
  2200. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  2201. SND_SOC_DPCM_TRIGGER_POST},
  2202. .codec_dai_name = "snd-soc-dummy-dai",
  2203. .codec_name = "snd-soc-dummy",
  2204. .ignore_suspend = 1,
  2205. .id = MSM_FRONTEND_DAI_MULTIMEDIA19,
  2206. },
  2207. {/* hw:x,44 */
  2208. .name = "Compress12",
  2209. .stream_name = "Compress12",
  2210. .cpu_dai_name = "MultiMedia28",
  2211. .platform_name = "msm-compress-dsp",
  2212. .dynamic = 1,
  2213. .dpcm_capture = 1,
  2214. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  2215. SND_SOC_DPCM_TRIGGER_POST},
  2216. .codec_dai_name = "snd-soc-dummy-dai",
  2217. .codec_name = "snd-soc-dummy",
  2218. .ignore_suspend = 1,
  2219. .id = MSM_FRONTEND_DAI_MULTIMEDIA28,
  2220. },
  2221. {/* hw:x,45 */
  2222. .name = "Compress13",
  2223. .stream_name = "Compress13",
  2224. .cpu_dai_name = "MultiMedia29",
  2225. .platform_name = "msm-compress-dsp",
  2226. .dynamic = 1,
  2227. .dpcm_capture = 1,
  2228. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  2229. SND_SOC_DPCM_TRIGGER_POST},
  2230. .codec_dai_name = "snd-soc-dummy-dai",
  2231. .codec_name = "snd-soc-dummy",
  2232. .ignore_suspend = 1,
  2233. .id = MSM_FRONTEND_DAI_MULTIMEDIA29,
  2234. },
  2235. };
  2236. static struct snd_soc_dai_link msm_int_be_dai[] = {
  2237. /* Backend I2S DAI Links */
  2238. {
  2239. .name = LPASS_BE_INT0_MI2S_RX,
  2240. .stream_name = "INT0 MI2S Playback",
  2241. .cpu_dai_name = "msm-dai-q6-mi2s.7",
  2242. .platform_name = "msm-pcm-routing",
  2243. .codecs = dlc_rx1,
  2244. .num_codecs = CODECS_MAX,
  2245. .no_pcm = 1,
  2246. .dpcm_playback = 1,
  2247. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE |
  2248. ASYNC_DPCM_SND_SOC_HW_PARAMS,
  2249. .id = MSM_BACKEND_DAI_INT0_MI2S_RX,
  2250. .init = &msm_audrx_init,
  2251. .be_hw_params_fixup = int_mi2s_be_hw_params_fixup,
  2252. .ops = &msm_int_mi2s_be_ops,
  2253. .ignore_suspend = 1,
  2254. },
  2255. {
  2256. .name = LPASS_BE_INT3_MI2S_TX,
  2257. .stream_name = "INT3 MI2S Capture",
  2258. .cpu_dai_name = "msm-dai-q6-mi2s.10",
  2259. .platform_name = "msm-pcm-routing",
  2260. .codecs = dlc_tx1,
  2261. .num_codecs = CODECS_MAX,
  2262. .no_pcm = 1,
  2263. .dpcm_capture = 1,
  2264. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE |
  2265. ASYNC_DPCM_SND_SOC_HW_PARAMS,
  2266. .id = MSM_BACKEND_DAI_INT3_MI2S_TX,
  2267. .be_hw_params_fixup = int_mi2s_be_hw_params_fixup,
  2268. .ops = &msm_int_mi2s_be_ops,
  2269. .ignore_suspend = 1,
  2270. },
  2271. {
  2272. .name = LPASS_BE_INT2_MI2S_TX,
  2273. .stream_name = "INT2 MI2S Capture",
  2274. .cpu_dai_name = "msm-dai-q6-mi2s.9",
  2275. .platform_name = "msm-pcm-routing",
  2276. .codecs = dlc_tx2,
  2277. .num_codecs = CODECS_MAX,
  2278. .no_pcm = 1,
  2279. .dpcm_capture = 1,
  2280. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE |
  2281. ASYNC_DPCM_SND_SOC_HW_PARAMS,
  2282. .id = MSM_BACKEND_DAI_INT2_MI2S_TX,
  2283. .be_hw_params_fixup = int_mi2s_be_hw_params_fixup,
  2284. .ops = &msm_int_mi2s_be_ops,
  2285. .ignore_suspend = 1,
  2286. },
  2287. {
  2288. .name = LPASS_BE_AFE_PCM_RX,
  2289. .stream_name = "AFE Playback",
  2290. .cpu_dai_name = "msm-dai-q6-dev.224",
  2291. .platform_name = "msm-pcm-routing",
  2292. .codec_name = "msm-stub-codec.1",
  2293. .codec_dai_name = "msm-stub-rx",
  2294. .no_pcm = 1,
  2295. .dpcm_playback = 1,
  2296. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  2297. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2298. /* this dainlink has playback support */
  2299. .ignore_pmdown_time = 1,
  2300. .ignore_suspend = 1,
  2301. },
  2302. {
  2303. .name = LPASS_BE_AFE_PCM_TX,
  2304. .stream_name = "AFE Capture",
  2305. .cpu_dai_name = "msm-dai-q6-dev.225",
  2306. .platform_name = "msm-pcm-routing",
  2307. .codec_name = "msm-stub-codec.1",
  2308. .codec_dai_name = "msm-stub-tx",
  2309. .no_pcm = 1,
  2310. .dpcm_capture = 1,
  2311. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  2312. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2313. .ignore_suspend = 1,
  2314. },
  2315. /* Incall Record Uplink BACK END DAI Link */
  2316. {
  2317. .name = LPASS_BE_INCALL_RECORD_TX,
  2318. .stream_name = "Voice Uplink Capture",
  2319. .cpu_dai_name = "msm-dai-q6-dev.32772",
  2320. .platform_name = "msm-pcm-routing",
  2321. .codec_name = "msm-stub-codec.1",
  2322. .codec_dai_name = "msm-stub-tx",
  2323. .no_pcm = 1,
  2324. .dpcm_capture = 1,
  2325. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  2326. .be_hw_params_fixup = msm_be_hw_params_fixup,
  2327. .ignore_suspend = 1,
  2328. },
  2329. /* Incall Record Downlink BACK END DAI Link */
  2330. {
  2331. .name = LPASS_BE_INCALL_RECORD_RX,
  2332. .stream_name = "Voice Downlink Capture",
  2333. .cpu_dai_name = "msm-dai-q6-dev.32771",
  2334. .platform_name = "msm-pcm-routing",
  2335. .codec_name = "msm-stub-codec.1",
  2336. .codec_dai_name = "msm-stub-tx",
  2337. .no_pcm = 1,
  2338. .dpcm_capture = 1,
  2339. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  2340. .be_hw_params_fixup = msm_be_hw_params_fixup,
  2341. .ignore_suspend = 1,
  2342. },
  2343. /* Incall Music BACK END DAI Link */
  2344. {
  2345. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  2346. .stream_name = "Voice Farend Playback",
  2347. .cpu_dai_name = "msm-dai-q6-dev.32773",
  2348. .platform_name = "msm-pcm-routing",
  2349. .codec_name = "msm-stub-codec.1",
  2350. .codec_dai_name = "msm-stub-rx",
  2351. .no_pcm = 1,
  2352. .dpcm_playback = 1,
  2353. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  2354. .be_hw_params_fixup = msm_be_hw_params_fixup,
  2355. .ignore_suspend = 1,
  2356. .ignore_pmdown_time = 1,
  2357. },
  2358. /* Incall Music 2 BACK END DAI Link */
  2359. {
  2360. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  2361. .stream_name = "Voice2 Farend Playback",
  2362. .cpu_dai_name = "msm-dai-q6-dev.32770",
  2363. .platform_name = "msm-pcm-routing",
  2364. .codec_name = "msm-stub-codec.1",
  2365. .codec_dai_name = "msm-stub-rx",
  2366. .no_pcm = 1,
  2367. .dpcm_playback = 1,
  2368. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  2369. .be_hw_params_fixup = msm_be_hw_params_fixup,
  2370. .ignore_suspend = 1,
  2371. .ignore_pmdown_time = 1,
  2372. },
  2373. {
  2374. .name = LPASS_BE_USB_AUDIO_RX,
  2375. .stream_name = "USB Audio Playback",
  2376. .cpu_dai_name = "msm-dai-q6-dev.28672",
  2377. .platform_name = "msm-pcm-routing",
  2378. .codec_name = "msm-stub-codec.1",
  2379. .codec_dai_name = "msm-stub-rx",
  2380. .no_pcm = 1,
  2381. .dpcm_playback = 1,
  2382. .id = MSM_BACKEND_DAI_USB_RX,
  2383. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2384. .ignore_pmdown_time = 1,
  2385. .ignore_suspend = 1,
  2386. },
  2387. {
  2388. .name = LPASS_BE_USB_AUDIO_TX,
  2389. .stream_name = "USB Audio Capture",
  2390. .cpu_dai_name = "msm-dai-q6-dev.28673",
  2391. .platform_name = "msm-pcm-routing",
  2392. .codec_name = "msm-stub-codec.1",
  2393. .codec_dai_name = "msm-stub-tx",
  2394. .no_pcm = 1,
  2395. .dpcm_capture = 1,
  2396. .id = MSM_BACKEND_DAI_USB_TX,
  2397. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2398. .ignore_suspend = 1,
  2399. },
  2400. {
  2401. .name = LPASS_BE_PRI_TDM_RX_0,
  2402. .stream_name = "Primary TDM0 Playback",
  2403. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  2404. .platform_name = "msm-pcm-routing",
  2405. .codec_name = "msm-stub-codec.1",
  2406. .codec_dai_name = "msm-stub-rx",
  2407. .no_pcm = 1,
  2408. .dpcm_playback = 1,
  2409. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  2410. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2411. .ops = &msm_tdm_be_ops,
  2412. .ignore_suspend = 1,
  2413. .ignore_pmdown_time = 1,
  2414. },
  2415. {
  2416. .name = LPASS_BE_PRI_TDM_TX_0,
  2417. .stream_name = "Primary TDM0 Capture",
  2418. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  2419. .platform_name = "msm-pcm-routing",
  2420. .codec_name = "msm-stub-codec.1",
  2421. .codec_dai_name = "msm-stub-tx",
  2422. .no_pcm = 1,
  2423. .dpcm_capture = 1,
  2424. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  2425. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2426. .ops = &msm_tdm_be_ops,
  2427. .ignore_suspend = 1,
  2428. },
  2429. {
  2430. .name = LPASS_BE_SEC_TDM_RX_0,
  2431. .stream_name = "Secondary TDM0 Playback",
  2432. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  2433. .platform_name = "msm-pcm-routing",
  2434. .codec_name = "msm-stub-codec.1",
  2435. .codec_dai_name = "msm-stub-rx",
  2436. .no_pcm = 1,
  2437. .dpcm_playback = 1,
  2438. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  2439. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2440. .ops = &msm_tdm_be_ops,
  2441. .ignore_suspend = 1,
  2442. .ignore_pmdown_time = 1,
  2443. },
  2444. {
  2445. .name = LPASS_BE_SEC_TDM_TX_0,
  2446. .stream_name = "Secondary TDM0 Capture",
  2447. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  2448. .platform_name = "msm-pcm-routing",
  2449. .codec_name = "msm-stub-codec.1",
  2450. .codec_dai_name = "msm-stub-tx",
  2451. .no_pcm = 1,
  2452. .dpcm_capture = 1,
  2453. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  2454. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2455. .ops = &msm_tdm_be_ops,
  2456. .ignore_suspend = 1,
  2457. },
  2458. {
  2459. .name = LPASS_BE_TERT_TDM_RX_0,
  2460. .stream_name = "Tertiary TDM0 Playback",
  2461. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  2462. .platform_name = "msm-pcm-routing",
  2463. .codec_name = "msm-stub-codec.1",
  2464. .codec_dai_name = "msm-stub-rx",
  2465. .no_pcm = 1,
  2466. .dpcm_playback = 1,
  2467. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  2468. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2469. .ops = &msm_tdm_be_ops,
  2470. .ignore_suspend = 1,
  2471. .ignore_pmdown_time = 1,
  2472. },
  2473. {
  2474. .name = LPASS_BE_TERT_TDM_TX_0,
  2475. .stream_name = "Tertiary TDM0 Capture",
  2476. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  2477. .platform_name = "msm-pcm-routing",
  2478. .codec_name = "msm-stub-codec.1",
  2479. .codec_dai_name = "msm-stub-tx",
  2480. .no_pcm = 1,
  2481. .dpcm_capture = 1,
  2482. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  2483. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2484. .ops = &msm_tdm_be_ops,
  2485. .ignore_suspend = 1,
  2486. },
  2487. {
  2488. .name = LPASS_BE_QUAT_TDM_RX_0,
  2489. .stream_name = "Quaternary TDM0 Playback",
  2490. .cpu_dai_name = "msm-dai-q6-tdm.36912",
  2491. .platform_name = "msm-pcm-routing",
  2492. .codec_name = "msm-stub-codec.1",
  2493. .codec_dai_name = "msm-stub-rx",
  2494. .no_pcm = 1,
  2495. .dpcm_playback = 1,
  2496. .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
  2497. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2498. .ops = &msm_tdm_be_ops,
  2499. .ignore_suspend = 1,
  2500. .ignore_pmdown_time = 1,
  2501. },
  2502. {
  2503. .name = LPASS_BE_QUAT_TDM_TX_0,
  2504. .stream_name = "Quaternary TDM0 Capture",
  2505. .cpu_dai_name = "msm-dai-q6-tdm.36913",
  2506. .platform_name = "msm-pcm-routing",
  2507. .codec_name = "msm-stub-codec.1",
  2508. .codec_dai_name = "msm-stub-tx",
  2509. .no_pcm = 1,
  2510. .dpcm_capture = 1,
  2511. .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
  2512. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2513. .ops = &msm_tdm_be_ops,
  2514. .ignore_suspend = 1,
  2515. },
  2516. {
  2517. .name = LPASS_BE_QUIN_TDM_RX_0,
  2518. .stream_name = "Quinary TDM0 Playback",
  2519. .cpu_dai_name = "msm-dai-q6-tdm.36928",
  2520. .platform_name = "msm-pcm-routing",
  2521. .codec_name = "msm-stub-codec.1",
  2522. .codec_dai_name = "msm-stub-rx",
  2523. .no_pcm = 1,
  2524. .dpcm_playback = 1,
  2525. .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,
  2526. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2527. .ops = &msm_tdm_be_ops,
  2528. .ignore_suspend = 1,
  2529. .ignore_pmdown_time = 1,
  2530. },
  2531. {
  2532. .name = LPASS_BE_QUIN_TDM_TX_0,
  2533. .stream_name = "Quinary TDM0 Capture",
  2534. .cpu_dai_name = "msm-dai-q6-tdm.36929",
  2535. .platform_name = "msm-pcm-routing",
  2536. .codec_name = "msm-stub-codec.1",
  2537. .codec_dai_name = "msm-stub-tx",
  2538. .no_pcm = 1,
  2539. .dpcm_capture = 1,
  2540. .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,
  2541. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2542. .ops = &msm_tdm_be_ops,
  2543. .ignore_suspend = 1,
  2544. },
  2545. };
  2546. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  2547. {
  2548. .name = LPASS_BE_PRI_MI2S_RX,
  2549. .stream_name = "Primary MI2S Playback",
  2550. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  2551. .platform_name = "msm-pcm-routing",
  2552. .codec_name = "msm-stub-codec.1",
  2553. .codec_dai_name = "msm-stub-rx",
  2554. .no_pcm = 1,
  2555. .dpcm_playback = 1,
  2556. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  2557. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2558. .ops = &msm_mi2s_be_ops,
  2559. .ignore_suspend = 1,
  2560. .ignore_pmdown_time = 1,
  2561. },
  2562. {
  2563. .name = LPASS_BE_PRI_MI2S_TX,
  2564. .stream_name = "Primary MI2S Capture",
  2565. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  2566. .platform_name = "msm-pcm-routing",
  2567. .codec_name = "msm-stub-codec.1",
  2568. .codec_dai_name = "msm-stub-tx",
  2569. .no_pcm = 1,
  2570. .dpcm_capture = 1,
  2571. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  2572. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2573. .ops = &msm_mi2s_be_ops,
  2574. .ignore_suspend = 1,
  2575. },
  2576. {
  2577. .name = LPASS_BE_SEC_MI2S_RX,
  2578. .stream_name = "Secondary MI2S Playback",
  2579. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  2580. .platform_name = "msm-pcm-routing",
  2581. .codec_name = "msm-stub-codec.1",
  2582. .codec_dai_name = "msm-stub-rx",
  2583. .no_pcm = 1,
  2584. .dpcm_playback = 1,
  2585. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  2586. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2587. .ops = &msm_mi2s_be_ops,
  2588. .ignore_suspend = 1,
  2589. .ignore_pmdown_time = 1,
  2590. },
  2591. {
  2592. .name = LPASS_BE_SEC_MI2S_TX,
  2593. .stream_name = "Secondary MI2S Capture",
  2594. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  2595. .platform_name = "msm-pcm-routing",
  2596. .codec_name = "msm-stub-codec.1",
  2597. .codec_dai_name = "msm-stub-tx",
  2598. .no_pcm = 1,
  2599. .dpcm_capture = 1,
  2600. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  2601. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2602. .ops = &msm_mi2s_be_ops,
  2603. .ignore_suspend = 1,
  2604. },
  2605. {
  2606. .name = LPASS_BE_TERT_MI2S_RX,
  2607. .stream_name = "Tertiary MI2S Playback",
  2608. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  2609. .platform_name = "msm-pcm-routing",
  2610. .codec_name = "msm-stub-codec.1",
  2611. .codec_dai_name = "msm-stub-rx",
  2612. .no_pcm = 1,
  2613. .dpcm_playback = 1,
  2614. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  2615. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2616. .ops = &msm_mi2s_be_ops,
  2617. .ignore_suspend = 1,
  2618. .ignore_pmdown_time = 1,
  2619. },
  2620. {
  2621. .name = LPASS_BE_TERT_MI2S_TX,
  2622. .stream_name = "Tertiary MI2S Capture",
  2623. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  2624. .platform_name = "msm-pcm-routing",
  2625. .codec_name = "msm-stub-codec.1",
  2626. .codec_dai_name = "msm-stub-tx",
  2627. .no_pcm = 1,
  2628. .dpcm_capture = 1,
  2629. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  2630. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2631. .ops = &msm_mi2s_be_ops,
  2632. .ignore_suspend = 1,
  2633. },
  2634. {
  2635. .name = LPASS_BE_QUAT_MI2S_RX,
  2636. .stream_name = "Quaternary MI2S Playback",
  2637. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  2638. .platform_name = "msm-pcm-routing",
  2639. .codec_name = "msm-stub-codec.1",
  2640. .codec_dai_name = "msm-stub-rx",
  2641. .no_pcm = 1,
  2642. .dpcm_playback = 1,
  2643. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
  2644. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2645. .ops = &msm_mi2s_be_ops,
  2646. .ignore_suspend = 1,
  2647. .ignore_pmdown_time = 1,
  2648. },
  2649. {
  2650. .name = LPASS_BE_QUAT_MI2S_TX,
  2651. .stream_name = "Quaternary MI2S Capture",
  2652. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  2653. .platform_name = "msm-pcm-routing",
  2654. .codec_name = "msm-stub-codec.1",
  2655. .codec_dai_name = "msm-stub-tx",
  2656. .no_pcm = 1,
  2657. .dpcm_capture = 1,
  2658. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
  2659. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2660. .ops = &msm_mi2s_be_ops,
  2661. .ignore_suspend = 1,
  2662. },
  2663. {
  2664. .name = LPASS_BE_QUIN_MI2S_RX,
  2665. .stream_name = "Quinary MI2S Playback",
  2666. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  2667. .platform_name = "msm-pcm-routing",
  2668. .codec_name = "msm-stub-codec.1",
  2669. .codec_dai_name = "msm-stub-rx",
  2670. .no_pcm = 1,
  2671. .dpcm_playback = 1,
  2672. .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
  2673. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2674. .ops = &msm_mi2s_be_ops,
  2675. .ignore_suspend = 1,
  2676. .ignore_pmdown_time = 1,
  2677. },
  2678. {
  2679. .name = LPASS_BE_QUIN_MI2S_TX,
  2680. .stream_name = "Quinary MI2S Capture",
  2681. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  2682. .platform_name = "msm-pcm-routing",
  2683. .codec_name = "msm-stub-codec.1",
  2684. .codec_dai_name = "msm-stub-tx",
  2685. .no_pcm = 1,
  2686. .dpcm_capture = 1,
  2687. .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
  2688. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2689. .ops = &msm_mi2s_be_ops,
  2690. .ignore_suspend = 1,
  2691. },
  2692. };
  2693. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  2694. /* Primary AUX PCM Backend DAI Links */
  2695. {
  2696. .name = LPASS_BE_AUXPCM_RX,
  2697. .stream_name = "AUX PCM Playback",
  2698. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  2699. .platform_name = "msm-pcm-routing",
  2700. .codec_name = "msm-stub-codec.1",
  2701. .codec_dai_name = "msm-stub-rx",
  2702. .no_pcm = 1,
  2703. .dpcm_playback = 1,
  2704. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  2705. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2706. .ignore_pmdown_time = 1,
  2707. .ignore_suspend = 1,
  2708. .ops = &msm_aux_pcm_be_ops,
  2709. },
  2710. {
  2711. .name = LPASS_BE_AUXPCM_TX,
  2712. .stream_name = "AUX PCM Capture",
  2713. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  2714. .platform_name = "msm-pcm-routing",
  2715. .codec_name = "msm-stub-codec.1",
  2716. .codec_dai_name = "msm-stub-tx",
  2717. .no_pcm = 1,
  2718. .dpcm_capture = 1,
  2719. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  2720. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2721. .ignore_suspend = 1,
  2722. .ops = &msm_aux_pcm_be_ops,
  2723. },
  2724. /* Secondary AUX PCM Backend DAI Links */
  2725. {
  2726. .name = LPASS_BE_SEC_AUXPCM_RX,
  2727. .stream_name = "Sec AUX PCM Playback",
  2728. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  2729. .platform_name = "msm-pcm-routing",
  2730. .codec_name = "msm-stub-codec.1",
  2731. .codec_dai_name = "msm-stub-rx",
  2732. .no_pcm = 1,
  2733. .dpcm_playback = 1,
  2734. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  2735. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2736. .ignore_pmdown_time = 1,
  2737. .ignore_suspend = 1,
  2738. .ops = &msm_aux_pcm_be_ops,
  2739. },
  2740. {
  2741. .name = LPASS_BE_SEC_AUXPCM_TX,
  2742. .stream_name = "Sec AUX PCM Capture",
  2743. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  2744. .platform_name = "msm-pcm-routing",
  2745. .codec_name = "msm-stub-codec.1",
  2746. .codec_dai_name = "msm-stub-tx",
  2747. .no_pcm = 1,
  2748. .dpcm_capture = 1,
  2749. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  2750. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2751. .ignore_suspend = 1,
  2752. .ops = &msm_aux_pcm_be_ops,
  2753. },
  2754. /* Tertiary AUX PCM Backend DAI Links */
  2755. {
  2756. .name = LPASS_BE_TERT_AUXPCM_RX,
  2757. .stream_name = "Tert AUX PCM Playback",
  2758. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  2759. .platform_name = "msm-pcm-routing",
  2760. .codec_name = "msm-stub-codec.1",
  2761. .codec_dai_name = "msm-stub-rx",
  2762. .no_pcm = 1,
  2763. .dpcm_playback = 1,
  2764. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  2765. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2766. .ignore_pmdown_time = 1,
  2767. .ignore_suspend = 1,
  2768. .ops = &msm_aux_pcm_be_ops,
  2769. },
  2770. {
  2771. .name = LPASS_BE_TERT_AUXPCM_TX,
  2772. .stream_name = "Tert AUX PCM Capture",
  2773. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  2774. .platform_name = "msm-pcm-routing",
  2775. .codec_name = "msm-stub-codec.1",
  2776. .codec_dai_name = "msm-stub-tx",
  2777. .no_pcm = 1,
  2778. .dpcm_capture = 1,
  2779. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  2780. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2781. .ignore_suspend = 1,
  2782. .ops = &msm_aux_pcm_be_ops,
  2783. },
  2784. /* Quaternary AUX PCM Backend DAI Links */
  2785. {
  2786. .name = LPASS_BE_QUAT_AUXPCM_RX,
  2787. .stream_name = "Quat AUX PCM Playback",
  2788. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  2789. .platform_name = "msm-pcm-routing",
  2790. .codec_name = "msm-stub-codec.1",
  2791. .codec_dai_name = "msm-stub-rx",
  2792. .no_pcm = 1,
  2793. .dpcm_playback = 1,
  2794. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
  2795. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2796. .ignore_pmdown_time = 1,
  2797. .ignore_suspend = 1,
  2798. .ops = &msm_aux_pcm_be_ops,
  2799. },
  2800. {
  2801. .name = LPASS_BE_QUAT_AUXPCM_TX,
  2802. .stream_name = "Quat AUX PCM Capture",
  2803. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  2804. .platform_name = "msm-pcm-routing",
  2805. .codec_name = "msm-stub-codec.1",
  2806. .codec_dai_name = "msm-stub-tx",
  2807. .no_pcm = 1,
  2808. .dpcm_capture = 1,
  2809. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
  2810. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2811. .ignore_suspend = 1,
  2812. .ops = &msm_aux_pcm_be_ops,
  2813. },
  2814. /* Quinary AUX PCM Backend DAI Links */
  2815. {
  2816. .name = LPASS_BE_QUIN_AUXPCM_RX,
  2817. .stream_name = "Quin AUX PCM Playback",
  2818. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  2819. .platform_name = "msm-pcm-routing",
  2820. .codec_name = "msm-stub-codec.1",
  2821. .codec_dai_name = "msm-stub-rx",
  2822. .no_pcm = 1,
  2823. .dpcm_playback = 1,
  2824. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
  2825. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2826. .ignore_pmdown_time = 1,
  2827. .ignore_suspend = 1,
  2828. .ops = &msm_aux_pcm_be_ops,
  2829. },
  2830. {
  2831. .name = LPASS_BE_QUIN_AUXPCM_TX,
  2832. .stream_name = "Quin AUX PCM Capture",
  2833. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  2834. .platform_name = "msm-pcm-routing",
  2835. .codec_name = "msm-stub-codec.1",
  2836. .codec_dai_name = "msm-stub-tx",
  2837. .no_pcm = 1,
  2838. .dpcm_capture = 1,
  2839. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
  2840. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2841. .ignore_suspend = 1,
  2842. .ops = &msm_aux_pcm_be_ops,
  2843. },
  2844. };
  2845. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  2846. {
  2847. .name = LPASS_BE_SLIMBUS_7_RX,
  2848. .stream_name = "Slimbus7 Playback",
  2849. .cpu_dai_name = "msm-dai-q6-dev.16398",
  2850. .platform_name = "msm-pcm-routing",
  2851. .codec_name = "btfmslim_slave",
  2852. /* BT codec driver determines capabilities based on
  2853. * dai name, bt codecdai name should always contains
  2854. * supported usecase information
  2855. */
  2856. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  2857. .no_pcm = 1,
  2858. .dpcm_playback = 1,
  2859. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  2860. .be_hw_params_fixup = msm_btfm_be_hw_params_fixup,
  2861. .ops = &msm_wcn_ops,
  2862. /* dai link has playback support */
  2863. .ignore_pmdown_time = 1,
  2864. .ignore_suspend = 1,
  2865. },
  2866. {
  2867. .name = LPASS_BE_SLIMBUS_7_TX,
  2868. .stream_name = "Slimbus7 Capture",
  2869. .cpu_dai_name = "msm-dai-q6-dev.16399",
  2870. .platform_name = "msm-pcm-routing",
  2871. .codec_name = "btfmslim_slave",
  2872. .codec_dai_name = "btfm_bt_sco_slim_tx",
  2873. .no_pcm = 1,
  2874. .dpcm_capture = 1,
  2875. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  2876. .be_hw_params_fixup = msm_btfm_be_hw_params_fixup,
  2877. .ops = &msm_wcn_ops,
  2878. .ignore_suspend = 1,
  2879. },
  2880. {
  2881. .name = LPASS_BE_SLIMBUS_8_TX,
  2882. .stream_name = "Slimbus8 Capture",
  2883. .cpu_dai_name = "msm-dai-q6-dev.16401",
  2884. .platform_name = "msm-pcm-routing",
  2885. .codec_name = "btfmslim_slave",
  2886. .codec_dai_name = "btfm_fm_slim_tx",
  2887. .no_pcm = 1,
  2888. .dpcm_capture = 1,
  2889. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  2890. .be_hw_params_fixup = msm_btfm_be_hw_params_fixup,
  2891. .init = &msm_wcn_init,
  2892. .ops = &msm_wcn_ops,
  2893. .ignore_suspend = 1,
  2894. },
  2895. };
  2896. static struct snd_soc_dai_link msm_wsa_be_dai_links[] = {
  2897. {
  2898. .name = LPASS_BE_INT4_MI2S_RX,
  2899. .stream_name = "INT4 MI2S Playback",
  2900. .cpu_dai_name = "msm-dai-q6-mi2s.11",
  2901. .platform_name = "msm-pcm-routing",
  2902. .codec_name = "msm_sdw_codec",
  2903. .codec_dai_name = "msm_sdw_i2s_rx1",
  2904. .no_pcm = 1,
  2905. .dpcm_playback = 1,
  2906. .id = MSM_BACKEND_DAI_INT4_MI2S_RX,
  2907. .init = &msm_sdw_audrx_init,
  2908. .be_hw_params_fixup = int_mi2s_be_hw_params_fixup,
  2909. .ops = &msm_sdw_mi2s_be_ops,
  2910. .ignore_suspend = 1,
  2911. },
  2912. };
  2913. static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
  2914. /* DISP PORT BACK END DAI Link */
  2915. {
  2916. .name = LPASS_BE_DISPLAY_PORT,
  2917. .stream_name = "Display Port Playback",
  2918. .cpu_dai_name = "msm-dai-q6-dp.24608",
  2919. .platform_name = "msm-pcm-routing",
  2920. .codec_name = "msm-ext-disp-audio-codec-rx",
  2921. .codec_dai_name = "msm_dp_audio_codec_rx_dai",
  2922. .no_pcm = 1,
  2923. .dpcm_playback = 1,
  2924. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
  2925. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2926. .ignore_pmdown_time = 1,
  2927. .ignore_suspend = 1,
  2928. },
  2929. };
  2930. static struct snd_soc_dai_link msm_int_dai_links[
  2931. ARRAY_SIZE(msm_int_dai) +
  2932. ARRAY_SIZE(msm_int_wsa_dai) +
  2933. ARRAY_SIZE(msm_int_compress_capture_dai) +
  2934. ARRAY_SIZE(msm_int_be_dai) +
  2935. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  2936. ARRAY_SIZE(msm_auxpcm_be_dai_links)+
  2937. ARRAY_SIZE(msm_wcn_be_dai_links) +
  2938. ARRAY_SIZE(msm_wsa_be_dai_links) +
  2939. ARRAY_SIZE(ext_disp_be_dai_link)];
  2940. static struct snd_soc_card sdm660_card = {
  2941. /* snd_soc_card_sdm660 */
  2942. .name = "sdm660-snd-card",
  2943. .dai_link = msm_int_dai,
  2944. .num_links = ARRAY_SIZE(msm_int_dai),
  2945. .late_probe = msm_snd_card_late_probe,
  2946. };
  2947. static void msm_disable_int_mclk0(struct work_struct *work)
  2948. {
  2949. struct msm_asoc_mach_data *pdata = NULL;
  2950. struct delayed_work *dwork;
  2951. int ret = 0;
  2952. dwork = to_delayed_work(work);
  2953. pdata = container_of(dwork, struct msm_asoc_mach_data,
  2954. disable_int_mclk0_work);
  2955. mutex_lock(&pdata->cdc_int_mclk0_mutex);
  2956. pr_debug("%s: mclk_enabled %d mclk_rsc_ref %d\n", __func__,
  2957. atomic_read(&pdata->int_mclk0_enabled),
  2958. atomic_read(&pdata->int_mclk0_rsc_ref));
  2959. if (atomic_read(&pdata->int_mclk0_enabled) == true
  2960. && atomic_read(&pdata->int_mclk0_rsc_ref) == 0) {
  2961. pr_debug("Disable the mclk\n");
  2962. pdata->digital_cdc_core_clk.enable = 0;
  2963. pdata->digital_cdc_core_clk.clk_freq_in_hz =
  2964. DEFAULT_MCLK_RATE;
  2965. ret = afe_set_lpass_clock_v2(
  2966. AFE_PORT_ID_INT0_MI2S_RX,
  2967. &pdata->digital_cdc_core_clk);
  2968. if (ret < 0)
  2969. pr_err("%s failed to disable the CCLK\n", __func__);
  2970. atomic_set(&pdata->int_mclk0_enabled, false);
  2971. }
  2972. mutex_unlock(&pdata->cdc_int_mclk0_mutex);
  2973. }
  2974. static void msm_int_dt_parse_cap_info(struct platform_device *pdev,
  2975. struct msm_asoc_mach_data *pdata)
  2976. {
  2977. const char *ext1_cap = "qcom,msm-micbias1-ext-cap";
  2978. const char *ext2_cap = "qcom,msm-micbias2-ext-cap";
  2979. pdata->micbias1_cap_mode =
  2980. (of_property_read_bool(pdev->dev.of_node, ext1_cap) ?
  2981. MICBIAS_EXT_BYP_CAP : MICBIAS_NO_EXT_BYP_CAP);
  2982. pdata->micbias2_cap_mode =
  2983. (of_property_read_bool(pdev->dev.of_node, ext2_cap) ?
  2984. MICBIAS_EXT_BYP_CAP : MICBIAS_NO_EXT_BYP_CAP);
  2985. }
  2986. static struct snd_soc_card *msm_int_populate_sndcard_dailinks(
  2987. struct device *dev)
  2988. {
  2989. struct snd_soc_card *card = &sdm660_card;
  2990. struct snd_soc_dai_link *dailink;
  2991. int len1;
  2992. card->name = dev_name(dev);
  2993. len1 = ARRAY_SIZE(msm_int_dai);
  2994. memcpy(msm_int_dai_links, msm_int_dai, sizeof(msm_int_dai));
  2995. dailink = msm_int_dai_links;
  2996. if (!of_property_read_bool(dev->of_node,
  2997. "qcom,wsa-disable")) {
  2998. memcpy(dailink + len1,
  2999. msm_int_wsa_dai,
  3000. sizeof(msm_int_wsa_dai));
  3001. len1 += ARRAY_SIZE(msm_int_wsa_dai);
  3002. }
  3003. memcpy(dailink + len1, msm_int_compress_capture_dai,
  3004. sizeof(msm_int_compress_capture_dai));
  3005. len1 += ARRAY_SIZE(msm_int_compress_capture_dai);
  3006. memcpy(dailink + len1, msm_int_be_dai, sizeof(msm_int_be_dai));
  3007. len1 += ARRAY_SIZE(msm_int_be_dai);
  3008. if (of_property_read_bool(dev->of_node,
  3009. "qcom,mi2s-audio-intf")) {
  3010. memcpy(dailink + len1,
  3011. msm_mi2s_be_dai_links,
  3012. sizeof(msm_mi2s_be_dai_links));
  3013. len1 += ARRAY_SIZE(msm_mi2s_be_dai_links);
  3014. }
  3015. if (of_property_read_bool(dev->of_node,
  3016. "qcom,auxpcm-audio-intf")) {
  3017. memcpy(dailink + len1,
  3018. msm_auxpcm_be_dai_links,
  3019. sizeof(msm_auxpcm_be_dai_links));
  3020. len1 += ARRAY_SIZE(msm_auxpcm_be_dai_links);
  3021. }
  3022. if (of_property_read_bool(dev->of_node, "qcom,wcn-btfm")) {
  3023. dev_dbg(dev, "%s(): WCN BTFM support present\n",
  3024. __func__);
  3025. memcpy(dailink + len1,
  3026. msm_wcn_be_dai_links,
  3027. sizeof(msm_wcn_be_dai_links));
  3028. len1 += ARRAY_SIZE(msm_wcn_be_dai_links);
  3029. }
  3030. if (!of_property_read_bool(dev->of_node, "qcom,wsa-disable")) {
  3031. memcpy(dailink + len1,
  3032. msm_wsa_be_dai_links,
  3033. sizeof(msm_wsa_be_dai_links));
  3034. len1 += ARRAY_SIZE(msm_wsa_be_dai_links);
  3035. }
  3036. if (of_property_read_bool(dev->of_node, "qcom,ext-disp-audio-rx")) {
  3037. dev_dbg(dev, "%s(): ext disp audio support present\n",
  3038. __func__);
  3039. memcpy(dailink + len1,
  3040. ext_disp_be_dai_link,
  3041. sizeof(ext_disp_be_dai_link));
  3042. len1 += ARRAY_SIZE(ext_disp_be_dai_link);
  3043. }
  3044. card->dai_link = dailink;
  3045. card->num_links = len1;
  3046. return card;
  3047. }
  3048. static int msm_internal_init(struct platform_device *pdev,
  3049. struct msm_asoc_mach_data *pdata,
  3050. struct snd_soc_card *card)
  3051. {
  3052. const char *type = NULL;
  3053. const char *hs_micbias_type = "qcom,msm-hs-micbias-type";
  3054. int ret;
  3055. ret = is_ext_spk_gpio_support(pdev, pdata);
  3056. if (ret < 0)
  3057. dev_dbg(&pdev->dev,
  3058. "%s: doesn't support external speaker pa\n",
  3059. __func__);
  3060. ret = of_property_read_string(pdev->dev.of_node,
  3061. hs_micbias_type, &type);
  3062. if (ret) {
  3063. dev_err(&pdev->dev, "%s: missing %s in dt node\n",
  3064. __func__, hs_micbias_type);
  3065. goto err;
  3066. }
  3067. if (!strcmp(type, "external")) {
  3068. dev_dbg(&pdev->dev, "Headset is using external micbias\n");
  3069. mbhc_cfg_ptr->hs_ext_micbias = true;
  3070. } else {
  3071. dev_dbg(&pdev->dev, "Headset is using internal micbias\n");
  3072. mbhc_cfg_ptr->hs_ext_micbias = false;
  3073. }
  3074. /* initialize the int_mclk0 */
  3075. pdata->digital_cdc_core_clk.clk_set_minor_version =
  3076. AFE_API_VERSION_I2S_CONFIG;
  3077. pdata->digital_cdc_core_clk.clk_id =
  3078. Q6AFE_LPASS_CLK_ID_INT_MCLK_0;
  3079. pdata->digital_cdc_core_clk.clk_freq_in_hz = pdata->mclk_freq;
  3080. pdata->digital_cdc_core_clk.clk_attri =
  3081. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO;
  3082. pdata->digital_cdc_core_clk.clk_root =
  3083. Q6AFE_LPASS_CLK_ROOT_DEFAULT;
  3084. pdata->digital_cdc_core_clk.enable = 1;
  3085. /* Initialize loopback mode to false */
  3086. pdata->lb_mode = false;
  3087. msm_int_dt_parse_cap_info(pdev, pdata);
  3088. card->dev = &pdev->dev;
  3089. platform_set_drvdata(pdev, card);
  3090. snd_soc_card_set_drvdata(card, pdata);
  3091. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  3092. if (ret)
  3093. goto err;
  3094. /* initialize timer */
  3095. INIT_DELAYED_WORK(&pdata->disable_int_mclk0_work,
  3096. msm_disable_int_mclk0);
  3097. mutex_init(&pdata->cdc_int_mclk0_mutex);
  3098. atomic_set(&pdata->int_mclk0_rsc_ref, 0);
  3099. atomic_set(&pdata->int_mclk0_enabled, false);
  3100. dev_info(&pdev->dev, "%s: default codec configured\n", __func__);
  3101. return 0;
  3102. err:
  3103. return ret;
  3104. }
  3105. /**
  3106. * msm_int_cdc_init - internal codec machine specific init.
  3107. *
  3108. * @pdev: platform device handle
  3109. * @pdata: private data of machine driver
  3110. * @card: sound card pointer reference
  3111. * @mbhc_cfg: MBHC config reference
  3112. *
  3113. * Returns 0.
  3114. */
  3115. int msm_int_cdc_init(struct platform_device *pdev,
  3116. struct msm_asoc_mach_data *pdata,
  3117. struct snd_soc_card **card,
  3118. struct wcd_mbhc_config *mbhc_cfg)
  3119. {
  3120. mbhc_cfg_ptr = mbhc_cfg;
  3121. *card = msm_int_populate_sndcard_dailinks(&pdev->dev);
  3122. msm_internal_init(pdev, pdata, *card);
  3123. return 0;
  3124. }
  3125. EXPORT_SYMBOL(msm_int_cdc_init);