wcd9360-dsp-cntl.c 35 KB

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  1. /*
  2. * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/slab.h>
  14. #include <linux/delay.h>
  15. #include <linux/component.h>
  16. #include <linux/debugfs.h>
  17. #include <sound/soc.h>
  18. #include <sound/wcd-dsp-mgr.h>
  19. #include <asoc/wcd9360-registers.h>
  20. #include "wcd9360.h"
  21. #include "wcd9360-dsp-cntl.h"
  22. #include "../wcd9xxx-irq.h"
  23. #include "../core.h"
  24. #define WCD_CNTL_DIR_NAME_LEN_MAX 32
  25. #define WCD_CPE_FLL_MAX_RETRIES 5
  26. #define WCD_MEM_ENABLE_MAX_RETRIES 20
  27. #define WCD_DSP_BOOT_TIMEOUT_MS 3000
  28. #define WCD_SYSFS_ENTRY_MAX_LEN 8
  29. #define WCD_PROCFS_ENTRY_MAX_LEN 16
  30. #define WCD_9360_RAMDUMP_START_ADDR 0x20100000
  31. #define WCD_9360_RAMDUMP_SIZE ((1024 * 1024) - 128)
  32. #define WCD_MISCDEV_CMD_MAX_LEN 2
  33. #define WCD_CNTL_MUTEX_LOCK(codec, lock) \
  34. { \
  35. dev_dbg(codec->dev, "%s: mutex_lock(%s)\n", \
  36. __func__, __stringify_1(lock)); \
  37. mutex_lock(&lock); \
  38. }
  39. #define WCD_CNTL_MUTEX_UNLOCK(codec, lock) \
  40. { \
  41. dev_dbg(codec->dev, "%s: mutex_unlock(%s)\n", \
  42. __func__, __stringify_1(lock)); \
  43. mutex_unlock(&lock); \
  44. }
  45. enum wcd_mem_type {
  46. WCD_MEM_TYPE_ALWAYS_ON,
  47. WCD_MEM_TYPE_SWITCHABLE,
  48. };
  49. struct wcd_cntl_attribute {
  50. struct attribute attr;
  51. ssize_t (*show)(struct wcd_dsp_cntl *cntl, char *buf);
  52. ssize_t (*store)(struct wcd_dsp_cntl *cntl, const char *buf,
  53. ssize_t count);
  54. };
  55. #define WCD_CNTL_ATTR(_name, _mode, _show, _store) \
  56. static struct wcd_cntl_attribute cntl_attr_##_name = { \
  57. .attr = {.name = __stringify(_name), .mode = _mode}, \
  58. .show = _show, \
  59. .store = _store, \
  60. }
  61. #define to_wcd_cntl_attr(a) \
  62. container_of((a), struct wcd_cntl_attribute, attr)
  63. #define to_wcd_cntl(kobj) \
  64. container_of((kobj), struct wcd_dsp_cntl, wcd_kobj)
  65. static u8 mem_enable_values[] = {
  66. 0xFE, 0xFC, 0xF8, 0xF0,
  67. 0xE0, 0xC0, 0x80, 0x00,
  68. };
  69. static ssize_t wdsp_boot_show(struct wcd_dsp_cntl *cntl, char *buf)
  70. {
  71. return snprintf(buf, WCD_SYSFS_ENTRY_MAX_LEN,
  72. "%u", cntl->boot_reqs);
  73. }
  74. static ssize_t wdsp_boot_store(struct wcd_dsp_cntl *cntl,
  75. const char *buf, ssize_t count)
  76. {
  77. u32 val;
  78. bool vote;
  79. int ret;
  80. ret = kstrtou32(buf, 10, &val);
  81. if (ret) {
  82. dev_err(cntl->codec->dev,
  83. "%s: Invalid entry, ret = %d\n", __func__, ret);
  84. return -EINVAL;
  85. }
  86. if (val > 0) {
  87. cntl->boot_reqs++;
  88. vote = true;
  89. } else {
  90. cntl->boot_reqs--;
  91. vote = false;
  92. }
  93. if (cntl->m_dev && cntl->m_ops &&
  94. cntl->m_ops->vote_for_dsp)
  95. ret = cntl->m_ops->vote_for_dsp(cntl->m_dev, vote);
  96. else
  97. ret = -EINVAL;
  98. if (ret < 0)
  99. dev_err(cntl->codec->dev,
  100. "%s: failed to %s dsp\n", __func__,
  101. vote ? "enable" : "disable");
  102. return count;
  103. }
  104. WCD_CNTL_ATTR(boot, 0660, wdsp_boot_show, wdsp_boot_store);
  105. static ssize_t wcd_cntl_sysfs_show(struct kobject *kobj,
  106. struct attribute *attr, char *buf)
  107. {
  108. struct wcd_cntl_attribute *wcd_attr = to_wcd_cntl_attr(attr);
  109. struct wcd_dsp_cntl *cntl = to_wcd_cntl(kobj);
  110. ssize_t ret = -EINVAL;
  111. if (cntl && wcd_attr->show)
  112. ret = wcd_attr->show(cntl, buf);
  113. return ret;
  114. }
  115. static ssize_t wcd_cntl_sysfs_store(struct kobject *kobj,
  116. struct attribute *attr, const char *buf,
  117. size_t count)
  118. {
  119. struct wcd_cntl_attribute *wcd_attr = to_wcd_cntl_attr(attr);
  120. struct wcd_dsp_cntl *cntl = to_wcd_cntl(kobj);
  121. ssize_t ret = -EINVAL;
  122. if (cntl && wcd_attr->store)
  123. ret = wcd_attr->store(cntl, buf, count);
  124. return ret;
  125. }
  126. static const struct sysfs_ops wcd_cntl_sysfs_ops = {
  127. .show = wcd_cntl_sysfs_show,
  128. .store = wcd_cntl_sysfs_store,
  129. };
  130. static struct kobj_type wcd_cntl_ktype = {
  131. .sysfs_ops = &wcd_cntl_sysfs_ops,
  132. };
  133. static void wcd_cntl_change_online_state(struct wcd_dsp_cntl *cntl,
  134. u8 online)
  135. {
  136. struct wdsp_ssr_entry *ssr_entry = &cntl->ssr_entry;
  137. unsigned long ret;
  138. WCD_CNTL_MUTEX_LOCK(cntl->codec, cntl->ssr_mutex);
  139. ssr_entry->offline = !online;
  140. /* Make sure the write is complete */
  141. wmb();
  142. ret = xchg(&ssr_entry->offline_change, 1);
  143. wake_up_interruptible(&ssr_entry->offline_poll_wait);
  144. dev_dbg(cntl->codec->dev,
  145. "%s: requested %u, offline %u offline_change %u, ret = %ldn",
  146. __func__, online, ssr_entry->offline,
  147. ssr_entry->offline_change, ret);
  148. WCD_CNTL_MUTEX_UNLOCK(cntl->codec, cntl->ssr_mutex);
  149. }
  150. static ssize_t wdsp_ssr_entry_read(struct snd_info_entry *entry,
  151. void *file_priv_data, struct file *file,
  152. char __user *buf, size_t count, loff_t pos)
  153. {
  154. int len = 0;
  155. char buffer[WCD_PROCFS_ENTRY_MAX_LEN];
  156. struct wcd_dsp_cntl *cntl;
  157. struct wdsp_ssr_entry *ssr_entry;
  158. ssize_t ret;
  159. u8 offline;
  160. cntl = (struct wcd_dsp_cntl *) entry->private_data;
  161. if (!cntl) {
  162. pr_err("%s: Invalid private data for SSR procfs entry\n",
  163. __func__);
  164. return -EINVAL;
  165. }
  166. ssr_entry = &cntl->ssr_entry;
  167. WCD_CNTL_MUTEX_LOCK(cntl->codec, cntl->ssr_mutex);
  168. offline = ssr_entry->offline;
  169. /* Make sure the read is complete */
  170. rmb();
  171. dev_dbg(cntl->codec->dev, "%s: offline = %s\n", __func__,
  172. offline ? "true" : "false");
  173. len = snprintf(buffer, sizeof(buffer), "%s\n",
  174. offline ? "OFFLINE" : "ONLINE");
  175. ret = simple_read_from_buffer(buf, count, &pos, buffer, len);
  176. WCD_CNTL_MUTEX_UNLOCK(cntl->codec, cntl->ssr_mutex);
  177. return ret;
  178. }
  179. static unsigned int wdsp_ssr_entry_poll(struct snd_info_entry *entry,
  180. void *private_data, struct file *file,
  181. poll_table *wait)
  182. {
  183. struct wcd_dsp_cntl *cntl;
  184. struct wdsp_ssr_entry *ssr_entry;
  185. unsigned int ret = 0;
  186. if (!entry || !entry->private_data) {
  187. pr_err("%s: %s is NULL\n", __func__,
  188. (!entry) ? "entry" : "private_data");
  189. return -EINVAL;
  190. }
  191. cntl = (struct wcd_dsp_cntl *) entry->private_data;
  192. ssr_entry = &cntl->ssr_entry;
  193. dev_dbg(cntl->codec->dev, "%s: Poll wait, offline = %u\n",
  194. __func__, ssr_entry->offline);
  195. poll_wait(file, &ssr_entry->offline_poll_wait, wait);
  196. dev_dbg(cntl->codec->dev, "%s: Woken up Poll wait, offline = %u\n",
  197. __func__, ssr_entry->offline);
  198. WCD_CNTL_MUTEX_LOCK(cntl->codec, cntl->ssr_mutex);
  199. if (xchg(&ssr_entry->offline_change, 0))
  200. ret = POLLIN | POLLPRI | POLLRDNORM;
  201. dev_dbg(cntl->codec->dev, "%s: ret (%d) from poll_wait\n",
  202. __func__, ret);
  203. WCD_CNTL_MUTEX_UNLOCK(cntl->codec, cntl->ssr_mutex);
  204. return ret;
  205. }
  206. static struct snd_info_entry_ops wdsp_ssr_entry_ops = {
  207. .read = wdsp_ssr_entry_read,
  208. .poll = wdsp_ssr_entry_poll,
  209. };
  210. static int wcd_cntl_cpe_fll_calibrate(struct wcd_dsp_cntl *cntl)
  211. {
  212. struct snd_soc_codec *codec = cntl->codec;
  213. int ret = 0, retry = 0;
  214. u8 cal_lsb, cal_msb;
  215. u8 lock_det;
  216. /* Make sure clocks are gated */
  217. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPE_CTL,
  218. 0x05, 0x00);
  219. /* Enable CPE FLL reference clock */
  220. snd_soc_update_bits(codec, WCD9360_CLK_SYS_MCLK2_PRG1,
  221. 0x80, 0x80);
  222. snd_soc_update_bits(codec, WCD9360_CPE_FLL_USER_CTL_5,
  223. 0xF3, 0x13);
  224. snd_soc_write(codec, WCD9360_CPE_FLL_L_VAL_CTL_0, 0x50);
  225. /* Disable CPAR reset and Enable CPAR clk */
  226. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPAR_CTL,
  227. 0x02, 0x02);
  228. /* Write calibration l-value based on cdc clk rate */
  229. if (cntl->clk_rate == 9600000) {
  230. cal_lsb = 0x6d;
  231. cal_msb = 0x00;
  232. } else {
  233. cal_lsb = 0x56;
  234. cal_msb = 0x00;
  235. }
  236. snd_soc_write(codec, WCD9360_CPE_FLL_USER_CTL_6, cal_lsb);
  237. snd_soc_write(codec, WCD9360_CPE_FLL_USER_CTL_7, cal_msb);
  238. /* FLL mode to follow power up sequence */
  239. snd_soc_update_bits(codec, WCD9360_CPE_FLL_FLL_MODE,
  240. 0x60, 0x00);
  241. /* HW controlled CPE FLL */
  242. snd_soc_update_bits(codec, WCD9360_CPE_FLL_FLL_MODE,
  243. 0x80, 0x80);
  244. /* Force on CPE FLL */
  245. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPAR_CFG,
  246. 0x04, 0x04);
  247. do {
  248. /* Time for FLL calibration to complete */
  249. usleep_range(1000, 1100);
  250. lock_det = snd_soc_read(codec, WCD9360_CPE_FLL_STATUS_3);
  251. retry++;
  252. } while (!(lock_det & 0x01) &&
  253. retry <= WCD_CPE_FLL_MAX_RETRIES);
  254. if (!(lock_det & 0x01)) {
  255. dev_err(codec->dev, "%s: lock detect not set, 0x%02x\n",
  256. __func__, lock_det);
  257. ret = -EIO;
  258. goto err_lock_det;
  259. }
  260. snd_soc_update_bits(codec, WCD9360_CPE_FLL_FLL_MODE,
  261. 0x60, 0x20);
  262. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPAR_CFG,
  263. 0x04, 0x00);
  264. return ret;
  265. err_lock_det:
  266. /* Undo the register settings */
  267. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPAR_CFG,
  268. 0x04, 0x00);
  269. snd_soc_update_bits(codec, WCD9360_CPE_FLL_FLL_MODE,
  270. 0x80, 0x00);
  271. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPAR_CTL,
  272. 0x02, 0x00);
  273. return ret;
  274. }
  275. static void wcd_cntl_config_cpar(struct wcd_dsp_cntl *cntl)
  276. {
  277. struct snd_soc_codec *codec = cntl->codec;
  278. u8 nom_lo, nom_hi, svs2_lo, svs2_hi;
  279. /* Configure CPAR */
  280. nom_hi = svs2_hi = 0;
  281. if (cntl->clk_rate == 9600000) {
  282. nom_lo = 0x90;
  283. svs2_lo = 0x50;
  284. } else {
  285. nom_lo = 0x70;
  286. svs2_lo = 0x3e;
  287. }
  288. snd_soc_write(codec, WCD9360_TEST_DEBUG_LVAL_NOM_LOW, nom_lo);
  289. snd_soc_write(codec, WCD9360_TEST_DEBUG_LVAL_NOM_HIGH, nom_hi);
  290. snd_soc_write(codec, WCD9360_TEST_DEBUG_LVAL_SVS_SVS2_LOW, svs2_lo);
  291. snd_soc_write(codec, WCD9360_TEST_DEBUG_LVAL_SVS_SVS2_HIGH, svs2_hi);
  292. snd_soc_update_bits(codec, WCD9360_CPE_SS_PWR_CPEFLL_CTL,
  293. 0x03, 0x03);
  294. }
  295. static int wcd_cntl_cpe_fll_ctrl(struct wcd_dsp_cntl *cntl,
  296. bool enable)
  297. {
  298. struct snd_soc_codec *codec = cntl->codec;
  299. int ret = 0;
  300. if (enable) {
  301. ret = wcd_cntl_cpe_fll_calibrate(cntl);
  302. if (ret < 0) {
  303. dev_err(codec->dev,
  304. "%s: cpe_fll_cal failed, err = %d\n",
  305. __func__, ret);
  306. goto done;
  307. }
  308. wcd_cntl_config_cpar(cntl);
  309. /* Enable AHB CLK and CPE CLK*/
  310. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPE_CTL,
  311. 0x05, 0x05);
  312. } else {
  313. /* Disable AHB CLK and CPE CLK */
  314. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPE_CTL,
  315. 0x05, 0x00);
  316. /* Reset the CPAR mode for CPE FLL */
  317. snd_soc_write(codec, WCD9360_CPE_FLL_FLL_MODE, 0x20);
  318. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPAR_CFG,
  319. 0x04, 0x00);
  320. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPAR_CTL,
  321. 0x02, 0x00);
  322. }
  323. done:
  324. return ret;
  325. }
  326. static int wcd_cntl_clocks_enable(struct wcd_dsp_cntl *cntl)
  327. {
  328. struct snd_soc_codec *codec = cntl->codec;
  329. int ret;
  330. WCD_CNTL_MUTEX_LOCK(codec, cntl->clk_mutex);
  331. /* Enable codec clock */
  332. if (cntl->cdc_cb && cntl->cdc_cb->cdc_clk_en)
  333. ret = cntl->cdc_cb->cdc_clk_en(codec, true);
  334. else
  335. ret = -EINVAL;
  336. if (ret < 0) {
  337. dev_err(codec->dev,
  338. "%s: Failed to enable cdc clk, err = %d\n",
  339. __func__, ret);
  340. goto done;
  341. }
  342. /* Pull CPAR out of reset */
  343. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPAR_CTL, 0x04, 0x00);
  344. /* Configure and Enable CPE FLL clock */
  345. ret = wcd_cntl_cpe_fll_ctrl(cntl, true);
  346. if (ret < 0) {
  347. dev_err(codec->dev,
  348. "%s: Failed to enable cpe clk, err = %d\n",
  349. __func__, ret);
  350. goto err_cpe_clk;
  351. }
  352. cntl->is_clk_enabled = true;
  353. /* Ungate the CPR clock */
  354. snd_soc_update_bits(codec, WCD9360_CODEC_RPM_CLK_GATE, 0x10, 0x00);
  355. done:
  356. WCD_CNTL_MUTEX_UNLOCK(codec, cntl->clk_mutex);
  357. return ret;
  358. err_cpe_clk:
  359. if (cntl->cdc_cb && cntl->cdc_cb->cdc_clk_en)
  360. cntl->cdc_cb->cdc_clk_en(codec, false);
  361. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPAR_CTL, 0x04, 0x04);
  362. WCD_CNTL_MUTEX_UNLOCK(codec, cntl->clk_mutex);
  363. return ret;
  364. }
  365. static int wcd_cntl_clocks_disable(struct wcd_dsp_cntl *cntl)
  366. {
  367. struct snd_soc_codec *codec = cntl->codec;
  368. int ret = 0;
  369. WCD_CNTL_MUTEX_LOCK(codec, cntl->clk_mutex);
  370. if (!cntl->is_clk_enabled) {
  371. dev_info(codec->dev, "%s: clocks already disabled\n",
  372. __func__);
  373. goto done;
  374. }
  375. /* Gate the CPR clock */
  376. snd_soc_update_bits(codec, WCD9360_CODEC_RPM_CLK_GATE, 0x10, 0x10);
  377. /* Disable CPE FLL clock */
  378. ret = wcd_cntl_cpe_fll_ctrl(cntl, false);
  379. if (ret < 0)
  380. dev_err(codec->dev,
  381. "%s: Failed to disable cpe clk, err = %d\n",
  382. __func__, ret);
  383. /*
  384. * Even if CPE FLL disable failed, go ahead and disable
  385. * the codec clock
  386. */
  387. if (cntl->cdc_cb && cntl->cdc_cb->cdc_clk_en)
  388. ret = cntl->cdc_cb->cdc_clk_en(codec, false);
  389. else
  390. ret = -EINVAL;
  391. cntl->is_clk_enabled = false;
  392. /* Put CPAR in reset */
  393. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPAR_CTL, 0x04, 0x04);
  394. done:
  395. WCD_CNTL_MUTEX_UNLOCK(codec, cntl->clk_mutex);
  396. return ret;
  397. }
  398. static void wcd_cntl_cpar_ctrl(struct wcd_dsp_cntl *cntl,
  399. bool enable)
  400. {
  401. struct snd_soc_codec *codec = cntl->codec;
  402. if (enable)
  403. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPAR_CTL, 0x03, 0x03);
  404. else
  405. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPAR_CTL, 0x03, 0x00);
  406. }
  407. static int wcd_cntl_enable_memory(struct wcd_dsp_cntl *cntl,
  408. enum wcd_mem_type mem_type)
  409. {
  410. struct snd_soc_codec *codec = cntl->codec;
  411. struct wcd9xxx *wcd9xxx = dev_get_drvdata(codec->dev->parent);
  412. int loop_cnt = 0;
  413. u8 status = 0;
  414. int ret = 0;
  415. switch (mem_type) {
  416. case WCD_MEM_TYPE_ALWAYS_ON:
  417. /* 512KB of always on region */
  418. wcd9xxx_slim_write_repeat(wcd9xxx,
  419. WCD9360_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_0,
  420. ARRAY_SIZE(mem_enable_values),
  421. mem_enable_values);
  422. wcd9xxx_slim_write_repeat(wcd9xxx,
  423. WCD9360_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_1,
  424. ARRAY_SIZE(mem_enable_values),
  425. mem_enable_values);
  426. break;
  427. case WCD_MEM_TYPE_SWITCHABLE:
  428. snd_soc_update_bits(codec, WCD9360_TEST_DEBUG_MEM_CTRL,
  429. 0x80, 0x80);
  430. do {
  431. loop_cnt++;
  432. /* Time to enable the power domain for memory */
  433. usleep_range(100, 150);
  434. } while ((status & 0x02) != 0x02 &&
  435. loop_cnt != WCD_MEM_ENABLE_MAX_RETRIES);
  436. if ((status & 0x02) != 0x02) {
  437. dev_err(cntl->codec->dev,
  438. "%s: power domain not enabled, status = 0x%02x\n",
  439. __func__, status);
  440. ret = -EIO;
  441. goto done;
  442. }
  443. /* Rest of the memory */
  444. wcd9xxx_slim_write_repeat(wcd9xxx,
  445. WCD9360_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_2,
  446. ARRAY_SIZE(mem_enable_values),
  447. mem_enable_values);
  448. wcd9xxx_slim_write_repeat(wcd9xxx,
  449. WCD9360_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_3,
  450. ARRAY_SIZE(mem_enable_values),
  451. mem_enable_values);
  452. snd_soc_write(codec, WCD9360_CPE_SS_PWR_CPE_DRAM1_SHUTDOWN,
  453. 0x05);
  454. break;
  455. default:
  456. dev_err(cntl->codec->dev, "%s: Invalid mem_type %d\n",
  457. __func__, mem_type);
  458. ret = -EINVAL;
  459. break;
  460. }
  461. done:
  462. /* Make sure Deep sleep of memories is enabled for all banks */
  463. snd_soc_write(codec, WCD9360_CPE_SS_PWR_CPE_SYSMEM_DEEPSLP_0, 0xFF);
  464. snd_soc_write(codec, WCD9360_CPE_SS_PWR_CPE_SYSMEM_DEEPSLP_1, 0x0F);
  465. return ret;
  466. }
  467. static void wcd_cntl_disable_memory(struct wcd_dsp_cntl *cntl,
  468. enum wcd_mem_type mem_type)
  469. {
  470. struct snd_soc_codec *codec = cntl->codec;
  471. switch (mem_type) {
  472. case WCD_MEM_TYPE_ALWAYS_ON:
  473. snd_soc_write(codec, WCD9360_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_1,
  474. 0xFF);
  475. snd_soc_write(codec, WCD9360_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_0,
  476. 0xFF);
  477. break;
  478. case WCD_MEM_TYPE_SWITCHABLE:
  479. snd_soc_write(codec, WCD9360_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_3,
  480. 0xFF);
  481. snd_soc_write(codec, WCD9360_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_2,
  482. 0xFF);
  483. snd_soc_write(codec, WCD9360_CPE_SS_PWR_CPE_DRAM1_SHUTDOWN,
  484. 0x07);
  485. snd_soc_update_bits(codec, WCD9360_TEST_DEBUG_MEM_CTRL,
  486. 0x80, 0x00);
  487. break;
  488. default:
  489. dev_err(cntl->codec->dev, "%s: Invalid mem_type %d\n",
  490. __func__, mem_type);
  491. break;
  492. }
  493. snd_soc_write(codec, WCD9360_CPE_SS_PWR_CPE_SYSMEM_DEEPSLP_0, 0xFF);
  494. snd_soc_write(codec, WCD9360_CPE_SS_PWR_CPE_SYSMEM_DEEPSLP_1, 0x0F);
  495. }
  496. static void wcd_cntl_do_shutdown(struct wcd_dsp_cntl *cntl)
  497. {
  498. struct snd_soc_codec *codec = cntl->codec;
  499. /* Disable WDOG */
  500. snd_soc_update_bits(codec, WCD9360_CPE_SS_WDOG_CFG,
  501. 0x3F, 0x01);
  502. /* Put WDSP in reset state */
  503. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPE_CTL,
  504. 0x02, 0x00);
  505. /* If DSP transitions from boot to shutdown, then vote for SVS */
  506. if (cntl->is_wdsp_booted)
  507. cntl->cdc_cb->cdc_vote_svs(codec, true);
  508. cntl->is_wdsp_booted = false;
  509. }
  510. static int wcd_cntl_do_boot(struct wcd_dsp_cntl *cntl)
  511. {
  512. struct snd_soc_codec *codec = cntl->codec;
  513. int ret = 0;
  514. /*
  515. * Debug mode is set from debugfs file node. If debug_mode
  516. * is set, then do not configure the watchdog timer. This
  517. * will be required for debugging the DSP firmware.
  518. */
  519. if (cntl->debug_mode) {
  520. snd_soc_update_bits(codec, WCD9360_CPE_SS_WDOG_CFG,
  521. 0x3F, 0x01);
  522. } else {
  523. snd_soc_update_bits(codec, WCD9360_CPE_SS_WDOG_CFG,
  524. 0x3F, 0x21);
  525. }
  526. /* Make sure all the error interrupts are cleared */
  527. snd_soc_write(codec, WCD9360_CPE_SS_SS_ERROR_INT_CLEAR_0A, 0xFF);
  528. snd_soc_write(codec, WCD9360_CPE_SS_SS_ERROR_INT_CLEAR_0B, 0xFF);
  529. reinit_completion(&cntl->boot_complete);
  530. /* Remove WDSP out of reset */
  531. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPE_CTL,
  532. 0x02, 0x02);
  533. /*
  534. * In debug mode, DSP may not boot up normally,
  535. * wait indefinitely for DSP to boot.
  536. */
  537. if (cntl->debug_mode) {
  538. wait_for_completion(&cntl->boot_complete);
  539. dev_dbg(codec->dev, "%s: WDSP booted in dbg mode\n", __func__);
  540. cntl->is_wdsp_booted = true;
  541. goto done;
  542. }
  543. /* Boot in normal mode */
  544. ret = wait_for_completion_timeout(&cntl->boot_complete,
  545. msecs_to_jiffies(WCD_DSP_BOOT_TIMEOUT_MS));
  546. if (!ret) {
  547. dev_err(codec->dev, "%s: WDSP boot timed out\n",
  548. __func__);
  549. ret = -ETIMEDOUT;
  550. goto err_boot;
  551. } else {
  552. /*
  553. * Re-initialize the return code to 0, as in success case,
  554. * it will hold the remaining time for completion timeout
  555. */
  556. ret = 0;
  557. }
  558. dev_dbg(codec->dev, "%s: WDSP booted in normal mode\n", __func__);
  559. cntl->is_wdsp_booted = true;
  560. /* Enable WDOG */
  561. snd_soc_update_bits(codec, WCD9360_CPE_SS_WDOG_CFG,
  562. 0x10, 0x10);
  563. done:
  564. /* If dsp booted up, then remove vote on SVS */
  565. if (cntl->is_wdsp_booted)
  566. cntl->cdc_cb->cdc_vote_svs(codec, false);
  567. return ret;
  568. err_boot:
  569. /* call shutdown to perform cleanup */
  570. wcd_cntl_do_shutdown(cntl);
  571. return ret;
  572. }
  573. static irqreturn_t wcd_cntl_ipc_irq(int irq, void *data)
  574. {
  575. struct wcd_dsp_cntl *cntl = data;
  576. int ret;
  577. complete(&cntl->boot_complete);
  578. if (cntl->m_dev && cntl->m_ops &&
  579. cntl->m_ops->signal_handler)
  580. ret = cntl->m_ops->signal_handler(cntl->m_dev, WDSP_IPC1_INTR,
  581. NULL);
  582. else
  583. ret = -EINVAL;
  584. if (ret < 0)
  585. dev_err(cntl->codec->dev,
  586. "%s: Failed to handle irq %d\n", __func__, irq);
  587. return IRQ_HANDLED;
  588. }
  589. static irqreturn_t wcd_cntl_err_irq(int irq, void *data)
  590. {
  591. struct wcd_dsp_cntl *cntl = data;
  592. struct snd_soc_codec *codec = cntl->codec;
  593. struct wdsp_err_signal_arg arg;
  594. u16 status = 0;
  595. u8 reg_val;
  596. int ret = 0;
  597. reg_val = snd_soc_read(codec, WCD9360_CPE_SS_SS_ERROR_INT_STATUS_0A);
  598. status = status | reg_val;
  599. reg_val = snd_soc_read(codec, WCD9360_CPE_SS_SS_ERROR_INT_STATUS_0B);
  600. status = status | (reg_val << 8);
  601. dev_info(codec->dev, "%s: error interrupt status = 0x%x\n",
  602. __func__, status);
  603. if ((status & cntl->irqs.fatal_irqs) &&
  604. (cntl->m_dev && cntl->m_ops && cntl->m_ops->signal_handler)) {
  605. arg.mem_dumps_enabled = cntl->ramdump_enable;
  606. arg.remote_start_addr = WCD_9360_RAMDUMP_START_ADDR;
  607. arg.dump_size = WCD_9360_RAMDUMP_SIZE;
  608. ret = cntl->m_ops->signal_handler(cntl->m_dev, WDSP_ERR_INTR,
  609. &arg);
  610. if (ret < 0)
  611. dev_err(cntl->codec->dev,
  612. "%s: Failed to handle fatal irq 0x%x\n",
  613. __func__, status & cntl->irqs.fatal_irqs);
  614. wcd_cntl_change_online_state(cntl, 0);
  615. } else {
  616. dev_err(cntl->codec->dev, "%s: Invalid signal_handler\n",
  617. __func__);
  618. }
  619. return IRQ_HANDLED;
  620. }
  621. static int wcd_control_handler(struct device *dev, void *priv_data,
  622. enum wdsp_event_type event, void *data)
  623. {
  624. struct wcd_dsp_cntl *cntl = priv_data;
  625. struct snd_soc_codec *codec = cntl->codec;
  626. int ret = 0;
  627. switch (event) {
  628. case WDSP_EVENT_POST_INIT:
  629. case WDSP_EVENT_POST_DLOAD_CODE:
  630. case WDSP_EVENT_DLOAD_FAILED:
  631. case WDSP_EVENT_POST_SHUTDOWN:
  632. /* Disable CPAR */
  633. wcd_cntl_cpar_ctrl(cntl, false);
  634. /* Disable all the clocks */
  635. ret = wcd_cntl_clocks_disable(cntl);
  636. if (ret < 0)
  637. dev_err(codec->dev,
  638. "%s: Failed to disable clocks, err = %d\n",
  639. __func__, ret);
  640. if (event == WDSP_EVENT_POST_DLOAD_CODE)
  641. /* Mark DSP online since code download is complete */
  642. wcd_cntl_change_online_state(cntl, 1);
  643. break;
  644. case WDSP_EVENT_PRE_DLOAD_DATA:
  645. case WDSP_EVENT_PRE_DLOAD_CODE:
  646. /* Enable all the clocks */
  647. ret = wcd_cntl_clocks_enable(cntl);
  648. if (ret < 0) {
  649. dev_err(codec->dev,
  650. "%s: Failed to enable clocks, err = %d\n",
  651. __func__, ret);
  652. goto done;
  653. }
  654. /* Enable CPAR */
  655. wcd_cntl_cpar_ctrl(cntl, true);
  656. if (event == WDSP_EVENT_PRE_DLOAD_CODE)
  657. wcd_cntl_enable_memory(cntl, WCD_MEM_TYPE_ALWAYS_ON);
  658. else if (event == WDSP_EVENT_PRE_DLOAD_DATA)
  659. wcd_cntl_enable_memory(cntl, WCD_MEM_TYPE_SWITCHABLE);
  660. break;
  661. case WDSP_EVENT_DO_BOOT:
  662. ret = wcd_cntl_do_boot(cntl);
  663. if (ret < 0)
  664. dev_err(codec->dev,
  665. "%s: WDSP boot failed, err = %d\n",
  666. __func__, ret);
  667. break;
  668. case WDSP_EVENT_DO_SHUTDOWN:
  669. wcd_cntl_do_shutdown(cntl);
  670. wcd_cntl_disable_memory(cntl, WCD_MEM_TYPE_SWITCHABLE);
  671. break;
  672. default:
  673. dev_dbg(codec->dev, "%s: unhandled event %d\n",
  674. __func__, event);
  675. }
  676. done:
  677. return ret;
  678. }
  679. static int wcd_cntl_sysfs_init(char *dir, struct wcd_dsp_cntl *cntl)
  680. {
  681. struct snd_soc_codec *codec = cntl->codec;
  682. int ret = 0;
  683. ret = kobject_init_and_add(&cntl->wcd_kobj, &wcd_cntl_ktype,
  684. kernel_kobj, dir);
  685. if (ret < 0) {
  686. dev_err(codec->dev,
  687. "%s: Failed to add kobject %s, err = %d\n",
  688. __func__, dir, ret);
  689. goto done;
  690. }
  691. ret = sysfs_create_file(&cntl->wcd_kobj, &cntl_attr_boot.attr);
  692. if (ret < 0) {
  693. dev_err(codec->dev,
  694. "%s: Failed to add wdsp_boot sysfs entry to %s\n",
  695. __func__, dir);
  696. goto fail_create_file;
  697. }
  698. return ret;
  699. fail_create_file:
  700. kobject_put(&cntl->wcd_kobj);
  701. done:
  702. return ret;
  703. }
  704. static void wcd_cntl_sysfs_remove(struct wcd_dsp_cntl *cntl)
  705. {
  706. sysfs_remove_file(&cntl->wcd_kobj, &cntl_attr_boot.attr);
  707. kobject_put(&cntl->wcd_kobj);
  708. }
  709. static void wcd_cntl_debugfs_init(char *dir, struct wcd_dsp_cntl *cntl)
  710. {
  711. struct snd_soc_codec *codec = cntl->codec;
  712. cntl->entry = debugfs_create_dir(dir, NULL);
  713. if (IS_ERR_OR_NULL(dir)) {
  714. dev_err(codec->dev, "%s debugfs_create_dir failed for %s\n",
  715. __func__, dir);
  716. goto done;
  717. }
  718. debugfs_create_u32("debug_mode", 0644,
  719. cntl->entry, &cntl->debug_mode);
  720. debugfs_create_bool("ramdump_enable", 0644,
  721. cntl->entry, &cntl->ramdump_enable);
  722. done:
  723. return;
  724. }
  725. static void wcd_cntl_debugfs_remove(struct wcd_dsp_cntl *cntl)
  726. {
  727. if (cntl)
  728. debugfs_remove(cntl->entry);
  729. }
  730. static int wcd_miscdev_release(struct inode *inode, struct file *filep)
  731. {
  732. struct wcd_dsp_cntl *cntl = container_of(filep->private_data,
  733. struct wcd_dsp_cntl, miscdev);
  734. if (!cntl->m_dev || !cntl->m_ops ||
  735. !cntl->m_ops->vote_for_dsp) {
  736. dev_err(cntl->codec->dev,
  737. "%s: DSP not ready to boot\n", __func__);
  738. return -EINVAL;
  739. }
  740. /* Make sure the DSP users goes to zero upon closing dev node */
  741. while (cntl->boot_reqs > 0) {
  742. cntl->m_ops->vote_for_dsp(cntl->m_dev, false);
  743. cntl->boot_reqs--;
  744. }
  745. return 0;
  746. }
  747. static ssize_t wcd_miscdev_write(struct file *filep, const char __user *ubuf,
  748. size_t count, loff_t *pos)
  749. {
  750. struct wcd_dsp_cntl *cntl = container_of(filep->private_data,
  751. struct wcd_dsp_cntl, miscdev);
  752. char val[WCD_MISCDEV_CMD_MAX_LEN + 1];
  753. bool vote;
  754. int ret = 0;
  755. memset(val, 0, WCD_MISCDEV_CMD_MAX_LEN + 1);
  756. if (count == 0 || count > WCD_MISCDEV_CMD_MAX_LEN) {
  757. pr_err("%s: Invalid count = %zd\n", __func__, count);
  758. ret = -EINVAL;
  759. goto done;
  760. }
  761. ret = copy_from_user(val, ubuf, count);
  762. if (ret < 0) {
  763. dev_err(cntl->codec->dev,
  764. "%s: copy_from_user failed, err = %d\n",
  765. __func__, ret);
  766. ret = -EFAULT;
  767. goto done;
  768. }
  769. if (val[0] == '1') {
  770. cntl->boot_reqs++;
  771. vote = true;
  772. } else if (val[0] == '0') {
  773. if (cntl->boot_reqs == 0) {
  774. dev_err(cntl->codec->dev,
  775. "%s: WDSP already disabled\n", __func__);
  776. ret = -EINVAL;
  777. goto done;
  778. }
  779. cntl->boot_reqs--;
  780. vote = false;
  781. } else {
  782. dev_err(cntl->codec->dev, "%s: Invalid value %s\n",
  783. __func__, val);
  784. ret = -EINVAL;
  785. goto done;
  786. }
  787. dev_dbg(cntl->codec->dev,
  788. "%s: booted = %s, ref_cnt = %d, vote = %s\n",
  789. __func__, cntl->is_wdsp_booted ? "true" : "false",
  790. cntl->boot_reqs, vote ? "true" : "false");
  791. if (cntl->m_dev && cntl->m_ops &&
  792. cntl->m_ops->vote_for_dsp)
  793. ret = cntl->m_ops->vote_for_dsp(cntl->m_dev, vote);
  794. else
  795. ret = -EINVAL;
  796. done:
  797. if (ret)
  798. return ret;
  799. else
  800. return count;
  801. }
  802. static const struct file_operations wcd_miscdev_fops = {
  803. .write = wcd_miscdev_write,
  804. .release = wcd_miscdev_release,
  805. };
  806. static int wcd_cntl_miscdev_create(struct wcd_dsp_cntl *cntl)
  807. {
  808. snprintf(cntl->miscdev_name, ARRAY_SIZE(cntl->miscdev_name),
  809. "wcd_dsp%u_control", cntl->dsp_instance);
  810. cntl->miscdev.minor = MISC_DYNAMIC_MINOR;
  811. cntl->miscdev.name = cntl->miscdev_name;
  812. cntl->miscdev.fops = &wcd_miscdev_fops;
  813. cntl->miscdev.parent = cntl->codec->dev;
  814. return misc_register(&cntl->miscdev);
  815. }
  816. static void wcd_cntl_miscdev_destroy(struct wcd_dsp_cntl *cntl)
  817. {
  818. misc_deregister(&cntl->miscdev);
  819. }
  820. static int wcd_control_init(struct device *dev, void *priv_data)
  821. {
  822. struct wcd_dsp_cntl *cntl = priv_data;
  823. struct snd_soc_codec *codec = cntl->codec;
  824. struct wcd9xxx *wcd9xxx = dev_get_drvdata(codec->dev->parent);
  825. struct wcd9xxx_core_resource *core_res = &wcd9xxx->core_res;
  826. int ret;
  827. bool err_irq_requested = false;
  828. ret = wcd9xxx_request_irq(core_res,
  829. cntl->irqs.cpe_ipc1_irq,
  830. wcd_cntl_ipc_irq, "CPE IPC1",
  831. cntl);
  832. if (ret < 0) {
  833. dev_err(codec->dev,
  834. "%s: Failed to request cpe ipc irq, err = %d\n",
  835. __func__, ret);
  836. goto done;
  837. }
  838. /* Unmask the fatal irqs */
  839. snd_soc_write(codec, WCD9360_CPE_SS_SS_ERROR_INT_MASK_0A,
  840. ~(cntl->irqs.fatal_irqs & 0xFF));
  841. snd_soc_write(codec, WCD9360_CPE_SS_SS_ERROR_INT_MASK_0B,
  842. ~((cntl->irqs.fatal_irqs >> 8) & 0xFF));
  843. /*
  844. * CPE ERR irq is used only for error reporting from WCD DSP,
  845. * even if this request fails, DSP can be function normally.
  846. * Continuing with init even if the CPE ERR irq request fails.
  847. */
  848. if (wcd9xxx_request_irq(core_res, cntl->irqs.cpe_err_irq,
  849. wcd_cntl_err_irq, "CPE ERR", cntl))
  850. dev_info(codec->dev, "%s: Failed request_irq(cpe_err_irq)",
  851. __func__);
  852. else
  853. err_irq_requested = true;
  854. /* Enable all the clocks */
  855. ret = wcd_cntl_clocks_enable(cntl);
  856. if (ret < 0) {
  857. dev_err(codec->dev, "%s: Failed to enable clocks, err = %d\n",
  858. __func__, ret);
  859. goto err_clk_enable;
  860. }
  861. wcd_cntl_cpar_ctrl(cntl, true);
  862. return 0;
  863. err_clk_enable:
  864. /* Mask all error interrupts */
  865. snd_soc_write(codec, WCD9360_CPE_SS_SS_ERROR_INT_MASK_0A, 0xFF);
  866. snd_soc_write(codec, WCD9360_CPE_SS_SS_ERROR_INT_MASK_0B, 0xFF);
  867. /* Free the irq's requested */
  868. wcd9xxx_free_irq(core_res, cntl->irqs.cpe_ipc1_irq, cntl);
  869. if (err_irq_requested)
  870. wcd9xxx_free_irq(core_res, cntl->irqs.cpe_err_irq, cntl);
  871. done:
  872. return ret;
  873. }
  874. static int wcd_control_deinit(struct device *dev, void *priv_data)
  875. {
  876. struct wcd_dsp_cntl *cntl = priv_data;
  877. struct snd_soc_codec *codec = cntl->codec;
  878. struct wcd9xxx *wcd9xxx = dev_get_drvdata(codec->dev->parent);
  879. struct wcd9xxx_core_resource *core_res = &wcd9xxx->core_res;
  880. wcd_cntl_clocks_disable(cntl);
  881. wcd_cntl_cpar_ctrl(cntl, false);
  882. /* Mask all error interrupts */
  883. snd_soc_write(codec, WCD9360_CPE_SS_SS_ERROR_INT_MASK_0A, 0xFF);
  884. snd_soc_write(codec, WCD9360_CPE_SS_SS_ERROR_INT_MASK_0B, 0xFF);
  885. /* Free the irq's requested */
  886. wcd9xxx_free_irq(core_res, cntl->irqs.cpe_err_irq, cntl);
  887. wcd9xxx_free_irq(core_res, cntl->irqs.cpe_ipc1_irq, cntl);
  888. return 0;
  889. }
  890. static struct wdsp_cmpnt_ops control_ops = {
  891. .init = wcd_control_init,
  892. .deinit = wcd_control_deinit,
  893. .event_handler = wcd_control_handler,
  894. };
  895. static int wcd_ctrl_component_bind(struct device *dev,
  896. struct device *master,
  897. void *data)
  898. {
  899. struct wcd_dsp_cntl *cntl;
  900. struct snd_soc_codec *codec;
  901. struct snd_card *card;
  902. struct snd_info_entry *entry;
  903. char proc_name[WCD_PROCFS_ENTRY_MAX_LEN];
  904. char wcd_cntl_dir_name[WCD_CNTL_DIR_NAME_LEN_MAX];
  905. int ret = 0;
  906. if (!dev || !master || !data) {
  907. pr_err("%s: Invalid parameters\n", __func__);
  908. return -EINVAL;
  909. }
  910. cntl = (struct wcd_dsp_cntl *) pahu_get_wcd_dsp_cntl(dev);
  911. if (!cntl) {
  912. dev_err(dev, "%s: Failed to get cntl reference\n",
  913. __func__);
  914. return -EINVAL;
  915. }
  916. cntl->m_dev = master;
  917. cntl->m_ops = data;
  918. if (!cntl->m_ops->register_cmpnt_ops) {
  919. dev_err(dev, "%s: invalid master callback register_cmpnt_ops\n",
  920. __func__);
  921. ret = -EINVAL;
  922. goto done;
  923. }
  924. ret = cntl->m_ops->register_cmpnt_ops(master, dev, cntl, &control_ops);
  925. if (ret) {
  926. dev_err(dev, "%s: register_cmpnt_ops failed, err = %d\n",
  927. __func__, ret);
  928. goto done;
  929. }
  930. ret = wcd_cntl_miscdev_create(cntl);
  931. if (ret < 0) {
  932. dev_err(dev, "%s: misc dev register failed, err = %d\n",
  933. __func__, ret);
  934. goto done;
  935. }
  936. snprintf(wcd_cntl_dir_name, WCD_CNTL_DIR_NAME_LEN_MAX,
  937. "%s%d", "wdsp", cntl->dsp_instance);
  938. ret = wcd_cntl_sysfs_init(wcd_cntl_dir_name, cntl);
  939. if (ret < 0) {
  940. dev_err(dev, "%s: sysfs_init failed, err = %d\n",
  941. __func__, ret);
  942. goto err_sysfs_init;
  943. }
  944. wcd_cntl_debugfs_init(wcd_cntl_dir_name, cntl);
  945. codec = cntl->codec;
  946. card = codec->component.card->snd_card;
  947. snprintf(proc_name, WCD_PROCFS_ENTRY_MAX_LEN, "%s%d%s", "cpe",
  948. cntl->dsp_instance, "_state");
  949. entry = snd_info_create_card_entry(card, proc_name, card->proc_root);
  950. if (!entry) {
  951. /* Do not treat this as Fatal error */
  952. dev_err(dev, "%s: Failed to create procfs entry %s\n",
  953. __func__, proc_name);
  954. goto err_sysfs_init;
  955. }
  956. cntl->ssr_entry.entry = entry;
  957. cntl->ssr_entry.offline = 1;
  958. entry->size = WCD_PROCFS_ENTRY_MAX_LEN;
  959. entry->content = SNDRV_INFO_CONTENT_DATA;
  960. entry->c.ops = &wdsp_ssr_entry_ops;
  961. entry->private_data = cntl;
  962. ret = snd_info_register(entry);
  963. if (ret < 0) {
  964. dev_err(dev, "%s: Failed to register entry %s, err = %d\n",
  965. __func__, proc_name, ret);
  966. snd_info_free_entry(entry);
  967. /* Let bind still happen even if creating the entry failed */
  968. ret = 0;
  969. }
  970. done:
  971. return ret;
  972. err_sysfs_init:
  973. wcd_cntl_miscdev_destroy(cntl);
  974. return ret;
  975. }
  976. static void wcd_ctrl_component_unbind(struct device *dev,
  977. struct device *master,
  978. void *data)
  979. {
  980. struct wcd_dsp_cntl *cntl;
  981. if (!dev) {
  982. pr_err("%s: Invalid device\n", __func__);
  983. return;
  984. }
  985. cntl = (struct wcd_dsp_cntl *) pahu_get_wcd_dsp_cntl(dev);
  986. if (!cntl) {
  987. dev_err(dev, "%s: Failed to get cntl reference\n",
  988. __func__);
  989. return;
  990. }
  991. cntl->m_dev = NULL;
  992. cntl->m_ops = NULL;
  993. /* Remove the sysfs entries */
  994. wcd_cntl_sysfs_remove(cntl);
  995. /* Remove the debugfs entries */
  996. wcd_cntl_debugfs_remove(cntl);
  997. /* Remove the misc device */
  998. wcd_cntl_miscdev_destroy(cntl);
  999. }
  1000. static const struct component_ops wcd_ctrl_component_ops = {
  1001. .bind = wcd_ctrl_component_bind,
  1002. .unbind = wcd_ctrl_component_unbind,
  1003. };
  1004. /*
  1005. * wcd9360_dsp_ssr_event: handle the SSR event raised by caller.
  1006. * @cntl: Handle to the wcd_dsp_cntl structure
  1007. * @event: The SSR event to be handled
  1008. *
  1009. * Notifies the manager driver about the SSR event.
  1010. * Returns 0 on success and negative error code on error.
  1011. */
  1012. int wcd9360_dsp_ssr_event(struct wcd_dsp_cntl *cntl, enum cdc_ssr_event event)
  1013. {
  1014. int ret = 0;
  1015. if (!cntl) {
  1016. pr_err("%s: Invalid handle to control\n", __func__);
  1017. return -EINVAL;
  1018. }
  1019. if (!cntl->m_dev || !cntl->m_ops || !cntl->m_ops->signal_handler) {
  1020. dev_err(cntl->codec->dev,
  1021. "%s: Invalid signal_handler callback\n", __func__);
  1022. return -EINVAL;
  1023. }
  1024. switch (event) {
  1025. case WCD_CDC_DOWN_EVENT:
  1026. ret = cntl->m_ops->signal_handler(cntl->m_dev,
  1027. WDSP_CDC_DOWN_SIGNAL,
  1028. NULL);
  1029. if (ret < 0)
  1030. dev_err(cntl->codec->dev,
  1031. "%s: WDSP_CDC_DOWN_SIGNAL failed, err = %d\n",
  1032. __func__, ret);
  1033. wcd_cntl_change_online_state(cntl, 0);
  1034. break;
  1035. case WCD_CDC_UP_EVENT:
  1036. ret = cntl->m_ops->signal_handler(cntl->m_dev,
  1037. WDSP_CDC_UP_SIGNAL,
  1038. NULL);
  1039. if (ret < 0)
  1040. dev_err(cntl->codec->dev,
  1041. "%s: WDSP_CDC_UP_SIGNAL failed, err = %d\n",
  1042. __func__, ret);
  1043. break;
  1044. default:
  1045. dev_err(cntl->codec->dev, "%s: Invalid event %d\n",
  1046. __func__, event);
  1047. ret = -EINVAL;
  1048. break;
  1049. }
  1050. return ret;
  1051. }
  1052. EXPORT_SYMBOL(wcd9360_dsp_ssr_event);
  1053. /*
  1054. * wcd9360_dsp_cntl_init: Initialize the wcd-dsp control
  1055. * @codec: pointer to the codec handle
  1056. * @params: Parameters required to initialize wcd-dsp control
  1057. *
  1058. * This API is expected to be invoked by the codec driver and
  1059. * provide information essential for the wcd dsp control to
  1060. * configure and initialize the dsp
  1061. */
  1062. void wcd9360_dsp_cntl_init(struct snd_soc_codec *codec,
  1063. struct wcd_dsp_params *params,
  1064. struct wcd_dsp_cntl **cntl)
  1065. {
  1066. struct wcd_dsp_cntl *control;
  1067. int ret;
  1068. if (!codec || !params) {
  1069. pr_err("%s: Invalid handle to %s\n", __func__,
  1070. (!codec) ? "codec" : "params");
  1071. *cntl = NULL;
  1072. return;
  1073. }
  1074. if (*cntl) {
  1075. pr_err("%s: cntl is non NULL, maybe already initialized ?\n",
  1076. __func__);
  1077. return;
  1078. }
  1079. if (!params->cb || !params->cb->cdc_clk_en ||
  1080. !params->cb->cdc_vote_svs) {
  1081. dev_err(codec->dev,
  1082. "%s: clk_en and vote_svs callbacks must be provided\n",
  1083. __func__);
  1084. return;
  1085. }
  1086. control = kzalloc(sizeof(*control), GFP_KERNEL);
  1087. if (!(control))
  1088. return;
  1089. control->codec = codec;
  1090. control->clk_rate = params->clk_rate;
  1091. control->cdc_cb = params->cb;
  1092. control->dsp_instance = params->dsp_instance;
  1093. memcpy(&control->irqs, &params->irqs, sizeof(control->irqs));
  1094. init_completion(&control->boot_complete);
  1095. mutex_init(&control->clk_mutex);
  1096. mutex_init(&control->ssr_mutex);
  1097. init_waitqueue_head(&control->ssr_entry.offline_poll_wait);
  1098. /*
  1099. * The default state of WDSP is in SVS mode.
  1100. * Vote for SVS now, the vote will be removed only
  1101. * after DSP is booted up.
  1102. */
  1103. control->cdc_cb->cdc_vote_svs(codec, true);
  1104. /*
  1105. * If this is the last component needed by master to be ready,
  1106. * then component_bind will be called within the component_add.
  1107. * Hence, the data pointer should be assigned before component_add,
  1108. * so that we can access it during this component's bind call.
  1109. */
  1110. *cntl = control;
  1111. ret = component_add(codec->dev, &wcd_ctrl_component_ops);
  1112. if (ret) {
  1113. dev_err(codec->dev, "%s: component_add failed, err = %d\n",
  1114. __func__, ret);
  1115. kfree(*cntl);
  1116. *cntl = NULL;
  1117. }
  1118. }
  1119. EXPORT_SYMBOL(wcd9360_dsp_cntl_init);
  1120. /*
  1121. * wcd9360_dsp_cntl_deinit: De-initialize the wcd-dsp control
  1122. * @cntl: The struct wcd_dsp_cntl to de-initialize
  1123. *
  1124. * This API is intended to be invoked by the codec driver
  1125. * to de-initialize the wcd dsp control
  1126. */
  1127. void wcd9360_dsp_cntl_deinit(struct wcd_dsp_cntl **cntl)
  1128. {
  1129. struct wcd_dsp_cntl *control = *cntl;
  1130. struct snd_soc_codec *codec;
  1131. /* If control is NULL, there is nothing to de-initialize */
  1132. if (!control)
  1133. return;
  1134. codec = control->codec;
  1135. /*
  1136. * Calling shutdown will cleanup all register states,
  1137. * irrespective of DSP was booted up or not.
  1138. */
  1139. wcd_cntl_do_shutdown(control);
  1140. wcd_cntl_disable_memory(control, WCD_MEM_TYPE_SWITCHABLE);
  1141. wcd_cntl_disable_memory(control, WCD_MEM_TYPE_ALWAYS_ON);
  1142. component_del(codec->dev, &wcd_ctrl_component_ops);
  1143. mutex_destroy(&control->clk_mutex);
  1144. mutex_destroy(&control->ssr_mutex);
  1145. kfree(*cntl);
  1146. *cntl = NULL;
  1147. }
  1148. EXPORT_SYMBOL(wcd9360_dsp_cntl_deinit);