sm6150.c 241 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/clk.h>
  6. #include <linux/delay.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/slab.h>
  11. #include <linux/io.h>
  12. #include <linux/module.h>
  13. #include <linux/input.h>
  14. #include <linux/of_device.h>
  15. #include <linux/pm_qos.h>
  16. #include <linux/soc/qcom/fsa4480-i2c.h>
  17. #include <sound/core.h>
  18. #include <sound/soc.h>
  19. #include <sound/soc-dapm.h>
  20. #include <sound/pcm.h>
  21. #include <sound/pcm_params.h>
  22. #include <sound/info.h>
  23. #include <soc/snd_event.h>
  24. #include <soc/qcom/socinfo.h>
  25. #include <dsp/q6afe-v2.h>
  26. #include <dsp/q6core.h>
  27. #include "device_event.h"
  28. #include "msm-pcm-routing-v2.h"
  29. #include "codecs/msm-cdc-pinctrl.h"
  30. #include "codecs/wcd934x/wcd934x.h"
  31. #include "codecs/wcd934x/wcd934x-mbhc.h"
  32. #include "codecs/wcd937x/wcd937x-mbhc.h"
  33. #include "codecs/wsa881x.h"
  34. #include "codecs/bolero/bolero-cdc.h"
  35. #include <dt-bindings/sound/audio-codec-port-types.h>
  36. #include "codecs/bolero/wsa-macro.h"
  37. #include "codecs/wcd937x/wcd937x.h"
  38. #define DRV_NAME "sm6150-asoc-snd"
  39. #define __CHIPSET__ "SM6150 "
  40. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  41. #define SAMPLING_RATE_8KHZ 8000
  42. #define SAMPLING_RATE_11P025KHZ 11025
  43. #define SAMPLING_RATE_16KHZ 16000
  44. #define SAMPLING_RATE_22P05KHZ 22050
  45. #define SAMPLING_RATE_32KHZ 32000
  46. #define SAMPLING_RATE_44P1KHZ 44100
  47. #define SAMPLING_RATE_48KHZ 48000
  48. #define SAMPLING_RATE_88P2KHZ 88200
  49. #define SAMPLING_RATE_96KHZ 96000
  50. #define SAMPLING_RATE_176P4KHZ 176400
  51. #define SAMPLING_RATE_192KHZ 192000
  52. #define SAMPLING_RATE_352P8KHZ 352800
  53. #define SAMPLING_RATE_384KHZ 384000
  54. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  55. #define WCD9XXX_MBHC_DEF_RLOADS 5
  56. #define CODEC_EXT_CLK_RATE 9600000
  57. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  58. #define DEV_NAME_STR_LEN 32
  59. #define WSA8810_NAME_1 "wsa881x.20170211"
  60. #define WSA8810_NAME_2 "wsa881x.20170212"
  61. #define WCN_CDC_SLIM_RX_CH_MAX 2
  62. #define WCN_CDC_SLIM_TX_CH_MAX 3
  63. #define TDM_CHANNEL_MAX 8
  64. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  65. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  66. #define MSM_HIFI_ON 1
  67. #define SM6150_SOC_VERSION_1_0 0x00010000
  68. #define SM6150_SOC_MSM_ID 0x163
  69. enum {
  70. SLIM_RX_0 = 0,
  71. SLIM_RX_1,
  72. SLIM_RX_2,
  73. SLIM_RX_3,
  74. SLIM_RX_4,
  75. SLIM_RX_5,
  76. SLIM_RX_6,
  77. SLIM_RX_7,
  78. SLIM_RX_MAX,
  79. };
  80. enum {
  81. SLIM_TX_0 = 0,
  82. SLIM_TX_1,
  83. SLIM_TX_2,
  84. SLIM_TX_3,
  85. SLIM_TX_4,
  86. SLIM_TX_5,
  87. SLIM_TX_6,
  88. SLIM_TX_7,
  89. SLIM_TX_8,
  90. SLIM_TX_MAX,
  91. };
  92. enum {
  93. PRIM_MI2S = 0,
  94. SEC_MI2S,
  95. TERT_MI2S,
  96. QUAT_MI2S,
  97. QUIN_MI2S,
  98. MI2S_MAX,
  99. };
  100. enum {
  101. PRIM_AUX_PCM = 0,
  102. SEC_AUX_PCM,
  103. TERT_AUX_PCM,
  104. QUAT_AUX_PCM,
  105. QUIN_AUX_PCM,
  106. AUX_PCM_MAX,
  107. };
  108. enum {
  109. WSA_CDC_DMA_RX_0 = 0,
  110. WSA_CDC_DMA_RX_1,
  111. RX_CDC_DMA_RX_0,
  112. RX_CDC_DMA_RX_1,
  113. RX_CDC_DMA_RX_2,
  114. RX_CDC_DMA_RX_3,
  115. RX_CDC_DMA_RX_5,
  116. CDC_DMA_RX_MAX,
  117. };
  118. enum {
  119. WSA_CDC_DMA_TX_0 = 0,
  120. WSA_CDC_DMA_TX_1,
  121. WSA_CDC_DMA_TX_2,
  122. TX_CDC_DMA_TX_0,
  123. TX_CDC_DMA_TX_3,
  124. TX_CDC_DMA_TX_4,
  125. CDC_DMA_TX_MAX,
  126. };
  127. struct mi2s_conf {
  128. struct mutex lock;
  129. u32 ref_cnt;
  130. u32 msm_is_mi2s_master;
  131. };
  132. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  133. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  134. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  135. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  136. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
  137. Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
  138. };
  139. struct dev_config {
  140. u32 sample_rate;
  141. u32 bit_format;
  142. u32 channels;
  143. };
  144. enum {
  145. DP_RX_IDX = 0,
  146. EXT_DISP_RX_IDX_MAX,
  147. };
  148. struct msm_wsa881x_dev_info {
  149. struct device_node *of_node;
  150. u32 index;
  151. };
  152. struct aux_codec_dev_info {
  153. struct device_node *of_node;
  154. u32 index;
  155. };
  156. enum pinctrl_pin_state {
  157. STATE_DISABLE = 0, /* All pins are in sleep state */
  158. STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
  159. STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
  160. };
  161. struct msm_pinctrl_info {
  162. struct pinctrl *pinctrl;
  163. struct pinctrl_state *mi2s_disable;
  164. struct pinctrl_state *tdm_disable;
  165. struct pinctrl_state *mi2s_active;
  166. struct pinctrl_state *tdm_active;
  167. enum pinctrl_pin_state curr_state;
  168. };
  169. struct msm_asoc_mach_data {
  170. struct snd_info_entry *codec_root;
  171. struct msm_pinctrl_info pinctrl_info;
  172. int usbc_en2_gpio; /* used by gpio driver API */
  173. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  174. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  175. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  176. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  177. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  178. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  179. bool is_afe_config_done;
  180. struct device_node *fsa_handle;
  181. };
  182. struct msm_asoc_wcd93xx_codec {
  183. void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
  184. enum afe_config_type config_type);
  185. };
  186. static const char *const pin_states[] = {"sleep", "i2s-active",
  187. "tdm-active"};
  188. static struct snd_soc_card snd_soc_card_sm6150_msm;
  189. enum {
  190. TDM_0 = 0,
  191. TDM_1,
  192. TDM_2,
  193. TDM_3,
  194. TDM_4,
  195. TDM_5,
  196. TDM_6,
  197. TDM_7,
  198. TDM_PORT_MAX,
  199. };
  200. enum {
  201. TDM_PRI = 0,
  202. TDM_SEC,
  203. TDM_TERT,
  204. TDM_QUAT,
  205. TDM_QUIN,
  206. TDM_INTERFACE_MAX,
  207. };
  208. struct tdm_port {
  209. u32 mode;
  210. u32 channel;
  211. };
  212. /* TDM default config */
  213. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  214. { /* PRI TDM */
  215. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  216. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  217. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  218. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  219. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  220. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  221. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  222. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  223. },
  224. { /* SEC TDM */
  225. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  226. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  227. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  228. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  229. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  230. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  231. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  232. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  233. },
  234. { /* TERT TDM */
  235. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  236. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  237. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  240. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  242. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  243. },
  244. { /* QUAT TDM */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  246. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  247. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  249. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  250. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  252. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  253. },
  254. { /* QUIN TDM */
  255. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  256. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  257. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  258. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  259. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  260. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  261. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  262. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  263. }
  264. };
  265. /* TDM default config */
  266. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  267. { /* PRI TDM */
  268. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  269. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  270. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  271. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  272. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  273. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  274. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  275. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  276. },
  277. { /* SEC TDM */
  278. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  279. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  280. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  281. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  282. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  283. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  284. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  285. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  286. },
  287. { /* TERT TDM */
  288. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  289. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  290. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  291. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  292. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  293. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  294. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  295. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  296. },
  297. { /* QUAT TDM */
  298. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  299. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  300. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  301. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  302. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  303. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  304. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  305. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  306. },
  307. { /* QUIN TDM */
  308. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  309. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  310. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  311. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  312. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  313. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  314. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  315. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  316. }
  317. };
  318. /* Default configuration of slimbus channels */
  319. static struct dev_config slim_rx_cfg[] = {
  320. [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  321. [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  322. [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  323. [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  324. [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  325. [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  326. [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  327. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  328. };
  329. static struct dev_config slim_tx_cfg[] = {
  330. [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  331. [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  332. [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  333. [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  334. [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  335. [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  336. [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  337. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  338. [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  339. };
  340. /* Default configuration of Codec DMA Interface Tx */
  341. static struct dev_config cdc_dma_rx_cfg[] = {
  342. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  343. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  344. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  345. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  346. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  347. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  348. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  349. };
  350. /* Default configuration of Codec DMA Interface Rx */
  351. static struct dev_config cdc_dma_tx_cfg[] = {
  352. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  353. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  354. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  355. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  356. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  357. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  358. };
  359. /* Default configuration of external display BE */
  360. static struct dev_config ext_disp_rx_cfg[] = {
  361. [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  362. };
  363. static struct dev_config usb_rx_cfg = {
  364. .sample_rate = SAMPLING_RATE_48KHZ,
  365. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  366. .channels = 2,
  367. };
  368. static struct dev_config usb_tx_cfg = {
  369. .sample_rate = SAMPLING_RATE_48KHZ,
  370. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  371. .channels = 1,
  372. };
  373. static struct dev_config proxy_rx_cfg = {
  374. .sample_rate = SAMPLING_RATE_48KHZ,
  375. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  376. .channels = 2,
  377. };
  378. /* Default configuration of MI2S channels */
  379. static struct dev_config mi2s_rx_cfg[] = {
  380. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  381. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  382. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  383. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  384. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  385. };
  386. static struct dev_config mi2s_tx_cfg[] = {
  387. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  388. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  389. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  390. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  391. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  392. };
  393. static struct dev_config aux_pcm_rx_cfg[] = {
  394. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  395. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  396. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  397. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  398. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  399. };
  400. static struct dev_config aux_pcm_tx_cfg[] = {
  401. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  402. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  403. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  404. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  405. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  406. };
  407. static int msm_vi_feed_tx_ch = 2;
  408. static const char *const slim_rx_ch_text[] = {"One", "Two"};
  409. static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
  410. "Five", "Six", "Seven",
  411. "Eight"};
  412. static const char *const vi_feed_ch_text[] = {"One", "Two"};
  413. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  414. "S32_LE"};
  415. static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
  416. "S24_3LE"};
  417. static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  418. "KHZ_32", "KHZ_44P1", "KHZ_48",
  419. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  420. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  421. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  422. "KHZ_44P1", "KHZ_48",
  423. "KHZ_88P2", "KHZ_96"};
  424. static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
  425. "KHZ_44P1", "KHZ_48",
  426. "KHZ_88P2", "KHZ_96"};
  427. static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
  428. "KHZ_44P1", "KHZ_48",
  429. "KHZ_88P2", "KHZ_96"};
  430. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  431. "Five", "Six", "Seven",
  432. "Eight"};
  433. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  434. "Six", "Seven", "Eight"};
  435. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  436. "KHZ_16", "KHZ_22P05",
  437. "KHZ_32", "KHZ_44P1", "KHZ_48",
  438. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  439. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  440. static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
  441. "KHZ_192", "KHZ_32", "KHZ_44P1",
  442. "KHZ_88P2", "KHZ_176P4" };
  443. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  444. "Five", "Six", "Seven", "Eight"};
  445. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  446. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  447. "KHZ_48", "KHZ_176P4",
  448. "KHZ_352P8"};
  449. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  450. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  451. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  452. "KHZ_48", "KHZ_96", "KHZ_192"};
  453. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  454. "Five", "Six", "Seven",
  455. "Eight"};
  456. static const char *const hifi_text[] = {"Off", "On"};
  457. static const char *const qos_text[] = {"Disable", "Enable"};
  458. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  459. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  460. "Five", "Six", "Seven",
  461. "Eight"};
  462. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  463. "KHZ_16", "KHZ_22P05",
  464. "KHZ_32", "KHZ_44P1", "KHZ_48",
  465. "KHZ_88P2", "KHZ_96",
  466. "KHZ_176P4", "KHZ_192",
  467. "KHZ_352P8", "KHZ_384"};
  468. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
  469. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
  470. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
  471. static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
  472. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
  473. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
  474. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  475. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  476. static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
  477. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
  478. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  479. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
  480. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
  481. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
  482. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
  483. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  484. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  485. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
  486. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
  487. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
  488. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
  489. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
  490. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
  491. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  492. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
  493. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
  494. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  495. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  496. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
  497. ext_disp_sample_rate_text);
  498. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  499. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  500. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  501. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  502. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  503. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  504. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  505. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  506. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  507. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  508. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  509. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  510. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  511. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  512. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  513. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  514. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  515. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  516. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  517. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
  518. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
  519. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  520. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  521. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  522. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
  523. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
  524. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  525. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  526. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  527. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  528. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  529. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  530. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
  531. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
  532. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
  533. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
  534. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  535. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  536. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  537. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  538. static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
  539. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  540. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  541. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  542. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  543. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  544. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  545. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  546. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  547. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  548. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  549. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  550. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  551. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  552. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  553. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  554. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  555. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  556. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  557. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  558. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  559. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  560. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  561. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  562. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  563. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  564. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  565. cdc_dma_sample_rate_text);
  566. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  567. cdc_dma_sample_rate_text);
  568. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  569. cdc_dma_sample_rate_text);
  570. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  571. cdc_dma_sample_rate_text);
  572. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  573. cdc_dma_sample_rate_text);
  574. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  575. cdc_dma_sample_rate_text);
  576. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  577. cdc_dma_sample_rate_text);
  578. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  579. cdc_dma_sample_rate_text);
  580. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  581. cdc_dma_sample_rate_text);
  582. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  583. cdc_dma_sample_rate_text);
  584. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  585. cdc_dma_sample_rate_text);
  586. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  587. cdc_dma_sample_rate_text);
  588. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  589. cdc_dma_sample_rate_text);
  590. static int msm_hifi_control;
  591. static bool codec_reg_done;
  592. static struct snd_soc_aux_dev *msm_aux_dev;
  593. static struct snd_soc_codec_conf *msm_codec_conf;
  594. static struct msm_asoc_wcd93xx_codec msm_codec_fn;
  595. static int dmic_0_1_gpio_cnt;
  596. static int dmic_2_3_gpio_cnt;
  597. static void *def_wcd_mbhc_cal(void);
  598. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  599. int enable, bool dapm);
  600. static int msm_wsa881x_init(struct snd_soc_component *component);
  601. static int msm_aux_codec_init(struct snd_soc_component *component);
  602. /*
  603. * Need to report LINEIN
  604. * if R/L channel impedance is larger than 5K ohm
  605. */
  606. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  607. .read_fw_bin = false,
  608. .calibration = NULL,
  609. .detect_extn_cable = true,
  610. .mono_stero_detection = false,
  611. .swap_gnd_mic = NULL,
  612. .hs_ext_micbias = true,
  613. .key_code[0] = KEY_MEDIA,
  614. .key_code[1] = KEY_VOICECOMMAND,
  615. .key_code[2] = KEY_VOLUMEUP,
  616. .key_code[3] = KEY_VOLUMEDOWN,
  617. .key_code[4] = 0,
  618. .key_code[5] = 0,
  619. .key_code[6] = 0,
  620. .key_code[7] = 0,
  621. .linein_th = 5000,
  622. .moisture_en = true,
  623. .mbhc_micbias = MIC_BIAS_2,
  624. .anc_micbias = MIC_BIAS_2,
  625. .enable_anc_mic_detect = false,
  626. };
  627. static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
  628. {"MIC BIAS1", NULL, "MCLK TX"},
  629. {"MIC BIAS2", NULL, "MCLK TX"},
  630. {"MIC BIAS3", NULL, "MCLK TX"},
  631. {"MIC BIAS4", NULL, "MCLK TX"},
  632. };
  633. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  634. {
  635. AFE_API_VERSION_I2S_CONFIG,
  636. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  637. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  638. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  639. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  640. 0,
  641. },
  642. {
  643. AFE_API_VERSION_I2S_CONFIG,
  644. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  645. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  646. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  647. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  648. 0,
  649. },
  650. {
  651. AFE_API_VERSION_I2S_CONFIG,
  652. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  653. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  654. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  655. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  656. 0,
  657. },
  658. {
  659. AFE_API_VERSION_I2S_CONFIG,
  660. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
  661. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  662. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  663. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  664. 0,
  665. },
  666. {
  667. AFE_API_VERSION_I2S_CONFIG,
  668. Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
  669. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  670. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  671. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  672. 0,
  673. }
  674. };
  675. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  676. static int slim_get_sample_rate_val(int sample_rate)
  677. {
  678. int sample_rate_val = 0;
  679. switch (sample_rate) {
  680. case SAMPLING_RATE_8KHZ:
  681. sample_rate_val = 0;
  682. break;
  683. case SAMPLING_RATE_16KHZ:
  684. sample_rate_val = 1;
  685. break;
  686. case SAMPLING_RATE_32KHZ:
  687. sample_rate_val = 2;
  688. break;
  689. case SAMPLING_RATE_44P1KHZ:
  690. sample_rate_val = 3;
  691. break;
  692. case SAMPLING_RATE_48KHZ:
  693. sample_rate_val = 4;
  694. break;
  695. case SAMPLING_RATE_88P2KHZ:
  696. sample_rate_val = 5;
  697. break;
  698. case SAMPLING_RATE_96KHZ:
  699. sample_rate_val = 6;
  700. break;
  701. case SAMPLING_RATE_176P4KHZ:
  702. sample_rate_val = 7;
  703. break;
  704. case SAMPLING_RATE_192KHZ:
  705. sample_rate_val = 8;
  706. break;
  707. case SAMPLING_RATE_352P8KHZ:
  708. sample_rate_val = 9;
  709. break;
  710. case SAMPLING_RATE_384KHZ:
  711. sample_rate_val = 10;
  712. break;
  713. default:
  714. sample_rate_val = 4;
  715. break;
  716. }
  717. return sample_rate_val;
  718. }
  719. static int slim_get_sample_rate(int value)
  720. {
  721. int sample_rate = 0;
  722. switch (value) {
  723. case 0:
  724. sample_rate = SAMPLING_RATE_8KHZ;
  725. break;
  726. case 1:
  727. sample_rate = SAMPLING_RATE_16KHZ;
  728. break;
  729. case 2:
  730. sample_rate = SAMPLING_RATE_32KHZ;
  731. break;
  732. case 3:
  733. sample_rate = SAMPLING_RATE_44P1KHZ;
  734. break;
  735. case 4:
  736. sample_rate = SAMPLING_RATE_48KHZ;
  737. break;
  738. case 5:
  739. sample_rate = SAMPLING_RATE_88P2KHZ;
  740. break;
  741. case 6:
  742. sample_rate = SAMPLING_RATE_96KHZ;
  743. break;
  744. case 7:
  745. sample_rate = SAMPLING_RATE_176P4KHZ;
  746. break;
  747. case 8:
  748. sample_rate = SAMPLING_RATE_192KHZ;
  749. break;
  750. case 9:
  751. sample_rate = SAMPLING_RATE_352P8KHZ;
  752. break;
  753. case 10:
  754. sample_rate = SAMPLING_RATE_384KHZ;
  755. break;
  756. default:
  757. sample_rate = SAMPLING_RATE_48KHZ;
  758. break;
  759. }
  760. return sample_rate;
  761. }
  762. static int slim_get_bit_format_val(int bit_format)
  763. {
  764. int val = 0;
  765. switch (bit_format) {
  766. case SNDRV_PCM_FORMAT_S32_LE:
  767. val = 3;
  768. break;
  769. case SNDRV_PCM_FORMAT_S24_3LE:
  770. val = 2;
  771. break;
  772. case SNDRV_PCM_FORMAT_S24_LE:
  773. val = 1;
  774. break;
  775. case SNDRV_PCM_FORMAT_S16_LE:
  776. default:
  777. val = 0;
  778. break;
  779. }
  780. return val;
  781. }
  782. static int slim_get_bit_format(int val)
  783. {
  784. int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  785. switch (val) {
  786. case 0:
  787. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  788. break;
  789. case 1:
  790. bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
  791. break;
  792. case 2:
  793. bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
  794. break;
  795. case 3:
  796. bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
  797. break;
  798. default:
  799. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  800. break;
  801. }
  802. return bit_fmt;
  803. }
  804. static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
  805. {
  806. int port_id = 0;
  807. if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
  808. port_id = SLIM_RX_0;
  809. } else if (strnstr(kcontrol->id.name,
  810. "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
  811. port_id = SLIM_RX_2;
  812. } else if (strnstr(kcontrol->id.name,
  813. "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
  814. port_id = SLIM_RX_5;
  815. } else if (strnstr(kcontrol->id.name,
  816. "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
  817. port_id = SLIM_RX_6;
  818. } else if (strnstr(kcontrol->id.name,
  819. "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
  820. port_id = SLIM_TX_0;
  821. } else if (strnstr(kcontrol->id.name,
  822. "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
  823. port_id = SLIM_TX_1;
  824. } else {
  825. pr_err("%s: unsupported channel: %s\n",
  826. __func__, kcontrol->id.name);
  827. return -EINVAL;
  828. }
  829. return port_id;
  830. }
  831. static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  832. struct snd_ctl_elem_value *ucontrol)
  833. {
  834. int ch_num = slim_get_port_idx(kcontrol);
  835. if (ch_num < 0)
  836. return ch_num;
  837. ucontrol->value.enumerated.item[0] =
  838. slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
  839. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  840. ch_num, slim_rx_cfg[ch_num].sample_rate,
  841. ucontrol->value.enumerated.item[0]);
  842. return 0;
  843. }
  844. static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  845. struct snd_ctl_elem_value *ucontrol)
  846. {
  847. int ch_num = slim_get_port_idx(kcontrol);
  848. if (ch_num < 0)
  849. return ch_num;
  850. slim_rx_cfg[ch_num].sample_rate =
  851. slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  852. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  853. ch_num, slim_rx_cfg[ch_num].sample_rate,
  854. ucontrol->value.enumerated.item[0]);
  855. return 0;
  856. }
  857. static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  858. struct snd_ctl_elem_value *ucontrol)
  859. {
  860. int ch_num = slim_get_port_idx(kcontrol);
  861. if (ch_num < 0)
  862. return ch_num;
  863. ucontrol->value.enumerated.item[0] =
  864. slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
  865. pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  866. ch_num, slim_tx_cfg[ch_num].sample_rate,
  867. ucontrol->value.enumerated.item[0]);
  868. return 0;
  869. }
  870. static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  871. struct snd_ctl_elem_value *ucontrol)
  872. {
  873. int sample_rate = 0;
  874. int ch_num = slim_get_port_idx(kcontrol);
  875. if (ch_num < 0)
  876. return ch_num;
  877. sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  878. if (sample_rate == SAMPLING_RATE_44P1KHZ) {
  879. pr_err("%s: Unsupported sample rate %d: for Tx path\n",
  880. __func__, sample_rate);
  881. return -EINVAL;
  882. }
  883. slim_tx_cfg[ch_num].sample_rate = sample_rate;
  884. pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
  885. ch_num, slim_tx_cfg[ch_num].sample_rate,
  886. ucontrol->value.enumerated.item[0]);
  887. return 0;
  888. }
  889. static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
  890. struct snd_ctl_elem_value *ucontrol)
  891. {
  892. int ch_num = slim_get_port_idx(kcontrol);
  893. if (ch_num < 0)
  894. return ch_num;
  895. ucontrol->value.enumerated.item[0] =
  896. slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
  897. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  898. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  899. ucontrol->value.enumerated.item[0]);
  900. return 0;
  901. }
  902. static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
  903. struct snd_ctl_elem_value *ucontrol)
  904. {
  905. int ch_num = slim_get_port_idx(kcontrol);
  906. if (ch_num < 0)
  907. return ch_num;
  908. slim_rx_cfg[ch_num].bit_format =
  909. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  910. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  911. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  912. ucontrol->value.enumerated.item[0]);
  913. return 0;
  914. }
  915. static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
  916. struct snd_ctl_elem_value *ucontrol)
  917. {
  918. int ch_num = slim_get_port_idx(kcontrol);
  919. if (ch_num < 0)
  920. return ch_num;
  921. ucontrol->value.enumerated.item[0] =
  922. slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
  923. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  924. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  925. ucontrol->value.enumerated.item[0]);
  926. return 0;
  927. }
  928. static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
  929. struct snd_ctl_elem_value *ucontrol)
  930. {
  931. int ch_num = slim_get_port_idx(kcontrol);
  932. if (ch_num < 0)
  933. return ch_num;
  934. slim_tx_cfg[ch_num].bit_format =
  935. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  936. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  937. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  938. ucontrol->value.enumerated.item[0]);
  939. return 0;
  940. }
  941. static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
  942. struct snd_ctl_elem_value *ucontrol)
  943. {
  944. int ch_num = slim_get_port_idx(kcontrol);
  945. if (ch_num < 0)
  946. return ch_num;
  947. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  948. ch_num, slim_rx_cfg[ch_num].channels);
  949. ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
  950. return 0;
  951. }
  952. static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
  953. struct snd_ctl_elem_value *ucontrol)
  954. {
  955. int ch_num = slim_get_port_idx(kcontrol);
  956. if (ch_num < 0)
  957. return ch_num;
  958. slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  959. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  960. ch_num, slim_rx_cfg[ch_num].channels);
  961. return 1;
  962. }
  963. static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
  964. struct snd_ctl_elem_value *ucontrol)
  965. {
  966. int ch_num = slim_get_port_idx(kcontrol);
  967. if (ch_num < 0)
  968. return ch_num;
  969. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  970. ch_num, slim_tx_cfg[ch_num].channels);
  971. ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
  972. return 0;
  973. }
  974. static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
  975. struct snd_ctl_elem_value *ucontrol)
  976. {
  977. int ch_num = slim_get_port_idx(kcontrol);
  978. if (ch_num < 0)
  979. return ch_num;
  980. slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  981. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  982. ch_num, slim_tx_cfg[ch_num].channels);
  983. return 1;
  984. }
  985. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  986. struct snd_ctl_elem_value *ucontrol)
  987. {
  988. ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
  989. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  990. ucontrol->value.integer.value[0]);
  991. return 0;
  992. }
  993. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  994. struct snd_ctl_elem_value *ucontrol)
  995. {
  996. msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
  997. pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
  998. return 1;
  999. }
  1000. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  1001. struct snd_ctl_elem_value *ucontrol)
  1002. {
  1003. /*
  1004. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  1005. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  1006. * value.
  1007. */
  1008. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  1009. case SAMPLING_RATE_96KHZ:
  1010. ucontrol->value.integer.value[0] = 5;
  1011. break;
  1012. case SAMPLING_RATE_88P2KHZ:
  1013. ucontrol->value.integer.value[0] = 4;
  1014. break;
  1015. case SAMPLING_RATE_48KHZ:
  1016. ucontrol->value.integer.value[0] = 3;
  1017. break;
  1018. case SAMPLING_RATE_44P1KHZ:
  1019. ucontrol->value.integer.value[0] = 2;
  1020. break;
  1021. case SAMPLING_RATE_16KHZ:
  1022. ucontrol->value.integer.value[0] = 1;
  1023. break;
  1024. case SAMPLING_RATE_8KHZ:
  1025. default:
  1026. ucontrol->value.integer.value[0] = 0;
  1027. break;
  1028. }
  1029. pr_debug("%s: sample rate = %d\n", __func__,
  1030. slim_rx_cfg[SLIM_RX_7].sample_rate);
  1031. return 0;
  1032. }
  1033. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  1034. struct snd_ctl_elem_value *ucontrol)
  1035. {
  1036. switch (ucontrol->value.integer.value[0]) {
  1037. case 1:
  1038. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1039. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1040. break;
  1041. case 2:
  1042. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1043. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1044. break;
  1045. case 3:
  1046. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1047. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1048. break;
  1049. case 4:
  1050. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1051. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1052. break;
  1053. case 5:
  1054. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1055. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1056. break;
  1057. case 0:
  1058. default:
  1059. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1060. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1061. break;
  1062. }
  1063. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  1064. __func__,
  1065. slim_rx_cfg[SLIM_RX_7].sample_rate,
  1066. slim_tx_cfg[SLIM_TX_7].sample_rate,
  1067. ucontrol->value.enumerated.item[0]);
  1068. return 0;
  1069. }
  1070. static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
  1071. struct snd_ctl_elem_value *ucontrol)
  1072. {
  1073. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  1074. case SAMPLING_RATE_96KHZ:
  1075. ucontrol->value.integer.value[0] = 5;
  1076. break;
  1077. case SAMPLING_RATE_88P2KHZ:
  1078. ucontrol->value.integer.value[0] = 4;
  1079. break;
  1080. case SAMPLING_RATE_48KHZ:
  1081. ucontrol->value.integer.value[0] = 3;
  1082. break;
  1083. case SAMPLING_RATE_44P1KHZ:
  1084. ucontrol->value.integer.value[0] = 2;
  1085. break;
  1086. case SAMPLING_RATE_16KHZ:
  1087. ucontrol->value.integer.value[0] = 1;
  1088. break;
  1089. case SAMPLING_RATE_8KHZ:
  1090. default:
  1091. ucontrol->value.integer.value[0] = 0;
  1092. break;
  1093. }
  1094. pr_debug("%s: sample rate rx = %d", __func__,
  1095. slim_rx_cfg[SLIM_RX_7].sample_rate);
  1096. return 0;
  1097. }
  1098. static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
  1099. struct snd_ctl_elem_value *ucontrol)
  1100. {
  1101. switch (ucontrol->value.integer.value[0]) {
  1102. case 1:
  1103. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1104. break;
  1105. case 2:
  1106. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1107. break;
  1108. case 3:
  1109. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1110. break;
  1111. case 4:
  1112. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1113. break;
  1114. case 5:
  1115. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1116. break;
  1117. case 0:
  1118. default:
  1119. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1120. break;
  1121. }
  1122. pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
  1123. __func__,
  1124. slim_rx_cfg[SLIM_RX_7].sample_rate,
  1125. ucontrol->value.enumerated.item[0]);
  1126. return 0;
  1127. }
  1128. static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
  1129. struct snd_ctl_elem_value *ucontrol)
  1130. {
  1131. switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
  1132. case SAMPLING_RATE_96KHZ:
  1133. ucontrol->value.integer.value[0] = 5;
  1134. break;
  1135. case SAMPLING_RATE_88P2KHZ:
  1136. ucontrol->value.integer.value[0] = 4;
  1137. break;
  1138. case SAMPLING_RATE_48KHZ:
  1139. ucontrol->value.integer.value[0] = 3;
  1140. break;
  1141. case SAMPLING_RATE_44P1KHZ:
  1142. ucontrol->value.integer.value[0] = 2;
  1143. break;
  1144. case SAMPLING_RATE_16KHZ:
  1145. ucontrol->value.integer.value[0] = 1;
  1146. break;
  1147. case SAMPLING_RATE_8KHZ:
  1148. default:
  1149. ucontrol->value.integer.value[0] = 0;
  1150. break;
  1151. }
  1152. pr_debug("%s: sample rate tx = %d", __func__,
  1153. slim_tx_cfg[SLIM_TX_7].sample_rate);
  1154. return 0;
  1155. }
  1156. static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
  1157. struct snd_ctl_elem_value *ucontrol)
  1158. {
  1159. switch (ucontrol->value.integer.value[0]) {
  1160. case 1:
  1161. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1162. break;
  1163. case 2:
  1164. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1165. break;
  1166. case 3:
  1167. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1168. break;
  1169. case 4:
  1170. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1171. break;
  1172. case 5:
  1173. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1174. break;
  1175. case 0:
  1176. default:
  1177. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1178. break;
  1179. }
  1180. pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
  1181. __func__,
  1182. slim_tx_cfg[SLIM_TX_7].sample_rate,
  1183. ucontrol->value.enumerated.item[0]);
  1184. return 0;
  1185. }
  1186. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1187. {
  1188. int idx = 0;
  1189. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  1190. sizeof("WSA_CDC_DMA_RX_0")))
  1191. idx = WSA_CDC_DMA_RX_0;
  1192. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  1193. sizeof("WSA_CDC_DMA_RX_0")))
  1194. idx = WSA_CDC_DMA_RX_1;
  1195. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1196. sizeof("RX_CDC_DMA_RX_0")))
  1197. idx = RX_CDC_DMA_RX_0;
  1198. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1199. sizeof("RX_CDC_DMA_RX_1")))
  1200. idx = RX_CDC_DMA_RX_1;
  1201. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1202. sizeof("RX_CDC_DMA_RX_2")))
  1203. idx = RX_CDC_DMA_RX_2;
  1204. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1205. sizeof("RX_CDC_DMA_RX_3")))
  1206. idx = RX_CDC_DMA_RX_3;
  1207. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1208. sizeof("RX_CDC_DMA_RX_5")))
  1209. idx = RX_CDC_DMA_RX_5;
  1210. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  1211. sizeof("WSA_CDC_DMA_TX_0")))
  1212. idx = WSA_CDC_DMA_TX_0;
  1213. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  1214. sizeof("WSA_CDC_DMA_TX_1")))
  1215. idx = WSA_CDC_DMA_TX_1;
  1216. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  1217. sizeof("WSA_CDC_DMA_TX_2")))
  1218. idx = WSA_CDC_DMA_TX_2;
  1219. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  1220. sizeof("TX_CDC_DMA_TX_0")))
  1221. idx = TX_CDC_DMA_TX_0;
  1222. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  1223. sizeof("TX_CDC_DMA_TX_3")))
  1224. idx = TX_CDC_DMA_TX_3;
  1225. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  1226. sizeof("TX_CDC_DMA_TX_4")))
  1227. idx = TX_CDC_DMA_TX_4;
  1228. else {
  1229. pr_err("%s: unsupported channel: %s\n",
  1230. __func__, kcontrol->id.name);
  1231. return -EINVAL;
  1232. }
  1233. return idx;
  1234. }
  1235. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  1236. struct snd_ctl_elem_value *ucontrol)
  1237. {
  1238. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1239. if (ch_num < 0) {
  1240. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1241. return ch_num;
  1242. }
  1243. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1244. cdc_dma_rx_cfg[ch_num].channels - 1);
  1245. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1246. return 0;
  1247. }
  1248. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1249. struct snd_ctl_elem_value *ucontrol)
  1250. {
  1251. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1252. if (ch_num < 0) {
  1253. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1254. return ch_num;
  1255. }
  1256. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1257. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1258. cdc_dma_rx_cfg[ch_num].channels);
  1259. return 1;
  1260. }
  1261. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  1262. struct snd_ctl_elem_value *ucontrol)
  1263. {
  1264. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1265. if (ch_num < 0) {
  1266. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1267. return ch_num;
  1268. }
  1269. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  1270. case SNDRV_PCM_FORMAT_S32_LE:
  1271. ucontrol->value.integer.value[0] = 3;
  1272. break;
  1273. case SNDRV_PCM_FORMAT_S24_3LE:
  1274. ucontrol->value.integer.value[0] = 2;
  1275. break;
  1276. case SNDRV_PCM_FORMAT_S24_LE:
  1277. ucontrol->value.integer.value[0] = 1;
  1278. break;
  1279. case SNDRV_PCM_FORMAT_S16_LE:
  1280. default:
  1281. ucontrol->value.integer.value[0] = 0;
  1282. break;
  1283. }
  1284. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1285. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1286. ucontrol->value.integer.value[0]);
  1287. return 0;
  1288. }
  1289. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  1290. struct snd_ctl_elem_value *ucontrol)
  1291. {
  1292. int rc = 0;
  1293. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1294. if (ch_num < 0) {
  1295. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1296. return ch_num;
  1297. }
  1298. switch (ucontrol->value.integer.value[0]) {
  1299. case 3:
  1300. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1301. break;
  1302. case 2:
  1303. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1304. break;
  1305. case 1:
  1306. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1307. break;
  1308. case 0:
  1309. default:
  1310. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1311. break;
  1312. }
  1313. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1314. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1315. ucontrol->value.integer.value[0]);
  1316. return rc;
  1317. }
  1318. static int cdc_dma_get_sample_rate_val(int sample_rate)
  1319. {
  1320. int sample_rate_val = 0;
  1321. switch (sample_rate) {
  1322. case SAMPLING_RATE_8KHZ:
  1323. sample_rate_val = 0;
  1324. break;
  1325. case SAMPLING_RATE_11P025KHZ:
  1326. sample_rate_val = 1;
  1327. break;
  1328. case SAMPLING_RATE_16KHZ:
  1329. sample_rate_val = 2;
  1330. break;
  1331. case SAMPLING_RATE_22P05KHZ:
  1332. sample_rate_val = 3;
  1333. break;
  1334. case SAMPLING_RATE_32KHZ:
  1335. sample_rate_val = 4;
  1336. break;
  1337. case SAMPLING_RATE_44P1KHZ:
  1338. sample_rate_val = 5;
  1339. break;
  1340. case SAMPLING_RATE_48KHZ:
  1341. sample_rate_val = 6;
  1342. break;
  1343. case SAMPLING_RATE_88P2KHZ:
  1344. sample_rate_val = 7;
  1345. break;
  1346. case SAMPLING_RATE_96KHZ:
  1347. sample_rate_val = 8;
  1348. break;
  1349. case SAMPLING_RATE_176P4KHZ:
  1350. sample_rate_val = 9;
  1351. break;
  1352. case SAMPLING_RATE_192KHZ:
  1353. sample_rate_val = 10;
  1354. break;
  1355. case SAMPLING_RATE_352P8KHZ:
  1356. sample_rate_val = 11;
  1357. break;
  1358. case SAMPLING_RATE_384KHZ:
  1359. sample_rate_val = 12;
  1360. break;
  1361. default:
  1362. sample_rate_val = 6;
  1363. break;
  1364. }
  1365. return sample_rate_val;
  1366. }
  1367. static int cdc_dma_get_sample_rate(int value)
  1368. {
  1369. int sample_rate = 0;
  1370. switch (value) {
  1371. case 0:
  1372. sample_rate = SAMPLING_RATE_8KHZ;
  1373. break;
  1374. case 1:
  1375. sample_rate = SAMPLING_RATE_11P025KHZ;
  1376. break;
  1377. case 2:
  1378. sample_rate = SAMPLING_RATE_16KHZ;
  1379. break;
  1380. case 3:
  1381. sample_rate = SAMPLING_RATE_22P05KHZ;
  1382. break;
  1383. case 4:
  1384. sample_rate = SAMPLING_RATE_32KHZ;
  1385. break;
  1386. case 5:
  1387. sample_rate = SAMPLING_RATE_44P1KHZ;
  1388. break;
  1389. case 6:
  1390. sample_rate = SAMPLING_RATE_48KHZ;
  1391. break;
  1392. case 7:
  1393. sample_rate = SAMPLING_RATE_88P2KHZ;
  1394. break;
  1395. case 8:
  1396. sample_rate = SAMPLING_RATE_96KHZ;
  1397. break;
  1398. case 9:
  1399. sample_rate = SAMPLING_RATE_176P4KHZ;
  1400. break;
  1401. case 10:
  1402. sample_rate = SAMPLING_RATE_192KHZ;
  1403. break;
  1404. case 11:
  1405. sample_rate = SAMPLING_RATE_352P8KHZ;
  1406. break;
  1407. case 12:
  1408. sample_rate = SAMPLING_RATE_384KHZ;
  1409. break;
  1410. default:
  1411. sample_rate = SAMPLING_RATE_48KHZ;
  1412. break;
  1413. }
  1414. return sample_rate;
  1415. }
  1416. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1417. struct snd_ctl_elem_value *ucontrol)
  1418. {
  1419. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1420. if (ch_num < 0) {
  1421. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1422. return ch_num;
  1423. }
  1424. ucontrol->value.enumerated.item[0] =
  1425. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  1426. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  1427. cdc_dma_rx_cfg[ch_num].sample_rate);
  1428. return 0;
  1429. }
  1430. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1431. struct snd_ctl_elem_value *ucontrol)
  1432. {
  1433. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1434. if (ch_num < 0) {
  1435. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1436. return ch_num;
  1437. }
  1438. cdc_dma_rx_cfg[ch_num].sample_rate =
  1439. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1440. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  1441. __func__, ucontrol->value.enumerated.item[0],
  1442. cdc_dma_rx_cfg[ch_num].sample_rate);
  1443. return 0;
  1444. }
  1445. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  1446. struct snd_ctl_elem_value *ucontrol)
  1447. {
  1448. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1449. if (ch_num < 0) {
  1450. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1451. return ch_num;
  1452. }
  1453. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1454. cdc_dma_tx_cfg[ch_num].channels);
  1455. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  1456. return 0;
  1457. }
  1458. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  1459. struct snd_ctl_elem_value *ucontrol)
  1460. {
  1461. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1462. if (ch_num < 0) {
  1463. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1464. return ch_num;
  1465. }
  1466. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1467. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1468. cdc_dma_tx_cfg[ch_num].channels);
  1469. return 1;
  1470. }
  1471. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1472. struct snd_ctl_elem_value *ucontrol)
  1473. {
  1474. int sample_rate_val;
  1475. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1476. if (ch_num < 0) {
  1477. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1478. return ch_num;
  1479. }
  1480. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  1481. case SAMPLING_RATE_384KHZ:
  1482. sample_rate_val = 12;
  1483. break;
  1484. case SAMPLING_RATE_352P8KHZ:
  1485. sample_rate_val = 11;
  1486. break;
  1487. case SAMPLING_RATE_192KHZ:
  1488. sample_rate_val = 10;
  1489. break;
  1490. case SAMPLING_RATE_176P4KHZ:
  1491. sample_rate_val = 9;
  1492. break;
  1493. case SAMPLING_RATE_96KHZ:
  1494. sample_rate_val = 8;
  1495. break;
  1496. case SAMPLING_RATE_88P2KHZ:
  1497. sample_rate_val = 7;
  1498. break;
  1499. case SAMPLING_RATE_48KHZ:
  1500. sample_rate_val = 6;
  1501. break;
  1502. case SAMPLING_RATE_44P1KHZ:
  1503. sample_rate_val = 5;
  1504. break;
  1505. case SAMPLING_RATE_32KHZ:
  1506. sample_rate_val = 4;
  1507. break;
  1508. case SAMPLING_RATE_22P05KHZ:
  1509. sample_rate_val = 3;
  1510. break;
  1511. case SAMPLING_RATE_16KHZ:
  1512. sample_rate_val = 2;
  1513. break;
  1514. case SAMPLING_RATE_11P025KHZ:
  1515. sample_rate_val = 1;
  1516. break;
  1517. case SAMPLING_RATE_8KHZ:
  1518. sample_rate_val = 0;
  1519. break;
  1520. default:
  1521. sample_rate_val = 6;
  1522. break;
  1523. }
  1524. ucontrol->value.integer.value[0] = sample_rate_val;
  1525. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  1526. cdc_dma_tx_cfg[ch_num].sample_rate);
  1527. return 0;
  1528. }
  1529. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1530. struct snd_ctl_elem_value *ucontrol)
  1531. {
  1532. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1533. if (ch_num < 0) {
  1534. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1535. return ch_num;
  1536. }
  1537. switch (ucontrol->value.integer.value[0]) {
  1538. case 12:
  1539. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  1540. break;
  1541. case 11:
  1542. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  1543. break;
  1544. case 10:
  1545. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  1546. break;
  1547. case 9:
  1548. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  1549. break;
  1550. case 8:
  1551. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  1552. break;
  1553. case 7:
  1554. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  1555. break;
  1556. case 6:
  1557. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1558. break;
  1559. case 5:
  1560. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  1561. break;
  1562. case 4:
  1563. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  1564. break;
  1565. case 3:
  1566. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  1567. break;
  1568. case 2:
  1569. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  1570. break;
  1571. case 1:
  1572. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  1573. break;
  1574. case 0:
  1575. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  1576. break;
  1577. default:
  1578. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1579. break;
  1580. }
  1581. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  1582. __func__, ucontrol->value.integer.value[0],
  1583. cdc_dma_tx_cfg[ch_num].sample_rate);
  1584. return 0;
  1585. }
  1586. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  1587. struct snd_ctl_elem_value *ucontrol)
  1588. {
  1589. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1590. if (ch_num < 0) {
  1591. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1592. return ch_num;
  1593. }
  1594. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  1595. case SNDRV_PCM_FORMAT_S32_LE:
  1596. ucontrol->value.integer.value[0] = 3;
  1597. break;
  1598. case SNDRV_PCM_FORMAT_S24_3LE:
  1599. ucontrol->value.integer.value[0] = 2;
  1600. break;
  1601. case SNDRV_PCM_FORMAT_S24_LE:
  1602. ucontrol->value.integer.value[0] = 1;
  1603. break;
  1604. case SNDRV_PCM_FORMAT_S16_LE:
  1605. default:
  1606. ucontrol->value.integer.value[0] = 0;
  1607. break;
  1608. }
  1609. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1610. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1611. ucontrol->value.integer.value[0]);
  1612. return 0;
  1613. }
  1614. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  1615. struct snd_ctl_elem_value *ucontrol)
  1616. {
  1617. int rc = 0;
  1618. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1619. if (ch_num < 0) {
  1620. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1621. return ch_num;
  1622. }
  1623. switch (ucontrol->value.integer.value[0]) {
  1624. case 3:
  1625. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1626. break;
  1627. case 2:
  1628. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1629. break;
  1630. case 1:
  1631. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1632. break;
  1633. case 0:
  1634. default:
  1635. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1636. break;
  1637. }
  1638. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1639. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1640. ucontrol->value.integer.value[0]);
  1641. return rc;
  1642. }
  1643. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  1644. struct snd_ctl_elem_value *ucontrol)
  1645. {
  1646. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  1647. usb_rx_cfg.channels);
  1648. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  1649. return 0;
  1650. }
  1651. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  1652. struct snd_ctl_elem_value *ucontrol)
  1653. {
  1654. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1655. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  1656. return 1;
  1657. }
  1658. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1659. struct snd_ctl_elem_value *ucontrol)
  1660. {
  1661. int sample_rate_val;
  1662. switch (usb_rx_cfg.sample_rate) {
  1663. case SAMPLING_RATE_384KHZ:
  1664. sample_rate_val = 12;
  1665. break;
  1666. case SAMPLING_RATE_352P8KHZ:
  1667. sample_rate_val = 11;
  1668. break;
  1669. case SAMPLING_RATE_192KHZ:
  1670. sample_rate_val = 10;
  1671. break;
  1672. case SAMPLING_RATE_176P4KHZ:
  1673. sample_rate_val = 9;
  1674. break;
  1675. case SAMPLING_RATE_96KHZ:
  1676. sample_rate_val = 8;
  1677. break;
  1678. case SAMPLING_RATE_88P2KHZ:
  1679. sample_rate_val = 7;
  1680. break;
  1681. case SAMPLING_RATE_48KHZ:
  1682. sample_rate_val = 6;
  1683. break;
  1684. case SAMPLING_RATE_44P1KHZ:
  1685. sample_rate_val = 5;
  1686. break;
  1687. case SAMPLING_RATE_32KHZ:
  1688. sample_rate_val = 4;
  1689. break;
  1690. case SAMPLING_RATE_22P05KHZ:
  1691. sample_rate_val = 3;
  1692. break;
  1693. case SAMPLING_RATE_16KHZ:
  1694. sample_rate_val = 2;
  1695. break;
  1696. case SAMPLING_RATE_11P025KHZ:
  1697. sample_rate_val = 1;
  1698. break;
  1699. case SAMPLING_RATE_8KHZ:
  1700. default:
  1701. sample_rate_val = 0;
  1702. break;
  1703. }
  1704. ucontrol->value.integer.value[0] = sample_rate_val;
  1705. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  1706. usb_rx_cfg.sample_rate);
  1707. return 0;
  1708. }
  1709. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1710. struct snd_ctl_elem_value *ucontrol)
  1711. {
  1712. switch (ucontrol->value.integer.value[0]) {
  1713. case 12:
  1714. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1715. break;
  1716. case 11:
  1717. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1718. break;
  1719. case 10:
  1720. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1721. break;
  1722. case 9:
  1723. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1724. break;
  1725. case 8:
  1726. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1727. break;
  1728. case 7:
  1729. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1730. break;
  1731. case 6:
  1732. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1733. break;
  1734. case 5:
  1735. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1736. break;
  1737. case 4:
  1738. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1739. break;
  1740. case 3:
  1741. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1742. break;
  1743. case 2:
  1744. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1745. break;
  1746. case 1:
  1747. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1748. break;
  1749. case 0:
  1750. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1751. break;
  1752. default:
  1753. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1754. break;
  1755. }
  1756. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  1757. __func__, ucontrol->value.integer.value[0],
  1758. usb_rx_cfg.sample_rate);
  1759. return 0;
  1760. }
  1761. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  1762. struct snd_ctl_elem_value *ucontrol)
  1763. {
  1764. switch (usb_rx_cfg.bit_format) {
  1765. case SNDRV_PCM_FORMAT_S32_LE:
  1766. ucontrol->value.integer.value[0] = 3;
  1767. break;
  1768. case SNDRV_PCM_FORMAT_S24_3LE:
  1769. ucontrol->value.integer.value[0] = 2;
  1770. break;
  1771. case SNDRV_PCM_FORMAT_S24_LE:
  1772. ucontrol->value.integer.value[0] = 1;
  1773. break;
  1774. case SNDRV_PCM_FORMAT_S16_LE:
  1775. default:
  1776. ucontrol->value.integer.value[0] = 0;
  1777. break;
  1778. }
  1779. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1780. __func__, usb_rx_cfg.bit_format,
  1781. ucontrol->value.integer.value[0]);
  1782. return 0;
  1783. }
  1784. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  1785. struct snd_ctl_elem_value *ucontrol)
  1786. {
  1787. int rc = 0;
  1788. switch (ucontrol->value.integer.value[0]) {
  1789. case 3:
  1790. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1791. break;
  1792. case 2:
  1793. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1794. break;
  1795. case 1:
  1796. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1797. break;
  1798. case 0:
  1799. default:
  1800. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1801. break;
  1802. }
  1803. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1804. __func__, usb_rx_cfg.bit_format,
  1805. ucontrol->value.integer.value[0]);
  1806. return rc;
  1807. }
  1808. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  1809. struct snd_ctl_elem_value *ucontrol)
  1810. {
  1811. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  1812. usb_tx_cfg.channels);
  1813. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  1814. return 0;
  1815. }
  1816. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  1817. struct snd_ctl_elem_value *ucontrol)
  1818. {
  1819. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1820. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  1821. return 1;
  1822. }
  1823. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1824. struct snd_ctl_elem_value *ucontrol)
  1825. {
  1826. int sample_rate_val;
  1827. switch (usb_tx_cfg.sample_rate) {
  1828. case SAMPLING_RATE_384KHZ:
  1829. sample_rate_val = 12;
  1830. break;
  1831. case SAMPLING_RATE_352P8KHZ:
  1832. sample_rate_val = 11;
  1833. break;
  1834. case SAMPLING_RATE_192KHZ:
  1835. sample_rate_val = 10;
  1836. break;
  1837. case SAMPLING_RATE_176P4KHZ:
  1838. sample_rate_val = 9;
  1839. break;
  1840. case SAMPLING_RATE_96KHZ:
  1841. sample_rate_val = 8;
  1842. break;
  1843. case SAMPLING_RATE_88P2KHZ:
  1844. sample_rate_val = 7;
  1845. break;
  1846. case SAMPLING_RATE_48KHZ:
  1847. sample_rate_val = 6;
  1848. break;
  1849. case SAMPLING_RATE_44P1KHZ:
  1850. sample_rate_val = 5;
  1851. break;
  1852. case SAMPLING_RATE_32KHZ:
  1853. sample_rate_val = 4;
  1854. break;
  1855. case SAMPLING_RATE_22P05KHZ:
  1856. sample_rate_val = 3;
  1857. break;
  1858. case SAMPLING_RATE_16KHZ:
  1859. sample_rate_val = 2;
  1860. break;
  1861. case SAMPLING_RATE_11P025KHZ:
  1862. sample_rate_val = 1;
  1863. break;
  1864. case SAMPLING_RATE_8KHZ:
  1865. sample_rate_val = 0;
  1866. break;
  1867. default:
  1868. sample_rate_val = 6;
  1869. break;
  1870. }
  1871. ucontrol->value.integer.value[0] = sample_rate_val;
  1872. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  1873. usb_tx_cfg.sample_rate);
  1874. return 0;
  1875. }
  1876. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1877. struct snd_ctl_elem_value *ucontrol)
  1878. {
  1879. switch (ucontrol->value.integer.value[0]) {
  1880. case 12:
  1881. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1882. break;
  1883. case 11:
  1884. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1885. break;
  1886. case 10:
  1887. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1888. break;
  1889. case 9:
  1890. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1891. break;
  1892. case 8:
  1893. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1894. break;
  1895. case 7:
  1896. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1897. break;
  1898. case 6:
  1899. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1900. break;
  1901. case 5:
  1902. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1903. break;
  1904. case 4:
  1905. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1906. break;
  1907. case 3:
  1908. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1909. break;
  1910. case 2:
  1911. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1912. break;
  1913. case 1:
  1914. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1915. break;
  1916. case 0:
  1917. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1918. break;
  1919. default:
  1920. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1921. break;
  1922. }
  1923. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  1924. __func__, ucontrol->value.integer.value[0],
  1925. usb_tx_cfg.sample_rate);
  1926. return 0;
  1927. }
  1928. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  1929. struct snd_ctl_elem_value *ucontrol)
  1930. {
  1931. switch (usb_tx_cfg.bit_format) {
  1932. case SNDRV_PCM_FORMAT_S32_LE:
  1933. ucontrol->value.integer.value[0] = 3;
  1934. break;
  1935. case SNDRV_PCM_FORMAT_S24_3LE:
  1936. ucontrol->value.integer.value[0] = 2;
  1937. break;
  1938. case SNDRV_PCM_FORMAT_S24_LE:
  1939. ucontrol->value.integer.value[0] = 1;
  1940. break;
  1941. case SNDRV_PCM_FORMAT_S16_LE:
  1942. default:
  1943. ucontrol->value.integer.value[0] = 0;
  1944. break;
  1945. }
  1946. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1947. __func__, usb_tx_cfg.bit_format,
  1948. ucontrol->value.integer.value[0]);
  1949. return 0;
  1950. }
  1951. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  1952. struct snd_ctl_elem_value *ucontrol)
  1953. {
  1954. int rc = 0;
  1955. switch (ucontrol->value.integer.value[0]) {
  1956. case 3:
  1957. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1958. break;
  1959. case 2:
  1960. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1961. break;
  1962. case 1:
  1963. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1964. break;
  1965. case 0:
  1966. default:
  1967. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1968. break;
  1969. }
  1970. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1971. __func__, usb_tx_cfg.bit_format,
  1972. ucontrol->value.integer.value[0]);
  1973. return rc;
  1974. }
  1975. static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
  1976. {
  1977. int idx;
  1978. if (strnstr(kcontrol->id.name, "Display Port RX",
  1979. sizeof("Display Port RX"))) {
  1980. idx = DP_RX_IDX;
  1981. } else {
  1982. pr_err("%s: unsupported BE: %s\n",
  1983. __func__, kcontrol->id.name);
  1984. idx = -EINVAL;
  1985. }
  1986. return idx;
  1987. }
  1988. static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
  1989. struct snd_ctl_elem_value *ucontrol)
  1990. {
  1991. int idx = ext_disp_get_port_idx(kcontrol);
  1992. if (idx < 0)
  1993. return idx;
  1994. switch (ext_disp_rx_cfg[idx].bit_format) {
  1995. case SNDRV_PCM_FORMAT_S24_3LE:
  1996. ucontrol->value.integer.value[0] = 2;
  1997. break;
  1998. case SNDRV_PCM_FORMAT_S24_LE:
  1999. ucontrol->value.integer.value[0] = 1;
  2000. break;
  2001. case SNDRV_PCM_FORMAT_S16_LE:
  2002. default:
  2003. ucontrol->value.integer.value[0] = 0;
  2004. break;
  2005. }
  2006. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  2007. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  2008. ucontrol->value.integer.value[0]);
  2009. return 0;
  2010. }
  2011. static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
  2012. struct snd_ctl_elem_value *ucontrol)
  2013. {
  2014. int idx = ext_disp_get_port_idx(kcontrol);
  2015. if (idx < 0)
  2016. return idx;
  2017. switch (ucontrol->value.integer.value[0]) {
  2018. case 2:
  2019. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  2020. break;
  2021. case 1:
  2022. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  2023. break;
  2024. case 0:
  2025. default:
  2026. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  2027. break;
  2028. }
  2029. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  2030. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  2031. ucontrol->value.integer.value[0]);
  2032. return 0;
  2033. }
  2034. static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
  2035. struct snd_ctl_elem_value *ucontrol)
  2036. {
  2037. int idx = ext_disp_get_port_idx(kcontrol);
  2038. if (idx < 0)
  2039. return idx;
  2040. ucontrol->value.integer.value[0] =
  2041. ext_disp_rx_cfg[idx].channels - 2;
  2042. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  2043. idx, ext_disp_rx_cfg[idx].channels);
  2044. return 0;
  2045. }
  2046. static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
  2047. struct snd_ctl_elem_value *ucontrol)
  2048. {
  2049. int idx = ext_disp_get_port_idx(kcontrol);
  2050. if (idx < 0)
  2051. return idx;
  2052. ext_disp_rx_cfg[idx].channels =
  2053. ucontrol->value.integer.value[0] + 2;
  2054. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  2055. idx, ext_disp_rx_cfg[idx].channels);
  2056. return 1;
  2057. }
  2058. static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2059. struct snd_ctl_elem_value *ucontrol)
  2060. {
  2061. int sample_rate_val;
  2062. int idx = ext_disp_get_port_idx(kcontrol);
  2063. if (idx < 0)
  2064. return idx;
  2065. switch (ext_disp_rx_cfg[idx].sample_rate) {
  2066. case SAMPLING_RATE_176P4KHZ:
  2067. sample_rate_val = 6;
  2068. break;
  2069. case SAMPLING_RATE_88P2KHZ:
  2070. sample_rate_val = 5;
  2071. break;
  2072. case SAMPLING_RATE_44P1KHZ:
  2073. sample_rate_val = 4;
  2074. break;
  2075. case SAMPLING_RATE_32KHZ:
  2076. sample_rate_val = 3;
  2077. break;
  2078. case SAMPLING_RATE_192KHZ:
  2079. sample_rate_val = 2;
  2080. break;
  2081. case SAMPLING_RATE_96KHZ:
  2082. sample_rate_val = 1;
  2083. break;
  2084. case SAMPLING_RATE_48KHZ:
  2085. default:
  2086. sample_rate_val = 0;
  2087. break;
  2088. }
  2089. ucontrol->value.integer.value[0] = sample_rate_val;
  2090. pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
  2091. idx, ext_disp_rx_cfg[idx].sample_rate);
  2092. return 0;
  2093. }
  2094. static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2095. struct snd_ctl_elem_value *ucontrol)
  2096. {
  2097. int idx = ext_disp_get_port_idx(kcontrol);
  2098. if (idx < 0)
  2099. return idx;
  2100. switch (ucontrol->value.integer.value[0]) {
  2101. case 6:
  2102. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
  2103. break;
  2104. case 5:
  2105. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
  2106. break;
  2107. case 4:
  2108. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
  2109. break;
  2110. case 3:
  2111. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
  2112. break;
  2113. case 2:
  2114. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
  2115. break;
  2116. case 1:
  2117. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
  2118. break;
  2119. case 0:
  2120. default:
  2121. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
  2122. break;
  2123. }
  2124. pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
  2125. __func__, ucontrol->value.integer.value[0], idx,
  2126. ext_disp_rx_cfg[idx].sample_rate);
  2127. return 0;
  2128. }
  2129. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  2130. struct snd_ctl_elem_value *ucontrol)
  2131. {
  2132. pr_debug("%s: proxy_rx channels = %d\n",
  2133. __func__, proxy_rx_cfg.channels);
  2134. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  2135. return 0;
  2136. }
  2137. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  2138. struct snd_ctl_elem_value *ucontrol)
  2139. {
  2140. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  2141. pr_debug("%s: proxy_rx channels = %d\n",
  2142. __func__, proxy_rx_cfg.channels);
  2143. return 1;
  2144. }
  2145. static int tdm_get_sample_rate(int value)
  2146. {
  2147. int sample_rate = 0;
  2148. switch (value) {
  2149. case 0:
  2150. sample_rate = SAMPLING_RATE_8KHZ;
  2151. break;
  2152. case 1:
  2153. sample_rate = SAMPLING_RATE_16KHZ;
  2154. break;
  2155. case 2:
  2156. sample_rate = SAMPLING_RATE_32KHZ;
  2157. break;
  2158. case 3:
  2159. sample_rate = SAMPLING_RATE_48KHZ;
  2160. break;
  2161. case 4:
  2162. sample_rate = SAMPLING_RATE_176P4KHZ;
  2163. break;
  2164. case 5:
  2165. sample_rate = SAMPLING_RATE_352P8KHZ;
  2166. break;
  2167. default:
  2168. sample_rate = SAMPLING_RATE_48KHZ;
  2169. break;
  2170. }
  2171. return sample_rate;
  2172. }
  2173. static int aux_pcm_get_sample_rate(int value)
  2174. {
  2175. int sample_rate;
  2176. switch (value) {
  2177. case 1:
  2178. sample_rate = SAMPLING_RATE_16KHZ;
  2179. break;
  2180. case 0:
  2181. default:
  2182. sample_rate = SAMPLING_RATE_8KHZ;
  2183. break;
  2184. }
  2185. return sample_rate;
  2186. }
  2187. static int tdm_get_sample_rate_val(int sample_rate)
  2188. {
  2189. int sample_rate_val = 0;
  2190. switch (sample_rate) {
  2191. case SAMPLING_RATE_8KHZ:
  2192. sample_rate_val = 0;
  2193. break;
  2194. case SAMPLING_RATE_16KHZ:
  2195. sample_rate_val = 1;
  2196. break;
  2197. case SAMPLING_RATE_32KHZ:
  2198. sample_rate_val = 2;
  2199. break;
  2200. case SAMPLING_RATE_48KHZ:
  2201. sample_rate_val = 3;
  2202. break;
  2203. case SAMPLING_RATE_176P4KHZ:
  2204. sample_rate_val = 4;
  2205. break;
  2206. case SAMPLING_RATE_352P8KHZ:
  2207. sample_rate_val = 5;
  2208. break;
  2209. default:
  2210. sample_rate_val = 3;
  2211. break;
  2212. }
  2213. return sample_rate_val;
  2214. }
  2215. static int aux_pcm_get_sample_rate_val(int sample_rate)
  2216. {
  2217. int sample_rate_val;
  2218. switch (sample_rate) {
  2219. case SAMPLING_RATE_16KHZ:
  2220. sample_rate_val = 1;
  2221. break;
  2222. case SAMPLING_RATE_8KHZ:
  2223. default:
  2224. sample_rate_val = 0;
  2225. break;
  2226. }
  2227. return sample_rate_val;
  2228. }
  2229. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  2230. struct tdm_port *port)
  2231. {
  2232. if (port) {
  2233. if (strnstr(kcontrol->id.name, "PRI",
  2234. sizeof(kcontrol->id.name))) {
  2235. port->mode = TDM_PRI;
  2236. } else if (strnstr(kcontrol->id.name, "SEC",
  2237. sizeof(kcontrol->id.name))) {
  2238. port->mode = TDM_SEC;
  2239. } else if (strnstr(kcontrol->id.name, "TERT",
  2240. sizeof(kcontrol->id.name))) {
  2241. port->mode = TDM_TERT;
  2242. } else if (strnstr(kcontrol->id.name, "QUAT",
  2243. sizeof(kcontrol->id.name))) {
  2244. port->mode = TDM_QUAT;
  2245. } else if (strnstr(kcontrol->id.name, "QUIN",
  2246. sizeof(kcontrol->id.name))) {
  2247. port->mode = TDM_QUIN;
  2248. } else {
  2249. pr_err("%s: unsupported mode in: %s\n",
  2250. __func__, kcontrol->id.name);
  2251. return -EINVAL;
  2252. }
  2253. if (strnstr(kcontrol->id.name, "RX_0",
  2254. sizeof(kcontrol->id.name)) ||
  2255. strnstr(kcontrol->id.name, "TX_0",
  2256. sizeof(kcontrol->id.name))) {
  2257. port->channel = TDM_0;
  2258. } else if (strnstr(kcontrol->id.name, "RX_1",
  2259. sizeof(kcontrol->id.name)) ||
  2260. strnstr(kcontrol->id.name, "TX_1",
  2261. sizeof(kcontrol->id.name))) {
  2262. port->channel = TDM_1;
  2263. } else if (strnstr(kcontrol->id.name, "RX_2",
  2264. sizeof(kcontrol->id.name)) ||
  2265. strnstr(kcontrol->id.name, "TX_2",
  2266. sizeof(kcontrol->id.name))) {
  2267. port->channel = TDM_2;
  2268. } else if (strnstr(kcontrol->id.name, "RX_3",
  2269. sizeof(kcontrol->id.name)) ||
  2270. strnstr(kcontrol->id.name, "TX_3",
  2271. sizeof(kcontrol->id.name))) {
  2272. port->channel = TDM_3;
  2273. } else if (strnstr(kcontrol->id.name, "RX_4",
  2274. sizeof(kcontrol->id.name)) ||
  2275. strnstr(kcontrol->id.name, "TX_4",
  2276. sizeof(kcontrol->id.name))) {
  2277. port->channel = TDM_4;
  2278. } else if (strnstr(kcontrol->id.name, "RX_5",
  2279. sizeof(kcontrol->id.name)) ||
  2280. strnstr(kcontrol->id.name, "TX_5",
  2281. sizeof(kcontrol->id.name))) {
  2282. port->channel = TDM_5;
  2283. } else if (strnstr(kcontrol->id.name, "RX_6",
  2284. sizeof(kcontrol->id.name)) ||
  2285. strnstr(kcontrol->id.name, "TX_6",
  2286. sizeof(kcontrol->id.name))) {
  2287. port->channel = TDM_6;
  2288. } else if (strnstr(kcontrol->id.name, "RX_7",
  2289. sizeof(kcontrol->id.name)) ||
  2290. strnstr(kcontrol->id.name, "TX_7",
  2291. sizeof(kcontrol->id.name))) {
  2292. port->channel = TDM_7;
  2293. } else {
  2294. pr_err("%s: unsupported channel in: %s\n",
  2295. __func__, kcontrol->id.name);
  2296. return -EINVAL;
  2297. }
  2298. } else {
  2299. return -EINVAL;
  2300. }
  2301. return 0;
  2302. }
  2303. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2304. struct snd_ctl_elem_value *ucontrol)
  2305. {
  2306. struct tdm_port port;
  2307. int ret = tdm_get_port_idx(kcontrol, &port);
  2308. if (ret) {
  2309. pr_err("%s: unsupported control: %s\n",
  2310. __func__, kcontrol->id.name);
  2311. } else {
  2312. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2313. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  2314. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2315. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2316. ucontrol->value.enumerated.item[0]);
  2317. }
  2318. return ret;
  2319. }
  2320. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2321. struct snd_ctl_elem_value *ucontrol)
  2322. {
  2323. struct tdm_port port;
  2324. int ret = tdm_get_port_idx(kcontrol, &port);
  2325. if (ret) {
  2326. pr_err("%s: unsupported control: %s\n",
  2327. __func__, kcontrol->id.name);
  2328. } else {
  2329. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  2330. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2331. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2332. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2333. ucontrol->value.enumerated.item[0]);
  2334. }
  2335. return ret;
  2336. }
  2337. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2338. struct snd_ctl_elem_value *ucontrol)
  2339. {
  2340. struct tdm_port port;
  2341. int ret = tdm_get_port_idx(kcontrol, &port);
  2342. if (ret) {
  2343. pr_err("%s: unsupported control: %s\n",
  2344. __func__, kcontrol->id.name);
  2345. } else {
  2346. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2347. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  2348. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2349. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2350. ucontrol->value.enumerated.item[0]);
  2351. }
  2352. return ret;
  2353. }
  2354. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2355. struct snd_ctl_elem_value *ucontrol)
  2356. {
  2357. struct tdm_port port;
  2358. int ret = tdm_get_port_idx(kcontrol, &port);
  2359. if (ret) {
  2360. pr_err("%s: unsupported control: %s\n",
  2361. __func__, kcontrol->id.name);
  2362. } else {
  2363. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  2364. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2365. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2366. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2367. ucontrol->value.enumerated.item[0]);
  2368. }
  2369. return ret;
  2370. }
  2371. static int tdm_get_format(int value)
  2372. {
  2373. int format = 0;
  2374. switch (value) {
  2375. case 0:
  2376. format = SNDRV_PCM_FORMAT_S16_LE;
  2377. break;
  2378. case 1:
  2379. format = SNDRV_PCM_FORMAT_S24_LE;
  2380. break;
  2381. case 2:
  2382. format = SNDRV_PCM_FORMAT_S32_LE;
  2383. break;
  2384. default:
  2385. format = SNDRV_PCM_FORMAT_S16_LE;
  2386. break;
  2387. }
  2388. return format;
  2389. }
  2390. static int tdm_get_format_val(int format)
  2391. {
  2392. int value = 0;
  2393. switch (format) {
  2394. case SNDRV_PCM_FORMAT_S16_LE:
  2395. value = 0;
  2396. break;
  2397. case SNDRV_PCM_FORMAT_S24_LE:
  2398. value = 1;
  2399. break;
  2400. case SNDRV_PCM_FORMAT_S32_LE:
  2401. value = 2;
  2402. break;
  2403. default:
  2404. value = 0;
  2405. break;
  2406. }
  2407. return value;
  2408. }
  2409. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  2410. struct snd_ctl_elem_value *ucontrol)
  2411. {
  2412. struct tdm_port port;
  2413. int ret = tdm_get_port_idx(kcontrol, &port);
  2414. if (ret) {
  2415. pr_err("%s: unsupported control: %s\n",
  2416. __func__, kcontrol->id.name);
  2417. } else {
  2418. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2419. tdm_rx_cfg[port.mode][port.channel].bit_format);
  2420. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2421. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2422. ucontrol->value.enumerated.item[0]);
  2423. }
  2424. return ret;
  2425. }
  2426. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  2427. struct snd_ctl_elem_value *ucontrol)
  2428. {
  2429. struct tdm_port port;
  2430. int ret = tdm_get_port_idx(kcontrol, &port);
  2431. if (ret) {
  2432. pr_err("%s: unsupported control: %s\n",
  2433. __func__, kcontrol->id.name);
  2434. } else {
  2435. tdm_rx_cfg[port.mode][port.channel].bit_format =
  2436. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2437. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2438. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2439. ucontrol->value.enumerated.item[0]);
  2440. }
  2441. return ret;
  2442. }
  2443. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  2444. struct snd_ctl_elem_value *ucontrol)
  2445. {
  2446. struct tdm_port port;
  2447. int ret = tdm_get_port_idx(kcontrol, &port);
  2448. if (ret) {
  2449. pr_err("%s: unsupported control: %s\n",
  2450. __func__, kcontrol->id.name);
  2451. } else {
  2452. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2453. tdm_tx_cfg[port.mode][port.channel].bit_format);
  2454. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2455. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2456. ucontrol->value.enumerated.item[0]);
  2457. }
  2458. return ret;
  2459. }
  2460. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  2461. struct snd_ctl_elem_value *ucontrol)
  2462. {
  2463. struct tdm_port port;
  2464. int ret = tdm_get_port_idx(kcontrol, &port);
  2465. if (ret) {
  2466. pr_err("%s: unsupported control: %s\n",
  2467. __func__, kcontrol->id.name);
  2468. } else {
  2469. tdm_tx_cfg[port.mode][port.channel].bit_format =
  2470. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2471. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2472. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2473. ucontrol->value.enumerated.item[0]);
  2474. }
  2475. return ret;
  2476. }
  2477. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  2478. struct snd_ctl_elem_value *ucontrol)
  2479. {
  2480. struct tdm_port port;
  2481. int ret = tdm_get_port_idx(kcontrol, &port);
  2482. if (ret) {
  2483. pr_err("%s: unsupported control: %s\n",
  2484. __func__, kcontrol->id.name);
  2485. } else {
  2486. ucontrol->value.enumerated.item[0] =
  2487. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  2488. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2489. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  2490. ucontrol->value.enumerated.item[0]);
  2491. }
  2492. return ret;
  2493. }
  2494. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  2495. struct snd_ctl_elem_value *ucontrol)
  2496. {
  2497. struct tdm_port port;
  2498. int ret = tdm_get_port_idx(kcontrol, &port);
  2499. if (ret) {
  2500. pr_err("%s: unsupported control: %s\n",
  2501. __func__, kcontrol->id.name);
  2502. } else {
  2503. tdm_rx_cfg[port.mode][port.channel].channels =
  2504. ucontrol->value.enumerated.item[0] + 1;
  2505. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2506. tdm_rx_cfg[port.mode][port.channel].channels,
  2507. ucontrol->value.enumerated.item[0] + 1);
  2508. }
  2509. return ret;
  2510. }
  2511. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  2512. struct snd_ctl_elem_value *ucontrol)
  2513. {
  2514. struct tdm_port port;
  2515. int ret = tdm_get_port_idx(kcontrol, &port);
  2516. if (ret) {
  2517. pr_err("%s: unsupported control: %s\n",
  2518. __func__, kcontrol->id.name);
  2519. } else {
  2520. ucontrol->value.enumerated.item[0] =
  2521. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  2522. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2523. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  2524. ucontrol->value.enumerated.item[0]);
  2525. }
  2526. return ret;
  2527. }
  2528. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  2529. struct snd_ctl_elem_value *ucontrol)
  2530. {
  2531. struct tdm_port port;
  2532. int ret = tdm_get_port_idx(kcontrol, &port);
  2533. if (ret) {
  2534. pr_err("%s: unsupported control: %s\n",
  2535. __func__, kcontrol->id.name);
  2536. } else {
  2537. tdm_tx_cfg[port.mode][port.channel].channels =
  2538. ucontrol->value.enumerated.item[0] + 1;
  2539. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2540. tdm_tx_cfg[port.mode][port.channel].channels,
  2541. ucontrol->value.enumerated.item[0] + 1);
  2542. }
  2543. return ret;
  2544. }
  2545. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  2546. {
  2547. int idx;
  2548. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  2549. sizeof("PRIM_AUX_PCM"))) {
  2550. idx = PRIM_AUX_PCM;
  2551. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  2552. sizeof("SEC_AUX_PCM"))) {
  2553. idx = SEC_AUX_PCM;
  2554. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  2555. sizeof("TERT_AUX_PCM"))) {
  2556. idx = TERT_AUX_PCM;
  2557. } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
  2558. sizeof("QUAT_AUX_PCM"))) {
  2559. idx = QUAT_AUX_PCM;
  2560. } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
  2561. sizeof("QUIN_AUX_PCM"))) {
  2562. idx = QUIN_AUX_PCM;
  2563. } else {
  2564. pr_err("%s: unsupported port: %s\n",
  2565. __func__, kcontrol->id.name);
  2566. idx = -EINVAL;
  2567. }
  2568. return idx;
  2569. }
  2570. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2571. struct snd_ctl_elem_value *ucontrol)
  2572. {
  2573. int idx = aux_pcm_get_port_idx(kcontrol);
  2574. if (idx < 0)
  2575. return idx;
  2576. aux_pcm_rx_cfg[idx].sample_rate =
  2577. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2578. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2579. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2580. ucontrol->value.enumerated.item[0]);
  2581. return 0;
  2582. }
  2583. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2584. struct snd_ctl_elem_value *ucontrol)
  2585. {
  2586. int idx = aux_pcm_get_port_idx(kcontrol);
  2587. if (idx < 0)
  2588. return idx;
  2589. ucontrol->value.enumerated.item[0] =
  2590. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  2591. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2592. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2593. ucontrol->value.enumerated.item[0]);
  2594. return 0;
  2595. }
  2596. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2597. struct snd_ctl_elem_value *ucontrol)
  2598. {
  2599. int idx = aux_pcm_get_port_idx(kcontrol);
  2600. if (idx < 0)
  2601. return idx;
  2602. aux_pcm_tx_cfg[idx].sample_rate =
  2603. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2604. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2605. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2606. ucontrol->value.enumerated.item[0]);
  2607. return 0;
  2608. }
  2609. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2610. struct snd_ctl_elem_value *ucontrol)
  2611. {
  2612. int idx = aux_pcm_get_port_idx(kcontrol);
  2613. if (idx < 0)
  2614. return idx;
  2615. ucontrol->value.enumerated.item[0] =
  2616. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  2617. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2618. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2619. ucontrol->value.enumerated.item[0]);
  2620. return 0;
  2621. }
  2622. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  2623. {
  2624. int idx;
  2625. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  2626. sizeof("PRIM_MI2S_RX"))) {
  2627. idx = PRIM_MI2S;
  2628. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  2629. sizeof("SEC_MI2S_RX"))) {
  2630. idx = SEC_MI2S;
  2631. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  2632. sizeof("TERT_MI2S_RX"))) {
  2633. idx = TERT_MI2S;
  2634. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
  2635. sizeof("QUAT_MI2S_RX"))) {
  2636. idx = QUAT_MI2S;
  2637. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
  2638. sizeof("QUIN_MI2S_RX"))) {
  2639. idx = QUIN_MI2S;
  2640. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  2641. sizeof("PRIM_MI2S_TX"))) {
  2642. idx = PRIM_MI2S;
  2643. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  2644. sizeof("SEC_MI2S_TX"))) {
  2645. idx = SEC_MI2S;
  2646. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  2647. sizeof("TERT_MI2S_TX"))) {
  2648. idx = TERT_MI2S;
  2649. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
  2650. sizeof("QUAT_MI2S_TX"))) {
  2651. idx = QUAT_MI2S;
  2652. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
  2653. sizeof("QUIN_MI2S_TX"))) {
  2654. idx = QUIN_MI2S;
  2655. } else {
  2656. pr_err("%s: unsupported channel: %s\n",
  2657. __func__, kcontrol->id.name);
  2658. idx = -EINVAL;
  2659. }
  2660. return idx;
  2661. }
  2662. static int mi2s_get_sample_rate_val(int sample_rate)
  2663. {
  2664. int sample_rate_val;
  2665. switch (sample_rate) {
  2666. case SAMPLING_RATE_8KHZ:
  2667. sample_rate_val = 0;
  2668. break;
  2669. case SAMPLING_RATE_11P025KHZ:
  2670. sample_rate_val = 1;
  2671. break;
  2672. case SAMPLING_RATE_16KHZ:
  2673. sample_rate_val = 2;
  2674. break;
  2675. case SAMPLING_RATE_22P05KHZ:
  2676. sample_rate_val = 3;
  2677. break;
  2678. case SAMPLING_RATE_32KHZ:
  2679. sample_rate_val = 4;
  2680. break;
  2681. case SAMPLING_RATE_44P1KHZ:
  2682. sample_rate_val = 5;
  2683. break;
  2684. case SAMPLING_RATE_48KHZ:
  2685. sample_rate_val = 6;
  2686. break;
  2687. case SAMPLING_RATE_96KHZ:
  2688. sample_rate_val = 7;
  2689. break;
  2690. case SAMPLING_RATE_192KHZ:
  2691. sample_rate_val = 8;
  2692. break;
  2693. default:
  2694. sample_rate_val = 6;
  2695. break;
  2696. }
  2697. return sample_rate_val;
  2698. }
  2699. static int mi2s_get_sample_rate(int value)
  2700. {
  2701. int sample_rate;
  2702. switch (value) {
  2703. case 0:
  2704. sample_rate = SAMPLING_RATE_8KHZ;
  2705. break;
  2706. case 1:
  2707. sample_rate = SAMPLING_RATE_11P025KHZ;
  2708. break;
  2709. case 2:
  2710. sample_rate = SAMPLING_RATE_16KHZ;
  2711. break;
  2712. case 3:
  2713. sample_rate = SAMPLING_RATE_22P05KHZ;
  2714. break;
  2715. case 4:
  2716. sample_rate = SAMPLING_RATE_32KHZ;
  2717. break;
  2718. case 5:
  2719. sample_rate = SAMPLING_RATE_44P1KHZ;
  2720. break;
  2721. case 6:
  2722. sample_rate = SAMPLING_RATE_48KHZ;
  2723. break;
  2724. case 7:
  2725. sample_rate = SAMPLING_RATE_96KHZ;
  2726. break;
  2727. case 8:
  2728. sample_rate = SAMPLING_RATE_192KHZ;
  2729. break;
  2730. default:
  2731. sample_rate = SAMPLING_RATE_48KHZ;
  2732. break;
  2733. }
  2734. return sample_rate;
  2735. }
  2736. static int mi2s_auxpcm_get_format(int value)
  2737. {
  2738. int format;
  2739. switch (value) {
  2740. case 0:
  2741. format = SNDRV_PCM_FORMAT_S16_LE;
  2742. break;
  2743. case 1:
  2744. format = SNDRV_PCM_FORMAT_S24_LE;
  2745. break;
  2746. case 2:
  2747. format = SNDRV_PCM_FORMAT_S24_3LE;
  2748. break;
  2749. case 3:
  2750. format = SNDRV_PCM_FORMAT_S32_LE;
  2751. break;
  2752. default:
  2753. format = SNDRV_PCM_FORMAT_S16_LE;
  2754. break;
  2755. }
  2756. return format;
  2757. }
  2758. static int mi2s_auxpcm_get_format_value(int format)
  2759. {
  2760. int value;
  2761. switch (format) {
  2762. case SNDRV_PCM_FORMAT_S16_LE:
  2763. value = 0;
  2764. break;
  2765. case SNDRV_PCM_FORMAT_S24_LE:
  2766. value = 1;
  2767. break;
  2768. case SNDRV_PCM_FORMAT_S24_3LE:
  2769. value = 2;
  2770. break;
  2771. case SNDRV_PCM_FORMAT_S32_LE:
  2772. value = 3;
  2773. break;
  2774. default:
  2775. value = 0;
  2776. break;
  2777. }
  2778. return value;
  2779. }
  2780. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2781. struct snd_ctl_elem_value *ucontrol)
  2782. {
  2783. int idx = mi2s_get_port_idx(kcontrol);
  2784. if (idx < 0)
  2785. return idx;
  2786. mi2s_rx_cfg[idx].sample_rate =
  2787. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2788. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2789. idx, mi2s_rx_cfg[idx].sample_rate,
  2790. ucontrol->value.enumerated.item[0]);
  2791. return 0;
  2792. }
  2793. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2794. struct snd_ctl_elem_value *ucontrol)
  2795. {
  2796. int idx = mi2s_get_port_idx(kcontrol);
  2797. if (idx < 0)
  2798. return idx;
  2799. ucontrol->value.enumerated.item[0] =
  2800. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  2801. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2802. idx, mi2s_rx_cfg[idx].sample_rate,
  2803. ucontrol->value.enumerated.item[0]);
  2804. return 0;
  2805. }
  2806. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2807. struct snd_ctl_elem_value *ucontrol)
  2808. {
  2809. int idx = mi2s_get_port_idx(kcontrol);
  2810. if (idx < 0)
  2811. return idx;
  2812. mi2s_tx_cfg[idx].sample_rate =
  2813. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2814. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2815. idx, mi2s_tx_cfg[idx].sample_rate,
  2816. ucontrol->value.enumerated.item[0]);
  2817. return 0;
  2818. }
  2819. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2820. struct snd_ctl_elem_value *ucontrol)
  2821. {
  2822. int idx = mi2s_get_port_idx(kcontrol);
  2823. if (idx < 0)
  2824. return idx;
  2825. ucontrol->value.enumerated.item[0] =
  2826. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  2827. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2828. idx, mi2s_tx_cfg[idx].sample_rate,
  2829. ucontrol->value.enumerated.item[0]);
  2830. return 0;
  2831. }
  2832. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  2833. struct snd_ctl_elem_value *ucontrol)
  2834. {
  2835. int idx = mi2s_get_port_idx(kcontrol);
  2836. if (idx < 0)
  2837. return idx;
  2838. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2839. idx, mi2s_rx_cfg[idx].channels);
  2840. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  2841. return 0;
  2842. }
  2843. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  2844. struct snd_ctl_elem_value *ucontrol)
  2845. {
  2846. int idx = mi2s_get_port_idx(kcontrol);
  2847. if (idx < 0)
  2848. return idx;
  2849. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2850. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2851. idx, mi2s_rx_cfg[idx].channels);
  2852. return 1;
  2853. }
  2854. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  2855. struct snd_ctl_elem_value *ucontrol)
  2856. {
  2857. int idx = mi2s_get_port_idx(kcontrol);
  2858. if (idx < 0)
  2859. return idx;
  2860. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2861. idx, mi2s_tx_cfg[idx].channels);
  2862. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  2863. return 0;
  2864. }
  2865. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  2866. struct snd_ctl_elem_value *ucontrol)
  2867. {
  2868. int idx = mi2s_get_port_idx(kcontrol);
  2869. if (idx < 0)
  2870. return idx;
  2871. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2872. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2873. idx, mi2s_tx_cfg[idx].channels);
  2874. return 1;
  2875. }
  2876. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  2877. struct snd_ctl_elem_value *ucontrol)
  2878. {
  2879. int idx = mi2s_get_port_idx(kcontrol);
  2880. if (idx < 0)
  2881. return idx;
  2882. ucontrol->value.enumerated.item[0] =
  2883. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  2884. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2885. idx, mi2s_rx_cfg[idx].bit_format,
  2886. ucontrol->value.enumerated.item[0]);
  2887. return 0;
  2888. }
  2889. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  2890. struct snd_ctl_elem_value *ucontrol)
  2891. {
  2892. int idx = mi2s_get_port_idx(kcontrol);
  2893. if (idx < 0)
  2894. return idx;
  2895. mi2s_rx_cfg[idx].bit_format =
  2896. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2897. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2898. idx, mi2s_rx_cfg[idx].bit_format,
  2899. ucontrol->value.enumerated.item[0]);
  2900. return 0;
  2901. }
  2902. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  2903. struct snd_ctl_elem_value *ucontrol)
  2904. {
  2905. int idx = mi2s_get_port_idx(kcontrol);
  2906. if (idx < 0)
  2907. return idx;
  2908. ucontrol->value.enumerated.item[0] =
  2909. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  2910. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2911. idx, mi2s_tx_cfg[idx].bit_format,
  2912. ucontrol->value.enumerated.item[0]);
  2913. return 0;
  2914. }
  2915. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  2916. struct snd_ctl_elem_value *ucontrol)
  2917. {
  2918. int idx = mi2s_get_port_idx(kcontrol);
  2919. if (idx < 0)
  2920. return idx;
  2921. mi2s_tx_cfg[idx].bit_format =
  2922. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2923. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2924. idx, mi2s_tx_cfg[idx].bit_format,
  2925. ucontrol->value.enumerated.item[0]);
  2926. return 0;
  2927. }
  2928. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  2929. struct snd_ctl_elem_value *ucontrol)
  2930. {
  2931. int idx = aux_pcm_get_port_idx(kcontrol);
  2932. if (idx < 0)
  2933. return idx;
  2934. ucontrol->value.enumerated.item[0] =
  2935. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  2936. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2937. idx, aux_pcm_rx_cfg[idx].bit_format,
  2938. ucontrol->value.enumerated.item[0]);
  2939. return 0;
  2940. }
  2941. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  2942. struct snd_ctl_elem_value *ucontrol)
  2943. {
  2944. int idx = aux_pcm_get_port_idx(kcontrol);
  2945. if (idx < 0)
  2946. return idx;
  2947. aux_pcm_rx_cfg[idx].bit_format =
  2948. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2949. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2950. idx, aux_pcm_rx_cfg[idx].bit_format,
  2951. ucontrol->value.enumerated.item[0]);
  2952. return 0;
  2953. }
  2954. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  2955. struct snd_ctl_elem_value *ucontrol)
  2956. {
  2957. int idx = aux_pcm_get_port_idx(kcontrol);
  2958. if (idx < 0)
  2959. return idx;
  2960. ucontrol->value.enumerated.item[0] =
  2961. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  2962. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2963. idx, aux_pcm_tx_cfg[idx].bit_format,
  2964. ucontrol->value.enumerated.item[0]);
  2965. return 0;
  2966. }
  2967. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  2968. struct snd_ctl_elem_value *ucontrol)
  2969. {
  2970. int idx = aux_pcm_get_port_idx(kcontrol);
  2971. if (idx < 0)
  2972. return idx;
  2973. aux_pcm_tx_cfg[idx].bit_format =
  2974. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2975. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2976. idx, aux_pcm_tx_cfg[idx].bit_format,
  2977. ucontrol->value.enumerated.item[0]);
  2978. return 0;
  2979. }
  2980. static int msm_hifi_ctrl(struct snd_soc_codec *codec)
  2981. {
  2982. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  2983. struct snd_soc_card *card = codec->component.card;
  2984. struct msm_asoc_mach_data *pdata =
  2985. snd_soc_card_get_drvdata(card);
  2986. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n", __func__,
  2987. msm_hifi_control);
  2988. if (!pdata || !pdata->hph_en1_gpio_p) {
  2989. dev_err(codec->dev, "%s: hph_en1_gpio is invalid\n", __func__);
  2990. return -EINVAL;
  2991. }
  2992. if (msm_hifi_control == MSM_HIFI_ON) {
  2993. msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
  2994. /* 5msec delay needed as per HW requirement */
  2995. usleep_range(5000, 5010);
  2996. } else {
  2997. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
  2998. }
  2999. snd_soc_dapm_sync(dapm);
  3000. return 0;
  3001. }
  3002. static int msm_hifi_get(struct snd_kcontrol *kcontrol,
  3003. struct snd_ctl_elem_value *ucontrol)
  3004. {
  3005. pr_debug("%s: msm_hifi_control = %d\n",
  3006. __func__, msm_hifi_control);
  3007. ucontrol->value.integer.value[0] = msm_hifi_control;
  3008. return 0;
  3009. }
  3010. static int msm_hifi_put(struct snd_kcontrol *kcontrol,
  3011. struct snd_ctl_elem_value *ucontrol)
  3012. {
  3013. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  3014. dev_dbg(codec->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  3015. __func__, ucontrol->value.integer.value[0]);
  3016. msm_hifi_control = ucontrol->value.integer.value[0];
  3017. msm_hifi_ctrl(codec);
  3018. return 0;
  3019. }
  3020. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  3021. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  3022. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3023. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  3024. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3025. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  3026. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3027. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  3028. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3029. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  3030. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3031. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  3032. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3033. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  3034. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3035. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  3036. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3037. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  3038. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3039. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  3040. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3041. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  3042. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3043. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  3044. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3045. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  3046. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3047. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  3048. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3049. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  3050. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3051. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  3052. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3053. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  3054. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3055. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  3056. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3057. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  3058. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3059. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  3060. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3061. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  3062. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3063. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  3064. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3065. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  3066. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3067. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  3068. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3069. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  3070. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3071. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  3072. wsa_cdc_dma_rx_0_sample_rate,
  3073. cdc_dma_rx_sample_rate_get,
  3074. cdc_dma_rx_sample_rate_put),
  3075. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  3076. wsa_cdc_dma_rx_1_sample_rate,
  3077. cdc_dma_rx_sample_rate_get,
  3078. cdc_dma_rx_sample_rate_put),
  3079. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  3080. rx_cdc_dma_rx_0_sample_rate,
  3081. cdc_dma_rx_sample_rate_get,
  3082. cdc_dma_rx_sample_rate_put),
  3083. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  3084. rx_cdc_dma_rx_1_sample_rate,
  3085. cdc_dma_rx_sample_rate_get,
  3086. cdc_dma_rx_sample_rate_put),
  3087. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  3088. rx_cdc_dma_rx_2_sample_rate,
  3089. cdc_dma_rx_sample_rate_get,
  3090. cdc_dma_rx_sample_rate_put),
  3091. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  3092. rx_cdc_dma_rx_3_sample_rate,
  3093. cdc_dma_rx_sample_rate_get,
  3094. cdc_dma_rx_sample_rate_put),
  3095. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  3096. rx_cdc_dma_rx_5_sample_rate,
  3097. cdc_dma_rx_sample_rate_get,
  3098. cdc_dma_rx_sample_rate_put),
  3099. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  3100. wsa_cdc_dma_tx_0_sample_rate,
  3101. cdc_dma_tx_sample_rate_get,
  3102. cdc_dma_tx_sample_rate_put),
  3103. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  3104. wsa_cdc_dma_tx_1_sample_rate,
  3105. cdc_dma_tx_sample_rate_get,
  3106. cdc_dma_tx_sample_rate_put),
  3107. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  3108. wsa_cdc_dma_tx_2_sample_rate,
  3109. cdc_dma_tx_sample_rate_get,
  3110. cdc_dma_tx_sample_rate_put),
  3111. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  3112. tx_cdc_dma_tx_0_sample_rate,
  3113. cdc_dma_tx_sample_rate_get,
  3114. cdc_dma_tx_sample_rate_put),
  3115. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  3116. tx_cdc_dma_tx_3_sample_rate,
  3117. cdc_dma_tx_sample_rate_get,
  3118. cdc_dma_tx_sample_rate_put),
  3119. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  3120. tx_cdc_dma_tx_4_sample_rate,
  3121. cdc_dma_tx_sample_rate_get,
  3122. cdc_dma_tx_sample_rate_put),
  3123. };
  3124. static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
  3125. SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
  3126. slim_rx_ch_get, slim_rx_ch_put),
  3127. SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
  3128. slim_rx_ch_get, slim_rx_ch_put),
  3129. SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
  3130. slim_tx_ch_get, slim_tx_ch_put),
  3131. SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
  3132. slim_tx_ch_get, slim_tx_ch_put),
  3133. SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
  3134. slim_rx_ch_get, slim_rx_ch_put),
  3135. SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
  3136. slim_rx_ch_get, slim_rx_ch_put),
  3137. SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
  3138. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3139. SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
  3140. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3141. SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
  3142. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3143. SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
  3144. slim_tx_bit_format_get, slim_tx_bit_format_put),
  3145. SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
  3146. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3147. SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
  3148. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3149. SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
  3150. slim_tx_sample_rate_get, slim_tx_sample_rate_put),
  3151. SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
  3152. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3153. SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
  3154. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3155. };
  3156. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  3157. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  3158. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  3159. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  3160. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  3161. SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
  3162. ext_disp_rx_ch_get, ext_disp_rx_ch_put),
  3163. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  3164. proxy_rx_ch_get, proxy_rx_ch_put),
  3165. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  3166. usb_audio_rx_format_get, usb_audio_rx_format_put),
  3167. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  3168. usb_audio_tx_format_get, usb_audio_tx_format_put),
  3169. SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
  3170. ext_disp_rx_format_get, ext_disp_rx_format_put),
  3171. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  3172. usb_audio_rx_sample_rate_get,
  3173. usb_audio_rx_sample_rate_put),
  3174. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  3175. usb_audio_tx_sample_rate_get,
  3176. usb_audio_tx_sample_rate_put),
  3177. SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
  3178. ext_disp_rx_sample_rate_get,
  3179. ext_disp_rx_sample_rate_put),
  3180. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3181. tdm_rx_sample_rate_get,
  3182. tdm_rx_sample_rate_put),
  3183. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3184. tdm_tx_sample_rate_get,
  3185. tdm_tx_sample_rate_put),
  3186. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  3187. tdm_rx_format_get,
  3188. tdm_rx_format_put),
  3189. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  3190. tdm_tx_format_get,
  3191. tdm_tx_format_put),
  3192. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  3193. tdm_rx_ch_get,
  3194. tdm_rx_ch_put),
  3195. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  3196. tdm_tx_ch_get,
  3197. tdm_tx_ch_put),
  3198. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3199. tdm_rx_sample_rate_get,
  3200. tdm_rx_sample_rate_put),
  3201. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3202. tdm_tx_sample_rate_get,
  3203. tdm_tx_sample_rate_put),
  3204. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  3205. tdm_rx_format_get,
  3206. tdm_rx_format_put),
  3207. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  3208. tdm_tx_format_get,
  3209. tdm_tx_format_put),
  3210. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  3211. tdm_rx_ch_get,
  3212. tdm_rx_ch_put),
  3213. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  3214. tdm_tx_ch_get,
  3215. tdm_tx_ch_put),
  3216. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3217. tdm_rx_sample_rate_get,
  3218. tdm_rx_sample_rate_put),
  3219. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3220. tdm_tx_sample_rate_get,
  3221. tdm_tx_sample_rate_put),
  3222. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  3223. tdm_rx_format_get,
  3224. tdm_rx_format_put),
  3225. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  3226. tdm_tx_format_get,
  3227. tdm_tx_format_put),
  3228. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  3229. tdm_rx_ch_get,
  3230. tdm_rx_ch_put),
  3231. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  3232. tdm_tx_ch_get,
  3233. tdm_tx_ch_put),
  3234. SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3235. tdm_rx_sample_rate_get,
  3236. tdm_rx_sample_rate_put),
  3237. SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3238. tdm_tx_sample_rate_get,
  3239. tdm_tx_sample_rate_put),
  3240. SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
  3241. tdm_rx_format_get,
  3242. tdm_rx_format_put),
  3243. SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
  3244. tdm_tx_format_get,
  3245. tdm_tx_format_put),
  3246. SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
  3247. tdm_rx_ch_get,
  3248. tdm_rx_ch_put),
  3249. SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
  3250. tdm_tx_ch_get,
  3251. tdm_tx_ch_put),
  3252. SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3253. tdm_rx_sample_rate_get,
  3254. tdm_rx_sample_rate_put),
  3255. SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3256. tdm_tx_sample_rate_get,
  3257. tdm_tx_sample_rate_put),
  3258. SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
  3259. tdm_rx_format_get,
  3260. tdm_rx_format_put),
  3261. SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
  3262. tdm_tx_format_get,
  3263. tdm_tx_format_put),
  3264. SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
  3265. tdm_rx_ch_get,
  3266. tdm_rx_ch_put),
  3267. SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
  3268. tdm_tx_ch_get,
  3269. tdm_tx_ch_put),
  3270. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  3271. aux_pcm_rx_sample_rate_get,
  3272. aux_pcm_rx_sample_rate_put),
  3273. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  3274. aux_pcm_rx_sample_rate_get,
  3275. aux_pcm_rx_sample_rate_put),
  3276. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  3277. aux_pcm_rx_sample_rate_get,
  3278. aux_pcm_rx_sample_rate_put),
  3279. SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
  3280. aux_pcm_rx_sample_rate_get,
  3281. aux_pcm_rx_sample_rate_put),
  3282. SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
  3283. aux_pcm_rx_sample_rate_get,
  3284. aux_pcm_rx_sample_rate_put),
  3285. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  3286. aux_pcm_tx_sample_rate_get,
  3287. aux_pcm_tx_sample_rate_put),
  3288. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  3289. aux_pcm_tx_sample_rate_get,
  3290. aux_pcm_tx_sample_rate_put),
  3291. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  3292. aux_pcm_tx_sample_rate_get,
  3293. aux_pcm_tx_sample_rate_put),
  3294. SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
  3295. aux_pcm_tx_sample_rate_get,
  3296. aux_pcm_tx_sample_rate_put),
  3297. SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
  3298. aux_pcm_tx_sample_rate_get,
  3299. aux_pcm_tx_sample_rate_put),
  3300. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  3301. mi2s_rx_sample_rate_get,
  3302. mi2s_rx_sample_rate_put),
  3303. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  3304. mi2s_rx_sample_rate_get,
  3305. mi2s_rx_sample_rate_put),
  3306. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  3307. mi2s_rx_sample_rate_get,
  3308. mi2s_rx_sample_rate_put),
  3309. SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
  3310. mi2s_rx_sample_rate_get,
  3311. mi2s_rx_sample_rate_put),
  3312. SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
  3313. mi2s_rx_sample_rate_get,
  3314. mi2s_rx_sample_rate_put),
  3315. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  3316. mi2s_tx_sample_rate_get,
  3317. mi2s_tx_sample_rate_put),
  3318. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  3319. mi2s_tx_sample_rate_get,
  3320. mi2s_tx_sample_rate_put),
  3321. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  3322. mi2s_tx_sample_rate_get,
  3323. mi2s_tx_sample_rate_put),
  3324. SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
  3325. mi2s_tx_sample_rate_get,
  3326. mi2s_tx_sample_rate_put),
  3327. SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
  3328. mi2s_tx_sample_rate_get,
  3329. mi2s_tx_sample_rate_put),
  3330. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  3331. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3332. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  3333. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3334. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  3335. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3336. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  3337. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3338. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  3339. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3340. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  3341. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3342. SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
  3343. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3344. SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
  3345. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3346. SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
  3347. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3348. SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
  3349. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3350. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  3351. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3352. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  3353. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3354. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  3355. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3356. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  3357. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3358. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  3359. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3360. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  3361. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3362. SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
  3363. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3364. SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
  3365. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3366. SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
  3367. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3368. SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
  3369. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3370. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  3371. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3372. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  3373. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3374. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  3375. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3376. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  3377. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3378. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3379. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3380. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3381. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3382. SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3383. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3384. SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3385. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3386. SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
  3387. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3388. SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
  3389. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3390. SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
  3391. msm_hifi_put),
  3392. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  3393. msm_bt_sample_rate_get,
  3394. msm_bt_sample_rate_put),
  3395. SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
  3396. msm_bt_sample_rate_rx_get,
  3397. msm_bt_sample_rate_rx_put),
  3398. SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
  3399. msm_bt_sample_rate_tx_get,
  3400. msm_bt_sample_rate_tx_put),
  3401. SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
  3402. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  3403. };
  3404. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  3405. int enable, bool dapm)
  3406. {
  3407. int ret = 0;
  3408. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3409. ret = tavil_cdc_mclk_enable(codec, enable);
  3410. } else {
  3411. dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
  3412. __func__);
  3413. ret = -EINVAL;
  3414. }
  3415. return ret;
  3416. }
  3417. static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
  3418. int enable, bool dapm)
  3419. {
  3420. int ret = 0;
  3421. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3422. ret = tavil_cdc_mclk_tx_enable(codec, enable);
  3423. } else {
  3424. dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
  3425. __func__);
  3426. ret = -EINVAL;
  3427. }
  3428. return ret;
  3429. }
  3430. static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
  3431. struct snd_kcontrol *kcontrol, int event)
  3432. {
  3433. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3434. pr_debug("%s: event = %d\n", __func__, event);
  3435. switch (event) {
  3436. case SND_SOC_DAPM_PRE_PMU:
  3437. return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
  3438. case SND_SOC_DAPM_POST_PMD:
  3439. return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
  3440. }
  3441. return 0;
  3442. }
  3443. static int msm_mclk_event(struct snd_soc_dapm_widget *w,
  3444. struct snd_kcontrol *kcontrol, int event)
  3445. {
  3446. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3447. pr_debug("%s: event = %d\n", __func__, event);
  3448. switch (event) {
  3449. case SND_SOC_DAPM_PRE_PMU:
  3450. return msm_snd_enable_codec_ext_clk(codec, 1, true);
  3451. case SND_SOC_DAPM_POST_PMD:
  3452. return msm_snd_enable_codec_ext_clk(codec, 0, true);
  3453. }
  3454. return 0;
  3455. }
  3456. static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
  3457. struct snd_kcontrol *k, int event)
  3458. {
  3459. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3460. struct snd_soc_card *card = codec->component.card;
  3461. struct msm_asoc_mach_data *pdata =
  3462. snd_soc_card_get_drvdata(card);
  3463. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n",
  3464. __func__, msm_hifi_control);
  3465. if (!pdata || !pdata->hph_en0_gpio_p) {
  3466. dev_err(codec->dev, "%s: hph_en0_gpio is invalid\n", __func__);
  3467. return -EINVAL;
  3468. }
  3469. if (msm_hifi_control != MSM_HIFI_ON) {
  3470. dev_dbg(codec->dev, "%s: HiFi mixer control is not set\n",
  3471. __func__);
  3472. return 0;
  3473. }
  3474. switch (event) {
  3475. case SND_SOC_DAPM_POST_PMU:
  3476. msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
  3477. break;
  3478. case SND_SOC_DAPM_PRE_PMD:
  3479. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
  3480. break;
  3481. }
  3482. return 0;
  3483. }
  3484. static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
  3485. SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
  3486. msm_mclk_event,
  3487. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3488. SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
  3489. msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3490. SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
  3491. SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
  3492. SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
  3493. SND_SOC_DAPM_MIC("Handset Mic", NULL),
  3494. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  3495. SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
  3496. SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
  3497. SND_SOC_DAPM_MIC("Analog Mic5", NULL),
  3498. SND_SOC_DAPM_MIC("Digital Mic0", NULL),
  3499. SND_SOC_DAPM_MIC("Digital Mic1", NULL),
  3500. SND_SOC_DAPM_MIC("Digital Mic2", NULL),
  3501. SND_SOC_DAPM_MIC("Digital Mic3", NULL),
  3502. SND_SOC_DAPM_MIC("Digital Mic4", NULL),
  3503. SND_SOC_DAPM_MIC("Digital Mic5", NULL),
  3504. };
  3505. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  3506. struct snd_kcontrol *kcontrol, int event)
  3507. {
  3508. struct msm_asoc_mach_data *pdata = NULL;
  3509. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3510. int ret = 0;
  3511. u32 dmic_idx;
  3512. int *dmic_gpio_cnt;
  3513. struct device_node *dmic_gpio;
  3514. char *wname;
  3515. wname = strpbrk(w->name, "0123");
  3516. if (!wname) {
  3517. dev_err(codec->dev, "%s: widget not found\n", __func__);
  3518. return -EINVAL;
  3519. }
  3520. ret = kstrtouint(wname, 10, &dmic_idx);
  3521. if (ret < 0) {
  3522. dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
  3523. __func__);
  3524. return -EINVAL;
  3525. }
  3526. pdata = snd_soc_card_get_drvdata(codec->component.card);
  3527. switch (dmic_idx) {
  3528. case 0:
  3529. case 1:
  3530. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3531. dmic_gpio = pdata->dmic01_gpio_p;
  3532. break;
  3533. case 2:
  3534. case 3:
  3535. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3536. dmic_gpio = pdata->dmic23_gpio_p;
  3537. break;
  3538. default:
  3539. dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
  3540. __func__);
  3541. return -EINVAL;
  3542. }
  3543. dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3544. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3545. switch (event) {
  3546. case SND_SOC_DAPM_PRE_PMU:
  3547. (*dmic_gpio_cnt)++;
  3548. if (*dmic_gpio_cnt == 1) {
  3549. ret = msm_cdc_pinctrl_select_active_state(
  3550. dmic_gpio);
  3551. if (ret < 0) {
  3552. pr_err("%s: gpio set cannot be activated %sd",
  3553. __func__, "dmic_gpio");
  3554. return ret;
  3555. }
  3556. }
  3557. break;
  3558. case SND_SOC_DAPM_POST_PMD:
  3559. (*dmic_gpio_cnt)--;
  3560. if (*dmic_gpio_cnt == 0) {
  3561. ret = msm_cdc_pinctrl_select_sleep_state(
  3562. dmic_gpio);
  3563. if (ret < 0) {
  3564. pr_err("%s: gpio set cannot be de-activated %sd",
  3565. __func__, "dmic_gpio");
  3566. return ret;
  3567. }
  3568. }
  3569. break;
  3570. default:
  3571. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3572. return -EINVAL;
  3573. }
  3574. return 0;
  3575. }
  3576. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3577. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3578. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3579. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3580. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3581. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3582. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3583. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3584. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3585. };
  3586. static inline int param_is_mask(int p)
  3587. {
  3588. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  3589. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  3590. }
  3591. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  3592. int n)
  3593. {
  3594. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  3595. }
  3596. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  3597. unsigned int bit)
  3598. {
  3599. if (bit >= SNDRV_MASK_MAX)
  3600. return;
  3601. if (param_is_mask(n)) {
  3602. struct snd_mask *m = param_to_mask(p, n);
  3603. m->bits[0] = 0;
  3604. m->bits[1] = 0;
  3605. m->bits[bit >> 5] |= (1 << (bit & 31));
  3606. }
  3607. }
  3608. static int msm_slim_get_ch_from_beid(int32_t be_id)
  3609. {
  3610. int ch_id = 0;
  3611. switch (be_id) {
  3612. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3613. ch_id = SLIM_RX_0;
  3614. break;
  3615. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3616. ch_id = SLIM_RX_1;
  3617. break;
  3618. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3619. ch_id = SLIM_RX_2;
  3620. break;
  3621. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3622. ch_id = SLIM_RX_3;
  3623. break;
  3624. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3625. ch_id = SLIM_RX_4;
  3626. break;
  3627. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3628. ch_id = SLIM_RX_6;
  3629. break;
  3630. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3631. ch_id = SLIM_TX_0;
  3632. break;
  3633. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3634. ch_id = SLIM_TX_3;
  3635. break;
  3636. default:
  3637. ch_id = SLIM_RX_0;
  3638. break;
  3639. }
  3640. return ch_id;
  3641. }
  3642. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  3643. {
  3644. int idx = 0;
  3645. switch (be_id) {
  3646. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3647. idx = WSA_CDC_DMA_RX_0;
  3648. break;
  3649. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3650. idx = WSA_CDC_DMA_TX_0;
  3651. break;
  3652. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3653. idx = WSA_CDC_DMA_RX_1;
  3654. break;
  3655. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3656. idx = WSA_CDC_DMA_TX_1;
  3657. break;
  3658. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3659. idx = WSA_CDC_DMA_TX_2;
  3660. break;
  3661. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3662. idx = RX_CDC_DMA_RX_0;
  3663. break;
  3664. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3665. idx = RX_CDC_DMA_RX_1;
  3666. break;
  3667. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3668. idx = RX_CDC_DMA_RX_2;
  3669. break;
  3670. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3671. idx = RX_CDC_DMA_RX_3;
  3672. break;
  3673. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  3674. idx = RX_CDC_DMA_RX_5;
  3675. break;
  3676. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3677. idx = TX_CDC_DMA_TX_0;
  3678. break;
  3679. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3680. idx = TX_CDC_DMA_TX_3;
  3681. break;
  3682. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3683. idx = TX_CDC_DMA_TX_4;
  3684. break;
  3685. default:
  3686. idx = RX_CDC_DMA_RX_0;
  3687. break;
  3688. }
  3689. return idx;
  3690. }
  3691. static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
  3692. {
  3693. int idx = -EINVAL;
  3694. switch (be_id) {
  3695. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3696. idx = DP_RX_IDX;
  3697. break;
  3698. default:
  3699. pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
  3700. idx = -EINVAL;
  3701. break;
  3702. }
  3703. return idx;
  3704. }
  3705. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  3706. struct snd_pcm_hw_params *params)
  3707. {
  3708. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3709. struct snd_interval *rate = hw_param_interval(params,
  3710. SNDRV_PCM_HW_PARAM_RATE);
  3711. struct snd_interval *channels = hw_param_interval(params,
  3712. SNDRV_PCM_HW_PARAM_CHANNELS);
  3713. int rc = 0;
  3714. int idx;
  3715. void *config = NULL;
  3716. struct snd_soc_codec *codec = NULL;
  3717. pr_debug("%s: format = %d, rate = %d\n",
  3718. __func__, params_format(params), params_rate(params));
  3719. switch (dai_link->id) {
  3720. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3721. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3722. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3723. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3724. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3725. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3726. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3727. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3728. slim_rx_cfg[idx].bit_format);
  3729. rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
  3730. channels->min = channels->max = slim_rx_cfg[idx].channels;
  3731. break;
  3732. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3733. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3734. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3735. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3736. slim_tx_cfg[idx].bit_format);
  3737. rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
  3738. channels->min = channels->max = slim_tx_cfg[idx].channels;
  3739. break;
  3740. case MSM_BACKEND_DAI_SLIMBUS_1_TX:
  3741. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3742. slim_tx_cfg[1].bit_format);
  3743. rate->min = rate->max = slim_tx_cfg[1].sample_rate;
  3744. channels->min = channels->max = slim_tx_cfg[1].channels;
  3745. break;
  3746. case MSM_BACKEND_DAI_SLIMBUS_4_TX:
  3747. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3748. SNDRV_PCM_FORMAT_S32_LE);
  3749. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3750. channels->min = channels->max = msm_vi_feed_tx_ch;
  3751. break;
  3752. case MSM_BACKEND_DAI_SLIMBUS_5_RX:
  3753. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3754. slim_rx_cfg[5].bit_format);
  3755. rate->min = rate->max = slim_rx_cfg[5].sample_rate;
  3756. channels->min = channels->max = slim_rx_cfg[5].channels;
  3757. break;
  3758. case MSM_BACKEND_DAI_SLIMBUS_5_TX:
  3759. codec = rtd->codec;
  3760. rate->min = rate->max = SAMPLING_RATE_16KHZ;
  3761. channels->min = channels->max = 1;
  3762. config = msm_codec_fn.get_afe_config_fn(codec,
  3763. AFE_SLIMBUS_SLAVE_PORT_CONFIG);
  3764. if (config) {
  3765. rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
  3766. config, SLIMBUS_5_TX);
  3767. if (rc)
  3768. pr_err("%s: Failed to set slimbus slave port config %d\n",
  3769. __func__, rc);
  3770. }
  3771. break;
  3772. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  3773. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3774. slim_rx_cfg[SLIM_RX_7].bit_format);
  3775. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  3776. channels->min = channels->max =
  3777. slim_rx_cfg[SLIM_RX_7].channels;
  3778. break;
  3779. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  3780. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  3781. channels->min = channels->max =
  3782. slim_tx_cfg[SLIM_TX_7].channels;
  3783. break;
  3784. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  3785. rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
  3786. channels->min = channels->max =
  3787. slim_tx_cfg[SLIM_TX_8].channels;
  3788. break;
  3789. case MSM_BACKEND_DAI_USB_RX:
  3790. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3791. usb_rx_cfg.bit_format);
  3792. rate->min = rate->max = usb_rx_cfg.sample_rate;
  3793. channels->min = channels->max = usb_rx_cfg.channels;
  3794. break;
  3795. case MSM_BACKEND_DAI_USB_TX:
  3796. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3797. usb_tx_cfg.bit_format);
  3798. rate->min = rate->max = usb_tx_cfg.sample_rate;
  3799. channels->min = channels->max = usb_tx_cfg.channels;
  3800. break;
  3801. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3802. idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
  3803. if (idx < 0) {
  3804. pr_err("%s: Incorrect ext disp idx %d\n",
  3805. __func__, idx);
  3806. rc = idx;
  3807. goto done;
  3808. }
  3809. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3810. ext_disp_rx_cfg[idx].bit_format);
  3811. rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
  3812. channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
  3813. break;
  3814. case MSM_BACKEND_DAI_AFE_PCM_RX:
  3815. channels->min = channels->max = proxy_rx_cfg.channels;
  3816. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3817. break;
  3818. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  3819. channels->min = channels->max =
  3820. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3821. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3822. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  3823. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  3824. break;
  3825. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  3826. channels->min = channels->max =
  3827. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3828. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3829. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  3830. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  3831. break;
  3832. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  3833. channels->min = channels->max =
  3834. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3835. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3836. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  3837. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  3838. break;
  3839. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  3840. channels->min = channels->max =
  3841. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3842. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3843. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  3844. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  3845. break;
  3846. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  3847. channels->min = channels->max =
  3848. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3849. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3850. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  3851. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  3852. break;
  3853. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  3854. channels->min = channels->max =
  3855. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3856. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3857. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  3858. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  3859. break;
  3860. case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
  3861. channels->min = channels->max =
  3862. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  3863. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3864. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  3865. rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3866. break;
  3867. case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
  3868. channels->min = channels->max =
  3869. tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  3870. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3871. tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
  3872. rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3873. break;
  3874. case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
  3875. channels->min = channels->max =
  3876. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  3877. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3878. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  3879. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3880. break;
  3881. case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
  3882. channels->min = channels->max =
  3883. tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  3884. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3885. tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
  3886. rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3887. break;
  3888. case MSM_BACKEND_DAI_AUXPCM_RX:
  3889. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3890. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  3891. rate->min = rate->max =
  3892. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  3893. channels->min = channels->max =
  3894. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  3895. break;
  3896. case MSM_BACKEND_DAI_AUXPCM_TX:
  3897. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3898. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  3899. rate->min = rate->max =
  3900. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  3901. channels->min = channels->max =
  3902. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  3903. break;
  3904. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  3905. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3906. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  3907. rate->min = rate->max =
  3908. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  3909. channels->min = channels->max =
  3910. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  3911. break;
  3912. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  3913. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3914. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  3915. rate->min = rate->max =
  3916. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  3917. channels->min = channels->max =
  3918. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  3919. break;
  3920. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  3921. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3922. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  3923. rate->min = rate->max =
  3924. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  3925. channels->min = channels->max =
  3926. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  3927. break;
  3928. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  3929. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3930. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  3931. rate->min = rate->max =
  3932. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  3933. channels->min = channels->max =
  3934. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  3935. break;
  3936. case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
  3937. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3938. aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
  3939. rate->min = rate->max =
  3940. aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
  3941. channels->min = channels->max =
  3942. aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
  3943. break;
  3944. case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
  3945. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3946. aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
  3947. rate->min = rate->max =
  3948. aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
  3949. channels->min = channels->max =
  3950. aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
  3951. break;
  3952. case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
  3953. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3954. aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
  3955. rate->min = rate->max =
  3956. aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
  3957. channels->min = channels->max =
  3958. aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
  3959. break;
  3960. case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
  3961. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3962. aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
  3963. rate->min = rate->max =
  3964. aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
  3965. channels->min = channels->max =
  3966. aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
  3967. break;
  3968. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  3969. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3970. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  3971. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  3972. channels->min = channels->max =
  3973. mi2s_rx_cfg[PRIM_MI2S].channels;
  3974. break;
  3975. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  3976. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3977. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  3978. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  3979. channels->min = channels->max =
  3980. mi2s_tx_cfg[PRIM_MI2S].channels;
  3981. break;
  3982. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  3983. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3984. mi2s_rx_cfg[SEC_MI2S].bit_format);
  3985. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  3986. channels->min = channels->max =
  3987. mi2s_rx_cfg[SEC_MI2S].channels;
  3988. break;
  3989. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  3990. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3991. mi2s_tx_cfg[SEC_MI2S].bit_format);
  3992. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  3993. channels->min = channels->max =
  3994. mi2s_tx_cfg[SEC_MI2S].channels;
  3995. break;
  3996. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  3997. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3998. mi2s_rx_cfg[TERT_MI2S].bit_format);
  3999. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  4000. channels->min = channels->max =
  4001. mi2s_rx_cfg[TERT_MI2S].channels;
  4002. break;
  4003. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4004. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4005. mi2s_tx_cfg[TERT_MI2S].bit_format);
  4006. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  4007. channels->min = channels->max =
  4008. mi2s_tx_cfg[TERT_MI2S].channels;
  4009. break;
  4010. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4011. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4012. mi2s_rx_cfg[QUAT_MI2S].bit_format);
  4013. rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
  4014. channels->min = channels->max =
  4015. mi2s_rx_cfg[QUAT_MI2S].channels;
  4016. break;
  4017. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4018. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4019. mi2s_tx_cfg[QUAT_MI2S].bit_format);
  4020. rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
  4021. channels->min = channels->max =
  4022. mi2s_tx_cfg[QUAT_MI2S].channels;
  4023. break;
  4024. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4025. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4026. mi2s_rx_cfg[QUIN_MI2S].bit_format);
  4027. rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
  4028. channels->min = channels->max =
  4029. mi2s_rx_cfg[QUIN_MI2S].channels;
  4030. break;
  4031. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4032. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4033. mi2s_tx_cfg[QUIN_MI2S].bit_format);
  4034. rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
  4035. channels->min = channels->max =
  4036. mi2s_tx_cfg[QUIN_MI2S].channels;
  4037. break;
  4038. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  4039. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  4040. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  4041. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  4042. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  4043. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4044. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4045. cdc_dma_rx_cfg[idx].bit_format);
  4046. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  4047. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  4048. break;
  4049. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  4050. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  4051. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  4052. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  4053. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  4054. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4055. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4056. cdc_dma_tx_cfg[idx].bit_format);
  4057. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  4058. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  4059. break;
  4060. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  4061. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4062. SNDRV_PCM_FORMAT_S32_LE);
  4063. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  4064. channels->min = channels->max = msm_vi_feed_tx_ch;
  4065. break;
  4066. default:
  4067. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  4068. break;
  4069. }
  4070. done:
  4071. return rc;
  4072. }
  4073. static bool msm_usbc_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  4074. {
  4075. struct snd_soc_card *card = codec->component.card;
  4076. struct msm_asoc_mach_data *pdata =
  4077. snd_soc_card_get_drvdata(card);
  4078. if (!pdata->fsa_handle)
  4079. return false;
  4080. return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
  4081. }
  4082. static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  4083. {
  4084. int value = 0;
  4085. bool ret = false;
  4086. struct snd_soc_card *card;
  4087. struct msm_asoc_mach_data *pdata;
  4088. if (!codec) {
  4089. pr_err("%s codec is NULL\n", __func__);
  4090. return false;
  4091. }
  4092. card = codec->component.card;
  4093. pdata = snd_soc_card_get_drvdata(card);
  4094. if (!pdata)
  4095. return false;
  4096. if (wcd_mbhc_cfg.enable_usbc_analog)
  4097. return msm_usbc_swap_gnd_mic(codec, active);
  4098. /* if usbc is not defined, swap using us_euro_gpio_p */
  4099. if (pdata->us_euro_gpio_p) {
  4100. value = msm_cdc_pinctrl_get_state(
  4101. pdata->us_euro_gpio_p);
  4102. if (value)
  4103. msm_cdc_pinctrl_select_sleep_state(
  4104. pdata->us_euro_gpio_p);
  4105. else
  4106. msm_cdc_pinctrl_select_active_state(
  4107. pdata->us_euro_gpio_p);
  4108. dev_dbg(codec->dev, "%s: swap select switch %d to %d\n",
  4109. __func__, value, !value);
  4110. ret = true;
  4111. }
  4112. return ret;
  4113. }
  4114. static int msm_afe_set_config(struct snd_soc_codec *codec)
  4115. {
  4116. int ret = 0;
  4117. void *config_data = NULL;
  4118. if (!msm_codec_fn.get_afe_config_fn) {
  4119. dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
  4120. __func__);
  4121. return -EINVAL;
  4122. }
  4123. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4124. AFE_CDC_REGISTERS_CONFIG);
  4125. if (config_data) {
  4126. ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
  4127. if (ret) {
  4128. dev_err(codec->dev,
  4129. "%s: Failed to set codec registers config %d\n",
  4130. __func__, ret);
  4131. return ret;
  4132. }
  4133. }
  4134. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4135. AFE_CDC_REGISTER_PAGE_CONFIG);
  4136. if (config_data) {
  4137. ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
  4138. 0);
  4139. if (ret)
  4140. dev_err(codec->dev,
  4141. "%s: Failed to set cdc register page config\n",
  4142. __func__);
  4143. }
  4144. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4145. AFE_SLIMBUS_SLAVE_CONFIG);
  4146. if (config_data) {
  4147. ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
  4148. if (ret) {
  4149. dev_err(codec->dev,
  4150. "%s: Failed to set slimbus slave config %d\n",
  4151. __func__, ret);
  4152. return ret;
  4153. }
  4154. }
  4155. return 0;
  4156. }
  4157. static void msm_afe_clear_config(void)
  4158. {
  4159. afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
  4160. afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
  4161. }
  4162. static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
  4163. {
  4164. int ret = 0;
  4165. void *config_data;
  4166. struct snd_soc_codec *codec = rtd->codec;
  4167. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4168. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4169. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4170. struct snd_soc_component *aux_comp;
  4171. struct snd_card *card;
  4172. struct snd_info_entry *entry;
  4173. struct msm_asoc_mach_data *pdata =
  4174. snd_soc_card_get_drvdata(rtd->card);
  4175. /*
  4176. * Codec SLIMBUS configuration
  4177. * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
  4178. * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
  4179. * TX14, TX15, TX16
  4180. */
  4181. unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
  4182. 150, 151};
  4183. unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
  4184. 134, 135, 136, 137, 138, 139,
  4185. 140, 141, 142, 143};
  4186. pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
  4187. rtd->pmdown_time = 0;
  4188. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  4189. ARRAY_SIZE(msm_tavil_snd_controls));
  4190. if (ret < 0) {
  4191. pr_err("%s: add_codec_controls failed, err %d\n",
  4192. __func__, ret);
  4193. return ret;
  4194. }
  4195. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4196. ARRAY_SIZE(msm_common_snd_controls));
  4197. if (ret < 0) {
  4198. pr_err("%s: add_codec_controls failed, err %d\n",
  4199. __func__, ret);
  4200. return ret;
  4201. }
  4202. snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
  4203. ARRAY_SIZE(msm_dapm_widgets_tavil));
  4204. snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
  4205. ARRAY_SIZE(wcd_audio_paths_tavil));
  4206. snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
  4207. snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
  4208. snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
  4209. snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
  4210. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4211. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4212. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4213. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4214. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
  4215. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
  4216. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
  4217. snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
  4218. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
  4219. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
  4220. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
  4221. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  4222. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
  4223. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
  4224. snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
  4225. snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
  4226. snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
  4227. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  4228. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  4229. snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
  4230. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
  4231. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
  4232. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
  4233. snd_soc_dapm_sync(dapm);
  4234. snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4235. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4236. msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
  4237. ret = msm_afe_set_config(codec);
  4238. if (ret) {
  4239. pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
  4240. goto err;
  4241. }
  4242. pdata->is_afe_config_done = true;
  4243. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4244. AFE_AANC_VERSION);
  4245. if (config_data) {
  4246. ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
  4247. if (ret) {
  4248. pr_err("%s: Failed to set aanc version %d\n",
  4249. __func__, ret);
  4250. goto err;
  4251. }
  4252. }
  4253. /*
  4254. * Send speaker configuration only for WSA8810.
  4255. * Default configuration is for WSA8815.
  4256. */
  4257. pr_debug("%s: Number of aux devices: %d\n",
  4258. __func__, rtd->card->num_aux_devs);
  4259. if (rtd->card->num_aux_devs &&
  4260. !list_empty(&rtd->card->aux_comp_list)) {
  4261. aux_comp = list_first_entry(&rtd->card->aux_comp_list,
  4262. struct snd_soc_component, card_aux_list);
  4263. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4264. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4265. tavil_set_spkr_mode(rtd->codec, WCD934X_SPKR_MODE_1);
  4266. tavil_set_spkr_gain_offset(rtd->codec,
  4267. WCD934X_RX_GAIN_OFFSET_M1P5_DB);
  4268. }
  4269. }
  4270. card = rtd->card->snd_card;
  4271. entry = snd_info_create_subdir(card->module, "codecs",
  4272. card->proc_root);
  4273. if (!entry) {
  4274. pr_debug("%s: Cannot create codecs module entry\n",
  4275. __func__);
  4276. ret = 0;
  4277. goto err;
  4278. }
  4279. pdata->codec_root = entry;
  4280. tavil_codec_info_create_codec_entry(pdata->codec_root, codec);
  4281. codec_reg_done = true;
  4282. return 0;
  4283. err:
  4284. return ret;
  4285. }
  4286. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  4287. {
  4288. int ret = 0;
  4289. struct snd_soc_codec *codec = rtd->codec;
  4290. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4291. struct snd_card *card;
  4292. struct snd_info_entry *entry;
  4293. struct snd_soc_component *aux_comp;
  4294. struct msm_asoc_mach_data *pdata =
  4295. snd_soc_card_get_drvdata(rtd->card);
  4296. ret = snd_soc_add_codec_controls(codec, msm_int_snd_controls,
  4297. ARRAY_SIZE(msm_int_snd_controls));
  4298. if (ret < 0) {
  4299. pr_err("%s: add_codec_controls failed: %d\n",
  4300. __func__, ret);
  4301. return ret;
  4302. }
  4303. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4304. ARRAY_SIZE(msm_common_snd_controls));
  4305. if (ret < 0) {
  4306. pr_err("%s: add common snd controls failed: %d\n",
  4307. __func__, ret);
  4308. return ret;
  4309. }
  4310. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  4311. ARRAY_SIZE(msm_int_dapm_widgets));
  4312. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4313. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4314. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4315. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4316. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  4317. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  4318. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  4319. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  4320. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  4321. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  4322. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  4323. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  4324. snd_soc_dapm_sync(dapm);
  4325. /*
  4326. * Send speaker configuration only for WSA8810.
  4327. * Default configuration is for WSA8815.
  4328. */
  4329. dev_dbg(codec->dev, "%s: Number of aux devices: %d\n",
  4330. __func__, rtd->card->num_aux_devs);
  4331. if (rtd->card->num_aux_devs &&
  4332. !list_empty(&rtd->card->component_dev_list)) {
  4333. aux_comp = list_first_entry(
  4334. &rtd->card->component_dev_list,
  4335. struct snd_soc_component,
  4336. card_aux_list);
  4337. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4338. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4339. wsa_macro_set_spkr_mode(rtd->codec,
  4340. WSA_MACRO_SPKR_MODE_1);
  4341. wsa_macro_set_spkr_gain_offset(rtd->codec,
  4342. WSA_MACRO_GAIN_OFFSET_M1P5_DB);
  4343. }
  4344. }
  4345. card = rtd->card->snd_card;
  4346. if (!pdata->codec_root) {
  4347. entry = snd_info_create_subdir(card->module, "codecs",
  4348. card->proc_root);
  4349. if (!entry) {
  4350. pr_debug("%s: Cannot create codecs module entry\n",
  4351. __func__);
  4352. ret = 0;
  4353. goto err;
  4354. }
  4355. pdata->codec_root = entry;
  4356. }
  4357. bolero_info_create_codec_entry(pdata->codec_root, codec);
  4358. /*
  4359. * SM6150 MSM 1.0 doesn't have hardware wake up interrupt line
  4360. * from AOSS to APSS. So, it uses SW workaround and listens to
  4361. * interrupt from AFE over IPC.
  4362. * Check for MSM version and MSM ID and register wake irq
  4363. * accordingly to provide compatibility to all chipsets.
  4364. */
  4365. if (socinfo_get_id() == SM6150_SOC_MSM_ID &&
  4366. socinfo_get_version() == SM6150_SOC_VERSION_1_0)
  4367. bolero_register_wake_irq(codec, true);
  4368. else
  4369. bolero_register_wake_irq(codec, false);
  4370. codec_reg_done = true;
  4371. return 0;
  4372. err:
  4373. return ret;
  4374. }
  4375. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  4376. {
  4377. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  4378. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
  4379. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4380. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4381. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4382. }
  4383. static void *def_wcd_mbhc_cal(void)
  4384. {
  4385. void *wcd_mbhc_cal;
  4386. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  4387. u16 *btn_high;
  4388. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  4389. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  4390. if (!wcd_mbhc_cal)
  4391. return NULL;
  4392. #define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
  4393. S(v_hs_max, 1600);
  4394. #undef S
  4395. #define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
  4396. S(num_btn, WCD_MBHC_DEF_BUTTONS);
  4397. #undef S
  4398. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  4399. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  4400. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  4401. btn_high[0] = 75;
  4402. btn_high[1] = 150;
  4403. btn_high[2] = 237;
  4404. btn_high[3] = 500;
  4405. btn_high[4] = 500;
  4406. btn_high[5] = 500;
  4407. btn_high[6] = 500;
  4408. btn_high[7] = 500;
  4409. return wcd_mbhc_cal;
  4410. }
  4411. static int msm_snd_hw_params(struct snd_pcm_substream *substream,
  4412. struct snd_pcm_hw_params *params)
  4413. {
  4414. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4415. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4416. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4417. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4418. int ret = 0;
  4419. u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4420. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4421. u32 user_set_tx_ch = 0;
  4422. u32 rx_ch_count;
  4423. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4424. ret = snd_soc_dai_get_channel_map(codec_dai,
  4425. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4426. if (ret < 0) {
  4427. pr_err("%s: failed to get codec chan map, err:%d\n",
  4428. __func__, ret);
  4429. goto err;
  4430. }
  4431. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
  4432. pr_debug("%s: rx_5_ch=%d\n", __func__,
  4433. slim_rx_cfg[5].channels);
  4434. rx_ch_count = slim_rx_cfg[5].channels;
  4435. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
  4436. pr_debug("%s: rx_2_ch=%d\n", __func__,
  4437. slim_rx_cfg[2].channels);
  4438. rx_ch_count = slim_rx_cfg[2].channels;
  4439. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
  4440. pr_debug("%s: rx_6_ch=%d\n", __func__,
  4441. slim_rx_cfg[6].channels);
  4442. rx_ch_count = slim_rx_cfg[6].channels;
  4443. } else {
  4444. pr_debug("%s: rx_0_ch=%d\n", __func__,
  4445. slim_rx_cfg[0].channels);
  4446. rx_ch_count = slim_rx_cfg[0].channels;
  4447. }
  4448. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4449. rx_ch_count, rx_ch);
  4450. if (ret < 0) {
  4451. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4452. __func__, ret);
  4453. goto err;
  4454. }
  4455. } else {
  4456. pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
  4457. codec_dai->name, codec_dai->id, user_set_tx_ch);
  4458. ret = snd_soc_dai_get_channel_map(codec_dai,
  4459. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4460. if (ret < 0) {
  4461. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4462. __func__, ret);
  4463. goto err;
  4464. }
  4465. /* For <codec>_tx1 case */
  4466. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
  4467. user_set_tx_ch = slim_tx_cfg[0].channels;
  4468. /* For <codec>_tx3 case */
  4469. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
  4470. user_set_tx_ch = slim_tx_cfg[1].channels;
  4471. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
  4472. user_set_tx_ch = msm_vi_feed_tx_ch;
  4473. else
  4474. user_set_tx_ch = tx_ch_cnt;
  4475. pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
  4476. __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
  4477. tx_ch_cnt, dai_link->id);
  4478. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4479. user_set_tx_ch, tx_ch, 0, 0);
  4480. if (ret < 0)
  4481. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4482. __func__, ret);
  4483. }
  4484. err:
  4485. return ret;
  4486. }
  4487. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  4488. struct snd_pcm_hw_params *params)
  4489. {
  4490. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4491. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4492. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4493. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4494. int ret = 0;
  4495. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  4496. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4497. u32 user_set_tx_ch = 0;
  4498. u32 user_set_rx_ch = 0;
  4499. u32 ch_id;
  4500. ret = snd_soc_dai_get_channel_map(codec_dai,
  4501. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  4502. &rx_ch_cdc_dma);
  4503. if (ret < 0) {
  4504. pr_err("%s: failed to get codec chan map, err:%d\n",
  4505. __func__, ret);
  4506. goto err;
  4507. }
  4508. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4509. switch (dai_link->id) {
  4510. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  4511. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  4512. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  4513. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  4514. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  4515. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  4516. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  4517. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  4518. {
  4519. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4520. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  4521. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  4522. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  4523. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4524. user_set_rx_ch, &rx_ch_cdc_dma);
  4525. if (ret < 0) {
  4526. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4527. __func__, ret);
  4528. goto err;
  4529. }
  4530. }
  4531. break;
  4532. }
  4533. } else {
  4534. switch (dai_link->id) {
  4535. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  4536. {
  4537. user_set_tx_ch = msm_vi_feed_tx_ch;
  4538. }
  4539. break;
  4540. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  4541. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  4542. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  4543. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  4544. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  4545. {
  4546. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4547. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  4548. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  4549. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  4550. }
  4551. break;
  4552. }
  4553. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  4554. &tx_ch_cdc_dma, 0, 0);
  4555. if (ret < 0) {
  4556. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4557. __func__, ret);
  4558. goto err;
  4559. }
  4560. }
  4561. err:
  4562. return ret;
  4563. }
  4564. static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
  4565. struct snd_pcm_hw_params *params)
  4566. {
  4567. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4568. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4569. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4570. unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4571. unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
  4572. unsigned int num_tx_ch = 0;
  4573. unsigned int num_rx_ch = 0;
  4574. int ret = 0;
  4575. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4576. num_rx_ch = params_channels(params);
  4577. pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
  4578. codec_dai->name, codec_dai->id, num_rx_ch);
  4579. ret = snd_soc_dai_get_channel_map(codec_dai,
  4580. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4581. if (ret < 0) {
  4582. pr_err("%s: failed to get codec chan map, err:%d\n",
  4583. __func__, ret);
  4584. goto err;
  4585. }
  4586. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4587. num_rx_ch, rx_ch);
  4588. if (ret < 0) {
  4589. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4590. __func__, ret);
  4591. goto err;
  4592. }
  4593. } else {
  4594. num_tx_ch = params_channels(params);
  4595. pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
  4596. codec_dai->name, codec_dai->id, num_tx_ch);
  4597. ret = snd_soc_dai_get_channel_map(codec_dai,
  4598. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4599. if (ret < 0) {
  4600. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4601. __func__, ret);
  4602. goto err;
  4603. }
  4604. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4605. num_tx_ch, tx_ch, 0, 0);
  4606. if (ret < 0) {
  4607. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4608. __func__, ret);
  4609. goto err;
  4610. }
  4611. }
  4612. err:
  4613. return ret;
  4614. }
  4615. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  4616. struct snd_pcm_hw_params *params)
  4617. {
  4618. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4619. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4620. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4621. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4622. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  4623. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4624. int ret;
  4625. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  4626. codec_dai->name, codec_dai->id);
  4627. ret = snd_soc_dai_get_channel_map(codec_dai,
  4628. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4629. if (ret) {
  4630. dev_err(rtd->dev,
  4631. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  4632. __func__, ret);
  4633. goto err;
  4634. }
  4635. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  4636. __func__, tx_ch_cnt, dai_link->id);
  4637. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4638. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  4639. if (ret)
  4640. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  4641. __func__, ret);
  4642. err:
  4643. return ret;
  4644. }
  4645. static int msm_get_port_id(int be_id)
  4646. {
  4647. int afe_port_id;
  4648. switch (be_id) {
  4649. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  4650. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  4651. break;
  4652. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  4653. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  4654. break;
  4655. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  4656. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  4657. break;
  4658. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  4659. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  4660. break;
  4661. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  4662. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  4663. break;
  4664. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4665. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  4666. break;
  4667. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4668. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
  4669. break;
  4670. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4671. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
  4672. break;
  4673. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4674. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
  4675. break;
  4676. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4677. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
  4678. break;
  4679. default:
  4680. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  4681. afe_port_id = -EINVAL;
  4682. }
  4683. return afe_port_id;
  4684. }
  4685. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  4686. {
  4687. u32 bit_per_sample;
  4688. switch (bit_format) {
  4689. case SNDRV_PCM_FORMAT_S32_LE:
  4690. case SNDRV_PCM_FORMAT_S24_3LE:
  4691. case SNDRV_PCM_FORMAT_S24_LE:
  4692. bit_per_sample = 32;
  4693. break;
  4694. case SNDRV_PCM_FORMAT_S16_LE:
  4695. default:
  4696. bit_per_sample = 16;
  4697. break;
  4698. }
  4699. return bit_per_sample;
  4700. }
  4701. static void update_mi2s_clk_val(int dai_id, int stream)
  4702. {
  4703. u32 bit_per_sample;
  4704. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4705. bit_per_sample =
  4706. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  4707. mi2s_clk[dai_id].clk_freq_in_hz =
  4708. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4709. } else {
  4710. bit_per_sample =
  4711. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  4712. mi2s_clk[dai_id].clk_freq_in_hz =
  4713. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4714. }
  4715. }
  4716. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  4717. {
  4718. int ret = 0;
  4719. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4720. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4721. int port_id = 0;
  4722. int index = cpu_dai->id;
  4723. port_id = msm_get_port_id(rtd->dai_link->id);
  4724. if (port_id < 0) {
  4725. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  4726. ret = port_id;
  4727. goto err;
  4728. }
  4729. if (enable) {
  4730. update_mi2s_clk_val(index, substream->stream);
  4731. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  4732. mi2s_clk[index].clk_freq_in_hz);
  4733. }
  4734. mi2s_clk[index].enable = enable;
  4735. ret = afe_set_lpass_clock_v2(port_id,
  4736. &mi2s_clk[index]);
  4737. if (ret < 0) {
  4738. dev_err(rtd->card->dev,
  4739. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  4740. __func__, port_id, ret);
  4741. goto err;
  4742. }
  4743. err:
  4744. return ret;
  4745. }
  4746. static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
  4747. enum pinctrl_pin_state new_state)
  4748. {
  4749. int ret = 0;
  4750. int curr_state = 0;
  4751. if (pinctrl_info == NULL) {
  4752. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4753. ret = -EINVAL;
  4754. goto err;
  4755. }
  4756. if (pinctrl_info->pinctrl == NULL) {
  4757. pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
  4758. ret = -EINVAL;
  4759. goto err;
  4760. }
  4761. curr_state = pinctrl_info->curr_state;
  4762. pinctrl_info->curr_state = new_state;
  4763. pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
  4764. pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
  4765. if (curr_state == pinctrl_info->curr_state) {
  4766. pr_debug("%s: Already in same state\n", __func__);
  4767. goto err;
  4768. }
  4769. if (curr_state != STATE_DISABLE &&
  4770. pinctrl_info->curr_state != STATE_DISABLE) {
  4771. pr_debug("%s: state already active cannot switch\n", __func__);
  4772. ret = -EIO;
  4773. goto err;
  4774. }
  4775. switch (pinctrl_info->curr_state) {
  4776. case STATE_MI2S_ACTIVE:
  4777. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4778. pinctrl_info->mi2s_active);
  4779. if (ret) {
  4780. pr_err("%s: MI2S state select failed with %d\n",
  4781. __func__, ret);
  4782. ret = -EIO;
  4783. goto err;
  4784. }
  4785. break;
  4786. case STATE_TDM_ACTIVE:
  4787. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4788. pinctrl_info->tdm_active);
  4789. if (ret) {
  4790. pr_err("%s: TDM state select failed with %d\n",
  4791. __func__, ret);
  4792. ret = -EIO;
  4793. goto err;
  4794. }
  4795. break;
  4796. case STATE_DISABLE:
  4797. if (curr_state == STATE_MI2S_ACTIVE) {
  4798. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4799. pinctrl_info->mi2s_disable);
  4800. } else {
  4801. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4802. pinctrl_info->tdm_disable);
  4803. }
  4804. if (ret) {
  4805. pr_err("%s: state disable failed with %d\n",
  4806. __func__, ret);
  4807. ret = -EIO;
  4808. goto err;
  4809. }
  4810. break;
  4811. default:
  4812. pr_err("%s: TLMM pin state is invalid\n", __func__);
  4813. return -EINVAL;
  4814. }
  4815. err:
  4816. return ret;
  4817. }
  4818. static int msm_get_pinctrl(struct platform_device *pdev)
  4819. {
  4820. struct snd_soc_card *card = platform_get_drvdata(pdev);
  4821. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4822. struct msm_pinctrl_info *pinctrl_info = NULL;
  4823. struct pinctrl *pinctrl;
  4824. int ret = 0;
  4825. pinctrl_info = &pdata->pinctrl_info;
  4826. if (pinctrl_info == NULL) {
  4827. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4828. return -EINVAL;
  4829. }
  4830. pinctrl = devm_pinctrl_get(&pdev->dev);
  4831. if (IS_ERR_OR_NULL(pinctrl)) {
  4832. pr_err("%s: Unable to get pinctrl handle\n", __func__);
  4833. return -EINVAL;
  4834. }
  4835. pinctrl_info->pinctrl = pinctrl;
  4836. /* get all the states handles from Device Tree */
  4837. pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
  4838. "quat-mi2s-sleep");
  4839. if (IS_ERR(pinctrl_info->mi2s_disable)) {
  4840. pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
  4841. goto err;
  4842. }
  4843. pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
  4844. "quat-mi2s-active");
  4845. if (IS_ERR(pinctrl_info->mi2s_active)) {
  4846. pr_err("%s: could not get mi2s_active pinstate\n", __func__);
  4847. goto err;
  4848. }
  4849. pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
  4850. "quat-tdm-sleep");
  4851. if (IS_ERR(pinctrl_info->tdm_disable)) {
  4852. pr_err("%s: could not get tdm_disable pinstate\n", __func__);
  4853. goto err;
  4854. }
  4855. pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
  4856. "quat-tdm-active");
  4857. if (IS_ERR(pinctrl_info->tdm_active)) {
  4858. pr_err("%s: could not get tdm_active pinstate\n",
  4859. __func__);
  4860. goto err;
  4861. }
  4862. /* Reset the TLMM pins to a default state */
  4863. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4864. pinctrl_info->mi2s_disable);
  4865. if (ret != 0) {
  4866. pr_err("%s: Disable TLMM pins failed with %d\n",
  4867. __func__, ret);
  4868. ret = -EIO;
  4869. goto err;
  4870. }
  4871. pinctrl_info->curr_state = STATE_DISABLE;
  4872. return 0;
  4873. err:
  4874. devm_pinctrl_put(pinctrl);
  4875. pinctrl_info->pinctrl = NULL;
  4876. return -EINVAL;
  4877. }
  4878. static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  4879. struct snd_pcm_hw_params *params)
  4880. {
  4881. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4882. struct snd_interval *rate = hw_param_interval(params,
  4883. SNDRV_PCM_HW_PARAM_RATE);
  4884. struct snd_interval *channels = hw_param_interval(params,
  4885. SNDRV_PCM_HW_PARAM_CHANNELS);
  4886. if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
  4887. channels->min = channels->max =
  4888. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4889. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4890. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  4891. rate->min = rate->max =
  4892. tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  4893. } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
  4894. channels->min = channels->max =
  4895. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4896. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4897. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  4898. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  4899. } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
  4900. channels->min = channels->max =
  4901. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4902. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4903. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  4904. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  4905. } else {
  4906. pr_err("%s: dai id 0x%x not supported\n",
  4907. __func__, cpu_dai->id);
  4908. return -EINVAL;
  4909. }
  4910. pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
  4911. __func__, cpu_dai->id, channels->max, rate->max,
  4912. params_format(params));
  4913. return 0;
  4914. }
  4915. static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  4916. struct snd_pcm_hw_params *params)
  4917. {
  4918. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4919. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4920. int ret = 0;
  4921. int slot_width = 32;
  4922. int channels, slots;
  4923. unsigned int slot_mask, rate, clk_freq;
  4924. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  4925. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  4926. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4927. switch (cpu_dai->id) {
  4928. case AFE_PORT_ID_PRIMARY_TDM_RX:
  4929. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  4930. break;
  4931. case AFE_PORT_ID_SECONDARY_TDM_RX:
  4932. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4933. break;
  4934. case AFE_PORT_ID_TERTIARY_TDM_RX:
  4935. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  4936. break;
  4937. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  4938. slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4939. break;
  4940. case AFE_PORT_ID_QUINARY_TDM_RX:
  4941. slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4942. break;
  4943. case AFE_PORT_ID_PRIMARY_TDM_TX:
  4944. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  4945. break;
  4946. case AFE_PORT_ID_SECONDARY_TDM_TX:
  4947. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  4948. break;
  4949. case AFE_PORT_ID_TERTIARY_TDM_TX:
  4950. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  4951. break;
  4952. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  4953. slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  4954. break;
  4955. case AFE_PORT_ID_QUINARY_TDM_TX:
  4956. slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  4957. break;
  4958. default:
  4959. pr_err("%s: dai id 0x%x not supported\n",
  4960. __func__, cpu_dai->id);
  4961. return -EINVAL;
  4962. }
  4963. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4964. /*2 slot config - bits 0 and 1 set for the first two slots */
  4965. slot_mask = 0x0000FFFF >> (16-slots);
  4966. channels = slots;
  4967. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  4968. __func__, slot_width, slots);
  4969. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  4970. slots, slot_width);
  4971. if (ret < 0) {
  4972. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  4973. __func__, ret);
  4974. goto end;
  4975. }
  4976. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4977. 0, NULL, channels, slot_offset);
  4978. if (ret < 0) {
  4979. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  4980. __func__, ret);
  4981. goto end;
  4982. }
  4983. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  4984. /*2 slot config - bits 0 and 1 set for the first two slots */
  4985. slot_mask = 0x0000FFFF >> (16-slots);
  4986. channels = slots;
  4987. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  4988. __func__, slot_width, slots);
  4989. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  4990. slots, slot_width);
  4991. if (ret < 0) {
  4992. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  4993. __func__, ret);
  4994. goto end;
  4995. }
  4996. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4997. channels, slot_offset, 0, NULL);
  4998. if (ret < 0) {
  4999. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  5000. __func__, ret);
  5001. goto end;
  5002. }
  5003. } else {
  5004. ret = -EINVAL;
  5005. pr_err("%s: invalid use case, err:%d\n",
  5006. __func__, ret);
  5007. goto end;
  5008. }
  5009. rate = params_rate(params);
  5010. clk_freq = rate * slot_width * slots;
  5011. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  5012. if (ret < 0)
  5013. pr_err("%s: failed to set tdm clk, err:%d\n",
  5014. __func__, ret);
  5015. end:
  5016. return ret;
  5017. }
  5018. static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
  5019. {
  5020. int ret = 0;
  5021. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5022. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5023. struct snd_soc_card *card = rtd->card;
  5024. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5025. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5026. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5027. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  5028. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  5029. ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
  5030. if (ret)
  5031. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  5032. __func__, ret);
  5033. }
  5034. return ret;
  5035. }
  5036. static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
  5037. {
  5038. int ret = 0;
  5039. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5040. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5041. struct snd_soc_card *card = rtd->card;
  5042. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5043. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5044. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5045. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  5046. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  5047. ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
  5048. if (ret)
  5049. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  5050. __func__, ret);
  5051. }
  5052. }
  5053. static struct snd_soc_ops sm6150_tdm_be_ops = {
  5054. .hw_params = sm6150_tdm_snd_hw_params,
  5055. .startup = sm6150_tdm_snd_startup,
  5056. .shutdown = sm6150_tdm_snd_shutdown
  5057. };
  5058. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  5059. {
  5060. cpumask_t mask;
  5061. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  5062. pm_qos_remove_request(&substream->latency_pm_qos_req);
  5063. cpumask_clear(&mask);
  5064. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  5065. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  5066. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  5067. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  5068. pm_qos_add_request(&substream->latency_pm_qos_req,
  5069. PM_QOS_CPU_DMA_LATENCY,
  5070. MSM_LL_QOS_VALUE);
  5071. return 0;
  5072. }
  5073. static struct snd_soc_ops msm_fe_qos_ops = {
  5074. .prepare = msm_fe_qos_prepare,
  5075. };
  5076. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  5077. {
  5078. int ret = 0;
  5079. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5080. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5081. int index = cpu_dai->id;
  5082. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  5083. struct snd_soc_card *card = rtd->card;
  5084. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5085. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5086. int ret_pinctrl = 0;
  5087. dev_dbg(rtd->card->dev,
  5088. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  5089. __func__, substream->name, substream->stream,
  5090. cpu_dai->name, cpu_dai->id);
  5091. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5092. ret = -EINVAL;
  5093. dev_err(rtd->card->dev,
  5094. "%s: CPU DAI id (%d) out of range\n",
  5095. __func__, cpu_dai->id);
  5096. goto err;
  5097. }
  5098. /*
  5099. * Mutex protection in case the same MI2S
  5100. * interface using for both TX and RX so
  5101. * that the same clock won't be enable twice.
  5102. */
  5103. mutex_lock(&mi2s_intf_conf[index].lock);
  5104. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  5105. /* Check if msm needs to provide the clock to the interface */
  5106. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  5107. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  5108. fmt = SND_SOC_DAIFMT_CBM_CFM;
  5109. }
  5110. ret = msm_mi2s_set_sclk(substream, true);
  5111. if (ret < 0) {
  5112. dev_err(rtd->card->dev,
  5113. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  5114. __func__, ret);
  5115. goto clean_up;
  5116. }
  5117. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  5118. if (ret < 0) {
  5119. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  5120. __func__, index, ret);
  5121. goto clk_off;
  5122. }
  5123. if (index == QUAT_MI2S) {
  5124. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5125. STATE_MI2S_ACTIVE);
  5126. if (ret_pinctrl)
  5127. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5128. __func__, ret_pinctrl);
  5129. }
  5130. }
  5131. clk_off:
  5132. if (ret < 0)
  5133. msm_mi2s_set_sclk(substream, false);
  5134. clean_up:
  5135. if (ret < 0)
  5136. mi2s_intf_conf[index].ref_cnt--;
  5137. mutex_unlock(&mi2s_intf_conf[index].lock);
  5138. err:
  5139. return ret;
  5140. }
  5141. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  5142. {
  5143. int ret;
  5144. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5145. int index = rtd->cpu_dai->id;
  5146. struct snd_soc_card *card = rtd->card;
  5147. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5148. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5149. int ret_pinctrl = 0;
  5150. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  5151. substream->name, substream->stream);
  5152. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5153. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  5154. return;
  5155. }
  5156. mutex_lock(&mi2s_intf_conf[index].lock);
  5157. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  5158. ret = msm_mi2s_set_sclk(substream, false);
  5159. if (ret < 0)
  5160. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  5161. __func__, index, ret);
  5162. if (index == QUAT_MI2S) {
  5163. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5164. STATE_DISABLE);
  5165. if (ret_pinctrl)
  5166. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5167. __func__, ret_pinctrl);
  5168. }
  5169. }
  5170. mutex_unlock(&mi2s_intf_conf[index].lock);
  5171. }
  5172. static struct snd_soc_ops msm_mi2s_be_ops = {
  5173. .startup = msm_mi2s_snd_startup,
  5174. .shutdown = msm_mi2s_snd_shutdown,
  5175. };
  5176. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  5177. .hw_params = msm_snd_cdc_dma_hw_params,
  5178. };
  5179. static struct snd_soc_ops msm_be_ops = {
  5180. .hw_params = msm_snd_hw_params,
  5181. };
  5182. static struct snd_soc_ops msm_slimbus_2_be_ops = {
  5183. .hw_params = msm_slimbus_2_hw_params,
  5184. };
  5185. static struct snd_soc_ops msm_wcn_ops = {
  5186. .hw_params = msm_wcn_hw_params,
  5187. };
  5188. /* Digital audio interface glue - connects codec <---> CPU */
  5189. static struct snd_soc_dai_link msm_common_dai_links[] = {
  5190. /* FrontEnd DAI Links */
  5191. {/* hw:x,0 */
  5192. .name = MSM_DAILINK_NAME(Media1),
  5193. .stream_name = "MultiMedia1",
  5194. .cpu_dai_name = "MultiMedia1",
  5195. .platform_name = "msm-pcm-dsp.0",
  5196. .dynamic = 1,
  5197. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5198. .dpcm_playback = 1,
  5199. .dpcm_capture = 1,
  5200. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5201. SND_SOC_DPCM_TRIGGER_POST},
  5202. .codec_dai_name = "snd-soc-dummy-dai",
  5203. .codec_name = "snd-soc-dummy",
  5204. .ignore_suspend = 1,
  5205. /* this dainlink has playback support */
  5206. .ignore_pmdown_time = 1,
  5207. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  5208. },
  5209. {/* hw:x,1 */
  5210. .name = MSM_DAILINK_NAME(Media2),
  5211. .stream_name = "MultiMedia2",
  5212. .cpu_dai_name = "MultiMedia2",
  5213. .platform_name = "msm-pcm-dsp.0",
  5214. .dynamic = 1,
  5215. .dpcm_playback = 1,
  5216. .dpcm_capture = 1,
  5217. .codec_dai_name = "snd-soc-dummy-dai",
  5218. .codec_name = "snd-soc-dummy",
  5219. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5220. SND_SOC_DPCM_TRIGGER_POST},
  5221. .ignore_suspend = 1,
  5222. /* this dainlink has playback support */
  5223. .ignore_pmdown_time = 1,
  5224. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  5225. },
  5226. {/* hw:x,2 */
  5227. .name = "VoiceMMode1",
  5228. .stream_name = "VoiceMMode1",
  5229. .cpu_dai_name = "VoiceMMode1",
  5230. .platform_name = "msm-pcm-voice",
  5231. .dynamic = 1,
  5232. .dpcm_playback = 1,
  5233. .dpcm_capture = 1,
  5234. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5235. SND_SOC_DPCM_TRIGGER_POST},
  5236. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5237. .ignore_suspend = 1,
  5238. .ignore_pmdown_time = 1,
  5239. .codec_dai_name = "snd-soc-dummy-dai",
  5240. .codec_name = "snd-soc-dummy",
  5241. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  5242. },
  5243. {/* hw:x,3 */
  5244. .name = "MSM VoIP",
  5245. .stream_name = "VoIP",
  5246. .cpu_dai_name = "VoIP",
  5247. .platform_name = "msm-voip-dsp",
  5248. .dynamic = 1,
  5249. .dpcm_playback = 1,
  5250. .dpcm_capture = 1,
  5251. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5252. SND_SOC_DPCM_TRIGGER_POST},
  5253. .codec_dai_name = "snd-soc-dummy-dai",
  5254. .codec_name = "snd-soc-dummy",
  5255. .ignore_suspend = 1,
  5256. /* this dainlink has playback support */
  5257. .ignore_pmdown_time = 1,
  5258. .id = MSM_FRONTEND_DAI_VOIP,
  5259. },
  5260. {/* hw:x,4 */
  5261. .name = MSM_DAILINK_NAME(ULL),
  5262. .stream_name = "MultiMedia3",
  5263. .cpu_dai_name = "MultiMedia3",
  5264. .platform_name = "msm-pcm-dsp.2",
  5265. .dynamic = 1,
  5266. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5267. .dpcm_playback = 1,
  5268. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5269. SND_SOC_DPCM_TRIGGER_POST},
  5270. .codec_dai_name = "snd-soc-dummy-dai",
  5271. .codec_name = "snd-soc-dummy",
  5272. .ignore_suspend = 1,
  5273. /* this dainlink has playback support */
  5274. .ignore_pmdown_time = 1,
  5275. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  5276. },
  5277. /* Hostless PCM purpose */
  5278. {/* hw:x,5 */
  5279. .name = "SLIMBUS_0 Hostless",
  5280. .stream_name = "SLIMBUS_0 Hostless",
  5281. .cpu_dai_name = "SLIMBUS0_HOSTLESS",
  5282. .platform_name = "msm-pcm-hostless",
  5283. .dynamic = 1,
  5284. .dpcm_playback = 1,
  5285. .dpcm_capture = 1,
  5286. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5287. SND_SOC_DPCM_TRIGGER_POST},
  5288. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5289. .ignore_suspend = 1,
  5290. /* this dailink has playback support */
  5291. .ignore_pmdown_time = 1,
  5292. .codec_dai_name = "snd-soc-dummy-dai",
  5293. .codec_name = "snd-soc-dummy",
  5294. },
  5295. {/* hw:x,6 */
  5296. .name = "MSM AFE-PCM RX",
  5297. .stream_name = "AFE-PROXY RX",
  5298. .cpu_dai_name = "msm-dai-q6-dev.241",
  5299. .codec_name = "msm-stub-codec.1",
  5300. .codec_dai_name = "msm-stub-rx",
  5301. .platform_name = "msm-pcm-afe",
  5302. .dpcm_playback = 1,
  5303. .ignore_suspend = 1,
  5304. /* this dainlink has playback support */
  5305. .ignore_pmdown_time = 1,
  5306. },
  5307. {/* hw:x,7 */
  5308. .name = "MSM AFE-PCM TX",
  5309. .stream_name = "AFE-PROXY TX",
  5310. .cpu_dai_name = "msm-dai-q6-dev.240",
  5311. .codec_name = "msm-stub-codec.1",
  5312. .codec_dai_name = "msm-stub-tx",
  5313. .platform_name = "msm-pcm-afe",
  5314. .dpcm_capture = 1,
  5315. .ignore_suspend = 1,
  5316. },
  5317. {/* hw:x,8 */
  5318. .name = MSM_DAILINK_NAME(Compress1),
  5319. .stream_name = "Compress1",
  5320. .cpu_dai_name = "MultiMedia4",
  5321. .platform_name = "msm-compress-dsp",
  5322. .dynamic = 1,
  5323. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  5324. .dpcm_playback = 1,
  5325. .dpcm_capture = 1,
  5326. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5327. SND_SOC_DPCM_TRIGGER_POST},
  5328. .codec_dai_name = "snd-soc-dummy-dai",
  5329. .codec_name = "snd-soc-dummy",
  5330. .ignore_suspend = 1,
  5331. .ignore_pmdown_time = 1,
  5332. /* this dainlink has playback support */
  5333. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  5334. },
  5335. {/* hw:x,9 */
  5336. .name = "AUXPCM Hostless",
  5337. .stream_name = "AUXPCM Hostless",
  5338. .cpu_dai_name = "AUXPCM_HOSTLESS",
  5339. .platform_name = "msm-pcm-hostless",
  5340. .dynamic = 1,
  5341. .dpcm_playback = 1,
  5342. .dpcm_capture = 1,
  5343. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5344. SND_SOC_DPCM_TRIGGER_POST},
  5345. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5346. .ignore_suspend = 1,
  5347. /* this dainlink has playback support */
  5348. .ignore_pmdown_time = 1,
  5349. .codec_dai_name = "snd-soc-dummy-dai",
  5350. .codec_name = "snd-soc-dummy",
  5351. },
  5352. {/* hw:x,10 */
  5353. .name = "SLIMBUS_1 Hostless",
  5354. .stream_name = "SLIMBUS_1 Hostless",
  5355. .cpu_dai_name = "SLIMBUS1_HOSTLESS",
  5356. .platform_name = "msm-pcm-hostless",
  5357. .dynamic = 1,
  5358. .dpcm_playback = 1,
  5359. .dpcm_capture = 1,
  5360. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5361. SND_SOC_DPCM_TRIGGER_POST},
  5362. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5363. .ignore_suspend = 1,
  5364. /* this dailink has playback support */
  5365. .ignore_pmdown_time = 1,
  5366. .codec_dai_name = "snd-soc-dummy-dai",
  5367. .codec_name = "snd-soc-dummy",
  5368. },
  5369. {/* hw:x,11 */
  5370. .name = "SLIMBUS_3 Hostless",
  5371. .stream_name = "SLIMBUS_3 Hostless",
  5372. .cpu_dai_name = "SLIMBUS3_HOSTLESS",
  5373. .platform_name = "msm-pcm-hostless",
  5374. .dynamic = 1,
  5375. .dpcm_playback = 1,
  5376. .dpcm_capture = 1,
  5377. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5378. SND_SOC_DPCM_TRIGGER_POST},
  5379. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5380. .ignore_suspend = 1,
  5381. /* this dailink has playback support */
  5382. .ignore_pmdown_time = 1,
  5383. .codec_dai_name = "snd-soc-dummy-dai",
  5384. .codec_name = "snd-soc-dummy",
  5385. },
  5386. {/* hw:x,12 */
  5387. .name = "SLIMBUS_7 Hostless",
  5388. .stream_name = "SLIMBUS_7 Hostless",
  5389. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  5390. .platform_name = "msm-pcm-hostless",
  5391. .dynamic = 1,
  5392. .dpcm_playback = 1,
  5393. .dpcm_capture = 1,
  5394. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5395. SND_SOC_DPCM_TRIGGER_POST},
  5396. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5397. .ignore_suspend = 1,
  5398. /* this dailink has playback support */
  5399. .ignore_pmdown_time = 1,
  5400. .codec_dai_name = "snd-soc-dummy-dai",
  5401. .codec_name = "snd-soc-dummy",
  5402. },
  5403. {/* hw:x,13 */
  5404. .name = MSM_DAILINK_NAME(LowLatency),
  5405. .stream_name = "MultiMedia5",
  5406. .cpu_dai_name = "MultiMedia5",
  5407. .platform_name = "msm-pcm-dsp.1",
  5408. .dynamic = 1,
  5409. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5410. .dpcm_playback = 1,
  5411. .dpcm_capture = 1,
  5412. .codec_dai_name = "snd-soc-dummy-dai",
  5413. .codec_name = "snd-soc-dummy",
  5414. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5415. SND_SOC_DPCM_TRIGGER_POST},
  5416. .ignore_suspend = 1,
  5417. /* this dainlink has playback support */
  5418. .ignore_pmdown_time = 1,
  5419. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  5420. .ops = &msm_fe_qos_ops,
  5421. },
  5422. {/* hw:x,14 */
  5423. .name = "Listen 1 Audio Service",
  5424. .stream_name = "Listen 1 Audio Service",
  5425. .cpu_dai_name = "LSM1",
  5426. .platform_name = "msm-lsm-client",
  5427. .dynamic = 1,
  5428. .dpcm_capture = 1,
  5429. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5430. SND_SOC_DPCM_TRIGGER_POST },
  5431. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5432. .ignore_suspend = 1,
  5433. .codec_dai_name = "snd-soc-dummy-dai",
  5434. .codec_name = "snd-soc-dummy",
  5435. .id = MSM_FRONTEND_DAI_LSM1,
  5436. },
  5437. /* Multiple Tunnel instances */
  5438. {/* hw:x,15 */
  5439. .name = MSM_DAILINK_NAME(Compress2),
  5440. .stream_name = "Compress2",
  5441. .cpu_dai_name = "MultiMedia7",
  5442. .platform_name = "msm-compress-dsp",
  5443. .dynamic = 1,
  5444. .dpcm_playback = 1,
  5445. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5446. SND_SOC_DPCM_TRIGGER_POST},
  5447. .codec_dai_name = "snd-soc-dummy-dai",
  5448. .codec_name = "snd-soc-dummy",
  5449. .ignore_suspend = 1,
  5450. .ignore_pmdown_time = 1,
  5451. /* this dainlink has playback support */
  5452. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  5453. },
  5454. {/* hw:x,16 */
  5455. .name = MSM_DAILINK_NAME(MultiMedia10),
  5456. .stream_name = "MultiMedia10",
  5457. .cpu_dai_name = "MultiMedia10",
  5458. .platform_name = "msm-pcm-dsp.1",
  5459. .dynamic = 1,
  5460. .dpcm_playback = 1,
  5461. .dpcm_capture = 1,
  5462. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5463. SND_SOC_DPCM_TRIGGER_POST},
  5464. .codec_dai_name = "snd-soc-dummy-dai",
  5465. .codec_name = "snd-soc-dummy",
  5466. .ignore_suspend = 1,
  5467. .ignore_pmdown_time = 1,
  5468. /* this dainlink has playback support */
  5469. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  5470. },
  5471. {/* hw:x,17 */
  5472. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  5473. .stream_name = "MM_NOIRQ",
  5474. .cpu_dai_name = "MultiMedia8",
  5475. .platform_name = "msm-pcm-dsp-noirq",
  5476. .dynamic = 1,
  5477. .dpcm_playback = 1,
  5478. .dpcm_capture = 1,
  5479. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5480. SND_SOC_DPCM_TRIGGER_POST},
  5481. .codec_dai_name = "snd-soc-dummy-dai",
  5482. .codec_name = "snd-soc-dummy",
  5483. .ignore_suspend = 1,
  5484. .ignore_pmdown_time = 1,
  5485. /* this dainlink has playback support */
  5486. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  5487. .ops = &msm_fe_qos_ops,
  5488. },
  5489. /* HDMI Hostless */
  5490. {/* hw:x,18 */
  5491. .name = "HDMI_RX_HOSTLESS",
  5492. .stream_name = "HDMI_RX_HOSTLESS",
  5493. .cpu_dai_name = "HDMI_HOSTLESS",
  5494. .platform_name = "msm-pcm-hostless",
  5495. .dynamic = 1,
  5496. .dpcm_playback = 1,
  5497. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5498. SND_SOC_DPCM_TRIGGER_POST},
  5499. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5500. .ignore_suspend = 1,
  5501. .ignore_pmdown_time = 1,
  5502. .codec_dai_name = "snd-soc-dummy-dai",
  5503. .codec_name = "snd-soc-dummy",
  5504. },
  5505. {/* hw:x,19 */
  5506. .name = "VoiceMMode2",
  5507. .stream_name = "VoiceMMode2",
  5508. .cpu_dai_name = "VoiceMMode2",
  5509. .platform_name = "msm-pcm-voice",
  5510. .dynamic = 1,
  5511. .dpcm_playback = 1,
  5512. .dpcm_capture = 1,
  5513. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5514. SND_SOC_DPCM_TRIGGER_POST},
  5515. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5516. .ignore_suspend = 1,
  5517. .ignore_pmdown_time = 1,
  5518. .codec_dai_name = "snd-soc-dummy-dai",
  5519. .codec_name = "snd-soc-dummy",
  5520. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  5521. },
  5522. /* LSM FE */
  5523. {/* hw:x,20 */
  5524. .name = "Listen 2 Audio Service",
  5525. .stream_name = "Listen 2 Audio Service",
  5526. .cpu_dai_name = "LSM2",
  5527. .platform_name = "msm-lsm-client",
  5528. .dynamic = 1,
  5529. .dpcm_capture = 1,
  5530. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5531. SND_SOC_DPCM_TRIGGER_POST },
  5532. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5533. .ignore_suspend = 1,
  5534. .codec_dai_name = "snd-soc-dummy-dai",
  5535. .codec_name = "snd-soc-dummy",
  5536. .id = MSM_FRONTEND_DAI_LSM2,
  5537. },
  5538. {/* hw:x,21 */
  5539. .name = "Listen 3 Audio Service",
  5540. .stream_name = "Listen 3 Audio Service",
  5541. .cpu_dai_name = "LSM3",
  5542. .platform_name = "msm-lsm-client",
  5543. .dynamic = 1,
  5544. .dpcm_capture = 1,
  5545. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5546. SND_SOC_DPCM_TRIGGER_POST },
  5547. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5548. .ignore_suspend = 1,
  5549. .codec_dai_name = "snd-soc-dummy-dai",
  5550. .codec_name = "snd-soc-dummy",
  5551. .id = MSM_FRONTEND_DAI_LSM3,
  5552. },
  5553. {/* hw:x,22 */
  5554. .name = "Listen 4 Audio Service",
  5555. .stream_name = "Listen 4 Audio Service",
  5556. .cpu_dai_name = "LSM4",
  5557. .platform_name = "msm-lsm-client",
  5558. .dynamic = 1,
  5559. .dpcm_capture = 1,
  5560. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5561. SND_SOC_DPCM_TRIGGER_POST },
  5562. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5563. .ignore_suspend = 1,
  5564. .codec_dai_name = "snd-soc-dummy-dai",
  5565. .codec_name = "snd-soc-dummy",
  5566. .id = MSM_FRONTEND_DAI_LSM4,
  5567. },
  5568. {/* hw:x,23 */
  5569. .name = "Listen 5 Audio Service",
  5570. .stream_name = "Listen 5 Audio Service",
  5571. .cpu_dai_name = "LSM5",
  5572. .platform_name = "msm-lsm-client",
  5573. .dynamic = 1,
  5574. .dpcm_capture = 1,
  5575. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5576. SND_SOC_DPCM_TRIGGER_POST },
  5577. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5578. .ignore_suspend = 1,
  5579. .codec_dai_name = "snd-soc-dummy-dai",
  5580. .codec_name = "snd-soc-dummy",
  5581. .id = MSM_FRONTEND_DAI_LSM5,
  5582. },
  5583. {/* hw:x,24 */
  5584. .name = "Listen 6 Audio Service",
  5585. .stream_name = "Listen 6 Audio Service",
  5586. .cpu_dai_name = "LSM6",
  5587. .platform_name = "msm-lsm-client",
  5588. .dynamic = 1,
  5589. .dpcm_capture = 1,
  5590. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5591. SND_SOC_DPCM_TRIGGER_POST },
  5592. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5593. .ignore_suspend = 1,
  5594. .codec_dai_name = "snd-soc-dummy-dai",
  5595. .codec_name = "snd-soc-dummy",
  5596. .id = MSM_FRONTEND_DAI_LSM6,
  5597. },
  5598. {/* hw:x,25 */
  5599. .name = "Listen 7 Audio Service",
  5600. .stream_name = "Listen 7 Audio Service",
  5601. .cpu_dai_name = "LSM7",
  5602. .platform_name = "msm-lsm-client",
  5603. .dynamic = 1,
  5604. .dpcm_capture = 1,
  5605. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5606. SND_SOC_DPCM_TRIGGER_POST },
  5607. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5608. .ignore_suspend = 1,
  5609. .codec_dai_name = "snd-soc-dummy-dai",
  5610. .codec_name = "snd-soc-dummy",
  5611. .id = MSM_FRONTEND_DAI_LSM7,
  5612. },
  5613. {/* hw:x,26 */
  5614. .name = "Listen 8 Audio Service",
  5615. .stream_name = "Listen 8 Audio Service",
  5616. .cpu_dai_name = "LSM8",
  5617. .platform_name = "msm-lsm-client",
  5618. .dynamic = 1,
  5619. .dpcm_capture = 1,
  5620. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5621. SND_SOC_DPCM_TRIGGER_POST },
  5622. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5623. .ignore_suspend = 1,
  5624. .codec_dai_name = "snd-soc-dummy-dai",
  5625. .codec_name = "snd-soc-dummy",
  5626. .id = MSM_FRONTEND_DAI_LSM8,
  5627. },
  5628. {/* hw:x,27 */
  5629. .name = MSM_DAILINK_NAME(Media9),
  5630. .stream_name = "MultiMedia9",
  5631. .cpu_dai_name = "MultiMedia9",
  5632. .platform_name = "msm-pcm-dsp.0",
  5633. .dynamic = 1,
  5634. .dpcm_playback = 1,
  5635. .dpcm_capture = 1,
  5636. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5637. SND_SOC_DPCM_TRIGGER_POST},
  5638. .codec_dai_name = "snd-soc-dummy-dai",
  5639. .codec_name = "snd-soc-dummy",
  5640. .ignore_suspend = 1,
  5641. /* this dainlink has playback support */
  5642. .ignore_pmdown_time = 1,
  5643. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  5644. },
  5645. {/* hw:x,28 */
  5646. .name = MSM_DAILINK_NAME(Compress4),
  5647. .stream_name = "Compress4",
  5648. .cpu_dai_name = "MultiMedia11",
  5649. .platform_name = "msm-compress-dsp",
  5650. .dynamic = 1,
  5651. .dpcm_playback = 1,
  5652. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5653. SND_SOC_DPCM_TRIGGER_POST},
  5654. .codec_dai_name = "snd-soc-dummy-dai",
  5655. .codec_name = "snd-soc-dummy",
  5656. .ignore_suspend = 1,
  5657. .ignore_pmdown_time = 1,
  5658. /* this dainlink has playback support */
  5659. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  5660. },
  5661. {/* hw:x,29 */
  5662. .name = MSM_DAILINK_NAME(Compress5),
  5663. .stream_name = "Compress5",
  5664. .cpu_dai_name = "MultiMedia12",
  5665. .platform_name = "msm-compress-dsp",
  5666. .dynamic = 1,
  5667. .dpcm_playback = 1,
  5668. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5669. SND_SOC_DPCM_TRIGGER_POST},
  5670. .codec_dai_name = "snd-soc-dummy-dai",
  5671. .codec_name = "snd-soc-dummy",
  5672. .ignore_suspend = 1,
  5673. .ignore_pmdown_time = 1,
  5674. /* this dainlink has playback support */
  5675. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  5676. },
  5677. {/* hw:x,30 */
  5678. .name = MSM_DAILINK_NAME(Compress6),
  5679. .stream_name = "Compress6",
  5680. .cpu_dai_name = "MultiMedia13",
  5681. .platform_name = "msm-compress-dsp",
  5682. .dynamic = 1,
  5683. .dpcm_playback = 1,
  5684. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5685. SND_SOC_DPCM_TRIGGER_POST},
  5686. .codec_dai_name = "snd-soc-dummy-dai",
  5687. .codec_name = "snd-soc-dummy",
  5688. .ignore_suspend = 1,
  5689. .ignore_pmdown_time = 1,
  5690. /* this dainlink has playback support */
  5691. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  5692. },
  5693. {/* hw:x,31 */
  5694. .name = MSM_DAILINK_NAME(Compress7),
  5695. .stream_name = "Compress7",
  5696. .cpu_dai_name = "MultiMedia14",
  5697. .platform_name = "msm-compress-dsp",
  5698. .dynamic = 1,
  5699. .dpcm_playback = 1,
  5700. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5701. SND_SOC_DPCM_TRIGGER_POST},
  5702. .codec_dai_name = "snd-soc-dummy-dai",
  5703. .codec_name = "snd-soc-dummy",
  5704. .ignore_suspend = 1,
  5705. .ignore_pmdown_time = 1,
  5706. /* this dainlink has playback support */
  5707. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  5708. },
  5709. {/* hw:x,32 */
  5710. .name = MSM_DAILINK_NAME(Compress8),
  5711. .stream_name = "Compress8",
  5712. .cpu_dai_name = "MultiMedia15",
  5713. .platform_name = "msm-compress-dsp",
  5714. .dynamic = 1,
  5715. .dpcm_playback = 1,
  5716. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5717. SND_SOC_DPCM_TRIGGER_POST},
  5718. .codec_dai_name = "snd-soc-dummy-dai",
  5719. .codec_name = "snd-soc-dummy",
  5720. .ignore_suspend = 1,
  5721. .ignore_pmdown_time = 1,
  5722. /* this dainlink has playback support */
  5723. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  5724. },
  5725. {/* hw:x,33 */
  5726. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  5727. .stream_name = "MM_NOIRQ_2",
  5728. .cpu_dai_name = "MultiMedia16",
  5729. .platform_name = "msm-pcm-dsp-noirq",
  5730. .dynamic = 1,
  5731. .dpcm_playback = 1,
  5732. .dpcm_capture = 1,
  5733. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5734. SND_SOC_DPCM_TRIGGER_POST},
  5735. .codec_dai_name = "snd-soc-dummy-dai",
  5736. .codec_name = "snd-soc-dummy",
  5737. .ignore_suspend = 1,
  5738. .ignore_pmdown_time = 1,
  5739. /* this dainlink has playback support */
  5740. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  5741. },
  5742. {/* hw:x,34 */
  5743. .name = "SLIMBUS_8 Hostless",
  5744. .stream_name = "SLIMBUS8_HOSTLESS Capture",
  5745. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  5746. .platform_name = "msm-pcm-hostless",
  5747. .dynamic = 1,
  5748. .dpcm_capture = 1,
  5749. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5750. SND_SOC_DPCM_TRIGGER_POST},
  5751. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5752. .ignore_suspend = 1,
  5753. .codec_dai_name = "snd-soc-dummy-dai",
  5754. .codec_name = "snd-soc-dummy",
  5755. },
  5756. {/* hw:x,35 */
  5757. .name = "CDC_DMA Hostless",
  5758. .stream_name = "CDC_DMA Hostless",
  5759. .cpu_dai_name = "CDC_DMA_HOSTLESS",
  5760. .platform_name = "msm-pcm-hostless",
  5761. .dynamic = 1,
  5762. .dpcm_playback = 1,
  5763. .dpcm_capture = 1,
  5764. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5765. SND_SOC_DPCM_TRIGGER_POST},
  5766. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5767. .ignore_suspend = 1,
  5768. /* this dailink has playback support */
  5769. .ignore_pmdown_time = 1,
  5770. .codec_dai_name = "snd-soc-dummy-dai",
  5771. .codec_name = "snd-soc-dummy",
  5772. },
  5773. {/* hw:x,36 */
  5774. .name = "TX3_CDC_DMA Hostless",
  5775. .stream_name = "TX3_CDC_DMA Hostless",
  5776. .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
  5777. .platform_name = "msm-pcm-hostless",
  5778. .dynamic = 1,
  5779. .dpcm_capture = 1,
  5780. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5781. SND_SOC_DPCM_TRIGGER_POST},
  5782. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5783. .ignore_suspend = 1,
  5784. .codec_dai_name = "snd-soc-dummy-dai",
  5785. .codec_name = "snd-soc-dummy",
  5786. },
  5787. };
  5788. static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
  5789. {/* hw:x,37 */
  5790. .name = LPASS_BE_SLIMBUS_4_TX,
  5791. .stream_name = "Slimbus4 Capture",
  5792. .cpu_dai_name = "msm-dai-q6-dev.16393",
  5793. .platform_name = "msm-pcm-hostless",
  5794. .codec_name = "tavil_codec",
  5795. .codec_dai_name = "tavil_vifeedback",
  5796. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  5797. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5798. .ops = &msm_be_ops,
  5799. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5800. .ignore_suspend = 1,
  5801. },
  5802. /* Ultrasound RX DAI Link */
  5803. {/* hw:x,38 */
  5804. .name = "SLIMBUS_2 Hostless Playback",
  5805. .stream_name = "SLIMBUS_2 Hostless Playback",
  5806. .cpu_dai_name = "msm-dai-q6-dev.16388",
  5807. .platform_name = "msm-pcm-hostless",
  5808. .codec_name = "tavil_codec",
  5809. .codec_dai_name = "tavil_rx2",
  5810. .ignore_suspend = 1,
  5811. .ignore_pmdown_time = 1,
  5812. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5813. .ops = &msm_slimbus_2_be_ops,
  5814. },
  5815. /* Ultrasound TX DAI Link */
  5816. {/* hw:x,39 */
  5817. .name = "SLIMBUS_2 Hostless Capture",
  5818. .stream_name = "SLIMBUS_2 Hostless Capture",
  5819. .cpu_dai_name = "msm-dai-q6-dev.16389",
  5820. .platform_name = "msm-pcm-hostless",
  5821. .codec_name = "tavil_codec",
  5822. .codec_dai_name = "tavil_tx2",
  5823. .ignore_suspend = 1,
  5824. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5825. .ops = &msm_slimbus_2_be_ops,
  5826. },
  5827. };
  5828. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  5829. {/* hw:x,37 */
  5830. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  5831. .stream_name = "WSA CDC DMA0 Capture",
  5832. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  5833. .platform_name = "msm-pcm-hostless",
  5834. .codec_name = "bolero_codec",
  5835. .codec_dai_name = "wsa_macro_vifeedback",
  5836. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  5837. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5838. .ignore_suspend = 1,
  5839. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5840. .ops = &msm_cdc_dma_be_ops,
  5841. },
  5842. };
  5843. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  5844. {
  5845. .name = MSM_DAILINK_NAME(ASM Loopback),
  5846. .stream_name = "MultiMedia6",
  5847. .cpu_dai_name = "MultiMedia6",
  5848. .platform_name = "msm-pcm-loopback",
  5849. .dynamic = 1,
  5850. .dpcm_playback = 1,
  5851. .dpcm_capture = 1,
  5852. .codec_dai_name = "snd-soc-dummy-dai",
  5853. .codec_name = "snd-soc-dummy",
  5854. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5855. SND_SOC_DPCM_TRIGGER_POST},
  5856. .ignore_suspend = 1,
  5857. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5858. .ignore_pmdown_time = 1,
  5859. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  5860. },
  5861. {
  5862. .name = "USB Audio Hostless",
  5863. .stream_name = "USB Audio Hostless",
  5864. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  5865. .platform_name = "msm-pcm-hostless",
  5866. .dynamic = 1,
  5867. .dpcm_playback = 1,
  5868. .dpcm_capture = 1,
  5869. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5870. SND_SOC_DPCM_TRIGGER_POST},
  5871. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5872. .ignore_suspend = 1,
  5873. .ignore_pmdown_time = 1,
  5874. .codec_dai_name = "snd-soc-dummy-dai",
  5875. .codec_name = "snd-soc-dummy",
  5876. },
  5877. };
  5878. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  5879. /* Backend AFE DAI Links */
  5880. {
  5881. .name = LPASS_BE_AFE_PCM_RX,
  5882. .stream_name = "AFE Playback",
  5883. .cpu_dai_name = "msm-dai-q6-dev.224",
  5884. .platform_name = "msm-pcm-routing",
  5885. .codec_name = "msm-stub-codec.1",
  5886. .codec_dai_name = "msm-stub-rx",
  5887. .no_pcm = 1,
  5888. .dpcm_playback = 1,
  5889. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  5890. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5891. /* this dainlink has playback support */
  5892. .ignore_pmdown_time = 1,
  5893. .ignore_suspend = 1,
  5894. },
  5895. {
  5896. .name = LPASS_BE_AFE_PCM_TX,
  5897. .stream_name = "AFE Capture",
  5898. .cpu_dai_name = "msm-dai-q6-dev.225",
  5899. .platform_name = "msm-pcm-routing",
  5900. .codec_name = "msm-stub-codec.1",
  5901. .codec_dai_name = "msm-stub-tx",
  5902. .no_pcm = 1,
  5903. .dpcm_capture = 1,
  5904. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  5905. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5906. .ignore_suspend = 1,
  5907. },
  5908. /* Incall Record Uplink BACK END DAI Link */
  5909. {
  5910. .name = LPASS_BE_INCALL_RECORD_TX,
  5911. .stream_name = "Voice Uplink Capture",
  5912. .cpu_dai_name = "msm-dai-q6-dev.32772",
  5913. .platform_name = "msm-pcm-routing",
  5914. .codec_name = "msm-stub-codec.1",
  5915. .codec_dai_name = "msm-stub-tx",
  5916. .no_pcm = 1,
  5917. .dpcm_capture = 1,
  5918. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  5919. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5920. .ignore_suspend = 1,
  5921. },
  5922. /* Incall Record Downlink BACK END DAI Link */
  5923. {
  5924. .name = LPASS_BE_INCALL_RECORD_RX,
  5925. .stream_name = "Voice Downlink Capture",
  5926. .cpu_dai_name = "msm-dai-q6-dev.32771",
  5927. .platform_name = "msm-pcm-routing",
  5928. .codec_name = "msm-stub-codec.1",
  5929. .codec_dai_name = "msm-stub-tx",
  5930. .no_pcm = 1,
  5931. .dpcm_capture = 1,
  5932. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  5933. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5934. .ignore_suspend = 1,
  5935. },
  5936. /* Incall Music BACK END DAI Link */
  5937. {
  5938. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  5939. .stream_name = "Voice Farend Playback",
  5940. .cpu_dai_name = "msm-dai-q6-dev.32773",
  5941. .platform_name = "msm-pcm-routing",
  5942. .codec_name = "msm-stub-codec.1",
  5943. .codec_dai_name = "msm-stub-rx",
  5944. .no_pcm = 1,
  5945. .dpcm_playback = 1,
  5946. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  5947. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5948. .ignore_suspend = 1,
  5949. .ignore_pmdown_time = 1,
  5950. },
  5951. /* Incall Music 2 BACK END DAI Link */
  5952. {
  5953. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  5954. .stream_name = "Voice2 Farend Playback",
  5955. .cpu_dai_name = "msm-dai-q6-dev.32770",
  5956. .platform_name = "msm-pcm-routing",
  5957. .codec_name = "msm-stub-codec.1",
  5958. .codec_dai_name = "msm-stub-rx",
  5959. .no_pcm = 1,
  5960. .dpcm_playback = 1,
  5961. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  5962. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5963. .ignore_suspend = 1,
  5964. .ignore_pmdown_time = 1,
  5965. },
  5966. {
  5967. .name = LPASS_BE_USB_AUDIO_RX,
  5968. .stream_name = "USB Audio Playback",
  5969. .cpu_dai_name = "msm-dai-q6-dev.28672",
  5970. .platform_name = "msm-pcm-routing",
  5971. .codec_name = "msm-stub-codec.1",
  5972. .codec_dai_name = "msm-stub-rx",
  5973. .no_pcm = 1,
  5974. .dpcm_playback = 1,
  5975. .id = MSM_BACKEND_DAI_USB_RX,
  5976. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5977. .ignore_pmdown_time = 1,
  5978. .ignore_suspend = 1,
  5979. },
  5980. {
  5981. .name = LPASS_BE_USB_AUDIO_TX,
  5982. .stream_name = "USB Audio Capture",
  5983. .cpu_dai_name = "msm-dai-q6-dev.28673",
  5984. .platform_name = "msm-pcm-routing",
  5985. .codec_name = "msm-stub-codec.1",
  5986. .codec_dai_name = "msm-stub-tx",
  5987. .no_pcm = 1,
  5988. .dpcm_capture = 1,
  5989. .id = MSM_BACKEND_DAI_USB_TX,
  5990. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5991. .ignore_suspend = 1,
  5992. },
  5993. {
  5994. .name = LPASS_BE_PRI_TDM_RX_0,
  5995. .stream_name = "Primary TDM0 Playback",
  5996. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  5997. .platform_name = "msm-pcm-routing",
  5998. .codec_name = "msm-stub-codec.1",
  5999. .codec_dai_name = "msm-stub-rx",
  6000. .no_pcm = 1,
  6001. .dpcm_playback = 1,
  6002. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  6003. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6004. .ops = &sm6150_tdm_be_ops,
  6005. .ignore_suspend = 1,
  6006. .ignore_pmdown_time = 1,
  6007. },
  6008. {
  6009. .name = LPASS_BE_PRI_TDM_TX_0,
  6010. .stream_name = "Primary TDM0 Capture",
  6011. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  6012. .platform_name = "msm-pcm-routing",
  6013. .codec_name = "msm-stub-codec.1",
  6014. .codec_dai_name = "msm-stub-tx",
  6015. .no_pcm = 1,
  6016. .dpcm_capture = 1,
  6017. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  6018. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6019. .ops = &sm6150_tdm_be_ops,
  6020. .ignore_suspend = 1,
  6021. },
  6022. {
  6023. .name = LPASS_BE_SEC_TDM_RX_0,
  6024. .stream_name = "Secondary TDM0 Playback",
  6025. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  6026. .platform_name = "msm-pcm-routing",
  6027. .codec_name = "msm-stub-codec.1",
  6028. .codec_dai_name = "msm-stub-rx",
  6029. .no_pcm = 1,
  6030. .dpcm_playback = 1,
  6031. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  6032. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6033. .ops = &sm6150_tdm_be_ops,
  6034. .ignore_suspend = 1,
  6035. .ignore_pmdown_time = 1,
  6036. },
  6037. {
  6038. .name = LPASS_BE_SEC_TDM_TX_0,
  6039. .stream_name = "Secondary TDM0 Capture",
  6040. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  6041. .platform_name = "msm-pcm-routing",
  6042. .codec_name = "msm-stub-codec.1",
  6043. .codec_dai_name = "msm-stub-tx",
  6044. .no_pcm = 1,
  6045. .dpcm_capture = 1,
  6046. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  6047. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6048. .ops = &sm6150_tdm_be_ops,
  6049. .ignore_suspend = 1,
  6050. },
  6051. {
  6052. .name = LPASS_BE_TERT_TDM_RX_0,
  6053. .stream_name = "Tertiary TDM0 Playback",
  6054. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  6055. .platform_name = "msm-pcm-routing",
  6056. .codec_name = "msm-stub-codec.1",
  6057. .codec_dai_name = "msm-stub-rx",
  6058. .no_pcm = 1,
  6059. .dpcm_playback = 1,
  6060. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  6061. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6062. .ops = &sm6150_tdm_be_ops,
  6063. .ignore_suspend = 1,
  6064. .ignore_pmdown_time = 1,
  6065. },
  6066. {
  6067. .name = LPASS_BE_TERT_TDM_TX_0,
  6068. .stream_name = "Tertiary TDM0 Capture",
  6069. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  6070. .platform_name = "msm-pcm-routing",
  6071. .codec_name = "msm-stub-codec.1",
  6072. .codec_dai_name = "msm-stub-tx",
  6073. .no_pcm = 1,
  6074. .dpcm_capture = 1,
  6075. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  6076. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6077. .ops = &sm6150_tdm_be_ops,
  6078. .ignore_suspend = 1,
  6079. },
  6080. {
  6081. .name = LPASS_BE_QUAT_TDM_RX_0,
  6082. .stream_name = "Quaternary TDM0 Playback",
  6083. .cpu_dai_name = "msm-dai-q6-tdm.36912",
  6084. .platform_name = "msm-pcm-routing",
  6085. .codec_name = "msm-stub-codec.1",
  6086. .codec_dai_name = "msm-stub-rx",
  6087. .no_pcm = 1,
  6088. .dpcm_playback = 1,
  6089. .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
  6090. .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
  6091. .ops = &sm6150_tdm_be_ops,
  6092. .ignore_suspend = 1,
  6093. .ignore_pmdown_time = 1,
  6094. },
  6095. {
  6096. .name = LPASS_BE_QUAT_TDM_TX_0,
  6097. .stream_name = "Quaternary TDM0 Capture",
  6098. .cpu_dai_name = "msm-dai-q6-tdm.36913",
  6099. .platform_name = "msm-pcm-routing",
  6100. .codec_name = "msm-stub-codec.1",
  6101. .codec_dai_name = "msm-stub-tx",
  6102. .no_pcm = 1,
  6103. .dpcm_capture = 1,
  6104. .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
  6105. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6106. .ops = &sm6150_tdm_be_ops,
  6107. .ignore_suspend = 1,
  6108. },
  6109. };
  6110. static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
  6111. {
  6112. .name = LPASS_BE_SLIMBUS_0_RX,
  6113. .stream_name = "Slimbus Playback",
  6114. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6115. .platform_name = "msm-pcm-routing",
  6116. .codec_name = "tavil_codec",
  6117. .codec_dai_name = "tavil_rx1",
  6118. .no_pcm = 1,
  6119. .dpcm_playback = 1,
  6120. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6121. .init = &msm_audrx_tavil_init,
  6122. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6123. /* this dainlink has playback support */
  6124. .ignore_pmdown_time = 1,
  6125. .ignore_suspend = 1,
  6126. .ops = &msm_be_ops,
  6127. },
  6128. {
  6129. .name = LPASS_BE_SLIMBUS_0_TX,
  6130. .stream_name = "Slimbus Capture",
  6131. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6132. .platform_name = "msm-pcm-routing",
  6133. .codec_name = "tavil_codec",
  6134. .codec_dai_name = "tavil_tx1",
  6135. .no_pcm = 1,
  6136. .dpcm_capture = 1,
  6137. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6138. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6139. .ignore_suspend = 1,
  6140. .ops = &msm_be_ops,
  6141. },
  6142. {
  6143. .name = LPASS_BE_SLIMBUS_1_RX,
  6144. .stream_name = "Slimbus1 Playback",
  6145. .cpu_dai_name = "msm-dai-q6-dev.16386",
  6146. .platform_name = "msm-pcm-routing",
  6147. .codec_name = "tavil_codec",
  6148. .codec_dai_name = "tavil_rx1",
  6149. .no_pcm = 1,
  6150. .dpcm_playback = 1,
  6151. .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
  6152. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6153. .ops = &msm_be_ops,
  6154. /* dai link has playback support */
  6155. .ignore_pmdown_time = 1,
  6156. .ignore_suspend = 1,
  6157. },
  6158. {
  6159. .name = LPASS_BE_SLIMBUS_1_TX,
  6160. .stream_name = "Slimbus1 Capture",
  6161. .cpu_dai_name = "msm-dai-q6-dev.16387",
  6162. .platform_name = "msm-pcm-routing",
  6163. .codec_name = "tavil_codec",
  6164. .codec_dai_name = "tavil_tx3",
  6165. .no_pcm = 1,
  6166. .dpcm_capture = 1,
  6167. .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
  6168. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6169. .ops = &msm_be_ops,
  6170. .ignore_suspend = 1,
  6171. },
  6172. {
  6173. .name = LPASS_BE_SLIMBUS_2_RX,
  6174. .stream_name = "Slimbus2 Playback",
  6175. .cpu_dai_name = "msm-dai-q6-dev.16388",
  6176. .platform_name = "msm-pcm-routing",
  6177. .codec_name = "tavil_codec",
  6178. .codec_dai_name = "tavil_rx2",
  6179. .no_pcm = 1,
  6180. .dpcm_playback = 1,
  6181. .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
  6182. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6183. .ops = &msm_be_ops,
  6184. .ignore_pmdown_time = 1,
  6185. .ignore_suspend = 1,
  6186. },
  6187. {
  6188. .name = LPASS_BE_SLIMBUS_3_RX,
  6189. .stream_name = "Slimbus3 Playback",
  6190. .cpu_dai_name = "msm-dai-q6-dev.16390",
  6191. .platform_name = "msm-pcm-routing",
  6192. .codec_name = "tavil_codec",
  6193. .codec_dai_name = "tavil_rx1",
  6194. .no_pcm = 1,
  6195. .dpcm_playback = 1,
  6196. .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
  6197. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6198. .ops = &msm_be_ops,
  6199. /* dai link has playback support */
  6200. .ignore_pmdown_time = 1,
  6201. .ignore_suspend = 1,
  6202. },
  6203. {
  6204. .name = LPASS_BE_SLIMBUS_3_TX,
  6205. .stream_name = "Slimbus3 Capture",
  6206. .cpu_dai_name = "msm-dai-q6-dev.16391",
  6207. .platform_name = "msm-pcm-routing",
  6208. .codec_name = "tavil_codec",
  6209. .codec_dai_name = "tavil_tx1",
  6210. .no_pcm = 1,
  6211. .dpcm_capture = 1,
  6212. .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
  6213. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6214. .ops = &msm_be_ops,
  6215. .ignore_suspend = 1,
  6216. },
  6217. {
  6218. .name = LPASS_BE_SLIMBUS_4_RX,
  6219. .stream_name = "Slimbus4 Playback",
  6220. .cpu_dai_name = "msm-dai-q6-dev.16392",
  6221. .platform_name = "msm-pcm-routing",
  6222. .codec_name = "tavil_codec",
  6223. .codec_dai_name = "tavil_rx1",
  6224. .no_pcm = 1,
  6225. .dpcm_playback = 1,
  6226. .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
  6227. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6228. .ops = &msm_be_ops,
  6229. /* dai link has playback support */
  6230. .ignore_pmdown_time = 1,
  6231. .ignore_suspend = 1,
  6232. },
  6233. {
  6234. .name = LPASS_BE_SLIMBUS_5_RX,
  6235. .stream_name = "Slimbus5 Playback",
  6236. .cpu_dai_name = "msm-dai-q6-dev.16394",
  6237. .platform_name = "msm-pcm-routing",
  6238. .codec_name = "tavil_codec",
  6239. .codec_dai_name = "tavil_rx3",
  6240. .no_pcm = 1,
  6241. .dpcm_playback = 1,
  6242. .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
  6243. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6244. .ops = &msm_be_ops,
  6245. /* dai link has playback support */
  6246. .ignore_pmdown_time = 1,
  6247. .ignore_suspend = 1,
  6248. },
  6249. /* MAD BE */
  6250. {
  6251. .name = LPASS_BE_SLIMBUS_5_TX,
  6252. .stream_name = "Slimbus5 Capture",
  6253. .cpu_dai_name = "msm-dai-q6-dev.16395",
  6254. .platform_name = "msm-pcm-routing",
  6255. .codec_name = "tavil_codec",
  6256. .codec_dai_name = "tavil_mad1",
  6257. .no_pcm = 1,
  6258. .dpcm_capture = 1,
  6259. .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
  6260. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6261. .ops = &msm_be_ops,
  6262. .ignore_suspend = 1,
  6263. },
  6264. {
  6265. .name = LPASS_BE_SLIMBUS_6_RX,
  6266. .stream_name = "Slimbus6 Playback",
  6267. .cpu_dai_name = "msm-dai-q6-dev.16396",
  6268. .platform_name = "msm-pcm-routing",
  6269. .codec_name = "tavil_codec",
  6270. .codec_dai_name = "tavil_rx4",
  6271. .no_pcm = 1,
  6272. .dpcm_playback = 1,
  6273. .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
  6274. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6275. .ops = &msm_be_ops,
  6276. /* dai link has playback support */
  6277. .ignore_pmdown_time = 1,
  6278. .ignore_suspend = 1,
  6279. },
  6280. /* Slimbus VI Recording */
  6281. {
  6282. .name = LPASS_BE_SLIMBUS_TX_VI,
  6283. .stream_name = "Slimbus4 Capture",
  6284. .cpu_dai_name = "msm-dai-q6-dev.16393",
  6285. .platform_name = "msm-pcm-routing",
  6286. .codec_name = "tavil_codec",
  6287. .codec_dai_name = "tavil_vifeedback",
  6288. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  6289. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6290. .ops = &msm_be_ops,
  6291. .ignore_suspend = 1,
  6292. .no_pcm = 1,
  6293. .dpcm_capture = 1,
  6294. },
  6295. };
  6296. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  6297. {
  6298. .name = LPASS_BE_SLIMBUS_7_RX,
  6299. .stream_name = "Slimbus7 Playback",
  6300. .cpu_dai_name = "msm-dai-q6-dev.16398",
  6301. .platform_name = "msm-pcm-routing",
  6302. .codec_name = "btfmslim_slave",
  6303. /* BT codec driver determines capabilities based on
  6304. * dai name, bt codecdai name should always contains
  6305. * supported usecase information
  6306. */
  6307. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  6308. .no_pcm = 1,
  6309. .dpcm_playback = 1,
  6310. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  6311. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6312. .ops = &msm_wcn_ops,
  6313. /* dai link has playback support */
  6314. .ignore_pmdown_time = 1,
  6315. .ignore_suspend = 1,
  6316. },
  6317. {
  6318. .name = LPASS_BE_SLIMBUS_7_TX,
  6319. .stream_name = "Slimbus7 Capture",
  6320. .cpu_dai_name = "msm-dai-q6-dev.16399",
  6321. .platform_name = "msm-pcm-routing",
  6322. .codec_name = "btfmslim_slave",
  6323. .codec_dai_name = "btfm_bt_sco_slim_tx",
  6324. .no_pcm = 1,
  6325. .dpcm_capture = 1,
  6326. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  6327. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6328. .ops = &msm_wcn_ops,
  6329. .ignore_suspend = 1,
  6330. },
  6331. {
  6332. .name = LPASS_BE_SLIMBUS_8_TX,
  6333. .stream_name = "Slimbus8 Capture",
  6334. .cpu_dai_name = "msm-dai-q6-dev.16401",
  6335. .platform_name = "msm-pcm-routing",
  6336. .codec_name = "btfmslim_slave",
  6337. .codec_dai_name = "btfm_fm_slim_tx",
  6338. .no_pcm = 1,
  6339. .dpcm_capture = 1,
  6340. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  6341. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6342. .init = &msm_wcn_init,
  6343. .ops = &msm_wcn_ops,
  6344. .ignore_suspend = 1,
  6345. },
  6346. };
  6347. static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
  6348. /* DISP PORT BACK END DAI Link */
  6349. {
  6350. .name = LPASS_BE_DISPLAY_PORT,
  6351. .stream_name = "Display Port Playback",
  6352. .cpu_dai_name = "msm-dai-q6-dp.24608",
  6353. .platform_name = "msm-pcm-routing",
  6354. .codec_name = "msm-ext-disp-audio-codec-rx",
  6355. .codec_dai_name = "msm_dp_audio_codec_rx_dai",
  6356. .no_pcm = 1,
  6357. .dpcm_playback = 1,
  6358. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
  6359. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6360. .ignore_pmdown_time = 1,
  6361. .ignore_suspend = 1,
  6362. },
  6363. };
  6364. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  6365. {
  6366. .name = LPASS_BE_PRI_MI2S_RX,
  6367. .stream_name = "Primary MI2S Playback",
  6368. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6369. .platform_name = "msm-pcm-routing",
  6370. .codec_name = "msm-stub-codec.1",
  6371. .codec_dai_name = "msm-stub-rx",
  6372. .no_pcm = 1,
  6373. .dpcm_playback = 1,
  6374. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  6375. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6376. .ops = &msm_mi2s_be_ops,
  6377. .ignore_suspend = 1,
  6378. .ignore_pmdown_time = 1,
  6379. },
  6380. {
  6381. .name = LPASS_BE_PRI_MI2S_TX,
  6382. .stream_name = "Primary MI2S Capture",
  6383. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6384. .platform_name = "msm-pcm-routing",
  6385. .codec_name = "msm-stub-codec.1",
  6386. .codec_dai_name = "msm-stub-tx",
  6387. .no_pcm = 1,
  6388. .dpcm_capture = 1,
  6389. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  6390. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6391. .ops = &msm_mi2s_be_ops,
  6392. .ignore_suspend = 1,
  6393. },
  6394. {
  6395. .name = LPASS_BE_SEC_MI2S_RX,
  6396. .stream_name = "Secondary MI2S Playback",
  6397. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6398. .platform_name = "msm-pcm-routing",
  6399. .codec_name = "msm-stub-codec.1",
  6400. .codec_dai_name = "msm-stub-rx",
  6401. .no_pcm = 1,
  6402. .dpcm_playback = 1,
  6403. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  6404. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6405. .ops = &msm_mi2s_be_ops,
  6406. .ignore_suspend = 1,
  6407. .ignore_pmdown_time = 1,
  6408. },
  6409. {
  6410. .name = LPASS_BE_SEC_MI2S_TX,
  6411. .stream_name = "Secondary MI2S Capture",
  6412. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6413. .platform_name = "msm-pcm-routing",
  6414. .codec_name = "msm-stub-codec.1",
  6415. .codec_dai_name = "msm-stub-tx",
  6416. .no_pcm = 1,
  6417. .dpcm_capture = 1,
  6418. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  6419. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6420. .ops = &msm_mi2s_be_ops,
  6421. .ignore_suspend = 1,
  6422. },
  6423. {
  6424. .name = LPASS_BE_TERT_MI2S_RX,
  6425. .stream_name = "Tertiary MI2S Playback",
  6426. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6427. .platform_name = "msm-pcm-routing",
  6428. .codec_name = "msm-stub-codec.1",
  6429. .codec_dai_name = "msm-stub-rx",
  6430. .no_pcm = 1,
  6431. .dpcm_playback = 1,
  6432. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  6433. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6434. .ops = &msm_mi2s_be_ops,
  6435. .ignore_suspend = 1,
  6436. .ignore_pmdown_time = 1,
  6437. },
  6438. {
  6439. .name = LPASS_BE_TERT_MI2S_TX,
  6440. .stream_name = "Tertiary MI2S Capture",
  6441. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6442. .platform_name = "msm-pcm-routing",
  6443. .codec_name = "msm-stub-codec.1",
  6444. .codec_dai_name = "msm-stub-tx",
  6445. .no_pcm = 1,
  6446. .dpcm_capture = 1,
  6447. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  6448. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6449. .ops = &msm_mi2s_be_ops,
  6450. .ignore_suspend = 1,
  6451. },
  6452. {
  6453. .name = LPASS_BE_QUAT_MI2S_RX,
  6454. .stream_name = "Quaternary MI2S Playback",
  6455. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6456. .platform_name = "msm-pcm-routing",
  6457. .codec_name = "msm-stub-codec.1",
  6458. .codec_dai_name = "msm-stub-rx",
  6459. .no_pcm = 1,
  6460. .dpcm_playback = 1,
  6461. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
  6462. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6463. .ops = &msm_mi2s_be_ops,
  6464. .ignore_suspend = 1,
  6465. .ignore_pmdown_time = 1,
  6466. },
  6467. {
  6468. .name = LPASS_BE_QUAT_MI2S_TX,
  6469. .stream_name = "Quaternary MI2S Capture",
  6470. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6471. .platform_name = "msm-pcm-routing",
  6472. .codec_name = "msm-stub-codec.1",
  6473. .codec_dai_name = "msm-stub-tx",
  6474. .no_pcm = 1,
  6475. .dpcm_capture = 1,
  6476. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
  6477. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6478. .ops = &msm_mi2s_be_ops,
  6479. .ignore_suspend = 1,
  6480. },
  6481. {
  6482. .name = LPASS_BE_QUIN_MI2S_RX,
  6483. .stream_name = "Quinary MI2S Playback",
  6484. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6485. .platform_name = "msm-pcm-routing",
  6486. .codec_name = "msm-stub-codec.1",
  6487. .codec_dai_name = "msm-stub-rx",
  6488. .no_pcm = 1,
  6489. .dpcm_playback = 1,
  6490. .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
  6491. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6492. .ops = &msm_mi2s_be_ops,
  6493. .ignore_suspend = 1,
  6494. .ignore_pmdown_time = 1,
  6495. },
  6496. {
  6497. .name = LPASS_BE_QUIN_MI2S_TX,
  6498. .stream_name = "Quinary MI2S Capture",
  6499. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6500. .platform_name = "msm-pcm-routing",
  6501. .codec_name = "msm-stub-codec.1",
  6502. .codec_dai_name = "msm-stub-tx",
  6503. .no_pcm = 1,
  6504. .dpcm_capture = 1,
  6505. .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
  6506. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6507. .ops = &msm_mi2s_be_ops,
  6508. .ignore_suspend = 1,
  6509. },
  6510. };
  6511. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  6512. /* Primary AUX PCM Backend DAI Links */
  6513. {
  6514. .name = LPASS_BE_AUXPCM_RX,
  6515. .stream_name = "AUX PCM Playback",
  6516. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6517. .platform_name = "msm-pcm-routing",
  6518. .codec_name = "msm-stub-codec.1",
  6519. .codec_dai_name = "msm-stub-rx",
  6520. .no_pcm = 1,
  6521. .dpcm_playback = 1,
  6522. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  6523. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6524. .ignore_pmdown_time = 1,
  6525. .ignore_suspend = 1,
  6526. },
  6527. {
  6528. .name = LPASS_BE_AUXPCM_TX,
  6529. .stream_name = "AUX PCM Capture",
  6530. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6531. .platform_name = "msm-pcm-routing",
  6532. .codec_name = "msm-stub-codec.1",
  6533. .codec_dai_name = "msm-stub-tx",
  6534. .no_pcm = 1,
  6535. .dpcm_capture = 1,
  6536. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  6537. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6538. .ignore_suspend = 1,
  6539. },
  6540. /* Secondary AUX PCM Backend DAI Links */
  6541. {
  6542. .name = LPASS_BE_SEC_AUXPCM_RX,
  6543. .stream_name = "Sec AUX PCM Playback",
  6544. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6545. .platform_name = "msm-pcm-routing",
  6546. .codec_name = "msm-stub-codec.1",
  6547. .codec_dai_name = "msm-stub-rx",
  6548. .no_pcm = 1,
  6549. .dpcm_playback = 1,
  6550. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  6551. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6552. .ignore_pmdown_time = 1,
  6553. .ignore_suspend = 1,
  6554. },
  6555. {
  6556. .name = LPASS_BE_SEC_AUXPCM_TX,
  6557. .stream_name = "Sec AUX PCM Capture",
  6558. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6559. .platform_name = "msm-pcm-routing",
  6560. .codec_name = "msm-stub-codec.1",
  6561. .codec_dai_name = "msm-stub-tx",
  6562. .no_pcm = 1,
  6563. .dpcm_capture = 1,
  6564. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  6565. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6566. .ignore_suspend = 1,
  6567. },
  6568. /* Tertiary AUX PCM Backend DAI Links */
  6569. {
  6570. .name = LPASS_BE_TERT_AUXPCM_RX,
  6571. .stream_name = "Tert AUX PCM Playback",
  6572. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6573. .platform_name = "msm-pcm-routing",
  6574. .codec_name = "msm-stub-codec.1",
  6575. .codec_dai_name = "msm-stub-rx",
  6576. .no_pcm = 1,
  6577. .dpcm_playback = 1,
  6578. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  6579. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6580. .ignore_suspend = 1,
  6581. },
  6582. {
  6583. .name = LPASS_BE_TERT_AUXPCM_TX,
  6584. .stream_name = "Tert AUX PCM Capture",
  6585. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6586. .platform_name = "msm-pcm-routing",
  6587. .codec_name = "msm-stub-codec.1",
  6588. .codec_dai_name = "msm-stub-tx",
  6589. .no_pcm = 1,
  6590. .dpcm_capture = 1,
  6591. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  6592. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6593. .ignore_suspend = 1,
  6594. },
  6595. /* Quaternary AUX PCM Backend DAI Links */
  6596. {
  6597. .name = LPASS_BE_QUAT_AUXPCM_RX,
  6598. .stream_name = "Quat AUX PCM Playback",
  6599. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6600. .platform_name = "msm-pcm-routing",
  6601. .codec_name = "msm-stub-codec.1",
  6602. .codec_dai_name = "msm-stub-rx",
  6603. .no_pcm = 1,
  6604. .dpcm_playback = 1,
  6605. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
  6606. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6607. .ignore_pmdown_time = 1,
  6608. .ignore_suspend = 1,
  6609. },
  6610. {
  6611. .name = LPASS_BE_QUAT_AUXPCM_TX,
  6612. .stream_name = "Quat AUX PCM Capture",
  6613. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6614. .platform_name = "msm-pcm-routing",
  6615. .codec_name = "msm-stub-codec.1",
  6616. .codec_dai_name = "msm-stub-tx",
  6617. .no_pcm = 1,
  6618. .dpcm_capture = 1,
  6619. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
  6620. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6621. .ignore_suspend = 1,
  6622. },
  6623. /* Quinary AUX PCM Backend DAI Links */
  6624. {
  6625. .name = LPASS_BE_QUIN_AUXPCM_RX,
  6626. .stream_name = "Quin AUX PCM Playback",
  6627. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6628. .platform_name = "msm-pcm-routing",
  6629. .codec_name = "msm-stub-codec.1",
  6630. .codec_dai_name = "msm-stub-rx",
  6631. .no_pcm = 1,
  6632. .dpcm_playback = 1,
  6633. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
  6634. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6635. .ignore_pmdown_time = 1,
  6636. .ignore_suspend = 1,
  6637. },
  6638. {
  6639. .name = LPASS_BE_QUIN_AUXPCM_TX,
  6640. .stream_name = "Quin AUX PCM Capture",
  6641. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6642. .platform_name = "msm-pcm-routing",
  6643. .codec_name = "msm-stub-codec.1",
  6644. .codec_dai_name = "msm-stub-tx",
  6645. .no_pcm = 1,
  6646. .dpcm_capture = 1,
  6647. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
  6648. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6649. .ignore_suspend = 1,
  6650. },
  6651. };
  6652. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  6653. /* WSA CDC DMA Backend DAI Links */
  6654. {
  6655. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  6656. .stream_name = "WSA CDC DMA0 Playback",
  6657. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  6658. .platform_name = "msm-pcm-routing",
  6659. .codec_name = "bolero_codec",
  6660. .codec_dai_name = "wsa_macro_rx1",
  6661. .no_pcm = 1,
  6662. .dpcm_playback = 1,
  6663. .init = &msm_int_audrx_init,
  6664. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  6665. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6666. .ignore_pmdown_time = 1,
  6667. .ignore_suspend = 1,
  6668. .ops = &msm_cdc_dma_be_ops,
  6669. },
  6670. {
  6671. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  6672. .stream_name = "WSA CDC DMA1 Playback",
  6673. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  6674. .platform_name = "msm-pcm-routing",
  6675. .codec_name = "bolero_codec",
  6676. .codec_dai_name = "wsa_macro_rx_mix",
  6677. .no_pcm = 1,
  6678. .dpcm_playback = 1,
  6679. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  6680. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6681. .ignore_pmdown_time = 1,
  6682. .ignore_suspend = 1,
  6683. .ops = &msm_cdc_dma_be_ops,
  6684. },
  6685. {
  6686. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  6687. .stream_name = "WSA CDC DMA1 Capture",
  6688. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  6689. .platform_name = "msm-pcm-routing",
  6690. .codec_name = "bolero_codec",
  6691. .codec_dai_name = "wsa_macro_echo",
  6692. .no_pcm = 1,
  6693. .dpcm_capture = 1,
  6694. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  6695. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6696. .ignore_suspend = 1,
  6697. .ops = &msm_cdc_dma_be_ops,
  6698. },
  6699. };
  6700. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  6701. /* RX CDC DMA Backend DAI Links */
  6702. {
  6703. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  6704. .stream_name = "RX CDC DMA0 Playback",
  6705. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  6706. .platform_name = "msm-pcm-routing",
  6707. .codec_name = "bolero_codec",
  6708. .codec_dai_name = "rx_macro_rx1",
  6709. .no_pcm = 1,
  6710. .dpcm_playback = 1,
  6711. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  6712. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6713. .ignore_pmdown_time = 1,
  6714. .ignore_suspend = 1,
  6715. .ops = &msm_cdc_dma_be_ops,
  6716. },
  6717. {
  6718. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  6719. .stream_name = "RX CDC DMA1 Playback",
  6720. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  6721. .platform_name = "msm-pcm-routing",
  6722. .codec_name = "bolero_codec",
  6723. .codec_dai_name = "rx_macro_rx2",
  6724. .no_pcm = 1,
  6725. .dpcm_playback = 1,
  6726. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  6727. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6728. .ignore_pmdown_time = 1,
  6729. .ignore_suspend = 1,
  6730. .ops = &msm_cdc_dma_be_ops,
  6731. },
  6732. {
  6733. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  6734. .stream_name = "RX CDC DMA2 Playback",
  6735. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  6736. .platform_name = "msm-pcm-routing",
  6737. .codec_name = "bolero_codec",
  6738. .codec_dai_name = "rx_macro_rx3",
  6739. .no_pcm = 1,
  6740. .dpcm_playback = 1,
  6741. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  6742. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6743. .ignore_pmdown_time = 1,
  6744. .ignore_suspend = 1,
  6745. .ops = &msm_cdc_dma_be_ops,
  6746. },
  6747. {
  6748. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  6749. .stream_name = "RX CDC DMA3 Playback",
  6750. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  6751. .platform_name = "msm-pcm-routing",
  6752. .codec_name = "bolero_codec",
  6753. .codec_dai_name = "rx_macro_rx4",
  6754. .no_pcm = 1,
  6755. .dpcm_playback = 1,
  6756. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  6757. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6758. .ignore_pmdown_time = 1,
  6759. .ignore_suspend = 1,
  6760. .ops = &msm_cdc_dma_be_ops,
  6761. },
  6762. /* TX CDC DMA Backend DAI Links */
  6763. {
  6764. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  6765. .stream_name = "TX CDC DMA3 Capture",
  6766. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  6767. .platform_name = "msm-pcm-routing",
  6768. .codec_name = "bolero_codec",
  6769. .codec_dai_name = "tx_macro_tx1",
  6770. .no_pcm = 1,
  6771. .dpcm_capture = 1,
  6772. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  6773. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6774. .ignore_suspend = 1,
  6775. .ops = &msm_cdc_dma_be_ops,
  6776. },
  6777. {
  6778. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  6779. .stream_name = "TX CDC DMA4 Capture",
  6780. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  6781. .platform_name = "msm-pcm-routing",
  6782. .codec_name = "bolero_codec",
  6783. .codec_dai_name = "tx_macro_tx2",
  6784. .no_pcm = 1,
  6785. .dpcm_capture = 1,
  6786. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  6787. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6788. .ignore_suspend = 1,
  6789. .ops = &msm_cdc_dma_be_ops,
  6790. },
  6791. };
  6792. static struct snd_soc_dai_link msm_sm6150_dai_links[
  6793. ARRAY_SIZE(msm_common_dai_links) +
  6794. ARRAY_SIZE(msm_tavil_fe_dai_links) +
  6795. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  6796. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  6797. ARRAY_SIZE(msm_common_be_dai_links) +
  6798. ARRAY_SIZE(msm_tavil_be_dai_links) +
  6799. ARRAY_SIZE(msm_wcn_be_dai_links) +
  6800. ARRAY_SIZE(ext_disp_be_dai_link) +
  6801. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  6802. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  6803. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  6804. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
  6805. static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
  6806. {
  6807. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  6808. struct snd_soc_pcm_runtime *rtd;
  6809. int ret = 0;
  6810. void *mbhc_calibration;
  6811. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  6812. if (!rtd) {
  6813. dev_err(card->dev,
  6814. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  6815. __func__, be_dl_name);
  6816. ret = -EINVAL;
  6817. goto err_pcm_runtime;
  6818. }
  6819. mbhc_calibration = def_wcd_mbhc_cal();
  6820. if (!mbhc_calibration) {
  6821. ret = -ENOMEM;
  6822. goto err_mbhc_cal;
  6823. }
  6824. wcd_mbhc_cfg.calibration = mbhc_calibration;
  6825. ret = tavil_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
  6826. if (ret) {
  6827. dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
  6828. __func__, ret);
  6829. goto err_hs_detect;
  6830. }
  6831. return 0;
  6832. err_hs_detect:
  6833. kfree(mbhc_calibration);
  6834. err_mbhc_cal:
  6835. err_pcm_runtime:
  6836. return ret;
  6837. }
  6838. static int msm_populate_dai_link_component_of_node(
  6839. struct snd_soc_card *card)
  6840. {
  6841. int i, index, ret = 0;
  6842. struct device *cdev = card->dev;
  6843. struct snd_soc_dai_link *dai_link = card->dai_link;
  6844. struct device_node *np;
  6845. if (!cdev) {
  6846. pr_err("%s: Sound card device memory NULL\n", __func__);
  6847. return -ENODEV;
  6848. }
  6849. for (i = 0; i < card->num_links; i++) {
  6850. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  6851. continue;
  6852. /* populate platform_of_node for snd card dai links */
  6853. if (dai_link[i].platform_name &&
  6854. !dai_link[i].platform_of_node) {
  6855. index = of_property_match_string(cdev->of_node,
  6856. "asoc-platform-names",
  6857. dai_link[i].platform_name);
  6858. if (index < 0) {
  6859. pr_err("%s: No match found for platform name: %s\n",
  6860. __func__, dai_link[i].platform_name);
  6861. ret = index;
  6862. goto err;
  6863. }
  6864. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  6865. index);
  6866. if (!np) {
  6867. pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
  6868. __func__, dai_link[i].platform_name,
  6869. index);
  6870. ret = -ENODEV;
  6871. goto err;
  6872. }
  6873. dai_link[i].platform_of_node = np;
  6874. dai_link[i].platform_name = NULL;
  6875. }
  6876. /* populate cpu_of_node for snd card dai links */
  6877. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  6878. index = of_property_match_string(cdev->of_node,
  6879. "asoc-cpu-names",
  6880. dai_link[i].cpu_dai_name);
  6881. if (index >= 0) {
  6882. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  6883. index);
  6884. if (!np) {
  6885. pr_err("%s: retrieving phandle for cpu dai %s failed\n",
  6886. __func__,
  6887. dai_link[i].cpu_dai_name);
  6888. ret = -ENODEV;
  6889. goto err;
  6890. }
  6891. dai_link[i].cpu_of_node = np;
  6892. dai_link[i].cpu_dai_name = NULL;
  6893. }
  6894. }
  6895. /* populate codec_of_node for snd card dai links */
  6896. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  6897. index = of_property_match_string(cdev->of_node,
  6898. "asoc-codec-names",
  6899. dai_link[i].codec_name);
  6900. if (index < 0)
  6901. continue;
  6902. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  6903. index);
  6904. if (!np) {
  6905. pr_err("%s: retrieving phandle for codec %s failed\n",
  6906. __func__, dai_link[i].codec_name);
  6907. ret = -ENODEV;
  6908. goto err;
  6909. }
  6910. dai_link[i].codec_of_node = np;
  6911. dai_link[i].codec_name = NULL;
  6912. }
  6913. }
  6914. err:
  6915. return ret;
  6916. }
  6917. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  6918. {
  6919. int ret = 0;
  6920. struct snd_soc_codec *codec = rtd->codec;
  6921. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  6922. ARRAY_SIZE(msm_tavil_snd_controls));
  6923. if (ret < 0) {
  6924. dev_err(codec->dev,
  6925. "%s: add_codec_controls failed, err = %d\n",
  6926. __func__, ret);
  6927. return ret;
  6928. }
  6929. return 0;
  6930. }
  6931. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  6932. struct snd_pcm_hw_params *params)
  6933. {
  6934. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  6935. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  6936. int ret = 0;
  6937. unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
  6938. 151};
  6939. unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
  6940. 134, 135, 136, 137, 138, 139,
  6941. 140, 141, 142, 143};
  6942. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  6943. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  6944. slim_rx_cfg[SLIM_RX_0].channels,
  6945. rx_ch);
  6946. if (ret < 0)
  6947. pr_err("%s: RX failed to set cpu chan map error %d\n",
  6948. __func__, ret);
  6949. } else {
  6950. ret = snd_soc_dai_set_channel_map(cpu_dai,
  6951. slim_tx_cfg[SLIM_TX_0].channels,
  6952. tx_ch, 0, 0);
  6953. if (ret < 0)
  6954. pr_err("%s: TX failed to set cpu chan map error %d\n",
  6955. __func__, ret);
  6956. }
  6957. return ret;
  6958. }
  6959. static struct snd_soc_ops msm_stub_be_ops = {
  6960. .hw_params = msm_snd_stub_hw_params,
  6961. };
  6962. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  6963. /* FrontEnd DAI Links */
  6964. {
  6965. .name = "MSMSTUB Media1",
  6966. .stream_name = "MultiMedia1",
  6967. .cpu_dai_name = "MultiMedia1",
  6968. .platform_name = "msm-pcm-dsp.0",
  6969. .dynamic = 1,
  6970. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  6971. .dpcm_playback = 1,
  6972. .dpcm_capture = 1,
  6973. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6974. SND_SOC_DPCM_TRIGGER_POST},
  6975. .codec_dai_name = "snd-soc-dummy-dai",
  6976. .codec_name = "snd-soc-dummy",
  6977. .ignore_suspend = 1,
  6978. /* this dainlink has playback support */
  6979. .ignore_pmdown_time = 1,
  6980. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  6981. },
  6982. };
  6983. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  6984. /* Backend DAI Links */
  6985. {
  6986. .name = LPASS_BE_SLIMBUS_0_RX,
  6987. .stream_name = "Slimbus Playback",
  6988. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6989. .platform_name = "msm-pcm-routing",
  6990. .codec_name = "msm-stub-codec.1",
  6991. .codec_dai_name = "msm-stub-rx",
  6992. .no_pcm = 1,
  6993. .dpcm_playback = 1,
  6994. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6995. .init = &msm_audrx_stub_init,
  6996. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6997. .ignore_pmdown_time = 1, /* dai link has playback support */
  6998. .ignore_suspend = 1,
  6999. .ops = &msm_stub_be_ops,
  7000. },
  7001. {
  7002. .name = LPASS_BE_SLIMBUS_0_TX,
  7003. .stream_name = "Slimbus Capture",
  7004. .cpu_dai_name = "msm-dai-q6-dev.16385",
  7005. .platform_name = "msm-pcm-routing",
  7006. .codec_name = "msm-stub-codec.1",
  7007. .codec_dai_name = "msm-stub-tx",
  7008. .no_pcm = 1,
  7009. .dpcm_capture = 1,
  7010. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  7011. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7012. .ignore_suspend = 1,
  7013. .ops = &msm_stub_be_ops,
  7014. },
  7015. };
  7016. static struct snd_soc_dai_link msm_stub_dai_links[
  7017. ARRAY_SIZE(msm_stub_fe_dai_links) +
  7018. ARRAY_SIZE(msm_stub_be_dai_links)];
  7019. struct snd_soc_card snd_soc_card_stub_msm = {
  7020. .name = "sm6150-stub-snd-card",
  7021. };
  7022. static const struct of_device_id sm6150_asoc_machine_of_match[] = {
  7023. { .compatible = "qcom,sm6150-asoc-snd",
  7024. .data = "codec"},
  7025. { .compatible = "qcom,sm6150-asoc-snd-stub",
  7026. .data = "stub_codec"},
  7027. {},
  7028. };
  7029. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  7030. {
  7031. struct snd_soc_card *card = NULL;
  7032. struct snd_soc_dai_link *dailink;
  7033. int total_links = 0, rc = 0;
  7034. u32 tavil_codec = 0, auxpcm_audio_intf = 0;
  7035. u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
  7036. u32 wcn_btfm_intf = 0;
  7037. const struct of_device_id *match;
  7038. match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
  7039. if (!match) {
  7040. dev_err(dev, "%s: No DT match found for sound card\n",
  7041. __func__);
  7042. return NULL;
  7043. }
  7044. if (!strcmp(match->data, "codec")) {
  7045. card = &snd_soc_card_sm6150_msm;
  7046. memcpy(msm_sm6150_dai_links + total_links,
  7047. msm_common_dai_links,
  7048. sizeof(msm_common_dai_links));
  7049. total_links += ARRAY_SIZE(msm_common_dai_links);
  7050. memcpy(msm_sm6150_dai_links + total_links,
  7051. msm_common_misc_fe_dai_links,
  7052. sizeof(msm_common_misc_fe_dai_links));
  7053. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  7054. rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
  7055. &tavil_codec);
  7056. if (rc) {
  7057. dev_dbg(dev, "%s: No DT match for tavil codec\n",
  7058. __func__);
  7059. } else {
  7060. if (tavil_codec) {
  7061. card->late_probe =
  7062. msm_snd_card_tavil_late_probe;
  7063. memcpy(msm_sm6150_dai_links + total_links,
  7064. msm_tavil_fe_dai_links,
  7065. sizeof(msm_tavil_fe_dai_links));
  7066. total_links +=
  7067. ARRAY_SIZE(msm_tavil_fe_dai_links);
  7068. }
  7069. }
  7070. if (!tavil_codec) {
  7071. memcpy(msm_sm6150_dai_links + total_links,
  7072. msm_bolero_fe_dai_links,
  7073. sizeof(msm_bolero_fe_dai_links));
  7074. total_links +=
  7075. ARRAY_SIZE(msm_bolero_fe_dai_links);
  7076. }
  7077. memcpy(msm_sm6150_dai_links + total_links,
  7078. msm_common_be_dai_links,
  7079. sizeof(msm_common_be_dai_links));
  7080. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  7081. if (tavil_codec) {
  7082. memcpy(msm_sm6150_dai_links + total_links,
  7083. msm_tavil_be_dai_links,
  7084. sizeof(msm_tavil_be_dai_links));
  7085. total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
  7086. } else {
  7087. memcpy(msm_sm6150_dai_links + total_links,
  7088. msm_wsa_cdc_dma_be_dai_links,
  7089. sizeof(msm_wsa_cdc_dma_be_dai_links));
  7090. total_links +=
  7091. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  7092. memcpy(msm_sm6150_dai_links + total_links,
  7093. msm_rx_tx_cdc_dma_be_dai_links,
  7094. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  7095. total_links +=
  7096. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  7097. }
  7098. rc = of_property_read_u32(dev->of_node,
  7099. "qcom,ext-disp-audio-rx",
  7100. &ext_disp_audio_intf);
  7101. if (rc) {
  7102. dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
  7103. __func__);
  7104. } else {
  7105. if (ext_disp_audio_intf) {
  7106. memcpy(msm_sm6150_dai_links + total_links,
  7107. ext_disp_be_dai_link,
  7108. sizeof(ext_disp_be_dai_link));
  7109. total_links +=
  7110. ARRAY_SIZE(ext_disp_be_dai_link);
  7111. }
  7112. }
  7113. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  7114. &mi2s_audio_intf);
  7115. if (rc) {
  7116. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  7117. __func__);
  7118. } else {
  7119. if (mi2s_audio_intf) {
  7120. memcpy(msm_sm6150_dai_links + total_links,
  7121. msm_mi2s_be_dai_links,
  7122. sizeof(msm_mi2s_be_dai_links));
  7123. total_links +=
  7124. ARRAY_SIZE(msm_mi2s_be_dai_links);
  7125. }
  7126. }
  7127. rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
  7128. &wcn_btfm_intf);
  7129. if (rc) {
  7130. dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
  7131. __func__);
  7132. } else {
  7133. if (wcn_btfm_intf) {
  7134. memcpy(msm_sm6150_dai_links + total_links,
  7135. msm_wcn_be_dai_links,
  7136. sizeof(msm_wcn_be_dai_links));
  7137. total_links +=
  7138. ARRAY_SIZE(msm_wcn_be_dai_links);
  7139. }
  7140. }
  7141. rc = of_property_read_u32(dev->of_node,
  7142. "qcom,auxpcm-audio-intf",
  7143. &auxpcm_audio_intf);
  7144. if (rc) {
  7145. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  7146. __func__);
  7147. } else {
  7148. if (auxpcm_audio_intf) {
  7149. memcpy(msm_sm6150_dai_links + total_links,
  7150. msm_auxpcm_be_dai_links,
  7151. sizeof(msm_auxpcm_be_dai_links));
  7152. total_links +=
  7153. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  7154. }
  7155. }
  7156. dailink = msm_sm6150_dai_links;
  7157. } else if (!strcmp(match->data, "stub_codec")) {
  7158. card = &snd_soc_card_stub_msm;
  7159. memcpy(msm_stub_dai_links + total_links,
  7160. msm_stub_fe_dai_links,
  7161. sizeof(msm_stub_fe_dai_links));
  7162. total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
  7163. memcpy(msm_stub_dai_links + total_links,
  7164. msm_stub_be_dai_links,
  7165. sizeof(msm_stub_be_dai_links));
  7166. total_links += ARRAY_SIZE(msm_stub_be_dai_links);
  7167. dailink = msm_stub_dai_links;
  7168. }
  7169. if (card) {
  7170. card->dai_link = dailink;
  7171. card->num_links = total_links;
  7172. }
  7173. return card;
  7174. }
  7175. static int msm_wsa881x_init(struct snd_soc_component *component)
  7176. {
  7177. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7178. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7179. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  7180. SPKR_L_BOOST, SPKR_L_VI};
  7181. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  7182. SPKR_R_BOOST, SPKR_R_VI};
  7183. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  7184. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  7185. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  7186. struct msm_asoc_mach_data *pdata;
  7187. struct snd_soc_dapm_context *dapm;
  7188. struct snd_card *card = component->card->snd_card;
  7189. struct snd_info_entry *entry;
  7190. int ret = 0;
  7191. if (!codec) {
  7192. pr_err("%s codec is NULL\n", __func__);
  7193. return -EINVAL;
  7194. }
  7195. dapm = snd_soc_codec_get_dapm(codec);
  7196. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  7197. dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
  7198. __func__, codec->component.name);
  7199. wsa881x_set_channel_map(codec, &spkleft_ports[0],
  7200. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7201. &ch_rate[0], &spkleft_port_types[0]);
  7202. if (dapm->component) {
  7203. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  7204. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  7205. }
  7206. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  7207. dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
  7208. __func__, codec->component.name);
  7209. wsa881x_set_channel_map(codec, &spkright_ports[0],
  7210. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7211. &ch_rate[0], &spkright_port_types[0]);
  7212. if (dapm->component) {
  7213. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  7214. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  7215. }
  7216. } else {
  7217. dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
  7218. codec->component.name);
  7219. ret = -EINVAL;
  7220. goto err;
  7221. }
  7222. pdata = snd_soc_card_get_drvdata(component->card);
  7223. if (!pdata->codec_root) {
  7224. entry = snd_info_create_subdir(card->module, "codecs",
  7225. card->proc_root);
  7226. if (!entry) {
  7227. pr_err("%s: Cannot create codecs module entry\n",
  7228. __func__);
  7229. ret = 0;
  7230. goto err;
  7231. }
  7232. pdata->codec_root = entry;
  7233. }
  7234. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  7235. codec);
  7236. err:
  7237. return ret;
  7238. }
  7239. static int msm_aux_codec_init(struct snd_soc_component *component)
  7240. {
  7241. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  7242. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  7243. int ret = 0;
  7244. void *mbhc_calibration;
  7245. struct snd_info_entry *entry;
  7246. struct snd_card *card = component->card->snd_card;
  7247. struct msm_asoc_mach_data *pdata;
  7248. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  7249. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  7250. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  7251. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  7252. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  7253. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  7254. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  7255. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  7256. snd_soc_dapm_sync(dapm);
  7257. pdata = snd_soc_card_get_drvdata(component->card);
  7258. if (!pdata->codec_root) {
  7259. entry = snd_info_create_subdir(card->module, "codecs",
  7260. card->proc_root);
  7261. if (!entry) {
  7262. pr_err("%s: Cannot create codecs module entry\n",
  7263. __func__);
  7264. ret = 0;
  7265. goto codec_root_err;
  7266. }
  7267. pdata->codec_root = entry;
  7268. }
  7269. wcd937x_info_create_codec_entry(pdata->codec_root, codec);
  7270. codec_root_err:
  7271. mbhc_calibration = def_wcd_mbhc_cal();
  7272. if (!mbhc_calibration) {
  7273. return -ENOMEM;
  7274. }
  7275. wcd_mbhc_cfg.calibration = mbhc_calibration;
  7276. ret = wcd937x_mbhc_hs_detect(codec, &wcd_mbhc_cfg);
  7277. return ret;
  7278. }
  7279. static int msm_init_aux_dev(struct platform_device *pdev,
  7280. struct snd_soc_card *card)
  7281. {
  7282. struct device_node *wsa_of_node;
  7283. struct device_node *aux_codec_of_node;
  7284. u32 wsa_max_devs;
  7285. u32 wsa_dev_cnt;
  7286. u32 codec_aux_dev_cnt = 0;
  7287. int i;
  7288. struct msm_wsa881x_dev_info *wsa881x_dev_info = NULL;
  7289. struct aux_codec_dev_info *aux_cdc_dev_info = NULL;
  7290. const char *auxdev_name_prefix[1];
  7291. char *dev_name_str = NULL;
  7292. int found = 0;
  7293. int codecs_found = 0;
  7294. int ret = 0;
  7295. /* Get maximum WSA device count for this platform */
  7296. ret = of_property_read_u32(pdev->dev.of_node,
  7297. "qcom,wsa-max-devs", &wsa_max_devs);
  7298. if (ret) {
  7299. dev_info(&pdev->dev,
  7300. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  7301. __func__, pdev->dev.of_node->full_name, ret);
  7302. wsa_max_devs = 0;
  7303. goto codec_aux_dev;
  7304. }
  7305. if (wsa_max_devs == 0) {
  7306. dev_warn(&pdev->dev,
  7307. "%s: Max WSA devices is 0 for this target?\n",
  7308. __func__);
  7309. goto codec_aux_dev;
  7310. }
  7311. /* Get count of WSA device phandles for this platform */
  7312. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  7313. "qcom,wsa-devs", NULL);
  7314. if (wsa_dev_cnt == -ENOENT) {
  7315. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  7316. __func__);
  7317. goto err;
  7318. } else if (wsa_dev_cnt <= 0) {
  7319. dev_err(&pdev->dev,
  7320. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  7321. __func__, wsa_dev_cnt);
  7322. ret = -EINVAL;
  7323. goto err;
  7324. }
  7325. /*
  7326. * Expect total phandles count to be NOT less than maximum possible
  7327. * WSA count. However, if it is less, then assign same value to
  7328. * max count as well.
  7329. */
  7330. if (wsa_dev_cnt < wsa_max_devs) {
  7331. dev_dbg(&pdev->dev,
  7332. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  7333. __func__, wsa_max_devs, wsa_dev_cnt);
  7334. wsa_max_devs = wsa_dev_cnt;
  7335. }
  7336. /* Make sure prefix string passed for each WSA device */
  7337. ret = of_property_count_strings(pdev->dev.of_node,
  7338. "qcom,wsa-aux-dev-prefix");
  7339. if (ret != wsa_dev_cnt) {
  7340. dev_err(&pdev->dev,
  7341. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  7342. __func__, wsa_dev_cnt, ret);
  7343. ret = -EINVAL;
  7344. goto err;
  7345. }
  7346. /*
  7347. * Alloc mem to store phandle and index info of WSA device, if already
  7348. * registered with ALSA core
  7349. */
  7350. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  7351. sizeof(struct msm_wsa881x_dev_info),
  7352. GFP_KERNEL);
  7353. if (!wsa881x_dev_info) {
  7354. ret = -ENOMEM;
  7355. goto err;
  7356. }
  7357. /*
  7358. * search and check whether all WSA devices are already
  7359. * registered with ALSA core or not. If found a node, store
  7360. * the node and the index in a local array of struct for later
  7361. * use.
  7362. */
  7363. for (i = 0; i < wsa_dev_cnt; i++) {
  7364. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  7365. "qcom,wsa-devs", i);
  7366. if (unlikely(!wsa_of_node)) {
  7367. /* we should not be here */
  7368. dev_err(&pdev->dev,
  7369. "%s: wsa dev node is not present\n",
  7370. __func__);
  7371. ret = -EINVAL;
  7372. goto err;
  7373. }
  7374. if (soc_find_component(wsa_of_node, NULL)) {
  7375. /* WSA device registered with ALSA core */
  7376. wsa881x_dev_info[found].of_node = wsa_of_node;
  7377. wsa881x_dev_info[found].index = i;
  7378. found++;
  7379. if (found == wsa_max_devs)
  7380. break;
  7381. }
  7382. }
  7383. if (found < wsa_max_devs) {
  7384. dev_dbg(&pdev->dev,
  7385. "%s: failed to find %d components. Found only %d\n",
  7386. __func__, wsa_max_devs, found);
  7387. return -EPROBE_DEFER;
  7388. }
  7389. dev_info(&pdev->dev,
  7390. "%s: found %d wsa881x devices registered with ALSA core\n",
  7391. __func__, found);
  7392. codec_aux_dev:
  7393. if (strcmp(card->name, "sm6150-tavil-snd-card")) {
  7394. /* Get count of aux codec device phandles for this platform */
  7395. codec_aux_dev_cnt = of_count_phandle_with_args(
  7396. pdev->dev.of_node,
  7397. "qcom,codec-aux-devs", NULL);
  7398. if (codec_aux_dev_cnt == -ENOENT) {
  7399. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  7400. __func__);
  7401. goto err;
  7402. } else if (codec_aux_dev_cnt <= 0) {
  7403. dev_err(&pdev->dev,
  7404. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  7405. __func__, codec_aux_dev_cnt);
  7406. ret = -EINVAL;
  7407. goto err;
  7408. }
  7409. /*
  7410. * Alloc mem to store phandle and index info of aux codec
  7411. * if already registered with ALSA core
  7412. */
  7413. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
  7414. sizeof(struct aux_codec_dev_info),
  7415. GFP_KERNEL);
  7416. if (!aux_cdc_dev_info) {
  7417. ret = -ENOMEM;
  7418. goto err;
  7419. }
  7420. /*
  7421. * search and check whether all aux codecs are already
  7422. * registered with ALSA core or not. If found a node, store
  7423. * the node and the index in a local array of struct for later
  7424. * use.
  7425. */
  7426. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7427. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  7428. "qcom,codec-aux-devs", i);
  7429. if (unlikely(!aux_codec_of_node)) {
  7430. /* we should not be here */
  7431. dev_err(&pdev->dev,
  7432. "%s: aux codec dev node is not present\n",
  7433. __func__);
  7434. ret = -EINVAL;
  7435. goto err;
  7436. }
  7437. if (soc_find_component(aux_codec_of_node, NULL)) {
  7438. /* AUX codec registered with ALSA core */
  7439. aux_cdc_dev_info[codecs_found].of_node =
  7440. aux_codec_of_node;
  7441. aux_cdc_dev_info[codecs_found].index = i;
  7442. codecs_found++;
  7443. }
  7444. }
  7445. if (codecs_found < codec_aux_dev_cnt) {
  7446. dev_dbg(&pdev->dev,
  7447. "%s: failed to find %d components. Found only %d\n",
  7448. __func__, codec_aux_dev_cnt, codecs_found);
  7449. return -EPROBE_DEFER;
  7450. }
  7451. dev_info(&pdev->dev,
  7452. "%s: found %d AUX codecs registered with ALSA core\n",
  7453. __func__, codecs_found);
  7454. }
  7455. card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
  7456. card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
  7457. /* Alloc array of AUX devs struct */
  7458. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  7459. sizeof(struct snd_soc_aux_dev),
  7460. GFP_KERNEL);
  7461. if (!msm_aux_dev) {
  7462. ret = -ENOMEM;
  7463. goto err;
  7464. }
  7465. /* Alloc array of codec conf struct */
  7466. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  7467. sizeof(struct snd_soc_codec_conf),
  7468. GFP_KERNEL);
  7469. if (!msm_codec_conf) {
  7470. ret = -ENOMEM;
  7471. goto err;
  7472. }
  7473. for (i = 0; i < wsa_max_devs; i++) {
  7474. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  7475. GFP_KERNEL);
  7476. if (!dev_name_str) {
  7477. ret = -ENOMEM;
  7478. goto err;
  7479. }
  7480. ret = of_property_read_string_index(pdev->dev.of_node,
  7481. "qcom,wsa-aux-dev-prefix",
  7482. wsa881x_dev_info[i].index,
  7483. auxdev_name_prefix);
  7484. if (ret) {
  7485. dev_err(&pdev->dev,
  7486. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  7487. __func__, ret);
  7488. ret = -EINVAL;
  7489. goto err;
  7490. }
  7491. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  7492. msm_aux_dev[i].name = dev_name_str;
  7493. msm_aux_dev[i].codec_name = NULL;
  7494. msm_aux_dev[i].codec_of_node =
  7495. wsa881x_dev_info[i].of_node;
  7496. msm_aux_dev[i].init = msm_wsa881x_init;
  7497. msm_codec_conf[i].dev_name = NULL;
  7498. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  7499. msm_codec_conf[i].of_node =
  7500. wsa881x_dev_info[i].of_node;
  7501. }
  7502. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7503. msm_aux_dev[wsa_max_devs + i].name = NULL;
  7504. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  7505. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  7506. aux_cdc_dev_info[i].of_node;
  7507. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  7508. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  7509. msm_codec_conf[wsa_max_devs + i].name_prefix =
  7510. NULL;
  7511. msm_codec_conf[wsa_max_devs + i].of_node =
  7512. aux_cdc_dev_info[i].of_node;
  7513. }
  7514. card->codec_conf = msm_codec_conf;
  7515. card->aux_dev = msm_aux_dev;
  7516. err:
  7517. return ret;
  7518. }
  7519. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  7520. {
  7521. int count;
  7522. u32 mi2s_master_slave[MI2S_MAX];
  7523. int ret;
  7524. for (count = 0; count < MI2S_MAX; count++) {
  7525. mutex_init(&mi2s_intf_conf[count].lock);
  7526. mi2s_intf_conf[count].ref_cnt = 0;
  7527. }
  7528. ret = of_property_read_u32_array(pdev->dev.of_node,
  7529. "qcom,msm-mi2s-master",
  7530. mi2s_master_slave, MI2S_MAX);
  7531. if (ret) {
  7532. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  7533. __func__);
  7534. } else {
  7535. for (count = 0; count < MI2S_MAX; count++) {
  7536. mi2s_intf_conf[count].msm_is_mi2s_master =
  7537. mi2s_master_slave[count];
  7538. }
  7539. }
  7540. }
  7541. static void msm_i2s_auxpcm_deinit(void)
  7542. {
  7543. int count;
  7544. for (count = 0; count < MI2S_MAX; count++) {
  7545. mutex_destroy(&mi2s_intf_conf[count].lock);
  7546. mi2s_intf_conf[count].ref_cnt = 0;
  7547. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  7548. }
  7549. }
  7550. static int sm6150_ssr_enable(struct device *dev, void *data)
  7551. {
  7552. struct platform_device *pdev = to_platform_device(dev);
  7553. struct snd_soc_card *card = platform_get_drvdata(pdev);
  7554. struct msm_asoc_mach_data *pdata;
  7555. int ret = 0;
  7556. if (!card) {
  7557. dev_err(dev, "%s: card is NULL\n", __func__);
  7558. ret = -EINVAL;
  7559. goto err;
  7560. }
  7561. if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
  7562. pdata = snd_soc_card_get_drvdata(card);
  7563. if (!pdata->is_afe_config_done) {
  7564. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  7565. struct snd_soc_pcm_runtime *rtd;
  7566. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  7567. if (!rtd) {
  7568. dev_err(dev,
  7569. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  7570. __func__, be_dl_name);
  7571. ret = -EINVAL;
  7572. goto err;
  7573. }
  7574. ret = msm_afe_set_config(rtd->codec);
  7575. if (ret)
  7576. dev_err(dev, "%s: Failed to set AFE config. err %d\n",
  7577. __func__, ret);
  7578. else
  7579. pdata->is_afe_config_done = true;
  7580. }
  7581. }
  7582. snd_soc_card_change_online_state(card, 1);
  7583. dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
  7584. err:
  7585. return ret;
  7586. }
  7587. static void sm6150_ssr_disable(struct device *dev, void *data)
  7588. {
  7589. struct platform_device *pdev = to_platform_device(dev);
  7590. struct snd_soc_card *card = platform_get_drvdata(pdev);
  7591. struct msm_asoc_mach_data *pdata;
  7592. if (!card) {
  7593. dev_err(dev, "%s: card is NULL\n", __func__);
  7594. return;
  7595. }
  7596. dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
  7597. snd_soc_card_change_online_state(card, 0);
  7598. if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
  7599. pdata = snd_soc_card_get_drvdata(card);
  7600. msm_afe_clear_config();
  7601. pdata->is_afe_config_done = false;
  7602. }
  7603. }
  7604. static const struct snd_event_ops sm6150_ssr_ops = {
  7605. .enable = sm6150_ssr_enable,
  7606. .disable = sm6150_ssr_disable,
  7607. };
  7608. static int msm_audio_ssr_compare(struct device *dev, void *data)
  7609. {
  7610. struct device_node *node = data;
  7611. dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
  7612. __func__, dev->of_node, node);
  7613. return (dev->of_node && dev->of_node == node);
  7614. }
  7615. static int msm_audio_ssr_register(struct device *dev)
  7616. {
  7617. struct device_node *np = dev->of_node;
  7618. struct snd_event_clients *ssr_clients = NULL;
  7619. struct device_node *node;
  7620. int ret;
  7621. int i;
  7622. for (i = 0; ; i++) {
  7623. node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
  7624. if (!node)
  7625. break;
  7626. snd_event_mstr_add_client(&ssr_clients,
  7627. msm_audio_ssr_compare, node);
  7628. }
  7629. ret = snd_event_master_register(dev, &sm6150_ssr_ops,
  7630. ssr_clients, NULL);
  7631. if (!ret)
  7632. snd_event_notify(dev, SND_EVENT_UP);
  7633. return ret;
  7634. }
  7635. static int msm_asoc_machine_probe(struct platform_device *pdev)
  7636. {
  7637. struct snd_soc_card *card;
  7638. struct msm_asoc_mach_data *pdata;
  7639. const char *mbhc_audio_jack_type = NULL;
  7640. int ret;
  7641. if (!pdev->dev.of_node) {
  7642. dev_err(&pdev->dev, "No platform supplied from device tree\n");
  7643. return -EINVAL;
  7644. }
  7645. pdata = devm_kzalloc(&pdev->dev,
  7646. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  7647. if (!pdata)
  7648. return -ENOMEM;
  7649. card = populate_snd_card_dailinks(&pdev->dev);
  7650. if (!card) {
  7651. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  7652. ret = -EINVAL;
  7653. goto err;
  7654. }
  7655. card->dev = &pdev->dev;
  7656. platform_set_drvdata(pdev, card);
  7657. snd_soc_card_set_drvdata(card, pdata);
  7658. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  7659. if (ret) {
  7660. dev_err(&pdev->dev, "parse card name failed, err:%d\n",
  7661. ret);
  7662. goto err;
  7663. }
  7664. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  7665. if (ret) {
  7666. dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
  7667. ret);
  7668. goto err;
  7669. }
  7670. ret = msm_populate_dai_link_component_of_node(card);
  7671. if (ret) {
  7672. ret = -EPROBE_DEFER;
  7673. goto err;
  7674. }
  7675. ret = msm_init_aux_dev(pdev, card);
  7676. if (ret)
  7677. goto err;
  7678. ret = devm_snd_soc_register_card(&pdev->dev, card);
  7679. if (ret == -EPROBE_DEFER) {
  7680. if (codec_reg_done)
  7681. ret = -EINVAL;
  7682. goto err;
  7683. } else if (ret) {
  7684. dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
  7685. ret);
  7686. goto err;
  7687. }
  7688. dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
  7689. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7690. "qcom,hph-en1-gpio", 0);
  7691. if (!pdata->hph_en1_gpio_p) {
  7692. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7693. "qcom,hph-en1-gpio",
  7694. pdev->dev.of_node->full_name);
  7695. }
  7696. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7697. "qcom,hph-en0-gpio", 0);
  7698. if (!pdata->hph_en0_gpio_p) {
  7699. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7700. "qcom,hph-en0-gpio",
  7701. pdev->dev.of_node->full_name);
  7702. }
  7703. ret = of_property_read_string(pdev->dev.of_node,
  7704. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  7705. if (ret) {
  7706. dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
  7707. "qcom,mbhc-audio-jack-type",
  7708. pdev->dev.of_node->full_name);
  7709. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  7710. } else {
  7711. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  7712. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7713. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  7714. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  7715. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7716. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  7717. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  7718. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7719. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  7720. } else {
  7721. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7722. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  7723. }
  7724. }
  7725. /*
  7726. * Parse US-Euro gpio info from DT. Report no error if us-euro
  7727. * entry is not found in DT file as some targets do not support
  7728. * US-Euro detection
  7729. */
  7730. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7731. "qcom,us-euro-gpios", 0);
  7732. if (!pdata->us_euro_gpio_p) {
  7733. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  7734. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  7735. } else {
  7736. dev_dbg(&pdev->dev, "%s detected\n",
  7737. "qcom,us-euro-gpios");
  7738. wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  7739. }
  7740. if (wcd_mbhc_cfg.enable_usbc_analog) {
  7741. wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
  7742. pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
  7743. "fsa4480-i2c-handle", 0);
  7744. if (!pdata->fsa_handle)
  7745. dev_err(&pdev->dev,
  7746. "property %s not detected in node %s\n",
  7747. "fsa4480-i2c-handle",
  7748. pdev->dev.of_node->full_name);
  7749. }
  7750. /* Parse pinctrl info from devicetree */
  7751. ret = msm_get_pinctrl(pdev);
  7752. if (!ret) {
  7753. pr_debug("%s: pinctrl parsing successful\n", __func__);
  7754. } else {
  7755. dev_dbg(&pdev->dev,
  7756. "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
  7757. __func__, ret);
  7758. ret = 0;
  7759. }
  7760. msm_i2s_auxpcm_init(pdev);
  7761. if (strcmp(card->name, "sm6150-tavil-snd-card")) {
  7762. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7763. "qcom,cdc-dmic01-gpios",
  7764. 0);
  7765. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7766. "qcom,cdc-dmic23-gpios",
  7767. 0);
  7768. }
  7769. ret = msm_audio_ssr_register(&pdev->dev);
  7770. if (ret)
  7771. pr_err("%s: Registration with SND event FWK failed ret = %d\n",
  7772. __func__, ret);
  7773. err:
  7774. return ret;
  7775. }
  7776. static int msm_asoc_machine_remove(struct platform_device *pdev)
  7777. {
  7778. snd_event_master_deregister(&pdev->dev);
  7779. msm_i2s_auxpcm_deinit();
  7780. return 0;
  7781. }
  7782. static struct platform_driver sm6150_asoc_machine_driver = {
  7783. .driver = {
  7784. .name = DRV_NAME,
  7785. .owner = THIS_MODULE,
  7786. .pm = &snd_soc_pm_ops,
  7787. .of_match_table = sm6150_asoc_machine_of_match,
  7788. },
  7789. .probe = msm_asoc_machine_probe,
  7790. .remove = msm_asoc_machine_remove,
  7791. };
  7792. module_platform_driver(sm6150_asoc_machine_driver);
  7793. MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
  7794. MODULE_LICENSE("GPL v2");
  7795. MODULE_ALIAS("platform:" DRV_NAME);
  7796. MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);